[PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support
Martin Blumenstingl
martin.blumenstingl at googlemail.com
Sun Jan 28 12:26:34 PST 2018
On Fri, Jan 19, 2018 at 2:49 AM, Emiliano Ingrassia
<ingrassia at epigenesys.com> wrote:
> The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
> which supports 10/100/1000 Mbps ethernet.
> The PHY reset and interrupt lines are controlled by the SoC via
> two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
> The PHY energy efficient ethernet (eee) mode is marked as broken
> using "eee-broken-1000t" because, during tests, high packet losses
> were experienced without it.
>
> Signed-off-by: Emiliano Ingrassia <ingrassia at epigenesys.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>
> ---
> arch/arm/boot/dts/meson8b-odroidc1.dts | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
> index 9ff6ca4e20d0..d5e83051bb54 100644
> --- a/arch/arm/boot/dts/meson8b-odroidc1.dts
> +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
> @@ -99,3 +99,33 @@
> &usb1 {
> status = "okay";
> };
> +
> +ðmac {
> + status = "okay";
> +
> + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 30000>;
> +
> + pinctrl-0 = <ð_rgmii_pins>;
> + pinctrl-names = "default";
> +
> + phy-mode = "rgmii";
> + phy-handle = <ð_phy>;
> + amlogic,tx-delay-ns = <4>;
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* Realtek RTL8211F (0x001cc916) */
> + eth_phy: ethernet-phy at 0 {
> + reg = <0>;
> + eee-broken-1000t;
> + interrupt-parent = <&gpio_intc>;
> + /* GPIOH_3 */
> + interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
> + };
> + };
> +};
> --
> 2.15.1
>
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