[PATCH v2 0/1] add support for the NAND clocks on Meson8b
martin.blumenstingl at googlemail.com
Mon Jan 1 13:01:38 PST 2018
This adds support for the NAND clocks found in the Meson8, Meson8b
and Meson8m2 SoCs.
The clocks consist of a simple gate, a divider and a mux. The mux
parents are not documented in the public S805 datasheet , so I
had to use a bit of math and take the vendor kernel as reference 
to find the actual parent clocks.
Some mux parents cannot be divided down without remainder to the
target clocks (as expected by the vendor NAND driver) these clocks
have the ROUND_CLOSEST flag set.
The new clocks are similar to gxbb_sd_emmc_c_clk0_sel,
gxbb_sd_emmc_c_clk0_div and gxbb_sd_emmc_c_clk0 on the GX SoCs.
Actual differences are:
- mux parents are re-ordered
- the gate is controlled by bit 8 (instead of bit 7 on GX)
Changes since v1 at :
- rebased so it still applies in 2018
- dropped mux table (since the known parents are values 0..4)
- replaced CLK_SET_RATE_NO_REPARENT with CLK_SET_RATE_PARENT on the mux
- added CLK_SET_RATE_PARENT on the divider
- fixed width of the divider (it's 7 bits wide, ranging from bit 0 to 6
while v1 only used a width of 6 bits)
Martin Blumenstingl (1):
clk: meson: meson8b: add support for the NAND clocks
drivers/clk/meson/meson8b.c | 51 ++++++++++++++++++++++++++++++++
drivers/clk/meson/meson8b.h | 3 +-
include/dt-bindings/clock/meson8b-clkc.h | 3 ++
3 files changed, 56 insertions(+), 1 deletion(-)
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