[PATCH 3/3] pinctrl: meson: meson8: add the RGMII RXD2/RXD3 and TXD2/TXD3 signals

Linus Walleij linus.walleij at linaro.org
Mon Apr 30 01:55:32 PDT 2018


On Sun, Apr 22, 2018 at 12:53 PM, Martin Blumenstingl
<martin.blumenstingl at googlemail.com> wrote:

> These are only available on the Meson8m2 SoC (which uses the same
> DesignWare Ethernet MAC as Meson8b).
> The "eth_tx_clk_50m" signal either provides a 50MHz clock for the RMII
> PHYs or the RGMII TX clock (as far as we know the frequency is
> controlled by the PRG_ETHERNET registers in the Ethernet MAC "glue" IP
> block).
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>

Patch applied with Kevin's ACK.

Yours,
Linus Walleij



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