[PATCH clk-fixes] clk: meson: meson8b: fix meson8b_fclk_div3_div clock name
Jerome Brunet
jbrunet at baylibre.com
Mon Apr 23 12:38:03 PDT 2018
On Mon, 2018-04-23 at 10:23 +0200, Jerome Brunet wrote:
> On Sun, 2018-04-22 at 12:28 +0200, Martin Blumenstingl wrote:
> > The names of all fclk divider gate clocks follow the naming schema
> > "fclk_divN" and the name of all fclk fixed dividers follow the naming
> > schema "fclk_divN_div".
> > There's one exception to this rule: meson8b_fclk_div3_div's name is
> > "fclk_div_div3". It's child clock meson8b_fclk_div3 however references
> > it as "fclk_div3_div" (following the naming schema explained above).
> >
> > Fix the naming of the meson8b_fclk_div3_div clock to follow the naming
> > schema. This also fixes serial console on my Meson8m2 board because
> > "clk81" uses fclk_div3 as parent. However, since the hierarchy stops at
> > meson8b_fclk_div3 there's no known parent clock and the rate of "clk81"
> > and all of it's children (UART clock, SDIO MMC controller clock, ...)
> > are all 0.
> >
> > Fixes: 05f814402d6174 ("clk: meson: add fdiv clock gates")
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>
>
> Oopss ... Thanks for fixing this Martin.
>
> Reviewed-by: Jerome Brunet <jbrunet at baylibre.com>
>
> Stephen, Do you mind taking this directly for fixes ? I can prepare a PR if you
> prefer.
Nevermind, apparently I have another mistake of the same kind, so there is
another fix coming up.
I'ĺl make a PR
>
> Regards
> Jerome
>
> > ---
> > drivers/clk/meson/meson8b.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
> > index cc2992493e0b..2c4ff6192852 100644
> > --- a/drivers/clk/meson/meson8b.c
> > +++ b/drivers/clk/meson/meson8b.c
> > @@ -253,7 +253,7 @@ static struct clk_fixed_factor meson8b_fclk_div3_div = {
> > .mult = 1,
> > .div = 3,
> > .hw.init = &(struct clk_init_data){
> > - .name = "fclk_div_div3",
> > + .name = "fclk_div3_div",
> > .ops = &clk_fixed_factor_ops,
> > .parent_names = (const char *[]){ "fixed_pll" },
> > .num_parents = 1,
>
>
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