[PATCH 0/2] update the L2 cache settings on Meson8/Meson8b
martin.blumenstingl at googlemail.com
Tue Oct 31 15:23:14 PDT 2017
The L2 cache settings on our mainline kernel did not match the
configuration from Amlogic's vendor kernel.
This was boot-tested on a Meson8 (actually Meson8m2, but both use
the same CPU cores and L2 cache configuration) and a Meson8b board.
Martin Blumenstingl (2):
ARM: dts: meson8b: add more L2 cache settings
ARM: dts: meson8: add more L2 cache settings
arch/arm/boot/dts/meson8.dtsi | 3 +++
arch/arm/boot/dts/meson8b.dtsi | 3 +++
2 files changed, 6 insertions(+)
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