[PATCH 13/14] mmc: meson-gx: work around clk-stop issue
khilman at baylibre.com
Mon Aug 7 14:41:57 PDT 2017
Jerome Brunet <jbrunet at baylibre.com> writes:
> It seems that the signal clock is also used and required, somehow, by
> the controller it self.
> It is shown during init, when writing to CFG while the divider is set
> to 0 will crash the SoC. During voltage switch, the controller may crash
> and the card may then fail to exit busy state if the clock is stopped.
> To avoid this, it is best to keep the clock running for the controller,
> except during rate change. However, we still need to be able to gate
> the clock out of the SoC. Let's use the pinmux for this, and fallback
> to gpio mode (pulled-down) when we need to gate the clock
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
Curious "feature" of the IP, but the solution looks good to me.
Reviewed-by: Kevin Hilman <khilman at baylibre.com>
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