[PATCH v2] afs: Add barriers by using clear_and_wake_up_bit()

[Arnaud Bonnet]

On 10/21/26 4:52 PM, Arnaud Bonnet wrote:
> Tested by building and manually checking generated assembly.
> Depending on the architecture it may:
>         1) have no effect,
>         2) supplement the release atomic with a full barrier, or
>         3) add a redundant but harmless full barrier.
> This fixes the second case.
> 
> Example in server.c function afs_check_server_record():
> 
> - x86: no change in generated code
> 
> - arm64(lse):
>         mov     x0, 2           # AFS_SERVER_FL_UPDATING (bit 1)
>         add     x1, x20, 232    # &server->flags 
>         .arch_extension lse
>         ldclrl  x0, x0, [x1]    # clear_bit_unlock(), release barrier
> .L264:
> +       dmb ish                 # full barrier from smp_mb__after_atomic()
>         mov     w1, 1
>         mov     x0, x19
>         bl      wake_up_bit     # wake_up_bit()
>         b       .L258           # return success
> 
> - rv64(a):
>         li      a5,-3                   # ~AFS_SERVER_FL_UPDATING
>         addi    a4,s3,232               # &server->flags
>         amoand.d.rl zero, a5, 0(a4)     # clear_bit_unlock(), acquire-release
> +               fence rw,rw             # redundant smp_mb__after_atomic()

I misread the amoand.rl op, this is actually only a release barrier
and thus does require the fence, making it not redundant.

This removes all cases of the 3) I found above, however as it is
not part of the commit message I do not plan to fix with v3.

>         li      a1,1
>         mv      a0,s5
>         call    wake_up_bit             # wake_up_bit()
>         j       .L279                   # return success