[PATCH 07/10] arm: dts: owl-s500: Add I2C nodes

[Cristian Ciocaltea]

Add I2C controller nodes for Actions Semi S500 SoC.

Note the Actions Semi Owl SoC's I2C driver seems to be fully compatible
with the Actions Semi S500 SoC, even though this is not explicitly
mentioned in the source code. Hence, for the moment, enable the I2C
controller node via the "actions,s900-i2c" compatible string.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea at gmail.com>
---
 arch/arm/boot/dts/owl-s500.dtsi | 40 +++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 778775ac42f7..15c11af530ea 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -193,6 +193,46 @@ cmu: clock-controller at b0160000 {
 			#reset-cells = <1>;
 		};
 
+		i2c0: i2c at b0170000 {
+			compatible = "actions,s900-i2c";
+			reg = <0xb0170000 0x4000>;
+			clocks = <&cmu CLK_I2C0>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c at b0174000 {
+			compatible = "actions,s900-i2c";
+			reg = <0xb0174000 0x4000>;
+			clocks = <&cmu CLK_I2C1>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c at b0178000 {
+			compatible = "actions,s900-i2c";
+			reg = <0xb0178000 0x4000>;
+			clocks = <&cmu CLK_I2C2>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c at b017c000 {
+			compatible = "actions,s900-i2c";
+			reg = <0xb017c000 0x4000>;
+			clocks = <&cmu CLK_I2C3>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		timer: timer at b0168000 {
 			compatible = "actions,s500-timer";
 			reg = <0xb0168000 0x8000>;
-- 
2.27.0