[LEDE-DEV] [PATCH] ar71xx: Chipidea USB device support for QCA953x

[Piotr Dymacz]

Hello Sergey,

On 01.09.2017 06:16, adron at yapic.net wrote:
> From: Sergey Sergeev <adron at yapic.net>
> 
> Changes the platform to use the Chipidea driver instead of the
> generic USB host driver which has support for both host and
> device modes (selected on boot) for QCA953x based boards.
> 
> It was tested on GL.iNet GL-AR300M with USB DEVICE mode config.
> 
> More details is available here:
> https://github.com/adron-s/QCA953x-usb-device-mode

Please, have a look at 'ar71xx_qca9k-usb-device-mode' branch in my 
staging tree [1]. There is a slightly modified version of Felix's 
'ar71xx: rework chipidea usb controller patch' change, from his staging 
tree [2].

I tested it successfully on AR9331, AR9344, QCA9531 and QCA9557 based 
devices (I plan to make some tests on QCA956x later), with USB in device 
and host mode. I also dropped 'ar933x_usb_setup_ctrl_config()' function 
which was toggling 'HOST_ONLY' bit in 'USB_CONFIG' register as it wasn't 
make any difference on all tested platforms.

[1] https://git.lede-project.org/?p=lede/pepe2k/staging.git;a=summary
[2] https://git.lede-project.org/?p=lede/nbd/staging.git;a=summary

--
Cheers,
Piotr

> 
> Signed-off-by: Sergey Sergeev <adron at yapic.net>
> ---
>   ...940-usb-chipidea-QCA953x-platform-support.patch | 87 ++++++++++++++++++++++
>   1 file changed, 87 insertions(+)
>   create mode 100644 target/linux/ar71xx/patches-4.4/940-usb-chipidea-QCA953x-platform-support.patch
> 
> diff --git a/target/linux/ar71xx/patches-4.4/940-usb-chipidea-QCA953x-platform-support.patch b/target/linux/ar71xx/patches-4.4/940-usb-chipidea-QCA953x-platform-support.patch
> new file mode 100644
> index 0000000..a3e2509
> --- /dev/null
> +++ b/target/linux/ar71xx/patches-4.4/940-usb-chipidea-QCA953x-platform-support.patch
> @@ -0,0 +1,87 @@
> +--- a/arch/mips/ath79/dev-usb.c
> ++++ b/arch/mips/ath79/dev-usb.c
> +@@ -286,6 +286,51 @@
> + 			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
> + }
> +
> ++#if IS_ENABLED(CONFIG_USB_CHIPIDEA)
> ++static void __init qca953x_usb_setup_ctrl_config(void)
> ++{
> ++	void __iomem *usb_ctrl_base, *usb_config_reg;
> ++	u32 usb_config;
> ++
> ++	usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
> ++	usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG;
> ++	usb_config = __raw_readl(usb_config_reg);
> ++	usb_config &= ~QCA953X_USB_CONFIG_HOST_ONLY;
> ++	__raw_writel(usb_config, usb_config_reg);
> ++	iounmap(usb_ctrl_base);
> ++}
> ++
> ++static void __init qca953x_ci_usb_setup(u32 bootstrap)
> ++{
> ++	enum usb_dr_mode dr_mode;
> ++	struct ci_hdrc_platform_data ci_pdata;
> ++
> ++	if (bootstrap & QCA953X_BOOTSTRAP_USB_MODE_DEVICE) {
> ++		dr_mode = USB_DR_MODE_PERIPHERAL;
> ++		qca953x_usb_setup_ctrl_config();
> ++	} else {
> ++		dr_mode = USB_DR_MODE_HOST;
> ++	}
> ++
> ++	memset(&ci_pdata, 0, sizeof(ci_pdata));
> ++	ci_pdata.name = "ci_hdrc_qca953x";
> ++	ci_pdata.capoffset = DEF_CAPOFFSET;
> ++	ci_pdata.dr_mode = dr_mode;
> ++	ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP;
> ++	ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV);
> ++	ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV);
> ++	ci_pdata.itc_setting = 1;
> ++
> ++	platform_device_register_simple("usb_phy_generic",
> ++					PLATFORM_DEVID_AUTO, NULL, 0);
> ++
> ++	ath79_usb_register("ci_hdrc", -1,
> ++			   QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE,
> ++			   ATH79_CPU_IRQ(3),
> ++			   &ci_pdata, sizeof(ci_pdata));
> ++}
> ++#endif
> ++
> + static void __init qca953x_usb_setup(void)
> + {
> + 	u32 bootstrap;
> +@@ -304,10 +349,14 @@
> + 	ath79_device_reset_clear(QCA953X_RESET_USB_HOST);
> + 	udelay(1000);
> +
> ++#if IS_ENABLED(CONFIG_USB_CHIPIDEA)
> ++	qca953x_ci_usb_setup(bootstrap);
> ++#else
> + 	ath79_usb_register("ehci-platform", -1,
> + 			   QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE,
> + 			   ATH79_CPU_IRQ(3),
> + 			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
> ++#endif
> + }
> +
> + static void qca955x_usb_reset_notifier(struct platform_device *pdev)
> +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> +@@ -660,6 +660,7 @@
> + #define AR933X_BOOTSTRAP_MDIO_GPIO_EN	BIT(18)
> + #define AR933X_BOOTSTRAP_EEPBUSY	BIT(4)
> + #define AR933X_BOOTSTRAP_USB_MODE_HOST	BIT(3)
> ++#define QCA953X_BOOTSTRAP_USB_MODE_DEVICE BIT(7)
> + #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
> +
> + #define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)
> +@@ -690,6 +691,7 @@
> + #define QCA956X_BOOTSTRAP_REF_CLK_40	BIT(2)
> +
> + #define AR933X_USB_CONFIG_HOST_ONLY   BIT(8)
> ++#define QCA953X_USB_CONFIG_HOST_ONLY	BIT(4)
> +
> + #define AR934X_PCIE_WMAC_INT_WMAC_MISC		BIT(0)
> + #define AR934X_PCIE_WMAC_INT_WMAC_TX		BIT(1)
>