[LEDE-DEV] [PATCH 2/2] ipq806x: Add support for ipq40xx subtarget

Ram Chandra Jangir rjangir at codeaurora.org
Mon Apr 17 10:43:11 PDT 2017


Hi Christian,

Thanks for the review and time. Please see my inline comments. I will update
these in  new version of this patch .

>This is what the user sees on the WPJ428:
> [   30.614478] usb 1-1: new high-speed USB device number 3 using 
>xhci-hcd
> [   31.356496] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
> [   31.357151] usb usb2-port1: cannot disable (err = -32)

>Can you please check the usb port functionality on your board too?

>- the board fails to reboot / restart.
>The WPJ428 LEDE-Image will just freeze. The FB4040 and RT-AC58U doesn't
have no issue though and neither does the Stock Image. Can you please check,
if this is working with your image?
[Ram]: I faced lots of network issues/panics and fixed them. Basic board
boot up is fine with usb and checked only basic USB 3.0  functionality. I
have not done thoroughly testing with usb. That's why I did not mention usb
in commit message except network. Will take it on next.
              
> ---
> diff --git a/target/linux/ipq806x/Makefile 
> b/target/linux/ipq806x/Makefile index 5a5551c..b5b36e1 100644
> --- a/target/linux/ipq806x/Makefile
> +++ b/target/linux/ipq806x/Makefile
> @@ -21,7 +21,7 @@ DEFAULT_PACKAGES += \
>  	kmod-ata-core kmod-ata-ahci kmod-ata-ahci-platform \
>  	kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport \
>  	kmod-usb3 kmod-usb-dwc3-of-simple kmod-usb-phy-qcom-dwc3 \
> -	kmod-ath10k wpad-mini \
> +	kmod-ath10k wpad-mini kmod-switch-ar40xx kmod-ipq40xx-edma \

>>the switch and edma driver are already part of the default image.
>>Why do you want to have them as separate packages?
[Ram]: It is good to have enabled them as module instead of inbuilt,
Theoretically ar40xx switch depends on swconfig module which is enabled as
kmod only.

> diff --git a/target/linux/ipq806x/base-files/etc/board.d/02_network 
> b/target/linux/ipq806x/base-files/etc/board.d/02_network
> index 36e0fb3..082105a 100755
> --- a/target/linux/ipq806x/base-files/etc/board.d/02_network
> +++ b/target/linux/ipq806x/base-files/etc/board.d/02_network
> @@ -48,6 +48,12 @@ nbg6817)
>  	ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
>  	ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 1)"
>  	;;
> +ap-dk01.1-c1|\
> +ap-dk04.1-c1)
> +	ucidef_set_interfaces_lan_wan "eth1" "eth0"
> +	ucidef_add_switch "switch0" \
> +		"0t at eth1" "1:lan" "2:lan" "3:lan" "4:lan"
> +	;;

>For the record: eth1 IS NOT a separate MAC. From what I can tell, the
essedma driver just maps different VLANs to multiple ethX instances. 
>So both eth0 and eth1 share the same PSGMII link to the QCA8075. 
>Therefore I suggest to let the kernel handle the VLAN and switch to:

  >     ucidef_add_switch "switch0" \
>                "0 at eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
>
>		(the ucidef_set_interfaces_lan_wan gets removed)

>>This will create eth0.1 and eth0.2 instead of eth0 and eth1.

[Ram] : I added eth0 as WAN and eth1 along with eth1.1  as lan interfaces.  
               verified IPv4 and IPv6 connectivity, Router can ping device
through WAN interface
               Device on LAN can ping through router.  I will look your
patch after this.

>I've already tested this and made a patch:
<https://github.com/chunkeey/LEDE-IPQ40XX/commit/f4c1345f73bb63d7c5b9acc7e76
6c18b071c7885>
>[@John, I think this should fix the weird VLAN issues you had with your
box] (I'm waiting for AP devices with a AR8036 to see how they behave here)
> diff --git 
> a/target/linux/ipq806x/patches-4.9/851-dts-ipq40xx-Add-support-for-spi
> -nor-32-MB-flash-and-.patch 
> b/target/linux/ipq806x/patches-4.9/851-dts-ipq40xx-Add-support-for-spi
> -nor-32-MB-flash-and-.patch
> new file mode 100644
> index 0000000..5753f10
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/851-dts-ipq40xx-Add-support-for
> +++ -spi-nor-32-MB-flash-and-.patch
> @@ -0,0 +1,111 @@
> +From 5f07811771ad92a3413248a240eaedfee09ace93 Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Fri, 24 Mar 2017 14:00:00 +0530
> +Subject: [PATCH] dts: ipq40xx: Add support for spi nor 32 MB flash 
> +and enable  wifi support
> +
> +- Add micron n25q128a11 spi nor 32MB flash and fixes spi nodes
> +  to work on DK01 and DK04 boards.
> +- Add support for default SPI configuration
> +- Enable and fixed WiFi nodes to work with DK boards
> +
> +Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
> +---
> +[...]
> +diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi 
> +b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> +index 768a2a4..2a5cc5e 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
> +@@ -81,13 +81,16 @@
> +			pinctrl-names = "default";
> +			status = "ok";
> +			cs-gpios = <&tlmm 54 0>;
> ++			num-cs = <1>;
> +
> +-			mx25l25635e at 0 {
> ++			m25p80 at 0 {
>>There are already boards that use the mx25l25635e property.
>>Please, just add a separate property for the generic "m25p80" and set its
status to disabled (this is a dtsi, which will probably be used by most
other devices!).
[Ram]: Will check/test the board which uses mx25l25635e flash and will
revise the patch if needed.

> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0>;
> +-				compatible = "mx25l25635e";
> ++				compatible = "n25q128a11";
>we should really add "jedec,spi-nor" at the end.
>See:
<http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/mtd/
jedec,spi-nor.txt>
>"Must also include "jedec,spi-nor" for any SPI NOR flash that can  be
identified by the JEDEC READ ID opcode (0x9F)."
[Ram]: yeah it can be added if possible.

> ++				linux,modalias = "m25p80", "n25q128a11";
> +				spi-max-frequency = <24000000>;
> ++				use-default-sizes;
> +			};
> +		};
> +
> +diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi 
> +b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> +index e817432..b68fc1a 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> +@@ -94,18 +94,20 @@
> +			status = "ok";
> +		};
> +
> +-		spi_0: spi at 78b5000 {
> ++		spi_0: spi at 78b5000 { /* BLSP1 QUP1 */
> +			pinctrl-0 = <&spi_0_pins>;
> +			pinctrl-names = "default";
> +			status = "ok";
> +			cs-gpios = <&tlmm 12 0>;
> +
> +-			mx25l25635e at 0 {
> ++			m25p80 at 0 {
>Same as above. Please make a separate m25p80 at 0 node there. If you want to
have it in the .dtsi. Alternatively we could move the nor/spinand chip
definitions into a .dts and just keep the spi-driver there.
>This is probably the saner way to do it.
[Ram]: commented on top.

> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				reg = <0>;
> +-				compatible = "mx25l25635e";
> ++				compatible = "n25q128a11";
>add "jedec,spi-nor"; (Yes, I'll need to fix my stuff as well).

> ++				linux,modalias = "m25p80", "n25q128a11";
> +				spi-max-frequency = <24000000>;
> ++				use-default-sizes;
> +			};
> +		};
> +
> +diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi 
> +b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +index 7013c85..be5b6f7 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +@@ -506,6 +506,7 @@
> +		wifi0: wifi at a000000 {
> +			compatible = "qcom,ipq4019-wifi";
> +			reg = <0xa000000 0x200000>;
> ++			core-id = <0x0>;
>Where does this property come from? It's not part of the ath10k binding:
<http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/
wireless/qcom,ath10k.txt>
>And I can't find a of_ parser for it in the ath10k driver.
[Ram]: yeah right,  it is old now, will clean it out.

> +@@ -542,12 +543,15 @@
> +					   "msi8",  "msi9", "msi10",
"msi11",
> +					  "msi12", "msi13", "msi14",
"msi15",
> +					  "legacy";
> +-			status = "disabled";
> ++			status = "ok";
> ++			qca,msi_addr = <0x0b006040>;
> ++			qca,msi_base = <0x40>;
>Yes, I hope that the ath10k ahb driver will support this one day.
[...]
> diff --git 
> a/target/linux/ipq806x/patches-4.9/852-ipq4019-pinctrl-Updated-various
> -Pin-definitions.patch 
> b/target/linux/ipq806x/patches-4.9/852-ipq4019-pinctrl-Updated-various
> -Pin-definitions.patch
> new file mode 100644
> index 0000000..4267d47
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/852-ipq4019-pinctrl-Updated-var
> +++ ious-Pin-definitions.patch
> @@ -0,0 +1,1332 @@
> +From fc6cf61517b8b4ab4678659936fc7572f699d6e7 Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Tue, 28 Mar 2017 14:00:00 +0530
> +Subject: [PATCH] ipq4019: pinctrl: Updated various Pin definitions
> +
> +Populate default values for various GPIO functions
> +
> +Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
>Please send this upstream to linux-gpio at vger.kernel.org.
>I'm saying this because it has become nearly impossible to merge this stuff
into the kernel without the right domain in the email-address.
 [Ram]: it will be upstreamed soon.

> diff --git 
> a/target/linux/ipq806x/patches-4.9/854-net-phy-Export-phy-statemachine
> -API.patch 
> b/target/linux/ipq806x/patches-4.9/854-net-phy-Export-phy-statemachine
> -API.patch
> new file mode 100644
> index 0000000..2bb213d
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/854-net-phy-Export-phy-statemac
> +++ hine-API.patch
> @@ -0,0 +1,36 @@
> +From 69f50b2694e9e9a3e927c21b900112d7adb581c9 Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Tue, 28 Mar 2017 14:00:00 +0530
> +Subject: [PATCH 2/5] net/phy: Export phy statemachine API
> +
> +When any port with link-detection enabled changes group we need to 
> +start/stop phy detection with phy_start_machine() and 
> +phy_stop_machine() at runtime for those specific ports
> +
> +Signed-off-by :Ram Chandra Jangir <rjangir at codeaurora.org>
> +---
> + drivers/net/phy/phy.c | 2 ++
> + 1 file changed, 2 insertions(+)
> +
> +diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 
> +00fe2ab..4058d5c 100644
> +--- a/drivers/net/phy/phy.c
> ++++ b/drivers/net/phy/phy.c
> +@@ -650,6 +650,7 @@ void phy_start_machine(struct phy_device *phydev)  
> +{
> +	queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 
> +HZ);  }
> ++EXPORT_SYMBOL(phy_start_machine);
> +
> + /**
> +  * phy_trigger_machine - trigger the state machine to run @@ -687,6 
> ++688,7 @@ void phy_stop_machine(struct phy_device *phydev)
> +		phydev->state = PHY_UP;
> +	mutex_unlock(&phydev->lock);
> + }
> ++EXPORT_SYMBOL(phy_stop_machine);
>Hm, accessing the phy code internals is bound to break.
>It would be much better to remove the VLAN code from the essedma and ar40xx
phy code and just let the kernel deal with it.
[Ram]: I needed to export this, since I enabled edma as module, and will
drop this in next patch.

> diff --git 
> a/target/linux/ipq806x/patches-4.9/855-clk-qcom-ipq4019-add-ess-reset.
> patch 
> b/target/linux/ipq806x/patches-4.9/855-clk-qcom-ipq4019-add-ess-reset.
> patch
> new file mode 100644
> index 0000000..d33b8ab
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/855-clk-qcom-ipq4019-add-ess-re
> +++ set.patch
> @@ -0,0 +1,58 @@
> +From 7efb48a343ca368f83359d3a7087dd5ab25a283a Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Tue, 28 Mar 2017 22:35:33 +0530
> +Subject: [PATCH 5/8] clk: qcom: ipq4019: add ess reset
> +
> +Added the ESS reset in IPQ4019 GCC.
> +
> +Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
> +---
>Please send this upstream.
[Ram]: it will be upstreamed soon.

> diff --git 
> a/target/linux/ipq806x/patches-4.9/857-ipq40xx-Fix-mdio-driver-to-work
> -with-IPQ40xx-SoC.patch 
> b/target/linux/ipq806x/patches-4.9/857-ipq40xx-Fix-mdio-driver-to-work
> -with-IPQ40xx-SoC.patch
> new file mode 100644
> index 0000000..bb72169
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/857-ipq40xx-Fix-mdio-driver-to-
> +++ work-with-IPQ40xx-SoC.patch
> @@ -0,0 +1,100 @@
> +From 1d8433be4af4a5862b8805a5668d404bd6fde945 Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Tue, 28 Mar 2017 22:32:07 +0530
> +Subject: [PATCH] ipq40xx: Fix mdio driver to work with IPQ40xx SoC
> +
> +- Add phy-reset-gpio support in probe function
> +- Add proper assignment of mii_bus read/write operations
> +
> +Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
> +---
> +diff --git a/drivers/net/phy/mdio-ipq40xx.c 
> +b/drivers/net/phy/mdio-ipq40xx.c index 335d531..e969f06 100644
> +--- a/drivers/net/phy/mdio-ipq40xx.c
> ++++ b/drivers/net/phy/mdio-ipq40xx.c
> +@@ -22,6 +22,7 @@
> + #include <linux/of_mdio.h>
> + #include <linux/phy.h>
> + #include <linux/platform_device.h>
> ++#include <linux/of_gpio.h>
> +
> + #define MDIO_CTRL_0_REG		0x40
> + #define MDIO_CTRL_1_REG		0x44
> +@@ -122,11 +123,60 @@ static int ipq40xx_mdio_write(struct mii_bus *bus,
int mii_id, int regnum,
> +	return 0;
> + }
> +
> ++static int ipq40xx_phy_reset(struct platform_device *pdev) {
> ++	struct device_node *mdio_node;
> ++	int phy_reset_gpio_number;
> ++	int ret;
> ++
> ++	mdio_node = of_find_node_by_name(NULL, "mdio");
> ++	if (!mdio_node) {
> ++		dev_err(&pdev->dev, "Could not find mdio node\n");
> ++		return -ENOENT;
> ++	}
> ++
> ++	ret = of_get_named_gpio(mdio_node, "phy-reset-gpio", 0);
> ++	if (ret < 0) {
> ++		dev_err(&pdev->dev, "Could not find phy-reset-gpio\n");
> ++		return ret;
>This could break existing configurations. Please add a check that would
skip the error in case the "phy-reset-gpio" property isn't available.
[Ram]: This is required to reset via gpio, will skip if this property is not
available/defined in next patch version.

[...]
> + static int ipq40xx_mdio_probe(struct platform_device *pdev)  {
> +	struct ipq40xx_mdio_data *am;
> +	struct resource *res;
> +-	int i;
> ++	int i, ret;
> ++
> ++	ret = ipq40xx_phy_reset(pdev);
> ++	if (ret) {
> ++		dev_err(&pdev->dev, "Could not find qca8075 reset gpio\n");
> ++		return ret;
> ++	}
> diff --git 
> a/target/linux/ipq806x/patches-4.9/858-arm-dts-Add-ess-switch-device-f
> or-IPQ4019.patch 
> b/target/linux/ipq806x/patches-4.9/858-arm-dts-Add-ess-switch-device-f
> or-IPQ4019.patch
> new file mode 100644
> index 0000000..4598451
> --- /dev/null
> +++ b/target/linux/ipq806x/patches-4.9/858-arm-dts-Add-ess-switch-devi
> +++ ce-for-IPQ4019.patch
> @@ -0,0 +1,486 @@
> +From 4842020af3b39ce8c7c9a92de106d8fffd92b7c0 Mon Sep 17 00:00:00 
> +2001
> +From: Ram Chandra Jangir <rjangir at codeaurora.org>
> +Date: Tue, 28 Mar 2017 14:00:00 +0530
> +Subject: [PATCH] arm: dts: Add ess switch device for IPQ4019
> +
> +- Update ipq4019 dts nodes for mdio interface, ess-switch
> +   and edma driver.
> +- Update dt documentation for qca-ess ethernet subsystem
> +
> +Signed-off-by: xiaofeis <xiaofeis at codeaurora.org>
> +Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
> +---
> +diff --git a/Documentation/devicetree/bindings/net/qca-ess.txt 
> +b/Documentation/devicetree/bindings/net/qca-ess.txt
> +new file mode 100644
> +index 0000000..c192774
> +--- /dev/null
> ++++ b/Documentation/devicetree/bindings/net/qca-ess.txt
> +@@ -0,0 +1,107 @@
> ++QCA Ethernet Subsystem
> ++----------------------
> ++
> ++This driver adds support for the Ethernet subsystem
> ++
> ++1. QCA Ethernet DMA
> ++----------------------
> ++
> ++Required properties:
> ++  - compatible = "qcom,ess-edma";
> ++
> ++Optional properties:
> ++
> ++Example:
> ++    edma at c080000 {
> ++	compatible = "qcom,ess-edma";
> ++	reg = <0xc080000 0x8000>;
> ++	qcom,page-mode = <0>;
> ++	qcom,rx_head_buf_size = <1540>;
rx-head-buf-size?
> ++	qcom,port_id_wan = <0x5>;
>port_id_wan? port-id-wan ?
[Ram]: This is port id for wan port, example: here for dakota, port 5 is the
WAN port.

>That said, edma's custom VLAN code stuff should go...
> ++	interrupts = <0 65 1>,
> ++		   <0 66 1>,
> ++		   <0 67 1>,
[...]
> ++   };
> ++
> ++2. QCA Ethernet Switch
> ++----------------------
> ++
> ++Required properties:
> ++  - compatible = "qcom,ess-switch";
> ++
> ++Optional properties:
> ++
> ++Example:
> ++
> ++	ess-switch at c000000 {
> ++		compatible = "qcom,ess-switch";
> ++		reg = <0xc000000 0x80000>; /* 512KB */
> ++		switch_access_mode = "local bus";
>switch-access-mode?
[Ram]: there are some boards which uses different switch, we use mdio bus so
here to identify whether to use mdio bus or not.

> ++		resets = <&gcc ESS_RESET>;
> ++		switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
> ++		switch_lan_bmp = <0x1e>; /* lan port bitmap */
> ++		switch_wan_bmp = <0x20>; /* wan port bitmap */
>switch_cpu_bmp, switch_lan_bmp, switch_wan_bmp can be removed.
>Userspace should take care of setting up the VLAN.
[Ram]: Userspace can always change the VLANs, but these are default values ,
It is not good to declare these default values as macros inside driver code
instead 
                it is good to add them in dts file, it will also help to
configure the different default values based on the different boards.
> ++	};
> ++
> ++3. QCA Ethernet PHY mode
> ++-------------------------
> ++
> ++Required properties:
> ++  - compatible = "qcom,ess-psgmii";
> ++
> ++Optional properties:
> ++
> ++Example:
> ++
> ++	ess-psgmii at 98000 {
> ++		compatible = "qcom,ess-psgmii";
> ++		reg = <0x98000 0x800>; /* 2k */
> ++		psgmii_access_mode = "local bus";
>psgmii-access-mode?
[Ram]: same as switch-access-mode.

> ++	};
> ++
> ++4. MDIO Interface
> ++----------------------
> ++
> ++Required properties:
> ++  - compatible = "qcom,ipq4019-mdio";
> ++
> ++Optional properties:
> ++
> ++Example:
> ++
> ++	mdio at 90000 {
> ++		#address-cells = <1>;
> ++		#size-cells = <1>;
>size-cells = <0>;  

> ++		compatible = "qcom,ipq4019-mdio";
> ++		reg = <0x90000 0x64>;
> ++	};
> ++
> +diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts 
> +b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
> +index 0d92f1b..ec75396 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
> ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
> +@@ -18,5 +18,13 @@
> +
> + / {
> +	model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
> +-
> ++		soc {
> ++			mdio at 90000 {
> ++			status = "ok";
> ++			pinctrl-0 = <&mdio_pins>;
> ++			pinctrl-names = "default";
> ++			bias-disable;
> ++			phy-reset-gpio = <&tlmm 59 0>;
> ++		};
> ++        };
>This looks like a whitespace issue in the patch?
[Ram]: Thanks, will fix in next patch.

> +diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi 
> +b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> +index b68fc1a..1aee3b1 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
> +@@ -161,5 +182,56 @@
> +		watchdog at b017000 {
> +			status = "ok";
> +		};
> ++
> ++		ess-switch at c000000 {
> ++			status = "ok";
> ++			switch_mac_mode = <0x0>; /* mac mode for RGMII RMII
*/
> ++			switch_initvlas = <
> ++				0x0007c 0x54 /* PORT0_STATUS */
> ++			>;
> ++			led_source at 0 {
> ++				led = <0x3>;     /*led number */
> ++				source = <0x1>;  /*source id 1 */
> ++				mode = "normal"; /*on,off,blink,normal */
> ++				speed = "all";   /*10M,100M,1000M,all */
> ++				freq = "auto";   /*2Hz,4Hz,8Hz,auto*/
> ++			};
[...]
>Just a heads up: I had to add a "gpio-controller" to the ar40xx driver.
>This was necessary, because the AVM FritzBox 4040 uses one of the switch
LEDs to enable the power of both USB ports.
>(Off-topic: Yes, the usb power will "blink" for a few seconds during boot
:-D ) 

> +	};
> + };

> +diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi 
> +b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +index 7013c85..9793611 100644
> +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +@@ -26,8 +26,8 @@
> +	aliases {
> +		spi0 = &spi_0;
> +		i2c0 = &i2c_0;
> +-		ethernet0 = &gmac0;
> +-		ethernet1 = &gmac1;
> ++		ethernet0 = "/soc/edma/gmac0";
> ++		ethernet1 = "/soc/edma/gmac1";
> +	};
>Any reason why you deleted the labels? The FB4040 will be doing a lookup
based on the labels, so I hate to see them go.
[Ram]: It is same thing in different way, will update  back the labels in
next patch.

> +	cpus {
> +@@ -325,43 +325,47 @@
> +
> +		mdio at 90000 {
> +			#address-cells = <1>;
> +-			#size-cells = <0>;
> ++			#size-cells = <1>;
#size-cells = <0>;
>you don't have any size cells in the subnodes.
[Ram]: Yes, you are right. It seems 0 is better. will add it in next patch. 

> +			compatible = "qcom,ipq4019-mdio";
> +			reg = <0x90000 0x64>;
> +			status = "disabled";
> +
> +-			ethernet-phy at 0 {
> ++			phy0: ethernet-phy at 0 {
> +				reg = <0>;
>There's only the address parameter. no size.
[Ram]:  These are five phy devices with phy address from 0 to 4. These are
added into children leaf under mdio bus leaf.

> +			};
[...]
> +@@ -378,57 +384,58 @@
> +			compatible = "qcom,ess-edma";
> +			reg = <0xc080000 0x8000>;
> +			qcom,page-mode = <0>;
> +-			qcom,rx_head_buf_size = <1540>;
> +-			qcom,mdio_supported;
> +-			qcom,poll_required = <1>;
> +-			qcom,num_gmac = <2>;
> +-			interrupts = <0  65 IRQ_TYPE_EDGE_RISING
[...]
> +-				      0 255 IRQ_TYPE_EDGE_RISING>;
> ++			qcom,rx-head-buf-size = <1540>;
> ++			qcom,num-gmac = <2>;
>Technically, the essedma has only one. See the VLAN comment above.
[Ram]:  There are two groups in dakota boards, one is LAN group and second
is WAN group.
                num-gmac tells number of groups to be created, which is
currently set to 2.

> ++			qcom,mdio-supported;
> ++			interrupts = <0  65 IRQ_TYPE_EDGE_RISING>,
> ++				      <0  66 IRQ_TYPE_EDGE_RISING>,
[...]
> ++				      <0 255 IRQ_TYPE_EDGE_RISING>;
> +
> +			status = "disabled";
> +
> +-			gmac0: gmac0 {
> ++			gmac0 {
>please keep the label.
[Ram]: ok.
> +				local-mac-address = [00 00 00 00 00 00];
> +-				vlan_tag = <1 0x1f>;
> ++				qcom,phy-mdio-addr = <4>;
> ++				qcom,poll-required = <1>;
> ++				qcom,poll-required-dynamic = <1>;
> ++				qcom,forced-speed = <1000>;
> ++				qcom,forced-duplex = <1>;
> ++				vlan-tag = <2 0x20>;
>Ideally, fixed-link should be used instead of custom "force-speed".
[Ram]: I think both should be same, just different way to define it.
>The custom VLAN stuff ( phy-mdio-addr, vlan_tag) should be removed.
>The userspace will deal with setting up the switch.
[Ram]:  User can setup the switch but here are some default values
populated.
                Vlan tag for WAN group is 2, for LAN group is 1. This is
pre-determined and populated with default values here. 
           This can be changed from user space too. phy-mdio-addr is for
enabling WAN link detection. 

[...]
> +--
> +2.7.2
> diff --git a/target/linux/ipq806x/profiles/00-default.mk 
> b/target/linux/ipq806x/profiles/00-default.mk
> index 9baa24f..c4b58a2 100644
> --- a/target/linux/ipq806x/profiles/00-default.mk
> +++ b/target/linux/ipq806x/profiles/00-default.mk
> @@ -1,7 +1,8 @@
>  define Profile/Default
>    NAME:=Default Profile
>    PRIORITY:=1
> -  PACKAGES:=ath10k-firmware-qca99x0 ath10k-firmware-qca988x 
> ath10k-firmware-qca9984
> +  PACKAGES:=ath10k-firmware-qca99x0 ath10k-firmware-qca988x
ath10k-firmware-qca9984 \
> +	    ath10k-firmware-qca4019

>Currently, ath10k-firmware-qca4019 gets added automatically by the ipq-wifi
board package: 
<https://github.com/lede-project/source/blob/master/package/firmware/ipq-wif
i/Makefile>

>As this is supposed to be the reference board. the data should be part of
ath10k-firmware's board-2.bin. However, other platforms aren't that lucky.

>This issue has been reported to ath10k-devel and linux-wireless:
<https://www.mail-archive.com/ath10k@lists.infradead.org/msg06154.html>

>And it would be nice to have a official solution for this.
[Ram]: I did not use ipq-wifi during validation. 
                 Currently ath10k needs calibration data which are stored in
ART partition. We cannot have common board-2.bin for all boards as
calibration data will differ per board.
                 Hence use board-2.bin from Kvalo's tree & use caldata from
ART partition.
                 This way we will be able to use the latest firmware
releases from kvalo's tree without re-genrating the new board-2.bin file and
checking in to git.

Once again Thanks for your review comments and time.

Thanks,
Ram




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