[LEDE-DEV] rt5350-spi rt2880-spi question
Giuseppe Lippolis
giu.lippolis at gmail.com
Sat Dec 10 10:42:41 PST 2016
Dear All,
I'd like to enable all the function available to my DWR-512.
Currently on the board is mounted the SLIC device Si3210.
This device is controlled by the spi interface.
I checked that its spi interface is connected to the spi master of the
rt5350 on the cs1.
Running the following cmd in the uboot:
RT5350 # nm 10000060
10000b54: 00400080 ? 00000080
RT5350 # md 10000b00
10000b00: 00000000 00000000 00000000 00000000 ................
10000b10: 00000152 00000001 00000000 00000000 R...............
10000b20: 000000f7 00000000 00000000 00000000 ................
10000b30: 00000000 00000000 00000000 00000000 ................
10000b40: 00000000 00000000 00000000 00000000 ................
10000b50: 00000152 00000001 00000000 00000000 R...............
10000b60: 000000ff 00000000 00000000 00000000 ................
10000b70: 00000000 00000000 00000000 00000000 ................
10000b80: 00000000 00000000 00000000 00000000 ................
10000b90: 00000000 00000000 00000000 00000000 ................
10000ba0: 00000000 00000000 00000000 00000000 ................
10000bb0: 00000000 00000000 00000000 00000000 ................
10000bc0: 00000000 00000000 00000000 00000000 ................
10000bd0: 00000000 00000000 00000000 00000000 ................
10000be0: 00000000 00000000 00000000 00000000 ................
10000bf0: 80000003 00000000 00000000 00000000 ................
RT5350 # nm 10000b54
10000b54: 00000001 ? 3
10000b54: 00000001 ? 2
I'm able to see the clock burst and the cs1 moving on the proper Si3210
pins.
Therefore I'd like to enable the second spi channel in my dts.
But here I found something strange.
Currently the included rt5350.dtsi have the following structure:
palmbus: palmbus at 10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
[ ... ]
spi0: spi at b00 {
compatible = "ralink,rt5350-spi",
"ralink,rt2880-spi";
reg = <0xb00 0x40>;
resets = <&rstctrl 18>;
reset-names = "spi";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
status = "disabled";
};
spi1: spi at b40 {
compatible = "ralink,rt5350-spi",
"ralink,rt2880-spi";
reg = <0xb40 0x60>;
resets = <&rstctrl 18>;
reset-names = "spi";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_cs1>;
status = "disabled";
};
[ ... ]
};
and in my DWR-512-B.dts:
#include "rt5350.dtsi"
&spi0 {
status = "okay";
mx25l6405d at 0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
m25p,fast-read;
partition at 0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
[ ... ]
config: partition at 7f0000 {
label = "config";
reg = <0x7f0000 0x10000>;
};
};
};
>From what I understood sufing online, to enable the second chipselect
channel I need to add the following section into the &spi0 section of my
DWR-512-B.dts file.
spidev at 1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spidev";
reg = <1>;
spi-max-frequency = <30000000>;
};
Is this correct? Or shall I use the spi1 section of the rt5350.dtsi?
Is the spi1 section in the rt5350.dtsi correct?
(from the rt5350 datasheet, it is clear that the device have only one master
with two cs channel).
Thanks,
Bye.
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