[openwrt/openwrt] realtek: mdio: drop driver lock
LEDE Commits
lede-commits at lists.infradead.org
Sat Jan 24 14:41:33 PST 2026
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/48b4160329367579a20e51db4823b94cc8c3536d
commit 48b4160329367579a20e51db4823b94cc8c3536d
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Tue Jan 13 22:15:15 2026 +0100
realtek: mdio: drop driver lock
The Realtek mdio driver does not need to track a separate lock.
Rely on the default kernel mdio bus lock instead.
Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21529
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../drivers/net/mdio/mdio-realtek-otto.c | 103 ++-------------------
1 file changed, 9 insertions(+), 94 deletions(-)
diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
index deaf1485af..9ff2a91a17 100644
--- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
@@ -166,7 +166,6 @@
* reimplemented. For now it should be sufficient.
*/
-DEFINE_MUTEX(rtmdio_lock);
struct rtmdio_bus_priv {
const struct rtmdio_config *cfg;
@@ -229,16 +228,12 @@ static int rtmdio_838x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
u32 park_page = 0x1f;
int err;
- mutex_lock(&rtmdio_lock);
-
sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
err = rtmdio_838x_run_cmd(RTMDIO_838X_CMD_READ_C22);
if (!err)
*val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
@@ -246,18 +241,12 @@ static int rtmdio_838x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
static int rtmdio_838x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
u32 park_page = 0x1f;
- int err;
-
- mutex_lock(&rtmdio_lock);
sw_w32(BIT(port), RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, val << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
- err = rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C22);
- mutex_unlock(&rtmdio_lock);
-
- return err;
+ return rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C22);
}
/* Read an mmd register of a PHY */
@@ -265,8 +254,6 @@ static int rtmdio_838x_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val)
{
int err;
- mutex_lock(&rtmdio_lock);
-
sw_w32(1 << port, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(addr << 16 | reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
@@ -274,27 +261,18 @@ static int rtmdio_838x_read_mmd_phy(u32 port, u32 addr, u32 reg, u32 *val)
if (!err)
*val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
/* Write to an mmd register of a PHY */
static int rtmdio_838x_write_mmd_phy(u32 port, u32 addr, u32 reg, u32 val)
{
- int err;
-
- mutex_lock(&rtmdio_lock);
-
sw_w32(1 << port, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff0000, val << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
sw_w32_mask(0x1f << 16, addr << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
sw_w32_mask(0xffff, reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
- err = rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C45);
-
- mutex_unlock(&rtmdio_lock);
- return err;
+ return rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C45);
}
/* RTL839x specific MDIO functions */
@@ -310,8 +288,6 @@ static int rtmdio_839x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
int err;
u32 v;
- mutex_lock(&rtmdio_lock);
-
sw_w32_mask(0xffff0000, port << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
v = reg << 5 | page << 10 | ((page == 0x1fff) ? 0x1f : 0) << 23;
sw_w32(v, RTMDIO_839X_PHYREG_ACCESS_CTRL);
@@ -320,29 +296,21 @@ static int rtmdio_839x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
if (!err)
*val = sw_r32(RTMDIO_839X_PHYREG_DATA_CTRL) & 0xffff;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
static int rtmdio_839x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
- int err;
u32 v;
- mutex_lock(&rtmdio_lock);
-
sw_w32(BIT_ULL(port), RTMDIO_839X_PHYREG_PORT_CTRL);
sw_w32(BIT_ULL(port) >> 32, RTMDIO_839X_PHYREG_PORT_CTRL + 4);
sw_w32_mask(0xffff0000, val << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
v = reg << 5 | page << 10 | ((page == 0x1fff) ? 0x1f : 0) << 23;
sw_w32(v, RTMDIO_839X_PHYREG_ACCESS_CTRL);
sw_w32(0x1ff, RTMDIO_839X_PHYREG_CTRL);
- err = rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C22);
- mutex_unlock(&rtmdio_lock);
-
- return err;
+ return rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C22);
}
/* Read an mmd register of the PHY */
@@ -350,35 +318,24 @@ static int rtmdio_839x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
{
int err;
- mutex_lock(&rtmdio_lock);
-
sw_w32_mask(0xffff << 16, port << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_839X_PHYREG_MMD_CTRL);
err = rtmdio_839x_run_cmd(RTMDIO_839X_CMD_READ_C45);
if (!err)
*val = sw_r32(RTMDIO_839X_PHYREG_DATA_CTRL) & 0xffff;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
/* Write to an mmd register of the PHY */
static int rtmdio_839x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
{
- int err;
-
- mutex_lock(&rtmdio_lock);
-
sw_w32(BIT_ULL(port), RTMDIO_839X_PHYREG_PORT_CTRL);
sw_w32(BIT_ULL(port) >> 32, RTMDIO_839X_PHYREG_PORT_CTRL + 4);
sw_w32_mask(0xffff << 16, val << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_839X_PHYREG_MMD_CTRL);
- err = rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C45);
-
- mutex_unlock(&rtmdio_lock);
- return err;
+ return rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C45);
}
/* RTL930x specific MDIO functions */
@@ -391,20 +348,14 @@ static int rtmdio_930x_run_cmd(int cmd)
static int rtmdio_930x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
- int err;
u32 v;
- mutex_lock(&rtmdio_lock);
-
sw_w32(BIT(port), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff << 16, val << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15 | BIT(2);
sw_w32(v, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1);
- err = rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C22);
- mutex_unlock(&rtmdio_lock);
-
- return err;
+ return rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C22);
}
static int rtmdio_930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
@@ -412,8 +363,6 @@ static int rtmdio_930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
int err;
u32 v;
- mutex_lock(&rtmdio_lock);
-
sw_w32_mask(0xffff << 16, port << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15;
sw_w32(v, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1);
@@ -421,26 +370,17 @@ static int rtmdio_930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
if (!err)
*val = (sw_r32(RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
- mutex_unlock(&rtmdio_lock);
-
return err;
}
/* Write to an mmd register of the PHY */
static int rtmdio_930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
{
- int err;
-
- mutex_lock(&rtmdio_lock);
-
sw_w32(BIT(port), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff << 16, val << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_3);
- err = rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C45);
-
- mutex_unlock(&rtmdio_lock);
- return err;
+ return rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C45);
}
/* Read an mmd register of the PHY */
@@ -448,16 +388,12 @@ static int rtmdio_930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
{
int err ;
- mutex_lock(&rtmdio_lock);
-
sw_w32_mask(0xffff << 16, port << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_3);
err = rtmdio_930x_run_cmd(RTMDIO_930X_CMD_READ_C45);
if (!err)
*val = (sw_r32(RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
- mutex_unlock(&rtmdio_lock);
-
return err;
}
@@ -471,36 +407,26 @@ static int rtmdio_931x_run_cmd(int cmd)
static int rtmdio_931x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
- int err;
-
- mutex_lock(&rtmdio_lock);
sw_w32(0, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2);
sw_w32(0, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2 + 4);
sw_w32_mask(0, BIT(port % 32), RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2 + (port / 32) * 4);
sw_w32_mask(0xffff, val, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3);
sw_w32(reg << 6 | page << 11, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0);
sw_w32(0x1ff, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_1);
- err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C22);
-
- mutex_unlock(&rtmdio_lock);
- return err;
+ return rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C22);
}
static int rtmdio_931x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
{
int err;
- mutex_lock(&rtmdio_lock);
-
sw_w32(port << 5, RTMDIO_931X_SMI_INDRT_ACCESS_BC_CTRL);
sw_w32(reg << 6 | page << 11, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0);
err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_READ_C22);
if (!err)
*val = sw_r32(RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3) >> 16;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
@@ -509,37 +435,26 @@ static int rtmdio_931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
{
int err;
- mutex_lock(&rtmdio_lock);
-
sw_w32(port << 5, RTMDIO_931X_SMI_INDRT_ACCESS_BC_CTRL);
sw_w32(devnum << 16 | regnum, RTMDIO_931X_SMI_INDRT_ACCESS_MMD_CTRL);
err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_READ_C45);
if (!err)
*val = sw_r32(RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3) >> 16;
- mutex_unlock(&rtmdio_lock);
-
return err;
}
/* Write to an mmd register of the PHY */
static int rtmdio_931x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
{
- u64 mask;
- int err;
+ u64 mask = BIT_ULL(port);
- mutex_lock(&rtmdio_lock);
-
- mask = BIT_ULL(port);
sw_w32((u32)mask, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2);
sw_w32((u32)(mask >> 32), RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_2 + 4);
sw_w32_mask(0xffff, val, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3);
sw_w32(devnum << 16 | regnum, RTMDIO_931X_SMI_INDRT_ACCESS_MMD_CTRL);
- err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C45);
-
- mutex_unlock(&rtmdio_lock);
- return err;
+ return rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C45);
}
/* These are the core functions of our new Realtek SoC MDIO bus. */
More information about the lede-commits
mailing list