[openwrt/openwrt] rockchip: add HINLINK H28K support
LEDE Commits
lede-commits at lists.infradead.org
Mon Jan 19 05:46:35 PST 2026
dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e8997e7e037742d03fa16650824e0daa9b0a2e3a
commit e8997e7e037742d03fa16650824e0daa9b0a2e3a
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Wed Dec 10 18:10:29 2025 +0800
rockchip: add HINLINK H28K support
Hardware:
- RK3528 SoC
- 1x USB 2.0
- 8/32GB eMMC
- 1/2/4GB LPDDR4
- 1x 1GbE RTL8111H
- 1x 1GbE RTL8211F
- MicroSD card slot
Installation:
Use dd or balenaEtcher to flash the firmware.
Note:
The RK3528 SoC does not support MSI-X, so it can't
adjust the interrupts of r8169 to other CPU cores.
Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
.../rockchip/armv8/base-files/etc/board.d/01_leds | 4 +
.../armv8/base-files/etc/board.d/02_network | 2 +
.../etc/hotplug.d/net/40-net-smp-affinity | 5 +-
target/linux/rockchip/image/armv8.mk | 12 +
.../101-arm64-dts-rockchip-Add-HINLINK-H28K.patch | 353 +++++++++++++++++++++
...-dts-rockchip-add-led-aliases-for-HINLINK.patch | 23 ++
6 files changed, 398 insertions(+), 1 deletion(-)
diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
index b37eaef9c9..f098f55e2c 100644
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
@@ -39,6 +39,10 @@ friendlyarm,nanopi-r76s)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
;;
+hinlink,h28k)
+ ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1"
+ ucidef_set_led_netdev "lan" "LAN" "amber:lan" "eth0"
+ ;;
radxa,e20c)
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
index f5796bb8b1..ea4a2cc945 100644
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
@@ -23,6 +23,7 @@ rockchip_setup_interfaces()
friendlyarm,nanopc-t6|\
friendlyarm,nanopi-r5c|\
friendlyarm,nanopi-r76s|\
+ hinlink,h28k|\
lunzn,fastrhino-r66s|\
radxa,e20c|\
radxa,e25|\
@@ -77,6 +78,7 @@ rockchip_setup_macs()
friendlyarm,nanopi-r2c|\
friendlyarm,nanopi-r2s|\
friendlyarm,nanopi-r76s|\
+ hinlink,h28k|\
linkease,easepi-r1|\
lunzn,fastrhino-r66s)
wan_mac=$(macaddr_generate_from_mmc_cid mmcblk0)
diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
index e758605ca7..d273f53a4b 100644
--- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
+++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity
@@ -34,7 +34,6 @@ friendlyarm,nanopi-r3s|\
friendlyarm,nanopi-r5c|\
linkease,easepi-r1|\
lunzn,fastrhino-r66s|\
-radxa,e20c|\
radxa,e25|\
sinovoip,rk3568-bpi-r2pro)
set_interface_core 2 "eth0"
@@ -69,6 +68,10 @@ friendlyarm,nanopi-r6s)
set_interface_core 20 "eth1"
set_interface_core 40 "eth2"
;;
+hinlink,h28k|\
+radxa,e20c)
+ set_interface_core 2 "eth0"
+ ;;
radxa,rock-5a|\
radxa,rock-5c)
set_interface_core 10 "eth1"
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index 29ec6de664..b9f1fcab0e 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -180,6 +180,18 @@ define Device/friendlyarm_nanopi-r76s
endef
TARGET_DEVICES += friendlyarm_nanopi-r76s
+define Device/hinlink_h28k
+ $(Device/rk3528)
+ DEVICE_VENDOR := HINLINK
+ DEVICE_MODEL := H28K
+ DEVICE_ALT0_VENDOR := LinkStar
+ DEVICE_ALT0_MODEL := H28K
+ DEVICE_DTS := rk3528-hinlink-h28k
+ UBOOT_DEVICE_NAME := hinlink-h28k-rk3528
+ DEVICE_PACKAGES := kmod-r8169
+endef
+TARGET_DEVICES += hinlink_h28k
+
define Device/linkease_easepi-r1
$(Device/rk3568)
DEVICE_VENDOR := LinkEase
diff --git a/target/linux/rockchip/patches-6.12/101-arm64-dts-rockchip-Add-HINLINK-H28K.patch b/target/linux/rockchip/patches-6.12/101-arm64-dts-rockchip-Add-HINLINK-H28K.patch
new file mode 100644
index 0000000000..ea6be6fb9d
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/101-arm64-dts-rockchip-Add-HINLINK-H28K.patch
@@ -0,0 +1,353 @@
+From dca5896703826d0d5fadcc11ee755b83db705571 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus at jmu.edu.cn>
+Date: Mon, 1 Dec 2025 18:00:06 +0800
+Subject: [PATCH] arm64: dts: rockchip: Add HINLINK H28K
+
+The HINLINK H28K is a development board with the
+Rockchip RK3528 SoC. It has the following features:
+
+- 1x USB 2.0
+- 8/32GB eMMC
+- 1/2/4GB LPDDR4
+- MicroSD card slot
+- 1x 1GbE RTL8111H Ethernet
+- 1x 1GbE RTL8211F Ethernet
+
+Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
+---
+ arch/arm64/boot/dts/rockchip/Makefile | 1 +
+ .../boot/dts/rockchip/rk3528-hinlink-h28k.dts | 301 ++++++++++++++++++
+ 2 files changed, 302 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2f.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
+@@ -0,0 +1,318 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/pwm/pwm.h>
++#include "rk3528.dtsi"
++
++/ {
++ model = "HINLINK H28K";
++ compatible = "hinlink,h28k", "rockchip,rk3528";
++
++ aliases {
++ ethernet0 = &gmac1;
++ mmc0 = &sdhci;
++ mmc1 = &sdmmc;
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:1500000n8";
++ };
++
++ keys {
++ compatible = "adc-keys";
++ io-channels = <&saradc 0>;
++ io-channel-names = "buttons";
++ keyup-threshold-microvolt = <1800000>;
++ poll-interval = <100>;
++
++ button-boot {
++ label = "BOOT";
++ linux,code = <KEY_SETUP>;
++ press-threshold-microvolt = <0>;
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&lan_led>, <&wan_led>, <&work_led>;
++
++ led-0 {
++ color = <LED_COLOR_ID_AMBER>;
++ function = LED_FUNCTION_LAN;
++ gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "netdev";
++ };
++
++ led-1 {
++ color = <LED_COLOR_ID_BLUE>;
++ function = LED_FUNCTION_WAN;
++ gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "netdev";
++ };
++
++ led-2 {
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_STATUS;
++ gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "default-on";
++ };
++ };
++
++ vdd_0v9: regulator-0v9-vdd {
++ compatible = "regulator-fixed";
++ regulator-name = "vdd_0v9";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <900000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc_ddr: regulator-1v1-vcc-ddr {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1100000>;
++ regulator-max-microvolt = <1100000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc_1v8: regulator-1v8-vcc {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_1v8";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ vin-supply = <&vcc_3v3>;
++ };
++
++ vcc_3v3: regulator-3v3-vcc {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_3v3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc3v3_sd: regulator-3v3-vcc-sd {
++ compatible = "regulator-fixed";
++ gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdmmc_pwren_l>;
++ regulator-name = "vcc3v3_sd";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc_3v3>;
++ };
++
++ vcc5v0_sys: regulator-5v0-vcc-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vccio_sd: regulator-vccio-sd {
++ compatible = "regulator-gpio";
++ gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
++ regulator-name = "vccio_sd";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ states = <1800000 0x0>, <3300000 0x1>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vdd_arm: regulator-vdd-arm {
++ compatible = "pwm-regulator";
++ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
++ pwm-supply = <&vcc5v0_sys>;
++ regulator-name = "vdd_arm";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <746000>;
++ regulator-max-microvolt = <1201000>;
++ regulator-settling-time-up-us = <250>;
++ };
++
++ vdd_logic: regulator-vdd-logic {
++ compatible = "pwm-regulator";
++ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
++ pwm-supply = <&vcc5v0_sys>;
++ regulator-name = "vdd_logic";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <705000>;
++ regulator-max-microvolt = <1006000>;
++ regulator-settling-time-up-us = <250>;
++ };
++};
++
++&combphy {
++ status = "okay";
++};
++
++&cpu0 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu1 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu2 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu3 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&gmac1 {
++ clock_in_out = "output";
++ phy-handle = <&rgmii_phy>;
++ phy-mode = "rgmii-id";
++ phy-supply = <&vcc_3v3>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&rgmii_miim>,
++ <&rgmii_tx_bus2>,
++ <&rgmii_rx_bus2>,
++ <&rgmii_rgmii_clk>,
++ <&rgmii_rgmii_bus>;
++ status = "okay";
++};
++
++&gpu {
++ mali-supply = <&vdd_logic>;
++ status = "okay";
++};
++
++&mdio1 {
++ rgmii_phy: ethernet-phy at 1 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <0x1>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&gmac1_rstn_l>;
++ reset-assert-us = <20000>;
++ reset-deassert-us = <100000>;
++ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
++ };
++};
++
++&pcie {
++ pinctrl-names = "default";
++ pinctrl-0 = <&rtl8111hs_isolateb_l>;
++ reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc_3v3>;
++ status = "okay";
++};
++
++&pinctrl {
++ gmac {
++ gmac1_rstn_l: gmac1-rstn-l {
++ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ lan_led: lan-led {
++ rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ wan_led: wan-led {
++ rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ work_led: work-led {
++ rockchip,pins = <4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie {
++ rtl8111hs_isolateb_l: rtl8111hs-isolateb-l {
++ rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
++ };
++ };
++
++ sdmmc {
++ sdmmc_pwren_l: sdmmc-pwren-l {
++ rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
++ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm1m0_pins>;
++ status = "okay";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm2m0_pins>;
++ status = "okay";
++};
++
++&saradc {
++ vref-supply = <&vcc_1v8>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ cap-mmc-highspeed;
++ mmc-hs200-1_8v;
++ non-removable;
++ vmmc-supply = <&vcc_3v3>;
++ vqmmc-supply = <&vcc_1v8>;
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-sd-highspeed;
++ disable-wp;
++ sd-uhs-sdr104;
++ vmmc-supply = <&vcc3v3_sd>;
++ vqmmc-supply = <&vccio_sd>;
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0m0_xfer>;
++ status = "okay";
++};
++
++&usb2phy {
++ status = "okay";
++};
++
++&usb2phy_host {
++ phy-supply = <&vcc5v0_sys>;
++ status = "okay";
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
diff --git a/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch b/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch
new file mode 100644
index 0000000000..ce70a69575
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch
@@ -0,0 +1,23 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3528-hinlink-h28k.dts
+@@ -16,6 +16,11 @@
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ serial0 = &uart0;
++
++ led-boot = &led_work;
++ led-failsafe = &led_work;
++ led-running = &led_work;
++ led-upgrade = &led_work;
+ };
+
+ chosen {
+@@ -55,7 +60,7 @@
+ linux,default-trigger = "netdev";
+ };
+
+- led-2 {
++ led_work: led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_LOW>;
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