[openwrt/openwrt] uboot-airoha: an7583: fix wrong bits for SPI and SLIC clock

[LEDE Commits]

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2639c9ce472ba791cc933659e324c56d92cb6575

commit 2639c9ce472ba791cc933659e324c56d92cb6575
Author: Mikhail Kshevetskiy <mikhail.kshevetskiy at iopsys.eu>
AuthorDate: Tue Feb 17 11:40:39 2026 +0300

    uboot-airoha: an7583: fix wrong bits for SPI and SLIC clock
    
    The change was taken from commit
    https://github.com/Ansuel/openwrt/commit/907386ca6caa491067514643e522f33589463d07
    
    Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy at iopsys.eu>
    Link: https://github.com/openwrt/openwrt/pull/21984
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../305-clk-airoha-add-support-for-Airoha-AN7583-SoC-clock.patch    | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/boot/uboot-airoha/patches/305-clk-airoha-add-support-for-Airoha-AN7583-SoC-clock.patch b/package/boot/uboot-airoha/patches/305-clk-airoha-add-support-for-Airoha-AN7583-SoC-clock.patch
index f424bc2a10..5573af1b33 100644
--- a/package/boot/uboot-airoha/patches/305-clk-airoha-add-support-for-Airoha-AN7583-SoC-clock.patch
+++ b/package/boot/uboot-airoha/patches/305-clk-airoha-add-support-for-Airoha-AN7583-SoC-clock.patch
@@ -31,7 +31,7 @@ index 49dbca82135..68dca6ab202 100644
 +static const u32 gsw7583_base[] = { 540672000, 270336000, 400000000, 200000000 };
 +static const u32 emi7583_base[] = { 540672000, 480000000, 400000000, 300000000 };
 +static const u32 bus7583_base[] = { 600000000, 540672000, 480000000, 400000000 };
-+static const u32 spi7583_base[] = { 100000000, 12500000 };
++static const u32 spi7583_base[] = { 400000000, 12500000 };
 +static const u32 npu7583_base[] = { 666000000, 800000000, 720000000, 600000000 };
 +static const u32 crypto7583_base[] = { 540672000, 400000000 };
 +static const u32 emmc7583_base[] = { 150000000, 200000000 };
@@ -94,7 +94,7 @@ index 49dbca82135..68dca6ab202 100644
 +
 +		.base_reg = REG_SPI_CLK_FREQ_SEL,
 +		.base_bits = 1,
-+		.base_shift = 0,
++		.base_shift = 1,
 +		.base_values = slic_base,
 +		.n_base_values = ARRAY_SIZE(slic_base),
 +
@@ -110,7 +110,7 @@ index 49dbca82135..68dca6ab202 100644
 +
 +		.base_reg = REG_SPI_CLK_FREQ_SEL,
 +		.base_bits = 1,
-+		.base_shift = 1,
++		.base_shift = 0,
 +		.base_values = spi7583_base,
 +		.n_base_values = ARRAY_SIZE(spi7583_base),
 +