[openwrt/openwrt] realtek: mdio: convert RTL83xx reset to regmap

[LEDE Commits]

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7d222e69f7e527b4f598529a0b81b7c1b34daeea

commit 7d222e69f7e527b4f598529a0b81b7c1b34daeea
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Sun Feb 1 19:21:29 2026 +0100

    realtek: mdio: convert RTL83xx reset to regmap
    
    Make use of regmap in RTL83xx reset functions.
    
    Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
    Link: https://github.com/openwrt/openwrt/pull/21824
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c  | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
index 4936aa9ce8..0df984c94a 100644
--- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
@@ -662,7 +662,7 @@ static int rtmdio_838x_reset(struct mii_bus *bus)
 	int combo_phy;
 
 	/* Disable MAC polling for PHY config. It will be activated later in the DSA driver */
-	sw_w32(0, RTMDIO_838X_SMI_POLL_CTRL);
+	regmap_write(ctrl->map, RTMDIO_838X_SMI_POLL_CTRL, 0);
 
 	/*
 	 * Control bits EX_PHY_MAN_xxx have an important effect on the detection of the media
@@ -671,22 +671,24 @@ static int rtmdio_838x_reset(struct mii_bus *bus)
 	 * PHY driven, it must be a combo PHY and media detection is needed.
 	 */
 	combo_phy = ctrl->smi_bus[24] < 0 ? 0 : BIT(7);
-	sw_w32_mask(BIT(7), combo_phy, RTMDIO_838X_SMI_GLB_CTRL);
+	regmap_update_bits(ctrl->map, RTMDIO_838X_SMI_GLB_CTRL, BIT(7), combo_phy);
 
 	return 0;
 }
 
 static int rtmdio_839x_reset(struct mii_bus *bus)
 {
+	struct rtmdio_ctrl *ctrl = bus->priv;
+
 	return 0;
 
 	pr_debug("%s called\n", __func__);
 	/* BUG: The following does not work, but should! */
 	/* Disable MAC polling the PHY so that we can start configuration */
-	sw_w32(0x00000000, RTMDIO_839X_SMI_PORT_POLLING_CTRL);
-	sw_w32(0x00000000, RTMDIO_839X_SMI_PORT_POLLING_CTRL + 4);
+	regmap_write(ctrl->map, RTMDIO_839X_SMI_PORT_POLLING_CTRL, 0);
+	regmap_write(ctrl->map, RTMDIO_839X_SMI_PORT_POLLING_CTRL + 4, 0);
 	/* Disable PHY polling via SoC */
-	sw_w32_mask(1 << 7, 0, RTMDIO_839X_SMI_GLB_CTRL);
+	regmap_update_bits(ctrl->map, RTMDIO_839X_SMI_GLB_CTRL, BIT(7), 0);
 
 	/* Probably should reset all PHYs here... */
 	return 0;