[openwrt/openwrt] realtek: Work around missing 10g-qxgmii PHY mode

LEDE Commits lede-commits at lists.infradead.org
Tue Sep 30 11:12:32 PDT 2025


robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4481e0c91df72aed9f9f0ec3ab85f5d06d070fe7

commit 4481e0c91df72aed9f9f0ec3ab85f5d06d070fe7
Author: Sven Eckelmann <se at simonwunderlich.de>
AuthorDate: Tue Sep 30 09:06:57 2025 +0200

    realtek: Work around missing 10g-qxgmii PHY mode
    
    The current SerDes implementation for RTL931x handles 10G-QXGMII via the
    "usxgmii" PHY mode. This is not 100% correct because it is not a single
    port with 10G (max) but 4 ports with 2.5G each.
    
    To allow setting of the "10g-qxgmii" phy mode, just change the code for now
    to use the same codepaths as USXGMII. This has to be cleaned up further
    during the SerDes driver rewrites.
    
    Suggested-by: Markus Stockhausen <markus.stockhausen at gmx.de>
    Signed-off-by: Sven Eckelmann <se at simonwunderlich.de>
    Link: https://github.com/openwrt/openwrt/pull/20239
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c    | 6 ++++++
 .../linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c   | 5 +++++
 2 files changed, 11 insertions(+)

diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
index c805d954ec..a7f7e43d0e 100644
--- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
+++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
@@ -359,6 +359,12 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
 
 		if (of_get_phy_mode(dn, &interface))
 			interface = PHY_INTERFACE_MODE_NA;
+
+		if (interface == PHY_INTERFACE_MODE_10G_QXGMII) {
+			interface = PHY_INTERFACE_MODE_USXGMII;
+			dev_warn(priv->dev, "handle mode 10g-qsxgmii internally as usxgmii for now\n");
+		}
+
 		if (interface == PHY_INTERFACE_MODE_USXGMII)
 			priv->ports[pn].is2G5 = priv->ports[pn].is10G = true;
 		if (interface == PHY_INTERFACE_MODE_10GBASER)
diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
index 0f55bf51f4..ea28055c40 100644
--- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
@@ -1562,6 +1562,11 @@ static int rtmdio_probe(struct platform_device *pdev)
 			priv->interfaces[pn] = PHY_INTERFACE_MODE_NA;
 		dev_dbg(dev, "phy mode of port %d is %s\n", pn, phy_modes(priv->interfaces[pn]));
 
+		if (priv->interfaces[pn] == PHY_INTERFACE_MODE_10G_QXGMII) {
+			priv->interfaces[pn] = PHY_INTERFACE_MODE_USXGMII;
+			dev_warn(dev, "handle mode 10g-qsxgmii internally as usxgmii for now\n");
+		}
+
 		/*
 		 * TODO: The MDIO driver does not need any info about the SerDes. As long as
 		 * the PCS driver cannot completely control the SerDes, look up the information




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