[openwrt/openwrt] realtek: dts: rearrange mdio-bus below mdio-controller

LEDE Commits lede-commits at lists.infradead.org
Fri Sep 12 11:59:12 PDT 2025 

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/57b270684514bb98d35a111ed7e9dac0e9dfec44

commit 57b270684514bb98d35a111ed7e9dac0e9dfec44
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Mon Sep 8 05:53:16 2025 -0400

    realtek: dts: rearrange mdio-bus below mdio-controller
    
    The mdio controller got its own dts node with a dedicated bus node.
    Until now it still searches the phy nodes in the ethernet node.
    
    Change the driver so it searches the nodes at the right location.
    For this to work move the phy nodes in all dts/dtsi over to the new
    bus node. Use the following replacement rule:
    
    Replace old full declaration
    
    &ethernet0 {
      mdio-bus {
        ...
      };
    };
    
    and old abbreviated declaration
    
    &mdio {
      ...
    };
    
    simply with the new declaration
    
    &mdio_bus0 {
      ...
    };
    
    Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
    Link: https://github.com/openwrt/openwrt/pull/19986
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts |  31 ++---
 .../realtek/dts/rtl8380_engenius_ews2910p.dtsi     |  31 ++---
 target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi  |  31 ++---
 .../linux/realtek/dts/rtl8380_linksys_lgs310c.dts  |  29 ++--
 .../linux/realtek/dts/rtl8380_netgear_gigabit.dtsi |  25 ++--
 .../realtek/dts/rtl8380_netgear_gs110tpp-v1.dts    |   2 +-
 .../realtek/dts/rtl8380_netgear_gs110tup-v1.dts    |   2 +-
 .../realtek/dts/rtl8380_netgear_gs310tp-v1.dts     |   2 +-
 .../dts/rtl8380_panasonic_m8eg-pn28080k.dts        |  29 ++--
 .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts      |   2 +-
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi |  25 ++--
 .../realtek/dts/rtl8382_allnet_all-sg8208m.dts     |  25 ++--
 .../realtek/dts/rtl8382_apresia_aplgs120gtss.dts   |  53 +++----
 .../realtek/dts/rtl8382_d-link_dgs-1210-10p.dts    |  31 ++---
 .../realtek/dts/rtl8382_d-link_dgs-1210-16.dts     |  49 +++----
 .../realtek/dts/rtl8382_d-link_dgs-1210-20.dts     |  49 +++----
 .../realtek/dts/rtl8382_d-link_dgs-1210-26.dts     |  67 ++++-----
 .../dts/rtl8382_d-link_dgs-1210-28_common.dtsi     |  67 ++++-----
 target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi |   2 +-
 target/linux/realtek/dts/rtl8382_hpe_1920.dtsi     |  53 +++----
 .../linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts  |  47 +++----
 .../linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts |  61 ++++----
 .../dts/rtl8382_panasonic_m16eg-pn28160k.dts       |  44 +++---
 .../dts/rtl8382_panasonic_m24eg-pn28240k.dts       |  62 ++++-----
 .../realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts  |  61 ++++----
 .../linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts  |   2 +-
 .../realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts     |   2 +-
 .../linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts |   2 +-
 .../realtek/dts/rtl8382_zyxel_gs1900-24ep.dts      |   2 +-
 .../realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts   |   2 +-
 .../realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts   |   2 +-
 .../realtek/dts/rtl8393_d-link_dgs-1210-52.dts     | 139 +++++++++---------
 .../linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts |  13 +-
 target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts  |  12 +-
 target/linux/realtek/dts/rtl8393_hpe_1920.dtsi     | 115 +++++++--------
 .../linux/realtek/dts/rtl8393_netgear_gs750e.dts   | 139 +++++++++---------
 .../dts/rtl8393_panasonic_m48eg-pn28480k.dts       | 116 ++++++++-------
 .../linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts  | 135 +++++++++---------
 .../realtek/dts/rtl9302_plasmacloud_common.dtsi    | 105 +++++++-------
 .../realtek/dts/rtl9302_plasmacloud_psx10.dts      |   2 +-
 .../realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts    |   2 +-
 .../dts/rtl9302_zyxel_xgs1210-12-common.dtsi       | 101 +++++++-------
 .../linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts | 155 ++++++++++-----------
 .../realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts  | 103 +++++++-------
 .../realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts   |  25 ++--
 .../realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts   |  25 ++--
 .../realtek/dts/rtl9303_xikestor_sks8300-8x.dts    |  25 ++--
 .../realtek/dts/rtl9303_xikestor_sks8310-8x.dts    |  25 ++--
 .../files-6.12/drivers/net/dsa/rtl83xx/common.c    |   4 +-
 .../drivers/net/mdio/mdio-realtek-otto.c           |   8 +-
 50 files changed, 955 insertions(+), 1186 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts b/target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts
index c8d87e7596..f39e5d7bf8 100644
--- a/target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts
+++ b/target/linux/realtek/dts/rtl8380_d-link_dgs-1210-10mp-f.dts
@@ -75,25 +75,18 @@
 	status = "okay";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi b/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi
index a0d3bda49b..cf13c4a535 100644
--- a/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi
+++ b/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dtsi
@@ -174,25 +174,18 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
index e6bf7ef1d9..1047ccc0b4 100644
--- a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
+++ b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
@@ -57,25 +57,18 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts b/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
index fd2bb722d0..89e6d968ac 100644
--- a/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
+++ b/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
@@ -148,24 +148,17 @@
 	status = "okay";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
index 75bf06e674..662f8db652 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
+++ b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
@@ -51,22 +51,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 };
 
 &spi0 {
diff --git a/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts b/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
index d25b81c3cb..7b4c9ddd0c 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
+++ b/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
@@ -54,7 +54,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(16)
 	EXTERNAL_PHY(17)
 };
diff --git a/target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts b/target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts
index 335aff2cf0..5672ece596 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts
+++ b/target/linux/realtek/dts/rtl8380_netgear_gs110tup-v1.dts
@@ -45,7 +45,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(16)
 	EXTERNAL_PHY(24)
 };
diff --git a/target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts b/target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts
index 50f7563ce9..72926434d2 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts
+++ b/target/linux/realtek/dts/rtl8380_netgear_gs310tp-v1.dts
@@ -49,7 +49,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	INTERNAL_PHY_SDS(24, 4)
 	INTERNAL_PHY_SDS(26, 5)
 };
diff --git a/target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts b/target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts
index ec133fe0f6..2d937650d1 100644
--- a/target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts
+++ b/target/linux/realtek/dts/rtl8380_panasonic_m8eg-pn28080k.dts
@@ -74,24 +74,17 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY_SDS(24, 4)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	INTERNAL_PHY_SDS(24, 4)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
index 0ff3aa72a0..466a620dec 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
@@ -52,7 +52,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	INTERNAL_PHY_SDS(24, 4)
 	INTERNAL_PHY_SDS(26, 5)
 };
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 1411ea0f18..72a4bc2abe 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -87,22 +87,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts b/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
index 320cb08ac7..7997306085 100644
--- a/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
+++ b/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts
@@ -96,22 +96,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts b/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
index 3c609701d5..3d2adb27a4 100644
--- a/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
+++ b/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
@@ -199,36 +199,29 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_SFP_PHY_FULL(24, 0)
-		EXTERNAL_SFP_PHY_FULL(25, 1)
-		EXTERNAL_SFP_PHY_FULL(26, 2)
-		EXTERNAL_SFP_PHY_FULL(27, 3)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_SFP_PHY_FULL(24, 0)
+	EXTERNAL_SFP_PHY_FULL(25, 1)
+	EXTERNAL_SFP_PHY_FULL(26, 2)
+	EXTERNAL_SFP_PHY_FULL(27, 3)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
index b4e04a8da7..7c0871c70d 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
@@ -74,25 +74,18 @@
 	status = "okay";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts
index c9a79fb607..022902f356 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-16.dts
@@ -9,36 +9,29 @@
 	model = "D-Link DGS-1210-16";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
 
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_SFP_PHY(24)
-		EXTERNAL_SFP_PHY(25)
-		EXTERNAL_SFP_PHY(26)
-		EXTERNAL_SFP_PHY(27)
-	};
+	EXTERNAL_SFP_PHY(24)
+	EXTERNAL_SFP_PHY(25)
+	EXTERNAL_SFP_PHY(26)
+	EXTERNAL_SFP_PHY(27)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts
index dacc50676d..601d2980d6 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-20.dts
@@ -9,36 +9,29 @@
 	model = "D-Link DGS-1210-20";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
 
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_SFP_PHY(24)
-		EXTERNAL_SFP_PHY(25)
-		EXTERNAL_SFP_PHY(26)
-		EXTERNAL_SFP_PHY(27)
-	};
+	EXTERNAL_SFP_PHY(24)
+	EXTERNAL_SFP_PHY(25)
+	EXTERNAL_SFP_PHY(26)
+	EXTERNAL_SFP_PHY(27)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts
index 08cfabd55f..d0905bba7a 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-26.dts
@@ -45,43 +45,36 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		INTERNAL_PHY_SDS(24, 4)
-		INTERNAL_PHY_SDS(26, 5)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi
index d5b984b0a6..fe07078c2b 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28_common.dtsi
@@ -1,45 +1,38 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
 
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
 
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
 
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		/* External phy RTL8214FC */
-		EXTERNAL_SFP_PHY_FULL(24, 0)
-		EXTERNAL_SFP_PHY_FULL(25, 1)
-		EXTERNAL_SFP_PHY_FULL(26, 2)
-		EXTERNAL_SFP_PHY_FULL(27, 3)
-	};
+	/* External phy RTL8214FC */
+	EXTERNAL_SFP_PHY_FULL(24, 0)
+	EXTERNAL_SFP_PHY_FULL(25, 1)
+	EXTERNAL_SFP_PHY_FULL(26, 2)
+	EXTERNAL_SFP_PHY_FULL(27, 3)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi b/target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi
index 61781c708e..7358961943 100644
--- a/target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920-24g.dtsi
@@ -7,7 +7,7 @@
 	model = "HPE 1920-24G (JG924A)";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
index 20d8693a3b..14f4c7497b 100644
--- a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
@@ -96,34 +96,27 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		EXTERNAL_SFP_PHY_FULL(24, 0)
-		EXTERNAL_SFP_PHY_FULL(25, 1)
-		EXTERNAL_SFP_PHY_FULL(26, 2)
-		EXTERNAL_SFP_PHY_FULL(27, 3)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	EXTERNAL_SFP_PHY_FULL(24, 0)
+	EXTERNAL_SFP_PHY_FULL(25, 1)
+	EXTERNAL_SFP_PHY_FULL(26, 2)
+	EXTERNAL_SFP_PHY_FULL(27, 3)
 };
diff --git a/target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts b/target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts
index 4808141494..c3683dc6a8 100644
--- a/target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts
+++ b/target/linux/realtek/dts/rtl8382_inaba_aml2-17gp.dts
@@ -85,33 +85,26 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		EXTERNAL_PHY(24)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	EXTERNAL_PHY(24)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts b/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
index c4f8165604..b2dd2dff8c 100644
--- a/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
+++ b/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
@@ -121,40 +121,33 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts b/target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts
index abbfd60085..b2bc975722 100644
--- a/target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts
+++ b/target/linux/realtek/dts/rtl8382_panasonic_m16eg-pn28160k.dts
@@ -105,31 +105,25 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		/* RTL8218FB */
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	/* RTL8218FB */
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts b/target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts
index d01352ec56..41df49f0aa 100644
--- a/target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts
+++ b/target/linux/realtek/dts/rtl8382_panasonic_m24eg-pn28240k.dts
@@ -106,40 +106,34 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		/* RTL8218FB */
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	/* RTL8218FB */
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts b/target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts
index d84987d209..20e0a868c6 100644
--- a/target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts
+++ b/target/linux/realtek/dts/rtl8382_tplink_t1600g-28ts-v3.dts
@@ -92,40 +92,35 @@
 &ethernet0 {
 	nvmem-cells = <&factory_macaddr>;
 	nvmem-cell-names = "mac-address";
+};
 
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		INTERNAL_PHY(8)
-		INTERNAL_PHY(9)
-		INTERNAL_PHY(10)
-		INTERNAL_PHY(11)
-		INTERNAL_PHY(12)
-		INTERNAL_PHY(13)
-		INTERNAL_PHY(14)
-		INTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	INTERNAL_PHY(8)
+	INTERNAL_PHY(9)
+	INTERNAL_PHY(10)
+	INTERNAL_PHY(11)
+	INTERNAL_PHY(12)
+	INTERNAL_PHY(13)
+	INTERNAL_PHY(14)
+	INTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
index 5b40f1ce09..5b38236031 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
@@ -8,7 +8,7 @@
 	model = "Zyxel GS1900-16";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(16)
 	EXTERNAL_PHY(17)
 	EXTERNAL_PHY(18)
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
index f1494276a1..3b2bb9efaf 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
@@ -54,7 +54,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
index 1eaf2090ab..e16e3b96e4 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
@@ -8,7 +8,7 @@
 	model = "Zyxel GS1900-24E";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
index fea2e77f3e..7460068d27 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
@@ -12,7 +12,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
index 7ec67a2a90..45167905c7 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
@@ -54,7 +54,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
index c93ac4b6b1..2600bc8b5d 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
@@ -50,7 +50,7 @@
 	status = "okay";
 };
 
-&mdio {
+&mdio_bus0 {
 	EXTERNAL_PHY(0)
 	EXTERNAL_PHY(1)
 	EXTERNAL_PHY(2)
diff --git a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
index c380d5e7e3..90d6db77ae 100644
--- a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
+++ b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
@@ -10,79 +10,72 @@
 	model = "D-Link DGS-1210-52";
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* External phy RTL8218B #1 */
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		/* External phy RTL8218B #2 */
-		EXTERNAL_PHY(8)
-		EXTERNAL_PHY(9)
-		EXTERNAL_PHY(10)
-		EXTERNAL_PHY(11)
-		EXTERNAL_PHY(12)
-		EXTERNAL_PHY(13)
-		EXTERNAL_PHY(14)
-		EXTERNAL_PHY(15)
-
-		/* External phy RTL8218B #3 */
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		/* External phy RTL8218B #4 */
-		EXTERNAL_PHY(24)
-		EXTERNAL_PHY(25)
-		EXTERNAL_PHY(26)
-		EXTERNAL_PHY(27)
-		EXTERNAL_PHY(28)
-		EXTERNAL_PHY(29)
-		EXTERNAL_PHY(30)
-		EXTERNAL_PHY(31)
-
-		/* External phy RTL8218B #5 */
-		EXTERNAL_PHY(32)
-		EXTERNAL_PHY(33)
-		EXTERNAL_PHY(34)
-		EXTERNAL_PHY(35)
-		EXTERNAL_PHY(36)
-		EXTERNAL_PHY(37)
-		EXTERNAL_PHY(38)
-		EXTERNAL_PHY(39)
-
-		/* External phy RTL8218B #6 */
-		EXTERNAL_PHY(40)
-		EXTERNAL_PHY(41)
-		EXTERNAL_PHY(42)
-		EXTERNAL_PHY(43)
-		EXTERNAL_PHY(44)
-		EXTERNAL_PHY(45)
-		EXTERNAL_PHY(46)
-		EXTERNAL_PHY(47)
-
-		/* External phy RTL8214FC */
-		EXTERNAL_SFP_PHY_FULL(48, 0)
-		EXTERNAL_SFP_PHY_FULL(49, 1)
-		EXTERNAL_SFP_PHY_FULL(50, 2)
-		EXTERNAL_SFP_PHY_FULL(51, 3)
-	};
+&mdio_bus0 {
+	/* External phy RTL8218B #1 */
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	/* External phy RTL8218B #2 */
+	EXTERNAL_PHY(8)
+	EXTERNAL_PHY(9)
+	EXTERNAL_PHY(10)
+	EXTERNAL_PHY(11)
+	EXTERNAL_PHY(12)
+	EXTERNAL_PHY(13)
+	EXTERNAL_PHY(14)
+	EXTERNAL_PHY(15)
+
+	/* External phy RTL8218B #3 */
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	/* External phy RTL8218B #4 */
+	EXTERNAL_PHY(24)
+	EXTERNAL_PHY(25)
+	EXTERNAL_PHY(26)
+	EXTERNAL_PHY(27)
+	EXTERNAL_PHY(28)
+	EXTERNAL_PHY(29)
+	EXTERNAL_PHY(30)
+	EXTERNAL_PHY(31)
+
+	/* External phy RTL8218B #5 */
+	EXTERNAL_PHY(32)
+	EXTERNAL_PHY(33)
+	EXTERNAL_PHY(34)
+	EXTERNAL_PHY(35)
+	EXTERNAL_PHY(36)
+	EXTERNAL_PHY(37)
+	EXTERNAL_PHY(38)
+	EXTERNAL_PHY(39)
+
+	/* External phy RTL8218B #6 */
+	EXTERNAL_PHY(40)
+	EXTERNAL_PHY(41)
+	EXTERNAL_PHY(42)
+	EXTERNAL_PHY(43)
+	EXTERNAL_PHY(44)
+	EXTERNAL_PHY(45)
+	EXTERNAL_PHY(46)
+	EXTERNAL_PHY(47)
+
+	/* External phy RTL8214FC */
+	EXTERNAL_SFP_PHY_FULL(48, 0)
+	EXTERNAL_SFP_PHY_FULL(49, 1)
+	EXTERNAL_SFP_PHY_FULL(50, 2)
+	EXTERNAL_SFP_PHY_FULL(51, 3)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
index 7257e9e49b..3d6ae78840 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
@@ -90,16 +90,13 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		EXTERNAL_SFP_PHY_FULL(48, 0)
-		EXTERNAL_SFP_PHY_FULL(49, 1)
-		EXTERNAL_SFP_PHY_FULL(50, 2)
-		EXTERNAL_SFP_PHY_FULL(51, 3)
-	};
+&mdio_bus0 {
+	EXTERNAL_SFP_PHY_FULL(48, 0)
+	EXTERNAL_SFP_PHY_FULL(49, 1)
+	EXTERNAL_SFP_PHY_FULL(50, 2)
+	EXTERNAL_SFP_PHY_FULL(51, 3)
 };
 
-
 &switch0 {
 	ports {
 		SWITCH_PORT(48, 49, qsgmii)
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
index 42bd4da2ad..a59c683fec 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
@@ -80,13 +80,11 @@
 
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		EXTERNAL_SFP_PHY_FULL(48, 1)
-		EXTERNAL_SFP_PHY_FULL(49, 3)
-		EXTERNAL_SFP_PHY_FULL(50, 0)
-		EXTERNAL_SFP_PHY_FULL(51, 2)
-	};
+&mdio_bus0 {
+	EXTERNAL_SFP_PHY_FULL(48, 1)
+	EXTERNAL_SFP_PHY_FULL(49, 3)
+	EXTERNAL_SFP_PHY_FULL(50, 0)
+	EXTERNAL_SFP_PHY_FULL(51, 2)
 };
 
 
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
index 2db74b1075..065b87f68d 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
@@ -24,67 +24,60 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		EXTERNAL_PHY(8)
-		EXTERNAL_PHY(9)
-		EXTERNAL_PHY(10)
-		EXTERNAL_PHY(11)
-		EXTERNAL_PHY(12)
-		EXTERNAL_PHY(13)
-		EXTERNAL_PHY(14)
-		EXTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		EXTERNAL_PHY(24)
-		EXTERNAL_PHY(25)
-		EXTERNAL_PHY(26)
-		EXTERNAL_PHY(27)
-		EXTERNAL_PHY(28)
-		EXTERNAL_PHY(29)
-		EXTERNAL_PHY(30)
-		EXTERNAL_PHY(31)
-
-		EXTERNAL_PHY(32)
-		EXTERNAL_PHY(33)
-		EXTERNAL_PHY(34)
-		EXTERNAL_PHY(35)
-		EXTERNAL_PHY(36)
-		EXTERNAL_PHY(37)
-		EXTERNAL_PHY(38)
-		EXTERNAL_PHY(39)
-
-		EXTERNAL_PHY(40)
-		EXTERNAL_PHY(41)
-		EXTERNAL_PHY(42)
-		EXTERNAL_PHY(43)
-		EXTERNAL_PHY(44)
-		EXTERNAL_PHY(45)
-		EXTERNAL_PHY(46)
-		EXTERNAL_PHY(47)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(8)
+	EXTERNAL_PHY(9)
+	EXTERNAL_PHY(10)
+	EXTERNAL_PHY(11)
+	EXTERNAL_PHY(12)
+	EXTERNAL_PHY(13)
+	EXTERNAL_PHY(14)
+	EXTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	EXTERNAL_PHY(24)
+	EXTERNAL_PHY(25)
+	EXTERNAL_PHY(26)
+	EXTERNAL_PHY(27)
+	EXTERNAL_PHY(28)
+	EXTERNAL_PHY(29)
+	EXTERNAL_PHY(30)
+	EXTERNAL_PHY(31)
+
+	EXTERNAL_PHY(32)
+	EXTERNAL_PHY(33)
+	EXTERNAL_PHY(34)
+	EXTERNAL_PHY(35)
+	EXTERNAL_PHY(36)
+	EXTERNAL_PHY(37)
+	EXTERNAL_PHY(38)
+	EXTERNAL_PHY(39)
+
+	EXTERNAL_PHY(40)
+	EXTERNAL_PHY(41)
+	EXTERNAL_PHY(42)
+	EXTERNAL_PHY(43)
+	EXTERNAL_PHY(44)
+	EXTERNAL_PHY(45)
+	EXTERNAL_PHY(46)
+	EXTERNAL_PHY(47)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
index 77f001e1b2..83d90856d6 100644
--- a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
+++ b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
@@ -102,78 +102,73 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		// Switch doesn't come back properly after a reset so don't.
-		// reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
-
-		/* External phy RTL8218B #1 */
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		/* External phy RTL8218B #2 */
-		EXTERNAL_PHY(8)
-		EXTERNAL_PHY(9)
-		EXTERNAL_PHY(10)
-		EXTERNAL_PHY(11)
-		EXTERNAL_PHY(12)
-		EXTERNAL_PHY(13)
-		EXTERNAL_PHY(14)
-		EXTERNAL_PHY(15)
-
-		/* External phy RTL8218B #3 */
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		/* External phy RTL8218B #4 */
-		EXTERNAL_PHY(24)
-		EXTERNAL_PHY(25)
-		EXTERNAL_PHY(26)
-		EXTERNAL_PHY(27)
-		EXTERNAL_PHY(28)
-		EXTERNAL_PHY(29)
-		EXTERNAL_PHY(30)
-		EXTERNAL_PHY(31)
-
-		/* External phy RTL8218B #5 */
-		EXTERNAL_PHY(32)
-		EXTERNAL_PHY(33)
-		EXTERNAL_PHY(34)
-		EXTERNAL_PHY(35)
-		EXTERNAL_PHY(36)
-		EXTERNAL_PHY(37)
-		EXTERNAL_PHY(38)
-		EXTERNAL_PHY(39)
-
-		/* External phy RTL8218B #6 */
-		EXTERNAL_PHY(40)
-		EXTERNAL_PHY(41)
-		EXTERNAL_PHY(42)
-		EXTERNAL_PHY(43)
-		EXTERNAL_PHY(44)
-		EXTERNAL_PHY(45)
-		EXTERNAL_PHY(46)
-		EXTERNAL_PHY(47)
-
-		/* RTL8393 Internal SerDes */
-		INTERNAL_PHY(48)
-		INTERNAL_PHY(49)
-	};
+&mdio_bus0 {
+	// Switch doesn't come back properly after a reset so don't.
+	// reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+
+	/* External phy RTL8218B #1 */
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	/* External phy RTL8218B #2 */
+	EXTERNAL_PHY(8)
+	EXTERNAL_PHY(9)
+	EXTERNAL_PHY(10)
+	EXTERNAL_PHY(11)
+	EXTERNAL_PHY(12)
+	EXTERNAL_PHY(13)
+	EXTERNAL_PHY(14)
+	EXTERNAL_PHY(15)
+
+	/* External phy RTL8218B #3 */
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	/* External phy RTL8218B #4 */
+	EXTERNAL_PHY(24)
+	EXTERNAL_PHY(25)
+	EXTERNAL_PHY(26)
+	EXTERNAL_PHY(27)
+	EXTERNAL_PHY(28)
+	EXTERNAL_PHY(29)
+	EXTERNAL_PHY(30)
+	EXTERNAL_PHY(31)
+
+	/* External phy RTL8218B #5 */
+	EXTERNAL_PHY(32)
+	EXTERNAL_PHY(33)
+	EXTERNAL_PHY(34)
+	EXTERNAL_PHY(35)
+	EXTERNAL_PHY(36)
+	EXTERNAL_PHY(37)
+	EXTERNAL_PHY(38)
+	EXTERNAL_PHY(39)
+
+	/* External phy RTL8218B #6 */
+	EXTERNAL_PHY(40)
+	EXTERNAL_PHY(41)
+	EXTERNAL_PHY(42)
+	EXTERNAL_PHY(43)
+	EXTERNAL_PHY(44)
+	EXTERNAL_PHY(45)
+	EXTERNAL_PHY(46)
+	EXTERNAL_PHY(47)
+
+	/* RTL8393 Internal SerDes */
+	INTERNAL_PHY(48)
+	INTERNAL_PHY(49)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
index 8e7d32de1c..c7e23e9c96 100644
--- a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
+++ b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
@@ -242,67 +242,61 @@
 	};
 };
 
-&ethernet0 {
-	mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		EXTERNAL_PHY(8)
-		EXTERNAL_PHY(9)
-		EXTERNAL_PHY(10)
-		EXTERNAL_PHY(11)
-		EXTERNAL_PHY(12)
-		EXTERNAL_PHY(13)
-		EXTERNAL_PHY(14)
-		EXTERNAL_PHY(15)
-
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		EXTERNAL_PHY(24)
-		EXTERNAL_PHY(25)
-		EXTERNAL_PHY(26)
-		EXTERNAL_PHY(27)
-		EXTERNAL_PHY(28)
-		EXTERNAL_PHY(29)
-		EXTERNAL_PHY(30)
-		EXTERNAL_PHY(31)
-
-		EXTERNAL_PHY(32)
-		EXTERNAL_PHY(33)
-		EXTERNAL_PHY(34)
-		EXTERNAL_PHY(35)
-		EXTERNAL_PHY(36)
-		EXTERNAL_PHY(37)
-		EXTERNAL_PHY(38)
-		EXTERNAL_PHY(39)
-
-		/* RTL8218FB */
-		EXTERNAL_PHY(40)
-		EXTERNAL_PHY(41)
-		EXTERNAL_PHY(42)
-		EXTERNAL_PHY(43)
-		EXTERNAL_PHY(44)
-		EXTERNAL_PHY(45)
-		EXTERNAL_PHY(46)
-		EXTERNAL_PHY(47)
-	};
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(8)
+	EXTERNAL_PHY(9)
+	EXTERNAL_PHY(10)
+	EXTERNAL_PHY(11)
+	EXTERNAL_PHY(12)
+	EXTERNAL_PHY(13)
+	EXTERNAL_PHY(14)
+	EXTERNAL_PHY(15)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	EXTERNAL_PHY(24)
+	EXTERNAL_PHY(25)
+	EXTERNAL_PHY(26)
+	EXTERNAL_PHY(27)
+	EXTERNAL_PHY(28)
+	EXTERNAL_PHY(29)
+	EXTERNAL_PHY(30)
+	EXTERNAL_PHY(31)
+
+	EXTERNAL_PHY(32)
+	EXTERNAL_PHY(33)
+	EXTERNAL_PHY(34)
+	EXTERNAL_PHY(35)
+	EXTERNAL_PHY(36)
+	EXTERNAL_PHY(37)
+	EXTERNAL_PHY(38)
+	EXTERNAL_PHY(39)
+
+	/* RTL8218FB */
+	EXTERNAL_PHY(40)
+	EXTERNAL_PHY(41)
+	EXTERNAL_PHY(42)
+	EXTERNAL_PHY(43)
+	EXTERNAL_PHY(44)
+	EXTERNAL_PHY(45)
+	EXTERNAL_PHY(46)
+	EXTERNAL_PHY(47)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
index d267cd28fd..c426c442ba 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
@@ -144,77 +144,70 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* External phy RTL8218B #1 */
-		EXTERNAL_PHY(0)
-		EXTERNAL_PHY(1)
-		EXTERNAL_PHY(2)
-		EXTERNAL_PHY(3)
-		EXTERNAL_PHY(4)
-		EXTERNAL_PHY(5)
-		EXTERNAL_PHY(6)
-		EXTERNAL_PHY(7)
-
-		/* External phy RTL8218B #2 */
-		EXTERNAL_PHY(8)
-		EXTERNAL_PHY(9)
-		EXTERNAL_PHY(10)
-		EXTERNAL_PHY(11)
-		EXTERNAL_PHY(12)
-		EXTERNAL_PHY(13)
-		EXTERNAL_PHY(14)
-		EXTERNAL_PHY(15)
-
-		/* External phy RTL8218B #3 */
-		EXTERNAL_PHY(16)
-		EXTERNAL_PHY(17)
-		EXTERNAL_PHY(18)
-		EXTERNAL_PHY(19)
-		EXTERNAL_PHY(20)
-		EXTERNAL_PHY(21)
-		EXTERNAL_PHY(22)
-		EXTERNAL_PHY(23)
-
-		/* External phy RTL8218B #4 */
-		EXTERNAL_PHY(24)
-		EXTERNAL_PHY(25)
-		EXTERNAL_PHY(26)
-		EXTERNAL_PHY(27)
-		EXTERNAL_PHY(28)
-		EXTERNAL_PHY(29)
-		EXTERNAL_PHY(30)
-		EXTERNAL_PHY(31)
-
-		/* External phy RTL8218B #5 */
-		EXTERNAL_PHY(32)
-		EXTERNAL_PHY(33)
-		EXTERNAL_PHY(34)
-		EXTERNAL_PHY(35)
-		EXTERNAL_PHY(36)
-		EXTERNAL_PHY(37)
-		EXTERNAL_PHY(38)
-		EXTERNAL_PHY(39)
-
-		/* External phy RTL8218B #6 */
-		EXTERNAL_PHY(40)
-		EXTERNAL_PHY(41)
-		EXTERNAL_PHY(42)
-		EXTERNAL_PHY(43)
-		EXTERNAL_PHY(44)
-		EXTERNAL_PHY(45)
-		EXTERNAL_PHY(46)
-		EXTERNAL_PHY(47)
-
-		/* RTL8393 Internal SerDes */
-		INTERNAL_PHY_SDS(48, 12)
-		INTERNAL_PHY_SDS(49, 13)
-	};
+&mdio_bus0 {
+	/* External phy RTL8218B #1 */
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	/* External phy RTL8218B #2 */
+	EXTERNAL_PHY(8)
+	EXTERNAL_PHY(9)
+	EXTERNAL_PHY(10)
+	EXTERNAL_PHY(11)
+	EXTERNAL_PHY(12)
+	EXTERNAL_PHY(13)
+	EXTERNAL_PHY(14)
+	EXTERNAL_PHY(15)
+
+	/* External phy RTL8218B #3 */
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	/* External phy RTL8218B #4 */
+	EXTERNAL_PHY(24)
+	EXTERNAL_PHY(25)
+	EXTERNAL_PHY(26)
+	EXTERNAL_PHY(27)
+	EXTERNAL_PHY(28)
+	EXTERNAL_PHY(29)
+	EXTERNAL_PHY(30)
+	EXTERNAL_PHY(31)
+
+	/* External phy RTL8218B #5 */
+	EXTERNAL_PHY(32)
+	EXTERNAL_PHY(33)
+	EXTERNAL_PHY(34)
+	EXTERNAL_PHY(35)
+	EXTERNAL_PHY(36)
+	EXTERNAL_PHY(37)
+	EXTERNAL_PHY(38)
+	EXTERNAL_PHY(39)
+
+	/* External phy RTL8218B #6 */
+	EXTERNAL_PHY(40)
+	EXTERNAL_PHY(41)
+	EXTERNAL_PHY(42)
+	EXTERNAL_PHY(43)
+	EXTERNAL_PHY(44)
+	EXTERNAL_PHY(45)
+	EXTERNAL_PHY(46)
+	EXTERNAL_PHY(47)
+
+	/* RTL8393 Internal SerDes */
+	INTERNAL_PHY_SDS(48, 12)
+	INTERNAL_PHY_SDS(49, 13)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi b/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi
index b20823f842..be8963e778 100644
--- a/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi
+++ b/target/linux/realtek/dts/rtl9302_plasmacloud_common.dtsi
@@ -131,69 +131,64 @@
 &ethernet0 {
 	nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
 	nvmem-cell-names = "mac-address";
+};
 
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* External RTL8224 PHY */
-		phy0: ethernet-phy at 0 {
-			reg = <0>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 0>;
-			sds = < 2 >;
-		};
+&mdio_bus0 {
+	/* External RTL8224 PHY */
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 0>;
+		sds = < 2 >;
+	};
 
-		phy1: ethernet-phy at 1 {
-			reg = <1>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 1>;
-			sds = < 2 >;
-		};
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 1>;
+		sds = < 2 >;
+	};
 
-		phy2: ethernet-phy at 2 {
-			reg = <2>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 2>;
-			sds = < 2 >;
-		};
+	phy2: ethernet-phy at 2 {
+		reg = <2>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 2>;
+		sds = < 2 >;
+	};
 
-		phy3: ethernet-phy at 3 {
-			reg = <3>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 3>;
-			sds = < 2 >;
-		};
+	phy3: ethernet-phy at 3 {
+		reg = <3>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 3>;
+		sds = < 2 >;
+	};
 
-		phy8: ethernet-phy at 8 {
-			reg = <8>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 4>;
-			sds = < 3 >;
-		};
+	phy8: ethernet-phy at 8 {
+		reg = <8>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 4>;
+		sds = < 3 >;
+	};
 
-		phy9: ethernet-phy at 9 {
-			reg = <9>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 5>;
-			sds = < 3 >;
-		};
+	phy9: ethernet-phy at 9 {
+		reg = <9>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 5>;
+		sds = < 3 >;
+	};
 
-		phy10: ethernet-phy at 10 {
-			reg = <10>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 6>;
-			sds = < 3 >;
-		};
+	phy10: ethernet-phy at 10 {
+		reg = <10>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 6>;
+		sds = < 3 >;
+	};
 
-		phy11: ethernet-phy at 11 {
-			reg = <11>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 7>;
-			sds = < 3 >;
-		};
+	phy11: ethernet-phy at 11 {
+		reg = <11>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 7>;
+		sds = < 3 >;
 	};
 };
 
diff --git a/target/linux/realtek/dts/rtl9302_plasmacloud_psx10.dts b/target/linux/realtek/dts/rtl9302_plasmacloud_psx10.dts
index b451bc24e3..345ea13a42 100644
--- a/target/linux/realtek/dts/rtl9302_plasmacloud_psx10.dts
+++ b/target/linux/realtek/dts/rtl9302_plasmacloud_psx10.dts
@@ -35,7 +35,7 @@
 	};
 };
 
-&mdio {
+&mdio_bus0 {
 	INTERNAL_PHY_SDS(26, 8)
 	INTERNAL_PHY_SDS(27, 9)
 };
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts
index 529f8942f4..0ace1e1f75 100644
--- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-a1.dts
@@ -8,7 +8,7 @@
 	model = "Zyxel XGS1210-12 A1 Switch";
 };
 
-&mdio {
+&mdio_bus0 {
 	phy24: ethernet-phy at 24 {
 		reg = <24>;
 		compatible = "ethernet-phy-ieee802.3-c45";
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-common.dtsi b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-common.dtsi
index 4fba3c9ecc..405e9f103c 100644
--- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-common.dtsi
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12-common.dtsi
@@ -146,61 +146,54 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* External RTL8218D PHY */
-		phy0: ethernet-phy at 0 {
-			reg = <0>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 0>;
-			sds = < 2 >;
-			// Disabled because we do not know how to bring up again
-			// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-		};
-		phy1: ethernet-phy at 1 {
-			reg = <1>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 1>;
-		};
-		phy2: ethernet-phy at 2 {
-			reg = <2>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 2>;
-		};
-		phy3: ethernet-phy at 3 {
-			reg = <3>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 3>;
-		};
-		phy4: ethernet-phy at 4 {
-			reg = <4>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 4>;
-		};
-		phy5: ethernet-phy at 5 {
-			reg = <5>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 5>;
-		};
-		phy6: ethernet-phy at 6 {
-			reg = <6>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 6>;
-		};
-		phy7: ethernet-phy at 7 {
-			reg = <7>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 7>;
-		};
-
-		INTERNAL_PHY_SDS(26, 8)
-		INTERNAL_PHY_SDS(27, 9)
+&mdio_bus0 {
+	/* External RTL8218D PHY */
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 0>;
+		sds = < 2 >;
+		// Disabled because we do not know how to bring up again
+		// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+	};
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 1>;
 	};
+	phy2: ethernet-phy at 2 {
+		reg = <2>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 2>;
+	};
+	phy3: ethernet-phy at 3 {
+		reg = <3>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 3>;
+	};
+	phy4: ethernet-phy at 4 {
+		reg = <4>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 4>;
+	};
+	phy5: ethernet-phy at 5 {
+		reg = <5>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 5>;
+	};
+	phy6: ethernet-phy at 6 {
+		reg = <6>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 6>;
+	};
+	phy7: ethernet-phy at 7 {
+		reg = <7>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 7>;
+	};
+
+	INTERNAL_PHY_SDS(26, 8)
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts
index 38066ff2a2..f4da333136 100644
--- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12.dts
@@ -220,91 +220,84 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* External RTL8218D PHY */
-		phy0: ethernet-phy at 0 {
-			reg = <0>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 0>;
-			sds = < 2 >;
-			// Disabled because we do not know how to bring up again
-			// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-		};
-		phy1: ethernet-phy at 1 {
-			reg = <1>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 1>;
-		};
-		phy2: ethernet-phy at 2 {
-			reg = <2>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 2>;
-		};
-		phy3: ethernet-phy at 3 {
-			reg = <3>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 3>;
-		};
-		phy4: ethernet-phy at 4 {
-			reg = <4>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 4>;
-		};
-		phy5: ethernet-phy at 5 {
-			reg = <5>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 5>;
-		};
-		phy6: ethernet-phy at 6 {
-			reg = <6>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 6>;
-		};
-		phy7: ethernet-phy at 7 {
-			reg = <7>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-			rtl9300,smi-address = <0 7>;
-		};
-
-		/* External Aquantia 113C PHYs */
-		phy24: ethernet-phy at 24 {
-			reg = <24>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <1 8>;
-			sds = < 6 >;
-			// Disabled because we do not know how to bring up again
-			// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-			#thermal-sensor-cells = <0>;
-		};
+&mdio_bus0 {
+	/* External RTL8218D PHY */
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 0>;
+		sds = < 2 >;
+		// Disabled because we do not know how to bring up again
+		// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+	};
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 1>;
+	};
+	phy2: ethernet-phy at 2 {
+		reg = <2>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 2>;
+	};
+	phy3: ethernet-phy at 3 {
+		reg = <3>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 3>;
+	};
+	phy4: ethernet-phy at 4 {
+		reg = <4>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 4>;
+	};
+	phy5: ethernet-phy at 5 {
+		reg = <5>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 5>;
+	};
+	phy6: ethernet-phy at 6 {
+		reg = <6>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 6>;
+	};
+	phy7: ethernet-phy at 7 {
+		reg = <7>;
+		compatible = "ethernet-phy-ieee802.3-c22";
+		rtl9300,smi-address = <0 7>;
+	};
 
-		phy25: ethernet-phy at 25 {
-			reg = <25>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <2 8>;
-			sds = < 7 >;
-			// Disabled because we do not know how to bring up again
-			// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-			#thermal-sensor-cells = <0>;
-		};
+	/* External Aquantia 113C PHYs */
+	phy24: ethernet-phy at 24 {
+		reg = <24>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <1 8>;
+		sds = < 6 >;
+		// Disabled because we do not know how to bring up again
+		// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		#thermal-sensor-cells = <0>;
+	};
 
-		phy26: ethernet-phy at 26 {
-			reg = <26>;
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <3 8>;
-			sds = < 8 >;
-			// Disabled because we do not know how to bring up again
-			// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-			#thermal-sensor-cells = <0>;
-		};
+	phy25: ethernet-phy at 25 {
+		reg = <25>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <2 8>;
+		sds = < 7 >;
+		// Disabled because we do not know how to bring up again
+		// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		#thermal-sensor-cells = <0>;
+	};
 
-		INTERNAL_PHY_SDS(27, 9)
+	phy26: ethernet-phy at 26 {
+		reg = <26>;
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <3 8>;
+		sds = < 8 >;
+		// Disabled because we do not know how to bring up again
+		// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		#thermal-sensor-cells = <0>;
 	};
+
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
index a156984a23..7114fad5bd 100644
--- a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
+++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
@@ -126,68 +126,61 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		phy0: ethernet-phy at 0 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 0>;
-			reg = <0>;
-			sds = <2>;
-		};
+&mdio_bus0 {
+	phy0: ethernet-phy at 0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 0>;
+		reg = <0>;
+		sds = <2>;
+	};
 
-		phy8: ethernet-phy at 8 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 1>;
-			reg = <8>;
-			sds = <3>;
-		};
+	phy8: ethernet-phy at 8 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 1>;
+		reg = <8>;
+		sds = <3>;
+	};
 
-		phy16: ethernet-phy at 16 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 2>;
-			reg = <16>;
-			sds = <4>;
-		};
+	phy16: ethernet-phy at 16 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 2>;
+		reg = <16>;
+		sds = <4>;
+	};
 
-		phy20: ethernet-phy at 20 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <0 3>;
-			reg = <20>;
-			sds = <5>;
-		};
+	phy20: ethernet-phy at 20 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <0 3>;
+		reg = <20>;
+		sds = <5>;
+	};
 
-		phy24: ethernet-phy at 24 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <3 16>;
-			reg = <24>;
-			sds = <6>;
-		};
+	phy24: ethernet-phy at 24 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <3 16>;
+		reg = <24>;
+		sds = <6>;
+	};
 
-		phy25: ethernet-phy at 25 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <3 17>;
-			reg = <25>;
-			sds = <7>;
-		};
+	phy25: ethernet-phy at 25 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <3 17>;
+		reg = <25>;
+		sds = <7>;
+	};
 
-		phy26: ethernet-phy at 26 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <3 18>;
-			reg = <26>;
-			sds = <8>;
-		};
+	phy26: ethernet-phy at 26 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <3 18>;
+		reg = <26>;
+		sds = <8>;
+	};
 
-		phy27: ethernet-phy at 27 {
-			compatible = "ethernet-phy-ieee802.3-c45";
-			rtl9300,smi-address = <3 19>;
-			reg = <27>;
-			sds = <9>;
-		};
+	phy27: ethernet-phy at 27 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		rtl9300,smi-address = <3 19>;
+		reg = <27>;
+		sds = <9>;
 	};
 };
 
diff --git a/target/linux/realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts b/target/linux/realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts
index 83f9998795..ca92ff7a68 100644
--- a/target/linux/realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts
+++ b/target/linux/realtek/dts/rtl9303_tplink_tl-st1008f-v2.dts
@@ -232,22 +232,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY_SDS(0, 2)
-		INTERNAL_PHY_SDS(8, 3)
-		INTERNAL_PHY_SDS(16, 4)
-		INTERNAL_PHY_SDS(20, 5)
-		INTERNAL_PHY_SDS(24, 6)
-		INTERNAL_PHY_SDS(25, 7)
-		INTERNAL_PHY_SDS(26, 8)
-		INTERNAL_PHY_SDS(27, 9)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY_SDS(0, 2)
+	INTERNAL_PHY_SDS(8, 3)
+	INTERNAL_PHY_SDS(16, 4)
+	INTERNAL_PHY_SDS(20, 5)
+	INTERNAL_PHY_SDS(24, 6)
+	INTERNAL_PHY_SDS(25, 7)
+	INTERNAL_PHY_SDS(26, 8)
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts b/target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts
index 4777d085d7..fd87b5b598 100644
--- a/target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts
+++ b/target/linux/realtek/dts/rtl9303_vimin_vm-s100-0800ms.dts
@@ -221,22 +221,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY_SDS(0, 2)
-		INTERNAL_PHY_SDS(8, 3)
-		INTERNAL_PHY_SDS(16, 4)
-		INTERNAL_PHY_SDS(20, 5)
-		INTERNAL_PHY_SDS(24, 6)
-		INTERNAL_PHY_SDS(25, 7)
-		INTERNAL_PHY_SDS(26, 8)
-		INTERNAL_PHY_SDS(27, 9)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY_SDS(0, 2)
+	INTERNAL_PHY_SDS(8, 3)
+	INTERNAL_PHY_SDS(16, 4)
+	INTERNAL_PHY_SDS(20, 5)
+	INTERNAL_PHY_SDS(24, 6)
+	INTERNAL_PHY_SDS(25, 7)
+	INTERNAL_PHY_SDS(26, 8)
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
index 8c19323f5b..f2a974ab88 100644
--- a/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
+++ b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
@@ -243,22 +243,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY_SDS(0, 2)
-		INTERNAL_PHY_SDS(8, 3)
-		INTERNAL_PHY_SDS(16, 4)
-		INTERNAL_PHY_SDS(20, 5)
-		INTERNAL_PHY_SDS(24, 6)
-		INTERNAL_PHY_SDS(25, 7)
-		INTERNAL_PHY_SDS(26, 8)
-		INTERNAL_PHY_SDS(27, 9)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY_SDS(0, 2)
+	INTERNAL_PHY_SDS(8, 3)
+	INTERNAL_PHY_SDS(16, 4)
+	INTERNAL_PHY_SDS(20, 5)
+	INTERNAL_PHY_SDS(24, 6)
+	INTERNAL_PHY_SDS(25, 7)
+	INTERNAL_PHY_SDS(26, 8)
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/dts/rtl9303_xikestor_sks8310-8x.dts b/target/linux/realtek/dts/rtl9303_xikestor_sks8310-8x.dts
index 51526c3532..55f1f82c70 100644
--- a/target/linux/realtek/dts/rtl9303_xikestor_sks8310-8x.dts
+++ b/target/linux/realtek/dts/rtl9303_xikestor_sks8310-8x.dts
@@ -240,22 +240,15 @@
 	};
 };
 
-&ethernet0 {
-	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		INTERNAL_PHY_SDS(0, 2)
-		INTERNAL_PHY_SDS(8, 3)
-		INTERNAL_PHY_SDS(16, 4)
-		INTERNAL_PHY_SDS(20, 5)
-		INTERNAL_PHY_SDS(24, 6)
-		INTERNAL_PHY_SDS(25, 7)
-		INTERNAL_PHY_SDS(26, 8)
-		INTERNAL_PHY_SDS(27, 9)
-	};
+&mdio_bus0 {
+	INTERNAL_PHY_SDS(0, 2)
+	INTERNAL_PHY_SDS(8, 3)
+	INTERNAL_PHY_SDS(16, 4)
+	INTERNAL_PHY_SDS(20, 5)
+	INTERNAL_PHY_SDS(24, 6)
+	INTERNAL_PHY_SDS(25, 7)
+	INTERNAL_PHY_SDS(26, 8)
+	INTERNAL_PHY_SDS(27, 9)
 };
 
 &switch0 {
diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
index c955669a23..8829180585 100644
--- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
+++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
@@ -274,9 +274,9 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
 	int ret;
 	u32 pn;
 
-	np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth");
+	np = of_find_compatible_node(NULL, NULL, "realtek,otto-mdio");
 	if (!np) {
-		dev_err(priv->dev, "ethernet node not found");
+		dev_err(priv->dev, "mdio controller node not found");
 		return -ENODEV;
 	}
 
diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
index 0bb5e361af..6f3533cbbb 100644
--- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
@@ -1397,7 +1397,7 @@ static int rtmdio_get_family(void)
 
 static int rtmdio_probe(struct platform_device *pdev)
 {
-	struct device_node *dn, *np, *mii_np;
+	struct device_node *dn, *mii_np;
 	struct device *dev = &pdev->dev;
 	struct rtmdio_bus_priv *priv;
 	struct mii_bus *bus;
@@ -1407,11 +1407,7 @@ static int rtmdio_probe(struct platform_device *pdev)
 	family = rtmdio_get_family();
 	dev_info(dev, "probing RTL%04x family mdio bus\n", family);
 
-	np = of_find_compatible_node(NULL, NULL, "realtek,rtl838x-eth");
-	if (!np)
-		return -ENODEV;
-
-	mii_np = of_get_child_by_name(np, "mdio-bus");
+	mii_np = of_get_child_by_name(dev->of_node, "mdio-bus");
 	if (!mii_np)
 		return -ENODEV;

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