[openwrt/openwrt] realtek: convert access to RTL931x "digital 2" serdes pages
LEDE Commits
lede-commits at lists.infradead.org
Mon Sep 1 15:52:41 PDT 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/207ab9c36af5f784cdc1562c88220472e95df878
commit 207ab9c36af5f784cdc1562c88220472e95df878
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Tue Aug 26 10:07:58 2025 -0400
realtek: convert access to RTL931x "digital 2" serdes pages
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own. We plan to provide
a consistent serdes mapping to all callers.
As the third step make use of these new functions whenever we want to
access the "digital 2" pages. The pages are mapped starting at 0x200.
So the function conversion is as simple as this:
Old:
dsds = (sds - 1) * 2;
rtmdio_931x_read_sds_phy(dsds + 1, page, ...)
New:
rtmdio_931x_read_sds_phy_new(sds, page + 0x200, ...)
Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19873
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../files-6.12/drivers/net/phy/rtl83xx-phy.c | 77 +++++++---------------
1 file changed, 23 insertions(+), 54 deletions(-)
diff --git a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
index 3a304d8ff1..8e816cc5de 100644
--- a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
+++ b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
@@ -2916,17 +2916,6 @@ static void rtl9310_sds_field_w(int sds, u32 page, u32 reg, int end_bit, int sta
rtmdio_931x_write_sds_phy(sds, page, reg, data);
}
-static u32 rtl9310_sds_field_r(int sds, u32 page, u32 reg, int end_bit, int start_bit)
-{
- int l = end_bit - start_bit + 1;
- u32 v = rtmdio_931x_read_sds_phy(sds, page, reg);
-
- if (l >= 32)
- return v;
-
- return (v >> start_bit) & (BIT(l) - 1);
-}
-
static void rtl9310_sds_field_w_new(int sds, u32 page, u32 reg, int end_bit, int start_bit, u32 v)
{
int l = end_bit - start_bit + 1;
@@ -2980,30 +2969,22 @@ static void rtl931x_symerr_clear(u32 sds, phy_interface_t mode)
case PHY_INTERFACE_MODE_NA:
break;
case PHY_INTERFACE_MODE_XGMII:
- u32 xsg_sdsid_0, xsg_sdsid_1;
-
- if (sds < 2)
- xsg_sdsid_0 = sds;
- else
- xsg_sdsid_0 = (sds - 1) * 2;
- xsg_sdsid_1 = xsg_sdsid_0 + 1;
-
for (int i = 0; i < 4; ++i) {
- rtl9310_sds_field_w(xsg_sdsid_0, 0x1, 24, 2, 0, i);
- rtl9310_sds_field_w(xsg_sdsid_0, 0x1, 3, 15, 8, 0x0);
- rtl9310_sds_field_w(xsg_sdsid_0, 0x1, 2, 15, 0, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x101, 24, 2, 0, i);
+ rtl9310_sds_field_w_new(sds, 0x101, 3, 15, 8, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x101, 2, 15, 0, 0x0);
}
for (int i = 0; i < 4; ++i) {
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 24, 2, 0, i);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 3, 15, 8, 0x0);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 2, 15, 0, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x201, 24, 2, 0, i);
+ rtl9310_sds_field_w_new(sds, 0x201, 3, 15, 8, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x201, 2, 15, 0, 0x0);
}
- rtl9310_sds_field_w(xsg_sdsid_0, 0x1, 0, 15, 0, 0x0);
- rtl9310_sds_field_w(xsg_sdsid_0, 0x1, 1, 15, 8, 0x0);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 0, 15, 0, 0x0);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 1, 15, 8, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x101, 0, 15, 0, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x101, 1, 15, 8, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x201, 0, 15, 0, 0x0);
+ rtl9310_sds_field_w_new(sds, 0x201, 1, 15, 8, 0x0);
break;
default:
break;
@@ -3285,7 +3266,7 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
0x0dc0, 0x01c0, 0x0200, 0x0180, 0x0160, 0x0123,
0x0123, 0x0163, 0x01a3, 0x01a0, 0x01c3, 0x09c3,
};
- u32 asds, dSds, ori, model_info, val;
+ u32 asds, ori, model_info, val;
int chiptype = 0;
asds = rtl931x_get_analog_sds(sds);
@@ -3296,10 +3277,10 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
pr_info("%s: set sds %d to mode %d\n", __func__, sds, mode);
val = rtl9310_sds_field_r_new(sds, 0x1F, 0x9, 11, 6);
- pr_info("%s: fibermode %08X stored mode 0x%x analog SDS %d", __func__,
- rtmdio_931x_read_sds_phy_new(sds, 0x1f, 0x9), val, asds);
- pr_info("%s: SGMII mode %08X in 0x24 0x9 analog SDS %d", __func__,
- rtmdio_931x_read_sds_phy_new(sds, 0x24, 0x9), asds);
+ pr_info("%s: fibermode %08X stored mode 0x%x", __func__,
+ rtmdio_931x_read_sds_phy_new(sds, 0x1f, 0x9), val);
+ pr_info("%s: SGMII mode %08X in 0x24 0x9", __func__,
+ rtmdio_931x_read_sds_phy_new(sds, 0x24, 0x9));
pr_info("%s: CMU mode %08X stored even SDS %d", __func__,
rtmdio_931x_read_sds_phy(asds & ~1, 0x20, 0x12), asds & ~1);
pr_info("%s: serdes_mode_ctrl %08X", __func__, RTL931X_SERDES_MODE_CTRL + 4 * (sds >> 2));
@@ -3307,7 +3288,7 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
pr_info("%s CMU page 0x26 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x26, 0x7));
pr_info("%s CMU page 0x28 0x7 %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x28, 0x7));
pr_info("%s XSG page 0x0 0xe %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x100, 0xe));
- pr_info("%s XSG2 page 0x0 0xe %08x\n", __func__, rtmdio_931x_read_sds_phy(dSds + 1, 0x0, 0xe));
+ pr_info("%s XSG2 page 0x0 0xe %08x\n", __func__, rtmdio_931x_read_sds_phy_new(sds, 0x200, 0xe));
model_info = sw_r32(RTL93XX_MODEL_NAME_INFO);
if ((model_info >> 4) & 0x1) {
@@ -3317,11 +3298,6 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
pr_info("detected chiptype 0\n");
}
- if (sds < 2)
- dSds = sds;
- else
- dSds = (sds - 1) * 2;
-
pr_info("%s: 2.5gbit %08X", __func__,
rtmdio_931x_read_sds_phy_new(sds, 0x101, 0x14));
@@ -3337,19 +3313,17 @@ void rtl931x_sds_init(u32 sds, phy_interface_t mode)
case PHY_INTERFACE_MODE_XGMII: /* MII_XSGMII */
if (chiptype) {
- u32 xsg_sdsid_1;
- xsg_sdsid_1 = dSds + 1;
/* fifo inv clk */
rtl9310_sds_field_w_new(sds, 0x101, 0x1, 7, 4, 0xf);
rtl9310_sds_field_w_new(sds, 0x101, 0x1, 3, 0, 0xf);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 0x1, 7, 4, 0xf);
- rtl9310_sds_field_w(xsg_sdsid_1, 0x1, 0x1, 3, 0, 0xf);
+ rtl9310_sds_field_w_new(sds, 0x201, 0x1, 7, 4, 0xf);
+ rtl9310_sds_field_w_new(sds, 0x201, 0x1, 3, 0, 0xf);
}
rtl9310_sds_field_w_new(sds, 0x100, 0xE, 12, 12, 1);
- rtl9310_sds_field_w(dSds + 1, 0x0, 0xE, 12, 12, 1);
+ rtl9310_sds_field_w_new(sds, 0x200, 0xE, 12, 12, 1);
break;
case PHY_INTERFACE_MODE_USXGMII: /* MII_USXGMII_10GSXGMII/10GDXGMII/10GQXGMII: */
@@ -3517,15 +3491,10 @@ int rtl931x_link_sts_get(u32 sds)
{
u32 sts, sts1, latch_sts, latch_sts1;
if (0){
- u32 xsg_sdsid_0, xsg_sdsid_1;
-
- xsg_sdsid_0 = sds < 2 ? sds : (sds - 1) * 2;
- xsg_sdsid_1 = xsg_sdsid_0 + 1;
-
- sts = rtl9310_sds_field_r(xsg_sdsid_0, 0x1, 29, 8, 0);
- sts1 = rtl9310_sds_field_r(xsg_sdsid_1, 0x1, 29, 8, 0);
- latch_sts = rtl9310_sds_field_r(xsg_sdsid_0, 0x1, 30, 8, 0);
- latch_sts1 = rtl9310_sds_field_r(xsg_sdsid_1, 0x1, 30, 8, 0);
+ sts = rtl9310_sds_field_r_new(sds, 0x101, 29, 8, 0);
+ sts1 = rtl9310_sds_field_r_new(sds, 0x201, 29, 8, 0);
+ latch_sts = rtl9310_sds_field_r_new(sds, 0x101, 30, 8, 0);
+ latch_sts1 = rtl9310_sds_field_r_new(sds, 0x201, 30, 8, 0);
} else {
sts = rtl9310_sds_field_r_new(sds, 0x5, 0, 12, 12);
latch_sts = rtl9310_sds_field_r_new(sds, 0x4, 1, 2, 2);
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