[openwrt/openwrt] treewide: dts: fix spi-gpio chip select GPIO polarity
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lede-commits at lists.infradead.org
Sun Oct 19 15:29:04 PDT 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c2e5bded8d0654ba6f696957cb493d607e36a8a6
commit c2e5bded8d0654ba6f696957cb493d607e36a8a6
Author: Shiji Yang <yangshiji66 at outlook.com>
AuthorDate: Mon Sep 1 09:17:49 2025 +0800
treewide: dts: fix spi-gpio chip select GPIO polarity
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.
[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
device node | cs-gpio | CS pin state active | Note
================+===============+=====================+=====
spi-cs-high | - | H |
- | - | L |
spi-cs-high | ACTIVE_HIGH | H |
- | ACTIVE_HIGH | L | 1
spi-cs-high | ACTIVE_LOW | H | 2
- | ACTIVE_LOW | L |
Notes:
1) Should print a warning about polarity inversion.
Here it would be wise to avoid and define the gpio as
ACTIVE_LOW.
2) Should print a warning about polarity inversion
because ACTIVE_LOW is overridden by spi-cs-high.
Should be generally avoided and be replaced by
spi-cs-high + ACTIVE_HIGH.
```
Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
target/linux/ath79/dts/ar7242_ubnt_sw.dtsi | 2 +-
target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts | 2 +-
target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts | 2 +-
target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts | 2 +-
target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi | 2 +-
target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts | 2 +-
.../ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts | 2 +-
target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi | 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/linux/ath79/dts/ar7242_ubnt_sw.dtsi b/target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
index 9834bf70c2..2d79e39062 100644
--- a/target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
+++ b/target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
@@ -46,7 +46,7 @@
sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
gpio_hc595: gpio_spi at 0 {
diff --git a/target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts b/target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts
index b46dbc98c2..ca005d3722 100644
--- a/target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts
+++ b/target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts
@@ -26,7 +26,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio at 0 {
diff --git a/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts b/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts
index b42ea4dbc2..d513f5a32a 100644
--- a/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts
+++ b/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts
@@ -39,7 +39,7 @@
sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio at 0 {
diff --git a/target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts b/target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts
index e4d9b99a60..c581386b29 100644
--- a/target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts
+++ b/target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts
@@ -25,7 +25,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio at 0 {
diff --git a/target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi b/target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
index 80e5db55e4..672c7cc62d 100644
--- a/target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
+++ b/target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
@@ -23,7 +23,7 @@
sck-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
led_gpio: led_gpio at 0 {
diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
index 05dd95474e..d567af0094 100644
--- a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
+++ b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
@@ -25,7 +25,7 @@
sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
- cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
+ cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>; // 74HC595 RCLK (Register Clock)
num-chipselects = <1>;
led_gpio: led_gpio at 0 {
diff --git a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
index 63f465c9c2..9bc9126ccd 100644
--- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
+++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
@@ -119,7 +119,7 @@
gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
shift_io: shift_io at 0 {
diff --git a/target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi b/target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi
index 72835ae826..ed983e9ff4 100644
--- a/target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi
+++ b/target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi
@@ -24,7 +24,7 @@
sck-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
- cs-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
gpio_hc595: gpio_hc595 at 0 {
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