[openwrt/openwrt] realtek: rtl930x: add XGS1250-12 B1 device
LEDE Commits
lede-commits at lists.infradead.org
Mon Oct 6 15:27:17 PDT 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/133c91823cfb238c89c6a1b03032052cb09c2e57
commit 133c91823cfb238c89c6a1b03032052cb09c2e57
Author: Thomas Martitz <thomas.martitz at mailbox.org>
AuthorDate: Wed Sep 24 14:49:07 2025 +0200
realtek: rtl930x: add XGS1250-12 B1 device
The A1 and B1 devices are largely the same. The differences
seem to be:
- RTL8218D (A1) vs RTL8218E (B1) PHY for the eight 1 Gbps TP ports
- Aquantia (A1) vs RTL8261N (B1) PHY for the three 10 Gbps TP ports
RTL8218D/E share the same driver and support was added already by
commit c8c187f0f0 ("realtek: add support for RTL8218E").
The RTL8261N is also already supported but it's located at
different addresses compared to the A1 device. This requires
the device tree to be split. As a result, the devices are require
different images.
I found the smi addresses on the forum:
https://forum.openwrt.org/t/support-for-rtl838x-based-managed-switches/57875/3622
And I can conform on my B1 device that this is working.
Co-developed-by: Mathias Kresin <dev at kresin.me>
Signed-off-by: Thomas Martitz <thomas.martitz at mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20150
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts | 378 +--------------------
.../realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts | 38 +++
...a1.dts => rtl9302_zyxel_xgs1250-12-common.dtsi} | 33 +-
target/linux/realtek/image/rtl930x.mk | 16 +-
4 files changed, 53 insertions(+), 412 deletions(-)
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
index 2bc69cd2ea..f69e3ba16c 100644
--- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
@@ -1,270 +1,14 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;
-#include "rtl930x.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/thermal/thermal.h>
+#include "rtl9302_zyxel_xgs1250-12-common.dtsi"
/ {
compatible = "zyxel,xgs1250-12-a1", "realtek,rtl838x-soc";
model = "Zyxel XGS1250-12 A1 Switch";
-
- aliases {
- led-boot = &led_pwr_sys;
- led-failsafe = &led_pwr_sys;
- led-running = &led_pwr_sys;
- led-upgrade = &led_pwr_sys;
- };
-
- keys {
- compatible = "gpio-keys";
-
- mode {
- label = "reset";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinmux_disable_sys_led>;
-
- led_pwr_sys: led-0 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_POWER;
- gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sfp0: sfp-p12 {
- compatible = "sff,sfp";
- i2c-bus = <&i2c0>;
- los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
- };
-
- led_set: led_set {
- compatible = "realtek,rtl9300-leds";
- active-low;
-
- led_set0 = <0x0a20 0x0b80>; // LED set 0: 1000Mbps, 10/100Mbps
- led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
- // (5G, 10/100) (10G, 5G, 2.5G)
- led_set2 = <0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
- };
-
- thermal-zones {
- phy24-thermal {
- /* Poll every 10 seconds */
- polling-delay-passive = <10000>;
- polling-delay = <10000>;
- thermal-sensors = <&phy24>;
-
- trips {
- phy24_trip0: phy24-trip0 {
- /* At 80 degrees turn on fan */
- temperature = <80000>;
- hysteresis = <1000>;
- type = "active";
- };
-
- phy24_trip1: phy24-trip1 {
- /* At 108 degrees phys exceed spec */
- temperature = <108000>;
- hysteresis = <5000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map {
- trip = <&phy24_trip0>;
- cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- phy25-thermal {
- /* Poll every 10 seconds */
- polling-delay-passive = <10000>;
- polling-delay = <10000>;
- thermal-sensors = <&phy25>;
-
- trips {
- phy25_trip0: phy25-trip0 {
- /* At 80 degrees turn on fan */
- temperature = <80000>;
- hysteresis = <1000>;
- type = "active";
- };
-
- phy25_trip1: phy25-trip1 {
- /* At 108 degrees phys exceed spec */
- temperature = <108000>;
- hysteresis = <5000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map {
- trip = <&phy25_trip0>;
- cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- phy26-thermal {
- /* Poll every 10 seconds */
- polling-delay-passive = <10000>;
- polling-delay = <10000>;
- thermal-sensors = <&phy26>;
-
- trips {
- phy26_trip0: phy26-trip0 {
- /* At 80 degrees turn on fan */
- temperature = <80000>;
- hysteresis = <1000>;
- type = "active";
- };
-
- phy26_trip1: phy26-trip1 {
- /* At 108 degrees phys exceed spec */
- temperature = <108000>;
- hysteresis = <5000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map {
- trip = <&phy26_trip0>;
- cooling-device = <&chassis_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- /* YEN SUN TECHNOLOGY FD122510LL-N fan */
- chassis_fan: gpio-fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = <0 0
- 7000 1>;
- #cooling-cells = <2>;
- };
-};
-
-&i2c_mst1 {
- status = "okay";
-
- /* i2c of the SFP+ cage; port 12 */
- i2c0: i2c at 1 {
- reg = <1>;
- };
-};
-
-&spi0 {
- status = "okay";
- flash at 0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <10000000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "u-boot";
- reg = <0x0 0xe0000>;
- read-only;
- };
- partition at e0000 {
- label = "u-boot-env";
- reg = <0xe0000 0x10000>;
- };
- partition at f0000 {
- label = "u-boot-env2";
- reg = <0xf0000 0x10000>;
- read-only;
- };
- partition at 100000 {
- label = "jffs";
- reg = <0x100000 0x100000>;
- };
- partition at 200000 {
- label = "jffs2";
- reg = <0x200000 0x100000>;
- };
- partition at b300000 {
- label = "firmware";
- reg = <0x300000 0xce0000>;
- compatible = "openwrt,uimage", "denx,uimage";
- openwrt,ih-magic = <0x93001250>;
- };
- partition at fe0000 {
- label = "log";
- reg = <0xfe0000 0x20000>;
- };
- };
- };
};
&mdio_bus0 {
- /* External RTL8218D PHY */
- phy0: ethernet-phy at 0 {
- reg = <0>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 0>;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
- phy1: ethernet-phy at 1 {
- reg = <1>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 1>;
- };
- phy2: ethernet-phy at 2 {
- reg = <2>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 2>;
- };
- phy3: ethernet-phy at 3 {
- reg = <3>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 3>;
- };
- phy4: ethernet-phy at 4 {
- reg = <4>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 4>;
- };
- phy5: ethernet-phy at 5 {
- reg = <5>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 5>;
- };
- phy6: ethernet-phy at 6 {
- reg = <6>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 6>;
- };
- phy7: ethernet-phy at 7 {
- reg = <7>;
- compatible = "ethernet-phy-ieee802.3-c22";
- rtl9300,smi-address = <0 7>;
- };
-
/* External Aquantia 113C PHYs */
phy24: ethernet-phy at 24 {
reg = <24>;
@@ -292,124 +36,4 @@
// reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
#thermal-sensor-cells = <0>;
};
-
- INTERNAL_PHY(27)
-};
-
-&switch0 {
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- label = "lan1";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy0>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 1 {
- reg = <1>;
- label = "lan2";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy1>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 2 {
- reg = <2>;
- label = "lan3";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy2>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 3 {
- reg = <3>;
- label = "lan4";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy3>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 4 {
- reg = <4>;
- label = "lan5";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy4>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 5 {
- reg = <5>;
- label = "lan6";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy5>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 6 {
- reg = <6>;
- label = "lan7";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy6>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
- port at 7 {
- reg = <7>;
- label = "lan8";
- pcs-handle = <&serdes2>;
- phy-handle = <&phy7>;
- phy-mode = "usxgmii";
- led-set = <0>;
- };
-
- port at 24 {
- reg = <24>;
- label = "lan9";
- pcs-handle = <&serdes6>;
- phy-handle = <&phy24>;
- phy-mode = "usxgmii";
- led-set = <1>;
- };
- port at 25 {
- reg = <25>;
- label = "lan10";
- pcs-handle = <&serdes7>;
- phy-handle = <&phy25>;
- phy-mode = "usxgmii";
- led-set = <1>;
- };
- port at 26 {
- reg = <26>;
- label = "lan11";
- pcs-handle = <&serdes8>;
- phy-handle = <&phy26>;
- phy-mode = "usxgmii";
- led-set = <1>;
- };
-
- port at 27 {
- reg = <27>;
- label = "lan12";
- pcs-handle = <&serdes9>;
- phy-handle = <&phy27>;
- phy-mode = "1000base-x";
- sfp = <&sfp0>;
- led-set = <2>;
- managed = "in-band-status";
- };
-
- port at 28 {
- ethernet = <ðernet0>;
- reg = <28>;
- phy-mode = "internal";
- fixed-link {
- speed = <10000>;
- full-duplex;
- };
- };
- };
};
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts
new file mode 100644
index 0000000000..d04cc39eb8
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl9302_zyxel_xgs1250-12-common.dtsi"
+
+/ {
+ compatible = "zyxel,xgs1250-12-b1", "realtek,rtl838x-soc";
+ model = "Zyxel XGS1250-12 B1 Switch";
+};
+
+&mdio_bus0 {
+ phy24: ethernet-phy at 24 {
+ reg = <24>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 0>;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ phy25: ethernet-phy at 25 {
+ reg = <25>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <2 1>;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ phy26: ethernet-phy at 26 {
+ reg = <26>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 2>;
+ // Disabled because we do not know how to bring up again
+ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+ #thermal-sensor-cells = <0>;
+ };
+};
diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-common.dtsi
similarity index 88%
copy from target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
copy to target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-common.dtsi
index 2bc69cd2ea..e78c723bbd 100644
--- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts
+++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-common.dtsi
@@ -9,9 +9,6 @@
#include <dt-bindings/thermal/thermal.h>
/ {
- compatible = "zyxel,xgs1250-12-a1", "realtek,rtl838x-soc";
- model = "Zyxel XGS1250-12 A1 Switch";
-
aliases {
led-boot = &led_pwr_sys;
led-failsafe = &led_pwr_sys;
@@ -221,7 +218,7 @@
};
&mdio_bus0 {
- /* External RTL8218D PHY */
+ /* External RTL8218D or RTL8218E PHY */
phy0: ethernet-phy at 0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c22";
@@ -265,34 +262,6 @@
rtl9300,smi-address = <0 7>;
};
- /* External Aquantia 113C PHYs */
- phy24: ethernet-phy at 24 {
- reg = <24>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <1 8>;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
-
- phy25: ethernet-phy at 25 {
- reg = <25>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <2 8>;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
-
- phy26: ethernet-phy at 26 {
- reg = <26>;
- compatible = "ethernet-phy-ieee802.3-c45";
- rtl9300,smi-address = <3 8>;
- // Disabled because we do not know how to bring up again
- // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- #thermal-sensor-cells = <0>;
- };
-
INTERNAL_PHY(27)
};
diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk
index e20c863a16..2e25b48110 100644
--- a/target/linux/realtek/image/rtl930x.mk
+++ b/target/linux/realtek/image/rtl930x.mk
@@ -114,15 +114,13 @@ define Device/zyxel_xgs1210-12-a1
endef
TARGET_DEVICES += zyxel_xgs1210-12-a1
-define Device/zyxel_xgs1250-12-a1
+define Device/zyxel_xgs1250-12-common
SOC := rtl9302
UIMAGE_MAGIC := 0x93001250
ZYXEL_VERS := ABWE
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := XGS1250-12
- DEVICE_VARIANT := A1
DEVICE_PACKAGES := kmod-hwmon-gpiofan kmod-thermal
- SUPPORTED_DEVICES += zyxel,xgs1250-12
IMAGE_SIZE := 13312k
KERNEL_INITRAMFS := \
kernel-bin | \
@@ -131,4 +129,16 @@ define Device/zyxel_xgs1250-12-a1
zyxel-vers | \
uImage gzip
endef
+
+define Device/zyxel_xgs1250-12-a1
+ $(Device/zyxel_xgs1250-12-common)
+ SUPPORTED_DEVICES += zyxel,xgs1250-12
+ DEVICE_VARIANT := A1
+endef
TARGET_DEVICES += zyxel_xgs1250-12-a1
+
+define Device/zyxel_xgs1250-12-b1
+ $(Device/zyxel_xgs1250-12-common)
+ DEVICE_VARIANT := B1
+endef
+TARGET_DEVICES += zyxel_xgs1250-12-b1
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