[openwrt/openwrt] realtek: rtl931x: Add support for Plasma Cloud PSX28 Switch
LEDE Commits
lede-commits at lists.infradead.org
Sat Oct 4 07:17:13 PDT 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2b5555c1950d42843f0896b321d97e1555ac9865
commit 2b5555c1950d42843f0896b321d97e1555ac9865
Author: Harshal Gohel <hg at simonwunderlich.de>
AuthorDate: Mon Jul 14 18:00:58 2025 +0200
realtek: rtl931x: Add support for Plasma Cloud PSX28 Switch
The Plasma Cloud PSX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
- RTL8239 POE++ PSE controller with frontend MCU
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_psx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg at simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se at simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se at simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../realtek/base-files/etc/board.d/02_network | 1 +
.../realtek/base-files/etc/init.d/hwmon_fancontrol | 44 ++
.../realtek/base-files/lib/upgrade/platform.sh | 3 +-
.../lib/upgrade/upgrade_dualboot_plasmacloud.sh | 15 +
.../realtek/dts/rtl9312_plasmacloud_common.dtsi | 612 +++++++++++++++++++++
.../realtek/dts/rtl9312_plasmacloud_psx28.dts | 24 +
target/linux/realtek/image/rtl931x.mk | 25 +
7 files changed, 723 insertions(+), 1 deletion(-)
diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 0586e9e396..f44ceb18d1 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -49,6 +49,7 @@ hpe,1920-48g-poe)
;;
plasmacloud,psx8|\
plasmacloud,psx10|\
+plasmacloud,psx28|\
tplink,sg2008p-v1|\
tplink,sg2210p-v3|\
tplink,sg2452p-v4|\
diff --git a/target/linux/realtek/base-files/etc/init.d/hwmon_fancontrol b/target/linux/realtek/base-files/etc/init.d/hwmon_fancontrol
new file mode 100755
index 0000000000..781bec666e
--- /dev/null
+++ b/target/linux/realtek/base-files/etc/init.d/hwmon_fancontrol
@@ -0,0 +1,44 @@
+#!/bin/sh /etc/rc.common
+
+START=18
+
+plasmacloud_common() {
+ # configuring onboard temp/fan controller to run the fan on its own
+ # for more information, please read https://www.kernel.org/doc/Documentation/hwmon/sysfs-interface
+
+ local path_to_hwmon="$(find /sys/devices/platform/1b000000.switchcore/1b000000.switchcore:i2c at 100c/i2c-4/4-002e/hwmon/ -type d -maxdepth 1 -mindepth 1 -name 'hwmon*')"
+
+ # adt7476 fan control chip
+ # 3 temp sensors. Set to lowest speed at 35C and max speed at 70C
+ # set critical temp to 80 as per the datasheet
+ echo 7 > "$path_to_hwmon/pwm2_auto_channels_temp"
+ echo 1 > "$path_to_hwmon/pwm2_auto_point1_pwm"
+ echo 255 > "$path_to_hwmon/pwm2_auto_point2_pwm"
+ echo 22500 > "$path_to_hwmon/pwm2_freq"
+
+ echo 80000 > "$path_to_hwmon/temp1_crit"
+ echo 80000 > "$path_to_hwmon/temp2_crit"
+ echo 80000 > "$path_to_hwmon/temp3_crit"
+
+ echo 75000 > "$path_to_hwmon/temp1_crit_hyst"
+ echo 75000 > "$path_to_hwmon/temp2_crit_hyst"
+ echo 75000 > "$path_to_hwmon/temp3_crit_hyst"
+
+ echo 50000 > "$path_to_hwmon/temp1_auto_point1_temp"
+ echo 50000 > "$path_to_hwmon/temp2_auto_point1_temp"
+ echo 50000 > "$path_to_hwmon/temp3_auto_point1_temp"
+
+ echo 70000 > "$path_to_hwmon/temp1_auto_point2_temp"
+ echo 70000 > "$path_to_hwmon/temp2_auto_point2_temp"
+ echo 70000 > "$path_to_hwmon/temp3_auto_point2_temp"
+
+ echo 2 > "$path_to_hwmon/pwm2_enable"
+}
+
+boot() {
+ case $(board_name) in
+ plasmacloud,psx28)
+ plasmacloud_common
+ ;;
+ esac
+}
diff --git a/target/linux/realtek/base-files/lib/upgrade/platform.sh b/target/linux/realtek/base-files/lib/upgrade/platform.sh
index b4236cdf42..d443b8a32f 100644
--- a/target/linux/realtek/base-files/lib/upgrade/platform.sh
+++ b/target/linux/realtek/base-files/lib/upgrade/platform.sh
@@ -28,7 +28,8 @@ platform_do_upgrade() {
case "$board" in
plasmacloud,psx8|\
- plasmacloud,psx10)
+ plasmacloud,psx10|\
+ plasmacloud,psx28)
PART_NAME="inactive"
platform_do_upgrade_dualboot_plasmacloud "$1"
;;
diff --git a/target/linux/realtek/base-files/lib/upgrade/upgrade_dualboot_plasmacloud.sh b/target/linux/realtek/base-files/lib/upgrade/upgrade_dualboot_plasmacloud.sh
index 4b390869e5..085869d88c 100644
--- a/target/linux/realtek/base-files/lib/upgrade/upgrade_dualboot_plasmacloud.sh
+++ b/target/linux/realtek/base-files/lib/upgrade/upgrade_dualboot_plasmacloud.sh
@@ -17,6 +17,18 @@ set_boot_part() {
return 1
fi
;;
+ plasmacloud,psx28)
+ if [ "$part_num" = "1" ]; then
+ echo "bootargs mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(firmware1),13376k(inactive)" > $setenv_script
+ echo "bootcmd rtk init; bootm 0xb45e0000" >> $setenv_script
+ elif [ "$part_num" = "2" ]; then
+ echo "bootargs mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)" > $setenv_script
+ echo "bootcmd rtk init; bootm 0xb52f0000" >> $setenv_script
+ else
+ echo "Partition number $part_num is not supported for ${board}" 2>&1
+ return 1
+ fi
+ ;;
*)
echo "${board} is not supported for dual boot" 1>&2
return 1
@@ -61,6 +73,9 @@ platform_do_upgrade_dualboot_plasmacloud() {
plasmacloud,psx10)
primary_firmware_mtd=3
;;
+ plasmacloud,psx28)
+ primary_firmware_mtd=4
+ ;;
*)
echo "failed to detect primary firmware mtd partition for board" 2>&1
return 1
diff --git a/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi
new file mode 100644
index 0000000000..332dd4379d
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi
@@ -0,0 +1,612 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl931x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ chosen {
+ /* get active mtdparts from u-boot */
+ /delete-property/ bootargs;
+ };
+
+ aliases {
+ led-boot = &led_status;
+ led-running = &led_status;
+ led-failsafe = &led_status;
+ led-upgrade = &led_status;
+ label-mac-device = ðernet0;
+ };
+
+ memory at 0 {
+ reg = <0x00000000 0x10000000>, /* low mem 256 MiB */
+ <0x90000000 0x10000000>; /* high mem 256 MiB */
+ };
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ mode {
+ label = "reset";
+ gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ sfp0: sfp-lan25 {
+ compatible = "sff,sfp";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_disable_spi0>;
+
+ i2c-bus = <&i2c0>;
+ los-gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio0 9 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ sfp1: sfp-lan26 {
+ compatible = "sff,sfp";
+ pinctrl-names = "default";
+
+ pinctrl-0 = <&pinmux_disable_spi0_cs0>,
+ <&pinmux_disable_spi0_cs1>;
+ i2c-bus = <&i2c1>;
+
+ los-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ };
+
+ sfp2: sfp-lan27 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c2>;
+ los-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio0 22 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ sfp3: sfp-lan28 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c3>;
+ los-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio0 25 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_disable_sys_led>;
+
+ led_status: led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_ALARM;
+ gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ led_set at 0 {
+ compatible = "realtek,rtl9300-leds";
+ active-low;
+ led_set0 = <(RTL93XX_LED_SET_2P5G | RTL93XX_LED_SET_LINK |
+ RTL93XX_LED_SET_ACT)
+ (RTL93XX_LED_SET_1G | RTL93XX_LED_SET_100M |
+ RTL93XX_LED_SET_10M | RTL93XX_LED_SET_LINK |
+ RTL93XX_LED_SET_ACT)>;
+ led_set1 = <(RTL93XX_LED_SET_1G | RTL93XX_LED_SET_LINK |
+ RTL93XX_LED_SET_ACT)
+ (RTL93XX_LED_SET_10G | RTL93XX_LED_SET_LINK |
+ RTL93XX_LED_SET_ACT)>;
+ };
+};
+
+&i2c_mst1 {
+ status = "okay";
+
+ /* i2c of the SFP+ cage on port 24 */
+ i2c0: i2c at 0 {
+ reg = <0>;
+ };
+
+ /* i2c of the SFP+ cage on port 25 */
+ i2c1: i2c at 1 {
+ reg = <1>;
+ };
+
+ /* i2c of the SFP+ cage on port 26 */
+ i2c2: i2c at 2 {
+ reg = <2>;
+ };
+
+ /* i2c of the SFP+ cage on port 27 */
+ i2c3: i2c at 3 {
+ reg = <3>;
+ };
+
+ /* i2c of adt7476 hwmonitor */
+ i2c at 4 {
+ reg = <4>;
+
+ adt7476 at 2e {
+ compatible = "adi,adt7476";
+ reg = <0x2e>;
+ };
+ };
+};
+
+&mdio_aux {
+ status = "okay";
+
+ gpio1: expander at 24 {
+ compatible = "realtek,rtl8231";
+ reg = <24>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&gpio1 0 0 37>;
+
+ led-controller {
+ compatible = "realtek,rtl8231-leds";
+ status = "disabled";
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "u-boot";
+ reg = <0x0 0xc0000>;
+ read-only;
+ };
+
+ partition at c0000 {
+ label = "u-boot-env";
+ reg = <0xc0000 0x10000>;
+
+ nvmem-layout {
+ compatible = "u-boot,env";
+
+ macaddr_ubootenv_ethaddr: ethaddr {
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition at d0000 {
+ label = "u-boot-env2";
+ reg = <0xd0000 0x10000>;
+ };
+
+ partition at e0000 {
+ label = "reserved";
+ reg = <0xe0000 0x500000>;
+ };
+
+ partition at 5e0000 {
+ label = "firmware1";
+ reg = <0x5e0000 0xd10000>;
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <0x93100000>;
+ };
+
+ partition at 12f0000 {
+ label = "firmware2";
+ reg = <0x12f0000 0xd10000>;
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <0x93100000>;
+ };
+ };
+ };
+};
+
+ðernet0 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+&mdio_ctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
+ <&pinmux_enable_mdc_mdio_1>;
+};
+
+&mdio_bus0 {
+ /* External RTL8224 PHY */
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 0>;
+ };
+
+ phy1: ethernet-phy at 1 {
+ reg = <1>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 1>;
+ };
+
+ phy4: ethernet-phy at 4 {
+ reg = <4>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 2>;
+ };
+
+ phy5: ethernet-phy at 5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 3>;
+ };
+
+ phy8: ethernet-phy at 8 {
+ reg = <8>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 4>;
+ };
+
+ phy9: ethernet-phy at 9 {
+ reg = <9>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 5>;
+ };
+
+ phy12: ethernet-phy at 12 {
+ reg = <12>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 6>;
+ };
+
+ phy13: ethernet-phy at 13 {
+ reg = <13>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 7>;
+ };
+
+ phy16: ethernet-phy at 16 {
+ reg = <16>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 8>;
+ };
+
+ phy17: ethernet-phy at 17 {
+ reg = <17>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 9>;
+ };
+
+ phy20: ethernet-phy at 20 {
+ reg = <20>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 10>;
+ };
+
+ phy21: ethernet-phy at 21 {
+ reg = <21>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 11>;
+ };
+
+ phy24: ethernet-phy at 24 {
+ reg = <24>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 12>;
+ };
+
+ phy25: ethernet-phy at 25 {
+ reg = <25>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 13>;
+ };
+
+ phy28: ethernet-phy at 28 {
+ reg = <28>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 14>;
+ };
+
+ phy29: ethernet-phy at 29 {
+ reg = <29>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 15>;
+ };
+
+ phy32: ethernet-phy at 32 {
+ reg = <32>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 16>;
+ };
+
+ phy33: ethernet-phy at 33 {
+ reg = <33>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 17>;
+ };
+
+ phy36: ethernet-phy at 36 {
+ reg = <36>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 18>;
+ };
+
+ phy37: ethernet-phy at 37 {
+ reg = <37>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 19>;
+ };
+
+ phy40: ethernet-phy at 40 {
+ reg = <40>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 20>;
+ };
+
+ phy41: ethernet-phy at 41 {
+ reg = <41>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 21>;
+ };
+
+ phy44: ethernet-phy at 44 {
+ reg = <44>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 22>;
+ };
+
+ phy45: ethernet-phy at 45 {
+ reg = <45>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <1 23>;
+ };
+
+ /* fiber */
+ INTERNAL_PHY(48)
+ INTERNAL_PHY(50)
+ INTERNAL_PHY(52)
+ INTERNAL_PHY(53)
+};
+
+&switch0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* copper ethernet */
+ SWITCH_PORT_SDS(0, 1, 2, 10g-qxgmii)
+ SWITCH_PORT_SDS(1, 2, 2, 10g-qxgmii)
+ SWITCH_PORT_SDS(4, 3, 2, 10g-qxgmii)
+ SWITCH_PORT_SDS(5, 4, 2, 10g-qxgmii)
+ SWITCH_PORT_SDS(8, 5, 3, 10g-qxgmii)
+ SWITCH_PORT_SDS(9, 6, 3, 10g-qxgmii)
+ SWITCH_PORT_SDS(12, 7, 3, 10g-qxgmii)
+ SWITCH_PORT_SDS(13, 8, 3, 10g-qxgmii)
+ SWITCH_PORT_SDS(16, 9, 4, 10g-qxgmii)
+ SWITCH_PORT_SDS(17, 10, 4, 10g-qxgmii)
+ SWITCH_PORT_SDS(20, 11, 4, 10g-qxgmii)
+ SWITCH_PORT_SDS(21, 12, 4, 10g-qxgmii)
+ SWITCH_PORT_SDS(24, 13, 5, 10g-qxgmii)
+ SWITCH_PORT_SDS(25, 14, 5, 10g-qxgmii)
+ SWITCH_PORT_SDS(28, 15, 5, 10g-qxgmii)
+ SWITCH_PORT_SDS(29, 16, 5, 10g-qxgmii)
+ SWITCH_PORT_SDS(32, 17, 6, 10g-qxgmii)
+ SWITCH_PORT_SDS(33, 18, 6, 10g-qxgmii)
+ SWITCH_PORT_SDS(36, 19, 6, 10g-qxgmii)
+ SWITCH_PORT_SDS(37, 20, 6, 10g-qxgmii)
+ SWITCH_PORT_SDS(40, 21, 7, 10g-qxgmii)
+ SWITCH_PORT_SDS(41, 22, 7, 10g-qxgmii)
+ SWITCH_PORT_SDS(44, 23, 7, 10g-qxgmii)
+ SWITCH_PORT_SDS(45, 24, 7, 10g-qxgmii)
+
+ port at 48 {
+ reg = <48>;
+ label = "lan25";
+ pcs-handle = <&serdes8>;
+ phy-handle = <&phy48>;
+ phy-mode = "1000base-x";
+ sfp = <&sfp0>;
+ led-set = <1>;
+ managed = "in-band-status";
+
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 25>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ port at 50 {
+ reg = <50>;
+ label = "lan26";
+ pcs-handle = <&serdes9>;
+ phy-handle = <&phy50>;
+ phy-mode = "1000base-x";
+ sfp = <&sfp1>;
+ led-set = <1>;
+ managed = "in-band-status";
+
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 26>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ port at 52 {
+ reg = <52>;
+ label = "lan27";
+ pcs-handle = <&serdes10>;
+ phy-handle = <&phy52>;
+ phy-mode = "1000base-x";
+ sfp = <&sfp2>;
+ led-set = <1>;
+ managed = "in-band-status";
+
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 27>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ port at 53 {
+ reg = <53>;
+ label = "lan28";
+ pcs-handle = <&serdes11>;
+ phy-handle = <&phy53>;
+ phy-mode = "1000base-x";
+ sfp = <&sfp3>;
+ led-set = <1>;
+ managed = "in-band-status";
+
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 28>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ /* cpu */
+ port at 56 {
+ ethernet = <ðernet0>;
+ reg = <56>;
+ phy-mode = "internal";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
+&port0 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 1>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port1 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 2>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port4 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 3>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port5 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 4>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port8 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 5>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port9 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 6>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port12 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 7>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port13 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 8>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port16 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 9>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port17 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 10>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port20 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 11>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port21 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 12>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port24 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 13>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port25 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 14>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port28 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 15>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port29 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 16>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port32 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 17>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port33 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 18>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port36 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 19>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port37 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 20>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port40 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 21>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port41 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 22>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port44 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 23>;
+ nvmem-cell-names = "mac-address";
+};
+
+&port45 {
+ nvmem-cells = <&macaddr_ubootenv_ethaddr 24>;
+ nvmem-cell-names = "mac-address";
+};
diff --git a/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts b/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts
new file mode 100644
index 0000000000..c7d36be3fe
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9312_plasmacloud_psx28.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl9312_plasmacloud_common.dtsi"
+
+/ {
+ compatible = "plasmacloud,psx28", "realtek,rtl9312-soc";
+ model = "Plasma Cloud PSX28";
+
+ leds {
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = "alarm-poe";
+ gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&i2c_mst1 {
+ /* i2c for rtl8239 PoE PSE Chip */
+ i2c at 5 {
+ reg = <5>;
+ };
+};
diff --git a/target/linux/realtek/image/rtl931x.mk b/target/linux/realtek/image/rtl931x.mk
index a4e40e534e..b855c9f080 100644
--- a/target/linux/realtek/image/rtl931x.mk
+++ b/target/linux/realtek/image/rtl931x.mk
@@ -1 +1,26 @@
# SPDX-License-Identifier: GPL-2.0-only
+
+define Device/plasmacloud-common
+ SOC := rtl9312
+ UIMAGE_MAGIC := 0x93100000
+ DEVICE_VENDOR := Plasma Cloud
+ IMAGE_SIZE := 13376k
+ BLOCKSIZE := 64k
+ DEVICE_PACKAGES := kmod-hwmon-adt7475
+ KERNEL_INITRAMFS := \
+ kernel-bin | \
+ append-dtb | \
+ lzma | \
+ uImage lzma
+ KERNEL := kernel-bin | append-dtb | lzma | uImage lzma | pad-to $$(BLOCKSIZE)
+ IMAGES += factory.bin
+ IMAGE/factory.bin := append-kernel | append-rootfs | pad-rootfs | check-size
+ IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
+endef
+
+define Device/plasmacloud_psx28
+ $(Device/plasmacloud-common)
+ DEVICE_MODEL := PSX28
+ DEVICE_PACKAGES += poemgr
+endef
+TARGET_DEVICES += plasmacloud_psx28
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