[openwrt/openwrt] mediatek: filogic: add support for ASUS TUF-AX4200Q
LEDE Commits
lede-commits at lists.infradead.org
Sun Nov 30 09:46:40 PST 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e7086d7a2fc00410df079b4897a47a823a36068d
commit e7086d7a2fc00410df079b4897a47a823a36068d
Author: Brian Lee <larte332 at gmail.com>
AuthorDate: Fri Nov 28 14:37:15 2025 +0900
mediatek: filogic: add support for ASUS TUF-AX4200Q
ASUS TUF-AX4200Q(TUF 小旋风Pro WiFi6 AX4200) is a home router that adds an additional 2.5G Ethernet port to ASUS TUF-AX4200.
Hardware
- - - - - - - -
- SOC : MediaTek MT7986
- RAM : 512MB DDR3
- FLASH : 256MB SPI-NAND (Winbond W25N02KV)
- WIFI : Mediatek MT7986 DBDC 802.11ax 2.4/5 GHz
- ETH : MediaTek MT7531 Switch
MaxLinear GPY211C 2.5 N-Base-T PHY (WAN)
MaxLinear GPY211C 2.5 N-Base-T PHY (LAN)
- UART : 3V3 115200 8N1 (Pinout silkscreened / Do not ocnnect VCC)
Installation
- - - - - - - -
Vendor-UI Method:
1. Download or make the OpenWrt initramfs.trx image
2. Connect the PC via LAN to one of the yellow router ports and wait until your PC to get a DHCP lease.
3. Browse to http://192.168.50.1/
4. If your router is brand new, finish the setup process and log into the Web-UI.
5. Navigate to Administration -> Firmware Upgrade and upload the downloaded OpenWrt image.
6. Wait for OpenWrt to boot. Transfer the sysupgrade image to the device using SCP and install using sysupgrade.
$ sysupgrade -n <path-to-sysupgrade.bin>
TFTP Method:
1. Download the OpenWrt initramfs image.
Copy the image to a TFTP server reachable at 192.168.1.70/24.
Rename the image to tufax4200q.bin.
2. Connect the PC with TFTP server to the TUF-AX4200Q.
Set a static ip on the ethernet interface of your PC.
(IP address: 192.168.1.70, subnet mask: 255.255.255.0)
Connect to the serial console,
interrupt the autoboot process by pressing '4' when prompted.
3. Download & Boot the OpenWrt initramfs image.
$ setenv ipaddr 192.168.1.1
$ setenv serverip 192.168.1.70
$ tftpboot 0x46000000 tufax4200q.bin
$ bootm 0x46000000
4. Wait for OpenWrt to boot.
Transfer the sysupgrade image to the device using SCP and install using sysupgrade.
$ sysupgrade -n <path-to-sysupgrade.bin>
(based on support for ASUS RT-AX52 by achterin and trx image generation by remittor)
Signed-off-by: Brian Lee <larte332 at gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20900
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../mediatek/dts/mt7986a-asus-tuf-ax4200q.dts | 435 +++++++++++++++++++++
.../filogic/base-files/etc/board.d/01_leds | 1 +
.../filogic/base-files/etc/board.d/02_network | 1 +
.../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 1 +
.../base-files/lib/preinit/10_fix_eth_mac.sh | 1 +
.../filogic/base-files/lib/upgrade/platform.sh | 2 +
target/linux/mediatek/image/filogic.mk | 22 ++
7 files changed, 463 insertions(+)
diff --git a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200q.dts b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200q.dts
new file mode 100644
index 0000000000..3161d53076
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200q.dts
@@ -0,0 +1,435 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#include "mt7986a.dtsi"
+
+/ {
+ model = "ASUS TUF-AX4200Q";
+ compatible = "asus,tuf-ax4200q", "mediatek,mt7986a";
+
+ aliases {
+ serial0 = &uart0;
+ label-mac-device = &gmac0;
+ led-boot = &led_system;
+ led-failsafe = &led_system;
+ led-running = &led_system;
+ led-upgrade = &led_system;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs-override = "";
+ };
+
+ memory at 40000000 {
+ reg = <0 0x40000000 0 0x20000000>;
+ device_type = "memory";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ mesh {
+ label = "wps";
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wlan {
+ function = LED_FUNCTION_WLAN;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ led_system: system {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan-red {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac at 0 {
+ /* LAN */
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ nvmem-cells = <&macaddr_factory_4>;
+ nvmem-cell-names = "mac-address";
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mac at 1 {
+ /* WAN */
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "2500base-x";
+ phy-handle = <&phy6>;
+ };
+
+ mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <50000>;
+ reset-post-delay-us = <20000>;
+
+ phy5: phy at 5 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <5>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led at 0 {
+ reg = <0>;
+ active-high;
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+ };
+
+ phy6: phy at 6 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <6>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led at 0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_WAN;
+ };
+ };
+ };
+
+ switch at 1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&swphy1>;
+ };
+
+ port at 2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&swphy2>;
+ };
+
+ port at 3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&swphy3>;
+ };
+
+ port at 4 {
+ reg = <4>;
+ label = "lan4";
+ phy-handle = <&swphy4>;
+ };
+
+ port at 5 {
+ reg = <5>;
+ label = "lan5";
+ phy-mode = "2500base-x";
+ phy-handle = <&phy5>;
+ };
+
+ port at 6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ swphy1: phy at 1 {
+ reg = <1>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy2: phy at 2 {
+ reg = <2>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy3: phy at 3 {
+ reg = <3>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+
+ swphy4: phy at 4 {
+ reg = <4>;
+
+ mediatek,led-config = <
+ 0x21 0x8009 /* BASIC_CTRL */
+ 0x22 0x0c00 /* ON_DURATION */
+ 0x23 0x1400 /* BLINK_DURATION */
+ 0x24 0x8000 /* LED0_ON_CTRL */
+ 0x25 0x0000 /* LED0_BLINK_CTRL */
+ 0x26 0xc007 /* LED1_ON_CTRL */
+ 0x27 0x003f /* LED1_BLINK_CTRL */
+ >;
+ };
+ };
+ };
+ };
+};
+
+&pio {
+ spi_flash_pins: spi-flash-pins-33-to-38 {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-disable; /* bias-disable */
+ };
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-disable; /* bias-disable */
+ };
+ };
+
+ wf_2g_5g_pins: wf_2g_5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <MTK_DRIVE_4mA>;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <MTK_DRIVE_4mA>;
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+
+ spi_nand_flash: flash at 0 {
+ compatible = "u-boot-dont-touch-spi-nand";
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ /*
+ * ASUS bootloader tries to replace the partitions defined in
+ * Device Tree and by that also deletes all additional properties
+ * needed for UBI and NVMEM-on-UBI.
+ * Prevent this from happening by tricking the loader to delete and
+ * replace a bait node instead (works with older bootloaders).
+ */
+ partitions: dummy {
+ compatible = "u-boot-dummy-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ reg = <0x0 0x0>;
+ label = "remove_me";
+ };
+ };
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ reg = <0x0 0x400000>;
+ label = "bootloader";
+ read-only;
+ };
+
+ partition at 400000 {
+ compatible = "linux,ubi";
+ reg = <0x400000 0xfc00000>;
+ label = "UBI_DEV";
+
+ volumes {
+ ubi-volume-factory {
+ volname = "Factory";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom at 0 {
+ reg = <0x0 0x1000>;
+ };
+
+ macaddr_factory_4: macaddr at 4 {
+ reg = <0x4 0x6>;
+ };
+ };
+ };
+ };
+ };
+ };
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ nvmem-cells = <&eeprom_factory_0>;
+ nvmem-cell-names = "eeprom";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+ pinctrl-names = "default", "dbdc";
+ status = "okay";
+};
+
+&trng {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&ssusb {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index 20a53671e7..0408c52657 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -27,6 +27,7 @@ snr,snr-cpe-ax2)
asus,tuf-ax4200)
ucidef_set_led_netdev "wan" "WAN" "mdio-bus:06:white:wan" "eth1" "link tx rx"
;;
+asus,tuf-ax4200q|\
asus,tuf-ax6000)
ucidef_set_led_netdev "lan5" "LAN5" "mdio-bus:05:white:lan" "lan5" "link tx rx"
ucidef_set_led_netdev "wan" "WAN" "mdio-bus:06:white:wan" "eth1" "link tx rx"
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 70aa84dca9..c71f1b2d1b 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -74,6 +74,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
;;
asiarf,ap7986-003|\
+ asus,tuf-ax4200q|\
asus,tuf-ax6000|\
glinet,gl-mt6000|\
tplink,tl-xdr4288|\
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index 0058aabd53..dbc4a859fa 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -45,6 +45,7 @@ case "$board" in
;;
asus,rt-ax52|\
asus,tuf-ax4200|\
+ asus,tuf-ax4200q|\
asus,tuf-ax6000)
CI_UBIPART="UBI_DEV"
addr=$(mtd_get_mac_binary_ubi "Factory" 0x4)
diff --git a/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh b/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
index 57414837cb..917b995c9f 100644
--- a/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
@@ -31,6 +31,7 @@ preinit_set_mac_address() {
ip link set dev internet address "$wan_mac"
;;
asus,tuf-ax4200|\
+ asus,tuf-ax4200q|\
asus,tuf-ax6000)
CI_UBIPART="UBI_DEV"
addr=$(mtd_get_mac_binary_ubi "Factory" 0x4)
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 3d9307249d..8257e2f5c7 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -142,6 +142,7 @@ platform_do_upgrade() {
asus,rt-ax52|\
asus,rt-ax59u|\
asus,tuf-ax4200|\
+ asus,tuf-ax4200q|\
asus,tuf-ax6000|\
asus,zenwifi-bt8)
CI_UBIPART="UBI_DEV"
@@ -365,6 +366,7 @@ platform_pre_upgrade() {
asus,rt-ax52|\
asus,rt-ax59u|\
asus,tuf-ax4200|\
+ asus,tuf-ax4200q|\
asus,tuf-ax6000|\
asus,zenwifi-bt8)
asus_initial_setup
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 7bfa313ab1..e3838c6bba 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -428,6 +428,28 @@ endif
endef
TARGET_DEVICES += asus_tuf-ax4200
+define Device/asus_tuf-ax4200q
+ DEVICE_VENDOR := ASUS
+ DEVICE_MODEL := TUF-AX4200Q
+ DEVICE_DTS := mt7986a-asus-tuf-ax4200q
+ DEVICE_DTS_DIR := ../dts
+ DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7986-firmware mt7986-wo-firmware
+ IMAGES := sysupgrade.bin
+ KERNEL := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+ KERNEL_INITRAMFS := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+ifeq ($(IB),)
+ifeq ($(CONFIG_TARGET_INITRAMFS_FORCE),y)
+ ARTIFACTS := initramfs.trx
+ ARTIFACT/initramfs.trx := append-image-stage initramfs-kernel.bin | \
+ uImage none | asus-trx -v 3 -n TUF-AX4200
+endif
+endif
+endef
+TARGET_DEVICES += asus_tuf-ax4200q
+
define Device/asus_tuf-ax6000
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX6000
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