[openwrt/openwrt] toolchain: gcc: drop GCC11
LEDE Commits
lede-commits at lists.infradead.org
Mon May 26 10:20:59 PDT 2025
robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/fb2c59b94222ca272df565e54d7e4cdf7c21333f
commit fb2c59b94222ca272df565e54d7e4cdf7c21333f
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Mon May 26 19:17:34 2025 +0200
toolchain: gcc: drop GCC11
There is no practical value in keeping GCC11 around, as even OpenWrt 23.05
uses GCC12 as the default one, so drop it.
Signed-off-by: Robert Marko <robimarko at gmail.com>
---
config/Config-build.in | 1 -
package/libs/elfutils/Makefile | 6 +-
toolchain/gcc/Config.in | 3 -
toolchain/gcc/Config.version | 5 -
.../gcc/patches-11.x/002-case_insensitive.patch | 24 -
toolchain/gcc/patches-11.x/010-documentation.patch | 35 -
...igure-define-TARGET_LIBC_GNUSTACK-on-musl.patch | 46 -
...e-ctype.h-after-C-standard-headers-to-avo.patch | 134 --
.../gcc/patches-11.x/110-Fix-MIPS-PR-84790.patch | 20 -
toolchain/gcc/patches-11.x/230-musl_libssp.patch | 13 -
.../300-mips_Os_cpu_rtx_cost_model.patch | 21 -
...r-cherry-pick-9cf13067cb5088626ba7-from-u.patch | 39 -
.../700-RISCV-Inline-subword-atomic-ops.patch | 2021 --------------------
...iscv-linux-Don-t-add-latomic-with-pthread.patch | 36 -
.../patches-11.x/810-arm-softfloat-libgcc.patch | 33 -
toolchain/gcc/patches-11.x/820-libgcc_pic.patch | 44 -
.../840-armv4_pass_fix-v4bx_to_ld.patch | 28 -
.../gcc/patches-11.x/850-use_shared_libgcc.patch | 54 -
.../gcc/patches-11.x/851-libgcc_no_compat.patch | 22 -
.../gcc/patches-11.x/870-ppc_no_crtsavres.patch | 11 -
toolchain/gcc/patches-11.x/881-no_tm_section.patch | 11 -
.../gcc/patches-11.x/900-bad-mips16-crt.patch | 9 -
toolchain/gcc/patches-11.x/910-mbsd_multi.patch | 146 --
.../patches-11.x/920-specs_nonfatal_getenv.patch | 22 -
...931-libffi-fix-MIPS-softfloat-build-issue.patch | 168 --
...ix-compilation-when-making-cross-compiler.patch | 67 -
.../970-macos_arm64-building-fix.patch | 45 -
.../980-fix-build-error-with-Xcode-16.3.patch | 47 -
28 files changed, 1 insertion(+), 3110 deletions(-)
diff --git a/config/Config-build.in b/config/Config-build.in
index 0491a9fea1..822073d61c 100644
--- a/config/Config-build.in
+++ b/config/Config-build.in
@@ -175,7 +175,6 @@ menu "Global build settings"
config MOLD
depends on (aarch64 || arm || i386 || i686 || loongarch64 || m68k || powerpc || powerpc64 || riscv64 || sh4 || x86_64)
- depends on !GCC_USE_VERSION_11
depends on !HOST_OS_MACOS
def_bool $(shell, ./config/check-hostcxx.sh 10 2 12)
diff --git a/package/libs/elfutils/Makefile b/package/libs/elfutils/Makefile
index 7b31331e0b..4ee4d128f2 100644
--- a/package/libs/elfutils/Makefile
+++ b/package/libs/elfutils/Makefile
@@ -86,12 +86,8 @@ CONFIGURE_VARS += \
TARGET_CFLAGS += \
-D_GNU_SOURCE \
-Wno-unused-result \
- -Wno-format-nonliteral
-
-ifneq ($(CONFIG_GCC_USE_VERSION_11),y)
-TARGET_CFLAGS += \
+ -Wno-format-nonliteral \
-Wno-error=use-after-free
-endif
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include
diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in
index 9912b58eb3..5b4180f4e6 100644
--- a/toolchain/gcc/Config.in
+++ b/toolchain/gcc/Config.in
@@ -6,9 +6,6 @@ choice
help
Select the version of gcc you wish to use.
- config GCC_USE_VERSION_11
- bool "gcc 11.x"
-
config GCC_USE_VERSION_12
bool "gcc 12.x"
diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version
index 3e808f11a7..0da1907517 100644
--- a/toolchain/gcc/Config.version
+++ b/toolchain/gcc/Config.version
@@ -1,7 +1,3 @@
-config GCC_VERSION_11
- default y if GCC_USE_VERSION_11
- bool
-
config GCC_VERSION_12
default y if GCC_USE_VERSION_12
bool
@@ -13,7 +9,6 @@ config GCC_VERSION_13
config GCC_VERSION
string
default EXTERNAL_GCC_VERSION if EXTERNAL_TOOLCHAIN && !NATIVE_TOOLCHAIN
- default "11.3.0" if GCC_VERSION_11
default "12.3.0" if GCC_VERSION_12
default "13.3.0" if GCC_VERSION_13
default "14.3.0"
diff --git a/toolchain/gcc/patches-11.x/002-case_insensitive.patch b/toolchain/gcc/patches-11.x/002-case_insensitive.patch
deleted file mode 100644
index 409497e5a3..0000000000
--- a/toolchain/gcc/patches-11.x/002-case_insensitive.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-commit 81cc26c706b2bc8c8c1eb1a322e5c5157900836e
-Author: Felix Fietkau <nbd at openwrt.org>
-Date: Sun Oct 19 21:45:51 2014 +0000
-
- gcc: do not assume that the Mac OS X filesystem is case insensitive
-
- Signed-off-by: Felix Fietkau <nbd at openwrt.org>
-
- SVN-Revision: 42973
-
---- a/include/filenames.h
-+++ b/include/filenames.h
-@@ -44,11 +44,6 @@ extern "C" {
- # define IS_DIR_SEPARATOR(c) IS_DOS_DIR_SEPARATOR (c)
- # define IS_ABSOLUTE_PATH(f) IS_DOS_ABSOLUTE_PATH (f)
- #else /* not DOSish */
--# if defined(__APPLE__)
--# ifndef HAVE_CASE_INSENSITIVE_FILE_SYSTEM
--# define HAVE_CASE_INSENSITIVE_FILE_SYSTEM 1
--# endif
--# endif /* __APPLE__ */
- # define HAS_DRIVE_SPEC(f) (0)
- # define IS_DIR_SEPARATOR(c) IS_UNIX_DIR_SEPARATOR (c)
- # define IS_ABSOLUTE_PATH(f) IS_UNIX_ABSOLUTE_PATH (f)
diff --git a/toolchain/gcc/patches-11.x/010-documentation.patch b/toolchain/gcc/patches-11.x/010-documentation.patch
deleted file mode 100644
index 25a5e1e99c..0000000000
--- a/toolchain/gcc/patches-11.x/010-documentation.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-commit 098bd91f5eae625c7d2ee621e10930fc4434e5e2
-Author: Luka Perkov <luka at openwrt.org>
-Date: Tue Feb 26 16:16:33 2013 +0000
-
- gcc: don't build documentation
-
- This closes #13039.
-
- Signed-off-by: Luka Perkov <luka at openwrt.org>
-
- SVN-Revision: 35807
-
---- a/gcc/Makefile.in
-+++ b/gcc/Makefile.in
-@@ -3348,18 +3348,10 @@ doc/gcc.info: $(TEXI_GCC_FILES)
- doc/gccint.info: $(TEXI_GCCINT_FILES)
- doc/cppinternals.info: $(TEXI_CPPINT_FILES)
-
--doc/%.info: %.texi
-- if [ x$(BUILD_INFO) = xinfo ]; then \
-- $(MAKEINFO) $(MAKEINFOFLAGS) -I . -I $(gcc_docdir) \
-- -I $(gcc_docdir)/include -o $@ $<; \
-- fi
-+doc/%.info:
-
- # Duplicate entry to handle renaming of gccinstall.info
--doc/gccinstall.info: $(TEXI_GCCINSTALL_FILES)
-- if [ x$(BUILD_INFO) = xinfo ]; then \
-- $(MAKEINFO) $(MAKEINFOFLAGS) -I $(gcc_docdir) \
-- -I $(gcc_docdir)/include -o $@ $<; \
-- fi
-+doc/gccinstall.info:
-
- doc/cpp.dvi: $(TEXI_CPP_FILES)
- doc/gcc.dvi: $(TEXI_GCC_FILES)
diff --git a/toolchain/gcc/patches-11.x/011-v12-configure-define-TARGET_LIBC_GNUSTACK-on-musl.patch b/toolchain/gcc/patches-11.x/011-v12-configure-define-TARGET_LIBC_GNUSTACK-on-musl.patch
deleted file mode 100644
index 423def6000..0000000000
--- a/toolchain/gcc/patches-11.x/011-v12-configure-define-TARGET_LIBC_GNUSTACK-on-musl.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From ea650cae26da4a8fc04f0c4666f4dd776d0b5fc0 Mon Sep 17 00:00:00 2001
-From: Ilya Lipnitskiy <ilya.lipnitskiy at gmail.com>
-Date: Sun, 14 Nov 2021 21:54:25 -0800
-Subject: [PATCH] configure: define TARGET_LIBC_GNUSTACK on musl
-
-musl only uses PT_GNU_STACK to set default thread stack size and has no
-executable stack support[0], so there is no reason not to emit the
-.note.GNU-stack section on musl builds.
-
-[0]: https://lore.kernel.org/all/20190423192534.GN23599@brightrain.aerifal.cx/T/#u
-
-gcc/ChangeLog:
-
- * configure: Regenerate.
- * configure.ac: define TARGET_LIBC_GNUSTACK on musl
-
-Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy at gmail.com>
----
- gcc/configure | 3 +++
- gcc/configure.ac | 3 +++
- 2 files changed, 6 insertions(+)
-
---- a/gcc/configure
-+++ b/gcc/configure
-@@ -31533,6 +31533,9 @@ fi
- # Check if the target LIBC handles PT_GNU_STACK.
- gcc_cv_libc_gnustack=unknown
- case "$target" in
-+ mips*-*-linux-musl*)
-+ gcc_cv_libc_gnustack=yes
-+ ;;
- mips*-*-linux*)
-
- if test $glibc_version_major -gt 2 \
---- a/gcc/configure.ac
-+++ b/gcc/configure.ac
-@@ -7023,6 +7023,9 @@ fi
- # Check if the target LIBC handles PT_GNU_STACK.
- gcc_cv_libc_gnustack=unknown
- case "$target" in
-+ mips*-*-linux-musl*)
-+ gcc_cv_libc_gnustack=yes
-+ ;;
- mips*-*-linux*)
- GCC_GLIBC_VERSION_GTE_IFELSE([2], [31], [gcc_cv_libc_gnustack=yes], )
- ;;
diff --git a/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch b/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch
deleted file mode 100644
index 4a9ebbd837..0000000000
--- a/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 9970b576b7e4ae337af1268395ff221348c4b34a Mon Sep 17 00:00:00 2001
-From: Francois-Xavier Coudert <fxcoudert at gcc.gnu.org>
-Date: Thu, 7 Mar 2024 14:36:03 +0100
-Subject: [PATCH] Include safe-ctype.h after C++ standard headers, to avoid
- over-poisoning
-
-When building gcc's C++ sources against recent libc++, the poisoning of
-the ctype macros due to including safe-ctype.h before including C++
-standard headers such as <list>, <map>, etc, causes many compilation
-errors, similar to:
-
- In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23:
- In file included from /home/dim/src/gcc/master/gcc/system.h:233:
- In file included from /usr/include/c++/v1/vector:321:
- In file included from
- /usr/include/c++/v1/__format/formatter_bool.h:20:
- In file included from
- /usr/include/c++/v1/__format/formatter_integral.h:32:
- In file included from /usr/include/c++/v1/locale:202:
- /usr/include/c++/v1/__locale:546:5: error: '__abi_tag__' attribute
- only applies to structs, variables, functions, and namespaces
- 546 | _LIBCPP_INLINE_VISIBILITY
- | ^
- /usr/include/c++/v1/__config:813:37: note: expanded from macro
- '_LIBCPP_INLINE_VISIBILITY'
- 813 | # define _LIBCPP_INLINE_VISIBILITY _LIBCPP_HIDE_FROM_ABI
- | ^
- /usr/include/c++/v1/__config:792:26: note: expanded from macro
- '_LIBCPP_HIDE_FROM_ABI'
- 792 |
- __attribute__((__abi_tag__(_LIBCPP_TOSTRING(
- _LIBCPP_VERSIONED_IDENTIFIER))))
- | ^
- In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23:
- In file included from /home/dim/src/gcc/master/gcc/system.h:233:
- In file included from /usr/include/c++/v1/vector:321:
- In file included from
- /usr/include/c++/v1/__format/formatter_bool.h:20:
- In file included from
- /usr/include/c++/v1/__format/formatter_integral.h:32:
- In file included from /usr/include/c++/v1/locale:202:
- /usr/include/c++/v1/__locale:547:37: error: expected ';' at end of
- declaration list
- 547 | char_type toupper(char_type __c) const
- | ^
- /usr/include/c++/v1/__locale:553:48: error: too many arguments
- provided to function-like macro invocation
- 553 | const char_type* toupper(char_type* __low, const
- char_type* __high) const
- | ^
- /home/dim/src/gcc/master/gcc/../include/safe-ctype.h:146:9: note:
- macro 'toupper' defined here
- 146 | #define toupper(c) do_not_use_toupper_with_safe_ctype
- | ^
-
-This is because libc++ uses different transitive includes than
-libstdc++, and some of those transitive includes pull in various ctype
-declarations (typically via <locale>).
-
-There was already a special case for including <string> before
-safe-ctype.h, so move the rest of the C++ standard header includes to
-the same location, to fix the problem.
-
-gcc/ChangeLog:
-
- * system.h: Include safe-ctype.h after C++ standard headers.
-
-Signed-off-by: Dimitry Andric <dimitry at andric.com>
----
- gcc/system.h | 39 ++++++++++++++++++---------------------
- 1 file changed, 18 insertions(+), 21 deletions(-)
-
---- a/gcc/system.h
-+++ b/gcc/system.h
-@@ -194,27 +194,8 @@ extern int fprintf_unlocked (FILE *, con
- #undef fread_unlocked
- #undef fwrite_unlocked
-
--/* Include <string> before "safe-ctype.h" to avoid GCC poisoning
-- the ctype macros through safe-ctype.h */
--
--#ifdef __cplusplus
--#ifdef INCLUDE_STRING
--# include <string>
--#endif
--#endif
--
--/* There are an extraordinary number of issues with <ctype.h>.
-- The last straw is that it varies with the locale. Use libiberty's
-- replacement instead. */
--#include "safe-ctype.h"
--
--#include <sys/types.h>
--
--#include <errno.h>
--
--#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
--extern int errno;
--#endif
-+/* Include C++ standard headers before "safe-ctype.h" to avoid GCC
-+ poisoning the ctype macros through safe-ctype.h */
-
- #ifdef __cplusplus
- #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY)
-@@ -229,6 +210,9 @@ extern int errno;
- #ifdef INCLUDE_SET
- # include <set>
- #endif
-+#ifdef INCLUDE_STRING
-+# include <string>
-+#endif
- #ifdef INCLUDE_VECTOR
- # include <vector>
- #endif
-@@ -244,6 +228,19 @@ extern int errno;
- # include <type_traits>
- #endif
-
-+/* There are an extraordinary number of issues with <ctype.h>.
-+ The last straw is that it varies with the locale. Use libiberty's
-+ replacement instead. */
-+#include "safe-ctype.h"
-+
-+#include <sys/types.h>
-+
-+#include <errno.h>
-+
-+#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO
-+extern int errno;
-+#endif
-+
- /* Some of glibc's string inlines cause warnings. Plus we'd rather
- rely on (and therefore test) GCC's string builtins. */
- #define __NO_STRING_INLINES
diff --git a/toolchain/gcc/patches-11.x/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches-11.x/110-Fix-MIPS-PR-84790.patch
deleted file mode 100644
index 82ac013d30..0000000000
--- a/toolchain/gcc/patches-11.x/110-Fix-MIPS-PR-84790.patch
+++ /dev/null
@@ -1,20 +0,0 @@
-Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
-MIPS16 functions have a static assembler prologue which clobbers
-registers v0 and v1. Add these register clobbers to function call
-instructions.
-
---- a/gcc/config/mips/mips.c
-+++ b/gcc/config/mips/mips.c
-@@ -3132,6 +3132,12 @@ mips_emit_call_insn (rtx pattern, rtx or
- emit_insn (gen_update_got_version ());
- }
-
-+ if (TARGET_MIPS16 && TARGET_USE_GOT)
-+ {
-+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
-+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
-+ }
-+
- if (TARGET_MIPS16
- && TARGET_EXPLICIT_RELOCS
- && TARGET_CALL_CLOBBERED_GP)
diff --git a/toolchain/gcc/patches-11.x/230-musl_libssp.patch b/toolchain/gcc/patches-11.x/230-musl_libssp.patch
deleted file mode 100644
index 66b88bc9e9..0000000000
--- a/toolchain/gcc/patches-11.x/230-musl_libssp.patch
+++ /dev/null
@@ -1,13 +0,0 @@
---- a/gcc/gcc.c
-+++ b/gcc/gcc.c
-@@ -978,7 +978,9 @@ proper position among the other output f
- #endif
-
- #ifndef LINK_SSP_SPEC
--#ifdef TARGET_LIBC_PROVIDES_SSP
-+#if DEFAULT_LIBC == LIBC_MUSL
-+#define LINK_SSP_SPEC "-lssp_nonshared"
-+#elif defined(TARGET_LIBC_PROVIDES_SSP)
- #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
- "|fstack-protector-strong|fstack-protector-explicit:}"
- #else
diff --git a/toolchain/gcc/patches-11.x/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches-11.x/300-mips_Os_cpu_rtx_cost_model.patch
deleted file mode 100644
index 8c4a5fce19..0000000000
--- a/toolchain/gcc/patches-11.x/300-mips_Os_cpu_rtx_cost_model.patch
+++ /dev/null
@@ -1,21 +0,0 @@
-commit ecf7671b769fe96f7b5134be442089f8bdba55d2
-Author: Felix Fietkau <nbd at nbd.name>
-Date: Thu Aug 4 20:29:45 2016 +0200
-
-gcc: add a patch to generate better code with Os on mips
-
-Also happens to reduce compressed code size a bit
-
-Signed-off-by: Felix Fietkau <nbd at nbd.name>
-
---- a/gcc/config/mips/mips.c
-+++ b/gcc/config/mips/mips.c
-@@ -20041,7 +20041,7 @@ mips_option_override (void)
- flag_pcc_struct_return = 0;
-
- /* Decide which rtx_costs structure to use. */
-- if (optimize_size)
-+ if (0 && optimize_size)
- mips_cost = &mips_rtx_cost_optimize_size;
- else
- mips_cost = &mips_rtx_cost_data[mips_tune];
diff --git a/toolchain/gcc/patches-11.x/400-libsanitizer-cherry-pick-9cf13067cb5088626ba7-from-u.patch b/toolchain/gcc/patches-11.x/400-libsanitizer-cherry-pick-9cf13067cb5088626ba7-from-u.patch
deleted file mode 100644
index 39869b4746..0000000000
--- a/toolchain/gcc/patches-11.x/400-libsanitizer-cherry-pick-9cf13067cb5088626ba7-from-u.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From d2356ebb0084a0d80dbfe33040c9afe938c15d19 Mon Sep 17 00:00:00 2001
-From: Martin Liska <mliska at suse.cz>
-Date: Mon, 11 Jul 2022 22:03:14 +0200
-Subject: [PATCH] libsanitizer: cherry-pick 9cf13067cb5088626ba7 from upstream
-
-9cf13067cb5088626ba7ee1ec4c42ec59c7995a0 [sanitizer] Remove #include <linux/fs.h> to resolve fsconfig_command/mount_attr conflict with glibc 2.36
-
-(cherry picked from commit 2701442d0cf6292f6624443c15813d6d1a3562fe)
----
- .../sanitizer_platform_limits_posix.cpp | 10 ++++++----
- 1 file changed, 6 insertions(+), 4 deletions(-)
-
---- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
-+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
-@@ -72,7 +72,9 @@
- #include <sys/vt.h>
- #include <linux/cdrom.h>
- #include <linux/fd.h>
-+#if SANITIZER_ANDROID
- #include <linux/fs.h>
-+#endif
- #include <linux/hdreg.h>
- #include <linux/input.h>
- #include <linux/ioctl.h>
-@@ -828,10 +830,10 @@ unsigned struct_ElfW_Phdr_sz = sizeof(El
- unsigned IOCTL_EVIOCGPROP = IOCTL_NOT_PRESENT;
- unsigned IOCTL_EVIOCSKEYCODE_V2 = IOCTL_NOT_PRESENT;
- #endif
-- unsigned IOCTL_FS_IOC_GETFLAGS = FS_IOC_GETFLAGS;
-- unsigned IOCTL_FS_IOC_GETVERSION = FS_IOC_GETVERSION;
-- unsigned IOCTL_FS_IOC_SETFLAGS = FS_IOC_SETFLAGS;
-- unsigned IOCTL_FS_IOC_SETVERSION = FS_IOC_SETVERSION;
-+ unsigned IOCTL_FS_IOC_GETFLAGS = _IOR('f', 1, long);
-+ unsigned IOCTL_FS_IOC_GETVERSION = _IOR('v', 1, long);
-+ unsigned IOCTL_FS_IOC_SETFLAGS = _IOW('f', 2, long);
-+ unsigned IOCTL_FS_IOC_SETVERSION = _IOW('v', 2, long);
- unsigned IOCTL_GIO_CMAP = GIO_CMAP;
- unsigned IOCTL_GIO_FONT = GIO_FONT;
- unsigned IOCTL_GIO_UNIMAP = GIO_UNIMAP;
diff --git a/toolchain/gcc/patches-11.x/700-RISCV-Inline-subword-atomic-ops.patch b/toolchain/gcc/patches-11.x/700-RISCV-Inline-subword-atomic-ops.patch
deleted file mode 100644
index 0da7eb4af6..0000000000
--- a/toolchain/gcc/patches-11.x/700-RISCV-Inline-subword-atomic-ops.patch
+++ /dev/null
@@ -1,2021 +0,0 @@
-From f797260adaf52bee0ec0e16190bbefbe1bfc3692 Mon Sep 17 00:00:00 2001
-From: Patrick O'Neill <patrick at rivosinc.com>
-Date: Tue, 18 Apr 2023 14:33:13 -0700
-Subject: [PATCH] RISCV: Inline subword atomic ops
-
-RISC-V has no support for subword atomic operations; code currently
-generates libatomic library calls.
-
-This patch changes the default behavior to inline subword atomic calls
-(using the same logic as the existing library call).
-Behavior can be specified using the -minline-atomics and
--mno-inline-atomics command line flags.
-
-gcc/libgcc/config/riscv/atomic.c has the same logic implemented in asm.
-This will need to stay for backwards compatibility and the
--mno-inline-atomics flag.
-
-2023-04-18 Patrick O'Neill <patrick at rivosinc.com>
-
-gcc/ChangeLog:
- PR target/104338
- * config/riscv/riscv-protos.h: Add helper function stubs.
- * config/riscv/riscv.cc: Add helper functions for subword masking.
- * config/riscv/riscv.opt: Add command-line flag.
- * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
- fetch_and_nand, CAS, and exchange ops.
- * doc/invoke.texi: Add blurb regarding command-line flag.
-
-libgcc/ChangeLog:
- PR target/104338
- * config/riscv/atomic.c: Add reference to duplicate logic.
-
-gcc/testsuite/ChangeLog:
- PR target/104338
- * gcc.target/riscv/inline-atomics-1.c: New test.
- * gcc.target/riscv/inline-atomics-2.c: New test.
- * gcc.target/riscv/inline-atomics-3.c: New test.
- * gcc.target/riscv/inline-atomics-4.c: New test.
- * gcc.target/riscv/inline-atomics-5.c: New test.
- * gcc.target/riscv/inline-atomics-6.c: New test.
- * gcc.target/riscv/inline-atomics-7.c: New test.
- * gcc.target/riscv/inline-atomics-8.c: New test.
-
-Signed-off-by: Patrick O'Neill <patrick at rivosinc.com>
-Signed-off-by: Palmer Dabbelt <palmer at rivosinc.com>
----
- gcc/config/riscv/riscv-protos.h | 2 +
- gcc/config/riscv/riscv.cc | 49 ++
- gcc/config/riscv/riscv.opt | 4 +
- gcc/config/riscv/sync.md | 301 +++++++++
- gcc/doc/invoke.texi | 10 +-
- .../gcc.target/riscv/inline-atomics-1.c | 18 +
- .../gcc.target/riscv/inline-atomics-2.c | 9 +
- .../gcc.target/riscv/inline-atomics-3.c | 569 ++++++++++++++++++
- .../gcc.target/riscv/inline-atomics-4.c | 566 +++++++++++++++++
- .../gcc.target/riscv/inline-atomics-5.c | 87 +++
- .../gcc.target/riscv/inline-atomics-6.c | 87 +++
- .../gcc.target/riscv/inline-atomics-7.c | 69 +++
- .../gcc.target/riscv/inline-atomics-8.c | 69 +++
- libgcc/config/riscv/atomic.c | 2 +
- 14 files changed, 1841 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-1.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-2.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-3.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-4.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-5.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-6.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-7.c
- create mode 100644 gcc/testsuite/gcc.target/riscv/inline-atomics-8.c
-
---- a/gcc/config/riscv/riscv-protos.h
-+++ b/gcc/config/riscv/riscv-protos.h
-@@ -74,6 +74,8 @@ extern bool riscv_expand_block_move (rtx
- extern bool riscv_store_data_bypass_p (rtx_insn *, rtx_insn *);
- extern rtx riscv_gen_gpr_save_insn (struct riscv_frame_info *);
- extern bool riscv_gpr_save_operation_p (rtx);
-+extern void riscv_subword_address (rtx, rtx *, rtx *, rtx *, rtx *);
-+extern void riscv_lshift_subword (machine_mode, rtx, rtx, rtx *);
-
- /* Routines implemented in riscv-c.c. */
- void riscv_cpu_cpp_builtins (cpp_reader *);
---- a/gcc/config/riscv/riscv.c
-+++ b/gcc/config/riscv/riscv.c
-@@ -5351,6 +5351,55 @@ riscv_asan_shadow_offset (void)
- return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0;
- }
-
-+/* Given memory reference MEM, expand code to compute the aligned
-+ memory address, shift and mask values and store them into
-+ *ALIGNED_MEM, *SHIFT, *MASK and *NOT_MASK. */
-+
-+void
-+riscv_subword_address (rtx mem, rtx *aligned_mem, rtx *shift, rtx *mask,
-+ rtx *not_mask)
-+{
-+ /* Align the memory address to a word. */
-+ rtx addr = force_reg (Pmode, XEXP (mem, 0));
-+
-+ rtx addr_mask = gen_int_mode (-4, Pmode);
-+
-+ rtx aligned_addr = gen_reg_rtx (Pmode);
-+ emit_move_insn (aligned_addr, gen_rtx_AND (Pmode, addr, addr_mask));
-+
-+ *aligned_mem = change_address (mem, SImode, aligned_addr);
-+
-+ /* Calculate the shift amount. */
-+ emit_move_insn (*shift, gen_rtx_AND (SImode, gen_lowpart (SImode, addr),
-+ gen_int_mode (3, SImode)));
-+ emit_move_insn (*shift, gen_rtx_ASHIFT (SImode, *shift,
-+ gen_int_mode (3, SImode)));
-+
-+ /* Calculate the mask. */
-+ int unshifted_mask = GET_MODE_MASK (GET_MODE (mem));
-+
-+ emit_move_insn (*mask, gen_int_mode (unshifted_mask, SImode));
-+
-+ emit_move_insn (*mask, gen_rtx_ASHIFT (SImode, *mask,
-+ gen_lowpart (QImode, *shift)));
-+
-+ emit_move_insn (*not_mask, gen_rtx_NOT(SImode, *mask));
-+}
-+
-+/* Leftshift a subword within an SImode register. */
-+
-+void
-+riscv_lshift_subword (machine_mode mode, rtx value, rtx shift,
-+ rtx *shifted_value)
-+{
-+ rtx value_reg = gen_reg_rtx (SImode);
-+ emit_move_insn (value_reg, simplify_gen_subreg (SImode, value,
-+ mode, 0));
-+
-+ emit_move_insn(*shifted_value, gen_rtx_ASHIFT (SImode, value_reg,
-+ gen_lowpart (QImode, shift)));
-+}
-+
- /* Initialize the GCC target structure. */
- #undef TARGET_ASM_ALIGNED_HI_OP
- #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
---- a/gcc/config/riscv/riscv.opt
-+++ b/gcc/config/riscv/riscv.opt
-@@ -195,6 +195,10 @@ long riscv_stack_protector_guard_offset
- TargetVariable
- int riscv_zi_subext
-
-+minline-atomics
-+Target Var(TARGET_INLINE_SUBWORD_ATOMIC) Init(1)
-+Always inline subword atomic operations.
-+
- Enum
- Name(isa_spec_class) Type(enum riscv_isa_spec_class)
- Supported ISA specs (for use with the -misa-spec= option):
---- a/gcc/config/riscv/sync.md
-+++ b/gcc/config/riscv/sync.md
-@@ -21,8 +21,11 @@
-
- (define_c_enum "unspec" [
- UNSPEC_COMPARE_AND_SWAP
-+ UNSPEC_COMPARE_AND_SWAP_SUBWORD
- UNSPEC_SYNC_OLD_OP
-+ UNSPEC_SYNC_OLD_OP_SUBWORD
- UNSPEC_SYNC_EXCHANGE
-+ UNSPEC_SYNC_EXCHANGE_SUBWORD
- UNSPEC_ATOMIC_STORE
- UNSPEC_MEMORY_BARRIER
- ])
-@@ -92,6 +95,135 @@
- "%F3amo<insn>.<amo>%A3 %0,%z2,%1"
- [(set (attr "length") (const_int 8))])
-
-+(define_insn "subword_atomic_fetch_strong_<atomic_optab>"
-+ [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem
-+ (match_operand:SI 1 "memory_operand" "+A")) ;; mem location
-+ (set (match_dup 1)
-+ (unspec_volatile:SI
-+ [(any_atomic:SI (match_dup 1)
-+ (match_operand:SI 2 "register_operand" "rI")) ;; value for op
-+ (match_operand:SI 3 "register_operand" "rI")] ;; mask
-+ UNSPEC_SYNC_OLD_OP_SUBWORD))
-+ (match_operand:SI 4 "register_operand" "rI") ;; not_mask
-+ (clobber (match_scratch:SI 5 "=&r")) ;; tmp_1
-+ (clobber (match_scratch:SI 6 "=&r"))] ;; tmp_2
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+ {
-+ return "1:\;"
-+ "lr.w.aq\t%0, %1\;"
-+ "<insn>\t%5, %0, %2\;"
-+ "and\t%5, %5, %3\;"
-+ "and\t%6, %0, %4\;"
-+ "or\t%6, %6, %5\;"
-+ "sc.w.rl\t%5, %6, %1\;"
-+ "bnez\t%5, 1b";
-+ }
-+ [(set (attr "length") (const_int 28))])
-+
-+(define_expand "atomic_fetch_nand<mode>"
-+ [(match_operand:SHORT 0 "register_operand") ;; old value at mem
-+ (not:SHORT (and:SHORT (match_operand:SHORT 1 "memory_operand") ;; mem location
-+ (match_operand:SHORT 2 "reg_or_0_operand"))) ;; value for op
-+ (match_operand:SI 3 "const_int_operand")] ;; model
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+{
-+ /* We have no QImode/HImode atomics, so form a mask, then use
-+ subword_atomic_fetch_strong_nand to implement a LR/SC version of the
-+ operation. */
-+
-+ /* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
-+ is disabled */
-+
-+ rtx old = gen_reg_rtx (SImode);
-+ rtx mem = operands[1];
-+ rtx value = operands[2];
-+ rtx aligned_mem = gen_reg_rtx (SImode);
-+ rtx shift = gen_reg_rtx (SImode);
-+ rtx mask = gen_reg_rtx (SImode);
-+ rtx not_mask = gen_reg_rtx (SImode);
-+
-+ riscv_subword_address (mem, &aligned_mem, &shift, &mask, ¬_mask);
-+
-+ rtx shifted_value = gen_reg_rtx (SImode);
-+ riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
-+
-+ emit_insn (gen_subword_atomic_fetch_strong_nand (old, aligned_mem,
-+ shifted_value,
-+ mask, not_mask));
-+
-+ emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
-+ gen_lowpart (QImode, shift)));
-+
-+ emit_move_insn (operands[0], gen_lowpart (<MODE>mode, old));
-+
-+ DONE;
-+})
-+
-+(define_insn "subword_atomic_fetch_strong_nand"
-+ [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem
-+ (match_operand:SI 1 "memory_operand" "+A")) ;; mem location
-+ (set (match_dup 1)
-+ (unspec_volatile:SI
-+ [(not:SI (and:SI (match_dup 1)
-+ (match_operand:SI 2 "register_operand" "rI"))) ;; value for op
-+ (match_operand:SI 3 "register_operand" "rI")] ;; mask
-+ UNSPEC_SYNC_OLD_OP_SUBWORD))
-+ (match_operand:SI 4 "register_operand" "rI") ;; not_mask
-+ (clobber (match_scratch:SI 5 "=&r")) ;; tmp_1
-+ (clobber (match_scratch:SI 6 "=&r"))] ;; tmp_2
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+ {
-+ return "1:\;"
-+ "lr.w.aq\t%0, %1\;"
-+ "and\t%5, %0, %2\;"
-+ "not\t%5, %5\;"
-+ "and\t%5, %5, %3\;"
-+ "and\t%6, %0, %4\;"
-+ "or\t%6, %6, %5\;"
-+ "sc.w.rl\t%5, %6, %1\;"
-+ "bnez\t%5, 1b";
-+ }
-+ [(set (attr "length") (const_int 32))])
-+
-+(define_expand "atomic_fetch_<atomic_optab><mode>"
-+ [(match_operand:SHORT 0 "register_operand") ;; old value at mem
-+ (any_atomic:SHORT (match_operand:SHORT 1 "memory_operand") ;; mem location
-+ (match_operand:SHORT 2 "reg_or_0_operand")) ;; value for op
-+ (match_operand:SI 3 "const_int_operand")] ;; model
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+{
-+ /* We have no QImode/HImode atomics, so form a mask, then use
-+ subword_atomic_fetch_strong_<mode> to implement a LR/SC version of the
-+ operation. */
-+
-+ /* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
-+ is disabled */
-+
-+ rtx old = gen_reg_rtx (SImode);
-+ rtx mem = operands[1];
-+ rtx value = operands[2];
-+ rtx aligned_mem = gen_reg_rtx (SImode);
-+ rtx shift = gen_reg_rtx (SImode);
-+ rtx mask = gen_reg_rtx (SImode);
-+ rtx not_mask = gen_reg_rtx (SImode);
-+
-+ riscv_subword_address (mem, &aligned_mem, &shift, &mask, ¬_mask);
-+
-+ rtx shifted_value = gen_reg_rtx (SImode);
-+ riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
-+
-+ emit_insn (gen_subword_atomic_fetch_strong_<atomic_optab> (old, aligned_mem,
-+ shifted_value,
-+ mask, not_mask));
-+
-+ emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
-+ gen_lowpart (QImode, shift)));
-+
-+ emit_move_insn (operands[0], gen_lowpart (<MODE>mode, old));
-+
-+ DONE;
-+})
-+
- (define_insn "atomic_exchange<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=&r")
- (unspec_volatile:GPR
-@@ -104,6 +236,56 @@
- "%F3amoswap.<amo>%A3 %0,%z2,%1"
- [(set (attr "length") (const_int 8))])
-
-+(define_expand "atomic_exchange<mode>"
-+ [(match_operand:SHORT 0 "register_operand") ;; old value at mem
-+ (match_operand:SHORT 1 "memory_operand") ;; mem location
-+ (match_operand:SHORT 2 "register_operand") ;; value
-+ (match_operand:SI 3 "const_int_operand")] ;; model
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+{
-+ rtx old = gen_reg_rtx (SImode);
-+ rtx mem = operands[1];
-+ rtx value = operands[2];
-+ rtx aligned_mem = gen_reg_rtx (SImode);
-+ rtx shift = gen_reg_rtx (SImode);
-+ rtx mask = gen_reg_rtx (SImode);
-+ rtx not_mask = gen_reg_rtx (SImode);
-+
-+ riscv_subword_address (mem, &aligned_mem, &shift, &mask, ¬_mask);
-+
-+ rtx shifted_value = gen_reg_rtx (SImode);
-+ riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
-+
-+ emit_insn (gen_subword_atomic_exchange_strong (old, aligned_mem,
-+ shifted_value, not_mask));
-+
-+ emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
-+ gen_lowpart (QImode, shift)));
-+
-+ emit_move_insn (operands[0], gen_lowpart (<MODE>mode, old));
-+ DONE;
-+})
-+
-+(define_insn "subword_atomic_exchange_strong"
-+ [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem
-+ (match_operand:SI 1 "memory_operand" "+A")) ;; mem location
-+ (set (match_dup 1)
-+ (unspec_volatile:SI
-+ [(match_operand:SI 2 "reg_or_0_operand" "rI") ;; value
-+ (match_operand:SI 3 "reg_or_0_operand" "rI")] ;; not_mask
-+ UNSPEC_SYNC_EXCHANGE_SUBWORD))
-+ (clobber (match_scratch:SI 4 "=&r"))] ;; tmp_1
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+ {
-+ return "1:\;"
-+ "lr.w.aq\t%0, %1\;"
-+ "and\t%4, %0, %3\;"
-+ "or\t%4, %4, %2\;"
-+ "sc.w.rl\t%4, %4, %1\;"
-+ "bnez\t%4, 1b";
-+ }
-+ [(set (attr "length") (const_int 20))])
-+
- (define_insn "atomic_cas_value_strong<mode>"
- [(set (match_operand:GPR 0 "register_operand" "=&r")
- (match_operand:GPR 1 "memory_operand" "+A"))
-@@ -152,6 +334,125 @@
- DONE;
- })
-
-+(define_expand "atomic_compare_and_swap<mode>"
-+ [(match_operand:SI 0 "register_operand") ;; bool output
-+ (match_operand:SHORT 1 "register_operand") ;; val output
-+ (match_operand:SHORT 2 "memory_operand") ;; memory
-+ (match_operand:SHORT 3 "reg_or_0_operand") ;; expected value
-+ (match_operand:SHORT 4 "reg_or_0_operand") ;; desired value
-+ (match_operand:SI 5 "const_int_operand") ;; is_weak
-+ (match_operand:SI 6 "const_int_operand") ;; mod_s
-+ (match_operand:SI 7 "const_int_operand")] ;; mod_f
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+{
-+ emit_insn (gen_atomic_cas_value_strong<mode> (operands[1], operands[2],
-+ operands[3], operands[4],
-+ operands[6], operands[7]));
-+
-+ rtx val = gen_reg_rtx (SImode);
-+ if (operands[1] != const0_rtx)
-+ emit_move_insn (val, gen_rtx_SIGN_EXTEND (SImode, operands[1]));
-+ else
-+ emit_move_insn (val, const0_rtx);
-+
-+ rtx exp = gen_reg_rtx (SImode);
-+ if (operands[3] != const0_rtx)
-+ emit_move_insn (exp, gen_rtx_SIGN_EXTEND (SImode, operands[3]));
-+ else
-+ emit_move_insn (exp, const0_rtx);
-+
-+ rtx compare = val;
-+ if (exp != const0_rtx)
-+ {
-+ rtx difference = gen_rtx_MINUS (SImode, val, exp);
-+ compare = gen_reg_rtx (SImode);
-+ emit_move_insn (compare, difference);
-+ }
-+
-+ if (word_mode != SImode)
-+ {
-+ rtx reg = gen_reg_rtx (word_mode);
-+ emit_move_insn (reg, gen_rtx_SIGN_EXTEND (word_mode, compare));
-+ compare = reg;
-+ }
-+
-+ emit_move_insn (operands[0], gen_rtx_EQ (SImode, compare, const0_rtx));
-+ DONE;
-+})
-+
-+(define_expand "atomic_cas_value_strong<mode>"
-+ [(match_operand:SHORT 0 "register_operand") ;; val output
-+ (match_operand:SHORT 1 "memory_operand") ;; memory
-+ (match_operand:SHORT 2 "reg_or_0_operand") ;; expected value
-+ (match_operand:SHORT 3 "reg_or_0_operand") ;; desired value
-+ (match_operand:SI 4 "const_int_operand") ;; mod_s
-+ (match_operand:SI 5 "const_int_operand") ;; mod_f
-+ (match_scratch:SHORT 6)]
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+{
-+ /* We have no QImode/HImode atomics, so form a mask, then use
-+ subword_atomic_cas_strong<mode> to implement a LR/SC version of the
-+ operation. */
-+
-+ /* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
-+ is disabled */
-+
-+ rtx old = gen_reg_rtx (SImode);
-+ rtx mem = operands[1];
-+ rtx aligned_mem = gen_reg_rtx (SImode);
-+ rtx shift = gen_reg_rtx (SImode);
-+ rtx mask = gen_reg_rtx (SImode);
-+ rtx not_mask = gen_reg_rtx (SImode);
-+
-+ riscv_subword_address (mem, &aligned_mem, &shift, &mask, ¬_mask);
-+
-+ rtx o = operands[2];
-+ rtx n = operands[3];
-+ rtx shifted_o = gen_reg_rtx (SImode);
-+ rtx shifted_n = gen_reg_rtx (SImode);
-+
-+ riscv_lshift_subword (<MODE>mode, o, shift, &shifted_o);
-+ riscv_lshift_subword (<MODE>mode, n, shift, &shifted_n);
-+
-+ emit_move_insn (shifted_o, gen_rtx_AND (SImode, shifted_o, mask));
-+ emit_move_insn (shifted_n, gen_rtx_AND (SImode, shifted_n, mask));
-+
-+ emit_insn (gen_subword_atomic_cas_strong (old, aligned_mem,
-+ shifted_o, shifted_n,
-+ mask, not_mask));
-+
-+ emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
-+ gen_lowpart (QImode, shift)));
-+
-+ emit_move_insn (operands[0], gen_lowpart (<MODE>mode, old));
-+
-+ DONE;
-+})
-+
-+(define_insn "subword_atomic_cas_strong"
-+ [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem
-+ (match_operand:SI 1 "memory_operand" "+A")) ;; mem location
-+ (set (match_dup 1)
-+ (unspec_volatile:SI [(match_operand:SI 2 "reg_or_0_operand" "rJ") ;; expected value
-+ (match_operand:SI 3 "reg_or_0_operand" "rJ")] ;; desired value
-+ UNSPEC_COMPARE_AND_SWAP_SUBWORD))
-+ (match_operand:SI 4 "register_operand" "rI") ;; mask
-+ (match_operand:SI 5 "register_operand" "rI") ;; not_mask
-+ (clobber (match_scratch:SI 6 "=&r"))] ;; tmp_1
-+ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
-+ {
-+ return "1:\;"
-+ "lr.w.aq\t%0, %1\;"
-+ "and\t%6, %0, %4\;"
-+ "bne\t%6, %z2, 1f\;"
-+ "and\t%6, %0, %5\;"
-+ "or\t%6, %6, %3\;"
-+ "sc.w.rl\t%6, %6, %1\;"
-+ "bnez\t%6, 1b\;"
-+ "1:";
-+ }
-+ [(set (attr "length") (const_int 28))])
-+
- (define_expand "atomic_test_and_set"
- [(match_operand:QI 0 "register_operand" "") ;; bool output
- (match_operand:QI 1 "memory_operand" "+A") ;; memory
---- a/gcc/doc/invoke.texi
-+++ b/gcc/doc/invoke.texi
-@@ -734,7 +734,8 @@ Objective-C and Objective-C++ Dialects}.
- -moverride=@var{string} -mverbose-cost-dump @gol
- -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{sysreg} @gol
- -mstack-protector-guard-offset=@var{offset} -mtrack-speculation @gol
---moutline-atomics }
-+-moutline-atomics
-+-minline-atomics -mno-inline-atomics}
-
- @emph{Adapteva Epiphany Options}
- @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol
-@@ -26742,6 +26743,13 @@ Do or don't use smaller but slower prolo
- library function calls. The default is to use fast inline prologues and
- epilogues.
-
-+ at opindex minline-atomics
-+ at item -minline-atomics
-+ at itemx -mno-inline-atomics
-+Do or don't use smaller but slower subword atomic emulation code that uses
-+libatomic function calls. The default is to use fast inline subword atomics
-+that do not require libatomic.
-+
- @item -mshorten-memrefs
- @itemx -mno-shorten-memrefs
- @opindex mshorten-memrefs
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-1.c
-@@ -0,0 +1,18 @@
-+/* { dg-do compile } */
-+/* { dg-options "-mno-inline-atomics" } */
-+/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "fetch_and_nand" { target *-*-* } 0 } */
-+/* { dg-final { scan-assembler "\tcall\t__sync_fetch_and_add_1" } } */
-+/* { dg-final { scan-assembler "\tcall\t__sync_fetch_and_nand_1" } } */
-+/* { dg-final { scan-assembler "\tcall\t__sync_bool_compare_and_swap_1" } } */
-+
-+char foo;
-+char bar;
-+char baz;
-+
-+int
-+main ()
-+{
-+ __sync_fetch_and_add(&foo, 1);
-+ __sync_fetch_and_nand(&bar, 1);
-+ __sync_bool_compare_and_swap (&baz, 1, 2);
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-2.c
-@@ -0,0 +1,9 @@
-+/* { dg-do compile } */
-+/* Verify that subword atomics do not generate calls. */
-+/* { dg-options "-minline-atomics" } */
-+/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "fetch_and_nand" { target *-*-* } 0 } */
-+/* { dg-final { scan-assembler-not "\tcall\t__sync_fetch_and_add_1" } } */
-+/* { dg-final { scan-assembler-not "\tcall\t__sync_fetch_and_nand_1" } } */
-+/* { dg-final { scan-assembler-not "\tcall\t__sync_bool_compare_and_swap_1" } } */
-+
-+#include "inline-atomics-1.c"
-\ No newline at end of file
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-3.c
-@@ -0,0 +1,569 @@
-+/* Check all char alignments. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-op-1.c */
-+/* Test __atomic routines for existence and proper execution on 1 byte
-+ values with each valid memory model. */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics -Wno-address-of-packed-member" } */
-+
-+/* Test the execution of the __atomic_*OP builtin routines for a char. */
-+
-+extern void abort(void);
-+
-+char count, res;
-+const char init = ~0;
-+
-+struct A
-+{
-+ char a;
-+ char b;
-+ char c;
-+ char d;
-+} __attribute__ ((packed)) A;
-+
-+/* The fetch_op routines return the original value before the operation. */
-+
-+void
-+test_fetch_add (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_CONSUME) != 1)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_ACQUIRE) != 2)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_RELEASE) != 3)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_ACQ_REL) != 4)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_SEQ_CST) != 5)
-+ abort ();
-+}
-+
-+
-+void
-+test_fetch_sub (char* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_RELAXED) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_CONSUME) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_ACQUIRE) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_RELEASE) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_ACQ_REL) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_SEQ_CST) != res--)
-+ abort ();
-+}
-+
-+void
-+test_fetch_and (char* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, init, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_fetch_and (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_fetch_nand (char* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_ACQUIRE) != 0 )
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_ACQ_REL) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+void
-+test_fetch_xor (char* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ if (__atomic_fetch_xor (v, count, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_RELEASE) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+void
-+test_fetch_or (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_fetch_or (v, count, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, 2, __ATOMIC_CONSUME) != 1)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_ACQUIRE) != 3)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, 8, __ATOMIC_RELEASE) != 7)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_ACQ_REL) != 15)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_SEQ_CST) != 31)
-+ abort ();
-+}
-+
-+/* The OP_fetch routines return the new value after the operation. */
-+
-+void
-+test_add_fetch (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_RELAXED) != 1)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, 1, __ATOMIC_CONSUME) != 2)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_ACQUIRE) != 3)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, 1, __ATOMIC_RELEASE) != 4)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_ACQ_REL) != 5)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_SEQ_CST) != 6)
-+ abort ();
-+}
-+
-+
-+void
-+test_sub_fetch (char* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_RELAXED) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, 1, __ATOMIC_CONSUME) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_ACQUIRE) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, 1, __ATOMIC_RELEASE) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_ACQ_REL) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_SEQ_CST) != --res)
-+ abort ();
-+}
-+
-+void
-+test_and_fetch (char* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ *v = init;
-+ if (__atomic_and_fetch (v, init, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_and_fetch (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_ACQ_REL) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_nand_fetch (char* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_ACQUIRE) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_RELEASE) != 0)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+
-+
-+void
-+test_xor_fetch (char* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ if (__atomic_xor_fetch (v, count, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_or_fetch (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_or_fetch (v, count, __ATOMIC_RELAXED) != 1)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, 2, __ATOMIC_CONSUME) != 3)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_ACQUIRE) != 7)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, 8, __ATOMIC_RELEASE) != 15)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_ACQ_REL) != 31)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_SEQ_CST) != 63)
-+ abort ();
-+}
-+
-+
-+/* Test the OP routines with a result which isn't used. Use both variations
-+ within each function. */
-+
-+void
-+test_add (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ __atomic_add_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != 1)
-+ abort ();
-+
-+ __atomic_fetch_add (v, count, __ATOMIC_CONSUME);
-+ if (*v != 2)
-+ abort ();
-+
-+ __atomic_add_fetch (v, 1 , __ATOMIC_ACQUIRE);
-+ if (*v != 3)
-+ abort ();
-+
-+ __atomic_fetch_add (v, 1, __ATOMIC_RELEASE);
-+ if (*v != 4)
-+ abort ();
-+
-+ __atomic_add_fetch (v, count, __ATOMIC_ACQ_REL);
-+ if (*v != 5)
-+ abort ();
-+
-+ __atomic_fetch_add (v, count, __ATOMIC_SEQ_CST);
-+ if (*v != 6)
-+ abort ();
-+}
-+
-+
-+void
-+test_sub (char* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ __atomic_sub_fetch (v, count + 1, __ATOMIC_RELAXED);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, count + 1, __ATOMIC_CONSUME);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_sub_fetch (v, 1, __ATOMIC_ACQUIRE);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, 1, __ATOMIC_RELEASE);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_sub_fetch (v, count + 1, __ATOMIC_ACQ_REL);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, count + 1, __ATOMIC_SEQ_CST);
-+ if (*v != --res)
-+ abort ();
-+}
-+
-+void
-+test_and (char* v)
-+{
-+ *v = init;
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_RELAXED);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = init;
-+ __atomic_fetch_and (v, init, __ATOMIC_CONSUME);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ __atomic_fetch_and (v, init, __ATOMIC_RELEASE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_ACQ_REL);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ __atomic_fetch_and (v, 0, __ATOMIC_SEQ_CST);
-+ if (*v != 0)
-+ abort ();
-+}
-+
-+void
-+test_nand (char* v)
-+{
-+ *v = init;
-+
-+ __atomic_fetch_nand (v, 0, __ATOMIC_RELAXED);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_nand (v, init, __ATOMIC_CONSUME);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, init, __ATOMIC_RELEASE);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_fetch_nand (v, init, __ATOMIC_ACQ_REL);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, 0, __ATOMIC_SEQ_CST);
-+ if (*v != init)
-+ abort ();
-+}
-+
-+
-+
-+void
-+test_xor (char* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ __atomic_xor_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, ~count, __ATOMIC_CONSUME);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_xor_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, ~count, __ATOMIC_RELEASE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, 0, __ATOMIC_ACQ_REL);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_xor_fetch (v, ~count, __ATOMIC_SEQ_CST);
-+ if (*v != 0)
-+ abort ();
-+}
-+
-+void
-+test_or (char* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ __atomic_or_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != 1)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, count, __ATOMIC_CONSUME);
-+ if (*v != 3)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_or_fetch (v, 4, __ATOMIC_ACQUIRE);
-+ if (*v != 7)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, 8, __ATOMIC_RELEASE);
-+ if (*v != 15)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_or_fetch (v, count, __ATOMIC_ACQ_REL);
-+ if (*v != 31)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, count, __ATOMIC_SEQ_CST);
-+ if (*v != 63)
-+ abort ();
-+}
-+
-+int
-+main ()
-+{
-+ char* V[] = {&A.a, &A.b, &A.c, &A.d};
-+
-+ for (int i = 0; i < 4; i++) {
-+ test_fetch_add (V[i]);
-+ test_fetch_sub (V[i]);
-+ test_fetch_and (V[i]);
-+ test_fetch_nand (V[i]);
-+ test_fetch_xor (V[i]);
-+ test_fetch_or (V[i]);
-+
-+ test_add_fetch (V[i]);
-+ test_sub_fetch (V[i]);
-+ test_and_fetch (V[i]);
-+ test_nand_fetch (V[i]);
-+ test_xor_fetch (V[i]);
-+ test_or_fetch (V[i]);
-+
-+ test_add (V[i]);
-+ test_sub (V[i]);
-+ test_and (V[i]);
-+ test_nand (V[i]);
-+ test_xor (V[i]);
-+ test_or (V[i]);
-+ }
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-4.c
-@@ -0,0 +1,566 @@
-+/* Check all short alignments. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-op-2.c */
-+/* Test __atomic routines for existence and proper execution on 2 byte
-+ values with each valid memory model. */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics -Wno-address-of-packed-member" } */
-+
-+/* Test the execution of the __atomic_*OP builtin routines for a short. */
-+
-+extern void abort(void);
-+
-+short count, res;
-+const short init = ~0;
-+
-+struct A
-+{
-+ short a;
-+ short b;
-+} __attribute__ ((packed)) A;
-+
-+/* The fetch_op routines return the original value before the operation. */
-+
-+void
-+test_fetch_add (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_CONSUME) != 1)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_ACQUIRE) != 2)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_RELEASE) != 3)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, count, __ATOMIC_ACQ_REL) != 4)
-+ abort ();
-+
-+ if (__atomic_fetch_add (v, 1, __ATOMIC_SEQ_CST) != 5)
-+ abort ();
-+}
-+
-+
-+void
-+test_fetch_sub (short* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_RELAXED) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_CONSUME) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_ACQUIRE) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_RELEASE) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, count + 1, __ATOMIC_ACQ_REL) != res--)
-+ abort ();
-+
-+ if (__atomic_fetch_sub (v, 1, __ATOMIC_SEQ_CST) != res--)
-+ abort ();
-+}
-+
-+void
-+test_fetch_and (short* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, init, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_fetch_and (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_and (v, 0, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_fetch_nand (short* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_ACQUIRE) != 0 )
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, init, __ATOMIC_ACQ_REL) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_nand (v, 0, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+void
-+test_fetch_xor (short* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ if (__atomic_fetch_xor (v, count, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_RELEASE) != 0)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_fetch_xor (v, ~count, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+void
-+test_fetch_or (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_fetch_or (v, count, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, 2, __ATOMIC_CONSUME) != 1)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_ACQUIRE) != 3)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, 8, __ATOMIC_RELEASE) != 7)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_ACQ_REL) != 15)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_fetch_or (v, count, __ATOMIC_SEQ_CST) != 31)
-+ abort ();
-+}
-+
-+/* The OP_fetch routines return the new value after the operation. */
-+
-+void
-+test_add_fetch (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_RELAXED) != 1)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, 1, __ATOMIC_CONSUME) != 2)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_ACQUIRE) != 3)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, 1, __ATOMIC_RELEASE) != 4)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_ACQ_REL) != 5)
-+ abort ();
-+
-+ if (__atomic_add_fetch (v, count, __ATOMIC_SEQ_CST) != 6)
-+ abort ();
-+}
-+
-+
-+void
-+test_sub_fetch (short* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_RELAXED) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, 1, __ATOMIC_CONSUME) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_ACQUIRE) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, 1, __ATOMIC_RELEASE) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_ACQ_REL) != --res)
-+ abort ();
-+
-+ if (__atomic_sub_fetch (v, count + 1, __ATOMIC_SEQ_CST) != --res)
-+ abort ();
-+}
-+
-+void
-+test_and_fetch (short* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_RELAXED) != 0)
-+ abort ();
-+
-+ *v = init;
-+ if (__atomic_and_fetch (v, init, __ATOMIC_CONSUME) != init)
-+ abort ();
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_and_fetch (v, init, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_ACQ_REL) != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ if (__atomic_and_fetch (v, 0, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_nand_fetch (short* v)
-+{
-+ *v = init;
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_ACQUIRE) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_RELEASE) != 0)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, init, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_nand_fetch (v, 0, __ATOMIC_SEQ_CST) != init)
-+ abort ();
-+}
-+
-+
-+
-+void
-+test_xor_fetch (short* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ if (__atomic_xor_fetch (v, count, __ATOMIC_RELAXED) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_CONSUME) != 0)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, 0, __ATOMIC_ACQUIRE) != 0)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_RELEASE) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, 0, __ATOMIC_ACQ_REL) != init)
-+ abort ();
-+
-+ if (__atomic_xor_fetch (v, ~count, __ATOMIC_SEQ_CST) != 0)
-+ abort ();
-+}
-+
-+void
-+test_or_fetch (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ if (__atomic_or_fetch (v, count, __ATOMIC_RELAXED) != 1)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, 2, __ATOMIC_CONSUME) != 3)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_ACQUIRE) != 7)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, 8, __ATOMIC_RELEASE) != 15)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_ACQ_REL) != 31)
-+ abort ();
-+
-+ count *= 2;
-+ if (__atomic_or_fetch (v, count, __ATOMIC_SEQ_CST) != 63)
-+ abort ();
-+}
-+
-+
-+/* Test the OP routines with a result which isn't used. Use both variations
-+ within each function. */
-+
-+void
-+test_add (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ __atomic_add_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != 1)
-+ abort ();
-+
-+ __atomic_fetch_add (v, count, __ATOMIC_CONSUME);
-+ if (*v != 2)
-+ abort ();
-+
-+ __atomic_add_fetch (v, 1 , __ATOMIC_ACQUIRE);
-+ if (*v != 3)
-+ abort ();
-+
-+ __atomic_fetch_add (v, 1, __ATOMIC_RELEASE);
-+ if (*v != 4)
-+ abort ();
-+
-+ __atomic_add_fetch (v, count, __ATOMIC_ACQ_REL);
-+ if (*v != 5)
-+ abort ();
-+
-+ __atomic_fetch_add (v, count, __ATOMIC_SEQ_CST);
-+ if (*v != 6)
-+ abort ();
-+}
-+
-+
-+void
-+test_sub (short* v)
-+{
-+ *v = res = 20;
-+ count = 0;
-+
-+ __atomic_sub_fetch (v, count + 1, __ATOMIC_RELAXED);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, count + 1, __ATOMIC_CONSUME);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_sub_fetch (v, 1, __ATOMIC_ACQUIRE);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, 1, __ATOMIC_RELEASE);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_sub_fetch (v, count + 1, __ATOMIC_ACQ_REL);
-+ if (*v != --res)
-+ abort ();
-+
-+ __atomic_fetch_sub (v, count + 1, __ATOMIC_SEQ_CST);
-+ if (*v != --res)
-+ abort ();
-+}
-+
-+void
-+test_and (short* v)
-+{
-+ *v = init;
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_RELAXED);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = init;
-+ __atomic_fetch_and (v, init, __ATOMIC_CONSUME);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ __atomic_fetch_and (v, init, __ATOMIC_RELEASE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_and_fetch (v, 0, __ATOMIC_ACQ_REL);
-+ if (*v != 0)
-+ abort ();
-+
-+ *v = ~*v;
-+ __atomic_fetch_and (v, 0, __ATOMIC_SEQ_CST);
-+ if (*v != 0)
-+ abort ();
-+}
-+
-+void
-+test_nand (short* v)
-+{
-+ *v = init;
-+
-+ __atomic_fetch_nand (v, 0, __ATOMIC_RELAXED);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_nand (v, init, __ATOMIC_CONSUME);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, init, __ATOMIC_RELEASE);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_fetch_nand (v, init, __ATOMIC_ACQ_REL);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_nand_fetch (v, 0, __ATOMIC_SEQ_CST);
-+ if (*v != init)
-+ abort ();
-+}
-+
-+
-+
-+void
-+test_xor (short* v)
-+{
-+ *v = init;
-+ count = 0;
-+
-+ __atomic_xor_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, ~count, __ATOMIC_CONSUME);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_xor_fetch (v, 0, __ATOMIC_ACQUIRE);
-+ if (*v != 0)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, ~count, __ATOMIC_RELEASE);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_fetch_xor (v, 0, __ATOMIC_ACQ_REL);
-+ if (*v != init)
-+ abort ();
-+
-+ __atomic_xor_fetch (v, ~count, __ATOMIC_SEQ_CST);
-+ if (*v != 0)
-+ abort ();
-+}
-+
-+void
-+test_or (short* v)
-+{
-+ *v = 0;
-+ count = 1;
-+
-+ __atomic_or_fetch (v, count, __ATOMIC_RELAXED);
-+ if (*v != 1)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, count, __ATOMIC_CONSUME);
-+ if (*v != 3)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_or_fetch (v, 4, __ATOMIC_ACQUIRE);
-+ if (*v != 7)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, 8, __ATOMIC_RELEASE);
-+ if (*v != 15)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_or_fetch (v, count, __ATOMIC_ACQ_REL);
-+ if (*v != 31)
-+ abort ();
-+
-+ count *= 2;
-+ __atomic_fetch_or (v, count, __ATOMIC_SEQ_CST);
-+ if (*v != 63)
-+ abort ();
-+}
-+
-+int
-+main () {
-+ short* V[] = {&A.a, &A.b};
-+
-+ for (int i = 0; i < 2; i++) {
-+ test_fetch_add (V[i]);
-+ test_fetch_sub (V[i]);
-+ test_fetch_and (V[i]);
-+ test_fetch_nand (V[i]);
-+ test_fetch_xor (V[i]);
-+ test_fetch_or (V[i]);
-+
-+ test_add_fetch (V[i]);
-+ test_sub_fetch (V[i]);
-+ test_and_fetch (V[i]);
-+ test_nand_fetch (V[i]);
-+ test_xor_fetch (V[i]);
-+ test_or_fetch (V[i]);
-+
-+ test_add (V[i]);
-+ test_sub (V[i]);
-+ test_and (V[i]);
-+ test_nand (V[i]);
-+ test_xor (V[i]);
-+ test_or (V[i]);
-+ }
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-5.c
-@@ -0,0 +1,87 @@
-+/* Test __atomic routines for existence and proper execution on 1 byte
-+ values with each valid memory model. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-compare-exchange-1.c */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics" } */
-+
-+/* Test the execution of the __atomic_compare_exchange_n builtin for a char. */
-+
-+extern void abort(void);
-+
-+char v = 0;
-+char expected = 0;
-+char max = ~0;
-+char desired = ~0;
-+char zero = 0;
-+
-+#define STRONG 0
-+#define WEAK 1
-+
-+int
-+main ()
-+{
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, max, STRONG , __ATOMIC_RELAXED, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange_n (&v, &expected, 0, STRONG , __ATOMIC_ACQUIRE, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, 0, STRONG , __ATOMIC_RELEASE, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+ if (v != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange_n (&v, &expected, desired, WEAK, __ATOMIC_ACQ_REL, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, desired, STRONG , __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+ if (v != max)
-+ abort ();
-+
-+ /* Now test the generic version. */
-+
-+ v = 0;
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &max, STRONG, __ATOMIC_RELAXED, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange (&v, &expected, &zero, STRONG , __ATOMIC_ACQUIRE, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &zero, STRONG , __ATOMIC_RELEASE, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+ if (v != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange (&v, &expected, &desired, WEAK, __ATOMIC_ACQ_REL, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &desired, STRONG , __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+ if (v != max)
-+ abort ();
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-6.c
-@@ -0,0 +1,87 @@
-+/* Test __atomic routines for existence and proper execution on 2 byte
-+ values with each valid memory model. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-compare-exchange-2.c */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics" } */
-+
-+/* Test the execution of the __atomic_compare_exchange_n builtin for a short. */
-+
-+extern void abort(void);
-+
-+short v = 0;
-+short expected = 0;
-+short max = ~0;
-+short desired = ~0;
-+short zero = 0;
-+
-+#define STRONG 0
-+#define WEAK 1
-+
-+int
-+main ()
-+{
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, max, STRONG , __ATOMIC_RELAXED, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange_n (&v, &expected, 0, STRONG , __ATOMIC_ACQUIRE, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, 0, STRONG , __ATOMIC_RELEASE, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+ if (v != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange_n (&v, &expected, desired, WEAK, __ATOMIC_ACQ_REL, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange_n (&v, &expected, desired, STRONG , __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+ if (v != max)
-+ abort ();
-+
-+ /* Now test the generic version. */
-+
-+ v = 0;
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &max, STRONG, __ATOMIC_RELAXED, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange (&v, &expected, &zero, STRONG , __ATOMIC_ACQUIRE, __ATOMIC_RELAXED))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &zero, STRONG , __ATOMIC_RELEASE, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != max)
-+ abort ();
-+ if (v != 0)
-+ abort ();
-+
-+ if (__atomic_compare_exchange (&v, &expected, &desired, WEAK, __ATOMIC_ACQ_REL, __ATOMIC_ACQUIRE))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+
-+ if (!__atomic_compare_exchange (&v, &expected, &desired, STRONG , __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST))
-+ abort ();
-+ if (expected != 0)
-+ abort ();
-+ if (v != max)
-+ abort ();
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-7.c
-@@ -0,0 +1,69 @@
-+/* Test __atomic routines for existence and proper execution on 1 byte
-+ values with each valid memory model. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-exchange-1.c */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics" } */
-+
-+/* Test the execution of the __atomic_exchange_n builtin for a char. */
-+
-+extern void abort(void);
-+
-+char v, count, ret;
-+
-+int
-+main ()
-+{
-+ v = 0;
-+ count = 0;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_RELAXED) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_ACQUIRE) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_RELEASE) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_ACQ_REL) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_SEQ_CST) != count)
-+ abort ();
-+ count++;
-+
-+ /* Now test the generic version. */
-+
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_RELAXED);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_ACQUIRE);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_RELEASE);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_ACQ_REL);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_SEQ_CST);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/riscv/inline-atomics-8.c
-@@ -0,0 +1,69 @@
-+/* Test __atomic routines for existence and proper execution on 2 byte
-+ values with each valid memory model. */
-+/* Duplicate logic as libatomic/testsuite/libatomic.c/atomic-exchange-2.c */
-+/* { dg-do run } */
-+/* { dg-options "-minline-atomics" } */
-+
-+/* Test the execution of the __atomic_X builtin for a short. */
-+
-+extern void abort(void);
-+
-+short v, count, ret;
-+
-+int
-+main ()
-+{
-+ v = 0;
-+ count = 0;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_RELAXED) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_ACQUIRE) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_RELEASE) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_ACQ_REL) != count)
-+ abort ();
-+ count++;
-+
-+ if (__atomic_exchange_n (&v, count + 1, __ATOMIC_SEQ_CST) != count)
-+ abort ();
-+ count++;
-+
-+ /* Now test the generic version. */
-+
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_RELAXED);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_ACQUIRE);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_RELEASE);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_ACQ_REL);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ __atomic_exchange (&v, &count, &ret, __ATOMIC_SEQ_CST);
-+ if (ret != count - 1 || v != count)
-+ abort ();
-+ count++;
-+
-+ return 0;
-+}
---- a/libgcc/config/riscv/atomic.c
-+++ b/libgcc/config/riscv/atomic.c
-@@ -30,6 +30,8 @@ see the files COPYING3 and COPYING.RUNTI
- #define INVERT "not %[tmp1], %[tmp1]\n\t"
- #define DONT_INVERT ""
-
-+/* Logic duplicated in gcc/gcc/config/riscv/sync.md for use when inlining is enabled */
-+
- #define GENERATE_FETCH_AND_OP(type, size, opname, insn, invert, cop) \
- type __sync_fetch_and_ ## opname ## _ ## size (type *p, type v) \
- { \
diff --git a/toolchain/gcc/patches-11.x/701-riscv-linux-Don-t-add-latomic-with-pthread.patch b/toolchain/gcc/patches-11.x/701-riscv-linux-Don-t-add-latomic-with-pthread.patch
deleted file mode 100644
index 328c7be9ce..0000000000
--- a/toolchain/gcc/patches-11.x/701-riscv-linux-Don-t-add-latomic-with-pthread.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 203f3060dd363361b172f7295f42bb6bf5ac0b3b Mon Sep 17 00:00:00 2001
-From: Andreas Schwab <schwab at suse.de>
-Date: Sat, 23 Apr 2022 15:48:42 +0200
-Subject: [PATCH] riscv/linux: Don't add -latomic with -pthread
-
-Now that we have support for inline subword atomic operations, it is no
-longer necessary to link against libatomic. This also fixes testsuite
-failures because the framework does not properly set up the linker flags
-for finding libatomic.
-The use of atomic operations is also independent of the use of libpthread.
-
-gcc/
- * config/riscv/linux.h (LIB_SPEC): Don't redefine.
----
- gcc/config/riscv/linux.h | 10 ----------
- 1 file changed, 10 deletions(-)
-
---- a/gcc/config/riscv/linux.h
-+++ b/gcc/config/riscv/linux.h
-@@ -35,16 +35,6 @@ along with GCC; see the file COPYING3.
- #undef MUSL_DYNAMIC_LINKER
- #define MUSL_DYNAMIC_LINKER "/lib/ld-musl-riscv" XLEN_SPEC MUSL_ABI_SUFFIX ".so.1"
-
--/* Because RISC-V only has word-sized atomics, it requries libatomic where
-- others do not. So link libatomic by default, as needed. */
--#undef LIB_SPEC
--#ifdef LD_AS_NEEDED_OPTION
--#define LIB_SPEC GNU_USER_TARGET_LIB_SPEC \
-- " %{pthread:" LD_AS_NEEDED_OPTION " -latomic " LD_NO_AS_NEEDED_OPTION "}"
--#else
--#define LIB_SPEC GNU_USER_TARGET_LIB_SPEC " -latomic "
--#endif
--
- #define ICACHE_FLUSH_FUNC "__riscv_flush_icache"
-
- #define CPP_SPEC "%{pthread:-D_REENTRANT}"
diff --git a/toolchain/gcc/patches-11.x/810-arm-softfloat-libgcc.patch b/toolchain/gcc/patches-11.x/810-arm-softfloat-libgcc.patch
deleted file mode 100644
index 5c9d86aead..0000000000
--- a/toolchain/gcc/patches-11.x/810-arm-softfloat-libgcc.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-commit 8570c4be394cff7282f332f97da2ff569a927ddb
-Author: Imre Kaloz <kaloz at openwrt.org>
-Date: Wed Feb 2 20:06:12 2011 +0000
-
- fixup arm soft-float symbols
-
- SVN-Revision: 25325
-
---- a/libgcc/config/arm/t-linux
-+++ b/libgcc/config/arm/t-linux
-@@ -1,6 +1,10 @@
- LIB1ASMSRC = arm/lib1funcs.S
- LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \
-- _ctzsi2 _arm_addsubdf3 _arm_addsubsf3
-+ _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 \
-+ _arm_negdf2 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
-+ _arm_fixdfsi _arm_fixunsdfsi _arm_truncdfsf2 \
-+ _arm_negsf2 _arm_muldivsf3 _arm_cmpsf2 _arm_unordsf2 \
-+ _arm_fixsfsi _arm_fixunssfsi
-
- # Just for these, we omit the frame pointer since it makes such a big
- # difference.
---- a/gcc/config/arm/linux-elf.h
-+++ b/gcc/config/arm/linux-elf.h
-@@ -58,8 +58,6 @@
- %{shared:-lc} \
- %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
-
--#define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
--
- #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
-
- #define LINUX_TARGET_LINK_SPEC "%{h*} \
diff --git a/toolchain/gcc/patches-11.x/820-libgcc_pic.patch b/toolchain/gcc/patches-11.x/820-libgcc_pic.patch
deleted file mode 100644
index 525a95b565..0000000000
--- a/toolchain/gcc/patches-11.x/820-libgcc_pic.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-commit c96312958c0621e72c9b32da5bc224ffe2161384
-Author: Felix Fietkau <nbd at openwrt.org>
-Date: Mon Oct 19 23:26:09 2009 +0000
-
- gcc: create a proper libgcc_pic.a static library for relinking (4.3.3+ for now, backport will follow)
-
- SVN-Revision: 18086
-
---- a/libgcc/Makefile.in
-+++ b/libgcc/Makefile.in
-@@ -930,11 +930,12 @@ $(libgcov-driver-objects): %$(objext): $
-
- # Static libraries.
- libgcc.a: $(libgcc-objects)
-+libgcc_pic.a: $(libgcc-s-objects)
- libgcov.a: $(libgcov-objects)
- libunwind.a: $(libunwind-objects)
- libgcc_eh.a: $(libgcc-eh-objects)
-
--libgcc.a libgcov.a libunwind.a libgcc_eh.a:
-+libgcc.a libgcov.a libunwind.a libgcc_eh.a libgcc_pic.a:
- -rm -f $@
-
- objects="$(objects)"; \
-@@ -958,7 +959,7 @@ all: libunwind.a
- endif
-
- ifeq ($(enable_shared),yes)
--all: libgcc_eh.a libgcc_s$(SHLIB_EXT)
-+all: libgcc_eh.a libgcc_pic.a libgcc_s$(SHLIB_EXT)
- ifneq ($(LIBUNWIND),)
- all: libunwind$(SHLIB_EXT)
- libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT)
-@@ -1164,6 +1165,10 @@ install-shared:
- chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a
- $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a
-
-+ $(INSTALL_DATA) libgcc_pic.a $(mapfile) $(DESTDIR)$(inst_libdir)/
-+ chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_pic.a
-+ $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_pic.a
-+
- $(subst @multilib_dir@,$(MULTIDIR),$(subst \
- @shlib_base_name@,libgcc_s,$(subst \
- @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL))))
diff --git a/toolchain/gcc/patches-11.x/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches-11.x/840-armv4_pass_fix-v4bx_to_ld.patch
deleted file mode 100644
index e3cb616c4e..0000000000
--- a/toolchain/gcc/patches-11.x/840-armv4_pass_fix-v4bx_to_ld.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-commit 7edc8ca5456d9743dd0075eb3cc5b04f4f24c8cc
-Author: Imre Kaloz <kaloz at openwrt.org>
-Date: Wed Feb 2 19:34:36 2011 +0000
-
- add armv4 fixup patches
-
- SVN-Revision: 25322
-
-
---- a/gcc/config/arm/linux-eabi.h
-+++ b/gcc/config/arm/linux-eabi.h
-@@ -91,10 +91,15 @@
- #define MUSL_DYNAMIC_LINKER \
- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
-
-+/* For armv4 we pass --fix-v4bx to linker to support EABI */
-+#undef TARGET_FIX_V4BX_SPEC
-+#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
-+ "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
-+
- /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
- use the GNU/Linux version, not the generic BPABI version. */
- #undef LINK_SPEC
--#define LINK_SPEC EABI_LINK_SPEC \
-+#define LINK_SPEC EABI_LINK_SPEC TARGET_FIX_V4BX_SPEC \
- LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \
- LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC)
-
diff --git a/toolchain/gcc/patches-11.x/850-use_shared_libgcc.patch b/toolchain/gcc/patches-11.x/850-use_shared_libgcc.patch
deleted file mode 100644
index 8b17f1374f..0000000000
--- a/toolchain/gcc/patches-11.x/850-use_shared_libgcc.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-commit dcfc40358b5a3cae7320c17f8d1cebd5ad5540cd
-Author: Felix Fietkau <nbd at openwrt.org>
-Date: Sun Feb 12 20:25:47 2012 +0000
-
- gcc 4.6: port over the missing patch 850-use_shared_libgcc.patch to prevent libgcc crap from leaking into every single binary
-
- SVN-Revision: 30486
---- a/gcc/config/arm/linux-eabi.h
-+++ b/gcc/config/arm/linux-eabi.h
-@@ -132,10 +132,6 @@
- "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} " \
- LINUX_OR_ANDROID_LD (GNU_USER_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC)
-
--/* Use the default LIBGCC_SPEC, not the version in linux-elf.h, as we
-- do not use -lfloat. */
--#undef LIBGCC_SPEC
--
- /* Clear the instruction cache from `beg' to `end'. This is
- implemented in lib1funcs.S, so ensure an error if this definition
- is used. */
---- a/gcc/config/linux.h
-+++ b/gcc/config/linux.h
-@@ -66,6 +66,10 @@ see the files COPYING3 and COPYING.RUNTI
- builtin_version ("CRuntime_Musl"); \
- } while (0)
-
-+#ifndef LIBGCC_SPEC
-+#define LIBGCC_SPEC "%{static|static-libgcc:-lgcc}%{!static:%{!static-libgcc:-lgcc_s}}"
-+#endif
-+
- /* Determine which dynamic linker to use depending on whether GLIBC or
- uClibc or Bionic or musl is the default C library and whether
- -muclibc or -mglibc or -mbionic or -mmusl has been passed to change
---- a/libgcc/mkmap-symver.awk
-+++ b/libgcc/mkmap-symver.awk
-@@ -136,5 +136,5 @@ function output(lib) {
- else if (inherit[lib])
- printf("} %s;\n", inherit[lib]);
- else
-- printf ("\n local:\n\t*;\n};\n");
-+ printf ("\n\t*;\n};\n");
- }
---- a/gcc/config/rs6000/linux.h
-+++ b/gcc/config/rs6000/linux.h
-@@ -62,6 +62,9 @@
- #undef CPP_OS_DEFAULT_SPEC
- #define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux)"
-
-+#undef LIBGCC_SPEC
-+#define LIBGCC_SPEC "%{!static:%{!static-libgcc:-lgcc_s}} -lgcc"
-+
- #undef LINK_SHLIB_SPEC
- #define LINK_SHLIB_SPEC "%{shared:-shared} %{!shared: %{static:-static}} \
- %{static-pie:-static -pie --no-dynamic-linker -z text}"
diff --git a/toolchain/gcc/patches-11.x/851-libgcc_no_compat.patch b/toolchain/gcc/patches-11.x/851-libgcc_no_compat.patch
deleted file mode 100644
index d710e40717..0000000000
--- a/toolchain/gcc/patches-11.x/851-libgcc_no_compat.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-commit 64661de100da1ec1061ef3e5e400285dce115e6b
-Author: Felix Fietkau <nbd at openwrt.org>
-Date: Sun May 10 13:16:35 2015 +0000
-
- gcc: add some size optimization patches
-
- Signed-off-by: Felix Fietkau <nbd at openwrt.org>
-
- SVN-Revision: 45664
-
---- a/libgcc/config/t-libunwind
-+++ b/libgcc/config/t-libunwind
-@@ -2,8 +2,7 @@
-
- HOST_LIBGCC2_CFLAGS += -DUSE_GAS_SYMVER
-
--LIB2ADDEH = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c \
-- $(srcdir)/unwind-compat.c $(srcdir)/unwind-dw2-fde-compat.c
-+LIB2ADDEH = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
- LIB2ADDEHSTATIC = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
-
- # Override the default value from t-slibgcc-elf-ver and mention -lunwind
diff --git a/toolchain/gcc/patches-11.x/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches-11.x/870-ppc_no_crtsavres.patch
deleted file mode 100644
index bc182f0cec..0000000000
--- a/toolchain/gcc/patches-11.x/870-ppc_no_crtsavres.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/gcc/config/rs6000/rs6000-logue.c
-+++ b/gcc/config/rs6000/rs6000-logue.c
-@@ -348,7 +348,7 @@ rs6000_savres_strategy (rs6000_stack_t *
- /* Define cutoff for using out-of-line functions to save registers. */
- if (DEFAULT_ABI == ABI_V4 || TARGET_ELF)
- {
-- if (!optimize_size)
-+ if (1)
- {
- strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS;
- strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS;
diff --git a/toolchain/gcc/patches-11.x/881-no_tm_section.patch b/toolchain/gcc/patches-11.x/881-no_tm_section.patch
deleted file mode 100644
index 2029910fd0..0000000000
--- a/toolchain/gcc/patches-11.x/881-no_tm_section.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/libgcc/crtstuff.c
-+++ b/libgcc/crtstuff.c
-@@ -152,7 +152,7 @@ call_ ## FUNC (void) \
- #endif
-
- #if !defined(USE_TM_CLONE_REGISTRY) && defined(OBJECT_FORMAT_ELF)
--# define USE_TM_CLONE_REGISTRY 1
-+# define USE_TM_CLONE_REGISTRY 0
- #elif !defined(USE_TM_CLONE_REGISTRY)
- # define USE_TM_CLONE_REGISTRY 0
- #endif
diff --git a/toolchain/gcc/patches-11.x/900-bad-mips16-crt.patch b/toolchain/gcc/patches-11.x/900-bad-mips16-crt.patch
deleted file mode 100644
index dd6e9dc889..0000000000
--- a/toolchain/gcc/patches-11.x/900-bad-mips16-crt.patch
+++ /dev/null
@@ -1,9 +0,0 @@
---- a/libgcc/config/mips/t-mips16
-+++ b/libgcc/config/mips/t-mips16
-@@ -43,3 +43,6 @@ SYNC_CFLAGS = -mno-mips16
-
- # Version these symbols if building libgcc.so.
- SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips16.ver
-+
-+CRTSTUFF_T_CFLAGS += -mno-mips16
-+CRTSTUFF_T_CFLAGS_S += -mno-mips16
diff --git a/toolchain/gcc/patches-11.x/910-mbsd_multi.patch b/toolchain/gcc/patches-11.x/910-mbsd_multi.patch
deleted file mode 100644
index 2d1c3d1b80..0000000000
--- a/toolchain/gcc/patches-11.x/910-mbsd_multi.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-commit 99368862e44740ff4fd33760893f04e14f9dbdf1
-Author: Felix Fietkau <nbd at openwrt.org>
-Date: Tue Jul 31 00:52:27 2007 +0000
-
- Port the mbsd_multi patch from freewrt, which adds -fhonour-copts. This will emit warnings in packages that don't use our target cflags properly
-
- SVN-Revision: 8256
-
- This patch brings over a feature from MirBSD:
- * -fhonour-copts
- If this option is not given, it's warned (depending
- on environment variables). This is to catch errors
- of misbuilt packages which override CFLAGS themselves.
-
- This patch was authored by Thorsten Glaser <tg at mirbsd.de>
- with copyright assignment to the FSF in effect.
-
---- a/gcc/c-family/c-opts.c
-+++ b/gcc/c-family/c-opts.c
-@@ -107,6 +107,9 @@ static dump_flags_t original_dump_flags;
- /* Whether any standard preincluded header has been preincluded. */
- static bool done_preinclude;
-
-+/* Check if a port honours COPTS. */
-+static int honour_copts = 0;
-+
- static void handle_OPT_d (const char *);
- static void set_std_cxx98 (int);
- static void set_std_cxx11 (int);
-@@ -469,6 +472,12 @@ c_common_handle_option (size_t scode, co
- flag_no_builtin = !value;
- break;
-
-+ case OPT_fhonour_copts:
-+ if (c_language == clk_c) {
-+ honour_copts++;
-+ }
-+ break;
-+
- case OPT_fconstant_string_class_:
- constant_string_class_name = arg;
- break;
-@@ -1198,6 +1207,47 @@ c_common_init (void)
- return false;
- }
-
-+ if (c_language == clk_c) {
-+ char *ev = getenv ("GCC_HONOUR_COPTS");
-+ int evv;
-+ if (ev == NULL)
-+ evv = -1;
-+ else if ((*ev == '0') || (*ev == '\0'))
-+ evv = 0;
-+ else if (*ev == '1')
-+ evv = 1;
-+ else if (*ev == '2')
-+ evv = 2;
-+ else if (*ev == 's')
-+ evv = -1;
-+ else {
-+ warning (0, "unknown GCC_HONOUR_COPTS value, assuming 1");
-+ evv = 1; /* maybe depend this on something like MIRBSD_NATIVE? */
-+ }
-+ if (evv == 1) {
-+ if (honour_copts == 0) {
-+ error ("someone does not honour COPTS at all in lenient mode");
-+ return false;
-+ } else if (honour_copts != 1) {
-+ warning (0, "someone does not honour COPTS correctly, passed %d times",
-+ honour_copts);
-+ }
-+ } else if (evv == 2) {
-+ if (honour_copts == 0) {
-+ error ("someone does not honour COPTS at all in strict mode");
-+ return false;
-+ } else if (honour_copts != 1) {
-+ error ("someone does not honour COPTS correctly, passed %d times",
-+ honour_copts);
-+ return false;
-+ }
-+ } else if (evv == 0) {
-+ if (honour_copts != 1)
-+ inform (UNKNOWN_LOCATION, "someone does not honour COPTS correctly, passed %d times",
-+ honour_copts);
-+ }
-+ }
-+
- return true;
- }
-
---- a/gcc/c-family/c.opt
-+++ b/gcc/c-family/c.opt
-@@ -1663,6 +1663,9 @@ C++ ObjC++ Optimization Alias(fexception
- fhonor-std
- C++ ObjC++ WarnRemoved
-
-+fhonour-copts
-+C ObjC C++ ObjC++ RejectNegative
-+
- fhosted
- C ObjC
- Assume normal C execution environment.
---- a/gcc/common.opt
-+++ b/gcc/common.opt
-@@ -1698,6 +1698,9 @@ fguess-branch-probability
- Common Var(flag_guess_branch_prob) Optimization
- Enable guessing of branch probabilities.
-
-+fhonour-copts
-+Common RejectNegative
-+
- ; Nonzero means ignore `#ident' directives. 0 means handle them.
- ; Generate position-independent code for executables if possible
- ; On SVR4 targets, it also controls whether or not to emit a
---- a/gcc/doc/invoke.texi
-+++ b/gcc/doc/invoke.texi
-@@ -9059,6 +9059,17 @@ This option is only supported for C and
- @option{-Wall} and by @option{-Wpedantic}, which can be disabled with
- @option{-Wno-pointer-sign}.
-
-+ at item -fhonour-copts
-+ at opindex fhonour-copts
-+If @env{GCC_HONOUR_COPTS} is set to 1, abort if this option is not
-+given at least once, and warn if it is given more than once.
-+If @env{GCC_HONOUR_COPTS} is set to 2, abort if this option is not
-+given exactly once.
-+If @env{GCC_HONOUR_COPTS} is set to 0 or unset, warn if this option
-+is not given exactly once.
-+The warning is quelled if @env{GCC_HONOUR_COPTS} is set to @samp{s}.
-+This flag and environment variable only affect the C language.
-+
- @item -Wstack-protector
- @opindex Wstack-protector
- @opindex Wno-stack-protector
---- a/gcc/opts.c
-+++ b/gcc/opts.c
-@@ -2448,6 +2448,9 @@ common_handle_option (struct gcc_options
- /* Currently handled in a prescan. */
- break;
-
-+ case OPT_fhonour_copts:
-+ break;
-+
- case OPT_Werror:
- dc->warning_as_error_requested = value;
- break;
diff --git a/toolchain/gcc/patches-11.x/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches-11.x/920-specs_nonfatal_getenv.patch
deleted file mode 100644
index 83bcb25a80..0000000000
--- a/toolchain/gcc/patches-11.x/920-specs_nonfatal_getenv.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-Author: Jo-Philipp Wich <jow at openwrt.org>
-Date: Sat Apr 21 03:02:39 2012 +0000
-
- gcc: add patch to make the getenv() spec function nonfatal if requested environment variable is unset
-
- SVN-Revision: 31390
-
---- a/gcc/gcc.c
-+++ b/gcc/gcc.c
-@@ -10106,8 +10106,10 @@ getenv_spec_function (int argc, const ch
- }
-
- if (!value)
-- fatal_error (input_location,
-- "environment variable %qs not defined", varname);
-+ {
-+ warning (input_location, "environment variable %qs not defined", varname);
-+ value = "";
-+ }
-
- /* We have to escape every character of the environment variable so
- they are not interpreted as active spec characters. A
diff --git a/toolchain/gcc/patches-11.x/931-libffi-fix-MIPS-softfloat-build-issue.patch b/toolchain/gcc/patches-11.x/931-libffi-fix-MIPS-softfloat-build-issue.patch
deleted file mode 100644
index fb4cb1533a..0000000000
--- a/toolchain/gcc/patches-11.x/931-libffi-fix-MIPS-softfloat-build-issue.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001
-From: BangLang Huang <banglang.huang at foxmail.com>
-Date: Wed, 9 Nov 2016 10:36:49 +0800
-Subject: [PATCH] libffi: fix MIPS softfloat build issue
-
-Backported from github.com/libffi/libffi#272
-
-Signed-off-by: BangLang Huang <banglang.huang at foxmail.com>
-Signed-off-by: Yousong Zhou <yszhou4tech at gmail.com>
----
- libffi/src/mips/n32.S | 17 +++++++++++++++++
- libffi/src/mips/o32.S | 17 +++++++++++++++++
- 2 files changed, 34 insertions(+)
-
---- a/libffi/src/mips/n32.S
-+++ b/libffi/src/mips/n32.S
-@@ -107,6 +107,16 @@ loadregs:
-
- REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
-
-+#ifdef __mips_soft_float
-+ REG_L a0, 0*FFI_SIZEOF_ARG(t9)
-+ REG_L a1, 1*FFI_SIZEOF_ARG(t9)
-+ REG_L a2, 2*FFI_SIZEOF_ARG(t9)
-+ REG_L a3, 3*FFI_SIZEOF_ARG(t9)
-+ REG_L a4, 4*FFI_SIZEOF_ARG(t9)
-+ REG_L a5, 5*FFI_SIZEOF_ARG(t9)
-+ REG_L a6, 6*FFI_SIZEOF_ARG(t9)
-+ REG_L a7, 7*FFI_SIZEOF_ARG(t9)
-+#else
- and t4, t6, ((1<<FFI_FLAG_BITS)-1)
- REG_L a0, 0*FFI_SIZEOF_ARG(t9)
- beqz t4, arg1_next
-@@ -193,6 +203,7 @@ arg7_next:
- arg8_doublep:
- l.d $f19, 7*FFI_SIZEOF_ARG(t9)
- arg8_next:
-+#endif
-
- callit:
- # Load the function pointer
-@@ -214,6 +225,7 @@ retint:
- b epilogue
-
- retfloat:
-+#ifndef __mips_soft_float
- bne t6, FFI_TYPE_FLOAT, retdouble
- jal t9
- REG_L t4, 4*FFI_SIZEOF_ARG($fp)
-@@ -272,6 +284,7 @@ retstruct_f_d:
- s.s $f0, 0(t4)
- s.d $f2, 8(t4)
- b epilogue
-+#endif
-
- retstruct_d_soft:
- bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
-@@ -429,6 +442,7 @@ ffi_closure_N32:
- REG_S a6, A6_OFF2($sp)
- REG_S a7, A7_OFF2($sp)
-
-+#ifndef __mips_soft_float
- # Store all possible float/double registers.
- s.d $f12, F12_OFF2($sp)
- s.d $f13, F13_OFF2($sp)
-@@ -438,6 +452,7 @@ ffi_closure_N32:
- s.d $f17, F17_OFF2($sp)
- s.d $f18, F18_OFF2($sp)
- s.d $f19, F19_OFF2($sp)
-+#endif
-
- # Call ffi_closure_mips_inner_N32 to do the real work.
- LA t9, ffi_closure_mips_inner_N32
-@@ -458,6 +473,7 @@ cls_retint:
- b cls_epilogue
-
- cls_retfloat:
-+#ifndef __mips_soft_float
- bne v0, FFI_TYPE_FLOAT, cls_retdouble
- l.s $f0, V0_OFF2($sp)
- b cls_epilogue
-@@ -500,6 +516,7 @@ cls_retstruct_f_d:
- l.s $f0, V0_OFF2($sp)
- l.d $f2, V1_OFF2($sp)
- b cls_epilogue
-+#endif
-
- cls_retstruct_small2:
- REG_L v0, V0_OFF2($sp)
---- a/libffi/src/mips/o32.S
-+++ b/libffi/src/mips/o32.S
-@@ -82,13 +82,16 @@ sixteen:
-
- ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
-
-+#ifndef __mips_soft_float
- bnez t0, pass_d # make it quick for int
-+#endif
- REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the
- REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs.
- REG_L a2, 2*FFI_SIZEOF_ARG($sp)
- REG_L a3, 3*FFI_SIZEOF_ARG($sp)
- b call_it
-
-+#ifndef __mips_soft_float
- pass_d:
- bne t0, FFI_ARGS_D, pass_f
- l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
-@@ -130,6 +133,7 @@ pass_f_d:
- # bne t0, FFI_ARGS_F_D, call_it
- l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
- l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float
-+#endif
-
- call_it:
- # Load the function pointer
-@@ -158,14 +162,23 @@ retfloat:
- bne t2, FFI_TYPE_FLOAT, retdouble
- jalr t9
- REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
-+#ifndef __mips_soft_float
- s.s $f0, 0(t0)
-+#else
-+ REG_S v0, 0(t0)
-+#endif
- b epilogue
-
- retdouble:
- bne t2, FFI_TYPE_DOUBLE, noretval
- jalr t9
- REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
-+#ifndef __mips_soft_float
- s.d $f0, 0(t0)
-+#else
-+ REG_S v1, 4(t0)
-+ REG_S v0, 0(t0)
-+#endif
- b epilogue
-
- noretval:
-@@ -261,9 +274,11 @@ $LCFI7:
- li $13, 1 # FFI_O32
- bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT
-
-+#ifndef __mips_soft_float
- # Store all possible float/double registers.
- s.d $f12, FA_0_0_OFF2($fp)
- s.d $f14, FA_1_0_OFF2($fp)
-+#endif
- 1:
- # Call ffi_closure_mips_inner_O32 to do the work.
- la t9, ffi_closure_mips_inner_O32
-@@ -281,6 +296,7 @@ $LCFI7:
- li $13, 1 # FFI_O32
- bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT
-
-+#ifndef __mips_soft_float
- li $9, FFI_TYPE_FLOAT
- l.s $f0, V0_OFF2($fp)
- beq $8, $9, closure_done
-@@ -288,6 +304,7 @@ $LCFI7:
- li $9, FFI_TYPE_DOUBLE
- l.d $f0, V0_OFF2($fp)
- beq $8, $9, closure_done
-+#endif
- 1:
- REG_L $3, V1_OFF2($fp)
- REG_L $2, V0_OFF2($fp)
diff --git a/toolchain/gcc/patches-11.x/960-gotools-fix-compilation-when-making-cross-compiler.patch b/toolchain/gcc/patches-11.x/960-gotools-fix-compilation-when-making-cross-compiler.patch
deleted file mode 100644
index b1d7576328..0000000000
--- a/toolchain/gcc/patches-11.x/960-gotools-fix-compilation-when-making-cross-compiler.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From dda6b050cd74a352670787a294596a9c56c21327 Mon Sep 17 00:00:00 2001
-From: Yousong Zhou <yszhou4tech at gmail.com>
-Date: Fri, 4 May 2018 18:20:53 +0800
-Subject: [PATCH] gotools: fix compilation when making cross compiler
-
-libgo is "the runtime support library for the Go programming language.
-This library is intended for use with the Go frontend."
-
-gccgo will link target files with libgo.so which depends on libgcc_s.so.1, but
-the linker will complain that it cannot find it. That's because shared libgcc
-is not present in the install directory yet. libgo.so was made without problem
-because gcc will emit -lgcc_s when compiled with -shared option. When gotools
-were being made, it was supplied with -static-libgcc thus no link option was
-provided. Check LIBGO in gcc/go/gcc-spec.c for how gccgo make a builtin spec
-for linking with libgo.so
-
-- GccgoCrossCompilation, https://github.com/golang/go/wiki/GccgoCrossCompilation
-- Cross-building instructions, http://www.eglibc.org/archives/patches/msg00078.html
-
-When 3-pass GCC compilation is used, shared libgcc runtime libraries will be
-available after gcc pass2 completed and will meet the gotools link requirement
-at gcc pass3
----
- gotools/Makefile.am | 4 +++-
- gotools/Makefile.in | 4 +++-
- 2 files changed, 6 insertions(+), 2 deletions(-)
-
---- a/gotools/Makefile.am
-+++ b/gotools/Makefile.am
-@@ -26,6 +26,7 @@ PWD_COMMAND = $${PWDCMD-pwd}
- STAMP = echo timestamp >
-
- libgodir = ../$(target_noncanonical)/libgo
-+libgccdir = ../$(target_noncanonical)/libgcc
- LIBGODEP = $(libgodir)/libgo.la
-
- LIBGOTOOL = $(libgodir)/libgotool.a
-@@ -41,7 +42,8 @@ GOCFLAGS = $(CFLAGS_FOR_TARGET)
- GOCOMPILE = $(GOCOMPILER) $(GOCFLAGS)
-
- AM_GOCFLAGS = -I $(libgodir)
--AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs
-+AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs \
-+ -L $(libgccdir) -L $(libgccdir)/.libs -lgcc_s
- GOLINK = $(GOCOMPILER) $(GOCFLAGS) $(AM_GOCFLAGS) $(LDFLAGS) $(AM_LDFLAGS) -o $@
-
- libgosrcdir = $(srcdir)/../libgo/go
---- a/gotools/Makefile.in
-+++ b/gotools/Makefile.in
-@@ -337,6 +337,7 @@ mkinstalldirs = $(SHELL) $(toplevel_srcd
- PWD_COMMAND = $${PWDCMD-pwd}
- STAMP = echo timestamp >
- libgodir = ../$(target_noncanonical)/libgo
-+libgccdir = ../$(target_noncanonical)/libgcc
- LIBGODEP = $(libgodir)/libgo.la
- LIBGOTOOL = $(libgodir)/libgotool.a
- @NATIVE_FALSE at GOCOMPILER = $(GOC)
-@@ -346,7 +347,8 @@ LIBGOTOOL = $(libgodir)/libgotool.a
- GOCFLAGS = $(CFLAGS_FOR_TARGET)
- GOCOMPILE = $(GOCOMPILER) $(GOCFLAGS)
- AM_GOCFLAGS = -I $(libgodir)
--AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs
-+AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs \
-+ -L $(libgccdir) -L $(libgccdir)/.libs -lgcc_s
- GOLINK = $(GOCOMPILER) $(GOCFLAGS) $(AM_GOCFLAGS) $(LDFLAGS) $(AM_LDFLAGS) -o $@
- libgosrcdir = $(srcdir)/../libgo/go
- cmdsrcdir = $(libgosrcdir)/cmd
diff --git a/toolchain/gcc/patches-11.x/970-macos_arm64-building-fix.patch b/toolchain/gcc/patches-11.x/970-macos_arm64-building-fix.patch
deleted file mode 100644
index 424899eb9c..0000000000
--- a/toolchain/gcc/patches-11.x/970-macos_arm64-building-fix.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-commit 9c6e71079b46ad5433165feaa2001450f2017b56
-Author: Przemysław Buczkowski <prem at prem.moe>
-Date: Mon Aug 16 13:16:21 2021 +0100
-
- GCC: Patch for Apple Silicon compatibility
-
- This patch fixes a linker error occuring when compiling
- the cross-compiler on macOS and ARM64 architecture.
-
- Adapted from:
- https://github.com/richfelker/musl-cross-make/issues/116#issuecomment-823612404
-
- Change-Id: Ia3ee98a163bbb62689f42e2da83a5ef36beb0913
- Reviewed-on: https://review.haiku-os.org/c/buildtools/+/4329
- Reviewed-by: John Scipione <jscipione at gmail.com>
- Reviewed-by: Adrien Destugues <pulkomandy at gmail.com>
-
---- a/gcc/config/aarch64/aarch64.h
-+++ b/gcc/config/aarch64/aarch64.h
-@@ -1236,7 +1236,7 @@ extern const char *aarch64_rewrite_mcpu
- #define MCPU_TO_MARCH_SPEC_FUNCTIONS \
- { "rewrite_mcpu", aarch64_rewrite_mcpu },
-
--#if defined(__aarch64__)
-+#if defined(__aarch64__) && ! defined(__APPLE__)
- extern const char *host_detect_local_cpu (int argc, const char **argv);
- #define HAVE_LOCAL_CPU_DETECT
- # define EXTRA_SPEC_FUNCTIONS \
---- a/gcc/config/host-darwin.c
-+++ b/gcc/config/host-darwin.c
-@@ -22,6 +22,8 @@
- #include "coretypes.h"
- #include "diagnostic-core.h"
- #include "config/host-darwin.h"
-+#include "hosthooks.h"
-+#include "hosthooks-def.h"
-
- /* Yes, this is really supposed to work. */
- /* This allows for a pagesize of 16384, which we have on Darwin20, but should
-@@ -79,3 +81,5 @@ darwin_gt_pch_use_address (void *addr, s
-
- return ret;
- }
-+
-+const struct host_hooks host_hooks = HOST_HOOKS_INITIALIZER;
diff --git a/toolchain/gcc/patches-11.x/980-fix-build-error-with-Xcode-16.3.patch b/toolchain/gcc/patches-11.x/980-fix-build-error-with-Xcode-16.3.patch
deleted file mode 100644
index c55100133c..0000000000
--- a/toolchain/gcc/patches-11.x/980-fix-build-error-with-Xcode-16.3.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 93954654b87552c4fe0273cab99d0f42f213f7f8 Mon Sep 17 00:00:00 2001
-From: Georgi Valkov <gvalkov at gmail.com>
-Date: Mon, 14 Apr 2025 15:45:59 +0300
-Subject: [PATCH] zlib: fix build error with Xcode 16.3
-
-Xcode 16.3 defines TARGET_OS_MAC, it was not defined in prior versions.
-zutil.h conditionally defines fdopen as NULL when this macro is defined,
-resulting in the following build error:
-
-/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/usr/include/_stdio.h:318:7: error: expected identifier or '('
- 318 | FILE *fdopen(int, const char *) __DARWIN_ALIAS_STARTING(__MAC_10_6, __IPHONE_2_0, __DARWIN_ALIAS(fdopen));
- | ^
-./zutil.h:147:33: note: expanded from macro 'fdopen'
- 147 | # define fdopen(fd,mode) NULL /* No fdopen() */
-
-In Xcode 16.2 and earlier, TARGET_OS_MAC was not defined so this entire
-block was ignored, gcc and gdb used to compile and work fine.
-
-This may have been used for compatibility with older versions of macOS,
-but is no longer needed. By pure luck, the build worked fine for a long
-time, because it did not properly detect macOS.
-Fixed by removing the check for TARGET_OS_MAC.
-
-Note that since Xcode 16.3, an entire set of TARGET_OS macros
-are now defined, most of which are set to 0:
-TARGET_OS_LINUX 0
-TARGET_OS_MAC 1
-TARGET_OS_OSX 1
-
-[1] https://github.com/openwrt/openwrt/pull/18467
-
-Signed-off-by: Georgi Valkov <gvalkov at gmail.com>
----
- zlib/zutil.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/zlib/zutil.h
-+++ b/zlib/zutil.h
-@@ -130,7 +130,7 @@ extern z_const char * const z_errmsg[10]
- # endif
- #endif
-
--#if defined(MACOS) || defined(TARGET_OS_MAC)
-+#if defined(MACOS)
- # define OS_CODE 7
- # ifndef Z_SOLO
- # if defined(__MWERKS__) && __dest_os != __be_os && __dest_os != __win32_os
More information about the lede-commits
mailing list