[openwrt/openwrt] realtek: backport MIPS GIC patch

[LEDE Commits]

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f1257b1ca3d70b9dbf144783417dbecdbfff8665

commit f1257b1ca3d70b9dbf144783417dbecdbfff8665
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Sun Jun 22 03:49:29 2025 -0400

    realtek: backport MIPS GIC patch
    
    Upstream has gained support for forced affinity settings in the MIPS
    GIC interrupt controller. This is needed to enable the Otto timer on
    the RTL931x platform. See
    
    https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/
    commit/?id=2250db8628a0d8293ad2e0671138b848a185fba1
    
    Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
    Link: https://github.com/openwrt/openwrt/pull/19205
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...302-6.17-irqchip-mips-gic-forced-affinity.patch | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/target/linux/realtek/patches-6.12/302-6.17-irqchip-mips-gic-forced-affinity.patch b/target/linux/realtek/patches-6.12/302-6.17-irqchip-mips-gic-forced-affinity.patch
new file mode 100644
index 0000000000..cf04d60703
--- /dev/null
+++ b/target/linux/realtek/patches-6.12/302-6.17-irqchip-mips-gic-forced-affinity.patch
@@ -0,0 +1,47 @@
+From 2250db8628a0d8293ad2e0671138b848a185fba1 Mon Sep 17 00:00:00 2001
+From: Markus Stockhausen <markus.stockhausen at gmx.de>
+Date: Sat, 21 Jun 2025 01:49:51 -0400
+Subject: irqchip/mips-gic: Allow forced affinity
+
+Devices of the Realtek MIPS Otto platform use the official rtl-otto-timer
+as clock event generator and CPU clocksource. It is registered for each CPU
+startup via cpuhp_setup_state() and forces the affinity of the clockevent
+interrupts to the appropriate CPU via irq_force_affinity().
+
+On the "smaller" devices with a vendor specific interrupt controller
+(supported by irq-realtek-rtl) the registration works fine. The "larger"
+RTL931x series is based on a MIPS interAptiv dual core with a MIPS GIC
+controller. Interrupt routing setup is cancelled because gic_set_affinity()
+does not accept the current (not yet online) CPU as a target.
+
+Relax the checks by evaluating the force parameter that is provided for
+exactly this purpose like in other drivers. With this the affinity can be
+set as follows:
+
+ - force = false: allow to set affinity to any online cpu
+ - force = true:  allow to set affinity to any cpu
+
+Co-developed-by: Sebastian Gottschall <s.gottschall at dd-wrt.com>
+Signed-off-by: Sebastian Gottschall <s.gottschall at dd-wrt.com>
+Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
+Signed-off-by: Thomas Gleixner <tglx at linutronix.de>
+Link: https://lore.kernel.org/all/20250621054952.380374-1-markus.stockhausen@gmx.de
+---
+ drivers/irqchip/irq-mips-gic.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/irq-mips-gic.c
++++ b/drivers/irqchip/irq-mips-gic.c
+@@ -263,7 +263,11 @@ static int gic_set_affinity(struct irq_d
+ 	unsigned long flags;
+ 	unsigned int cpu;
+ 
+-	cpu = cpumask_first_and(cpumask, cpu_online_mask);
++	if (force)
++		cpu = cpumask_first(cpumask);
++	else
++		cpu = cpumask_first_and(cpumask, cpu_online_mask);
++
+ 	if (cpu >= NR_CPUS)
+ 		return -EINVAL;
+