[openwrt/openwrt] realtek: add support for Hasivo S1100W-8XGT-SE switch
LEDE Commits
lede-commits at lists.infradead.org
Sun Jul 27 09:51:06 PDT 2025
hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ed7d62caf27d41b9aa7b0426f5acd2e40e61285d
commit ed7d62caf27d41b9aa7b0426f5acd2e40e61285d
Author: Andrew LaMarche <andrewjlamarche at gmail.com>
AuthorDate: Sun Dec 1 15:29:48 2024 +0000
realtek: add support for Hasivo S1100W-8XGT-SE switch
This commit adds support for Hasivo S1100W-8XGT-SE switch.
Device specification
--------------------
SoC Type: RTL9303
RAM: Samsung K4B461646E-BYKO (512MB)
Flash: Fudan FM25Q128A (16 MB)
Ethernet: 8x 10G via 2x RTL8264 PHY
LEDs: 2 LEDs, 1 power green, 1 system green
Button: Reset
USB ports: None
Bootloader: Realtek U-Boot - U-Boot 2011.12.(3.6.6.55087) (Nov 13 2022 - 14:37:31)
Fan: 2 fans controlled by STC8G1K08 TSOP-20 microcontroller
Note: The fan appears to operate the same irrespective of the running
firmware. The STC9G1K08 is likely operating independently.
To explore the stock vendor firmware, there are 2 avenues to gain root
access. This is not necessary to install OpenWrt, but is here for
reference.
Root access via serial
----------------------
1. ctrl+t
2. password: switchrtk
3. press 's' for shell
Root access via SSH
-------------------
1. ctrl+t
2. password: switchrtk
3. sys command sh
4. log in with your username+password
5. ctrl+t
6. password: switchrtk
7. press 's' for shell
Credit to https://forum.openwrt.org/t/hasivo-switches/151758/174 for rooting instructions.
Installing OpenWrt
------------------
1. Connect to UART. UART requires soldering an RJ45 connector to the
console footprint on the board. The header is on the top right of
this image: https://forum.openwrt.org/uploads/default/original/3X/4/d/4d2ab97fad7e2c5b0a0bdca4de887918c6dcff97.jpeg
2. Set computer IP to 192.168.0.111.
3. Enter bootloader by pressing esc key during boot.
4. Enter password 'Hs2021cfgmg'.
5. Type 'XXXX'.
6. setenv bootcmd 'rtk network on; bootm 0xb4300000'
7. saveenv
8. rtk network on
9. tftpboot 0x84f00000 <openwrt-initramfs>
10. bootm 0x84f00000
Now you can copy over the sysupgrade image and install.
Credit to
https://forum.openwrt.org/t/hasivo-switches/151758/22?u=andrewjlamarche
for u-boot console access instructions.
Signed-off-by: Andrew LaMarche <andrewjlamarche at gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17137
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
.../realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts | 275 +++++++++++++++++++++
target/linux/realtek/image/rtl930x.mk | 13 +
target/linux/realtek/rtl930x/config-6.12 | 1 +
3 files changed, 289 insertions(+)
diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
new file mode 100644
index 0000000000..a156984a23
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts
@@ -0,0 +1,275 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl930x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "hasivo,s1100w-8xgt-se", "realtek,rtl930x-soc";
+ model = "Hasivo S1100W-8XGT-SE";
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>, /* 256 MiB lowmem */
+ <0x20000000 0x10000000>; /* 256 MiB highmem */
+ };
+
+ aliases {
+ led-boot = &led_sys;
+ led-failsafe = &led_sys;
+ led-running = &led_sys;
+ led-upgrade = &led_sys;
+ };
+
+ chosen {
+ stdout-path = "serial0:38400n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ button-reset {
+ label = "reset";
+ gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_sys: led-0 {
+ gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ };
+ };
+
+ led_set {
+ compatible = "realtek,rtl9300-leds";
+ active-low;
+
+ /*
+ * LED set 0
+ *
+ * - LED[0](Amber): 5G/LINK/ACT
+ * - LED[1](Green): 10G/LINK/ACT
+ * - LED[2](Amber): 1G/100M/10M/LINK/ACT
+ * - LED[3](Green): 2.5G/LINK/ACT
+ */
+ led_set0 = <0x0a02 0x0a01 0x0ba0 0x0a08>;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* stock is LOADER */
+ partition at 0 {
+ label = "u-boot";
+ reg = <0x0000000 0x00e0000>;
+ read-only;
+ };
+
+ /* stock is BDINFO */
+ partition at e0000 {
+ label = "u-boot-env";
+ reg = <0x00e0000 0x0010000>;
+ };
+
+ /* stock is SYSINFO */
+ partition at f0000 {
+ label = "u-boot-env2";
+ reg = <0x00f0000 0x0010000>;
+ read-only;
+ };
+
+ /* stock is JFFS2_CFG */
+ partition at 100000 {
+ label = "jffs";
+ reg = <0x0100000 0x0100000>;
+ };
+
+ /* stock is JFFS2_LOG */
+ partition at 200000 {
+ label = "jffs2";
+ reg = <0x0200000 0x0100000>;
+ };
+
+ /* stock is RUNTIME */
+ partition at 300000 {
+ compatible = "openwrt,uimage", "denx,uimage";
+ label = "firmware";
+ reg = <0x0300000 0x0c00000>;
+ };
+
+ /* stock is OEMINFO */
+ partition at f00000 {
+ label = "oeminfo";
+ reg = <0x0f00000 0x0100000>;
+ read-only;
+ };
+ };
+ };
+};
+
+ðernet0 {
+ mdio: mdio-bus {
+ compatible = "realtek,rtl838x-mdio";
+ regmap = <ðernet0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy at 0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 0>;
+ reg = <0>;
+ sds = <2>;
+ };
+
+ phy8: ethernet-phy at 8 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 1>;
+ reg = <8>;
+ sds = <3>;
+ };
+
+ phy16: ethernet-phy at 16 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 2>;
+ reg = <16>;
+ sds = <4>;
+ };
+
+ phy20: ethernet-phy at 20 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <0 3>;
+ reg = <20>;
+ sds = <5>;
+ };
+
+ phy24: ethernet-phy at 24 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 16>;
+ reg = <24>;
+ sds = <6>;
+ };
+
+ phy25: ethernet-phy at 25 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 17>;
+ reg = <25>;
+ sds = <7>;
+ };
+
+ phy26: ethernet-phy at 26 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 18>;
+ reg = <26>;
+ sds = <8>;
+ };
+
+ phy27: ethernet-phy at 27 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ rtl9300,smi-address = <3 19>;
+ reg = <27>;
+ sds = <9>;
+ };
+ };
+};
+
+&switch0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ label = "lan1";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy0>;
+ led-set = <0>;
+ };
+
+ port at 8 {
+ reg = <8>;
+ label = "lan2";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy8>;
+ led-set = <0>;
+ };
+
+ port at 16 {
+ reg = <16>;
+ label = "lan3";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy16>;
+ led-set = <0>;
+ };
+
+ port at 20 {
+ reg = <20>;
+ label = "lan4";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy20>;
+ led-set = <0>;
+ };
+
+ port at 24 {
+ reg = <24>;
+ label = "lan5";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy24>;
+ led-set = <0>;
+ };
+
+ port at 25 {
+ reg = <25>;
+ label = "lan6";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy25>;
+ led-set = <0>;
+ };
+
+ port at 26 {
+ reg = <26>;
+ label = "lan7";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy26>;
+ led-set = <0>;
+ };
+
+ port at 27 {
+ reg = <27>;
+ label = "lan8";
+ phy-mode = "usxgmii";
+ phy-handle = <&phy27>;
+ led-set = <0>;
+ };
+
+ /* Internal SoC */
+ port at 28 {
+ ethernet = <ðernet0>;
+ reg = <28>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <10000>;
+ full-duplex;
+ };
+ };
+ };
+};
diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk
index 28c17d6c48..44940c5c1c 100644
--- a/target/linux/realtek/image/rtl930x.mk
+++ b/target/linux/realtek/image/rtl930x.mk
@@ -5,6 +5,19 @@ define Build/xikestor-nosimg
mv $@.new $@
endef
+define Device/hasivo_s1100w-8xgt-se
+ SOC := rtl9303
+ DEVICE_VENDOR := Hasivo
+ DEVICE_MODEL := S1100W-8XGT-SE
+ IMAGE_SIZE := 12288k
+ KERNEL_INITRAMFS := \
+ kernel-bin | \
+ append-dtb | \
+ lzma | \
+ uImage lzma
+endef
+TARGET_DEVICES += hasivo_s1100w-8xgt-se
+
define Device/tplink_tl-st1008f_v2
SOC := rtl9303
UIMAGE_MAGIC := 0x93030000
diff --git a/target/linux/realtek/rtl930x/config-6.12 b/target/linux/realtek/rtl930x/config-6.12
index 3b3bcae8db..531360df5f 100644
--- a/target/linux/realtek/rtl930x/config-6.12
+++ b/target/linux/realtek/rtl930x/config-6.12
@@ -195,6 +195,7 @@ CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MDIO=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y
+CONFIG_RTL8261N_PHY=y
# CONFIG_RTL838X is not set
# CONFIG_RTL839X is not set
CONFIG_RTL930X=y
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