[openwrt/openwrt] ramips: restore full switch performance for USW-Flex
LEDE Commits
lede-commits at lists.infradead.org
Mon Jan 27 03:56:39 PST 2025
robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a5eb5ee1a633f67ae44e43f211396a9f734268be
commit a5eb5ee1a633f67ae44e43f211396a9f734268be
Author: Anders Melchiorsen <amelchio at nogoto.net>
AuthorDate: Wed Jan 22 21:54:57 2025 +0100
ramips: restore full switch performance for USW-Flex
Since commit f1c9afd80138 ("ramips: mt7621-dts: mux phy0/4 to gmac1") the
USW-Flex lan1 port has been attached directly to the CPU. This improves
routing performance but hinders switching.
This is a generally accepted trade-off in that commit but for USW-Flex it
is a questionable choice. This switch is designed to deliver PoE to remote
places and using it as a router is unlikely. Meanwhile, the lan1 port is
also PoE-in and will often be the uplink, carrying most of the traffic.
Reverting f1c9afd80138 for USW-Flex restores full 1 Gbps switching
performance on all ports.
Signed-off-by: Anders Melchiorsen <amelchio at nogoto.net>
Link: https://github.com/openwrt/openwrt/pull/17703
Signed-off-by: Robert Marko <robimarko at gmail.com>
(cherry picked from commit 62872f8bfd5c8bc80bb014417c6ed8057bbeb773)
---
target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
index f2fb48cac2..f548f1f9b7 100644
--- a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
+++ b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
@@ -64,19 +64,6 @@
label = "dsa";
};
-&gmac1 {
- status = "okay";
- label = "lan1";
- phy-handle = <ðphy4>;
-
- nvmem-cells = <&macaddr_eeprom>;
- nvmem-cell-names = "mac-address";
-};
-
-ðphy4 {
- /delete-property/ interrupts;
-};
-
&switch0 {
ports {
port at 0 {
@@ -98,6 +85,11 @@
status = "okay";
label = "lan2";
};
+
+ port at 4 {
+ status = "okay";
+ label = "lan1";
+ };
};
};
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