From lede-commits at lists.infradead.org  Wed Jan  1 02:07:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 05:07:13 -0500
Subject: [openwrt/openwrt]  realtek: debounce reset key for Zyxel GS1900
In-Reply-To: <173572603308.788547.14432965552884373551@git-01.infra.openwrt.org>
References: <173572603308.788547.14432965552884373551@git-01.infra.openwrt.org>
Message-ID: <mailman.29672.1735726038.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4357f32d41eb4364841cab831bcaf7848695b5d7

commit 4357f32d41eb4364841cab831bcaf7848695b5d7
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 1 11:01:48 2025 +0100

    realtek: debounce reset key for Zyxel GS1900
    
    When the reset button is next to the SFP cages, I2C operations on the
    modules might cause interference on the button's GPIO line. Add a
    debounce-interval of 5 times the poll-interval to ensure the line is
    actually stable for some time and not just glitching.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi   | 1 +
 target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts | 1 +
 2 files changed, 2 insertions(+)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index b985c4bc8e..59b44ad161 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -20,6 +20,7 @@
 
 	keys {
 		compatible = "gpio-keys-polled";
+		debounce-interval = <100>;
 		poll-interval = <20>;
 
 		reset {
diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
index 9844dc2180..ad3245fc27 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
@@ -41,6 +41,7 @@
 
 	keys {
 		compatible = "gpio-keys-polled";
+		debounce-interval = <100>;
 		poll-interval = <20>;
 
 		mode {



From lede-commits at lists.infradead.org  Wed Jan  1 02:23:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 05:23:09 -0500
Subject: [openwrt/openwrt]  Revert "mac80211: ath9k: remove platform leds"
In-Reply-To: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
References: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
Message-ID: <mailman.29673.1735726992.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/caee153f8db57d9994c7d57a9f39fb1767a440f1

commit caee153f8db57d9994c7d57a9f39fb1767a440f1
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Wed Jan 1 11:22:37 2025 +0100

    Revert "mac80211: ath9k: remove platform leds"
    
    This reverts commit ad2e55e02b67701b6af61c9348234987b1217a59.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../mac80211/patches/ath9k/100-gpio-of.patch       |  5 +-
 .../patches/ath9k/530-ath9k_extra_leds.patch       | 24 ++++------
 .../ath9k/531-ath9k_extra_platform_leds.patch      | 56 ++++++++++++++++++++++
 .../patches/ath9k/542-ath9k_debugfs_diag.patch     |  2 +-
 .../patches/ath9k/548-ath9k_enable_gpio_chip.patch | 16 +++++--
 .../ath9k/549-ath9k_enable_gpio_buttons.patch      |  8 ++--
 6 files changed, 87 insertions(+), 24 deletions(-)

diff --git a/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch b/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch
index 28dcc6cf85..2cddb59fc5 100644
--- a/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch
+++ b/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch
@@ -1,9 +1,12 @@
 --- a/drivers/net/wireless/ath/ath9k/hw.h
 +++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -976,6 +976,10 @@ struct ath_hw {
+@@ -976,6 +976,13 @@ struct ath_hw {
  	bool disable_2ghz;
  	bool disable_5ghz;
  
++	int num_leds;
++	const struct gpio_led *leds;
++
 +	unsigned num_btns;
 +	const struct gpio_keys_button *btns;
 +	unsigned btn_poll_interval;
diff --git a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
index 0377c3f0b6..4bb27d558c 100644
--- a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
+++ b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch
@@ -38,7 +38,7 @@
  #ifdef CPTCFG_ATH9K_DEBUGFS
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -39,61 +39,115 @@ static void ath_fill_led_pin(struct ath_
+@@ -39,61 +39,111 @@ static void ath_fill_led_pin(struct ath_
  		else
  			ah->led_pin = ATH_LED_PIN_DEF;
  	}
@@ -125,11 +125,11 @@
  {
 -	if (!sc->led_registered)
 -		return;
--
--	ath_led_brightness(&sc->led_cdev, LED_OFF);
--	led_classdev_unregister(&sc->led_cdev);
 +	struct ath_led *led;
  
+-	ath_led_brightness(&sc->led_cdev, LED_OFF);
+-	led_classdev_unregister(&sc->led_cdev);
+-
 -	ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin);
 +	while (!list_empty(&sc->leds)) {
 +		led = list_first_entry(&sc->leds, struct ath_led, list);
@@ -144,7 +144,6 @@
  void ath_init_leds(struct ath_softc *sc)
  {
 -	int ret;
-+	struct ath_hw *ah = sc->sc_ah;
 +	char led_name[32];
 +	const char *trigger;
 +
@@ -163,21 +162,18 @@
 -		"ath9k-%s", wiphy_name(sc->hw->wiphy));
 -	sc->led_cdev.name = sc->led_name;
 -	sc->led_cdev.brightness_set = ath_led_brightness;
--
--	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
--	if (ret < 0)
-+	if (ah->led_pin < 0)
- 		return;
- 
--	sc->led_registered = true;
 +	snprintf(led_name, sizeof(led_name), "ath9k-%s",
 +		 wiphy_name(sc->hw->wiphy));
-+
+ 
+-	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
+-	if (ret < 0)
+-		return;
 +	if (ath9k_led_blink)
 +		trigger = sc->led_default_trigger;
 +	else
 +		trigger = ieee80211_get_radio_led_name(sc->hw);
-+
+ 
+-	sc->led_registered = true;
 +	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
 +			   !sc->sc_ah->config.led_active_high);
  }
diff --git a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
new file mode 100644
index 0000000000..4f41cd9139
--- /dev/null
+++ b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
@@ -0,0 +1,56 @@
+--- a/drivers/net/wireless/ath/ath9k/gpio.c
++++ b/drivers/net/wireless/ath/ath9k/gpio.c
+@@ -108,6 +108,24 @@ int ath_create_gpio_led(struct ath_softc
+ 	return ret;
+ }
+ 
++static int ath_create_platform_led(struct ath_softc *sc,
++				   const struct gpio_led *gpio)
++{
++	struct ath_led *led;
++	int ret;
++
++	led = kzalloc(sizeof(*led), GFP_KERNEL);
++	if (!led)
++		return -ENOMEM;
++
++	led->gpio = gpio;
++	ret = ath_add_led(sc, led);
++	if (ret < 0)
++		kfree(led);
++
++	return ret;
++}
++
+ void ath_deinit_leds(struct ath_softc *sc)
+ {
+ 	struct ath_led *led;
+@@ -124,8 +142,10 @@ void ath_deinit_leds(struct ath_softc *s
+ 
+ void ath_init_leds(struct ath_softc *sc)
+ {
++	struct ath_hw *ah = sc->sc_ah;
+ 	char led_name[32];
+ 	const char *trigger;
++	int i;
+ 
+ 	INIT_LIST_HEAD(&sc->leds);
+ 
+@@ -134,6 +154,17 @@ void ath_init_leds(struct ath_softc *sc)
+ 
+ 	ath_fill_led_pin(sc);
+ 
++	if (ah->leds && ah->num_leds)
++		for (i = 0; i < ah->num_leds; i++) {
++			if (ah->leds[i].gpio == ah->led_pin)
++				ah->led_pin = -1;
++
++			ath_create_platform_led(sc, &ah->leds[i]);
++		}
++
++	if (ah->led_pin < 0)
++		return;
++
+ 	snprintf(led_name, sizeof(led_name), "ath9k-%s",
+ 		 wiphy_name(sc->hw->wiphy));
+ 
diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
index 90a8e4b0fb..9821716c6a 100644
--- a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
@@ -84,7 +84,7 @@
  	bool reset_power_on;
  	bool htc_reset_init;
  
-@@ -1083,6 +1091,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
+@@ -1086,6 +1094,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
  bool ath9k_hw_check_alive(struct ath_hw *ah);
  
  bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
diff --git a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
index 0efe23b9dc..1c071c4621 100644
--- a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+++ b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
@@ -192,7 +192,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	return 0;
  }
  
-@@ -117,17 +241,24 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -135,17 +259,24 @@ void ath_deinit_leds(struct ath_softc *s
  
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
@@ -216,8 +216,8 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +	struct device_node *np = sc->dev->of_node;
  	char led_name[32];
  	const char *trigger;
- 
-@@ -136,6 +267,12 @@ void ath_init_leds(struct ath_softc *sc)
+ 	int i;
+@@ -155,6 +286,12 @@ void ath_init_leds(struct ath_softc *sc)
  	if (AR_SREV_9100(sc->sc_ah))
  		return;
  
@@ -229,4 +229,12 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +
  	ath_fill_led_pin(sc);
  
- 	if (ah->led_pin < 0)
+ 	if (ah->leds && ah->num_leds)
+@@ -179,6 +316,7 @@ void ath_init_leds(struct ath_softc *sc)
+ 	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
+ 			   !sc->sc_ah->config.led_active_high);
+ }
++
+ #endif
+ 
+ /*******************/
diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
index 78700222a9..92f110b95c 100644
--- a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #endif /* CONFIG_GPIOLIB */
  
  /********************************/
-@@ -239,6 +310,7 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -257,6 +328,7 @@ void ath_deinit_leds(struct ath_softc *s
  {
  	struct ath_led *led;
  
@@ -120,11 +120,11 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
  #ifdef CONFIG_GPIOLIB
-@@ -274,6 +346,7 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -293,6 +365,7 @@ void ath_init_leds(struct ath_softc *sc)
  	}
  
  	ath_fill_led_pin(sc);
 +	ath9k_init_buttons(sc);
  
- 	if (ah->led_pin < 0)
- 		return;
+ 	if (ah->leds && ah->num_leds)
+ 		for (i = 0; i < ah->num_leds; i++) {



From lede-commits at lists.infradead.org  Wed Jan  1 02:23:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 05:23:11 -0500
Subject: [openwrt/openwrt]  Revert "mac80211: remove ath9k_platform_data"
In-Reply-To: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
References: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
Message-ID: <mailman.29674.1735726997.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/72b59359565a1e58e62074faebe4111c0ea08140

commit 72b59359565a1e58e62074faebe4111c0ea08140
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Wed Jan 1 11:22:40 2025 +0100

    Revert "mac80211: remove ath9k_platform_data"
    
    This reverts commit fdc2c6ab9901ad3e64ec1f93d5ccdc38990243b4.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/kernel/mac80211/Makefile                   |   2 +-
 .../mac80211/patches/ath9k/100-gpio-of.patch       |  16 ----
 .../ath9k/531-ath9k_extra_platform_leds.patch      |  28 ++++--
 .../patches/ath9k/542-ath9k_debugfs_diag.patch     |   2 +-
 .../patches/ath9k/547-ath9k_led_defstate_fix.patch |   2 +-
 .../patches/ath9k/548-ath9k_enable_gpio_chip.patch |  23 +++--
 .../ath9k/549-ath9k_enable_gpio_buttons.patch      |  36 +++----
 .../mac80211/patches/ath9k/552-ath9k-ahb_of.patch  | 106 +++++++++++++++------
 8 files changed, 130 insertions(+), 85 deletions(-)

diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
index c3ffb8dc06..b0de3950b9 100644
--- a/package/kernel/mac80211/Makefile
+++ b/package/kernel/mac80211/Makefile
@@ -11,7 +11,7 @@ include $(INCLUDE_DIR)/kernel.mk
 PKG_NAME:=mac80211
 
 PKG_VERSION:=6.12.6
-PKG_RELEASE:=2
+PKG_RELEASE:=1
 PKG_LICENSE:=GPL-2.0-only
 PKG_LICENSE_FILES:=COPYING
 
diff --git a/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch b/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch
deleted file mode 100644
index 2cddb59fc5..0000000000
--- a/package/kernel/mac80211/patches/ath9k/100-gpio-of.patch
+++ /dev/null
@@ -1,16 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -976,6 +976,13 @@ struct ath_hw {
- 	bool disable_2ghz;
- 	bool disable_5ghz;
- 
-+	int num_leds;
-+	const struct gpio_led *leds;
-+
-+	unsigned num_btns;
-+	const struct gpio_keys_button *btns;
-+	unsigned btn_poll_interval;
-+
- 	const struct firmware *eeprom_blob;
- 	u16 *nvmem_blob;	/* devres managed */
- 	size_t nvmem_blob_len;
diff --git a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
index 4f41cd9139..1055bd335c 100644
--- a/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
+++ b/package/kernel/mac80211/patches/ath9k/531-ath9k_extra_platform_leds.patch
@@ -1,6 +1,14 @@
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -108,6 +108,24 @@ int ath_create_gpio_led(struct ath_softc
+@@ -15,6 +15,7 @@
+  */
+ 
+ #include "ath9k.h"
++#include <linux/ath9k_platform.h>
+ 
+ /********************************/
+ /*	 LED functions		*/
+@@ -108,6 +109,24 @@ int ath_create_gpio_led(struct ath_softc
  	return ret;
  }
  
@@ -25,30 +33,30 @@
  void ath_deinit_leds(struct ath_softc *sc)
  {
  	struct ath_led *led;
-@@ -124,8 +142,10 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -124,8 +143,10 @@ void ath_deinit_leds(struct ath_softc *s
  
  void ath_init_leds(struct ath_softc *sc)
  {
-+	struct ath_hw *ah = sc->sc_ah;
++	struct ath9k_platform_data *pdata = sc->dev->platform_data;
  	char led_name[32];
  	const char *trigger;
 +	int i;
  
  	INIT_LIST_HEAD(&sc->leds);
  
-@@ -134,6 +154,17 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -134,6 +155,17 @@ void ath_init_leds(struct ath_softc *sc)
  
  	ath_fill_led_pin(sc);
  
-+	if (ah->leds && ah->num_leds)
-+		for (i = 0; i < ah->num_leds; i++) {
-+			if (ah->leds[i].gpio == ah->led_pin)
-+				ah->led_pin = -1;
++	if (pdata && pdata->leds && pdata->num_leds)
++		for (i = 0; i < pdata->num_leds; i++) {
++			if (pdata->leds[i].gpio == sc->sc_ah->led_pin)
++				sc->sc_ah->led_pin = -1;
 +
-+			ath_create_platform_led(sc, &ah->leds[i]);
++			ath_create_platform_led(sc, &pdata->leds[i]);
 +		}
 +
-+	if (ah->led_pin < 0)
++	if (sc->sc_ah->led_pin < 0)
 +		return;
 +
  	snprintf(led_name, sizeof(led_name), "ath9k-%s",
diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
index 9821716c6a..f08301c7f4 100644
--- a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
+++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch
@@ -84,7 +84,7 @@
  	bool reset_power_on;
  	bool htc_reset_init;
  
-@@ -1086,6 +1094,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
+@@ -1079,6 +1087,7 @@ void ath9k_hw_check_nav(struct ath_hw *a
  bool ath9k_hw_check_alive(struct ath_hw *ah);
  
  bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
diff --git a/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
index d633c051b0..5d84cf0c42 100644
--- a/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
+++ b/package/kernel/mac80211/patches/ath9k/547-ath9k_led_defstate_fix.patch
@@ -13,7 +13,7 @@ Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz at wp.pl>
 
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -73,8 +73,11 @@ static int ath_add_led(struct ath_softc
+@@ -74,8 +74,11 @@ static int ath_add_led(struct ath_softc
  	ath9k_hw_gpio_request_out(sc->sc_ah, gpio->gpio, gpio->name,
  				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  
diff --git a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
index 1c071c4621..9fb549cc19 100644
--- a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+++ b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
@@ -45,10 +45,10 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #ifdef CPTCFG_ATH9K_DEBUGFS
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -15,13 +15,131 @@
-  */
+@@ -16,13 +16,135 @@
  
  #include "ath9k.h"
+ #include <linux/ath9k_platform.h>
 +#include <linux/gpio.h>
 +
 +#ifdef CPTCFG_MAC80211_LEDS
@@ -126,7 +126,9 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +	gc->sc = sc;
 +	snprintf(gc->label, sizeof(gc->label), "ath9k-%s",
 +		 wiphy_name(sc->hw->wiphy));
++#ifdef CONFIG_OF
 +	gc->gchip.parent = sc->dev;
++#endif
 +	gc->gchip.label = gc->label;
 +	gc->gchip.base = -1;	/* determine base automatically */
 +	gc->gchip.ngpio = ah->caps.num_gpio_pins;
@@ -141,7 +143,9 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +		return;
 +	}
 +
++#ifdef CONFIG_OF
 +	gc->gchip.owner = NULL;
++#endif
 +	sc->gpiochip = gc;
 +}
 +
@@ -179,7 +183,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  static void ath_fill_led_pin(struct ath_softc *sc)
  {
  	struct ath_hw *ah = sc->sc_ah;
-@@ -79,6 +197,12 @@ static int ath_add_led(struct ath_softc
+@@ -80,6 +202,12 @@ static int ath_add_led(struct ath_softc
  	else
  		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
  
@@ -192,7 +196,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	return 0;
  }
  
-@@ -135,17 +259,24 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -136,17 +264,24 @@ void ath_deinit_leds(struct ath_softc *s
  
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
@@ -212,15 +216,18 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  void ath_init_leds(struct ath_softc *sc)
  {
- 	struct ath_hw *ah = sc->sc_ah;
+ 	struct ath9k_platform_data *pdata = sc->dev->platform_data;
 +	struct device_node *np = sc->dev->of_node;
  	char led_name[32];
  	const char *trigger;
  	int i;
-@@ -155,6 +286,12 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -156,6 +291,15 @@ void ath_init_leds(struct ath_softc *sc)
  	if (AR_SREV_9100(sc->sc_ah))
  		return;
  
++	if (!np)
++		ath9k_register_gpio_chip(sc);
++
 +	/* setup gpio controller only if requested and skip the led_pin setup */
 +	if (of_property_read_bool(np, "gpio-controller")) {
 +		ath9k_register_gpio_chip(sc);
@@ -229,8 +236,8 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +
  	ath_fill_led_pin(sc);
  
- 	if (ah->leds && ah->num_leds)
-@@ -179,6 +316,7 @@ void ath_init_leds(struct ath_softc *sc)
+ 	if (pdata && pdata->leds && pdata->num_leds)
+@@ -180,6 +324,7 @@ void ath_init_leds(struct ath_softc *sc)
  	ath_create_gpio_led(sc, sc->sc_ah->led_pin, led_name, trigger,
  			   !sc->sc_ah->config.led_active_high);
  }
diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
index 92f110b95c..d164d89031 100644
--- a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
@@ -20,16 +20,16 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -16,6 +16,8 @@
- 
+@@ -17,6 +17,8 @@
  #include "ath9k.h"
+ #include <linux/ath9k_platform.h>
  #include <linux/gpio.h>
 +#include <linux/platform_device.h>
 +#include <linux/gpio_keys.h>
  
  #ifdef CPTCFG_MAC80211_LEDS
  
-@@ -124,6 +126,67 @@ static void ath9k_unregister_gpio_chip(s
+@@ -129,6 +131,67 @@ static void ath9k_unregister_gpio_chip(s
  	sc->gpiochip = NULL;
  }
  
@@ -40,7 +40,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +/* add GPIO buttons */
 +static void ath9k_init_buttons(struct ath_softc *sc)
 +{
-+	struct ath_hw *ah = sc->sc_ah;
++	struct ath9k_platform_data *pdata = sc->dev->platform_data;
 +	struct platform_device *pdev;
 +	struct gpio_keys_platform_data gkpdata;
 +	struct gpio_keys_button *bt;
@@ -49,28 +49,28 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +	if (!sc->gpiochip)
 +		return;
 +
-+	if (!ah->btns || !ah->num_btns)
++	if (!pdata || !pdata->btns || !pdata->num_btns)
 +		return;
 +
-+	bt = devm_kmemdup(sc->dev, ah->btns,
-+			  ah->num_btns * sizeof(struct gpio_keys_button),
++	bt = devm_kmemdup(sc->dev, pdata->btns,
++			  pdata->num_btns * sizeof(struct gpio_keys_button),
 +			  GFP_KERNEL);
 +	if (!bt)
 +		return;
 +
-+	for (i = 0; i < ah->num_btns; i++) {
-+		if (ah->btns[i].gpio == sc->sc_ah->led_pin)
++	for (i = 0; i < pdata->num_btns; i++) {
++		if (pdata->btns[i].gpio == sc->sc_ah->led_pin)
 +				sc->sc_ah->led_pin = -1;
 +
-+		ath9k_hw_gpio_request_in(sc->sc_ah, ah->btns[i].gpio,
++		ath9k_hw_gpio_request_in(sc->sc_ah, pdata->btns[i].gpio,
 +					 "ath9k-gpio");
-+		bt[i].gpio = sc->gpiochip->gchip.base + ah->btns[i].gpio;
++		bt[i].gpio = sc->gpiochip->gchip.base + pdata->btns[i].gpio;
 +	}
 +
 +	memset(&gkpdata, 0, sizeof(struct gpio_keys_platform_data));
 +	gkpdata.buttons = bt;
-+	gkpdata.nbuttons = ah->num_btns;
-+	gkpdata.poll_interval = ah->btn_poll_interval;
++	gkpdata.nbuttons = pdata->num_btns;
++	gkpdata.poll_interval = pdata->btn_poll_interval;
 +
 +	pdev = platform_device_register_data(sc->dev, "gpio-keys-polled",
 +					     PLATFORM_DEVID_AUTO, &gkpdata,
@@ -97,7 +97,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #else /* CONFIG_GPIOLIB */
  
  static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
-@@ -134,6 +197,14 @@ static inline void ath9k_unregister_gpio
+@@ -139,6 +202,14 @@ static inline void ath9k_unregister_gpio
  {
  }
  
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #endif /* CONFIG_GPIOLIB */
  
  /********************************/
-@@ -257,6 +328,7 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -262,6 +333,7 @@ void ath_deinit_leds(struct ath_softc *s
  {
  	struct ath_led *led;
  
@@ -120,11 +120,11 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
  #ifdef CONFIG_GPIOLIB
-@@ -293,6 +365,7 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -301,6 +373,7 @@ void ath_init_leds(struct ath_softc *sc)
  	}
  
  	ath_fill_led_pin(sc);
 +	ath9k_init_buttons(sc);
  
- 	if (ah->leds && ah->num_leds)
- 		for (i = 0; i < ah->num_leds; i++) {
+ 	if (pdata && pdata->leds && pdata->num_leds)
+ 		for (i = 0; i < pdata->num_leds; i++) {
diff --git a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
index a5ad2bcffb..3adc8bb8d6 100644
--- a/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
+++ b/package/kernel/mac80211/patches/ath9k/552-ath9k-ahb_of.patch
@@ -1,22 +1,27 @@
 --- a/drivers/net/wireless/ath/ath9k/ahb.c
 +++ b/drivers/net/wireless/ath/ath9k/ahb.c
-@@ -20,8 +20,12 @@
+@@ -20,7 +20,15 @@
  #include <linux/platform_device.h>
  #include <linux/module.h>
  #include <linux/mod_devicetable.h>
 +#include <linux/of_device.h>
  #include "ath9k.h"
- 
++#include <linux/ath9k_platform.h>
++
++#ifdef CONFIG_OF
 +#include <asm/mach-ath79/ath79.h>
 +#include <asm/mach-ath79/ar71xx_regs.h>
-+
++#include <linux/mtd/mtd.h>
++#endif
+ 
  static const struct platform_device_id ath9k_platform_id_table[] = {
  	{
- 		.name = "ath9k",
-@@ -69,22 +73,198 @@ static const struct ath_bus_ops ath_ahb_
+@@ -69,6 +77,192 @@ static const struct ath_bus_ops ath_ahb_
  	.eeprom_read = ath_ahb_eeprom_read,
  };
  
++#ifdef CONFIG_OF
++
 +#define QCA955X_DDR_CTL_CONFIG          0x108
 +#define QCA955X_DDR_CTL_CONFIG_ACT_WMAC BIT(23)
 +
@@ -157,7 +162,7 @@
 +
 +static int of_ath_ahb_probe(struct platform_device *pdev)
 +{
-+	struct ath_hw *ah = platform_get_drvdata(pdev);
++	struct ath9k_platform_data *pdata;
 +	const struct of_device_id *match;
 +	const struct of_ath_ahb_data *data;
 +	u8 led_pin;
@@ -165,17 +170,19 @@
 +	match = of_match_device(of_ath_ahb_match, &pdev->dev);
 +	data = (const struct of_ath_ahb_data *)match->data;
 +
++	pdata = dev_get_platdata(&pdev->dev);
++
 +	if (!of_property_read_u8(pdev->dev.of_node, "qca,led-pin", &led_pin))
-+		ah->led_pin = led_pin;
++		pdata->led_pin = led_pin;
 +	else
-+		ah->led_pin = -1;
++		pdata->led_pin = -1;
 +
 +	if (of_property_read_bool(pdev->dev.of_node, "qca,tx-gain-buffalo"))
-+		ah->config.tx_gain_buffalo = true;
++		pdata->tx_gain_buffalo = true;
 +
 +	if (data->wmac_reset) {
 +		data->wmac_reset();
-+		ah->external_reset = data->wmac_reset;
++		pdata->external_reset = data->wmac_reset;
 +	}
 +
 +	if (data->dev_id == AR9300_DEVID_AR953X) {
@@ -184,55 +191,94 @@
 +		 * Some vendors have an invalid bootstrap option
 +		 * set, which would break the WMAC here.
 +		 */
-+		ah->is_clk_25mhz = true;
++		pdata->is_clk_25mhz = true;
 +	} else if (data->bootstrap_reg && data->bootstrap_ref) {
 +		u32 t = ath79_reset_rr(data->bootstrap_reg);
 +		if (t & data->bootstrap_ref)
-+			ah->is_clk_25mhz = false;
++			pdata->is_clk_25mhz = false;
 +		else
-+			ah->is_clk_25mhz = true;
++			pdata->is_clk_25mhz = true;
 +	}
 +
-+	ah->get_mac_revision = data->soc_revision;
++	pdata->get_mac_revision = data->soc_revision;
 +
 +	return data->dev_id;
 +}
++#endif
 +
  static int ath_ahb_probe(struct platform_device *pdev)
  {
  	void __iomem *mem;
- 	struct ath_softc *sc;
- 	struct ieee80211_hw *hw;
- 	struct resource *res;
--	const struct platform_device_id *id = platform_get_device_id(pdev);
- 	int irq;
+@@ -80,6 +274,17 @@ static int ath_ahb_probe(struct platform
  	int ret = 0;
  	struct ath_hw *ah;
  	char hw_name[64];
--
--	if (!dev_get_platdata(&pdev->dev)) {
--		dev_err(&pdev->dev, "no platform data specified\n");
--		return -EINVAL;
--	}
-+	u32 dev_id;
++	u16 dev_id;
++
++	if (id)
++		dev_id = id->driver_data;
++
++#ifdef CONFIG_OF
++	if (pdev->dev.of_node)
++		pdev->dev.platform_data = devm_kzalloc(&pdev->dev,
++					sizeof(struct ath9k_platform_data),
++					GFP_KERNEL);
++#endif
  
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (res == NULL) {
-@@ -124,7 +304,8 @@ static int ath_ahb_probe(struct platform
+ 	if (!dev_get_platdata(&pdev->dev)) {
+ 		dev_err(&pdev->dev, "no platform data specified\n");
+@@ -118,17 +323,23 @@ static int ath_ahb_probe(struct platform
+ 	sc->mem = mem;
+ 	sc->irq = irq;
+ 
++#ifdef CONFIG_OF
++	dev_id = of_ath_ahb_probe(pdev);
++#endif
+ 	ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
+ 	if (ret) {
+ 		dev_err(&pdev->dev, "request_irq failed\n");
  		goto err_free_hw;
  	}
  
 -	ret = ath9k_init_device(id->driver_data, sc, &ath_ahb_bus_ops);
-+	dev_id = of_ath_ahb_probe(pdev);
 +	ret = ath9k_init_device(dev_id, sc, &ath_ahb_bus_ops);
  	if (ret) {
  		dev_err(&pdev->dev, "failed to initialize device\n");
  		goto err_irq;
-@@ -162,6 +343,7 @@ static struct platform_driver ath_ahb_dr
+ 	}
++#ifdef CONFIG_OF
++	pdev->dev.platform_data = NULL;
++#endif
+ 
+ 	ah = sc->sc_ah;
+ 	ath9k_hw_name(ah, hw_name, sizeof(hw_name));
+@@ -162,6 +373,9 @@ static struct platform_driver ath_ahb_dr
  	.remove_new = ath_ahb_remove,
  	.driver		= {
  		.name	= "ath9k",
++#ifdef CONFIG_OF
 +		.of_match_table = of_ath_ahb_match,
++#endif
  	},
  	.id_table    = ath9k_platform_id_table,
  };
+--- a/drivers/net/wireless/ath/ath9k/ath9k.h
++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+@@ -26,6 +26,7 @@
+ #include <linux/time.h>
+ #include <linux/hw_random.h>
+ #include <linux/gpio/driver.h>
++#include <linux/reset.h>
+ 
+ #include "common.h"
+ #include "debug.h"
+@@ -1013,6 +1014,9 @@ struct ath_softc {
+ 	struct ath_hw *sc_ah;
+ 	void __iomem *mem;
+ 	int irq;
++#ifdef CONFIG_OF
++	struct reset_control *reset;
++#endif
+ 	spinlock_t sc_serial_rw;
+ 	spinlock_t sc_pm_lock;
+ 	spinlock_t sc_pcu_lock;



From lede-commits at lists.infradead.org  Wed Jan  1 02:23:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 05:23:10 -0500
Subject: [openwrt/openwrt]  Revert "kernel: remove custom ath9k_platform.h"
In-Reply-To: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
References: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
Message-ID: <mailman.29677.1735726997.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/be3bc3df907b02c5a18b538265d02d8eea860063

commit be3bc3df907b02c5a18b538265d02d8eea860063
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Wed Jan 1 11:22:39 2025 +0100

    Revert "kernel: remove custom ath9k_platform.h"
    
    This reverts commit da0016b274008a4792102e72b3d66a84c7db4569.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../generic/files/include/linux/ath9k_platform.h   | 58 ++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/target/linux/generic/files/include/linux/ath9k_platform.h b/target/linux/generic/files/include/linux/ath9k_platform.h
new file mode 100644
index 0000000000..e210108568
--- /dev/null
+++ b/target/linux/generic/files/include/linux/ath9k_platform.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Atheros Communications Inc.
+ * Copyright (c) 2009 Gabor Juhos <juhosg at openwrt.org>
+ * Copyright (c) 2009 Imre Kaloz <kaloz at openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _LINUX_ATH9K_PLATFORM_H
+#define _LINUX_ATH9K_PLATFORM_H
+
+#define ATH9K_PLAT_EEP_MAX_WORDS	2048
+
+struct ath9k_platform_data {
+	const char *eeprom_name;
+
+	u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
+	u8 *macaddr;
+
+	int led_pin;
+	u32 gpio_mask;
+	u32 gpio_val;
+
+	u32 bt_active_pin;
+	u32 bt_priority_pin;
+	u32 wlan_active_pin;
+
+	bool endian_check;
+	bool is_clk_25mhz;
+	bool tx_gain_buffalo;
+	bool disable_2ghz;
+	bool disable_5ghz;
+	bool led_active_high;
+
+	int (*get_mac_revision)(void);
+	int (*external_reset)(void);
+
+	bool use_eeprom;
+
+	int num_leds;
+	const struct gpio_led *leds;
+
+	unsigned num_btns;
+	const struct gpio_keys_button *btns;
+	unsigned btn_poll_interval;
+};
+
+#endif /* _LINUX_ATH9K_PLATFORM_H */



From lede-commits at lists.infradead.org  Wed Jan  1 02:23:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 05:23:08 -0500
Subject: [openwrt/openwrt]  Revert "mac80211: ath9k: clean up gpiochip"
In-Reply-To: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
References: <173572698820.811212.13454759721773647749@git-01.infra.openwrt.org>
Message-ID: <mailman.29678.1735727001.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/04601004befe75a430696139e50595a54140e750

commit 04601004befe75a430696139e50595a54140e750
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Wed Jan 1 11:22:30 2025 +0100

    Revert "mac80211: ath9k: clean up gpiochip"
    
    This reverts commit 2af552372d4e0feda947d44eba3775b335d242db.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../patches/ath9k/548-ath9k_enable_gpio_chip.patch | 111 ++++++++++++---------
 .../ath9k/549-ath9k_enable_gpio_buttons.patch      |  22 ++--
 2 files changed, 77 insertions(+), 56 deletions(-)

diff --git a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
index b2aee815a6..0efe23b9dc 100644
--- a/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
+++ b/package/kernel/mac80211/patches/ath9k/548-ath9k_enable_gpio_chip.patch
@@ -10,32 +10,47 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 ---
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -25,6 +25,8 @@
+@@ -25,6 +25,7 @@
  #include <linux/completion.h>
  #include <linux/time.h>
  #include <linux/hw_random.h>
 +#include <linux/gpio/driver.h>
-+#include <linux/gpio/consumer.h>
  
  #include "common.h"
  #include "debug.h"
-@@ -1046,6 +1048,10 @@ struct ath_softc {
+@@ -991,6 +992,14 @@ struct ath_led {
+ 	struct led_classdev cdev;
+ };
+ 
++#ifdef CONFIG_GPIOLIB
++struct ath9k_gpio_chip {
++	struct ath_softc *sc;
++	char label[32];
++	struct gpio_chip gchip;
++};
++#endif
++
+ struct ath_softc {
+ 	struct ieee80211_hw *hw;
+ 	struct device *dev;
+@@ -1046,6 +1055,9 @@ struct ath_softc {
  #ifdef CPTCFG_MAC80211_LEDS
  	const char *led_default_trigger;
  	struct list_head leds;
 +#ifdef CONFIG_GPIOLIB
-+	struct gpio_chip *gpiochip;
-+	struct gpio_desc *gpiodesc;
++	struct ath9k_gpio_chip *gpiochip;
 +#endif
  #endif
  
  #ifdef CPTCFG_ATH9K_DEBUGFS
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -16,12 +16,123 @@
+@@ -15,13 +15,131 @@
+  */
  
  #include "ath9k.h"
- 
++#include <linux/gpio.h>
++
 +#ifdef CPTCFG_MAC80211_LEDS
 +
 +#ifdef CONFIG_GPIOLIB
@@ -47,9 +62,10 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +/* gpio_chip handler : set GPIO to input */
 +static int ath9k_gpio_pin_cfg_input(struct gpio_chip *chip, unsigned offset)
 +{
-+	struct ath_softc *sc = gpiochip_get_data(chip);
++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
++						  gchip);
 +
-+	ath9k_hw_gpio_request_in(sc->sc_ah, offset, "ath9k-gpio");
++	ath9k_hw_gpio_request_in(gc->sc->sc_ah, offset, "ath9k-gpio");
 +
 +	return 0;
 +}
@@ -58,11 +74,12 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +static int ath9k_gpio_pin_cfg_output(struct gpio_chip *chip, unsigned offset,
 +				     int value)
 +{
-+	struct ath_softc *sc = gpiochip_get_data(chip);
++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
++						  gchip);
 +
-+	ath9k_hw_gpio_request_out(sc->sc_ah, offset, "ath9k-gpio",
++	ath9k_hw_gpio_request_out(gc->sc->sc_ah, offset, "ath9k-gpio",
 +				  AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
-+	ath9k_hw_set_gpio(sc->sc_ah, offset, value);
++	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
 +
 +	return 0;
 +}
@@ -70,8 +87,9 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +/* gpio_chip handler : query GPIO direction (0=out, 1=in) */
 +static int ath9k_gpio_pin_get_dir(struct gpio_chip *chip, unsigned offset)
 +{
-+	struct ath_softc *sc = gpiochip_get_data(chip);
-+	struct ath_hw *ah = sc->sc_ah;
++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
++						  gchip);
++	struct ath_hw *ah = gc->sc->sc_ah;
 +
 +	return !((REG_READ(ah, AR_GPIO_OE_OUT(ah)) >> (offset * 2)) & 3);
 +}
@@ -79,62 +97,65 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +/* gpio_chip handler : get GPIO pin value */
 +static int ath9k_gpio_pin_get(struct gpio_chip *chip, unsigned offset)
 +{
-+	struct ath_softc *sc = gpiochip_get_data(chip);
++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
++						  gchip);
 +
-+	return ath9k_hw_gpio_get(sc->sc_ah, offset);
++	return ath9k_hw_gpio_get(gc->sc->sc_ah, offset);
 +}
 +
 +/* gpio_chip handler : set GPIO pin to value */
 +static void ath9k_gpio_pin_set(struct gpio_chip *chip, unsigned offset,
 +			       int value)
 +{
-+	struct ath_softc *sc = gpiochip_get_data(chip);
++	struct ath9k_gpio_chip *gc = container_of(chip, struct ath9k_gpio_chip,
++						  gchip);
 +
-+	ath9k_hw_set_gpio(sc->sc_ah, offset, value);
++	ath9k_hw_set_gpio(gc->sc->sc_ah, offset, value);
 +}
 +
 +/* register GPIO chip */
 +static void ath9k_register_gpio_chip(struct ath_softc *sc)
 +{
-+	struct gpio_chip *gc = sc->gpiochip;
++	struct ath9k_gpio_chip *gc;
 +	struct ath_hw *ah = sc->sc_ah;
 +
-+	gc = kzalloc(sizeof(struct gpio_chip), GFP_KERNEL);
++	gc = kzalloc(sizeof(struct ath9k_gpio_chip), GFP_KERNEL);
 +	if (!gc)
 +		return;
 +
-+	gc->label = kasprintf(GFP_KERNEL, "ath9k-%s",
-+		    wiphy_name(sc->hw->wiphy));
-+	if (!gc->label)
-+		return;
-+
-+	gc->parent = sc->dev;
-+	gc->base = -1;	/* determine base automatically */
-+	gc->ngpio = ah->caps.num_gpio_pins;
-+	gc->direction_input = ath9k_gpio_pin_cfg_input;
-+	gc->direction_output = ath9k_gpio_pin_cfg_output;
-+	gc->get_direction = ath9k_gpio_pin_get_dir;
-+	gc->get = ath9k_gpio_pin_get;
-+	gc->set = ath9k_gpio_pin_set;
-+
-+	if (gpiochip_add_data(gc, sc)) {
-+		kfree(gc->label);
++	gc->sc = sc;
++	snprintf(gc->label, sizeof(gc->label), "ath9k-%s",
++		 wiphy_name(sc->hw->wiphy));
++	gc->gchip.parent = sc->dev;
++	gc->gchip.label = gc->label;
++	gc->gchip.base = -1;	/* determine base automatically */
++	gc->gchip.ngpio = ah->caps.num_gpio_pins;
++	gc->gchip.direction_input = ath9k_gpio_pin_cfg_input;
++	gc->gchip.direction_output = ath9k_gpio_pin_cfg_output;
++	gc->gchip.get_direction = ath9k_gpio_pin_get_dir;
++	gc->gchip.get = ath9k_gpio_pin_get;
++	gc->gchip.set = ath9k_gpio_pin_set;
++
++	if (gpiochip_add(&gc->gchip)) {
 +		kfree(gc);
 +		return;
 +	}
++
++	gc->gchip.owner = NULL;
++	sc->gpiochip = gc;
 +}
 +
 +/* remove GPIO chip */
 +static void ath9k_unregister_gpio_chip(struct ath_softc *sc)
 +{
-+	struct gpio_chip *gc = sc->gpiochip;
++	struct ath9k_gpio_chip *gc = sc->gpiochip;
 +
 +	if (!gc)
 +		return;
 +
-+	gpiochip_remove(gc);
-+	kfree(gc->label);
++	gpiochip_remove(&gc->gchip);
 +	kfree(gc);
++	sc->gpiochip = NULL;
 +}
 +
 +#else /* CONFIG_GPIOLIB */
@@ -148,7 +169,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +}
 +
 +#endif /* CONFIG_GPIOLIB */
-+
+ 
  /********************************/
  /*	 LED functions		*/
  /********************************/
@@ -158,27 +179,27 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  static void ath_fill_led_pin(struct ath_softc *sc)
  {
  	struct ath_hw *ah = sc->sc_ah;
-@@ -79,6 +190,12 @@ static int ath_add_led(struct ath_softc
+@@ -79,6 +197,12 @@ static int ath_add_led(struct ath_softc
  	else
  		ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
  
 +#ifdef CONFIG_GPIOLIB
 +	/* If there is GPIO chip configured, reserve LED pin */
 +	if (sc->gpiochip)
-+		sc->gpiodesc = gpiod_get(sc->dev, gpio->name, GPIOD_ASIS);
++		gpio_request(sc->gpiochip->gchip.base + gpio->gpio, gpio->name);
 +#endif
 +
  	return 0;
  }
  
-@@ -117,17 +234,24 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -117,17 +241,24 @@ void ath_deinit_leds(struct ath_softc *s
  
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
 +#ifdef CONFIG_GPIOLIB
 +		/* If there is GPIO chip configured, free LED pin */
 +		if (sc->gpiochip)
-+			gpiod_put(sc->gpiodesc);
++			gpio_free(sc->gpiochip->gchip.base + led->gpio->gpio);
 +#endif
  		list_del(&led->list);
  		ath_led_brightness(&led->cdev, LED_OFF);
@@ -196,7 +217,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	char led_name[32];
  	const char *trigger;
  
-@@ -136,6 +260,12 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -136,6 +267,12 @@ void ath_init_leds(struct ath_softc *sc)
  	if (AR_SREV_9100(sc->sc_ah))
  		return;
  
diff --git a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
index 728b6663a2..78700222a9 100644
--- a/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
+++ b/package/kernel/mac80211/patches/ath9k/549-ath9k_enable_gpio_buttons.patch
@@ -10,27 +10,27 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 ---
 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -1051,6 +1051,7 @@ struct ath_softc {
+@@ -1057,6 +1057,7 @@ struct ath_softc {
+ 	struct list_head leds;
  #ifdef CONFIG_GPIOLIB
- 	struct gpio_chip *gpiochip;
- 	struct gpio_desc *gpiodesc;
+ 	struct ath9k_gpio_chip *gpiochip;
 +	struct platform_device *btnpdev;	/* gpio-keys-polled */
  #endif
  #endif
  
 --- a/drivers/net/wireless/ath/ath9k/gpio.c
 +++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -15,6 +15,8 @@
-  */
+@@ -16,6 +16,8 @@
  
  #include "ath9k.h"
+ #include <linux/gpio.h>
 +#include <linux/platform_device.h>
 +#include <linux/gpio_keys.h>
  
  #ifdef CPTCFG_MAC80211_LEDS
  
-@@ -117,6 +119,67 @@ static void ath9k_unregister_gpio_chip(s
- 	kfree(gc);
+@@ -124,6 +126,67 @@ static void ath9k_unregister_gpio_chip(s
+ 	sc->gpiochip = NULL;
  }
  
 +/******************/
@@ -64,7 +64,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +
 +		ath9k_hw_gpio_request_in(sc->sc_ah, ah->btns[i].gpio,
 +					 "ath9k-gpio");
-+		bt[i].gpio = sc->gpiochip->base + ah->btns[i].gpio;
++		bt[i].gpio = sc->gpiochip->gchip.base + ah->btns[i].gpio;
 +	}
 +
 +	memset(&gkpdata, 0, sizeof(struct gpio_keys_platform_data));
@@ -97,7 +97,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #else /* CONFIG_GPIOLIB */
  
  static inline void ath9k_register_gpio_chip(struct ath_softc *sc)
-@@ -127,6 +190,14 @@ static inline void ath9k_unregister_gpio
+@@ -134,6 +197,14 @@ static inline void ath9k_unregister_gpio
  {
  }
  
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #endif /* CONFIG_GPIOLIB */
  
  /********************************/
-@@ -232,6 +303,7 @@ void ath_deinit_leds(struct ath_softc *s
+@@ -239,6 +310,7 @@ void ath_deinit_leds(struct ath_softc *s
  {
  	struct ath_led *led;
  
@@ -120,7 +120,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	while (!list_empty(&sc->leds)) {
  		led = list_first_entry(&sc->leds, struct ath_led, list);
  #ifdef CONFIG_GPIOLIB
-@@ -267,6 +339,7 @@ void ath_init_leds(struct ath_softc *sc)
+@@ -274,6 +346,7 @@ void ath_init_leds(struct ath_softc *sc)
  	}
  
  	ath_fill_led_pin(sc);



From lede-commits at lists.infradead.org  Wed Jan  1 05:13:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 08:13:51 -0500
Subject: [openwrt/openwrt]  rockchip: enable USB3 port on NanoPC T6
In-Reply-To: <173573723009.1102566.12930678924740602555@git-01.infra.openwrt.org>
References: <173573723009.1102566.12930678924740602555@git-01.infra.openwrt.org>
Message-ID: <mailman.29688.1735737234.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6881b48dc603e25320a14e11c5e1797321891b76

commit 6881b48dc603e25320a14e11c5e1797321891b76
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Mon Dec 23 21:13:24 2024 +0800

    rockchip: enable USB3 port on NanoPC T6
    
    Enable the USB3 port on FriendlyELEC NanoPC-T6.
    
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17349
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...m64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch | 87 ++++++++++++++++++++++
 ...ts-rockchip-lower-mmc-speed-for-nanopc-t6.patch |  2 +-
 2 files changed, 88 insertions(+), 1 deletion(-)

diff --git a/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch
new file mode 100644
index 0000000000..d3aa8b9cc3
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch
@@ -0,0 +1,87 @@
+From a6ae420439dc47a58550a6e61e596e9dd1562caf Mon Sep 17 00:00:00 2001
+From: Rick Wertenbroek <rick.wertenbroek at gmail.com>
+Date: Wed, 6 Nov 2024 14:03:13 +0100
+Subject: [PATCH] arm64: dts: rockchip: enable USB3 on NanoPC-T6
+
+Enable the USB3 port on FriendlyELEC NanoPC-T6.
+
+Signed-off-by: Rick Wertenbroek <rick.wertenbroek at gmail.com>
+Link: https://lore.kernel.org/r/20241106130314.1289055-1-rick.wertenbroek at gmail.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ .../boot/dts/rockchip/rk3588-nanopc-t6.dtsi   | 36 +++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+@@ -160,6 +160,20 @@
+ 		vin-supply = <&vcc5v0_sys>;
+ 	};
+ 
++	vbus5v0_usb: vbus5v0-usb-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&usb5v_pwren>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-name = "vbus5v0_usb";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
+ 	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
+ 		compatible = "regulator-fixed";
+ 		enable-active-high;
+@@ -577,6 +591,10 @@
+ 			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ 		};
+ 
++		usb5v_pwren: usb5v_pwren {
++			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
+ 		usbc0_int: usbc0-int {
+ 			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ 		};
+@@ -976,6 +994,14 @@
+ 	status = "okay";
+ };
+ 
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
+ &u2phy2_host {
+ 	status = "okay";
+ };
+@@ -1015,6 +1041,11 @@
+ 	};
+ };
+ 
++&usbdp_phy1 {
++	phy-supply = <&vbus5v0_usb>;
++	status = "okay";
++};
++
+ &usb_host0_ehci {
+ 	status = "okay";
+ };
+@@ -1035,6 +1066,11 @@
+ 	};
+ };
+ 
++&usb_host1_xhci {
++	dr_mode = "host";
++	status = "okay";
++};
++
+ &usb_host1_ehci {
+ 	status = "okay";
+ };
diff --git a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
index bbcff01790..1b76fac103 100644
--- a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
+++ b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
-@@ -616,7 +616,7 @@
+@@ -634,7 +634,7 @@
  	disable-wp;
  	no-mmc;
  	no-sdio;



From lede-commits at lists.infradead.org  Wed Jan  1 05:13:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 08:13:50 -0500
Subject: [openwrt/openwrt]  rockchip: backport recent rk3588 clk updates
In-Reply-To: <173573723009.1102566.12930678924740602555@git-01.infra.openwrt.org>
References: <173573723009.1102566.12930678924740602555@git-01.infra.openwrt.org>
Message-ID: <mailman.29689.1735737235.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8ad02ca2f8477b1cfdc5ea6124fae60c07687aa1

commit 8ad02ca2f8477b1cfdc5ea6124fae60c07687aa1
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Mon Dec 23 19:07:13 2024 +0800

    rockchip: backport recent rk3588 clk updates
    
    Backport recent rk3588 clk updates from upstream,
    including one bug fix.
    
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17349
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch | 51 +++++++++++++++++
 ...6.12-clk-rockchip-rk3588-drop-unused-code.patch | 65 ++++++++++++++++++++++
 ...-rockchip-fix-finding-of-maximum-clock-ID.patch | 29 ++++++++++
 3 files changed, 145 insertions(+)

diff --git a/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch
new file mode 100644
index 0000000000..0d68f687fa
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch
@@ -0,0 +1,51 @@
+From e781bffc296766b55dbd048890d558655031e8d1 Mon Sep 17 00:00:00 2001
+From: Elaine Zhang <zhangqing at rock-chips.com>
+Date: Wed, 28 Aug 2024 15:42:52 +0000
+Subject: [PATCH] clk: rockchip: Add new pll type pll_rk3588_ddr
+
+That PLL type is similar to the other rk3588 pll types but the actual
+rate is twice the configured rate.
+Therefore, the returned calculated rate must be multiplied by two.
+
+Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>
+Signed-off-by: Detlev Casanova <detlev.casanova at collabora.com>
+Acked-by: Dragan Simic <dsimic at manjaro.org>
+Link: https://lore.kernel.org/r/0102019199a76ec4-9d5846d4-d76a-4e69-a241-c88c2983d607-000000 at eu-west-1.amazonses.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ drivers/clk/rockchip/clk-pll.c | 6 +++++-
+ drivers/clk/rockchip/clk.h     | 1 +
+ 2 files changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/rockchip/clk-pll.c
++++ b/drivers/clk/rockchip/clk-pll.c
+@@ -914,7 +914,10 @@ static unsigned long rockchip_rk3588_pll
+ 	}
+ 	rate64 = rate64 >> cur.s;
+ 
+-	return (unsigned long)rate64;
++	if (pll->type == pll_rk3588_ddr)
++		return (unsigned long)rate64 * 2;
++	else
++		return (unsigned long)rate64;
+ }
+ 
+ static int rockchip_rk3588_pll_set_params(struct rockchip_clk_pll *pll,
+@@ -1167,6 +1170,7 @@ struct clk *rockchip_clk_register_pll(st
+ 		break;
+ 	case pll_rk3588:
+ 	case pll_rk3588_core:
++	case pll_rk3588_ddr:
+ 		if (!pll->rate_table)
+ 			init.ops = &rockchip_rk3588_pll_clk_norate_ops;
+ 		else
+--- a/drivers/clk/rockchip/clk.h
++++ b/drivers/clk/rockchip/clk.h
+@@ -287,6 +287,7 @@ enum rockchip_pll_type {
+ 	pll_rk3399,
+ 	pll_rk3588,
+ 	pll_rk3588_core,
++	pll_rk3588_ddr,
+ };
+ 
+ #define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
diff --git a/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch
new file mode 100644
index 0000000000..0164bf26e5
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch
@@ -0,0 +1,65 @@
+From 2e7b3daa8cb1ebd17e6a7f417ef5e6553203035c Mon Sep 17 00:00:00 2001
+From: Sebastian Reichel <sebastian.reichel at collabora.com>
+Date: Mon, 25 Mar 2024 20:33:32 +0100
+Subject: [PATCH] clk: rockchip: rk3588: drop unused code
+
+All clocks are registered early using CLK_OF_DECLARE(), which marks
+the DT node as processed. For the processed DT node the probe routine
+is never called. Thus this whole code is never executed. This could
+be "fixed" by using CLK_OF_DECLARE_DRIVER, which avoids marking the
+DT node as processed. But then the probe routine would re-register
+all the clocks by calling rk3588_clk_init() again.
+
+Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
+Link: https://lore.kernel.org/r/20240325193609.237182-2-sebastian.reichel at collabora.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ drivers/clk/rockchip/clk-rk3588.c | 40 -------------------------------
+ 1 file changed, 40 deletions(-)
+
+--- a/drivers/clk/rockchip/clk-rk3588.c
++++ b/drivers/clk/rockchip/clk-rk3588.c
+@@ -2502,43 +2502,3 @@ static void __init rk3588_clk_init(struc
+ }
+ 
+ CLK_OF_DECLARE(rk3588_cru, "rockchip,rk3588-cru", rk3588_clk_init);
+-
+-struct clk_rk3588_inits {
+-	void (*inits)(struct device_node *np);
+-};
+-
+-static const struct clk_rk3588_inits clk_3588_cru_init = {
+-	.inits = rk3588_clk_init,
+-};
+-
+-static const struct of_device_id clk_rk3588_match_table[] = {
+-	{
+-		.compatible = "rockchip,rk3588-cru",
+-		.data = &clk_3588_cru_init,
+-	},
+-	{ }
+-};
+-
+-static int __init clk_rk3588_probe(struct platform_device *pdev)
+-{
+-	const struct clk_rk3588_inits *init_data;
+-	struct device *dev = &pdev->dev;
+-
+-	init_data = device_get_match_data(dev);
+-	if (!init_data)
+-		return -EINVAL;
+-
+-	if (init_data->inits)
+-		init_data->inits(dev->of_node);
+-
+-	return 0;
+-}
+-
+-static struct platform_driver clk_rk3588_driver = {
+-	.driver		= {
+-		.name	= "clk-rk3588",
+-		.of_match_table = clk_rk3588_match_table,
+-		.suppress_bind_attrs = true,
+-	},
+-};
+-builtin_platform_driver_probe(clk_rk3588_driver, clk_rk3588_probe);
diff --git a/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch
new file mode 100644
index 0000000000..912c2c7778
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch
@@ -0,0 +1,29 @@
+From ad1081a0da2744141d12e94ff816ac91feb871ca Mon Sep 17 00:00:00 2001
+From: Yao Zi <ziyao at disroot.org>
+Date: Thu, 12 Sep 2024 13:32:05 +0000
+Subject: [PATCH] clk: rockchip: fix finding of maximum clock ID
+
+If an ID of a branch's child is greater than current maximum, we should
+set new maximum to the child's ID, instead of its parent's.
+
+Fixes: 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage")
+Signed-off-by: Yao Zi <ziyao at disroot.org>
+Link: https://lore.kernel.org/r/20240912133204.29089-2-ziyao at disroot.org
+Reviewed-by: Sebastian Reichel <sebastian.reichel at collabora.com>
+Reviewed-by: Heiko Stuebner <heiko at sntech.de>
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
+---
+ drivers/clk/rockchip/clk.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/rockchip/clk.c
++++ b/drivers/clk/rockchip/clk.c
+@@ -439,7 +439,7 @@ unsigned long rockchip_clk_find_max_clk_
+ 		if (list->id > max)
+ 			max = list->id;
+ 		if (list->child && list->child->id > max)
+-			max = list->id;
++			max = list->child->id;
+ 	}
+ 
+ 	return max;



From lede-commits at lists.infradead.org  Wed Jan  1 08:28:45 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 11:28:45 -0500
Subject: [openwrt/openwrt]  mediatek: Fix primary MAC of D-Link M60
In-Reply-To: <173574892526.1375336.10318786672248914668@git-01.infra.openwrt.org>
References: <173574892526.1375336.10318786672248914668@git-01.infra.openwrt.org>
Message-ID: <mailman.29700.1735748934.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/616621120bf2ba460b99d6c814b629a01be8a5d0

commit 616621120bf2ba460b99d6c814b629a01be8a5d0
Author: Roland Reinl <reinlroland+github at gmail.com>
AuthorDate: Mon Dec 30 08:54:56 2024 +0100

    mediatek: Fix primary MAC of D-Link M60
    
    During port to gluon, I saw that the primary mac is not correct. Updated DTS accordingly.
    
    Signed-off-by: Roland Reinl <reinlroland+github at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17429
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
index a95c069156..e805554a13 100644
--- a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
+++ b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
@@ -17,6 +17,7 @@
 		led-failsafe = &led_status_red;
 		led-running = &led_status_white;
 		led-upgrade = &led_status_blue;
+		label-mac-device = &gmac0;
 	};
 
 	chosen {



From lede-commits at lists.infradead.org  Wed Jan  1 11:36:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 14:36:27 -0500
Subject: [openwrt/openwrt]  bcm27xx/bcm2712: add RP1 camera front-end
In-Reply-To: <173576018767.1675340.683732541912264464@git-01.infra.openwrt.org>
References: <173576018767.1675340.683732541912264464@git-01.infra.openwrt.org>
Message-ID: <mailman.29703.1735760192.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ae0fd926997e789e7244443dba6cb07f6b43053a

commit ae0fd926997e789e7244443dba6cb07f6b43053a
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Sat Dec 28 11:59:51 2024 -0500

    bcm27xx/bcm2712: add RP1 camera front-end
    
    Add kmod for RP1 camera front-end for RPi5B
    
    Build system: x86/64
    Build-tested: bcm2712/RPi5B
    Run-tested: bcm2712/RPi5B
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17412
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/bcm27xx/modules/video.mk | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/target/linux/bcm27xx/modules/video.mk b/target/linux/bcm27xx/modules/video.mk
index 8e2b19bd87..dddf13e0f4 100644
--- a/target/linux/bcm27xx/modules/video.mk
+++ b/target/linux/bcm27xx/modules/video.mk
@@ -20,6 +20,25 @@ endef
 $(eval $(call KernelPackage,camera-bcm2835))
 
 
+define KernelPackage/rp1-cfe
+  TITLE:=RP1 Camera Front-End
+  SUBMENU:=$(VIDEO_MENU)
+  KCONFIG:= \
+     CONFIG_VIDEO_RP1_CFE \
+     CONFIG_VIDEO_BCM2835
+  FILES:=$(LINUX_DIR)/drivers/media/platform/raspberrypi/rp1_cfe/rp1-cfe.ko
+  AUTOLOAD:=$(call AutoLoad,67,rp1-cfe)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-video-core +kmod-video-fwnode +kmod-video-dma-contig +kmod-video-async
+endef
+
+define KernelPackage/rp1-cfe/description
+  Driver for the Camera Serial Interface (CSI) to capture video
+  streams from connected cameras.
+endef
+
+$(eval $(call KernelPackage,rp1-cfe))
+
+
 define KernelPackage/codec-bcm2835
   TITLE:=BCM2835 Video Codec
   KCONFIG:= \



From lede-commits at lists.infradead.org  Wed Jan  1 11:37:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 14:37:05 -0500
Subject: [openwrt/openwrt]  realtek: move debounce-interval to correct node
In-Reply-To: <173576022513.1676219.605178127632205546@git-01.infra.openwrt.org>
References: <173576022513.1676219.605178127632205546@git-01.infra.openwrt.org>
Message-ID: <mailman.29704.1735760229.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/777c6106ed4e4acdad6f1b094a05a745db8fe396

commit 777c6106ed4e4acdad6f1b094a05a745db8fe396
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 1 20:05:20 2025 +0100

    realtek: move debounce-interval to correct node
    
    The debounce-interval of a gpio-keys node should be placed in the key
    node itself, not in the main node. Move the properties added earlier and
    fix the key node name while we're here.
    
    Fixes: 4357f32d41eb ("realtek: debounce reset key for Zyxel GS1900")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi   | 2 +-
 target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 59b44ad161..3889fe8859 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -20,13 +20,13 @@
 
 	keys {
 		compatible = "gpio-keys-polled";
-		debounce-interval = <100>;
 		poll-interval = <20>;
 
 		reset {
 			label = "reset";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
+			debounce-interval = <100>;
 		};
 	};
 
diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
index ad3245fc27..a1e0a6d06d 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
@@ -41,13 +41,13 @@
 
 	keys {
 		compatible = "gpio-keys-polled";
-		debounce-interval = <100>;
 		poll-interval = <20>;
 
-		mode {
+		reset {
 			label = "reset";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
+			debounce-interval = <100>;
 		};
 	};
 



From lede-commits at lists.infradead.org  Wed Jan  1 12:22:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 15:22:10 -0500
Subject: [openwrt/openwrt]  tools/dwarves: update to v1.28
In-Reply-To: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
References: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
Message-ID: <mailman.29705.1735762937.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/32981677bd0ce5aed9df1d7e9f49d6f2b5578298

commit 32981677bd0ce5aed9df1d7e9f49d6f2b5578298
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Sat Dec 7 20:00:43 2024 -0800

    tools/dwarves: update to v1.28
    
    Update to the latest upstream version and refresh local patches.
    
    Release Notes: https://lore.kernel.org/bpf/Z1RcnB8WD8wZphcr at x1/
    
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17404
    (cherry picked from commit 45187cbad04a3cd3336a489b6c2b08ae5b446e5d)
    Link: https://github.com/openwrt/openwrt/pull/17418
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 tools/dwarves/Makefile                              | 4 ++--
 tools/dwarves/patches/100-reproducible-builds.patch | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/dwarves/Makefile b/tools/dwarves/Makefile
index bcb16dd3da..5346126776 100644
--- a/tools/dwarves/Makefile
+++ b/tools/dwarves/Makefile
@@ -3,12 +3,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=dwarves
-PKG_VERSION:=1.27
+PKG_VERSION:=1.28
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=https://fedorapeople.org/~acme/dwarves/
-PKG_HASH:=ef7f21f1c6016896d03a01f05cab225151f9068e19cc8cddc6e754b2b5cbe279
+PKG_HASH:=826efc0fc9237d3c1e9c01553ea387a8cb46e8dc119ff863889043f4ed54b2ae
 
 PKG_MAINTAINER:=Tony Ambardar <itugrok at yahoo.com>
 PKG_LICENSE:=GPL-2.0-only
diff --git a/tools/dwarves/patches/100-reproducible-builds.patch b/tools/dwarves/patches/100-reproducible-builds.patch
index 15bddd5645..d8cbd114c6 100644
--- a/tools/dwarves/patches/100-reproducible-builds.patch
+++ b/tools/dwarves/patches/100-reproducible-builds.patch
@@ -1,6 +1,6 @@
 --- a/pahole.c
 +++ b/pahole.c
-@@ -3723,6 +3723,9 @@ int main(int argc, char *argv[])
+@@ -3681,6 +3681,9 @@ int main(int argc, char *argv[])
  		goto out;
  	}
  



From lede-commits at lists.infradead.org  Wed Jan  1 12:22:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 15:22:09 -0500
Subject: [openwrt/openwrt]  bpftool: Update to v7.5.0
In-Reply-To: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
References: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
Message-ID: <mailman.29706.1735762937.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7a0b76cf0f37fa46488d5f996c0635d3ab818b2c

commit 7a0b76cf0f37fa46488d5f996c0635d3ab818b2c
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Sat Dec 7 19:49:49 2024 -0800

    bpftool: Update to v7.5.0
    
    Update to the latest upstream release to include recent improvements and
    bugfixes, and simplify use of PKG_SOURCE_VERSION.
    
    This version supports BPF objects of either endianness, allowing for
    introspection, linking and skeleton creation, and enables cross-compiling
    modern BPF applications for targets with non-native byteorder.
    
    Link: https://github.com/libbpf/bpftool/releases/tag/v7.5.0
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17404
    (cherry picked from commit 5bcad34154757bfaca1c787b1e9c72f4b1a52e37)
    Link: https://github.com/openwrt/openwrt/pull/17418
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 package/network/utils/bpftool/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/network/utils/bpftool/Makefile b/package/network/utils/bpftool/Makefile
index c6cc92e18d..b2fdfc1632 100644
--- a/package/network/utils/bpftool/Makefile
+++ b/package/network/utils/bpftool/Makefile
@@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=bpftool
-PKG_VERSION:=7.4.0
+PKG_VERSION:=7.5.0
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL:=https://github.com/libbpf/bpftool
-PKG_MIRROR_HASH:=18e22f72e67ff402b5ecaf314445f25c40bfe23299cb783b5834a496297c51ed
+PKG_MIRROR_HASH:=1da7c08959e7819772145774322ffd876f3180065be1c3759336dca98ac9f666
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_VERSION:=v7.4.0
+PKG_SOURCE_VERSION:=v$(PKG_VERSION)
 
 PKG_MAINTAINER:=Tony Ambardar <itugrok at yahoo.com>
 



From lede-commits at lists.infradead.org  Wed Jan  1 12:22:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 15:22:08 -0500
Subject: [openwrt/openwrt]  libbpf: Update to v1.5.0
In-Reply-To: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
References: <173576292896.1761329.9911465608593213907@git-01.infra.openwrt.org>
Message-ID: <mailman.29707.1735762939.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b66773aac34bf3066efc3c8f1a11c3baf1b2fcda

commit b66773aac34bf3066efc3c8f1a11c3baf1b2fcda
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Sat Dec 7 19:39:11 2024 -0800

    libbpf: Update to v1.5.0
    
    Update to the latest upstream release to include recent improvements and
    bugfixes, including support for handling BPF objects of either endianness.
    
    Link: https://github.com/libbpf/libbpf/releases/tag/v1.5.0
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17404
    (cherry picked from commit 6a6ae41d4b960131f86f10a4609a0082bcd0ebb7)
    Link: https://github.com/openwrt/openwrt/pull/17418
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 package/libs/libbpf/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/libs/libbpf/Makefile b/package/libs/libbpf/Makefile
index 89fe730a98..4d918e7bbf 100644
--- a/package/libs/libbpf/Makefile
+++ b/package/libs/libbpf/Makefile
@@ -8,11 +8,11 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libbpf
-PKG_VERSION:=1.4.6
+PKG_VERSION:=1.5.0
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL:=https://github.com/libbpf/libbpf
-PKG_MIRROR_HASH:=0d0d70750c8e45baba19f8cc065771e5d842a90f3ad1637003cae6887dabf11e
+PKG_MIRROR_HASH:=7699fcfa89bf0f6e756c4555fbd3fdb8cbcfcc770e5944aebdd0e9244031f022
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_VERSION:=v$(PKG_VERSION)
 PKG_ABI_VERSION:=$(firstword $(subst .,$(space),$(PKG_VERSION)))



From lede-commits at lists.infradead.org  Wed Jan  1 12:31:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 15:31:04 -0500
Subject: [openwrt/openwrt]  ramips: mt7621: enable lzma-loader for Amped
 Wireless ALLY
In-Reply-To: <173576346476.1778579.5018811352319074966@git-01.infra.openwrt.org>
References: <173576346476.1778579.5018811352319074966@git-01.infra.openwrt.org>
Message-ID: <mailman.29708.1735763467.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f8a8a2c5c7ff1efe289d846a890d3361757c231f

commit f8a8a2c5c7ff1efe289d846a890d3361757c231f
Author: Jonathan Sturges <jsturges at redhat.com>
AuthorDate: Thu Dec 26 21:47:40 2024 -0500

    ramips: mt7621: enable lzma-loader for Amped Wireless ALLY
    
    Switch to using loader-kernel to accommodate
    larger image sizes that are problematic for
    many mt7621 uboots.
    
    Signed-off-by: Jonathan Sturges <jsturges at redhat.com>
    Link: https://github.com/openwrt/openwrt/pull/17389
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/image/mt7621.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 2623d890f6..ed0da90528 100755
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -294,11 +294,11 @@ TARGET_DEVICES += alfa-network_quad-e4g
 
 define Device/ampedwireless_ally_common
   $(Device/nand)
+  $(Device/uimage-lzma-loader)
   DEVICE_VENDOR := Amped Wireless
   DEVICE_PACKAGES := kmod-mt7615-firmware
   IMAGE_SIZE := 32768k
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | uImage lzma -n 'flashable-initramfs' |\
-	edimax-header -s CSYS -m RN68 -f 0x001c0000 -S 0x01100000
+  KERNEL_INITRAMFS := $$(KERNEL) | edimax-header -s CSYS -m RN68 -f 0x001c0000 -S 0x01100000
 endef
 
 define Device/ampedwireless_ally-r1900k



From lede-commits at lists.infradead.org  Wed Jan  1 13:34:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 16:34:44 -0500
Subject: [openwrt/openwrt]  realtek: add support for HPE 1920-24G PoE-180W
 (JG925A)
In-Reply-To: <173576728491.1857178.8081219219616981853@git-01.infra.openwrt.org>
References: <173576728491.1857178.8081219219616981853@git-01.infra.openwrt.org>
Message-ID: <mailman.29709.1735767289.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b948c1e39b9e69e26e8caabf86c2d0bb9ac4efa6

commit b948c1e39b9e69e26e8caabf86c2d0bb9ac4efa6
Author: James Sweeney <code at swny.io>
AuthorDate: Wed Jan 1 08:47:28 2025 -0500

    realtek: add support for HPE 1920-24G PoE-180W (JG925A)
    
    Hardware information: (largely copied from 11275be)
    ---------------------
    
    The HPE 1920-24G-PoE+ (180W) (JG925A) is a switch that is
    part of the 1920 family which has 180W nominal PoE+ support.
    
    Common with HPE 1920-24G:
    - RTL8382 SoC
    - 24 Gigabit RJ45 ports (built-in RTL8218B, 2 external RTL8218D)
    - 4 SFP ports (external RTL8214FC)
    - RJ45 RS232 port on front panel
    - 32 MiB NOR Flash
    - 128 MiB DDR3 DRAM
    - PT7A7514 watchdog
    
    HPE 1920-24G-PoE+ (180W):
    - PoE chip
    - 2 fans (40mm)
    
    Known issues:
    ---------------------
    - PoE LEDs are uncontrolled.
    
    (Manual taken from f2f09bc)
    Booting initramfs image:
    ------------------------
    
    - Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
    connect the server to a switch port.
    
    - Connect to the console port of the device and enter the extended
    boot menu by typing Ctrl+B when prompted.
    
    - Choose the menu option "<3> Enter Ethernet SubMenu".
    
    - Set network parameters via the option "<5> Modify Ethernet Parameter".
    Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
    can be left blank, it is not required for booting from RAM). Note that
    the configuration is saved on flash, so it only needs to be done once.
    
    - Select "<1> Download Application Program To SDRAM And Run".
    
    Initial installation:
    ---------------------
    
    - Boot an initramfs image as described above, then use sysupgrade to
    install OpenWrt permanently. After initial installation, the
    bootloader needs to be configured to load the correct image file
    
    - Enter the extended boot menu again and choose "<4> File Control",
    then select "<2> Set Application File type".
    
    - Enter the number of the file "openwrt-kernel.bin" (should be 1), and
    use the option "<1> +Main" to select it as boot image.
    
    - Choose "<0> Exit To Main Menu" and then "<1> Boot System".
    
    NOTE: The bootloader on these devices can only boot from the VFS
    filesystem which normally spans most of the flash. With OpenWrt, only
    the first part of the firmware partition contains a valid filesystem,
    the rest is used for rootfs. As the bootloader does not know about this,
    you must not do any file operations in the bootloader, as this may
    corrupt the OpenWrt installation (selecting the boot image is an
    exception, as it only stores a flag in the bootloader data, but doesn't
    write to the filesystem).
    
    Example PoE config file (/etc/config/poe):
    ---------------------
    config global
            option budget   '180'
    
    config port
            option enable   '1'
            option id       '1'
            option name     'lan8'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '2'
            option name     'lan7'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '3'
            option name     'lan6'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '4'
            option name     'lan5'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '5'
            option name     'lan4'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '6'
            option name     'lan3'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '7'
            option name     'lan2'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '8'
            option name     'lan1'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '9'
            option name     'lan16'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '10'
            option name     'lan15'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '11'
            option name     'lan14'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '12'
            option name     'lan13'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '13'
            option name     'lan12'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '14'
            option name     'lan11'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '15'
            option name     'lan10'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '16'
            option name     'lan9'
            option poe_plus '1'
            option priority '2'
    
    config port
            option enable   '1'
            option id       '17'
            option name     'lan24'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '18'
            option name     'lan23'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '19'
            option name     'lan22'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '20'
            option name     'lan21'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '21'
            option name     'lan20'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '22'
            option name     'lan19'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '23'
            option name     'lan18'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '24'
            option name     'lan17'
            option poe_plus '1'
            option priority '2'
    
    Signed-off-by: James Sweeney <code at swny.io>
    Link: https://github.com/openwrt/openwrt/pull/17444
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/base-files/etc/board.d/02_network       |  3 +++
 target/linux/realtek/base-files/etc/board.d/03_gpio_switches |  1 +
 target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts   | 12 ++++++++++++
 target/linux/realtek/image/rtl838x.mk                        |  9 +++++++++
 4 files changed, 25 insertions(+)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 750a200814..a73944107a 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -96,6 +96,9 @@ hpe,1920-8g-poe-65w)
 hpe,1920-8g-poe-180w)
 	ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan9 lan10")"
 	;;
+hpe,1920-24g-poe-180w)
+	ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan25 lan26 lan27 lan28")"
+	;;
 hpe,1920-24g-poe-370w)
 	ucidef_set_poe 370 "$(filter_port_list_reverse "$lan_list" "lan25 lan26 lan27 lan28")"
 	;;
diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
index 684d7f795e..c869153e4c 100644
--- a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
@@ -7,6 +7,7 @@ board=$(board_name)
 
 case "$board" in
 hpe,1920-8g-poe-180w|\
+hpe,1920-24g-poe-180w|\
 hpe,1920-24g-poe-370w)
 	ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
 	;;
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
new file mode 100644
index 0000000000..4783cec15c
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8382_hpe_1920-24g.dtsi"
+
+/ {
+	compatible = "hpe,1920-24g-poe-180w", "realtek,rtl838x-soc";
+	model = "HPE 1920-24G-PoE+ 180W (JG925A)";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index d694f5b308..866659ad14 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -144,6 +144,15 @@ define Device/hpe_1920-24g
 endef
 TARGET_DEVICES += hpe_1920-24g
 
+define Device/hpe_1920-24g-poe-180w
+  $(Device/hpe_1920)
+  SOC := rtl8382
+  DEVICE_MODEL := 1920-24G-PoE+ 180W (JG925A)
+  DEVICE_PACKAGES += realtek-poe
+  H3C_DEVICE_ID := 0x00010028
+endef
+TARGET_DEVICES += hpe_1920-24g-poe-180w
+
 define Device/hpe_1920-24g-poe-370w
   $(Device/hpe_1920)
   SOC := rtl8382



From lede-commits at lists.infradead.org  Wed Jan  1 13:38:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 16:38:42 -0500
Subject: [openwrt/openwrt]  realtek: add support for HPE 1920-24G PoE-180W
 (JG925A)
In-Reply-To: <173576752207.1862262.1240795105192032257@git-01.infra.openwrt.org>
References: <173576752207.1862262.1240795105192032257@git-01.infra.openwrt.org>
Message-ID: <mailman.29712.1735767525.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a2b1aaee80cbd9e9731709f4ce5e4bdc5cc5c17e

commit a2b1aaee80cbd9e9731709f4ce5e4bdc5cc5c17e
Author: James Sweeney <code at swny.io>
AuthorDate: Wed Jan 1 08:47:28 2025 -0500

    realtek: add support for HPE 1920-24G PoE-180W (JG925A)
    
    Hardware information: (largely copied from 11275be)
    ---------------------
    
    The HPE 1920-24G-PoE+ (180W) (JG925A) is a switch that is
    part of the 1920 family which has 180W nominal PoE+ support.
    
    Common with HPE 1920-24G:
    - RTL8382 SoC
    - 24 Gigabit RJ45 ports (built-in RTL8218B, 2 external RTL8218D)
    - 4 SFP ports (external RTL8214FC)
    - RJ45 RS232 port on front panel
    - 32 MiB NOR Flash
    - 128 MiB DDR3 DRAM
    - PT7A7514 watchdog
    
    HPE 1920-24G-PoE+ (180W):
    - PoE chip
    - 2 fans (40mm)
    
    Known issues:
    ---------------------
    - PoE LEDs are uncontrolled.
    
    (Manual taken from f2f09bc)
    Booting initramfs image:
    ------------------------
    
    - Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
    connect the server to a switch port.
    
    - Connect to the console port of the device and enter the extended
    boot menu by typing Ctrl+B when prompted.
    
    - Choose the menu option "<3> Enter Ethernet SubMenu".
    
    - Set network parameters via the option "<5> Modify Ethernet Parameter".
    Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
    can be left blank, it is not required for booting from RAM). Note that
    the configuration is saved on flash, so it only needs to be done once.
    
    - Select "<1> Download Application Program To SDRAM And Run".
    
    Initial installation:
    ---------------------
    
    - Boot an initramfs image as described above, then use sysupgrade to
    install OpenWrt permanently. After initial installation, the
    bootloader needs to be configured to load the correct image file
    
    - Enter the extended boot menu again and choose "<4> File Control",
    then select "<2> Set Application File type".
    
    - Enter the number of the file "openwrt-kernel.bin" (should be 1), and
    use the option "<1> +Main" to select it as boot image.
    
    - Choose "<0> Exit To Main Menu" and then "<1> Boot System".
    
    NOTE: The bootloader on these devices can only boot from the VFS
    filesystem which normally spans most of the flash. With OpenWrt, only
    the first part of the firmware partition contains a valid filesystem,
    the rest is used for rootfs. As the bootloader does not know about this,
    you must not do any file operations in the bootloader, as this may
    corrupt the OpenWrt installation (selecting the boot image is an
    exception, as it only stores a flag in the bootloader data, but doesn't
    write to the filesystem).
    
    Example PoE config file (/etc/config/poe):
    ---------------------
    config global
            option budget   '180'
    
    config port
            option enable   '1'
            option id       '1'
            option name     'lan8'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '2'
            option name     'lan7'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '3'
            option name     'lan6'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '4'
            option name     'lan5'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '5'
            option name     'lan4'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '6'
            option name     'lan3'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '7'
            option name     'lan2'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '8'
            option name     'lan1'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '9'
            option name     'lan16'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '10'
            option name     'lan15'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '11'
            option name     'lan14'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '12'
            option name     'lan13'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '13'
            option name     'lan12'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '14'
            option name     'lan11'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '15'
            option name     'lan10'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '16'
            option name     'lan9'
            option poe_plus '1'
            option priority '2'
    
    config port
            option enable   '1'
            option id       '17'
            option name     'lan24'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '18'
            option name     'lan23'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '19'
            option name     'lan22'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '20'
            option name     'lan21'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '21'
            option name     'lan20'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '22'
            option name     'lan19'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '23'
            option name     'lan18'
            option poe_plus '1'
            option priority '2'
    config port
            option enable   '1'
            option id       '24'
            option name     'lan17'
            option poe_plus '1'
            option priority '2'
    
    Signed-off-by: James Sweeney <code at swny.io>
    Link: https://github.com/openwrt/openwrt/pull/17444
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    (cherry picked from commit b948c1e39b9e69e26e8caabf86c2d0bb9ac4efa6)
---
 target/linux/realtek/base-files/etc/board.d/02_network       |  3 +++
 target/linux/realtek/base-files/etc/board.d/03_gpio_switches |  1 +
 target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts   | 12 ++++++++++++
 target/linux/realtek/image/rtl838x.mk                        |  9 +++++++++
 4 files changed, 25 insertions(+)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 750a200814..a73944107a 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -96,6 +96,9 @@ hpe,1920-8g-poe-65w)
 hpe,1920-8g-poe-180w)
 	ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan9 lan10")"
 	;;
+hpe,1920-24g-poe-180w)
+	ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan25 lan26 lan27 lan28")"
+	;;
 hpe,1920-24g-poe-370w)
 	ucidef_set_poe 370 "$(filter_port_list_reverse "$lan_list" "lan25 lan26 lan27 lan28")"
 	;;
diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
index 684d7f795e..c869153e4c 100644
--- a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
@@ -7,6 +7,7 @@ board=$(board_name)
 
 case "$board" in
 hpe,1920-8g-poe-180w|\
+hpe,1920-24g-poe-180w|\
 hpe,1920-24g-poe-370w)
 	ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
 	;;
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
new file mode 100644
index 0000000000..4783cec15c
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8382_hpe_1920-24g.dtsi"
+
+/ {
+	compatible = "hpe,1920-24g-poe-180w", "realtek,rtl838x-soc";
+	model = "HPE 1920-24G-PoE+ 180W (JG925A)";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index d694f5b308..866659ad14 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -144,6 +144,15 @@ define Device/hpe_1920-24g
 endef
 TARGET_DEVICES += hpe_1920-24g
 
+define Device/hpe_1920-24g-poe-180w
+  $(Device/hpe_1920)
+  SOC := rtl8382
+  DEVICE_MODEL := 1920-24G-PoE+ 180W (JG925A)
+  DEVICE_PACKAGES += realtek-poe
+  H3C_DEVICE_ID := 0x00010028
+endef
+TARGET_DEVICES += hpe_1920-24g-poe-180w
+
 define Device/hpe_1920-24g-poe-370w
   $(Device/hpe_1920)
   SOC := rtl8382



From lede-commits at lists.infradead.org  Wed Jan  1 13:44:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 16:44:22 -0500
Subject: [openwrt/openwrt]  mediatek: Fix primary MAC of D-Link M60
In-Reply-To: <173576786224.1868136.5216126356671324227@git-01.infra.openwrt.org>
References: <173576786224.1868136.5216126356671324227@git-01.infra.openwrt.org>
Message-ID: <mailman.29713.1735767865.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/812046971e3e69428f48bc85a4d64d9e0fab5dd6

commit 812046971e3e69428f48bc85a4d64d9e0fab5dd6
Author: Roland Reinl <reinlroland+github at gmail.com>
AuthorDate: Mon Dec 30 08:54:56 2024 +0100

    mediatek: Fix primary MAC of D-Link M60
    
    During port to gluon, I saw that the primary mac is not correct. Updated DTS accordingly.
    
    Signed-off-by: Roland Reinl <reinlroland+github at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17429
    (cherry picked from commit 616621120bf2ba460b99d6c814b629a01be8a5d0)
    Link: https://github.com/openwrt/openwrt/pull/17449
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
index a95c069156..e805554a13 100644
--- a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
+++ b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
@@ -17,6 +17,7 @@
 		led-failsafe = &led_status_red;
 		led-running = &led_status_white;
 		led-upgrade = &led_status_blue;
+		label-mac-device = &gmac0;
 	};
 
 	chosen {



From lede-commits at lists.infradead.org  Wed Jan  1 14:15:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 17:15:10 -0500
Subject: [openwrt/openwrt]  ramips: mt7621: enable lzma-loader for Amped
 Wireless ALLY
In-Reply-To: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
References: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
Message-ID: <mailman.29714.1735769710.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/36f7db978a5fd2f84d3351a2e4148106cb1af282

commit 36f7db978a5fd2f84d3351a2e4148106cb1af282
Author: Jonathan Sturges <jsturges at redhat.com>
AuthorDate: Thu Dec 26 21:47:40 2024 -0500

    ramips: mt7621: enable lzma-loader for Amped Wireless ALLY
    
    Switch to using loader-kernel to accommodate
    larger image sizes that are problematic for
    many mt7621 uboots.
    
    Signed-off-by: Jonathan Sturges <jsturges at redhat.com>
    Link: https://github.com/openwrt/openwrt/pull/17389
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit f8a8a2c5c7ff1efe289d846a890d3361757c231f)
---
 target/linux/ramips/image/mt7621.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index eb7dacefef..9c6efb8f1c 100644
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -294,11 +294,11 @@ TARGET_DEVICES += alfa-network_quad-e4g
 
 define Device/ampedwireless_ally_common
   $(Device/nand)
+  $(Device/uimage-lzma-loader)
   DEVICE_VENDOR := Amped Wireless
   DEVICE_PACKAGES := kmod-mt7615-firmware
   IMAGE_SIZE := 32768k
-  KERNEL_INITRAMFS := $(KERNEL_DTB) | uImage lzma -n 'flashable-initramfs' |\
-	edimax-header -s CSYS -m RN68 -f 0x001c0000 -S 0x01100000
+  KERNEL_INITRAMFS := $$(KERNEL) | edimax-header -s CSYS -m RN68 -f 0x001c0000 -S 0x01100000
 endef
 
 define Device/ampedwireless_ally-r1900k



From lede-commits at lists.infradead.org  Wed Jan  1 14:15:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 17:15:08 -0500
Subject: [openwrt/openwrt]  mediatek: filogic: add KTD2026/7 driver to Acer
 Connect Vero W6m
In-Reply-To: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
References: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
Message-ID: <mailman.29715.1735769710.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b80de63e9fcc4c91520a4d04e3e7a9c8ed5556cb

commit b80de63e9fcc4c91520a4d04e3e7a9c8ed5556cb
Author: George Oldfort <openwrt at 10099.de>
AuthorDate: Tue Nov 26 15:14:56 2024 +0100

    mediatek: filogic: add KTD2026/7 driver to Acer Connect Vero W6m
    
    This commit adds kmod-leds-ktd202x to the OpenWrt image for the device
    "Acer Connect Vero W6m" which is equipped with one KTD2026 controlling the
    device's status LED via I2C.
    
    Signed-off-by: George Oldfort <openwrt at 10099.de>
    Link: https://github.com/openwrt/openwrt/pull/16860
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit e44180d45cc4aa24d2d8df55de49b3627ea4d168)
---
 target/linux/mediatek/image/filogic.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index ddcf59503a..c1a3eff6c7 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -186,7 +186,7 @@ define Device/acer_vero-w6m
   DEVICE_DTS := mt7986a-acer-vero-w6m
   DEVICE_DTS_DIR := ../dts
   DEVICE_DTS_LOADADDR := 0x47000000
-  DEVICE_PACKAGES := kmod-mt7915e kmod-mt7916-firmware kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs
+  DEVICE_PACKAGES := kmod-leds-ktd202x kmod-mt7915e kmod-mt7916-firmware kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs
   IMAGES := sysupgrade.bin
   KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
   KERNEL_INITRAMFS := kernel-bin | lzma | \



From lede-commits at lists.infradead.org  Wed Jan  1 14:15:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 17:15:09 -0500
Subject: [openwrt/openwrt]  trusted-firmware-a.mk: fix release download URL
In-Reply-To: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
References: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
Message-ID: <mailman.29716.1735769710.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f91d8e9f37dd77b6dd4b0ea2e3d3c34f8dc3f2a3

commit f91d8e9f37dd77b6dd4b0ea2e3d3c34f8dc3f2a3
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Fri Dec 20 22:30:01 2024 +0800

    trusted-firmware-a.mk: fix release download URL
    
    The URL of trusted-firmware-a is no longer available for
    downloading release:
    https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/
    curl: (22) The requested URL returned error: 401 Unauthorized
    
    So we switch to the GitHub mirror repository to download.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
    Link: https://github.com/openwrt/openwrt/pull/17360
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 4b6eb631e18b3ccccada91d5bccbb684e6ccc5a4)
---
 include/trusted-firmware-a.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/trusted-firmware-a.mk b/include/trusted-firmware-a.mk
index e469dae984..40c9023f1d 100644
--- a/include/trusted-firmware-a.mk
+++ b/include/trusted-firmware-a.mk
@@ -3,7 +3,7 @@ PKG_CPE_ID ?= cpe:/a:arm:trusted_firmware-a
 
 ifndef PKG_SOURCE_PROTO
 PKG_SOURCE = trusted-firmware-a-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/snapshot
+PKG_SOURCE_URL:=https://codeload.github.com/TrustedFirmware-A/trusted-firmware-a/tar.gz/v$(PKG_VERSION)?
 endif
 
 PKG_BUILD_DIR = $(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)



From lede-commits at lists.infradead.org  Wed Jan  1 14:15:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 17:15:06 -0500
Subject: [openwrt/openwrt]  generic: backport support for KTD2026/7 rgb(w) led
 controller
In-Reply-To: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
References: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
Message-ID: <mailman.29719.1735769712.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a9ddc7432abae1105d9f2385d13edd931d48720b

commit a9ddc7432abae1105d9f2385d13edd931d48720b
Author: George Oldfort <openwrt at 10099.de>
AuthorDate: Tue Nov 26 15:04:45 2024 +0100

    generic: backport support for KTD2026/7 rgb(w) led controller
    
    This commit adds the Linux kernel mainline driver "leds-ktd202x" for the
    KinetIC KTD2026 and KTD2027 RGB/RBGW controller with I2C interface that was
    introduced in kernel version 6.7, last changed in mainline on 2024-05-31.
    
    At least the Acer Connect Vero W6m (a variant of the Acer Predator Connect
    W6 without 2.5G eth1 port, usb3 port, and the 6 on-board gpio RGB LEDs) is
    equipped with a KTD2026 (and a single RGB LED attached to it used by the
    stock firmware as status LED), and maybe other router devices also are.
    
    Signed-off-by: George Oldfort <openwrt at 10099.de>
    Link: https://github.com/openwrt/openwrt/pull/16860
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 56d97fff55f3d384eeb00b021c43fecb380a5bdd)
---
 package/kernel/linux/modules/leds.mk               |  18 +
 .../860-v6.7-leds-add-ktd202x-driver.patch         | 682 +++++++++++++++++++++
 ...202x-get-device-properties-through-fwnode.patch | 221 +++++++
 ...td202x-i2c-id-tables-for-ktd2026-and-2027.patch |  49 ++
 ...rgb-leds-ktd202x-initialize-mutex-earlier.patch |  62 ++
 5 files changed, 1032 insertions(+)

diff --git a/package/kernel/linux/modules/leds.mk b/package/kernel/linux/modules/leds.mk
index 8b24cb0ef8..0c42895bb2 100644
--- a/package/kernel/linux/modules/leds.mk
+++ b/package/kernel/linux/modules/leds.mk
@@ -147,6 +147,24 @@ endef
 $(eval $(call KernelPackage,leds-apu))
 
 
+define KernelPackage/leds-ktd202x
+  SUBMENU:=LED modules
+  TITLE:=LED support for KTD202x Chips
+  DEPENDS:=+kmod-i2c-core +kmod-regmap-i2c
+  KCONFIG:=CONFIG_LEDS_KTD202X
+  FILES:= $(LINUX_DIR)/drivers/leds/rgb/leds-ktd202x.ko
+  AUTOLOAD:=$(call AutoProbe,leds-ktd202x,1)
+endef
+
+define KernelPackage/leds-ktd202x/description
+  This option enables support for the Kinetic KTD2026/KTD2027
+  RGB/White LED driver found in different BQ mobile phones.
+  It is a 3 or 4 channel LED driver programmed via an I2C interface.
+endef
+
+$(eval $(call KernelPackage,leds-ktd202x))
+
+
 define KernelPackage/leds-mlxcpld
   SUBMENU:=$(LEDS_MENU)
   TITLE:=LED support for the Mellanox boards
diff --git a/target/linux/generic/backport-6.6/860-v6.7-leds-add-ktd202x-driver.patch b/target/linux/generic/backport-6.6/860-v6.7-leds-add-ktd202x-driver.patch
new file mode 100644
index 0000000000..fb767c5d99
--- /dev/null
+++ b/target/linux/generic/backport-6.6/860-v6.7-leds-add-ktd202x-driver.patch
@@ -0,0 +1,682 @@
+From 0ebdb7210943eb345992bea9892adbd15a206193 Mon Sep 17 00:00:00 2001
+From: Andr? Apitzsch <git at apitzsch.eu>
+Date: Mon, 2 Oct 2023 18:48:28 +0200
+Subject: leds: Add ktd202x driver
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This commit adds support for Kinetic KTD2026/7 RGB/White LED driver.
+
+Signed-off-by: Andr? Apitzsch <git at apitzsch.eu>
+Link: https://lore.kernel.org/r/20231002-ktd202x-v6-2-26be8eefeb88 at apitzsch.eu
+Signed-off-by: Lee Jones <lee at kernel.org>
+---
+ drivers/leds/rgb/Kconfig        |  13 +
+ drivers/leds/rgb/Makefile       |   1 +
+ drivers/leds/rgb/leds-ktd202x.c | 625 ++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 639 insertions(+)
+ create mode 100644 drivers/leds/rgb/leds-ktd202x.c
+
+(limited to 'drivers/leds/rgb')
+
+--- a/drivers/leds/rgb/Kconfig
++++ b/drivers/leds/rgb/Kconfig
+@@ -14,6 +14,19 @@ config LEDS_GROUP_MULTICOLOR
+ 	  To compile this driver as a module, choose M here: the module
+ 	  will be called leds-group-multicolor.
+ 
++config LEDS_KTD202X
++	tristate "LED support for KTD202x Chips"
++	depends on I2C
++	depends on OF
++	select REGMAP_I2C
++	help
++	  This option enables support for the Kinetic KTD2026/KTD2027
++	  RGB/White LED driver found in different BQ mobile phones.
++	  It is a 3 or 4 channel LED driver programmed via an I2C interface.
++
++	  To compile this driver as a module, choose M here: the module
++	  will be called leds-ktd202x.
++
+ config LEDS_PWM_MULTICOLOR
+ 	tristate "PWM driven multi-color LED Support"
+ 	depends on PWM
+--- a/drivers/leds/rgb/Makefile
++++ b/drivers/leds/rgb/Makefile
+@@ -1,6 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ 
+ obj-$(CONFIG_LEDS_GROUP_MULTICOLOR)	+= leds-group-multicolor.o
++obj-$(CONFIG_LEDS_KTD202X)		+= leds-ktd202x.o
+ obj-$(CONFIG_LEDS_PWM_MULTICOLOR)	+= leds-pwm-multicolor.o
+ obj-$(CONFIG_LEDS_QCOM_LPG)		+= leds-qcom-lpg.o
+ obj-$(CONFIG_LEDS_MT6370_RGB)		+= leds-mt6370-rgb.o
+--- /dev/null
++++ b/drivers/leds/rgb/leds-ktd202x.c
+@@ -0,0 +1,625 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++/*
++ * Kinetic KTD2026/7 RGB/White LED driver with I2C interface
++ *
++ * Copyright 2023 Andr? Apitzsch <git at apitzsch.eu>
++ *
++ * Datasheet: https://www.kinet-ic.com/uploads/KTD2026-7-04h.pdf
++ */
++
++#include <linux/i2c.h>
++#include <linux/led-class-multicolor.h>
++#include <linux/module.h>
++#include <linux/mutex.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/regmap.h>
++#include <linux/regulator/consumer.h>
++
++#define KTD2026_NUM_LEDS 3
++#define KTD2027_NUM_LEDS 4
++#define KTD202X_MAX_LEDS 4
++
++/* Register bank */
++#define KTD202X_REG_RESET_CONTROL	0x00
++#define KTD202X_REG_FLASH_PERIOD	0x01
++#define KTD202X_REG_PWM1_TIMER		0x02
++#define KTD202X_REG_PWM2_TIMER		0x03
++#define KTD202X_REG_CHANNEL_CTRL	0x04
++#define KTD202X_REG_TRISE_FALL		0x05
++#define KTD202X_REG_LED_IOUT(x)		(0x06 + (x))
++
++/* Register 0 */
++#define KTD202X_TIMER_SLOT_CONTROL_TSLOT1	0x00
++#define KTD202X_TIMER_SLOT_CONTROL_TSLOT2	0x01
++#define KTD202X_TIMER_SLOT_CONTROL_TSLOT3	0x02
++#define KTD202X_TIMER_SLOT_CONTROL_TSLOT4	0x03
++#define KTD202X_RSTR_RESET			0x07
++
++#define KTD202X_ENABLE_CTRL_WAKE	0x00 /* SCL High & SDA High */
++#define KTD202X_ENABLE_CTRL_SLEEP	0x08 /* SCL High & SDA Toggling */
++
++#define KTD202X_TRISE_FALL_SCALE_NORMAL		0x00
++#define KTD202X_TRISE_FALL_SCALE_SLOW_X2	0x20
++#define KTD202X_TRISE_FALL_SCALE_SLOW_X4	0x40
++#define KTD202X_TRISE_FALL_SCALE_FAST_X8	0x60
++
++/* Register 1 */
++#define KTD202X_FLASH_PERIOD_256_MS_LOG_RAMP	0x00
++
++/* Register 2-3 */
++#define KTD202X_FLASH_ON_TIME_0_4_PERCENT	0x01
++
++/* Register 4 */
++#define KTD202X_CHANNEL_CTRL_MASK(x) (BIT(2 * (x)) | BIT(2 * (x) + 1))
++#define KTD202X_CHANNEL_CTRL_OFF 0x00
++#define KTD202X_CHANNEL_CTRL_ON(x) BIT(2 * (x))
++#define KTD202X_CHANNEL_CTRL_PWM1(x) BIT(2 * (x) + 1)
++#define KTD202X_CHANNEL_CTRL_PWM2(x) (BIT(2 * (x)) | BIT(2 * (x) + 1))
++
++/* Register 5 */
++#define KTD202X_RAMP_TIMES_2_MS			0x00
++
++/* Register 6-9 */
++#define KTD202X_LED_CURRENT_10_mA		0x4f
++
++#define KTD202X_FLASH_PERIOD_MIN_MS 256
++#define KTD202X_FLASH_PERIOD_STEP_MS 128
++#define KTD202X_FLASH_PERIOD_MAX_STEPS 126
++#define KTD202X_FLASH_ON_MAX 256
++
++#define KTD202X_MAX_BRIGHTNESS 192
++
++static const struct reg_default ktd202x_reg_defaults[] = {
++	{ KTD202X_REG_RESET_CONTROL, KTD202X_TIMER_SLOT_CONTROL_TSLOT1 |
++		KTD202X_ENABLE_CTRL_WAKE | KTD202X_TRISE_FALL_SCALE_NORMAL },
++	{ KTD202X_REG_FLASH_PERIOD, KTD202X_FLASH_PERIOD_256_MS_LOG_RAMP },
++	{ KTD202X_REG_PWM1_TIMER, KTD202X_FLASH_ON_TIME_0_4_PERCENT },
++	{ KTD202X_REG_PWM2_TIMER, KTD202X_FLASH_ON_TIME_0_4_PERCENT },
++	{ KTD202X_REG_CHANNEL_CTRL, KTD202X_CHANNEL_CTRL_OFF },
++	{ KTD202X_REG_TRISE_FALL, KTD202X_RAMP_TIMES_2_MS },
++	{ KTD202X_REG_LED_IOUT(0), KTD202X_LED_CURRENT_10_mA },
++	{ KTD202X_REG_LED_IOUT(1), KTD202X_LED_CURRENT_10_mA },
++	{ KTD202X_REG_LED_IOUT(2), KTD202X_LED_CURRENT_10_mA },
++	{ KTD202X_REG_LED_IOUT(3), KTD202X_LED_CURRENT_10_mA },
++};
++
++struct ktd202x_led {
++	struct ktd202x *chip;
++	union {
++		struct led_classdev cdev;
++		struct led_classdev_mc mcdev;
++	};
++	u32 index;
++};
++
++struct ktd202x {
++	struct mutex mutex;
++	struct regulator_bulk_data regulators[2];
++	struct device *dev;
++	struct regmap *regmap;
++	bool enabled;
++	int num_leds;
++	struct ktd202x_led leds[] __counted_by(num_leds);
++};
++
++static int ktd202x_chip_disable(struct ktd202x *chip)
++{
++	int ret;
++
++	if (!chip->enabled)
++		return 0;
++
++	regmap_write(chip->regmap, KTD202X_REG_RESET_CONTROL, KTD202X_ENABLE_CTRL_SLEEP);
++
++	ret = regulator_bulk_disable(ARRAY_SIZE(chip->regulators), chip->regulators);
++	if (ret) {
++		dev_err(chip->dev, "Failed to disable regulators: %d\n", ret);
++		return ret;
++	}
++
++	chip->enabled = false;
++	return 0;
++}
++
++static int ktd202x_chip_enable(struct ktd202x *chip)
++{
++	int ret;
++
++	if (chip->enabled)
++		return 0;
++
++	ret = regulator_bulk_enable(ARRAY_SIZE(chip->regulators), chip->regulators);
++	if (ret) {
++		dev_err(chip->dev, "Failed to enable regulators: %d\n", ret);
++		return ret;
++	}
++	chip->enabled = true;
++
++	ret = regmap_write(chip->regmap, KTD202X_REG_RESET_CONTROL, KTD202X_ENABLE_CTRL_WAKE);
++
++	if (ret) {
++		dev_err(chip->dev, "Failed to enable the chip: %d\n", ret);
++		ktd202x_chip_disable(chip);
++	}
++
++	return ret;
++}
++
++static bool ktd202x_chip_in_use(struct ktd202x *chip)
++{
++	int i;
++
++	for (i = 0; i < chip->num_leds; i++) {
++		if (chip->leds[i].cdev.brightness)
++			return true;
++	}
++
++	return false;
++}
++
++static int ktd202x_brightness_set(struct ktd202x_led *led,
++				  struct mc_subled *subleds,
++				  unsigned int num_channels)
++{
++	bool mode_blink = false;
++	int channel;
++	int state;
++	int ret;
++	int i;
++
++	if (ktd202x_chip_in_use(led->chip)) {
++		ret = ktd202x_chip_enable(led->chip);
++		if (ret)
++			return ret;
++	}
++
++	ret = regmap_read(led->chip->regmap, KTD202X_REG_CHANNEL_CTRL, &state);
++	if (ret)
++		return ret;
++
++	/*
++	 * In multicolor case, assume blink mode if PWM is set for at least one
++	 * channel because another channel cannot be in state ON at the same time
++	 */
++	for (i = 0; i < num_channels; i++) {
++		int channel_state;
++
++		channel = subleds[i].channel;
++		channel_state = (state >> 2 * channel) & KTD202X_CHANNEL_CTRL_MASK(0);
++		if (channel_state == KTD202X_CHANNEL_CTRL_OFF)
++			continue;
++		mode_blink = channel_state == KTD202X_CHANNEL_CTRL_PWM1(0);
++		break;
++	}
++
++	for (i = 0; i < num_channels; i++) {
++		enum led_brightness brightness;
++		int mode;
++
++		brightness = subleds[i].brightness;
++		channel = subleds[i].channel;
++
++		if (brightness) {
++			/* Register expects brightness between 0 and MAX_BRIGHTNESS - 1 */
++			ret = regmap_write(led->chip->regmap, KTD202X_REG_LED_IOUT(channel),
++					   brightness - 1);
++			if (ret)
++				return ret;
++
++			if (mode_blink)
++				mode = KTD202X_CHANNEL_CTRL_PWM1(channel);
++			else
++				mode = KTD202X_CHANNEL_CTRL_ON(channel);
++		} else {
++			mode = KTD202X_CHANNEL_CTRL_OFF;
++		}
++		ret = regmap_update_bits(led->chip->regmap, KTD202X_REG_CHANNEL_CTRL,
++					 KTD202X_CHANNEL_CTRL_MASK(channel), mode);
++		if (ret)
++			return ret;
++	}
++
++	if (!ktd202x_chip_in_use(led->chip))
++		return ktd202x_chip_disable(led->chip);
++
++	return 0;
++}
++
++static int ktd202x_brightness_single_set(struct led_classdev *cdev,
++					 enum led_brightness value)
++{
++	struct ktd202x_led *led = container_of(cdev, struct ktd202x_led, cdev);
++	struct mc_subled info;
++	int ret;
++
++	cdev->brightness = value;
++
++	mutex_lock(&led->chip->mutex);
++
++	info.brightness = value;
++	info.channel = led->index;
++	ret = ktd202x_brightness_set(led, &info, 1);
++
++	mutex_unlock(&led->chip->mutex);
++
++	return ret;
++}
++
++static int ktd202x_brightness_mc_set(struct led_classdev *cdev,
++				     enum led_brightness value)
++{
++	struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
++	struct ktd202x_led *led = container_of(mc, struct ktd202x_led, mcdev);
++	int ret;
++
++	cdev->brightness = value;
++
++	mutex_lock(&led->chip->mutex);
++
++	led_mc_calc_color_components(mc, value);
++	ret = ktd202x_brightness_set(led, mc->subled_info, mc->num_colors);
++
++	mutex_unlock(&led->chip->mutex);
++
++	return ret;
++}
++
++static int ktd202x_blink_set(struct ktd202x_led *led, unsigned long *delay_on,
++			     unsigned long *delay_off, struct mc_subled *subleds,
++			     unsigned int num_channels)
++{
++	unsigned long delay_total_ms;
++	int ret, num_steps, on;
++	u8 ctrl_mask = 0;
++	u8 ctrl_pwm1 = 0;
++	u8 ctrl_on = 0;
++	int i;
++
++	mutex_lock(&led->chip->mutex);
++
++	for (i = 0; i < num_channels; i++) {
++		int channel = subleds[i].channel;
++
++		ctrl_mask |= KTD202X_CHANNEL_CTRL_MASK(channel);
++		ctrl_on |= KTD202X_CHANNEL_CTRL_ON(channel);
++		ctrl_pwm1 |= KTD202X_CHANNEL_CTRL_PWM1(channel);
++	}
++
++	/* Never off - brightness is already set, disable blinking */
++	if (!*delay_off) {
++		ret = regmap_update_bits(led->chip->regmap, KTD202X_REG_CHANNEL_CTRL,
++					 ctrl_mask, ctrl_on);
++		goto out;
++	}
++
++	/* Convert into values the HW will understand. */
++
++	/* Integer representation of time of flash period */
++	num_steps = (*delay_on + *delay_off - KTD202X_FLASH_PERIOD_MIN_MS) /
++		    KTD202X_FLASH_PERIOD_STEP_MS;
++	num_steps = clamp(num_steps, 0, KTD202X_FLASH_PERIOD_MAX_STEPS);
++
++	/* Integer representation of percentage of LED ON time */
++	on = (*delay_on * KTD202X_FLASH_ON_MAX) / (*delay_on + *delay_off);
++
++	/* Actually used delay_{on,off} values */
++	delay_total_ms = num_steps * KTD202X_FLASH_PERIOD_STEP_MS + KTD202X_FLASH_PERIOD_MIN_MS;
++	*delay_on = (delay_total_ms * on) / KTD202X_FLASH_ON_MAX;
++	*delay_off = delay_total_ms - *delay_on;
++
++	/* Set timings */
++	ret = regmap_write(led->chip->regmap, KTD202X_REG_FLASH_PERIOD, num_steps);
++	if (ret)
++		goto out;
++
++	ret = regmap_write(led->chip->regmap, KTD202X_REG_PWM1_TIMER, on);
++	if (ret)
++		goto out;
++
++	ret = regmap_update_bits(led->chip->regmap, KTD202X_REG_CHANNEL_CTRL,
++				 ctrl_mask, ctrl_pwm1);
++out:
++	mutex_unlock(&led->chip->mutex);
++	return ret;
++}
++
++static int ktd202x_blink_single_set(struct led_classdev *cdev,
++				    unsigned long *delay_on,
++				    unsigned long *delay_off)
++{
++	struct ktd202x_led *led = container_of(cdev, struct ktd202x_led, cdev);
++	struct mc_subled info;
++	int ret;
++
++	if (!cdev->brightness) {
++		ret = ktd202x_brightness_single_set(cdev, KTD202X_MAX_BRIGHTNESS);
++		if (ret)
++			return ret;
++	}
++
++	/* If no blink specified, default to 1 Hz. */
++	if (!*delay_off && !*delay_on) {
++		*delay_off = 500;
++		*delay_on = 500;
++	}
++
++	/* Never on - just set to off */
++	if (!*delay_on)
++		return ktd202x_brightness_single_set(cdev, LED_OFF);
++
++	info.channel = led->index;
++
++	return ktd202x_blink_set(led, delay_on, delay_off, &info, 1);
++}
++
++static int ktd202x_blink_mc_set(struct led_classdev *cdev,
++				unsigned long *delay_on,
++				unsigned long *delay_off)
++{
++	struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
++	struct ktd202x_led *led = container_of(mc, struct ktd202x_led, mcdev);
++	int ret;
++
++	if (!cdev->brightness) {
++		ret = ktd202x_brightness_mc_set(cdev, KTD202X_MAX_BRIGHTNESS);
++		if (ret)
++			return ret;
++	}
++
++	/* If no blink specified, default to 1 Hz. */
++	if (!*delay_off && !*delay_on) {
++		*delay_off = 500;
++		*delay_on = 500;
++	}
++
++	/* Never on - just set to off */
++	if (!*delay_on)
++		return ktd202x_brightness_mc_set(cdev, LED_OFF);
++
++	return ktd202x_blink_set(led, delay_on, delay_off, mc->subled_info,
++				 mc->num_colors);
++}
++
++static int ktd202x_setup_led_rgb(struct ktd202x *chip, struct device_node *np,
++				 struct ktd202x_led *led, struct led_init_data *init_data)
++{
++	struct led_classdev *cdev;
++	struct device_node *child;
++	struct mc_subled *info;
++	int num_channels;
++	int i = 0;
++
++	num_channels = of_get_available_child_count(np);
++	if (!num_channels || num_channels > chip->num_leds)
++		return -EINVAL;
++
++	info = devm_kcalloc(chip->dev, num_channels, sizeof(*info), GFP_KERNEL);
++	if (!info)
++		return -ENOMEM;
++
++	for_each_available_child_of_node(np, child) {
++		u32 mono_color;
++		u32 reg;
++		int ret;
++
++		ret = of_property_read_u32(child, "reg", &reg);
++		if (ret != 0 || reg >= chip->num_leds) {
++			dev_err(chip->dev, "invalid 'reg' of %pOFn\n", child);
++			of_node_put(child);
++			return -EINVAL;
++		}
++
++		ret = of_property_read_u32(child, "color", &mono_color);
++		if (ret < 0 && ret != -EINVAL) {
++			dev_err(chip->dev, "failed to parse 'color' of %pOF\n", child);
++			of_node_put(child);
++			return ret;
++		}
++
++		info[i].color_index = mono_color;
++		info[i].channel = reg;
++		info[i].intensity = KTD202X_MAX_BRIGHTNESS;
++		i++;
++	}
++
++	led->mcdev.subled_info = info;
++	led->mcdev.num_colors = num_channels;
++
++	cdev = &led->mcdev.led_cdev;
++	cdev->brightness_set_blocking = ktd202x_brightness_mc_set;
++	cdev->blink_set = ktd202x_blink_mc_set;
++
++	return devm_led_classdev_multicolor_register_ext(chip->dev, &led->mcdev, init_data);
++}
++
++static int ktd202x_setup_led_single(struct ktd202x *chip, struct device_node *np,
++				    struct ktd202x_led *led, struct led_init_data *init_data)
++{
++	struct led_classdev *cdev;
++	u32 reg;
++	int ret;
++
++	ret = of_property_read_u32(np, "reg", &reg);
++	if (ret != 0 || reg >= chip->num_leds) {
++		dev_err(chip->dev, "invalid 'reg' of %pOFn\n", np);
++		return -EINVAL;
++	}
++	led->index = reg;
++
++	cdev = &led->cdev;
++	cdev->brightness_set_blocking = ktd202x_brightness_single_set;
++	cdev->blink_set = ktd202x_blink_single_set;
++
++	return devm_led_classdev_register_ext(chip->dev, &led->cdev, init_data);
++}
++
++static int ktd202x_add_led(struct ktd202x *chip, struct device_node *np, unsigned int index)
++{
++	struct ktd202x_led *led = &chip->leds[index];
++	struct led_init_data init_data = {};
++	struct led_classdev *cdev;
++	u32 color;
++	int ret;
++
++	/* Color property is optional in single color case */
++	ret = of_property_read_u32(np, "color", &color);
++	if (ret < 0 && ret != -EINVAL) {
++		dev_err(chip->dev, "failed to parse 'color' of %pOF\n", np);
++		return ret;
++	}
++
++	led->chip = chip;
++	init_data.fwnode = of_fwnode_handle(np);
++
++	if (color == LED_COLOR_ID_RGB) {
++		cdev = &led->mcdev.led_cdev;
++		ret = ktd202x_setup_led_rgb(chip, np, led, &init_data);
++	} else {
++		cdev = &led->cdev;
++		ret = ktd202x_setup_led_single(chip, np, led, &init_data);
++	}
++
++	if (ret) {
++		dev_err(chip->dev, "unable to register %s\n", cdev->name);
++		return ret;
++	}
++
++	cdev->max_brightness = KTD202X_MAX_BRIGHTNESS;
++
++	return 0;
++}
++
++static int ktd202x_probe_dt(struct ktd202x *chip)
++{
++	struct device_node *np = dev_of_node(chip->dev), *child;
++	int count;
++	int i = 0;
++
++	chip->num_leds = (int)(unsigned long)of_device_get_match_data(chip->dev);
++
++	count = of_get_available_child_count(np);
++	if (!count || count > chip->num_leds)
++		return -EINVAL;
++
++	regmap_write(chip->regmap, KTD202X_REG_RESET_CONTROL, KTD202X_RSTR_RESET);
++
++	/* Allow the device to execute the complete reset */
++	usleep_range(200, 300);
++
++	for_each_available_child_of_node(np, child) {
++		int ret = ktd202x_add_led(chip, child, i);
++
++		if (ret) {
++			of_node_put(child);
++			return ret;
++		}
++		i++;
++	}
++
++	return 0;
++}
++
++static const struct regmap_config ktd202x_regmap_config = {
++	.reg_bits = 8,
++	.val_bits = 8,
++	.max_register = 0x09,
++	.cache_type = REGCACHE_FLAT,
++	.reg_defaults = ktd202x_reg_defaults,
++	.num_reg_defaults = ARRAY_SIZE(ktd202x_reg_defaults),
++};
++
++static int ktd202x_probe(struct i2c_client *client)
++{
++	struct device *dev = &client->dev;
++	struct ktd202x *chip;
++	int count;
++	int ret;
++
++	count = device_get_child_node_count(dev);
++	if (!count || count > KTD202X_MAX_LEDS)
++		return dev_err_probe(dev, -EINVAL, "Incorrect number of leds (%d)", count);
++
++	chip = devm_kzalloc(dev, struct_size(chip, leds, count), GFP_KERNEL);
++	if (!chip)
++		return -ENOMEM;
++
++	chip->dev = dev;
++	i2c_set_clientdata(client, chip);
++
++	chip->regmap = devm_regmap_init_i2c(client, &ktd202x_regmap_config);
++	if (IS_ERR(chip->regmap)) {
++		ret = dev_err_probe(dev, PTR_ERR(chip->regmap),
++				    "Failed to allocate register map.\n");
++		return ret;
++	}
++
++	chip->regulators[0].supply = "vin";
++	chip->regulators[1].supply = "vio";
++	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(chip->regulators), chip->regulators);
++	if (ret < 0) {
++		dev_err_probe(dev, ret, "Failed to request regulators.\n");
++		return ret;
++	}
++
++	ret = regulator_bulk_enable(ARRAY_SIZE(chip->regulators), chip->regulators);
++	if (ret) {
++		dev_err_probe(dev, ret, "Failed to enable regulators.\n");
++		return ret;
++	}
++
++	ret = ktd202x_probe_dt(chip);
++	if (ret < 0) {
++		regulator_bulk_disable(ARRAY_SIZE(chip->regulators), chip->regulators);
++		return ret;
++	}
++
++	ret = regulator_bulk_disable(ARRAY_SIZE(chip->regulators), chip->regulators);
++	if (ret) {
++		dev_err_probe(dev, ret, "Failed to disable regulators.\n");
++		return ret;
++	}
++
++	mutex_init(&chip->mutex);
++
++	return 0;
++}
++
++static void ktd202x_remove(struct i2c_client *client)
++{
++	struct ktd202x *chip = i2c_get_clientdata(client);
++
++	ktd202x_chip_disable(chip);
++
++	mutex_destroy(&chip->mutex);
++}
++
++static void ktd202x_shutdown(struct i2c_client *client)
++{
++	struct ktd202x *chip = i2c_get_clientdata(client);
++
++	/* Reset registers to make sure all LEDs are off before shutdown */
++	regmap_write(chip->regmap, KTD202X_REG_RESET_CONTROL, KTD202X_RSTR_RESET);
++}
++
++static const struct of_device_id ktd202x_match_table[] = {
++	{ .compatible = "kinetic,ktd2026", .data = (void *)KTD2026_NUM_LEDS },
++	{ .compatible = "kinetic,ktd2027", .data = (void *)KTD2027_NUM_LEDS },
++	{},
++};
++MODULE_DEVICE_TABLE(of, ktd202x_match_table);
++
++static struct i2c_driver ktd202x_driver = {
++	.driver = {
++		.name = "leds-ktd202x",
++		.of_match_table = ktd202x_match_table,
++	},
++	.probe = ktd202x_probe,
++	.remove = ktd202x_remove,
++	.shutdown = ktd202x_shutdown,
++};
++module_i2c_driver(ktd202x_driver);
++
++MODULE_AUTHOR("Andr? Apitzsch <git at apitzsch.eu>");
++MODULE_DESCRIPTION("Kinetic KTD2026/7 LED driver");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/generic/backport-6.6/861-v6.10-leds-rgb-leds-ktd202x-get-device-properties-through-fwnode.patch b/target/linux/generic/backport-6.6/861-v6.10-leds-rgb-leds-ktd202x-get-device-properties-through-fwnode.patch
new file mode 100644
index 0000000000..92b20c3b9c
--- /dev/null
+++ b/target/linux/generic/backport-6.6/861-v6.10-leds-rgb-leds-ktd202x-get-device-properties-through-fwnode.patch
@@ -0,0 +1,221 @@
+From f14aa5ea415b8add245e976bfab96a12986c6843 Mon Sep 17 00:00:00 2001
+From: Kate Hsuan <hpa at redhat.com>
+Date: Fri, 31 May 2024 13:41:19 +0200
+Subject: leds: rgb: leds-ktd202x: Get device properties through fwnode to
+ support ACPI
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This LED controller is installed on a Xiaomi pad2 and it is an x86
+platform. The original driver is based on the device tree and can't be
+used for this ACPI based system. This patch migrated the driver to use
+fwnode to access the properties. Moreover, the fwnode API supports the
+device tree so this work won't affect the original implementations.
+
+Signed-off-by: Kate Hsuan <hpa at redhat.com>
+Tested-by: Andr? Apitzsch <git at apitzsch.eu> # on BQ Aquaris M5
+Reviewed-by: Hans de Goede <hdegoede at redhat.com>
+Reviewed-by: Andy Shevchenko <andy at kernel.org>
+Signed-off-by: Hans de Goede <hdegoede at redhat.com>
+Link: https://lore.kernel.org/r/20240531114124.45346-2-hdegoede at redhat.com
+Signed-off-by: Lee Jones <lee at kernel.org>
+---
+ drivers/leds/rgb/Kconfig        |  1 -
+ drivers/leds/rgb/leds-ktd202x.c | 64 ++++++++++++++++++++++-------------------
+ 2 files changed, 34 insertions(+), 31 deletions(-)
+
+(limited to 'drivers/leds/rgb')
+
+--- a/drivers/leds/rgb/Kconfig
++++ b/drivers/leds/rgb/Kconfig
+@@ -17,7 +17,6 @@ config LEDS_GROUP_MULTICOLOR
+ config LEDS_KTD202X
+ 	tristate "LED support for KTD202x Chips"
+ 	depends on I2C
+-	depends on OF
+ 	select REGMAP_I2C
+ 	help
+ 	  This option enables support for the Kinetic KTD2026/KTD2027
+--- a/drivers/leds/rgb/leds-ktd202x.c
++++ b/drivers/leds/rgb/leds-ktd202x.c
+@@ -99,7 +99,7 @@ struct ktd202x {
+ 	struct device *dev;
+ 	struct regmap *regmap;
+ 	bool enabled;
+-	int num_leds;
++	unsigned long num_leds;
+ 	struct ktd202x_led leds[] __counted_by(num_leds);
+ };
+ 
+@@ -381,16 +381,19 @@ static int ktd202x_blink_mc_set(struct l
+ 				 mc->num_colors);
+ }
+ 
+-static int ktd202x_setup_led_rgb(struct ktd202x *chip, struct device_node *np,
++static int ktd202x_setup_led_rgb(struct ktd202x *chip, struct fwnode_handle *fwnode,
+ 				 struct ktd202x_led *led, struct led_init_data *init_data)
+ {
++	struct fwnode_handle *child;
+ 	struct led_classdev *cdev;
+-	struct device_node *child;
+ 	struct mc_subled *info;
+ 	int num_channels;
+ 	int i = 0;
+ 
+-	num_channels = of_get_available_child_count(np);
++	num_channels = 0;
++	fwnode_for_each_available_child_node(fwnode, child)
++		num_channels++;
++
+ 	if (!num_channels || num_channels > chip->num_leds)
+ 		return -EINVAL;
+ 
+@@ -398,22 +401,22 @@ static int ktd202x_setup_led_rgb(struct
+ 	if (!info)
+ 		return -ENOMEM;
+ 
+-	for_each_available_child_of_node(np, child) {
++	fwnode_for_each_available_child_node(fwnode, child) {
+ 		u32 mono_color;
+ 		u32 reg;
+ 		int ret;
+ 
+-		ret = of_property_read_u32(child, "reg", &reg);
++		ret = fwnode_property_read_u32(child, "reg", &reg);
+ 		if (ret != 0 || reg >= chip->num_leds) {
+-			dev_err(chip->dev, "invalid 'reg' of %pOFn\n", child);
+-			of_node_put(child);
+-			return -EINVAL;
++			dev_err(chip->dev, "invalid 'reg' of %pfw\n", child);
++			fwnode_handle_put(child);
++			return ret;
+ 		}
+ 
+-		ret = of_property_read_u32(child, "color", &mono_color);
++		ret = fwnode_property_read_u32(child, "color", &mono_color);
+ 		if (ret < 0 && ret != -EINVAL) {
+-			dev_err(chip->dev, "failed to parse 'color' of %pOF\n", child);
+-			of_node_put(child);
++			dev_err(chip->dev, "failed to parse 'color' of %pfw\n", child);
++			fwnode_handle_put(child);
+ 			return ret;
+ 		}
+ 
+@@ -433,16 +436,16 @@ static int ktd202x_setup_led_rgb(struct
+ 	return devm_led_classdev_multicolor_register_ext(chip->dev, &led->mcdev, init_data);
+ }
+ 
+-static int ktd202x_setup_led_single(struct ktd202x *chip, struct device_node *np,
++static int ktd202x_setup_led_single(struct ktd202x *chip, struct fwnode_handle *fwnode,
+ 				    struct ktd202x_led *led, struct led_init_data *init_data)
+ {
+ 	struct led_classdev *cdev;
+ 	u32 reg;
+ 	int ret;
+ 
+-	ret = of_property_read_u32(np, "reg", &reg);
++	ret = fwnode_property_read_u32(fwnode, "reg", &reg);
+ 	if (ret != 0 || reg >= chip->num_leds) {
+-		dev_err(chip->dev, "invalid 'reg' of %pOFn\n", np);
++		dev_err(chip->dev, "invalid 'reg' of %pfw\n", fwnode);
+ 		return -EINVAL;
+ 	}
+ 	led->index = reg;
+@@ -454,7 +457,7 @@ static int ktd202x_setup_led_single(stru
+ 	return devm_led_classdev_register_ext(chip->dev, &led->cdev, init_data);
+ }
+ 
+-static int ktd202x_add_led(struct ktd202x *chip, struct device_node *np, unsigned int index)
++static int ktd202x_add_led(struct ktd202x *chip, struct fwnode_handle *fwnode, unsigned int index)
+ {
+ 	struct ktd202x_led *led = &chip->leds[index];
+ 	struct led_init_data init_data = {};
+@@ -463,21 +466,21 @@ static int ktd202x_add_led(struct ktd202
+ 	int ret;
+ 
+ 	/* Color property is optional in single color case */
+-	ret = of_property_read_u32(np, "color", &color);
++	ret = fwnode_property_read_u32(fwnode, "color", &color);
+ 	if (ret < 0 && ret != -EINVAL) {
+-		dev_err(chip->dev, "failed to parse 'color' of %pOF\n", np);
++		dev_err(chip->dev, "failed to parse 'color' of %pfw\n", fwnode);
+ 		return ret;
+ 	}
+ 
+ 	led->chip = chip;
+-	init_data.fwnode = of_fwnode_handle(np);
++	init_data.fwnode = fwnode;
+ 
+ 	if (color == LED_COLOR_ID_RGB) {
+ 		cdev = &led->mcdev.led_cdev;
+-		ret = ktd202x_setup_led_rgb(chip, np, led, &init_data);
++		ret = ktd202x_setup_led_rgb(chip, fwnode, led, &init_data);
+ 	} else {
+ 		cdev = &led->cdev;
+-		ret = ktd202x_setup_led_single(chip, np, led, &init_data);
++		ret = ktd202x_setup_led_single(chip, fwnode, led, &init_data);
+ 	}
+ 
+ 	if (ret) {
+@@ -490,15 +493,14 @@ static int ktd202x_add_led(struct ktd202
+ 	return 0;
+ }
+ 
+-static int ktd202x_probe_dt(struct ktd202x *chip)
++static int ktd202x_probe_fw(struct ktd202x *chip)
+ {
+-	struct device_node *np = dev_of_node(chip->dev), *child;
++	struct fwnode_handle *child;
++	struct device *dev = chip->dev;
+ 	int count;
+ 	int i = 0;
+ 
+-	chip->num_leds = (int)(unsigned long)of_device_get_match_data(chip->dev);
+-
+-	count = of_get_available_child_count(np);
++	count = device_get_child_node_count(dev);
+ 	if (!count || count > chip->num_leds)
+ 		return -EINVAL;
+ 
+@@ -507,11 +509,11 @@ static int ktd202x_probe_dt(struct ktd20
+ 	/* Allow the device to execute the complete reset */
+ 	usleep_range(200, 300);
+ 
+-	for_each_available_child_of_node(np, child) {
++	device_for_each_child_node(dev, child) {
+ 		int ret = ktd202x_add_led(chip, child, i);
+ 
+ 		if (ret) {
+-			of_node_put(child);
++			fwnode_handle_put(child);
+ 			return ret;
+ 		}
+ 		i++;
+@@ -554,6 +556,8 @@ static int ktd202x_probe(struct i2c_clie
+ 		return ret;
+ 	}
+ 
++	chip->num_leds = (unsigned long)i2c_get_match_data(client);
++
+ 	chip->regulators[0].supply = "vin";
+ 	chip->regulators[1].supply = "vio";
+ 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(chip->regulators), chip->regulators);
+@@ -568,7 +572,7 @@ static int ktd202x_probe(struct i2c_clie
+ 		return ret;
+ 	}
+ 
+-	ret = ktd202x_probe_dt(chip);
++	ret = ktd202x_probe_fw(chip);
+ 	if (ret < 0) {
+ 		regulator_bulk_disable(ARRAY_SIZE(chip->regulators), chip->regulators);
+ 		return ret;
+@@ -605,7 +609,7 @@ static void ktd202x_shutdown(struct i2c_
+ static const struct of_device_id ktd202x_match_table[] = {
+ 	{ .compatible = "kinetic,ktd2026", .data = (void *)KTD2026_NUM_LEDS },
+ 	{ .compatible = "kinetic,ktd2027", .data = (void *)KTD2027_NUM_LEDS },
+-	{},
++	{}
+ };
+ MODULE_DEVICE_TABLE(of, ktd202x_match_table);
+ 
diff --git a/target/linux/generic/backport-6.6/862-v6.10-leds-rgb-leds-ktd202x-i2c-id-tables-for-ktd2026-and-2027.patch b/target/linux/generic/backport-6.6/862-v6.10-leds-rgb-leds-ktd202x-i2c-id-tables-for-ktd2026-and-2027.patch
new file mode 100644
index 0000000000..223ccd8f50
--- /dev/null
+++ b/target/linux/generic/backport-6.6/862-v6.10-leds-rgb-leds-ktd202x-i2c-id-tables-for-ktd2026-and-2027.patch
@@ -0,0 +1,49 @@
+From 75bd07aef47e1a984229e6ec702e8b9aee0226e4 Mon Sep 17 00:00:00 2001
+From: Kate Hsuan <hpa at redhat.com>
+Date: Fri, 31 May 2024 13:41:20 +0200
+Subject: leds: rgb: leds-ktd202x: I2C ID tables for KTD2026 and 2027
+
+Add an i2c_device_id id_table to match manually instantiated
+(non device-tree / ACPI instantiated) KTD202x controllers as
+found on some x86 boards.
+
+This table shows the maximum support LED channel for KTD2026
+(three LEDs) and KTD-2027 (4 LEDs).
+
+Link: https://www.kinet-ic.com/uploads/KTD2026-7-04h.pdf
+Signed-off-by: Kate Hsuan <hpa at redhat.com>
+Reviewed-by: Hans de Goede <hdegoede at redhat.com>
+Reviewed-by: Andy Shevchenko <andy at kernel.org>
+Signed-off-by: Hans de Goede <hdegoede at redhat.com>
+Link: https://lore.kernel.org/r/20240531114124.45346-3-hdegoede at redhat.com
+Signed-off-by: Lee Jones <lee at kernel.org>
+---
+ drivers/leds/rgb/leds-ktd202x.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+(limited to 'drivers/leds/rgb')
+
+--- a/drivers/leds/rgb/leds-ktd202x.c
++++ b/drivers/leds/rgb/leds-ktd202x.c
+@@ -606,6 +606,13 @@ static void ktd202x_shutdown(struct i2c_
+ 	regmap_write(chip->regmap, KTD202X_REG_RESET_CONTROL, KTD202X_RSTR_RESET);
+ }
+ 
++static const struct i2c_device_id ktd202x_id[] = {
++	{"ktd2026", KTD2026_NUM_LEDS},
++	{"ktd2027", KTD2027_NUM_LEDS},
++	{}
++};
++MODULE_DEVICE_TABLE(i2c, ktd202x_id);
++
+ static const struct of_device_id ktd202x_match_table[] = {
+ 	{ .compatible = "kinetic,ktd2026", .data = (void *)KTD2026_NUM_LEDS },
+ 	{ .compatible = "kinetic,ktd2027", .data = (void *)KTD2027_NUM_LEDS },
+@@ -621,6 +628,7 @@ static struct i2c_driver ktd202x_driver
+ 	.probe = ktd202x_probe,
+ 	.remove = ktd202x_remove,
+ 	.shutdown = ktd202x_shutdown,
++	.id_table = ktd202x_id,
+ };
+ module_i2c_driver(ktd202x_driver);
+ 
diff --git a/target/linux/generic/backport-6.6/863-v6.10-leds-rgb-leds-ktd202x-initialize-mutex-earlier.patch b/target/linux/generic/backport-6.6/863-v6.10-leds-rgb-leds-ktd202x-initialize-mutex-earlier.patch
new file mode 100644
index 0000000000..533b0f0e17
--- /dev/null
+++ b/target/linux/generic/backport-6.6/863-v6.10-leds-rgb-leds-ktd202x-initialize-mutex-earlier.patch
@@ -0,0 +1,62 @@
+From e1b08c6f5b92d408a9fcc1030a340caeb9852250 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede at redhat.com>
+Date: Fri, 31 May 2024 13:41:21 +0200
+Subject: leds: rgb: leds-ktd202x: Initialize mutex earlier
+
+The mutex must be initialized before the LED class device is registered
+otherwise there is a race where it may get used before it is initialized:
+
+ DEBUG_LOCKS_WARN_ON(lock->magic != lock)
+ WARNING: CPU: 2 PID: 2045 at kernel/locking/mutex.c:587 __mutex_lock
+ ...
+ RIP: 0010:__mutex_lock+0x7db/0xc10
+ ...
+ set_brightness_delayed_set_brightness.part.0+0x17/0x60
+ set_brightness_delayed+0xf1/0x100
+ process_one_work+0x222/0x5a0
+
+Move the mutex_init() call earlier to avoid this race condition and
+switch to devm_mutex_init() to avoid the need to add error-exit
+cleanup to probe() if probe() fails later on.
+
+Signed-off-by: Hans de Goede <hdegoede at redhat.com>
+Reviewed-by: Andy Shevchenko <andy at kernel.org>
+Link: https://lore.kernel.org/r/20240531114124.45346-4-hdegoede at redhat.com
+Signed-off-by: Lee Jones <lee at kernel.org>
+---
+ drivers/leds/rgb/leds-ktd202x.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+(limited to 'drivers/leds/rgb')
+
+--- a/drivers/leds/rgb/leds-ktd202x.c
++++ b/drivers/leds/rgb/leds-ktd202x.c
+@@ -556,6 +556,10 @@ static int ktd202x_probe(struct i2c_clie
+ 		return ret;
+ 	}
+ 
++	ret = devm_mutex_init(dev, &chip->mutex);
++	if (ret)
++		return ret;
++
+ 	chip->num_leds = (unsigned long)i2c_get_match_data(client);
+ 
+ 	chip->regulators[0].supply = "vin";
+@@ -584,8 +588,6 @@ static int ktd202x_probe(struct i2c_clie
+ 		return ret;
+ 	}
+ 
+-	mutex_init(&chip->mutex);
+-
+ 	return 0;
+ }
+ 
+@@ -594,8 +596,6 @@ static void ktd202x_remove(struct i2c_cl
+ 	struct ktd202x *chip = i2c_get_clientdata(client);
+ 
+ 	ktd202x_chip_disable(chip);
+-
+-	mutex_destroy(&chip->mutex);
+ }
+ 
+ static void ktd202x_shutdown(struct i2c_client *client)



From lede-commits at lists.infradead.org  Wed Jan  1 14:15:07 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 01 Jan 2025 17:15:07 -0500
Subject: [openwrt/openwrt]  generic: add missing CONFIG_LEDS_KTD202X symbol
In-Reply-To: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
References: <173576970691.1912823.10278010138193570945@git-01.infra.openwrt.org>
Message-ID: <mailman.29722.1735769716.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/35e02b31c0c6019b5e0716cad78f5e66ebd574b1

commit 35e02b31c0c6019b5e0716cad78f5e66ebd574b1
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Dec 27 17:34:39 2024 +0100

    generic: add missing CONFIG_LEDS_KTD202X symbol
    
    Commit 56d97fff55f3 backported leds-ktd202x from upstream but didn't add the
    generic config symbol.
    
    Fixes: 56d97fff55f3 ("generic: backport support for KTD2026/7 rgb(w) led controller")
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17396
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit c846f48f6a1d7167ea4f55e5ce2cf4f1e27c8fe2)
---
 target/linux/generic/config-6.6 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6
index 2ea1b79103..c8ebee7027 100644
--- a/target/linux/generic/config-6.6
+++ b/target/linux/generic/config-6.6
@@ -3052,6 +3052,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y
 # CONFIG_LEDS_INTEL_SS4200 is not set
 # CONFIG_LEDS_IS31FL319X is not set
 # CONFIG_LEDS_IS31FL32XX is not set
+# CONFIG_LEDS_KTD202X is not set
 # CONFIG_LEDS_LM3530 is not set
 # CONFIG_LEDS_LM3532 is not set
 # CONFIG_LEDS_LM355x is not set



From lede-commits at lists.infradead.org  Thu Jan  2 00:45:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 02 Jan 2025 03:45:35 -0500
Subject: [openwrt/openwrt]  realtek: drop extraneous ')' in 02_network
In-Reply-To: <173580753569.2705287.17507963211635938254@git-01.infra.openwrt.org>
References: <173580753569.2705287.17507963211635938254@git-01.infra.openwrt.org>
Message-ID: <mailman.29777.1735807540.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a3391d871d3f14f5de2081e23eda08986abc2b9b

commit a3391d871d3f14f5de2081e23eda08986abc2b9b
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Jan 2 09:31:44 2025 +0100

    realtek: drop extraneous ')' in 02_network
    
    The extraneous closing parenthesis inside the case matching breaks
    syntax of the network initialization script 02_network.
    
    /bin/board_detect: /etc/board.d/02_network:
        line 40: syntax error: unexpected newline (expecting ")")
    
    Remove this character so board init is functional again.
    
    Fixes: c8ea1aa970bf ("realtek: add support for HPE 1920-24G-PoE-370w")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/base-files/etc/board.d/02_network | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index a73944107a..12fb33d85e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -36,7 +36,7 @@ hpe,1920-8g-poe-65w|\
 hpe,1920-8g-poe-180w|\
 hpe,1920-16g|\
 hpe,1920-24g|\
-hpe,1920-24g-poe-370w|\)
+hpe,1920-24g-poe-370w|\
 hpe,1920-48g|\
 hpe,1920-48g-poe)
 	label_mac=$(mtd_get_mac_binary factory 0x68)



From lede-commits at lists.infradead.org  Thu Jan  2 00:46:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 02 Jan 2025 03:46:28 -0500
Subject: [openwrt/openwrt]  realtek: drop extraneous ')' in 02_network
In-Reply-To: <173580758856.2706569.6994199462330285746@git-01.infra.openwrt.org>
References: <173580758856.2706569.6994199462330285746@git-01.infra.openwrt.org>
Message-ID: <mailman.29778.1735807592.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d5f01971f728c6eb9ec7745c0040bd673c824add

commit d5f01971f728c6eb9ec7745c0040bd673c824add
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Jan 2 09:31:44 2025 +0100

    realtek: drop extraneous ')' in 02_network
    
    The extraneous closing parenthesis inside the case matching breaks
    syntax of the network initialization script 02_network.
    
    /bin/board_detect: /etc/board.d/02_network:
        line 40: syntax error: unexpected newline (expecting ")")
    
    Remove this character so board init is functional again.
    
    Fixes: c8ea1aa970bf ("realtek: add support for HPE 1920-24G-PoE-370w")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    (cherry picked from commit a3391d871d3f14f5de2081e23eda08986abc2b9b)
---
 target/linux/realtek/base-files/etc/board.d/02_network | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index a73944107a..12fb33d85e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -36,7 +36,7 @@ hpe,1920-8g-poe-65w|\
 hpe,1920-8g-poe-180w|\
 hpe,1920-16g|\
 hpe,1920-24g|\
-hpe,1920-24g-poe-370w|\)
+hpe,1920-24g-poe-370w|\
 hpe,1920-48g|\
 hpe,1920-48g-poe)
 	label_mac=$(mtd_get_mac_binary factory 0x68)



From lede-commits at lists.infradead.org  Thu Jan  2 06:01:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 02 Jan 2025 09:01:37 -0500
Subject: [openwrt/openwrt]  ubus: update to Git HEAD (2025-01-02)
In-Reply-To: <173582649774.3181637.180406949255069364@git-01.infra.openwrt.org>
References: <173582649774.3181637.180406949255069364@git-01.infra.openwrt.org>
Message-ID: <mailman.29982.1735826503.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f0df6e3a4a4996eca917fa17591b8f1d483dfa30

commit f0df6e3a4a4996eca917fa17591b8f1d483dfa30
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 2 14:08:36 2025 +0100

    ubus: update to Git HEAD (2025-01-02)
    
    d996988ae55b libubus: close file descriptor after sending it from a request
    afa57cce0aff libubus: add support for using channels
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/system/ubus/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile
index bef5e622d7..9a807852a2 100644
--- a/package/system/ubus/Makefile
+++ b/package/system/ubus/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git
-PKG_SOURCE_DATE:=2024-10-20
-PKG_SOURCE_VERSION:=252a9b0c1774790fb9c25735d5a09c27dba895db
-PKG_MIRROR_HASH:=72c21f02710d2314447670f1f1ea1833d2961f65fea3f9f94c060dda7c9d5914
+PKG_SOURCE_DATE:=2025-01-02
+PKG_SOURCE_VERSION:=afa57cce0aff82f4a7a0e509d4387ebc23dd3be7
+PKG_MIRROR_HASH:=a0b3c1961f5f49d31c34a44576ce44538c3ee97bfce97f86f732d7ecc1df9798
 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
 CMAKE_INSTALL:=1
 



From lede-commits at lists.infradead.org  Thu Jan  2 11:53:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 02 Jan 2025 14:53:21 -0500
Subject: [openwrt/openwrt]  strace: Update to version 6.12
In-Reply-To: <173584760176.3677124.15949568726277313751@git-01.infra.openwrt.org>
References: <173584760176.3677124.15949568726277313751@git-01.infra.openwrt.org>
Message-ID: <mailman.30146.1735847611.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/389dd8dcf6a21b608e6418ec48368f9615afa740

commit 389dd8dcf6a21b608e6418ec48368f9615afa740
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Thu Jan 2 00:47:14 2025 -0800

    strace: Update to version 6.12
    
    Release Notes:
    https://github.com/strace/strace/releases/tag/v6.12
    
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17457
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 package/devel/strace/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/devel/strace/Makefile b/package/devel/strace/Makefile
index f418bea5a7..892c05467e 100644
--- a/package/devel/strace/Makefile
+++ b/package/devel/strace/Makefile
@@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=strace
-PKG_VERSION:=6.11
+PKG_VERSION:=6.12
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=https://strace.io/files/$(PKG_VERSION)
-PKG_HASH:=83262583a3529f02c3501aa8b8ac772b4cbc03dc934e98bab6e4883626e283a5
+PKG_HASH:=c47da93be45b6055f4dc741d7f20efaf50ca10160a5b100c109b294fd9c0bdfe
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_LICENSE:=LGPL-2.1-or-later



From lede-commits at lists.infradead.org  Thu Jan  2 11:56:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 02 Jan 2025 14:56:52 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.69
In-Reply-To: <173584781244.3682250.8976950106976445882@git-01.infra.openwrt.org>
References: <173584781244.3682250.8976950106976445882@git-01.infra.openwrt.org>
Message-ID: <mailman.30149.1735847829.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/89b2356b8c2fd420b49bacaa865fb9bd24173ecc

commit 89b2356b8c2fd420b49bacaa865fb9bd24173ecc
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 2 06:34:15 2025 -0500

    kernel: bump 6.6 to 6.6.69
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.69
    
    All patches automatically rebased.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17459
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 include/kernel-6.6                                     |  4 ++--
 ...519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  8 ++++----
 ...v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch | 18 +++++++++---------
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index c2805b4540..6cee9d1e8c 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .68
-LINUX_KERNEL_HASH-6.6.68 = 283ff410e3f352ceed161ae30c0020301326059db03e86efcb384d46ac5840e2
+LINUX_VERSION-6.6 = .69
+LINUX_KERNEL_HASH-6.6.69 = 9c6305567b75d99514cde6eb9de39973f3d5c857a75bd9dcdfca57041f8d4f34
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index fe77f21211..551bfccc75 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -68,7 +68,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	select SOC_BRCMSTB if ARCH_BRCMSTB
 --- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
 +++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
-@@ -335,6 +335,36 @@ static void usb_init_common_7216(struct
+@@ -341,6 +341,36 @@ static void usb_init_common_7216(struct
  	usb_init_common(params);
  }
  
@@ -105,7 +105,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  static void usb_init_xhci(struct brcm_usb_init_params *params)
  {
  	pr_debug("%s\n", __func__);
-@@ -380,6 +410,18 @@ static void usb_uninit_common_7211b0(str
+@@ -386,6 +416,18 @@ static void usb_uninit_common_7211b0(str
  
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  static void usb_uninit_xhci(struct brcm_usb_init_params *params)
  {
  
-@@ -434,6 +476,16 @@ static const struct brcm_usb_init_ops bc
+@@ -440,6 +482,16 @@ static const struct brcm_usb_init_ops bc
  	.set_dual_select = usb_set_dual_select,
  };
  
@@ -141,7 +141,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
  {
  
-@@ -451,3 +503,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
+@@ -457,3 +509,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
  	params->family_name = "7211";
  	params->ops = &bcm7211b0_ops;
  }
diff --git a/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch b/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
index c399b768b0..984034125c 100644
--- a/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
+++ b/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
@@ -18,7 +18,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
 
 --- a/drivers/watchdog/mtk_wdt.c
 +++ b/drivers/watchdog/mtk_wdt.c
-@@ -58,9 +58,13 @@
+@@ -59,9 +59,13 @@
  #define WDT_SWSYSRST		0x18U
  #define WDT_SWSYS_RST_KEY	0x88000000
  
@@ -32,7 +32,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static bool nowayout = WATCHDOG_NOWAYOUT;
  static unsigned int timeout;
  
-@@ -71,10 +75,12 @@ struct mtk_wdt_dev {
+@@ -72,10 +76,12 @@ struct mtk_wdt_dev {
  	struct reset_controller_dev rcdev;
  	bool disable_wdt_extrst;
  	bool reset_by_toprgu;
@@ -45,7 +45,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  };
  
  static const struct mtk_wdt_data mt2712_data = {
-@@ -89,6 +95,11 @@ static const struct mtk_wdt_data mt7986_
+@@ -94,6 +100,11 @@ static const struct mtk_wdt_data mt7986_
  	.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
  };
  
@@ -57,7 +57,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static const struct mtk_wdt_data mt8183_data = {
  	.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
  };
-@@ -109,6 +120,28 @@ static const struct mtk_wdt_data mt8195_
+@@ -114,6 +125,28 @@ static const struct mtk_wdt_data mt8195_
  	.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
  };
  
@@ -86,7 +86,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static int toprgu_reset_update(struct reset_controller_dev *rcdev,
  			       unsigned long id, bool assert)
  {
-@@ -119,6 +152,9 @@ static int toprgu_reset_update(struct re
+@@ -124,6 +157,9 @@ static int toprgu_reset_update(struct re
  
  	spin_lock_irqsave(&data->lock, flags);
  
@@ -96,7 +96,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	tmp = readl(data->wdt_base + WDT_SWSYSRST);
  	if (assert)
  		tmp |= BIT(id);
-@@ -127,6 +163,9 @@ static int toprgu_reset_update(struct re
+@@ -132,6 +168,9 @@ static int toprgu_reset_update(struct re
  	tmp |= WDT_SWSYS_RST_KEY;
  	writel(tmp, data->wdt_base + WDT_SWSYSRST);
  
@@ -106,7 +106,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	spin_unlock_irqrestore(&data->lock, flags);
  
  	return 0;
-@@ -412,6 +451,8 @@ static int mtk_wdt_probe(struct platform
+@@ -417,6 +456,8 @@ static int mtk_wdt_probe(struct platform
  						       wdt_data->toprgu_sw_rst_num);
  		if (err)
  			return err;
@@ -115,8 +115,8 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	}
  
  	mtk_wdt->disable_wdt_extrst =
-@@ -450,6 +491,7 @@ static const struct of_device_id mtk_wdt
- 	{ .compatible = "mediatek,mt6589-wdt" },
+@@ -456,6 +497,7 @@ static const struct of_device_id mtk_wdt
+ 	{ .compatible = "mediatek,mt6735-wdt", .data = &mt6735_data },
  	{ .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data },
  	{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
 +	{ .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data },



From lede-commits at lists.infradead.org  Fri Jan  3 01:18:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 04:18:31 -0500
Subject: [openwrt/openwrt]  realtek: add 1920-24g-poe-180w to mac address
In-Reply-To: <173589591102.553213.10093088969954847499@git-01.infra.openwrt.org>
References: <173589591102.553213.10093088969954847499@git-01.infra.openwrt.org>
Message-ID: <mailman.30463.1735895915.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0b54029a6e96bb2ce484f316be3870cc2617de30

commit 0b54029a6e96bb2ce484f316be3870cc2617de30
Author: James Sweeney <code at swny.io>
AuthorDate: Thu Jan 2 08:06:09 2025 -0500

    realtek: add 1920-24g-poe-180w to mac address
    
    Add 1920-24g-poe-180w to the mac address retrieval part of 02_network to
    properly set the device's port MAC addresses.
    
    This piece was missed when this device was added.
    
    Fixes: b948c1e39b9e ("realtek: add support for HPE 1920-24G PoE-180W (JG925A)")
    Link: https://github.com/openwrt/openwrt/pull/17460
    Signed-off-by: James Sweeney <code at swny.io>
---
 target/linux/realtek/base-files/etc/board.d/02_network | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 12fb33d85e..1255ee8b9e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -36,6 +36,7 @@ hpe,1920-8g-poe-65w|\
 hpe,1920-8g-poe-180w|\
 hpe,1920-16g|\
 hpe,1920-24g|\
+hpe,1920-24g-poe-180w|\
 hpe,1920-24g-poe-370w|\
 hpe,1920-48g|\
 hpe,1920-48g-poe)



From lede-commits at lists.infradead.org  Fri Jan  3 01:19:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 04:19:21 -0500
Subject: [openwrt/openwrt]  realtek: add 1920-24g-poe-180w to mac address
In-Reply-To: <173589596179.554362.3250794353068204060@git-01.infra.openwrt.org>
References: <173589596179.554362.3250794353068204060@git-01.infra.openwrt.org>
Message-ID: <mailman.30464.1735895970.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/369d2f3bf998644136a16aa526351ddc36742c32

commit 369d2f3bf998644136a16aa526351ddc36742c32
Author: James Sweeney <code at swny.io>
AuthorDate: Thu Jan 2 08:06:09 2025 -0500

    realtek: add 1920-24g-poe-180w to mac address
    
    Add 1920-24g-poe-180w to the mac address retrieval part of 02_network to
    properly set the device's port MAC addresses.
    
    This piece was missed when this device was added.
    
    Fixes: b948c1e39b9e ("realtek: add support for HPE 1920-24G PoE-180W (JG925A)")
    Link: https://github.com/openwrt/openwrt/pull/17460
    Signed-off-by: James Sweeney <code at swny.io>
    (cherry picked from commit 0b54029a6e96bb2ce484f316be3870cc2617de30)
---
 target/linux/realtek/base-files/etc/board.d/02_network | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 12fb33d85e..1255ee8b9e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -36,6 +36,7 @@ hpe,1920-8g-poe-65w|\
 hpe,1920-8g-poe-180w|\
 hpe,1920-16g|\
 hpe,1920-24g|\
+hpe,1920-24g-poe-180w|\
 hpe,1920-24g-poe-370w|\
 hpe,1920-48g|\
 hpe,1920-48g-poe)



From lede-commits at lists.infradead.org  Fri Jan  3 02:06:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:06:34 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-03)
In-Reply-To: <173589879463.630531.5250549148384055632@git-01.infra.openwrt.org>
References: <173589879463.630531.5250549148384055632@git-01.infra.openwrt.org>
Message-ID: <mailman.30508.1735898799.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/65aff89f641f6adccac80ee73b02b99a904739d5

commit 65aff89f641f6adccac80ee73b02b99a904739d5
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 3 11:06:08 2025 +0100

    mt76: update to Git HEAD (2025-01-03)
    
    46715044ecd2 wifi: mt76: mt7996: implement driver specific get_txpower function
    959a2d40007f wifi: mt76: mt7996: initialize phy txpower
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index d7fd80d331..d603b6215f 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-12-30
-PKG_SOURCE_VERSION:=f8563589c72d93c35f9316c65de361061b785699
-PKG_MIRROR_HASH:=aba3906b44d7dc952add8786ab46a27512d04efbd3e6a7a40526707a2ff87445
+PKG_SOURCE_DATE:=2025-01-03
+PKG_SOURCE_VERSION:=959a2d40007f502d9465b8aede79e761f875abd3
+PKG_MIRROR_HASH:=a00a26a4685c053a639a95657804b09d0d4a1452744647871070beb6332b7c3a
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:32 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-03)
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30531.1735901913.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/85d1d03cab4068c7a36e9bc9a0aa9e0e93325657

commit 85d1d03cab4068c7a36e9bc9a0aa9e0e93325657
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 3 11:06:08 2025 +0100

    mt76: update to Git HEAD (2025-01-03)
    
    46715044ecd2 wifi: mt76: mt7996: implement driver specific get_txpower function
    959a2d40007f wifi: mt76: mt7996: initialize phy txpower
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 65aff89f641f6adccac80ee73b02b99a904739d5)
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index d7fd80d331..d603b6215f 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-12-30
-PKG_SOURCE_VERSION:=f8563589c72d93c35f9316c65de361061b785699
-PKG_MIRROR_HASH:=aba3906b44d7dc952add8786ab46a27512d04efbd3e6a7a40526707a2ff87445
+PKG_SOURCE_DATE:=2025-01-03
+PKG_SOURCE_VERSION:=959a2d40007f502d9465b8aede79e761f875abd3
+PKG_MIRROR_HASH:=a00a26a4685c053a639a95657804b09d0d4a1452744647871070beb6332b7c3a
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:31 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2024-12-30)
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30532.1735901914.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3ad92b68f1c51855069d9b3c63b1e76a109e8444

commit 3ad92b68f1c51855069d9b3c63b1e76a109e8444
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Dec 30 21:27:46 2024 +0100

    mt76: update to Git HEAD (2024-12-30)
    
    109114146f9c mt76: only enable tx worker after setting the channel
    5fe42ec88fd1 mt76: mt7915: ensure that only one sta entry is active per mac address
    1884f568ba02 wifi: mt76: do not add wcid entries to sta poll list during MCU reset
    71fa9124d107 wifi: mt76: mt7996: fix NULL pointer dereference in mt7996_mcu_sta_bfer_he
    eb85bb3fd5bf wifi: mt76: mt7915: fix eifs value on older chipsets
    83e4d4a82e65 wifi: mt76: introduce mt792x_config_mac_addr_list routine
    b47e20b440ae wifi: mt76: mt7925: fix NULL deref check in mt7925_change_vif_links
    3e3c484726f3 wifi: mt76: mt7925: fix wrong band_idx setting when enable sniffer mode
    3f1401a0f035 wifi: mt76: mt7925: fix get wrong chip cap from incorrect pointer
    eede99f524e8 wifi: mt76: mt7925: fix the invalid ip address for arp offload
    c99e4d51b340 wifi: mt76: mt7996: fix overflows seen when writing limit attributes
    af983b2543ed wifi: mt76: mt7915: fix overflows seen when writing limit attributes
    af494e2dcc94 wifi: mt76: mt7915: exclude tx backoff time from airtime
    6f6a1f7cb381 wifi: mt76: mt7996: exclude tx backoff time from airtime
    7f65b1b28b4c wifi: mt76: connac: Extend mt76_connac_mcu_uni_add_dev for MLO
    1b5e6abc2e7a wifi: mt76: mt7925: Fix incorrect MLD address in bss_mld_tlv for MLO support
    72b4688b3912 wifi: mt76: mt7925: Fix incorrect WCID assignment for MLO
    6bd2c044e67a wifi: mt76: mt7925: Fix incorrect WCID phy_idx assignment
    1c04e9693466 wifi: mt76: mt7925: fix wrong parameter for related cmd of chan info
    01e02947bdbf wifi: mt76: mt7925: Fix CNM Timeout with Single Active Link in MLO
    b90b1a1dc71b wifi: mt76: mt7925: Enhance mt7925_mac_link_bss_add to support MLO
    53ec7a551f17 wifi: mt76: Enhance mt7925_mac_link_sta_add to support MLO
    3c99ef40e0e7 wifi: mt76: mt7925: Update mt7925_mcu_sta_update for BC in ASSOC state
    285efc6afaec wifi: mt76: mt7925: Update mt792x_rx_get_wcid for per-link STA
    e5c0d1289e6c wifi: mt76: mt7925: Update mt7925_unassign_vif_chanctx for per-link BSS
    67dcd5c888c4 wifi: mt76: mt7925: Update secondary link PS flow
    fd4d6f87072f wifi: mt76: mt7925: Init secondary link PM state
    6d972b5b9d6a wifi: mt76: mt7925: Update mt7925_mcu_uni_[tx,rx]_ba for MLO
    3acc6cbb9556 wifi: mt76: mt7925: Cleanup MLO settings post-disconnection
    0aab0c61ce92 wifi: mt76: mt7925: Properly handle responses for commands with events
    15bead1b0041 wifi: mt76: do not hold queue lock during initial rx buffer alloc
    732044a949d5 wifi: mt76: mt7925: config the dwell time by firmware
    9ba311ec6afa wifi: mt76: mt7921: introduce CSA support
    5d12c7404c22 wifi: mt76: mt7921: add rfkill_poll for hardware rfkill
    ef965d408b79 wifi: mt76: mt7925: replace zero-length array with flexible-array member
    f8563589c72d wifi: mt76: mt7921u: Add VID/PID for TP-Link TXE50UH
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit bff5260d7b2f706f6d32acbb4fbe5f10d7acca5c)
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index b5cdc76572..d7fd80d331 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-10-28
-PKG_SOURCE_VERSION:=c246fa545119abe5097682316700f13c91399042
-PKG_MIRROR_HASH:=ff59d9588e6b114be8fe08013b55da975bc6bb4219b97b6fedb72246e9337c18
+PKG_SOURCE_DATE:=2024-12-30
+PKG_SOURCE_VERSION:=f8563589c72d93c35f9316c65de361061b785699
+PKG_MIRROR_HASH:=aba3906b44d7dc952add8786ab46a27512d04efbd3e6a7a40526707a2ff87445
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:29 -0500
Subject: [openwrt/openwrt]  mac80211: refresh patch for ath12k
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30533.1735901915.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/5330f620854731cb1c5d44043cfa444b4af78f87

commit 5330f620854731cb1c5d44043cfa444b4af78f87
Author: Georgi Valkov <gvalkov at gmail.com>
AuthorDate: Thu Dec 12 11:05:15 2024 +0200

    mac80211: refresh patch for ath12k
    
    refresh the following patch for ath12k
    001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
    
    Signed-off-by: Georgi Valkov <gvalkov at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17246
    Signed-off-by: John Crispin <john at phrozen.org>
    (cherry picked from commit fb17914f65a430555b908929682d8b36d6e31b12)
---
 ...pport-and-handle-country-code-for-WCN7850.patch | 40 +++++++++++-----------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch b/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
index d370db1047..f368ccd272 100644
--- a/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
+++ b/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
@@ -121,7 +121,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  };
  
  static __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
-@@ -2363,7 +2365,10 @@ int ath12k_wmi_send_scan_start_cmd(struc
+@@ -2364,7 +2366,10 @@ int ath12k_wmi_send_scan_start_cmd(struc
  	cmd->scan_id = cpu_to_le32(arg->scan_id);
  	cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
  	cmd->vdev_id = cpu_to_le32(arg->vdev_id);
@@ -133,7 +133,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
  
  	ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
-@@ -3083,6 +3088,110 @@ out:
+@@ -3084,6 +3089,110 @@ out:
  	return ret;
  }
  
@@ -244,7 +244,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  int
  ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
  {
-@@ -5668,6 +5777,50 @@ static void ath12k_wmi_op_ep_tx_credits(
+@@ -5669,6 +5778,50 @@ static void ath12k_wmi_op_ep_tx_credits(
  	wake_up(&ab->wmi_ab.tx_credits_wq);
  }
  
@@ -295,7 +295,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
  				       struct sk_buff *skb)
  {
-@@ -7269,6 +7422,9 @@ static void ath12k_wmi_op_rx(struct ath1
+@@ -7270,6 +7423,9 @@ static void ath12k_wmi_op_rx(struct ath1
  	case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  		ath12k_wmi_gtk_offload_status_event(ab, skb);
  		break;
@@ -307,7 +307,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
 --- a/drivers/net/wireless/ath/ath12k/wmi.h
 +++ b/drivers/net/wireless/ath/ath12k/wmi.h
-@@ -3859,6 +3859,28 @@ struct wmi_init_country_cmd {
+@@ -3860,6 +3860,28 @@ struct wmi_init_country_cmd {
  	} cc_info;
  } __packed;
  
@@ -336,7 +336,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  struct wmi_delba_send_cmd {
  	__le32 tlv_header;
  	__le32 vdev_id;
-@@ -3944,6 +3966,16 @@ struct ath12k_wmi_eht_rate_set_params {
+@@ -3945,6 +3967,16 @@ struct ath12k_wmi_eht_rate_set_params {
  #define MAX_6G_REG_RULES 5
  #define REG_US_5G_NUM_REG_RULES 4
  
@@ -353,7 +353,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  enum wmi_start_event_param {
  	WMI_VDEV_START_RESP_EVENT = 0,
  	WMI_VDEV_RESTART_RESP_EVENT,
-@@ -5546,11 +5578,17 @@ int ath12k_wmi_send_bcn_offload_control_
+@@ -5547,11 +5579,17 @@ int ath12k_wmi_send_bcn_offload_control_
  					    u32 vdev_id, u32 bcn_ctrl_op);
  int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
  				     struct ath12k_wmi_init_country_arg *arg);
@@ -485,7 +485,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		u32 fw_crash_counter;
 --- a/drivers/net/wireless/ath/ath12k/mac.c
 +++ b/drivers/net/wireless/ath/ath12k/mac.c
-@@ -2947,6 +2947,11 @@ static void ath12k_bss_assoc(struct ath1
+@@ -2946,6 +2946,11 @@ static void ath12k_bss_assoc(struct ath1
  	if (ret)
  		ath12k_warn(ar->ab, "failed to set vdev %i OBSS PD parameters: %d\n",
  			    arvif->vdev_id, ret);
@@ -497,7 +497,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  }
  
  static void ath12k_bss_disassoc(struct ath12k *ar,
-@@ -3522,7 +3527,7 @@ void __ath12k_mac_scan_finish(struct ath
+@@ -3521,7 +3526,7 @@ void __ath12k_mac_scan_finish(struct ath
  		ar->scan_channel = NULL;
  		ar->scan.roc_freq = 0;
  		cancel_delayed_work(&ar->scan.timeout);
@@ -506,7 +506,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	}
  }
-@@ -3783,7 +3788,12 @@ scan:
+@@ -3782,7 +3787,12 @@ scan:
  
  	ret = ath12k_start_scan(ar, &arg);
  	if (ret) {
@@ -520,7 +520,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		spin_lock_bh(&ar->data_lock);
  		ar->scan.state = ATH12K_SCAN_IDLE;
  		spin_unlock_bh(&ar->data_lock);
-@@ -3802,6 +3812,11 @@ exit:
+@@ -3801,6 +3811,11 @@ exit:
  
  	mutex_unlock(&ar->conf_mutex);
  
@@ -532,7 +532,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	return ret;
  }
  
-@@ -5986,7 +6001,7 @@ static int ath12k_mac_start(struct ath12
+@@ -5985,7 +6000,7 @@ static int ath12k_mac_start(struct ath12
  
  	/* TODO: Do we need to enable ANI? */
  
@@ -541,7 +541,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  
  	ar->num_started_vdevs = 0;
  	ar->num_created_vdevs = 0;
-@@ -6166,6 +6181,9 @@ static void ath12k_mac_stop(struct ath12
+@@ -6165,6 +6180,9 @@ static void ath12k_mac_stop(struct ath12
  	cancel_delayed_work_sync(&ar->scan.timeout);
  	cancel_work_sync(&ar->regd_update_work);
  	cancel_work_sync(&ar->ab->rfkill_work);
@@ -551,7 +551,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  
  	spin_lock_bh(&ar->data_lock);
  	list_for_each_entry_safe(ppdu_stats, tmp, &ar->ppdu_stats_info, list) {
-@@ -6412,6 +6430,117 @@ static void ath12k_mac_op_update_vif_off
+@@ -6411,6 +6429,117 @@ static void ath12k_mac_op_update_vif_off
  	ath12k_mac_update_vif_offload(arvif);
  }
  
@@ -669,7 +669,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  static int ath12k_mac_vdev_create(struct ath12k *ar, struct ieee80211_vif *vif)
  {
  	struct ath12k_hw *ah = ar->ah;
-@@ -6526,6 +6655,7 @@ static int ath12k_mac_vdev_create(struct
+@@ -6525,6 +6654,7 @@ static int ath12k_mac_vdev_create(struct
  				    arvif->vdev_id, ret);
  			goto err_peer_del;
  		}
@@ -677,7 +677,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	case WMI_VDEV_TYPE_STA:
  		param_id = WMI_STA_PS_PARAM_RX_WAKE_POLICY;
-@@ -6564,6 +6694,13 @@ static int ath12k_mac_vdev_create(struct
+@@ -6563,6 +6693,13 @@ static int ath12k_mac_vdev_create(struct
  				    arvif->vdev_id, ret);
  			goto err_peer_del;
  		}
@@ -691,7 +691,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	default:
  		break;
-@@ -6904,6 +7041,11 @@ static void ath12k_mac_op_remove_interfa
+@@ -6903,6 +7040,11 @@ static void ath12k_mac_op_remove_interfa
  	ath12k_dbg(ab, ATH12K_DBG_MAC, "mac remove interface (vdev %d)\n",
  		   arvif->vdev_id);
  
@@ -703,7 +703,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
  		ret = ath12k_peer_delete(ar, arvif->vdev_id, vif->addr);
  		if (ret)
-@@ -7744,6 +7886,14 @@ ath12k_mac_op_unassign_vif_chanctx(struc
+@@ -7743,6 +7885,14 @@ ath12k_mac_op_unassign_vif_chanctx(struc
  	    ar->num_started_vdevs == 1 && ar->monitor_vdev_created)
  		ath12k_mac_monitor_stop(ar);
  
@@ -718,7 +718,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	mutex_unlock(&ar->conf_mutex);
  }
  
-@@ -8282,6 +8432,14 @@ ath12k_mac_op_reconfig_complete(struct i
+@@ -8281,6 +8431,14 @@ ath12k_mac_op_reconfig_complete(struct i
  		ath12k_warn(ar->ab, "pdev %d successfully recovered\n",
  			    ar->pdev->pdev_id);
  
@@ -733,7 +733,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		if (ab->is_reset) {
  			recovery_count = atomic_inc_return(&ab->recovery_count);
  
-@@ -9331,6 +9489,9 @@ static void ath12k_mac_setup(struct ath1
+@@ -9330,6 +9488,9 @@ static void ath12k_mac_setup(struct ath1
  
  	INIT_WORK(&ar->wmi_mgmt_tx_work, ath12k_mgmt_over_wmi_tx_work);
  	skb_queue_head_init(&ar->wmi_mgmt_tx_queue);



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:34 -0500
Subject: [openwrt/openwrt]  build: fix including busybox,
 procd and apk/opkg in imagebuilder
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30536.1735901915.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f97e729f8c7b978f0b18986bcaa496e1be336778

commit f97e729f8c7b978f0b18986bcaa496e1be336778
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Nov 13 07:04:31 2024 +0100

    build: fix including busybox, procd and apk/opkg in imagebuilder
    
    Since the image builder pulls package lists from metadata directly,
    add procd and busybox as depdendencies to base-files.
    As for the package manager itself, since it can be disabled it needs
    to be added directly in the image builder makefile
    
    Fixes: 44598c233dd9 ("build: remove broken dependency of metadata on toplevel .config variables")
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 4c65359af49b6ccecd98987f842db5eba985f64b)
---
 package/base-files/Makefile        | 6 +++++-
 package/system/procd/Makefile      | 3 ---
 package/utils/busybox/Makefile     | 2 --
 target/imagebuilder/files/Makefile | 5 +++++
 4 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/package/base-files/Makefile b/package/base-files/Makefile
index 4bcb4882d7..7ac4ea557f 100644
--- a/package/base-files/Makefile
+++ b/package/base-files/Makefile
@@ -39,7 +39,11 @@ endif
 define Package/base-files
   SECTION:=base
   CATEGORY:=Base system
-  DEPENDS:=+netifd +libc +jsonfilter +SIGNED_PACKAGES:usign +SIGNED_PACKAGES:openwrt-keyring +NAND_SUPPORT:ubi-utils +fstools +fwtool
+  DEPENDS:= \
+	+netifd +libc +jsonfilter +SIGNED_PACKAGES:usign +SIGNED_PACKAGES:openwrt-keyring \
+	+NAND_SUPPORT:ubi-utils +fstools +fwtool \
+	+SELINUX:procd-selinux +!SELINUX:procd +SECCOMP:procd-seccomp \
+	+SELINUX:busybox-selinux +!SELINUX:busybox
   TITLE:=Base filesystem for OpenWrt
   URL:=http://openwrt.org/
   VERSION:=$(PKG_RELEASE)~$(lastword $(subst -, ,$(REVISION)))
diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index ec47047f4f..88467c2e59 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -50,7 +50,6 @@ define Package/procd
   $(call Package/procd/Default)
   VARIANT:=default
   CONFLICTS:=procd-selinux
-  DEFAULT:=y if !SELINUX
 endef
 
 define Package/procd-selinux
@@ -59,7 +58,6 @@ define Package/procd-selinux
   TITLE += with SELinux support
   PROVIDES:=procd
   VARIANT:=selinux
-  DEFAULT:=y if SELINUX
 endef
 
 define Package/procd-ujail
@@ -75,7 +73,6 @@ define Package/procd-seccomp
   CATEGORY:=Base system
   DEPENDS:=@SECCOMP +libubox +libblobmsg-json
   TITLE:=OpenWrt process seccomp helper + utrace
-  DEFAULT:=y if SECCOMP
 endef
 
 define Package/uxc
diff --git a/package/utils/busybox/Makefile b/package/utils/busybox/Makefile
index 4faa12b791..7d302bd159 100644
--- a/package/utils/busybox/Makefile
+++ b/package/utils/busybox/Makefile
@@ -56,7 +56,6 @@ define Package/busybox
   $(call Package/busybox/Default)
   CONFLICTS:=busybox-selinux
   VARIANT:=default
-  DEFAULT:=y if !SELINUX
 endef
 
 define Package/busybox-selinux
@@ -65,7 +64,6 @@ define Package/busybox-selinux
   DEPENDS += +libselinux
   VARIANT:=selinux
   PROVIDES:=busybox
-  DEFAULT:=y if SELINUX
 endef
 
 define Package/busybox/description
diff --git a/target/imagebuilder/files/Makefile b/target/imagebuilder/files/Makefile
index 54bc612840..811e8f14e5 100644
--- a/target/imagebuilder/files/Makefile
+++ b/target/imagebuilder/files/Makefile
@@ -138,6 +138,11 @@ _call_info: FORCE
 	echo 'Available Profiles:'
 	echo; $(PROFILE_LIST)
 
+ifneq ($(CONFIG_USE_APK),)
+  DEFAULT_PACKAGES += apk-mbedtls
+else
+  DEFAULT_PACKAGES += opkg
+endif
 BUILD_PACKAGES:=$(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel)
 # "-pkgname" in the package list means remove "pkgname" from the package list
 BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES))



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:35 -0500
Subject: [openwrt/openwrt]  imagebuilder: move handling of DEFAULT_PACKAGES
 into shareable place
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30537.1735901915.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c22410e7a9cdd409f7515416a1e4a3e094822b8c

commit c22410e7a9cdd409f7515416a1e4a3e094822b8c
Author: Petr ?tetiar <ynezz at true.cz>
AuthorDate: Sun Nov 17 05:13:27 2024 +0000

    imagebuilder: move handling of DEFAULT_PACKAGES into shareable place
    
    It seems, that handling of DEFAULT_PACKAGES is needed in more places, so
    lets move it into dedicated include file so it can be easily shared.
    
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
    Link: https://github.com/openwrt/openwrt/pull/16986
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 40be892a020e37869cdc188cd9a09bb7dc0a6872)
---
 include/default-packages.mk        | 5 +++++
 target/imagebuilder/files/Makefile | 1 +
 2 files changed, 6 insertions(+)

diff --git a/include/default-packages.mk b/include/default-packages.mk
new file mode 100644
index 0000000000..c964e92a03
--- /dev/null
+++ b/include/default-packages.mk
@@ -0,0 +1,5 @@
+ifneq ($(CONFIG_USE_APK),)
+  DEFAULT_PACKAGES += apk-mbedtls
+else
+  DEFAULT_PACKAGES += opkg
+endif
diff --git a/target/imagebuilder/files/Makefile b/target/imagebuilder/files/Makefile
index 811e8f14e5..e9e08fb276 100644
--- a/target/imagebuilder/files/Makefile
+++ b/target/imagebuilder/files/Makefile
@@ -26,6 +26,7 @@ include $(INCLUDE_DIR)/debug.mk
 include $(INCLUDE_DIR)/depends.mk
 include $(INCLUDE_DIR)/rootfs.mk
 
+include $(INCLUDE_DIR)/default-packages.mk
 include $(INCLUDE_DIR)/version.mk
 export REVISION
 export SOURCE_DATE_EPOCH



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:36 -0500
Subject: [openwrt/openwrt]  linux: fix missing default packages in
 profiles.json
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30538.1735901915.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/19db092082e676e8193a5bbe77f2bb62853fd8f3

commit 19db092082e676e8193a5bbe77f2bb62853fd8f3
Author: Petr ?tetiar <ynezz at true.cz>
AuthorDate: Sun Nov 17 05:15:13 2024 +0000

    linux: fix missing default packages in profiles.json
    
    Robert reported, that in firmware images generated by ASU, there is
    `apk` package manager missing after the commit 44598c233dd9 ("build:
    remove broken dependency of metadata on toplevel .config variables").
    
    That is happening, because apk got removed from `default_packages` list in
    `profiles.json`, which is being generated by `json_overview_image_info` Make
    target, which uses `scripts/json_overview_image_info.py` helper script,
    which gets the information from `DEFAULT_PACKAGES` Make variable.
    
    So lets fix it by providing `DEFAULT_PACKAGES` variable when its needed.
    
    The reason why we didn't added those packages as a dependency to
    base-files like any other packages, was to allow disabling them (in
    order to save space).
    
    Fixes: #16969
    Fixes: openwrt/asu/issues/1084
    Fixes: 44598c233dd9 ("build: remove broken dependency of metadata on toplevel .config variables")
    Reported-by: Robert Marko <robimarko at gmail.com>
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
    Link: https://github.com/openwrt/openwrt/pull/16986
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 90f0be8521a8608b0932c1ccb747c0ef1a085910)
---
 target/linux/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/Makefile b/target/linux/Makefile
index eaf3198222..f1e20abf04 100644
--- a/target/linux/Makefile
+++ b/target/linux/Makefile
@@ -4,6 +4,7 @@
 
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/target.mk
+include $(INCLUDE_DIR)/default-packages.mk
 
 export TARGET_BUILD=1
 



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:33 -0500
Subject: [openwrt/openwrt]  build: remove broken dependency of metadata on
 toplevel .config variables
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30539.1735901915.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/83afb428b089aa46e05744935aa25358a67a8b23

commit 83afb428b089aa46e05744935aa25358a67a8b23
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Nov 11 19:52:14 2024 +0100

    build: remove broken dependency of metadata on toplevel .config variables
    
    Instead of relying on .config symbols for metadata, alter the DEFAULT
    variable of affected packages. Fixes enabling opkg vs apk among others.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 44598c233dd9a676bc34666968f33f8b9ff4dd0c)
---
 include/target.mk              | 40 ++--------------------------------------
 package/system/apk/Makefile    |  1 +
 package/system/opkg/Makefile   |  1 +
 package/system/procd/Makefile  |  3 +++
 package/utils/busybox/Makefile |  2 ++
 5 files changed, 9 insertions(+), 38 deletions(-)

diff --git a/include/target.mk b/include/target.mk
index 0108bced99..02ea68b15c 100644
--- a/include/target.mk
+++ b/include/target.mk
@@ -90,45 +90,9 @@ else
   endif
 endif
 
-ifneq ($(DUMP),)
-  # Parse generic config that might be set before a .config is generated to modify the
-  # default package configuration
-  # Keep DYNAMIC_DEF_PKG_CONF in sync with toplevel.mk to reflect the same configs
-  DYNAMIC_DEF_PKG_CONF := CONFIG_USE_APK CONFIG_SELINUX CONFIG_SMALL_FLASH CONFIG_SECCOMP
-  $(foreach config, $(DYNAMIC_DEF_PKG_CONF), \
-    $(eval $(config) := $(shell grep "$(config)=y" $(TOPDIR)/.config 2>/dev/null)) \
-  )
-  # The config options that are enabled by default and where other default
-  # packages depends on needs to be set if they are missing in the .config.
-  ifeq ($(shell grep "CONFIG_SECCOMP" $(TOPDIR)/.config 2>/dev/null),)
-    ifeq ($(filter $(BOARD), uml),)
-    ifneq ($(filter $(ARCH), aarch64 arm armeb mips mipsel mips64 mips64el i386 powerpc x86_64),)
-      CONFIG_SECCOMP := y
-    endif
-    endif
-  endif
-endif
-
-ifneq ($(CONFIG_USE_APK),)
-DEFAULT_PACKAGES+=apk-mbedtls
-else
-DEFAULT_PACKAGES+=opkg
-endif
-
-ifneq ($(CONFIG_SELINUX),)
-DEFAULT_PACKAGES+=busybox-selinux procd-selinux
-else
-DEFAULT_PACKAGES+=busybox procd
-endif
-
 # include ujail on systems with enough storage
-ifeq ($(CONFIG_SMALL_FLASH),)
-DEFAULT_PACKAGES+=procd-ujail
-endif
-
-# include seccomp ld-preload hooks if kernel supports it
-ifneq ($(CONFIG_SECCOMP),)
-DEFAULT_PACKAGES+=procd-seccomp
+ifeq ($(filter small_flash,$(FEATURES)),)
+  DEFAULT_PACKAGES+=procd-ujail
 endif
 
 # Add device specific packages (here below to allow device type set from subtarget)
diff --git a/package/system/apk/Makefile b/package/system/apk/Makefile
index 8242e12ee9..7176d64ef2 100644
--- a/package/system/apk/Makefile
+++ b/package/system/apk/Makefile
@@ -36,6 +36,7 @@ define Package/apk-mbedtls
   $(Package/apk/default)
   TITLE += (mbedtls)
   DEPENDS +=+libmbedtls
+  DEFAULT:=y if USE_APK
   VARIANT:=mbedtls
   DEFAULT_VARIANT:=1
   CONFLICTS:=apk-openssl
diff --git a/package/system/opkg/Makefile b/package/system/opkg/Makefile
index 9fea969ae9..e7c45e3523 100644
--- a/package/system/opkg/Makefile
+++ b/package/system/opkg/Makefile
@@ -39,6 +39,7 @@ define Package/opkg
   CATEGORY:=Base system
   TITLE:=opkg package manager
   DEPENDS:=+uclient-fetch +libpthread +libubox
+  DEFAULT:=y if !USE_APK
   URL:=$(PKG_SOURCE_URL)
   MENU:=1
 endef
diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index 88467c2e59..ec47047f4f 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -50,6 +50,7 @@ define Package/procd
   $(call Package/procd/Default)
   VARIANT:=default
   CONFLICTS:=procd-selinux
+  DEFAULT:=y if !SELINUX
 endef
 
 define Package/procd-selinux
@@ -58,6 +59,7 @@ define Package/procd-selinux
   TITLE += with SELinux support
   PROVIDES:=procd
   VARIANT:=selinux
+  DEFAULT:=y if SELINUX
 endef
 
 define Package/procd-ujail
@@ -73,6 +75,7 @@ define Package/procd-seccomp
   CATEGORY:=Base system
   DEPENDS:=@SECCOMP +libubox +libblobmsg-json
   TITLE:=OpenWrt process seccomp helper + utrace
+  DEFAULT:=y if SECCOMP
 endef
 
 define Package/uxc
diff --git a/package/utils/busybox/Makefile b/package/utils/busybox/Makefile
index 7d302bd159..4faa12b791 100644
--- a/package/utils/busybox/Makefile
+++ b/package/utils/busybox/Makefile
@@ -56,6 +56,7 @@ define Package/busybox
   $(call Package/busybox/Default)
   CONFLICTS:=busybox-selinux
   VARIANT:=default
+  DEFAULT:=y if !SELINUX
 endef
 
 define Package/busybox-selinux
@@ -64,6 +65,7 @@ define Package/busybox-selinux
   DEPENDS += +libselinux
   VARIANT:=selinux
   PROVIDES:=busybox
+  DEFAULT:=y if SELINUX
 endef
 
 define Package/busybox/description



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:37 -0500
Subject: [openwrt/openwrt]  build: remove targetinfo invalidation based on
 .config
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30540.1735901918.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/933ae0699ae61b1e841c08ffe41aa7eea0ca673d

commit 933ae0699ae61b1e841c08ffe41aa7eea0ca673d
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Dec 2 12:27:35 2024 +0100

    build: remove targetinfo invalidation based on .config
    
    Target info no longer depends on config settings
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 3b661cfcf9158a3dc5be6f7e1e1340339c9423b5)
---
 include/toplevel.mk | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/include/toplevel.mk b/include/toplevel.mk
index e5f5e0fecd..092dff786c 100644
--- a/include/toplevel.mk
+++ b/include/toplevel.mk
@@ -75,22 +75,7 @@ endif
 
 _ignore = $(foreach p,$(IGNORE_PACKAGES),--ignore $(p))
 
-# Config that will invalidate the .targetinfo as they will affect
-# DEFAULT_PACKAGES.
-# Keep DYNAMIC_DEF_PKG_CONF in sync with target.mk to reflect the same configs
-DYNAMIC_DEF_PKG_CONF := CONFIG_USE_APK CONFIG_SELINUX CONFIG_SMALL_FLASH CONFIG_SECCOMP
-check-dynamic-def-pkg: FORCE
-	@+DEF_PKG_CONFS=""; \
-	if [ -f $(TOPDIR)/.config ]; then \
-		for config in $(DYNAMIC_DEF_PKG_CONF); do \
-			DEF_PKG_CONFS="$$DEF_PKG_CONFS "$$(grep "$$config"=y $(TOPDIR)/.config); \
-		done; \
-	fi; \
-	[ ! -f tmp/.packagedynamicdefault ] || OLD_DEF_PKG_CONFS=$$(cat tmp/.packagedynamicdefault); \
-	[ "$$DEF_PKG_CONFS" = "$$OLD_DEF_PKG_CONFS" ] || rm -rf tmp/info/.targetinfo*; \
-	mkdir -p tmp && echo "$$DEF_PKG_CONFS" > tmp/.packagedynamicdefault;
-
-prepare-tmpinfo: check-dynamic-def-pkg FORCE
+prepare-tmpinfo: FORCE
 	@+$(MAKE) -r -s $(STAGING_DIR_HOST)/.prereq-build $(PREP_MK)
 	mkdir -p tmp/info feeds
 	[ -e $(TOPDIR)/feeds/base ] || ln -sf $(TOPDIR)/package $(TOPDIR)/feeds/base



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:38 -0500
Subject: [openwrt/openwrt]  config: rename SECCOMP to USE_SECCOMP
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30543.1735901918.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/184d1c93cbe47e70c8bb4b01ddf7dc9152a58e23

commit 184d1c93cbe47e70c8bb4b01ddf7dc9152a58e23
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Sat Nov 23 14:29:49 2024 +0100

    config: rename SECCOMP to USE_SECCOMP
    
    It seems that we have some kind of a symbol name conflict which causes
    CONFIG_SECCOMP to always be read as y.
    
    Unfortunatelly, I could not figure out what is causing this, but simply
    renaming SECCOMP to USE_SECCOMP seems to properly work and leaves the
    symbol unset unless arch dependencies are satisfied.
    
    This fixes qoriq and others that dont support seccomp from failing due
    to procd-seccomp package being selected to get included but it cannot be
    built for them:
    ERROR: unable to select packages:
      procd-seccomp (no such package):
        required by: base-files-1637~52b6c92479[procd-seccomp]
    
    Fixes: 4c65359af49b ("build: fix including busybox, procd and apk/opkg in imagebuilder")
    Link: https://github.com/openwrt/openwrt/pull/17048
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit a48ec449ccab0069e84a72837bf06ba543e53aec)
---
 config/Config-build.in        | 2 +-
 package/base-files/Makefile   | 2 +-
 package/system/procd/Makefile | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/Config-build.in b/config/Config-build.in
index ae44985546..08acae63d3 100644
--- a/config/Config-build.in
+++ b/config/Config-build.in
@@ -423,7 +423,7 @@ menu "Global build settings"
 
 	endchoice
 
-	config SECCOMP
+	config USE_SECCOMP
 		bool "Enable SECCOMP"
 		select KERNEL_SECCOMP
 		select PACKAGE_procd-seccomp
diff --git a/package/base-files/Makefile b/package/base-files/Makefile
index 7ac4ea557f..c78c073699 100644
--- a/package/base-files/Makefile
+++ b/package/base-files/Makefile
@@ -42,7 +42,7 @@ define Package/base-files
   DEPENDS:= \
 	+netifd +libc +jsonfilter +SIGNED_PACKAGES:usign +SIGNED_PACKAGES:openwrt-keyring \
 	+NAND_SUPPORT:ubi-utils +fstools +fwtool \
-	+SELINUX:procd-selinux +!SELINUX:procd +SECCOMP:procd-seccomp \
+	+SELINUX:procd-selinux +!SELINUX:procd +USE_SECCOMP:procd-seccomp \
 	+SELINUX:busybox-selinux +!SELINUX:busybox
   TITLE:=Base filesystem for OpenWrt
   URL:=http://openwrt.org/
diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index 88467c2e59..7a2276a46d 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -71,7 +71,7 @@ endef
 define Package/procd-seccomp
   SECTION:=base
   CATEGORY:=Base system
-  DEPENDS:=@SECCOMP +libubox +libblobmsg-json
+  DEPENDS:=@USE_SECCOMP +libubox +libblobmsg-json
   TITLE:=OpenWrt process seccomp helper + utrace
 endef
 



From lede-commits at lists.infradead.org  Fri Jan  3 02:58:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 05:58:30 -0500
Subject: [openwrt/openwrt]  mac80211: update to version 6.12.6
In-Reply-To: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
References: <173590190982.713377.11649856231172750005@git-01.infra.openwrt.org>
Message-ID: <mailman.30544.1735901925.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3bd2962c3d487227e3435b2cdadda5e917361a3c

commit 3bd2962c3d487227e3435b2cdadda5e917361a3c
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Dec 26 09:41:22 2024 +0100

    mac80211: update to version 6.12.6
    
    - drop patches accepted upstream
    - include build fixes in the tarball
    - based on https://github.com/nbd168/backports commit 410656ef04d2
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit a85059438f2caed0d01a87fce9b8bd5bed134bb2)
---
 package/kernel/mac80211/Makefile                   |   4 +-
 .../431-add_platform_eeprom_support_to_ath5k.patch |   6 +-
 ...pport-and-handle-country-code-for-WCN7850.patch |  56 +--
 .../patches/ath5k/432-ath5k_add_pciids.patch       |  11 -
 ...k-interpret-requested-txpower-in-EIRP-dom.patch |   4 +-
 ...t-tx-power-reduction-for-US-regulatory-do.patch |   2 +-
 ...c-add-in-driver-tables-with-country-codes.patch |   4 +-
 .../build/070-remove-broken-wext-select.patch      |  10 -
 .../patches/build/120-headers_version_fix.patch    |  14 -
 .../patches/build/140-trace_backport.patch         |  18 +-
 .../build/210-wireless_netns_local_backport.patch  |  44 ++
 ...atch => 220-brcmfmac_usb_driver_backport.patch} |   0
 ...0-fix-init_vqs-build-error-on-kernel-6.6.patch} |   0
 ...ticast_allns-build-error-on-kernel-6.6.59.patch | 169 --------
 .../mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch |   2 +-
 ...ex-increase-the-global-limit-up-to-4-SSID.patch |   2 +-
 .../mwl/940-mwl8k_init_devices_synchronously.patch |   4 +-
 ...nt-stringified-name-of-command-in-error-l.patch |  10 +-
 ...-wifi-rtw88-Set-efuse-ext_lna_5g-fix-typo.patch |  30 --
 ...usb-Support-USB-3-with-RTL8822CU-RTL8822B.patch | 284 -------------
 ...debugfs-support-multiple-adapters-debuggi.patch | 454 ---------------------
 ...v6.12-wifi-rtw88-select-WANT_DEV_COREDUMP.patch |  25 --
 ...8822c-Parse-channel-from-IE-to-correct-in.patch | 151 -------
 ...usb-Init-RX-burst-length-according-to-USB.patch |  73 ----
 ...usb-Update-the-RX-stats-after-every-frame.patch |  31 --
 ....12-wifi-rtw88-usb-Support-RX-aggregation.patch | 118 ------
 ...Enable-USB-RX-aggregation-for-8822c-8822b.patch | 168 --------
 ...assign-mac_id-for-vif-sta-and-update-to-T.patch | 231 -----------
 ...Parse-the-RX-descriptor-with-a-single-fun.patch |   2 +-
 ...tw88-Fix-the-RX-aggregation-in-USB-3-mode.patch |  70 ----
 ...Enable-data-rate-fallback-for-older-chips.patch |   4 +-
 ...usb-Set-pkt_info.ls-for-the-reserved-page.patch |   2 +-
 ...fi-rtw88-usb-Support-USB-3-with-RTL8812AU.patch |   6 +-
 ...usb-Enable-RX-aggregation-for-8821au-8812.patch |   4 +-
 .../patches/subsys/130-disable_auto_vif.patch      |   2 +-
 .../patches/subsys/220-allow-ibss-mixed.patch      |   2 +-
 ...low-grace-period-for-DFS-available-after-.patch |   6 +-
 ...211-add-AQL-support-for-broadcast-packets.patch |   2 +-
 ...11-do-not-pass-a-stopped-vif-to-the-drive.patch |  24 --
 ...g80211-add-option-for-vif-allowed-radios.patch} |  12 +-
 ...11-introduce-EHT-rate-support-in-AQL-airt.patch | 233 -----------
 ...11-check-radio-iface-combination-for-mult.patch | 122 ------
 ...1-use-vif-radio-mask-to-limit-ibss-scan-.patch} |   8 +-
 ...211-Set-correct-chandef-when-starting-CAC.patch |  64 ---
 ...1-use-vif-radio-mask-to-limit-chanctx-an.patch} |   8 +-
 ...-mac80211-move-radar-detect-work-to-sdata.patch | 136 ------
 ...c80211-remove-status-ampdu_delimiter_crc.patch} |   0
 ...-pass-net_device-to-.set_monitor_channel.patch} |   2 +-
 ...11-remove-label-usage-in-ieee80211_start_.patch |  50 ---
 ...1-add-flag-to-opt-out-of-virtual-monitor.patch} |  24 +-
 ...unlink-rdev_end_cac-trace-event-from-wiph.patch |  42 --
 ...6-wifi-cfg80211-add-monitor-SKIP_TX-flag.patch} |   0
 ...11-move-DFS-related-members-to-links-in-w.patch | 309 --------------
 .../337-wifi-cfg80211-handle-DFS-per-link.patch    | 435 --------------------
 ...1-add-support-for-the-monitor-SKIP_TX-fl.patch} |   2 +-
 .../338-wifi-mac80211-handle-DFS-per-link.patch    | 134 ------
 ...i-mac80211-refactor-ieee80211_rx_monitor.patch} |   0
 ...80211-mac80211-use-proper-link-ID-for-DFS.patch | 168 --------
 ...1-filter-on-monitor-interfaces-based-on-.patch} |   0
 ...0211-report-per-wiphy-radio-antenna-mask.patch} |   0
 ...11-handle-ieee80211_radar_detected-for-ML.patch | 360 ----------------
 ...1-fix-vif-addr-when-switching-from-monit.patch} |   0
 ...11-skip-non-uploaded-keys-in-ieee80211_it.patch |  79 ----
 ...11-fix-incorrect-timing-to-initialize-sta.patch |  32 --
 ...11-ieee80211_i-Fix-memory-corruption-bug-.patch |  53 ---
 ...211-fix-user-power-when-emulating-chanctx.patch |  24 --
 ...i-cfg80211-Add-wiphy_delayed_work_pending.patch |  83 ----
 ...11-Convert-color-collision-detection-to-w.patch | 148 -------
 68 files changed, 143 insertions(+), 4434 deletions(-)

diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile
index 22cd0e97b4..f924d34684 100644
--- a/package/kernel/mac80211/Makefile
+++ b/package/kernel/mac80211/Makefile
@@ -10,13 +10,13 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=6.11.2
+PKG_VERSION:=6.12.6
 PKG_RELEASE:=1
 PKG_LICENSE:=GPL-2.0-only
 PKG_LICENSE_FILES:=COPYING
 
 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/
-PKG_HASH:=700ea5abef8dde9e3c6df2acd32ff443da735d773d56db9a80269e2237549b34
+PKG_HASH:=28ec39425a1b3270e1422d92a8131a6a3d8919cc13e8ee250c315e55d922ba68
 
 PKG_SOURCE:=backports-$(PKG_VERSION).tar.xz
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(if $(BUILD_VARIANT),$(PKG_NAME)-$(BUILD_VARIANT)/)backports-$(PKG_VERSION)
diff --git a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
index c762aa6d64..abadadf856 100644
--- a/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
+++ b/package/kernel/mac80211/patches/ath/431-add_platform_eeprom_support_to_ath5k.patch
@@ -8,7 +8,7 @@
  #include "../ath.h"
  #include "ath5k.h"
  #include "debug.h"
-@@ -71,7 +72,7 @@ static void ath5k_pci_read_cachesize(str
+@@ -73,7 +74,7 @@ static void ath5k_pci_read_cachesize(str
  }
  
  /*
@@ -17,7 +17,7 @@
   */
  static bool
  ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
-@@ -79,6 +80,19 @@ ath5k_pci_eeprom_read(struct ath_common
+@@ -81,6 +82,19 @@ ath5k_pci_eeprom_read(struct ath_common
  	struct ath5k_hw *ah = common->ah;
  	u32 status, timeout;
  
@@ -37,7 +37,7 @@
  	/*
  	 * Initialize EEPROM access
  	 */
-@@ -122,6 +136,16 @@ static int ath5k_pci_eeprom_read_mac(str
+@@ -124,6 +138,16 @@ static int ath5k_pci_eeprom_read_mac(str
  	u16 data;
  	int octet;
  
diff --git a/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch b/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
index f368ccd272..caa4e20f97 100644
--- a/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
+++ b/package/kernel/mac80211/patches/ath12k/001-wifi-ath12k-add-11d-scan-offload-support-and-handle-country-code-for-WCN7850.patch
@@ -451,7 +451,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  enum ath12k_dev_flags {
  	ATH12K_CAC_RUNNING,
  	ATH12K_FLAG_CRASH_FLUSH,
-@@ -313,6 +319,8 @@ struct ath12k_vif_iter {
+@@ -319,6 +325,8 @@ struct ath12k_vif_iter {
  #define ATH12K_RX_RATE_TABLE_11AX_NUM	576
  #define ATH12K_RX_RATE_TABLE_NUM 320
  
@@ -460,7 +460,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  struct ath12k_rx_peer_rate_stats {
  	u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1];
  	u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1];
-@@ -648,6 +656,13 @@ struct ath12k {
+@@ -654,6 +662,13 @@ struct ath12k {
  	u32 freq_low;
  	u32 freq_high;
  
@@ -474,7 +474,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	bool nlo_enabled;
  };
  
-@@ -880,6 +895,8 @@ struct ath12k_base {
+@@ -886,6 +901,8 @@ struct ath12k_base {
  	/* continuous recovery fail count */
  	atomic_t fail_cont_count;
  	unsigned long reset_fail_timeout;
@@ -485,7 +485,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		u32 fw_crash_counter;
 --- a/drivers/net/wireless/ath/ath12k/mac.c
 +++ b/drivers/net/wireless/ath/ath12k/mac.c
-@@ -2946,6 +2946,11 @@ static void ath12k_bss_assoc(struct ath1
+@@ -2949,6 +2949,11 @@ static void ath12k_bss_assoc(struct ath1
  	if (ret)
  		ath12k_warn(ar->ab, "failed to set vdev %i OBSS PD parameters: %d\n",
  			    arvif->vdev_id, ret);
@@ -497,7 +497,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  }
  
  static void ath12k_bss_disassoc(struct ath12k *ar,
-@@ -3521,7 +3526,7 @@ void __ath12k_mac_scan_finish(struct ath
+@@ -3524,7 +3529,7 @@ void __ath12k_mac_scan_finish(struct ath
  		ar->scan_channel = NULL;
  		ar->scan.roc_freq = 0;
  		cancel_delayed_work(&ar->scan.timeout);
@@ -506,9 +506,9 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	}
  }
-@@ -3782,7 +3787,12 @@ scan:
+@@ -3790,7 +3795,12 @@ scan:
  
- 	ret = ath12k_start_scan(ar, &arg);
+ 	ret = ath12k_start_scan(ar, arg);
  	if (ret) {
 -		ath12k_warn(ar->ab, "failed to start hw scan: %d\n", ret);
 +		if (ret == -EBUSY)
@@ -520,7 +520,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		spin_lock_bh(&ar->data_lock);
  		ar->scan.state = ATH12K_SCAN_IDLE;
  		spin_unlock_bh(&ar->data_lock);
-@@ -3801,6 +3811,11 @@ exit:
+@@ -3810,6 +3820,11 @@ exit:
  
  	mutex_unlock(&ar->conf_mutex);
  
@@ -532,7 +532,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	return ret;
  }
  
-@@ -5985,7 +6000,7 @@ static int ath12k_mac_start(struct ath12
+@@ -5994,7 +6009,7 @@ static int ath12k_mac_start(struct ath12
  
  	/* TODO: Do we need to enable ANI? */
  
@@ -541,7 +541,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  
  	ar->num_started_vdevs = 0;
  	ar->num_created_vdevs = 0;
-@@ -6165,6 +6180,9 @@ static void ath12k_mac_stop(struct ath12
+@@ -6174,6 +6189,9 @@ static void ath12k_mac_stop(struct ath12
  	cancel_delayed_work_sync(&ar->scan.timeout);
  	cancel_work_sync(&ar->regd_update_work);
  	cancel_work_sync(&ar->ab->rfkill_work);
@@ -551,7 +551,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  
  	spin_lock_bh(&ar->data_lock);
  	list_for_each_entry_safe(ppdu_stats, tmp, &ar->ppdu_stats_info, list) {
-@@ -6411,6 +6429,117 @@ static void ath12k_mac_op_update_vif_off
+@@ -6420,6 +6438,117 @@ static void ath12k_mac_op_update_vif_off
  	ath12k_mac_update_vif_offload(arvif);
  }
  
@@ -669,7 +669,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  static int ath12k_mac_vdev_create(struct ath12k *ar, struct ieee80211_vif *vif)
  {
  	struct ath12k_hw *ah = ar->ah;
-@@ -6525,6 +6654,7 @@ static int ath12k_mac_vdev_create(struct
+@@ -6534,6 +6663,7 @@ static int ath12k_mac_vdev_create(struct
  				    arvif->vdev_id, ret);
  			goto err_peer_del;
  		}
@@ -677,7 +677,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	case WMI_VDEV_TYPE_STA:
  		param_id = WMI_STA_PS_PARAM_RX_WAKE_POLICY;
-@@ -6563,6 +6693,13 @@ static int ath12k_mac_vdev_create(struct
+@@ -6572,6 +6702,13 @@ static int ath12k_mac_vdev_create(struct
  				    arvif->vdev_id, ret);
  			goto err_peer_del;
  		}
@@ -691,7 +691,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		break;
  	default:
  		break;
-@@ -6903,6 +7040,11 @@ static void ath12k_mac_op_remove_interfa
+@@ -6912,6 +7049,11 @@ static void ath12k_mac_op_remove_interfa
  	ath12k_dbg(ab, ATH12K_DBG_MAC, "mac remove interface (vdev %d)\n",
  		   arvif->vdev_id);
  
@@ -703,7 +703,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	if (arvif->vdev_type == WMI_VDEV_TYPE_AP) {
  		ret = ath12k_peer_delete(ar, arvif->vdev_id, vif->addr);
  		if (ret)
-@@ -7743,6 +7885,14 @@ ath12k_mac_op_unassign_vif_chanctx(struc
+@@ -7752,6 +7894,14 @@ ath12k_mac_op_unassign_vif_chanctx(struc
  	    ar->num_started_vdevs == 1 && ar->monitor_vdev_created)
  		ath12k_mac_monitor_stop(ar);
  
@@ -718,7 +718,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  	mutex_unlock(&ar->conf_mutex);
  }
  
-@@ -8281,6 +8431,14 @@ ath12k_mac_op_reconfig_complete(struct i
+@@ -8290,6 +8440,14 @@ ath12k_mac_op_reconfig_complete(struct i
  		ath12k_warn(ar->ab, "pdev %d successfully recovered\n",
  			    ar->pdev->pdev_id);
  
@@ -733,7 +733,7 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  		if (ab->is_reset) {
  			recovery_count = atomic_inc_return(&ab->recovery_count);
  
-@@ -9330,6 +9488,9 @@ static void ath12k_mac_setup(struct ath1
+@@ -9339,6 +9497,9 @@ static void ath12k_mac_setup(struct ath1
  
  	INIT_WORK(&ar->wmi_mgmt_tx_work, ath12k_mgmt_over_wmi_tx_work);
  	skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
@@ -888,36 +888,36 @@ Acked-by: Jeff Johnson <quic_jjohnson at quicinc.com>
  #endif
 --- a/drivers/net/wireless/ath/ath12k/hw.c
 +++ b/drivers/net/wireless/ath/ath12k/hw.c
-@@ -926,6 +926,7 @@ static const struct ath12k_hw_params ath
- 		.supports_dynamic_smps_6ghz = true,
- 
+@@ -928,6 +928,7 @@ static const struct ath12k_hw_params ath
  		.iova_mask = 0,
+ 
+ 		.supports_aspm = false,
 +		.current_cc_support = false,
  	},
  	{
  		.name = "wcn7850 hw2.0",
-@@ -1004,6 +1005,7 @@ static const struct ath12k_hw_params ath
- 		.supports_dynamic_smps_6ghz = false,
- 
+@@ -1008,6 +1009,7 @@ static const struct ath12k_hw_params ath
  		.iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1,
+ 
+ 		.supports_aspm = true,
 +		.current_cc_support = true,
  	},
  	{
  		.name = "qcn9274 hw2.0",
-@@ -1078,6 +1080,7 @@ static const struct ath12k_hw_params ath
- 		.supports_dynamic_smps_6ghz = true,
- 
+@@ -1084,6 +1086,7 @@ static const struct ath12k_hw_params ath
  		.iova_mask = 0,
+ 
+ 		.supports_aspm = false,
 +		.current_cc_support = false,
  	},
  };
  
 --- a/drivers/net/wireless/ath/ath12k/hw.h
 +++ b/drivers/net/wireless/ath/ath12k/hw.h
-@@ -189,6 +189,7 @@ struct ath12k_hw_params {
- 	bool tcl_ring_retry:1;
+@@ -190,6 +190,7 @@ struct ath12k_hw_params {
  	bool reoq_lut_support:1;
  	bool supports_shadow_regs:1;
+ 	bool supports_aspm:1;
 +	bool current_cc_support:1;
  
  	u32 num_tcl_banks;
diff --git a/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch b/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
deleted file mode 100644
index bd0e6707a5..0000000000
--- a/package/kernel/mac80211/patches/ath5k/432-ath5k_add_pciids.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/drivers/net/wireless/ath/ath5k/pci.c
-+++ b/drivers/net/wireless/ath/ath5k/pci.c
-@@ -47,6 +47,8 @@ static const struct pci_device_id ath5k_
- 	{ PCI_VDEVICE(ATHEROS, 0x001b) }, /* 5413 Eagle */
- 	{ PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */
- 	{ PCI_VDEVICE(ATHEROS, 0x001d) }, /* 2417 Nala */
-+	{ PCI_VDEVICE(ATHEROS, 0xff16) }, /* 2413,2414 sx76x on lantiq_danube */
-+	{ PCI_VDEVICE(ATHEROS, 0xff1a) }, /* 2417 arv45xx on lantiq_danube */
- 	{ PCI_VDEVICE(ATHEROS, 0xff1b) }, /* AR5BXB63 */
- 	{ 0 }
- };
diff --git a/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
index 385eea0116..9016da963b 100644
--- a/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
+++ b/package/kernel/mac80211/patches/ath9k/356-Revert-ath9k-interpret-requested-txpower-in-EIRP-dom.patch
@@ -8,7 +8,7 @@ This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
 
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -2977,7 +2977,8 @@ void ath9k_hw_apply_txpower(struct ath_h
+@@ -2975,7 +2975,8 @@ void ath9k_hw_apply_txpower(struct ath_h
  {
  	struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
  	struct ieee80211_channel *channel;
@@ -18,7 +18,7 @@ This reverts commit 71f5137bf010c6faffab50c0ec15374c59c4a411.
  	u16 ctl = NO_CTL;
  
  	if (!chan)
-@@ -2989,9 +2990,14 @@ void ath9k_hw_apply_txpower(struct ath_h
+@@ -2987,9 +2988,14 @@ void ath9k_hw_apply_txpower(struct ath_h
  	channel = chan->chan;
  	chan_pwr = min_t(int, channel->max_power * 2, MAX_COMBINED_POWER);
  	new_pwr = min_t(int, chan_pwr, reg->power_limit);
diff --git a/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
index 0c3edc1260..5e5f3e4f10 100644
--- a/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
+++ b/package/kernel/mac80211/patches/ath9k/365-ath9k-adjust-tx-power-reduction-for-US-regulatory-do.patch
@@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/drivers/net/wireless/ath/ath9k/hw.c
 +++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -2996,6 +2996,10 @@ void ath9k_hw_apply_txpower(struct ath_h
+@@ -2994,6 +2994,10 @@ void ath9k_hw_apply_txpower(struct ath_h
  	if (ant_gain > max_gain)
  		ant_reduction = ant_gain - max_gain;
  
diff --git a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
index 25f0d254c0..1f0609e348 100644
--- a/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
+++ b/package/kernel/mac80211/patches/brcm/863-brcmfmac-add-in-driver-tables-with-country-codes.patch
@@ -49,9 +49,9 @@ Signed-off-by: Rafa? Mi?ecki <rafal at milecki.pl>
  void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
  		    struct brcmf_mp_device *settings)
  {
-@@ -114,6 +144,8 @@ void brcmf_of_probe(struct device *dev,
- 		of_node_put(root);
+@@ -113,6 +143,8 @@ void brcmf_of_probe(struct device *dev,
  	}
+ 	of_node_put(root);
  
 +	brcmf_of_probe_cc(dev, settings);
 +
diff --git a/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch b/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
deleted file mode 100644
index 121b7faad9..0000000000
--- a/package/kernel/mac80211/patches/build/070-remove-broken-wext-select.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/drivers/staging/rtl8723bs/Kconfig
-+++ b/drivers/staging/rtl8723bs/Kconfig
-@@ -5,7 +5,6 @@ config RTL8723BS
- 	depends on m
- 	depends on WLAN && MMC && CFG80211
- 	depends on m
--	select CFG80211_WEXT
- 	depends on CRYPTO
- 	select BPAUTO_CRYPTO_LIB_ARC4
- 	help
diff --git a/package/kernel/mac80211/patches/build/120-headers_version_fix.patch b/package/kernel/mac80211/patches/build/120-headers_version_fix.patch
deleted file mode 100644
index 29f500a4d0..0000000000
--- a/package/kernel/mac80211/patches/build/120-headers_version_fix.patch
+++ /dev/null
@@ -1,14 +0,0 @@
---- a/backport-include/net/dropreason.h
-+++ b/backport-include/net/dropreason.h
-@@ -3,10 +3,9 @@
- 
- #include <linux/version.h>
- 
-+#include <net/dropreason-core.h>
- #if LINUX_VERSION_IS_GEQ(6,0,0)
- #include_next <net/dropreason.h>
--#else
--#include <net/dropreason-core.h>
- #endif
- 
- #if LINUX_VERSION_IS_LESS(6,4,0)
diff --git a/package/kernel/mac80211/patches/build/140-trace_backport.patch b/package/kernel/mac80211/patches/build/140-trace_backport.patch
index 00ee47e1a4..8b77b7e83d 100644
--- a/package/kernel/mac80211/patches/build/140-trace_backport.patch
+++ b/package/kernel/mac80211/patches/build/140-trace_backport.patch
@@ -1,6 +1,6 @@
 --- a/drivers/bus/mhi/host/trace.h
 +++ b/drivers/bus/mhi/host/trace.h
-@@ -103,7 +103,7 @@ TRACE_EVENT(mhi_gen_tre,
+@@ -104,7 +104,7 @@ TRACE_EVENT(mhi_gen_tre,
  	),
  
  	TP_fast_assign(
@@ -8,8 +8,8 @@
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
  		__entry->ch_num = mhi_chan->chan;
  		__entry->wp = mhi_tre;
- 		__entry->tre_ptr = mhi_tre->ptr;
-@@ -131,7 +131,7 @@ TRACE_EVENT(mhi_intvec_states,
+ 		__entry->tre_ptr = le64_to_cpu(mhi_tre->ptr);
+@@ -132,7 +132,7 @@ TRACE_EVENT(mhi_intvec_states,
  	),
  
  	TP_fast_assign(
@@ -18,7 +18,7 @@
  		__entry->local_ee = mhi_cntrl->ee;
  		__entry->state = mhi_cntrl->dev_state;
  		__entry->dev_ee = dev_ee;
-@@ -158,7 +158,7 @@ TRACE_EVENT(mhi_tryset_pm_state,
+@@ -159,7 +159,7 @@ TRACE_EVENT(mhi_tryset_pm_state,
  	),
  
  	TP_fast_assign(
@@ -27,16 +27,16 @@
  		if (pm_state)
  			pm_state = __fls(pm_state);
  		__entry->pm_state = pm_state;
-@@ -184,7 +184,7 @@ DECLARE_EVENT_CLASS(mhi_process_event_ri
+@@ -185,7 +185,7 @@ DECLARE_EVENT_CLASS(mhi_process_event_ri
  	),
  
  	TP_fast_assign(
 -		__assign_str(name);
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
  		__entry->rp = rp;
- 		__entry->ptr = rp->ptr;
- 		__entry->dword0 = rp->dword[0];
-@@ -226,7 +226,7 @@ DECLARE_EVENT_CLASS(mhi_update_channel_s
+ 		__entry->ptr = le64_to_cpu(rp->ptr);
+ 		__entry->dword0 = le32_to_cpu(rp->dword[0]);
+@@ -227,7 +227,7 @@ DECLARE_EVENT_CLASS(mhi_update_channel_s
  	),
  
  	TP_fast_assign(
@@ -45,7 +45,7 @@
  		__entry->ch_num = mhi_chan->chan;
  		__entry->state = state;
  		__entry->reason = reason;
-@@ -265,7 +265,7 @@ TRACE_EVENT(mhi_pm_st_transition,
+@@ -266,7 +266,7 @@ TRACE_EVENT(mhi_pm_st_transition,
  	),
  
  	TP_fast_assign(
diff --git a/package/kernel/mac80211/patches/build/210-wireless_netns_local_backport.patch b/package/kernel/mac80211/patches/build/210-wireless_netns_local_backport.patch
new file mode 100644
index 0000000000..9b0e95e845
--- /dev/null
+++ b/package/kernel/mac80211/patches/build/210-wireless_netns_local_backport.patch
@@ -0,0 +1,44 @@
+--- a/net/wireless/core.c
++++ b/net/wireless/core.c
+@@ -165,11 +165,15 @@ int cfg80211_switch_netns(struct cfg8021
+ 	list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) {
+ 		if (!wdev->netdev)
+ 			continue;
++#if LINUX_VERSION_IS_GEQ(6,12,0)
+ 		wdev->netdev->netns_local = false;
++#endif
+ 		err = dev_change_net_namespace(wdev->netdev, net, "wlan%d");
+ 		if (err)
+ 			break;
++#if LINUX_VERSION_IS_GEQ(6,12,0)
+ 		wdev->netdev->netns_local = true;
++#endif
+ 	}
+ 
+ 	if (err) {
+@@ -181,11 +185,15 @@ int cfg80211_switch_netns(struct cfg8021
+ 						     list) {
+ 			if (!wdev->netdev)
+ 				continue;
++#if LINUX_VERSION_IS_GEQ(6,12,0)
+ 			wdev->netdev->netns_local = false;
++#endif
+ 			err = dev_change_net_namespace(wdev->netdev, net,
+ 							"wlan%d");
+ 			WARN_ON(err);
++#if LINUX_VERSION_IS_GEQ(6,12,0)
+ 			wdev->netdev->netns_local = true;
++#endif
+ 		}
+ 
+ 		return err;
+@@ -1518,7 +1526,9 @@ static int cfg80211_netdev_notifier_call
+ 		SET_NETDEV_DEVTYPE(dev, &wiphy_type);
+ 		wdev->netdev = dev;
+ 		/* can only change netns with wiphy */
++#if LINUX_VERSION_IS_GEQ(6,12,0)
+ 		dev->netns_local = true;
++#endif
+ 
+ 		cfg80211_init_wdev(wdev);
+ 		break;
diff --git a/package/kernel/mac80211/patches/build/230-brcmfmac_usb_driver_backport.patch b/package/kernel/mac80211/patches/build/220-brcmfmac_usb_driver_backport.patch
similarity index 100%
rename from package/kernel/mac80211/patches/build/230-brcmfmac_usb_driver_backport.patch
rename to package/kernel/mac80211/patches/build/220-brcmfmac_usb_driver_backport.patch
diff --git a/package/kernel/mac80211/patches/build/235-fix-init_vqs-build-error-on-kernel-6.6.patch b/package/kernel/mac80211/patches/build/230-fix-init_vqs-build-error-on-kernel-6.6.patch
similarity index 100%
rename from package/kernel/mac80211/patches/build/235-fix-init_vqs-build-error-on-kernel-6.6.patch
rename to package/kernel/mac80211/patches/build/230-fix-init_vqs-build-error-on-kernel-6.6.patch
diff --git a/package/kernel/mac80211/patches/build/236-fix-genlmsg_multicast_allns-build-error-on-kernel-6.6.59.patch b/package/kernel/mac80211/patches/build/236-fix-genlmsg_multicast_allns-build-error-on-kernel-6.6.59.patch
deleted file mode 100644
index 905bf8dfc1..0000000000
--- a/package/kernel/mac80211/patches/build/236-fix-genlmsg_multicast_allns-build-error-on-kernel-6.6.59.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From e0f83d268974dab0361d11904dfc9acec53f96a6 Mon Sep 17 00:00:00 2001
-From: Eric Dumazet <edumazet at google.com>
-Date: Fri, 11 Oct 2024 17:12:17 +0000
-Subject: [PATCH] genetlink: hold RCU in genlmsg_mcast()
-
-[ Upstream commit 56440d7ec28d60f8da3bfa09062b3368ff9b16db ]
-
-While running net selftests with CONFIG_PROVE_RCU_LIST=y I saw
-one lockdep splat [1].
-
-genlmsg_mcast() uses for_each_net_rcu(), and must therefore hold RCU.
-
-Instead of letting all callers guard genlmsg_multicast_allns()
-with a rcu_read_lock()/rcu_read_unlock() pair, do it in genlmsg_mcast().
-
-This also means the @flags parameter is useless, we need to always use
-GFP_ATOMIC.
-
-[1]
-[10882.424136] =============================
-[10882.424166] WARNING: suspicious RCU usage
-[10882.424309] 6.12.0-rc2-virtme #1156 Not tainted
-[10882.424400] -----------------------------
-[10882.424423] net/netlink/genetlink.c:1940 RCU-list traversed in non-reader section!!
-[10882.424469]
-other info that might help us debug this:
-
-[10882.424500]
-rcu_scheduler_active = 2, debug_locks = 1
-[10882.424744] 2 locks held by ip/15677:
-[10882.424791] #0: ffffffffb6b491b0 (cb_lock){++++}-{3:3}, at: genl_rcv (net/netlink/genetlink.c:1219)
-[10882.426334] #1: ffffffffb6b49248 (genl_mutex){+.+.}-{3:3}, at: genl_rcv_msg (net/netlink/genetlink.c:61 net/netlink/genetlink.c:57 net/netlink/genetlink.c:1209)
-[10882.426465]
-stack backtrace:
-[10882.426805] CPU: 14 UID: 0 PID: 15677 Comm: ip Not tainted 6.12.0-rc2-virtme #1156
-[10882.426919] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.3-debian-1.16.3-2 04/01/2014
-[10882.427046] Call Trace:
-[10882.427131]  <TASK>
-[10882.427244] dump_stack_lvl (lib/dump_stack.c:123)
-[10882.427335] lockdep_rcu_suspicious (kernel/locking/lockdep.c:6822)
-[10882.427387] genlmsg_multicast_allns (net/netlink/genetlink.c:1940 (discriminator 7) net/netlink/genetlink.c:1977 (discriminator 7))
-[10882.427436] l2tp_tunnel_notify.constprop.0 (net/l2tp/l2tp_netlink.c:119) l2tp_netlink
-[10882.427683] l2tp_nl_cmd_tunnel_create (net/l2tp/l2tp_netlink.c:253) l2tp_netlink
-[10882.427748] genl_family_rcv_msg_doit (net/netlink/genetlink.c:1115)
-[10882.427834] genl_rcv_msg (net/netlink/genetlink.c:1195 net/netlink/genetlink.c:1210)
-[10882.427877] ? __pfx_l2tp_nl_cmd_tunnel_create (net/l2tp/l2tp_netlink.c:186) l2tp_netlink
-[10882.427927] ? __pfx_genl_rcv_msg (net/netlink/genetlink.c:1201)
-[10882.427959] netlink_rcv_skb (net/netlink/af_netlink.c:2551)
-[10882.428069] genl_rcv (net/netlink/genetlink.c:1220)
-[10882.428095] netlink_unicast (net/netlink/af_netlink.c:1332 net/netlink/af_netlink.c:1357)
-[10882.428140] netlink_sendmsg (net/netlink/af_netlink.c:1901)
-[10882.428210] ____sys_sendmsg (net/socket.c:729 (discriminator 1) net/socket.c:744 (discriminator 1) net/socket.c:2607 (discriminator 1))
-
-Fixes: 33f72e6f0c67 ("l2tp : multicast notification to the registered listeners")
-Signed-off-by: Eric Dumazet <edumazet at google.com>
-Cc: James Chapman <jchapman at katalix.com>
-Cc: Tom Parkin <tparkin at katalix.com>
-Cc: Johannes Berg <johannes.berg at intel.com>
-Link: https://patch.msgid.link/20241011171217.3166614-1-edumazet at google.com
-Signed-off-by: Jakub Kicinski <kuba at kernel.org>
-Signed-off-by: Sasha Levin <sashal at kernel.org>
----
- drivers/target/target_core_user.c |  2 +-
- include/net/genetlink.h           |  3 +--
- net/l2tp/l2tp_netlink.c           |  4 ++--
- net/netlink/genetlink.c           | 28 ++++++++++++++--------------
- net/wireless/nl80211.c            |  8 ++------
- 5 files changed, 20 insertions(+), 25 deletions(-)
-
---- a/backport-include/net/genetlink.h
-+++ b/backport-include/net/genetlink.h
-@@ -150,7 +150,7 @@ int genlmsg_multicast(const struct genl_
- #define genlmsg_multicast_allns LINUX_BACKPORT(genlmsg_multicast_allns)
- int backport_genlmsg_multicast_allns(const struct genl_family *family,
- 				     struct sk_buff *skb, u32 portid,
--				     unsigned int group, gfp_t flags);
-+				     unsigned int group);
- 
- #define genl_family_attrbuf LINUX_BACKPORT(genl_family_attrbuf)
- static inline struct nlattr **genl_family_attrbuf(struct genl_family *family)
---- a/compat/backport-genetlink.c
-+++ b/compat/backport-genetlink.c
-@@ -198,23 +198,23 @@ int genlmsg_multicast(const struct genl_
- }
- EXPORT_SYMBOL_GPL(genlmsg_multicast);
- 
--static int genlmsg_mcast(struct sk_buff *skb, u32 portid, unsigned long group,
--			 gfp_t flags)
-+static int genlmsg_mcast(struct sk_buff *skb, u32 portid, unsigned long group)
- {
- 	struct sk_buff *tmp;
- 	struct net *net, *prev = NULL;
- 	bool delivered = false;
- 	int err;
- 
-+	rcu_read_lock();
- 	for_each_net_rcu(net) {
- 		if (prev) {
--			tmp = skb_clone(skb, flags);
-+			tmp = skb_clone(skb, GFP_ATOMIC);
- 			if (!tmp) {
- 				err = -ENOMEM;
- 				goto error;
- 			}
- 			err = nlmsg_multicast(prev->genl_sock, tmp,
--					      portid, group, flags);
-+					      portid, group, GFP_ATOMIC);
- 			if (!err)
- 				delivered = true;
- 			else if (err != -ESRCH)
-@@ -223,25 +223,29 @@ static int genlmsg_mcast(struct sk_buff
- 
- 		prev = net;
- 	}
-+	err = nlmsg_multicast(prev->genl_sock, skb, portid, group, GFP_ATOMIC);
-+
-+	rcu_read_unlock();
- 
--	err = nlmsg_multicast(prev->genl_sock, skb, portid, group, flags);
- 	if (!err)
- 		delivered = true;
- 	else if (err != -ESRCH)
- 		return err;
- 	return delivered ? 0 : -ESRCH;
-  error:
-+	rcu_read_unlock();
-+
- 	kfree_skb(skb);
- 	return err;
- }
- 
- int backport_genlmsg_multicast_allns(const struct genl_family *family,
- 				     struct sk_buff *skb, u32 portid,
--				     unsigned int group, gfp_t flags)
-+				     unsigned int group)
- {
- 	group = __backport_genl_group(family, group);
- 	if (group == INVALID_GROUP)
- 		return -EINVAL;
--	return genlmsg_mcast(skb, portid, group, flags);
-+	return genlmsg_mcast(skb, portid, group);
- }
- EXPORT_SYMBOL_GPL(backport_genlmsg_multicast_allns);
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -17956,10 +17956,8 @@ void nl80211_common_reg_change_event(enu
- 
- 	genlmsg_end(msg, hdr);
- 
--	rcu_read_lock();
- 	genlmsg_multicast_allns(&nl80211_fam, msg, 0,
--				NL80211_MCGRP_REGULATORY, GFP_ATOMIC);
--	rcu_read_unlock();
-+				NL80211_MCGRP_REGULATORY);
- 
- 	return;
- 
-@@ -18692,10 +18690,8 @@ void nl80211_send_beacon_hint_event(stru
- 
- 	genlmsg_end(msg, hdr);
- 
--	rcu_read_lock();
- 	genlmsg_multicast_allns(&nl80211_fam, msg, 0,
--				NL80211_MCGRP_REGULATORY, GFP_ATOMIC);
--	rcu_read_unlock();
-+				NL80211_MCGRP_REGULATORY);
- 
- 	return;
- 
diff --git a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
index c3324f4289..cfb7dcf738 100644
--- a/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
+++ b/package/kernel/mac80211/patches/mwl/700-mwl8k-missing-pci-id-for-WNR854T.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/marvell/mwl8k.c
 +++ b/drivers/net/wireless/marvell/mwl8k.c
-@@ -5709,6 +5709,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+@@ -5712,6 +5712,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
  MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  
  static const struct pci_device_id mwl8k_pci_id_table[] = {
diff --git a/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch b/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
index caa139a2c6..484b37bfcc 100644
--- a/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
+++ b/package/kernel/mac80211/patches/mwl/900-mwifiex-increase-the-global-limit-up-to-4-SSID.patch
@@ -30,7 +30,7 @@ the card-specific structure.
  
  #define MWIFIEX_DMA_ALIGN_SZ	    64
  #define MWIFIEX_RX_HEADROOM	    64
-@@ -100,7 +100,7 @@
+@@ -123,7 +123,7 @@
  #define MWIFIEX_RATE_INDEX_OFDM0   4
  
  #define MWIFIEX_MAX_STA_NUM		3
diff --git a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
index 062b0600d0..d09cfac448 100644
--- a/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
+++ b/package/kernel/mac80211/patches/mwl/940-mwl8k_init_devices_synchronously.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/wireless/marvell/mwl8k.c
 +++ b/drivers/net/wireless/marvell/mwl8k.c
-@@ -6295,6 +6295,8 @@ static int mwl8k_probe(struct pci_dev *p
+@@ -6298,6 +6298,8 @@ static int mwl8k_probe(struct pci_dev *p
  
  	priv->running_bsses = 0;
  
@@ -9,7 +9,7 @@
  	return rc;
  
  err_stop_firmware:
-@@ -6328,8 +6330,6 @@ static void mwl8k_remove(struct pci_dev
+@@ -6331,8 +6333,6 @@ static void mwl8k_remove(struct pci_dev
  		return;
  	priv = hw->priv;
  
diff --git a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
index a7ecabde82..93a213265c 100644
--- a/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
+++ b/package/kernel/mac80211/patches/mwl/950-mwifiex-Print-stringified-name-of-command-in-error-l.patch
@@ -116,7 +116,7 @@ Signed-off-by: Pali Roh?r <pali at kernel.org>
  		mwifiex_recycle_cmd_node(adapter, cmd_node);
  		queue_work(adapter->workqueue, &adapter->main_work);
  		return -1;
-@@ -653,8 +732,8 @@ int mwifiex_send_cmd(struct mwifiex_priv
+@@ -655,8 +734,8 @@ int mwifiex_send_cmd(struct mwifiex_priv
  	/* Return error, since the command preparation failed */
  	if (ret) {
  		mwifiex_dbg(adapter, ERROR,
@@ -127,7 +127,7 @@ Signed-off-by: Pali Roh?r <pali at kernel.org>
  		mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
  		return -1;
  	}
-@@ -902,8 +981,9 @@ int mwifiex_process_cmdresp(struct mwifi
+@@ -904,8 +983,9 @@ int mwifiex_process_cmdresp(struct mwifi
  	if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) {
  		if (ret) {
  			mwifiex_dbg(adapter, ERROR,
@@ -139,7 +139,7 @@ Signed-off-by: Pali Roh?r <pali at kernel.org>
  			mwifiex_init_fw_complete(adapter);
  			return -1;
  		} else if (adapter->last_init_cmd == cmdresp_no)
-@@ -1265,8 +1345,8 @@ mwifiex_process_sleep_confirm_resp(struc
+@@ -1287,8 +1367,8 @@ mwifiex_process_sleep_confirm_resp(struc
  
  	if (command != HostCmd_CMD_802_11_PS_MODE_ENH) {
  		mwifiex_dbg(adapter, ERROR,
@@ -152,7 +152,7 @@ Signed-off-by: Pali Roh?r <pali at kernel.org>
  
 --- a/drivers/net/wireless/marvell/mwifiex/main.h
 +++ b/drivers/net/wireless/marvell/mwifiex/main.h
-@@ -1084,6 +1084,8 @@ void mwifiex_cancel_all_pending_cmd(stru
+@@ -1100,6 +1100,8 @@ void mwifiex_cancel_all_pending_cmd(stru
  void mwifiex_cancel_pending_scan_cmd(struct mwifiex_adapter *adapter);
  void mwifiex_cancel_scan(struct mwifiex_adapter *adapter);
  
@@ -177,7 +177,7 @@ Signed-off-by: Pali Roh?r <pali at kernel.org>
  		adapter->cmd_wait_q.status = -1;
 --- a/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
 +++ b/drivers/net/wireless/marvell/mwifiex/uap_cmd.c
-@@ -802,7 +802,8 @@ int mwifiex_uap_prepare_cmd(struct mwifi
+@@ -964,7 +964,8 @@ int mwifiex_uap_prepare_cmd(struct mwifi
  		break;
  	default:
  		mwifiex_dbg(priv->adapter, ERROR,
diff --git a/package/kernel/mac80211/patches/rtl/001-v6.12-wifi-rtw88-Set-efuse-ext_lna_5g-fix-typo.patch b/package/kernel/mac80211/patches/rtl/001-v6.12-wifi-rtw88-Set-efuse-ext_lna_5g-fix-typo.patch
deleted file mode 100644
index 96a6743c5b..0000000000
--- a/package/kernel/mac80211/patches/rtl/001-v6.12-wifi-rtw88-Set-efuse-ext_lna_5g-fix-typo.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 8fbcaa308591b91e9037ab6a8d733873b749a70d Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Sat, 6 Jul 2024 01:40:58 +0300
-Subject: [PATCH] wifi: rtw88: Set efuse->ext_lna_5g - fix typo
-
-efuse->ext_lna_2g is set twice and efuse->ext_lna_5g is not set at all.
-Set each one once.
-
-Nothing uses these members right now. They will be used by the RTL8821AU
-and RTL8812AU drivers.
-
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Acked-by: Ping-Ke Shih <pkshih at realtek.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/8ccc9e13-0d45-417d-8f88-93a0ad294f77 at gmail.com
----
- drivers/net/wireless/realtek/rtw88/main.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtw88/main.c
-+++ b/drivers/net/wireless/realtek/rtw88/main.c
-@@ -2006,7 +2006,7 @@ static int rtw_chip_efuse_info_setup(str
- 	efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
- 	efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
- 	efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
--	efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
-+	efuse->ext_lna_5g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
- 
- 	if (!is_valid_ether_addr(efuse->addr)) {
- 		eth_random_addr(efuse->addr);
diff --git a/package/kernel/mac80211/patches/rtl/002-v6.12-wifi-rtw88-usb-Support-USB-3-with-RTL8822CU-RTL8822B.patch b/package/kernel/mac80211/patches/rtl/002-v6.12-wifi-rtw88-usb-Support-USB-3-with-RTL8822CU-RTL8822B.patch
deleted file mode 100644
index 2faa59d760..0000000000
--- a/package/kernel/mac80211/patches/rtl/002-v6.12-wifi-rtw88-usb-Support-USB-3-with-RTL8822CU-RTL8822B.patch
+++ /dev/null
@@ -1,284 +0,0 @@
-From 315c23a64e99552502dd4d18d6ddc073fad9a7c3 Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Thu, 11 Jul 2024 01:11:33 +0300
-Subject: [PATCH] wifi: rtw88: usb: Support USB 3 with RTL8822CU/RTL8822BU
-
-The Realtek wifi 5 devices which support USB 3 are weird: when first
-plugged in, they pretend to be USB 2. The driver needs to send some
-commands to the device, which make it disappear and come back as a
-USB 3 device.
-
-Implement the required commands in rtw88.
-
-When a USB 3 device is plugged into a USB 2 port, rtw88 will try to
-switch it to USB 3 mode only once. The device will disappear and come
-back still in USB 2 mode, of course.
-
-Some people experience heavy interference in the 2.4 GHz band in
-USB 3 mode, so add a module parameter switch_usb_mode with the
-default value 1 to let people disable the switching.
-
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Acked-by: Ping-Ke Shih <pkshih at realtek.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/77906c62-5674-426f-bde1-1b2a12a0339d at gmail.com
----
- drivers/net/wireless/realtek/rtw88/debug.h    |  1 +
- drivers/net/wireless/realtek/rtw88/main.h     |  2 +
- drivers/net/wireless/realtek/rtw88/reg.h      | 11 +++
- drivers/net/wireless/realtek/rtw88/rtw8822b.c |  1 +
- drivers/net/wireless/realtek/rtw88/rtw8822b.h |  4 +-
- drivers/net/wireless/realtek/rtw88/rtw8822c.c |  1 +
- drivers/net/wireless/realtek/rtw88/rtw8822c.h | 24 +++---
- drivers/net/wireless/realtek/rtw88/usb.c      | 84 +++++++++++++++++++
- 8 files changed, 116 insertions(+), 12 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/debug.h
-+++ b/drivers/net/wireless/realtek/rtw88/debug.h
-@@ -25,6 +25,7 @@ enum rtw_debug_mask {
- 	RTW_DBG_HW_SCAN		= 0x00010000,
- 	RTW_DBG_STATE		= 0x00020000,
- 	RTW_DBG_SDIO		= 0x00040000,
-+	RTW_DBG_USB		= 0x00080000,
- 
- 	RTW_DBG_UNEXP		= 0x80000000,
- 	RTW_DBG_ALL		= 0xffffffff
---- a/drivers/net/wireless/realtek/rtw88/main.h
-+++ b/drivers/net/wireless/realtek/rtw88/main.h
-@@ -1785,6 +1785,8 @@ struct rtw_efuse {
- 	bool share_ant;
- 	u8 bt_setting;
- 
-+	u8 usb_mode_switch;
-+
- 	struct {
- 		u8 hci;
- 		u8 bw;
---- a/drivers/net/wireless/realtek/rtw88/reg.h
-+++ b/drivers/net/wireless/realtek/rtw88/reg.h
-@@ -15,6 +15,7 @@
- #define BIT_WLOCK_1C_B6		BIT(5)
- #define REG_SYS_PW_CTRL		0x0004
- #define BIT_PFM_WOWL		BIT(3)
-+#define BIT_APFM_OFFMAC		BIT(9)
- #define REG_SYS_CLK_CTRL	0x0008
- #define BIT_CPU_CLK_EN		BIT(14)
- 
-@@ -133,6 +134,14 @@
- #define REG_PMC_DBG_CTRL1	0xa8
- #define BITS_PMC_BT_IQK_STS	GENMASK(22, 21)
- 
-+#define REG_PAD_CTRL2		0x00C4
-+#define BIT_RSM_EN_V1		BIT(16)
-+#define BIT_NO_PDN_CHIPOFF_V1	BIT(17)
-+#define BIT_MASK_USB23_SW_MODE_V1	GENMASK(19, 18)
-+#define BIT_USB3_USB2_TRANSITION	BIT(20)
-+#define BIT_USB_MODE_U2		1
-+#define BIT_USB_MODE_U3		2
-+
- #define REG_EFUSE_ACCESS	0x00CF
- #define EFUSE_ACCESS_ON		0x69
- #define EFUSE_ACCESS_OFF	0x00
-@@ -568,6 +577,8 @@
- #define BIT_WL_SECURITY_CLK	BIT(15)
- #define BIT_DDMA_EN		BIT(8)
- 
-+#define REG_SW_MDIO		0x10C0
-+
- #define REG_H2C_PKT_READADDR	0x10D0
- #define REG_H2C_PKT_WRITEADDR	0x10D4
- #define REG_FW_DBG6		0x10F8
---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c
-+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c
-@@ -46,6 +46,7 @@ static int rtw8822b_read_efuse(struct rt
- 
- 	map = (struct rtw8822b_efuse *)log_map;
- 
-+	efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(7));
- 	efuse->rfe_option = map->rfe_option;
- 	efuse->rf_board_option = map->rf_board_option;
- 	efuse->crystal_cap = map->xtal_k;
---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.h
-+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.h
-@@ -72,7 +72,9 @@ struct rtw8822bs_efuse {
- 
- struct rtw8822b_efuse {
- 	__le16 rtl_id;
--	u8 res0[0x0e];
-+	u8 res0[4];
-+	u8 usb_mode;
-+	u8 res1[0x09];
- 
- 	/* power index for four RF paths */
- 	struct rtw_txpwr_idx txpwr_idx_table[4];
---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c
-+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c
-@@ -49,6 +49,7 @@ static int rtw8822c_read_efuse(struct rt
- 
- 	map = (struct rtw8822c_efuse *)log_map;
- 
-+	efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(7));
- 	efuse->rfe_option = map->rfe_option;
- 	efuse->rf_board_option = map->rf_board_option;
- 	efuse->crystal_cap = map->xtal_k & XCAP_MASK;
---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h
-+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h
-@@ -59,16 +59,18 @@ struct rtw8822ce_efuse {
- 
- struct rtw8822c_efuse {
- 	__le16 rtl_id;
--	u8 res0[0x0e];
-+	u8 res0[4];
-+	u8 usb_mode;
-+	u8 res1[0x09];
- 
- 	/* power index for four RF paths */
- 	struct rtw_txpwr_idx txpwr_idx_table[4];
- 
- 	u8 channel_plan;		/* 0xb8 */
- 	u8 xtal_k;
--	u8 res1;
-+	u8 res2;
- 	u8 iqk_lck;
--	u8 res2[5];			/* 0xbc */
-+	u8 res3[5];			/* 0xbc */
- 	u8 rf_board_option;
- 	u8 rf_feature_option;
- 	u8 rf_bt_setting;
-@@ -80,21 +82,21 @@ struct rtw8822c_efuse {
- 	u8 rf_antenna_option;		/* 0xc9 */
- 	u8 rfe_option;
- 	u8 country_code[2];
--	u8 res3[3];
-+	u8 res4[3];
- 	u8 path_a_thermal;		/* 0xd0 */
- 	u8 path_b_thermal;
--	u8 res4[2];
-+	u8 res5[2];
- 	u8 rx_gain_gap_2g_ofdm;
--	u8 res5;
--	u8 rx_gain_gap_2g_cck;
- 	u8 res6;
--	u8 rx_gain_gap_5gl;
-+	u8 rx_gain_gap_2g_cck;
- 	u8 res7;
--	u8 rx_gain_gap_5gm;
-+	u8 rx_gain_gap_5gl;
- 	u8 res8;
--	u8 rx_gain_gap_5gh;
-+	u8 rx_gain_gap_5gm;
- 	u8 res9;
--	u8 res10[0x42];
-+	u8 rx_gain_gap_5gh;
-+	u8 res10;
-+	u8 res11[0x42];
- 	union {
- 		struct rtw8822ce_efuse e;
- 		struct rtw8822cu_efuse u;
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -14,6 +14,11 @@
- #include "ps.h"
- #include "usb.h"
- 
-+static bool rtw_switch_usb_mode = true;
-+module_param_named(switch_usb_mode, rtw_switch_usb_mode, bool, 0644);
-+MODULE_PARM_DESC(switch_usb_mode,
-+		 "Set to N to disable switching to USB 3 mode to avoid potential interference in the 2.4 GHz band (default: Y)");
-+
- #define RTW_USB_MAX_RXQ_LEN	512
- 
- struct rtw_usb_txcb {
-@@ -841,6 +846,77 @@ static void rtw_usb_intf_deinit(struct r
- 	usb_set_intfdata(intf, NULL);
- }
- 
-+static int rtw_usb_switch_mode_new(struct rtw_dev *rtwdev)
-+{
-+	enum usb_device_speed cur_speed;
-+	u8 id = rtwdev->chip->id;
-+	bool can_switch;
-+	u32 pad_ctrl2;
-+
-+	if (rtw_read8(rtwdev, REG_SYS_CFG2 + 3) == 0x20)
-+		cur_speed = USB_SPEED_SUPER;
-+	else
-+		cur_speed = USB_SPEED_HIGH;
-+
-+	if (cur_speed == USB_SPEED_SUPER)
-+		return 0;
-+
-+	pad_ctrl2 = rtw_read32(rtwdev, REG_PAD_CTRL2);
-+
-+	can_switch = !!(pad_ctrl2 & (BIT_MASK_USB23_SW_MODE_V1 |
-+				     BIT_USB3_USB2_TRANSITION));
-+
-+	if (!can_switch) {
-+		rtw_dbg(rtwdev, RTW_DBG_USB,
-+			"Switching to USB 3 mode unsupported by the chip\n");
-+		return 0;
-+	}
-+
-+	/* At this point cur_speed is USB_SPEED_HIGH. If we already tried
-+	 * to switch don't try again - it's a USB 2 port.
-+	 */
-+	if (u32_get_bits(pad_ctrl2, BIT_MASK_USB23_SW_MODE_V1) == BIT_USB_MODE_U3)
-+		return 0;
-+
-+	/* Enable IO wrapper timeout */
-+	if (id == RTW_CHIP_TYPE_8822B || id == RTW_CHIP_TYPE_8821C)
-+		rtw_write8_clr(rtwdev, REG_SW_MDIO + 3, BIT(0));
-+
-+	u32p_replace_bits(&pad_ctrl2, BIT_USB_MODE_U3, BIT_MASK_USB23_SW_MODE_V1);
-+	pad_ctrl2 |= BIT_RSM_EN_V1;
-+
-+	rtw_write32(rtwdev, REG_PAD_CTRL2, pad_ctrl2);
-+	rtw_write8(rtwdev, REG_PAD_CTRL2 + 1, 4);
-+
-+	rtw_write16_set(rtwdev, REG_SYS_PW_CTRL, BIT_APFM_OFFMAC);
-+	usleep_range(1000, 1001);
-+	rtw_write32_set(rtwdev, REG_PAD_CTRL2, BIT_NO_PDN_CHIPOFF_V1);
-+
-+	return 1;
-+}
-+
-+static int rtw_usb_switch_mode(struct rtw_dev *rtwdev)
-+{
-+	u8 id = rtwdev->chip->id;
-+
-+	if (id != RTW_CHIP_TYPE_8822C && id != RTW_CHIP_TYPE_8822B)
-+		return 0;
-+
-+	if (!rtwdev->efuse.usb_mode_switch) {
-+		rtw_dbg(rtwdev, RTW_DBG_USB,
-+			"Switching to USB 3 mode disabled by chip's efuse\n");
-+		return 0;
-+	}
-+
-+	if (!rtw_switch_usb_mode) {
-+		rtw_dbg(rtwdev, RTW_DBG_USB,
-+			"Switching to USB 3 mode disabled by module parameter\n");
-+		return 0;
-+	}
-+
-+	return rtw_usb_switch_mode_new(rtwdev);
-+}
-+
- int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
- {
- 	struct rtw_dev *rtwdev;
-@@ -896,6 +972,14 @@ int rtw_usb_probe(struct usb_interface *
- 		goto err_destroy_rxwq;
- 	}
- 
-+	ret = rtw_usb_switch_mode(rtwdev);
-+	if (ret) {
-+		/* Not a fail, but we do need to skip rtw_register_hw. */
-+		rtw_dbg(rtwdev, RTW_DBG_USB, "switching to USB 3 mode\n");
-+		ret = 0;
-+		goto err_destroy_rxwq;
-+	}
-+
- 	ret = rtw_register_hw(rtwdev, rtwdev->hw);
- 	if (ret) {
- 		rtw_err(rtwdev, "failed to register hw\n");
diff --git a/package/kernel/mac80211/patches/rtl/004-v6.12-wifi-rtw88-debugfs-support-multiple-adapters-debuggi.patch b/package/kernel/mac80211/patches/rtl/004-v6.12-wifi-rtw88-debugfs-support-multiple-adapters-debuggi.patch
deleted file mode 100644
index d965fbce92..0000000000
--- a/package/kernel/mac80211/patches/rtl/004-v6.12-wifi-rtw88-debugfs-support-multiple-adapters-debuggi.patch
+++ /dev/null
@@ -1,454 +0,0 @@
-From 8db6c1ca64664ef9b071e6eeb646023ac5b240a8 Mon Sep 17 00:00:00 2001
-From: Ping-Ke Shih <pkshih at realtek.com>
-Date: Thu, 18 Jul 2024 14:41:55 +0800
-Subject: [PATCH] wifi: rtw88: debugfs: support multiple adapters debugging
-
-Originally in order to read partial registers from large area, we write
-a range value stored into a static variable and read registers according
-to the static variable.
-
-However, if we install more than one adapters supported by this driver,
-the static variables will be overwritten by latter adapters. To resolve
-the problem, move the static variables to struct rtw_dev for each adapter.
-
-With changes, smatch spends too much time to parse rtw_debugfs_init():
-    debug.c:1289 rtw_debugfs_init() parse error: turning off implications
-    after 60 seconds
-Move stuffs of adding debugfs entries to three rtw_debugfs_add_xxx()
-functions.
-
-Reported-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Closes: https://lore.kernel.org/linux-wireless/cd6a2acf3c2c36d938b40140b52a779516f446a9.camel at realtek.com/T/#m27662022c70d9f893ba96f6c6a8dd8fce2434dfe
-Tested-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/20240718064155.38955-1-pkshih at realtek.com
----
- drivers/net/wireless/realtek/rtw88/debug.c | 303 ++++++++++++---------
- drivers/net/wireless/realtek/rtw88/debug.h |   2 +
- drivers/net/wireless/realtek/rtw88/main.c  |   1 +
- drivers/net/wireless/realtek/rtw88/main.h  |   3 +-
- 4 files changed, 180 insertions(+), 129 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/debug.c
-+++ b/drivers/net/wireless/realtek/rtw88/debug.c
-@@ -43,6 +43,62 @@ struct rtw_debugfs_priv {
- 	};
- };
- 
-+struct rtw_debugfs {
-+	struct rtw_debugfs_priv mac_0;
-+	struct rtw_debugfs_priv mac_1;
-+	struct rtw_debugfs_priv mac_2;
-+	struct rtw_debugfs_priv mac_3;
-+	struct rtw_debugfs_priv mac_4;
-+	struct rtw_debugfs_priv mac_5;
-+	struct rtw_debugfs_priv mac_6;
-+	struct rtw_debugfs_priv mac_7;
-+	struct rtw_debugfs_priv mac_10;
-+	struct rtw_debugfs_priv mac_11;
-+	struct rtw_debugfs_priv mac_12;
-+	struct rtw_debugfs_priv mac_13;
-+	struct rtw_debugfs_priv mac_14;
-+	struct rtw_debugfs_priv mac_15;
-+	struct rtw_debugfs_priv mac_16;
-+	struct rtw_debugfs_priv mac_17;
-+	struct rtw_debugfs_priv bb_8;
-+	struct rtw_debugfs_priv bb_9;
-+	struct rtw_debugfs_priv bb_a;
-+	struct rtw_debugfs_priv bb_b;
-+	struct rtw_debugfs_priv bb_c;
-+	struct rtw_debugfs_priv bb_d;
-+	struct rtw_debugfs_priv bb_e;
-+	struct rtw_debugfs_priv bb_f;
-+	struct rtw_debugfs_priv bb_18;
-+	struct rtw_debugfs_priv bb_19;
-+	struct rtw_debugfs_priv bb_1a;
-+	struct rtw_debugfs_priv bb_1b;
-+	struct rtw_debugfs_priv bb_1c;
-+	struct rtw_debugfs_priv bb_1d;
-+	struct rtw_debugfs_priv bb_1e;
-+	struct rtw_debugfs_priv bb_1f;
-+	struct rtw_debugfs_priv bb_2c;
-+	struct rtw_debugfs_priv bb_2d;
-+	struct rtw_debugfs_priv bb_40;
-+	struct rtw_debugfs_priv bb_41;
-+	struct rtw_debugfs_priv rf_dump;
-+	struct rtw_debugfs_priv tx_pwr_tbl;
-+	struct rtw_debugfs_priv write_reg;
-+	struct rtw_debugfs_priv h2c;
-+	struct rtw_debugfs_priv rf_write;
-+	struct rtw_debugfs_priv rf_read;
-+	struct rtw_debugfs_priv read_reg;
-+	struct rtw_debugfs_priv fix_rate;
-+	struct rtw_debugfs_priv dump_cam;
-+	struct rtw_debugfs_priv rsvd_page;
-+	struct rtw_debugfs_priv phy_info;
-+	struct rtw_debugfs_priv coex_enable;
-+	struct rtw_debugfs_priv coex_info;
-+	struct rtw_debugfs_priv edcca_enable;
-+	struct rtw_debugfs_priv fw_crash;
-+	struct rtw_debugfs_priv force_lowest_basic_rate;
-+	struct rtw_debugfs_priv dm_cap;
-+};
-+
- static const char * const rtw_dm_cap_strs[] = {
- 	[RTW_DM_CAP_NA] = "NA",
- 	[RTW_DM_CAP_TXGAPK] = "TXGAPK",
-@@ -524,7 +580,7 @@ static int rtw_debug_get_bb_page(struct
- 	return 0;
- }
- 
--static int rtw_debug_get_rf_dump(struct seq_file *m, void *v)
-+static int rtw_debugfs_get_rf_dump(struct seq_file *m, void *v)
- {
- 	struct rtw_debugfs_priv *debugfs_priv = m->private;
- 	struct rtw_dev *rtwdev = debugfs_priv->rtwdev;
-@@ -1074,139 +1130,102 @@ static int rtw_debugfs_get_dm_cap(struct
- 	return 0;
- }
- 
--#define rtw_debug_impl_mac(page, addr)				\
--static struct rtw_debugfs_priv rtw_debug_priv_mac_ ##page = {	\
-+#define rtw_debug_priv_mac(addr)				\
-+{								\
- 	.cb_read = rtw_debug_get_mac_page,			\
- 	.cb_data = addr,					\
- }
- 
--rtw_debug_impl_mac(0, 0x0000);
--rtw_debug_impl_mac(1, 0x0100);
--rtw_debug_impl_mac(2, 0x0200);
--rtw_debug_impl_mac(3, 0x0300);
--rtw_debug_impl_mac(4, 0x0400);
--rtw_debug_impl_mac(5, 0x0500);
--rtw_debug_impl_mac(6, 0x0600);
--rtw_debug_impl_mac(7, 0x0700);
--rtw_debug_impl_mac(10, 0x1000);
--rtw_debug_impl_mac(11, 0x1100);
--rtw_debug_impl_mac(12, 0x1200);
--rtw_debug_impl_mac(13, 0x1300);
--rtw_debug_impl_mac(14, 0x1400);
--rtw_debug_impl_mac(15, 0x1500);
--rtw_debug_impl_mac(16, 0x1600);
--rtw_debug_impl_mac(17, 0x1700);
--
--#define rtw_debug_impl_bb(page, addr)			\
--static struct rtw_debugfs_priv rtw_debug_priv_bb_ ##page = {	\
-+#define rtw_debug_priv_bb(addr)					\
-+{								\
- 	.cb_read = rtw_debug_get_bb_page,			\
- 	.cb_data = addr,					\
- }
- 
--rtw_debug_impl_bb(8, 0x0800);
--rtw_debug_impl_bb(9, 0x0900);
--rtw_debug_impl_bb(a, 0x0a00);
--rtw_debug_impl_bb(b, 0x0b00);
--rtw_debug_impl_bb(c, 0x0c00);
--rtw_debug_impl_bb(d, 0x0d00);
--rtw_debug_impl_bb(e, 0x0e00);
--rtw_debug_impl_bb(f, 0x0f00);
--rtw_debug_impl_bb(18, 0x1800);
--rtw_debug_impl_bb(19, 0x1900);
--rtw_debug_impl_bb(1a, 0x1a00);
--rtw_debug_impl_bb(1b, 0x1b00);
--rtw_debug_impl_bb(1c, 0x1c00);
--rtw_debug_impl_bb(1d, 0x1d00);
--rtw_debug_impl_bb(1e, 0x1e00);
--rtw_debug_impl_bb(1f, 0x1f00);
--rtw_debug_impl_bb(2c, 0x2c00);
--rtw_debug_impl_bb(2d, 0x2d00);
--rtw_debug_impl_bb(40, 0x4000);
--rtw_debug_impl_bb(41, 0x4100);
--
--static struct rtw_debugfs_priv rtw_debug_priv_rf_dump = {
--	.cb_read = rtw_debug_get_rf_dump,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_tx_pwr_tbl = {
--	.cb_read = rtw_debugfs_get_tx_pwr_tbl,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_write_reg = {
--	.cb_write = rtw_debugfs_set_write_reg,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_h2c = {
--	.cb_write = rtw_debugfs_set_h2c,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_rf_write = {
--	.cb_write = rtw_debugfs_set_rf_write,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_rf_read = {
--	.cb_write = rtw_debugfs_set_rf_read,
--	.cb_read = rtw_debugfs_get_rf_read,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_read_reg = {
--	.cb_write = rtw_debugfs_set_read_reg,
--	.cb_read = rtw_debugfs_get_read_reg,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_fix_rate = {
--	.cb_write = rtw_debugfs_set_fix_rate,
--	.cb_read = rtw_debugfs_get_fix_rate,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_dump_cam = {
--	.cb_write = rtw_debugfs_set_single_input,
--	.cb_read = rtw_debugfs_get_dump_cam,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_rsvd_page = {
--	.cb_write = rtw_debugfs_set_rsvd_page,
--	.cb_read = rtw_debugfs_get_rsvd_page,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_phy_info = {
--	.cb_read = rtw_debugfs_get_phy_info,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_coex_enable = {
--	.cb_write = rtw_debugfs_set_coex_enable,
--	.cb_read = rtw_debugfs_get_coex_enable,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_coex_info = {
--	.cb_read = rtw_debugfs_get_coex_info,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_edcca_enable = {
--	.cb_write = rtw_debugfs_set_edcca_enable,
--	.cb_read = rtw_debugfs_get_edcca_enable,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_fw_crash = {
--	.cb_write = rtw_debugfs_set_fw_crash,
--	.cb_read = rtw_debugfs_get_fw_crash,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_force_lowest_basic_rate = {
--	.cb_write = rtw_debugfs_set_force_lowest_basic_rate,
--	.cb_read = rtw_debugfs_get_force_lowest_basic_rate,
--};
--
--static struct rtw_debugfs_priv rtw_debug_priv_dm_cap = {
--	.cb_write = rtw_debugfs_set_dm_cap,
--	.cb_read = rtw_debugfs_get_dm_cap,
-+#define rtw_debug_priv_get(name)				\
-+{								\
-+	.cb_read = rtw_debugfs_get_ ##name,			\
-+}
-+
-+#define rtw_debug_priv_set(name)				\
-+{								\
-+	.cb_write = rtw_debugfs_set_ ##name,			\
-+}
-+
-+#define rtw_debug_priv_set_and_get(name)			\
-+{								\
-+	.cb_write = rtw_debugfs_set_ ##name,			\
-+	.cb_read = rtw_debugfs_get_ ##name,			\
-+}
-+
-+#define rtw_debug_priv_set_single_and_get(name)			\
-+{								\
-+	.cb_write = rtw_debugfs_set_single_input,		\
-+	.cb_read = rtw_debugfs_get_ ##name,			\
-+}
-+
-+static const struct rtw_debugfs rtw_debugfs_templ = {
-+	.mac_0 = rtw_debug_priv_mac(0x0000),
-+	.mac_1 = rtw_debug_priv_mac(0x0100),
-+	.mac_2 = rtw_debug_priv_mac(0x0200),
-+	.mac_3 = rtw_debug_priv_mac(0x0300),
-+	.mac_4 = rtw_debug_priv_mac(0x0400),
-+	.mac_5 = rtw_debug_priv_mac(0x0500),
-+	.mac_6 = rtw_debug_priv_mac(0x0600),
-+	.mac_7 = rtw_debug_priv_mac(0x0700),
-+	.mac_10 = rtw_debug_priv_mac(0x1000),
-+	.mac_11 = rtw_debug_priv_mac(0x1100),
-+	.mac_12 = rtw_debug_priv_mac(0x1200),
-+	.mac_13 = rtw_debug_priv_mac(0x1300),
-+	.mac_14 = rtw_debug_priv_mac(0x1400),
-+	.mac_15 = rtw_debug_priv_mac(0x1500),
-+	.mac_16 = rtw_debug_priv_mac(0x1600),
-+	.mac_17 = rtw_debug_priv_mac(0x1700),
-+	.bb_8 = rtw_debug_priv_bb(0x0800),
-+	.bb_9 = rtw_debug_priv_bb(0x0900),
-+	.bb_a = rtw_debug_priv_bb(0x0a00),
-+	.bb_b = rtw_debug_priv_bb(0x0b00),
-+	.bb_c = rtw_debug_priv_bb(0x0c00),
-+	.bb_d = rtw_debug_priv_bb(0x0d00),
-+	.bb_e = rtw_debug_priv_bb(0x0e00),
-+	.bb_f = rtw_debug_priv_bb(0x0f00),
-+	.bb_18 = rtw_debug_priv_bb(0x1800),
-+	.bb_19 = rtw_debug_priv_bb(0x1900),
-+	.bb_1a = rtw_debug_priv_bb(0x1a00),
-+	.bb_1b = rtw_debug_priv_bb(0x1b00),
-+	.bb_1c = rtw_debug_priv_bb(0x1c00),
-+	.bb_1d = rtw_debug_priv_bb(0x1d00),
-+	.bb_1e = rtw_debug_priv_bb(0x1e00),
-+	.bb_1f = rtw_debug_priv_bb(0x1f00),
-+	.bb_2c = rtw_debug_priv_bb(0x2c00),
-+	.bb_2d = rtw_debug_priv_bb(0x2d00),
-+	.bb_40 = rtw_debug_priv_bb(0x4000),
-+	.bb_41 = rtw_debug_priv_bb(0x4100),
-+	.rf_dump = rtw_debug_priv_get(rf_dump),
-+	.tx_pwr_tbl = rtw_debug_priv_get(tx_pwr_tbl),
-+	.write_reg = rtw_debug_priv_set(write_reg),
-+	.h2c = rtw_debug_priv_set(h2c),
-+	.rf_write = rtw_debug_priv_set(rf_write),
-+	.rf_read = rtw_debug_priv_set_and_get(rf_read),
-+	.read_reg = rtw_debug_priv_set_and_get(read_reg),
-+	.fix_rate = rtw_debug_priv_set_and_get(fix_rate),
-+	.dump_cam = rtw_debug_priv_set_single_and_get(dump_cam),
-+	.rsvd_page = rtw_debug_priv_set_and_get(rsvd_page),
-+	.phy_info = rtw_debug_priv_get(phy_info),
-+	.coex_enable = rtw_debug_priv_set_and_get(coex_enable),
-+	.coex_info = rtw_debug_priv_get(coex_info),
-+	.edcca_enable = rtw_debug_priv_set_and_get(edcca_enable),
-+	.fw_crash = rtw_debug_priv_set_and_get(fw_crash),
-+	.force_lowest_basic_rate = rtw_debug_priv_set_and_get(force_lowest_basic_rate),
-+	.dm_cap = rtw_debug_priv_set_and_get(dm_cap),
- };
- 
- #define rtw_debugfs_add_core(name, mode, fopname, parent)		\
- 	do {								\
--		rtw_debug_priv_ ##name.rtwdev = rtwdev;			\
-+		struct rtw_debugfs_priv *priv = &rtwdev->debugfs->name;	\
-+		priv->rtwdev = rtwdev;					\
- 		if (IS_ERR(debugfs_create_file(#name, mode,		\
--					 parent, &rtw_debug_priv_ ##name,\
-+					 parent, priv,			\
- 					 &file_ops_ ##fopname)))	\
- 			pr_debug("Unable to initialize debugfs:%s\n",	\
- 			       #name);					\
-@@ -1219,12 +1238,9 @@ static struct rtw_debugfs_priv rtw_debug
- #define rtw_debugfs_add_r(name)						\
- 	rtw_debugfs_add_core(name, S_IFREG | 0444, single_r, debugfs_topdir)
- 
--void rtw_debugfs_init(struct rtw_dev *rtwdev)
-+static
-+void rtw_debugfs_add_basic(struct rtw_dev *rtwdev, struct dentry *debugfs_topdir)
- {
--	struct dentry *debugfs_topdir;
--
--	debugfs_topdir = debugfs_create_dir("rtw88",
--					    rtwdev->hw->wiphy->debugfsdir);
- 	rtw_debugfs_add_w(write_reg);
- 	rtw_debugfs_add_rw(read_reg);
- 	rtw_debugfs_add_w(rf_write);
-@@ -1236,6 +1252,17 @@ void rtw_debugfs_init(struct rtw_dev *rt
- 	rtw_debugfs_add_r(coex_info);
- 	rtw_debugfs_add_rw(coex_enable);
- 	rtw_debugfs_add_w(h2c);
-+	rtw_debugfs_add_r(rf_dump);
-+	rtw_debugfs_add_r(tx_pwr_tbl);
-+	rtw_debugfs_add_rw(edcca_enable);
-+	rtw_debugfs_add_rw(fw_crash);
-+	rtw_debugfs_add_rw(force_lowest_basic_rate);
-+	rtw_debugfs_add_rw(dm_cap);
-+}
-+
-+static
-+void rtw_debugfs_add_sec0(struct rtw_dev *rtwdev, struct dentry *debugfs_topdir)
-+{
- 	rtw_debugfs_add_r(mac_0);
- 	rtw_debugfs_add_r(mac_1);
- 	rtw_debugfs_add_r(mac_2);
-@@ -1252,6 +1279,11 @@ void rtw_debugfs_init(struct rtw_dev *rt
- 	rtw_debugfs_add_r(bb_d);
- 	rtw_debugfs_add_r(bb_e);
- 	rtw_debugfs_add_r(bb_f);
-+}
-+
-+static
-+void rtw_debugfs_add_sec1(struct rtw_dev *rtwdev, struct dentry *debugfs_topdir)
-+{
- 	rtw_debugfs_add_r(mac_10);
- 	rtw_debugfs_add_r(mac_11);
- 	rtw_debugfs_add_r(mac_12);
-@@ -1274,14 +1306,29 @@ void rtw_debugfs_init(struct rtw_dev *rt
- 		rtw_debugfs_add_r(bb_40);
- 		rtw_debugfs_add_r(bb_41);
- 	}
--	rtw_debugfs_add_r(rf_dump);
--	rtw_debugfs_add_r(tx_pwr_tbl);
--	rtw_debugfs_add_rw(edcca_enable);
--	rtw_debugfs_add_rw(fw_crash);
--	rtw_debugfs_add_rw(force_lowest_basic_rate);
--	rtw_debugfs_add_rw(dm_cap);
- }
- 
-+void rtw_debugfs_init(struct rtw_dev *rtwdev)
-+{
-+	struct dentry *debugfs_topdir;
-+
-+	rtwdev->debugfs = kmemdup(&rtw_debugfs_templ, sizeof(rtw_debugfs_templ),
-+				  GFP_KERNEL);
-+	if (!rtwdev->debugfs)
-+		return;
-+
-+	debugfs_topdir = debugfs_create_dir("rtw88",
-+					    rtwdev->hw->wiphy->debugfsdir);
-+
-+	rtw_debugfs_add_basic(rtwdev, debugfs_topdir);
-+	rtw_debugfs_add_sec0(rtwdev, debugfs_topdir);
-+	rtw_debugfs_add_sec1(rtwdev, debugfs_topdir);
-+}
-+
-+void rtw_debugfs_deinit(struct rtw_dev *rtwdev)
-+{
-+	kfree(rtwdev->debugfs);
-+}
- #endif /* CPTCFG_RTW88_DEBUGFS */
- 
- #ifdef CPTCFG_RTW88_DEBUG
---- a/drivers/net/wireless/realtek/rtw88/debug.h
-+++ b/drivers/net/wireless/realtek/rtw88/debug.h
-@@ -34,11 +34,13 @@ enum rtw_debug_mask {
- #ifdef CPTCFG_RTW88_DEBUGFS
- 
- void rtw_debugfs_init(struct rtw_dev *rtwdev);
-+void rtw_debugfs_deinit(struct rtw_dev *rtwdev);
- void rtw_debugfs_get_simple_phy_info(struct seq_file *m);
- 
- #else
- 
- static inline void rtw_debugfs_init(struct rtw_dev *rtwdev) {}
-+static inline void rtw_debugfs_deinit(struct rtw_dev *rtwdev) {}
- 
- #endif /* CPTCFG_RTW88_DEBUGFS */
- 
---- a/drivers/net/wireless/realtek/rtw88/main.c
-+++ b/drivers/net/wireless/realtek/rtw88/main.c
-@@ -2300,6 +2300,7 @@ void rtw_unregister_hw(struct rtw_dev *r
- 
- 	ieee80211_unregister_hw(hw);
- 	rtw_unset_supported_band(hw, chip);
-+	rtw_debugfs_deinit(rtwdev);
- }
- EXPORT_SYMBOL(rtw_unregister_hw);
- 
---- a/drivers/net/wireless/realtek/rtw88/main.h
-+++ b/drivers/net/wireless/realtek/rtw88/main.h
-@@ -50,6 +50,7 @@ extern const struct ieee80211_ops rtw_op
- #define RTW_MAX_CHANNEL_NUM_5G 49
- 
- struct rtw_dev;
-+struct rtw_debugfs;
- 
- enum rtw_hci_type {
- 	RTW_HCI_TYPE_PCIE,
-@@ -2053,7 +2054,7 @@ struct rtw_dev {
- 	bool beacon_loss;
- 	struct completion lps_leave_check;
- 
--	struct dentry *debugfs;
-+	struct rtw_debugfs *debugfs;
- 
- 	u8 sta_cnt;
- 	u32 rts_threshold;
diff --git a/package/kernel/mac80211/patches/rtl/005-v6.12-wifi-rtw88-select-WANT_DEV_COREDUMP.patch b/package/kernel/mac80211/patches/rtl/005-v6.12-wifi-rtw88-select-WANT_DEV_COREDUMP.patch
deleted file mode 100644
index 6c31b5e848..0000000000
--- a/package/kernel/mac80211/patches/rtl/005-v6.12-wifi-rtw88-select-WANT_DEV_COREDUMP.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 7e989b0c1e33210c07340bf5228aa83ea52515b5 Mon Sep 17 00:00:00 2001
-From: Zong-Zhe Yang <kevin_yang at realtek.com>
-Date: Thu, 18 Jul 2024 15:06:15 +0800
-Subject: [PATCH] wifi: rtw88: select WANT_DEV_COREDUMP
-
-We have invoked device coredump when fw crash.
-Should select WANT_DEV_COREDUMP by ourselves.
-
-Signed-off-by: Zong-Zhe Yang <kevin_yang at realtek.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/20240718070616.42217-1-pkshih at realtek.com
----
- drivers/net/wireless/realtek/rtw88/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/wireless/realtek/rtw88/Kconfig
-+++ b/drivers/net/wireless/realtek/rtw88/Kconfig
-@@ -14,6 +14,7 @@ if RTW88
- config RTW88_CORE
- 	tristate
- 	depends on m
-+	select BPAUTO_WANT_DEV_COREDUMP
- 
- config RTW88_PCI
- 	tristate
diff --git a/package/kernel/mac80211/patches/rtl/008-v6.12-wifi-rtw88-8822c-Parse-channel-from-IE-to-correct-in.patch b/package/kernel/mac80211/patches/rtl/008-v6.12-wifi-rtw88-8822c-Parse-channel-from-IE-to-correct-in.patch
deleted file mode 100644
index a304cd7d05..0000000000
--- a/package/kernel/mac80211/patches/rtl/008-v6.12-wifi-rtw88-8822c-Parse-channel-from-IE-to-correct-in.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 53ed4b25a79aeec5991c2dc579e635b136ef7676 Mon Sep 17 00:00:00 2001
-From: Po-Hao Huang <phhuang at realtek.com>
-Date: Wed, 24 Jul 2024 13:05:01 +0800
-Subject: [PATCH] wifi: rtw88: 8822c: Parse channel from IE to correct invalid
- hardware reports
-
-For CCK packets we could get incorrect reports from hardware.
-And this causes wrong frequencies being reported. Parse the channel
-information from IE if provided by AP to fix this.
-
-Signed-off-by: Po-Hao Huang <phhuang at realtek.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/20240724050501.7550-1-pkshih at realtek.com
----
- drivers/net/wireless/realtek/rtw88/main.h     |  1 +
- drivers/net/wireless/realtek/rtw88/pci.c      |  1 +
- drivers/net/wireless/realtek/rtw88/rtw8822c.c |  7 ++--
- drivers/net/wireless/realtek/rtw88/rx.c       | 41 +++++++++++++++++++
- drivers/net/wireless/realtek/rtw88/rx.h       | 13 ++++++
- drivers/net/wireless/realtek/rtw88/sdio.c     |  1 +
- drivers/net/wireless/realtek/rtw88/usb.c      |  2 +
- 7 files changed, 63 insertions(+), 3 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/main.h
-+++ b/drivers/net/wireless/realtek/rtw88/main.h
-@@ -623,6 +623,7 @@ struct rtw_rx_pkt_stat {
- 	bool crc_err;
- 	bool decrypted;
- 	bool is_c2h;
-+	bool channel_invalid;
- 
- 	s32 signal_power;
- 	u16 pkt_len;
---- a/drivers/net/wireless/realtek/rtw88/pci.c
-+++ b/drivers/net/wireless/realtek/rtw88/pci.c
-@@ -1088,6 +1088,7 @@ static u32 rtw_pci_rx_napi(struct rtw_de
- 			/* remove rx_desc */
- 			skb_pull(new, pkt_offset);
- 
-+			rtw_update_rx_freq_for_invalid(rtwdev, new, &rx_status, &pkt_stat);
- 			rtw_rx_stats(rtwdev, pkt_stat.vif, new);
- 			memcpy(new->cb, &rx_status, sizeof(rx_status));
- 			ieee80211_rx_napi(rtwdev->hw, NULL, new, napi);
---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c
-+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c
-@@ -2576,9 +2576,10 @@ static void query_phy_status_page0(struc
- 	rx_power[RF_PATH_B] -= 110;
- 
- 	channel = GET_PHY_STAT_P0_CHANNEL(phy_status);
--	if (channel == 0)
--		channel = rtwdev->hal.current_channel;
--	rtw_set_rx_freq_band(pkt_stat, channel);
-+	if (channel != 0)
-+		rtw_set_rx_freq_band(pkt_stat, channel);
-+	else
-+		pkt_stat->channel_invalid = true;
- 
- 	pkt_stat->rx_power[RF_PATH_A] = rx_power[RF_PATH_A];
- 	pkt_stat->rx_power[RF_PATH_B] = rx_power[RF_PATH_B];
---- a/drivers/net/wireless/realtek/rtw88/rx.c
-+++ b/drivers/net/wireless/realtek/rtw88/rx.c
-@@ -146,6 +146,47 @@ static void rtw_set_rx_freq_by_pktstat(s
- 	rx_status->band = pkt_stat->band;
- }
- 
-+void rtw_update_rx_freq_from_ie(struct rtw_dev *rtwdev, struct sk_buff *skb,
-+				struct ieee80211_rx_status *rx_status,
-+				struct rtw_rx_pkt_stat *pkt_stat)
-+{
-+	struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
-+	int channel = rtwdev->hal.current_channel;
-+	size_t hdr_len, ielen;
-+	int channel_number;
-+	u8 *variable;
-+
-+	if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
-+		goto fill_rx_status;
-+
-+	if (ieee80211_is_beacon(mgmt->frame_control)) {
-+		variable = mgmt->u.beacon.variable;
-+		hdr_len = offsetof(struct ieee80211_mgmt,
-+				   u.beacon.variable);
-+	} else if (ieee80211_is_probe_resp(mgmt->frame_control)) {
-+		variable = mgmt->u.probe_resp.variable;
-+		hdr_len = offsetof(struct ieee80211_mgmt,
-+				   u.probe_resp.variable);
-+	} else {
-+		goto fill_rx_status;
-+	}
-+
-+	if (skb->len > hdr_len)
-+		ielen = skb->len - hdr_len;
-+	else
-+		goto fill_rx_status;
-+
-+	channel_number = cfg80211_get_ies_channel_number(variable, ielen,
-+							 NL80211_BAND_2GHZ);
-+	if (channel_number != -1)
-+		channel = channel_number;
-+
-+fill_rx_status:
-+	rtw_set_rx_freq_band(pkt_stat, channel);
-+	rtw_set_rx_freq_by_pktstat(pkt_stat, rx_status);
-+}
-+EXPORT_SYMBOL(rtw_update_rx_freq_from_ie);
-+
- void rtw_rx_fill_rx_status(struct rtw_dev *rtwdev,
- 			   struct rtw_rx_pkt_stat *pkt_stat,
- 			   struct ieee80211_hdr *hdr,
---- a/drivers/net/wireless/realtek/rtw88/rx.h
-+++ b/drivers/net/wireless/realtek/rtw88/rx.h
-@@ -50,5 +50,18 @@ void rtw_rx_fill_rx_status(struct rtw_de
- 			   struct ieee80211_hdr *hdr,
- 			   struct ieee80211_rx_status *rx_status,
- 			   u8 *phy_status);
-+void rtw_update_rx_freq_from_ie(struct rtw_dev *rtwdev, struct sk_buff *skb,
-+				struct ieee80211_rx_status *rx_status,
-+				struct rtw_rx_pkt_stat *pkt_stat);
-+
-+static inline
-+void rtw_update_rx_freq_for_invalid(struct rtw_dev *rtwdev, struct sk_buff *skb,
-+				    struct ieee80211_rx_status *rx_status,
-+				    struct rtw_rx_pkt_stat *pkt_stat)
-+{
-+	if (pkt_stat->channel_invalid)
-+		rtw_update_rx_freq_from_ie(rtwdev, skb, rx_status, pkt_stat);
-+}
-+
- 
- #endif
---- a/drivers/net/wireless/realtek/rtw88/sdio.c
-+++ b/drivers/net/wireless/realtek/rtw88/sdio.c
-@@ -948,6 +948,7 @@ static void rtw_sdio_rx_skb(struct rtw_d
- 	skb_put(skb, pkt_stat->pkt_len);
- 	skb_reserve(skb, pkt_offset);
- 
-+	rtw_update_rx_freq_for_invalid(rtwdev, skb, rx_status, pkt_stat);
- 	rtw_rx_stats(rtwdev, pkt_stat->vif, skb);
- 
- 	ieee80211_rx_irqsafe(rtwdev->hw, skb);
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -579,6 +579,8 @@ static void rtw_usb_rx_handler(struct wo
- 
- 		skb_put(skb, pkt_stat.pkt_len);
- 		skb_reserve(skb, pkt_offset);
-+
-+		rtw_update_rx_freq_for_invalid(rtwdev, skb, &rx_status, &pkt_stat);
- 		memcpy(skb->cb, &rx_status, sizeof(rx_status));
- 		ieee80211_rx_irqsafe(rtwdev->hw, skb);
- 	}
diff --git a/package/kernel/mac80211/patches/rtl/010-v6.12-wifi-rtw88-usb-Init-RX-burst-length-according-to-USB.patch b/package/kernel/mac80211/patches/rtl/010-v6.12-wifi-rtw88-usb-Init-RX-burst-length-according-to-USB.patch
deleted file mode 100644
index 191c87ff37..0000000000
--- a/package/kernel/mac80211/patches/rtl/010-v6.12-wifi-rtw88-usb-Init-RX-burst-length-according-to-USB.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From fbbd8cb347e25b68d25c4f3871821afc495ee7a9 Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Thu, 8 Aug 2024 01:19:36 +0300
-Subject: [PATCH] wifi: rtw88: usb: Init RX burst length according to USB speed
-
-This is needed in order to make USB RX aggregation work with RTL8811CU
-(and presumably RTL8822BU and RTL8822CU also).
-
-I don't know what BIT_DMA_BURST_CNT, BIT_DMA_MODE, and BIT_DROP_DATA_EN
-are doing.
-
-Tested with RTL8822CU, RTL8811CU, and RTL8723DU.
-
-The RX speed is unchanged in my tests.
-
-Tested-by: Sascha Hauer <s.hauer at pengutronix.de>
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/ac569c6f-7129-4341-b523-901fe10cabff at gmail.com
----
- drivers/net/wireless/realtek/rtw88/reg.h |  6 ++++++
- drivers/net/wireless/realtek/rtw88/usb.c | 23 ++++++++++++++++++++++-
- 2 files changed, 28 insertions(+), 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtw88/reg.h
-+++ b/drivers/net/wireless/realtek/rtw88/reg.h
-@@ -322,6 +322,12 @@
- #define REG_RXDMA_DPR		0x028C
- #define REG_RXDMA_MODE		0x0290
- #define BIT_DMA_MODE		BIT(1)
-+#define BIT_DMA_BURST_CNT	GENMASK(3, 2)
-+#define BIT_DMA_BURST_SIZE	GENMASK(5, 4)
-+#define BIT_DMA_BURST_SIZE_64	2
-+#define BIT_DMA_BURST_SIZE_512	1
-+#define BIT_DMA_BURST_SIZE_1024	0
-+
- #define REG_RXPKTNUM		0x02B0
- 
- #define REG_INT_MIG		0x0304
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -720,9 +720,30 @@ static void rtw_usb_link_ps(struct rtw_d
- 	/* empty function for rtw_hci_ops */
- }
- 
-+static void rtw_usb_init_burst_pkt_len(struct rtw_dev *rtwdev)
-+{
-+	struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev);
-+	enum usb_device_speed speed = rtwusb->udev->speed;
-+	u8 rxdma, burst_size;
-+
-+	rxdma = BIT_DMA_BURST_CNT | BIT_DMA_MODE;
-+
-+	if (speed == USB_SPEED_SUPER)
-+		burst_size = BIT_DMA_BURST_SIZE_1024;
-+	else if (speed == USB_SPEED_HIGH)
-+		burst_size = BIT_DMA_BURST_SIZE_512;
-+	else
-+		burst_size = BIT_DMA_BURST_SIZE_64;
-+
-+	u8p_replace_bits(&rxdma, burst_size, BIT_DMA_BURST_SIZE);
-+
-+	rtw_write8(rtwdev, REG_RXDMA_MODE, rxdma);
-+	rtw_write16_set(rtwdev, REG_TXDMA_OFFSET_CHK, BIT_DROP_DATA_EN);
-+}
-+
- static void rtw_usb_interface_cfg(struct rtw_dev *rtwdev)
- {
--	/* empty function for rtw_hci_ops */
-+	rtw_usb_init_burst_pkt_len(rtwdev);
- }
- 
- static struct rtw_hci_ops rtw_usb_ops = {
diff --git a/package/kernel/mac80211/patches/rtl/011-v6.12-wifi-rtw88-usb-Update-the-RX-stats-after-every-frame.patch b/package/kernel/mac80211/patches/rtl/011-v6.12-wifi-rtw88-usb-Update-the-RX-stats-after-every-frame.patch
deleted file mode 100644
index f78f43b464..0000000000
--- a/package/kernel/mac80211/patches/rtl/011-v6.12-wifi-rtw88-usb-Update-the-RX-stats-after-every-frame.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 38ea04a79ad0f8cc30bb5e9ad98d665e4ae5060c Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Thu, 8 Aug 2024 01:20:36 +0300
-Subject: [PATCH] wifi: rtw88: usb: Update the RX stats after every frame
-
-Update the number of received unicast data frames and bytes every time
-a frame is received. This is what the PCI and SDIO drivers do.
-
-This has an influence on the power saving, bluetooth coexistence, and
-(in a future patch) the use of RX aggregation.
-
-Tested with RTL8822CU, RTL8811CU, and RTL8723DU.
-
-Tested-by: Sascha Hauer <s.hauer at pengutronix.de>
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/75a2ca52-8f01-45c5-926f-d3a68ae3b284 at gmail.com
----
- drivers/net/wireless/realtek/rtw88/usb.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -581,6 +581,7 @@ static void rtw_usb_rx_handler(struct wo
- 		skb_reserve(skb, pkt_offset);
- 
- 		rtw_update_rx_freq_for_invalid(rtwdev, skb, &rx_status, &pkt_stat);
-+		rtw_rx_stats(rtwdev, pkt_stat.vif, skb);
- 		memcpy(skb->cb, &rx_status, sizeof(rx_status));
- 		ieee80211_rx_irqsafe(rtwdev->hw, skb);
- 	}
diff --git a/package/kernel/mac80211/patches/rtl/012-v6.12-wifi-rtw88-usb-Support-RX-aggregation.patch b/package/kernel/mac80211/patches/rtl/012-v6.12-wifi-rtw88-usb-Support-RX-aggregation.patch
deleted file mode 100644
index bc8eac898b..0000000000
--- a/package/kernel/mac80211/patches/rtl/012-v6.12-wifi-rtw88-usb-Support-RX-aggregation.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From df3d8f463b1dfc7cb8f4fb52b1b81d290b850d03 Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Thu, 8 Aug 2024 01:21:36 +0300
-Subject: [PATCH] wifi: rtw88: usb: Support RX aggregation
-
-The chips can be configured to aggregate several frames into a single
-USB transfer. Modify rtw_usb_rx_handler() to support this case.
-
-RX aggregation improves the RX speed of RTL8811CU on certain ARM
-systems, like the NanoPi NEO Core2. It also improves the RX speed of
-RTL8822CU on some x86_64 systems.
-
-Currently none of the chips are configured to aggregate frames.
-
-Tested with RTL8822CU, RTL8811CU, and RTL8723DU.
-
-Reviewed-by: Sascha Hauer <s.hauer at pengutronix.de>
-Tested-by: Sascha Hauer <s.hauer at pengutronix.de>
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/f845826d-de71-492d-9a22-e48c07989a1f at gmail.com
----
- drivers/net/wireless/realtek/rtw88/usb.c | 61 ++++++++++++++++--------
- 1 file changed, 40 insertions(+), 21 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -546,11 +546,12 @@ static void rtw_usb_rx_handler(struct wo
- 	struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, rx_work);
- 	struct rtw_dev *rtwdev = rtwusb->rtwdev;
- 	const struct rtw_chip_info *chip = rtwdev->chip;
--	struct rtw_rx_pkt_stat pkt_stat;
-+	u32 pkt_desc_sz = chip->rx_pkt_desc_sz;
- 	struct ieee80211_rx_status rx_status;
-+	u32 pkt_offset, next_pkt, urb_len;
-+	struct rtw_rx_pkt_stat pkt_stat;
-+	struct sk_buff *next_skb;
- 	struct sk_buff *skb;
--	u32 pkt_desc_sz = chip->rx_pkt_desc_sz;
--	u32 pkt_offset;
- 	u8 *rx_desc;
- 	int limit;
- 
-@@ -559,31 +560,48 @@ static void rtw_usb_rx_handler(struct wo
- 		if (!skb)
- 			break;
- 
--		rx_desc = skb->data;
--		chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat,
--					 &rx_status);
--		pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz +
--			     pkt_stat.shift;
--
--		if (pkt_stat.is_c2h) {
--			skb_put(skb, pkt_stat.pkt_len + pkt_offset);
--			rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb);
--			continue;
--		}
--
- 		if (skb_queue_len(&rtwusb->rx_queue) >= RTW_USB_MAX_RXQ_LEN) {
- 			dev_dbg_ratelimited(rtwdev->dev, "failed to get rx_queue, overflow\n");
- 			dev_kfree_skb_any(skb);
- 			continue;
- 		}
- 
--		skb_put(skb, pkt_stat.pkt_len);
--		skb_reserve(skb, pkt_offset);
-+		urb_len = skb->len;
-+
-+		do {
-+			rx_desc = skb->data;
-+			chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat,
-+						 &rx_status);
-+			pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz +
-+				     pkt_stat.shift;
-+
-+			next_pkt = round_up(pkt_stat.pkt_len + pkt_offset, 8);
-+
-+			if (urb_len >= next_pkt + pkt_desc_sz)
-+				next_skb = skb_clone(skb, GFP_KERNEL);
-+			else
-+				next_skb = NULL;
-+
-+			if (pkt_stat.is_c2h) {
-+				skb_trim(skb, pkt_stat.pkt_len + pkt_offset);
-+				rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb);
-+			} else {
-+				skb_pull(skb, pkt_offset);
-+				skb_trim(skb, pkt_stat.pkt_len);
-+				rtw_update_rx_freq_for_invalid(rtwdev, skb,
-+							       &rx_status,
-+							       &pkt_stat);
-+				rtw_rx_stats(rtwdev, pkt_stat.vif, skb);
-+				memcpy(skb->cb, &rx_status, sizeof(rx_status));
-+				ieee80211_rx_irqsafe(rtwdev->hw, skb);
-+			}
-+
-+			skb = next_skb;
-+			if (skb)
-+				skb_pull(skb, next_pkt);
- 
--		rtw_update_rx_freq_for_invalid(rtwdev, skb, &rx_status, &pkt_stat);
--		rtw_rx_stats(rtwdev, pkt_stat.vif, skb);
--		memcpy(skb->cb, &rx_status, sizeof(rx_status));
--		ieee80211_rx_irqsafe(rtwdev->hw, skb);
-+			urb_len -= next_pkt;
-+		} while (skb);
- 	}
- }
- 
-@@ -627,6 +645,7 @@ static void rtw_usb_read_port_complete(s
- 			if (skb)
- 				dev_kfree_skb_any(skb);
- 		} else {
-+			skb_put(skb, urb->actual_length);
- 			skb_queue_tail(&rtwusb->rx_queue, skb);
- 			queue_work(rtwusb->rxwq, &rtwusb->rx_work);
- 		}
diff --git a/package/kernel/mac80211/patches/rtl/013-v6.12-wifi-rtw88-Enable-USB-RX-aggregation-for-8822c-8822b.patch b/package/kernel/mac80211/patches/rtl/013-v6.12-wifi-rtw88-Enable-USB-RX-aggregation-for-8822c-8822b.patch
deleted file mode 100644
index 71175324e6..0000000000
--- a/package/kernel/mac80211/patches/rtl/013-v6.12-wifi-rtw88-Enable-USB-RX-aggregation-for-8822c-8822b.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From 002a5db9a52a0e7af0fa9a450d31049748435748 Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Thu, 8 Aug 2024 01:23:06 +0300
-Subject: [PATCH] wifi: rtw88: Enable USB RX aggregation for 8822c/8822b/8821c
-
-Enable USB RX aggregation when there is at least 1 Mbps RX or TX
-traffic, otherwise disable it.
-
-USB RX aggregation improves the RX speed of RTL8811CU on certain ARM
-systems, like the NanoPi NEO Core2. Before: 28 Mbps, after: 231 Mbps.
-
-It also improves the RX speed of RTL8822CU on some x86_64 systems.
-Before: ~200 Mbps, after: ~300 Mbps.
-
-The official drivers for these chips use the same logic for SDIO, but
-for some reason the SDIO driver in rtw88 always enables RX aggregation,
-so this patch only toggles aggregation for USB devices.
-
-RTL8703B is likely not found in USB devices, and RTL8723DU doesn't like
-aggregation.
-
-Tested-by: Sascha Hauer <s.hauer at pengutronix.de>
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/b4c0d54c-6755-4b0f-9dd7-f9196fd74b68 at gmail.com
----
- drivers/net/wireless/realtek/rtw88/hci.h  |  7 ++++
- drivers/net/wireless/realtek/rtw88/main.c | 13 +++++---
- drivers/net/wireless/realtek/rtw88/pci.c  |  1 +
- drivers/net/wireless/realtek/rtw88/sdio.c |  1 +
- drivers/net/wireless/realtek/rtw88/usb.c  | 40 +++++++++++++++++++++++
- 5 files changed, 58 insertions(+), 4 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/hci.h
-+++ b/drivers/net/wireless/realtek/rtw88/hci.h
-@@ -18,6 +18,7 @@ struct rtw_hci_ops {
- 	void (*deep_ps)(struct rtw_dev *rtwdev, bool enter);
- 	void (*link_ps)(struct rtw_dev *rtwdev, bool enter);
- 	void (*interface_cfg)(struct rtw_dev *rtwdev);
-+	void (*dynamic_rx_agg)(struct rtw_dev *rtwdev, bool enable);
- 
- 	int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
- 	int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
-@@ -72,6 +73,12 @@ static inline void rtw_hci_interface_cfg
- 	rtwdev->hci.ops->interface_cfg(rtwdev);
- }
- 
-+static inline void rtw_hci_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
-+{
-+	if (rtwdev->hci.ops->dynamic_rx_agg)
-+		rtwdev->hci.ops->dynamic_rx_agg(rtwdev, enable);
-+}
-+
- static inline int
- rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
- {
---- a/drivers/net/wireless/realtek/rtw88/main.c
-+++ b/drivers/net/wireless/realtek/rtw88/main.c
-@@ -212,6 +212,7 @@ static void rtw_watch_dog_work(struct wo
- 	struct rtw_traffic_stats *stats = &rtwdev->stats;
- 	struct rtw_watch_dog_iter_data data = {};
- 	bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
-+	u32 tx_unicast_mbps, rx_unicast_mbps;
- 	bool ps_active;
- 
- 	mutex_lock(&rtwdev->mutex);
-@@ -236,10 +237,11 @@ static void rtw_watch_dog_work(struct wo
- 	else
- 		ps_active = false;
- 
--	ewma_tp_add(&stats->tx_ewma_tp,
--		    (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
--	ewma_tp_add(&stats->rx_ewma_tp,
--		    (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
-+	tx_unicast_mbps = stats->tx_unicast >> RTW_TP_SHIFT;
-+	rx_unicast_mbps = stats->rx_unicast >> RTW_TP_SHIFT;
-+
-+	ewma_tp_add(&stats->tx_ewma_tp, tx_unicast_mbps);
-+	ewma_tp_add(&stats->rx_ewma_tp, rx_unicast_mbps);
- 	stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
- 	stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
- 
-@@ -259,6 +261,9 @@ static void rtw_watch_dog_work(struct wo
- 
- 	rtw_phy_dynamic_mechanism(rtwdev);
- 
-+	rtw_hci_dynamic_rx_agg(rtwdev,
-+			       tx_unicast_mbps >= 1 || rx_unicast_mbps >= 1);
-+
- 	data.rtwdev = rtwdev;
- 	/* rtw_iterate_vifs internally uses an atomic iterator which is needed
- 	 * to avoid taking local->iflist_mtx mutex
---- a/drivers/net/wireless/realtek/rtw88/pci.c
-+++ b/drivers/net/wireless/realtek/rtw88/pci.c
-@@ -1601,6 +1601,7 @@ static struct rtw_hci_ops rtw_pci_ops =
- 	.deep_ps = rtw_pci_deep_ps,
- 	.link_ps = rtw_pci_link_ps,
- 	.interface_cfg = rtw_pci_interface_cfg,
-+	.dynamic_rx_agg = NULL,
- 
- 	.read8 = rtw_pci_read8,
- 	.read16 = rtw_pci_read16,
---- a/drivers/net/wireless/realtek/rtw88/sdio.c
-+++ b/drivers/net/wireless/realtek/rtw88/sdio.c
-@@ -1157,6 +1157,7 @@ static struct rtw_hci_ops rtw_sdio_ops =
- 	.deep_ps = rtw_sdio_deep_ps,
- 	.link_ps = rtw_sdio_link_ps,
- 	.interface_cfg = rtw_sdio_interface_cfg,
-+	.dynamic_rx_agg = NULL,
- 
- 	.read8 = rtw_sdio_read8,
- 	.read16 = rtw_sdio_read16,
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -766,6 +766,45 @@ static void rtw_usb_interface_cfg(struct
- 	rtw_usb_init_burst_pkt_len(rtwdev);
- }
- 
-+static void rtw_usb_dynamic_rx_agg_v1(struct rtw_dev *rtwdev, bool enable)
-+{
-+	u8 size, timeout;
-+	u16 val16;
-+
-+	rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC);
-+	rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN);
-+	rtw_write8_clr(rtwdev, REG_RXDMA_AGG_PG_TH + 3, BIT(7));
-+
-+	if (enable) {
-+		size = 0x5;
-+		timeout = 0x20;
-+	} else {
-+		size = 0x0;
-+		timeout = 0x1;
-+	}
-+	val16 = u16_encode_bits(size, BIT_RXDMA_AGG_PG_TH) |
-+		u16_encode_bits(timeout, BIT_DMA_AGG_TO_V1);
-+
-+	rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, val16);
-+}
-+
-+static void rtw_usb_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
-+{
-+	switch (rtwdev->chip->id) {
-+	case RTW_CHIP_TYPE_8822C:
-+	case RTW_CHIP_TYPE_8822B:
-+	case RTW_CHIP_TYPE_8821C:
-+		rtw_usb_dynamic_rx_agg_v1(rtwdev, enable);
-+		break;
-+	case RTW_CHIP_TYPE_8723D:
-+		/* Doesn't like aggregation. */
-+		break;
-+	case RTW_CHIP_TYPE_8703B:
-+		/* Likely not found in USB devices. */
-+		break;
-+	}
-+}
-+
- static struct rtw_hci_ops rtw_usb_ops = {
- 	.tx_write = rtw_usb_tx_write,
- 	.tx_kick_off = rtw_usb_tx_kick_off,
-@@ -775,6 +814,7 @@ static struct rtw_hci_ops rtw_usb_ops =
- 	.deep_ps = rtw_usb_deep_ps,
- 	.link_ps = rtw_usb_link_ps,
- 	.interface_cfg = rtw_usb_interface_cfg,
-+	.dynamic_rx_agg = rtw_usb_dynamic_rx_agg,
- 
- 	.write8  = rtw_usb_write8,
- 	.write16 = rtw_usb_write16,
diff --git a/package/kernel/mac80211/patches/rtl/016-v6.12-wifi-rtw88-assign-mac_id-for-vif-sta-and-update-to-T.patch b/package/kernel/mac80211/patches/rtl/016-v6.12-wifi-rtw88-assign-mac_id-for-vif-sta-and-update-to-T.patch
deleted file mode 100644
index ce110c5c90..0000000000
--- a/package/kernel/mac80211/patches/rtl/016-v6.12-wifi-rtw88-assign-mac_id-for-vif-sta-and-update-to-T.patch
+++ /dev/null
@@ -1,231 +0,0 @@
-From 902cb7b11f9a7ff07233cc4c626b54c3e4703149 Mon Sep 17 00:00:00 2001
-From: Ping-Ke Shih <pkshih at realtek.com>
-Date: Mon, 19 Aug 2024 10:52:48 +0800
-Subject: [PATCH] wifi: rtw88: assign mac_id for vif/sta and update to TX desc
-
-A mac_id as an instance in firmware has to be assigned for each station
-including AP and connected stations. Firmware will use the mac_id to
-control TX rate and do statistics.
-
-Assignment rule is to assign mac_id to each vif when adding vif.
-For station mode, sta->mac_id will reuse vif->mac_id. For AP mode,
-dynamically allocate an sta->mac_id to a station, and vif->mac_id is
-used to send broadcast/multicast packets which are not belong to
-a station. For example,
-
-                  vif->mac_id      sta->mac_id
-vif0 (STA mode)        0               0
-vif1 (AP mode)         1               2...
-
-By the way, remove unused RTW_BC_MC_MACID, which was planed to send
-broadcast/multicast packets on fixed mac_id.
-
-Tested-on RTL8822CE with STA + AP SCC mode.
-
-Link: https://lore.kernel.org/linux-wireless/e4be0a75-43b2-4ae5-9aab-5c4a88e78097 at gmail.com/
-Cc: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Signed-off-by: Ping-Ke Shih <pkshih at realtek.com>
-Link: https://patch.msgid.link/20240819025248.17939-1-pkshih at realtek.com
----
- drivers/net/wireless/realtek/rtw88/mac80211.c | 13 ++++++--
- drivers/net/wireless/realtek/rtw88/main.c     | 30 ++++++++-----------
- drivers/net/wireless/realtek/rtw88/main.h     | 14 +++++++--
- drivers/net/wireless/realtek/rtw88/tx.c       | 11 +++++--
- drivers/net/wireless/realtek/rtw88/tx.h       |  1 +
- 5 files changed, 44 insertions(+), 25 deletions(-)
-
---- a/drivers/net/wireless/realtek/rtw88/mac80211.c
-+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c
-@@ -167,6 +167,12 @@ static int rtw_ops_add_interface(struct
- 
- 	mutex_lock(&rtwdev->mutex);
- 
-+	rtwvif->mac_id = rtw_acquire_macid(rtwdev);
-+	if (rtwvif->mac_id >= RTW_MAX_MAC_ID_NUM) {
-+		mutex_unlock(&rtwdev->mutex);
-+		return -ENOSPC;
-+	}
-+
- 	port = find_first_zero_bit(rtwdev->hw_port, RTW_PORT_NUM);
- 	if (port >= RTW_PORT_NUM) {
- 		mutex_unlock(&rtwdev->mutex);
-@@ -214,7 +220,8 @@ static int rtw_ops_add_interface(struct
- 
- 	mutex_unlock(&rtwdev->mutex);
- 
--	rtw_dbg(rtwdev, RTW_DBG_STATE, "start vif %pM on port %d\n", vif->addr, rtwvif->port);
-+	rtw_dbg(rtwdev, RTW_DBG_STATE, "start vif %pM mac_id %d on port %d\n",
-+		vif->addr, rtwvif->mac_id, rtwvif->port);
- 	return 0;
- }
- 
-@@ -225,7 +232,8 @@ static void rtw_ops_remove_interface(str
- 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
- 	u32 config = 0;
- 
--	rtw_dbg(rtwdev, RTW_DBG_STATE, "stop vif %pM on port %d\n", vif->addr, rtwvif->port);
-+	rtw_dbg(rtwdev, RTW_DBG_STATE, "stop vif %pM mac_id %d on port %d\n",
-+		vif->addr, rtwvif->mac_id, rtwvif->port);
- 
- 	mutex_lock(&rtwdev->mutex);
- 
-@@ -242,6 +250,7 @@ static void rtw_ops_remove_interface(str
- 	config |= PORT_SET_BCN_CTRL;
- 	rtw_vif_port_config(rtwdev, rtwvif, config);
- 	clear_bit(rtwvif->port, rtwdev->hw_port);
-+	rtw_release_macid(rtwdev, rtwvif->mac_id);
- 	rtw_recalc_lps(rtwdev, NULL);
- 
- 	mutex_unlock(&rtwdev->mutex);
---- a/drivers/net/wireless/realtek/rtw88/main.c
-+++ b/drivers/net/wireless/realtek/rtw88/main.c
-@@ -311,17 +311,6 @@ static void rtw_ips_work(struct work_str
- 	mutex_unlock(&rtwdev->mutex);
- }
- 
--static u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
--{
--	unsigned long mac_id;
--
--	mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
--	if (mac_id < RTW_MAX_MAC_ID_NUM)
--		set_bit(mac_id, rtwdev->mac_id_map);
--
--	return mac_id;
--}
--
- static void rtw_sta_rc_work(struct work_struct *work)
- {
- 	struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
-@@ -340,12 +329,14 @@ int rtw_sta_add(struct rtw_dev *rtwdev,
- 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
- 	int i;
- 
--	si->mac_id = rtw_acquire_macid(rtwdev);
--	if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
--		return -ENOSPC;
-+	if (vif->type == NL80211_IFTYPE_STATION) {
-+		si->mac_id = rtwvif->mac_id;
-+	} else {
-+		si->mac_id = rtw_acquire_macid(rtwdev);
-+		if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
-+			return -ENOSPC;
-+	}
- 
--	if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0)
--		rtwvif->mac_id = si->mac_id;
- 	si->rtwdev = rtwdev;
- 	si->sta = sta;
- 	si->vif = vif;
-@@ -370,11 +361,13 @@ void rtw_sta_remove(struct rtw_dev *rtwd
- 		    bool fw_exist)
- {
- 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
-+	struct ieee80211_vif *vif = si->vif;
- 	int i;
- 
- 	cancel_work_sync(&si->rc_work);
- 
--	rtw_release_macid(rtwdev, si->mac_id);
-+	if (vif->type != NL80211_IFTYPE_STATION)
-+		rtw_release_macid(rtwdev, si->mac_id);
- 	if (fw_exist)
- 		rtw_fw_media_status_report(rtwdev, si->mac_id, false);
- 
-@@ -614,6 +607,8 @@ static void rtw_reset_vif_iter(void *dat
- 	rtw_bf_disassoc(rtwdev, vif, NULL);
- 	rtw_vif_assoc_changed(rtwvif, NULL);
- 	rtw_txq_cleanup(rtwdev, vif->txq);
-+
-+	rtw_release_macid(rtwdev, rtwvif->mac_id);
- }
- 
- void rtw_fw_recovery(struct rtw_dev *rtwdev)
-@@ -2139,7 +2134,6 @@ int rtw_core_init(struct rtw_dev *rtwdev
- 	rtwdev->sec.total_cam_num = 32;
- 	rtwdev->hal.current_channel = 1;
- 	rtwdev->dm_info.fix_rate = U8_MAX;
--	set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
- 
- 	rtw_stats_init(rtwdev);
- 
---- a/drivers/net/wireless/realtek/rtw88/main.h
-+++ b/drivers/net/wireless/realtek/rtw88/main.h
-@@ -742,7 +742,6 @@ struct rtw_txq {
- 	unsigned long flags;
- };
- 
--#define RTW_BC_MC_MACID 1
- DECLARE_EWMA(rssi, 10, 16);
- 
- struct rtw_sta_info {
-@@ -805,7 +804,7 @@ struct rtw_bf_info {
- struct rtw_vif {
- 	enum rtw_net_type net_type;
- 	u16 aid;
--	u8 mac_id; /* for STA mode only */
-+	u8 mac_id;
- 	u8 mac_addr[ETH_ALEN];
- 	u8 bssid[ETH_ALEN];
- 	u8 port;
-@@ -2131,6 +2130,17 @@ static inline bool rtw_chip_has_tx_stbc(
- 	return rtwdev->chip->tx_stbc;
- }
- 
-+static inline u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
-+{
-+	unsigned long mac_id;
-+
-+	mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
-+	if (mac_id < RTW_MAX_MAC_ID_NUM)
-+		set_bit(mac_id, rtwdev->mac_id_map);
-+
-+	return mac_id;
-+}
-+
- static inline void rtw_release_macid(struct rtw_dev *rtwdev, u8 mac_id)
- {
- 	clear_bit(mac_id, rtwdev->mac_id_map);
---- a/drivers/net/wireless/realtek/rtw88/tx.c
-+++ b/drivers/net/wireless/realtek/rtw88/tx.c
-@@ -46,7 +46,8 @@ void rtw_tx_fill_tx_desc(struct rtw_tx_p
- 		      le32_encode_bits(pkt_info->ls, RTW_TX_DESC_W0_LS) |
- 		      le32_encode_bits(pkt_info->dis_qselseq, RTW_TX_DESC_W0_DISQSELSEQ);
- 
--	tx_desc->w1 = le32_encode_bits(pkt_info->qsel, RTW_TX_DESC_W1_QSEL) |
-+	tx_desc->w1 = le32_encode_bits(pkt_info->mac_id, RTW_TX_DESC_W1_MACID) |
-+		      le32_encode_bits(pkt_info->qsel, RTW_TX_DESC_W1_QSEL) |
- 		      le32_encode_bits(pkt_info->rate_id, RTW_TX_DESC_W1_RATE_ID) |
- 		      le32_encode_bits(pkt_info->sec_type, RTW_TX_DESC_W1_SEC_TYPE) |
- 		      le32_encode_bits(pkt_info->pkt_offset, RTW_TX_DESC_W1_PKT_OFFSET) |
-@@ -401,14 +402,18 @@ void rtw_tx_pkt_info_update(struct rtw_d
- 	const struct rtw_chip_info *chip = rtwdev->chip;
- 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
- 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-+	struct ieee80211_vif *vif = info->control.vif;
- 	struct rtw_sta_info *si;
--	struct ieee80211_vif *vif = NULL;
-+	struct rtw_vif *rtwvif;
- 	__le16 fc = hdr->frame_control;
- 	bool bmc;
- 
- 	if (sta) {
- 		si = (struct rtw_sta_info *)sta->drv_priv;
--		vif = si->vif;
-+		pkt_info->mac_id = si->mac_id;
-+	} else if (vif) {
-+		rtwvif = (struct rtw_vif *)vif->drv_priv;
-+		pkt_info->mac_id = rtwvif->mac_id;
- 	}
- 
- 	if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc))
---- a/drivers/net/wireless/realtek/rtw88/tx.h
-+++ b/drivers/net/wireless/realtek/rtw88/tx.h
-@@ -27,6 +27,7 @@ struct rtw_tx_desc {
- #define RTW_TX_DESC_W0_BMC BIT(24)
- #define RTW_TX_DESC_W0_LS BIT(26)
- #define RTW_TX_DESC_W0_DISQSELSEQ BIT(31)
-+#define RTW_TX_DESC_W1_MACID GENMASK(7, 0)
- #define RTW_TX_DESC_W1_QSEL GENMASK(12, 8)
- #define RTW_TX_DESC_W1_RATE_ID GENMASK(20, 16)
- #define RTW_TX_DESC_W1_SEC_TYPE GENMASK(23, 22)
diff --git a/package/kernel/mac80211/patches/rtl/019-v6.13-wifi-rtw88-Parse-the-RX-descriptor-with-a-single-fun.patch b/package/kernel/mac80211/patches/rtl/019-v6.13-wifi-rtw88-Parse-the-RX-descriptor-with-a-single-fun.patch
index 9828f507b6..4a32831ea3 100644
--- a/package/kernel/mac80211/patches/rtl/019-v6.13-wifi-rtw88-Parse-the-RX-descriptor-with-a-single-fun.patch
+++ b/package/kernel/mac80211/patches/rtl/019-v6.13-wifi-rtw88-Parse-the-RX-descriptor-with-a-single-fun.patch
@@ -547,7 +547,7 @@ Link: https://patch.msgid.link/913f1747-38fc-4409-85a4-57bb9cee506b at gmail.com
  
 --- a/drivers/net/wireless/realtek/rtw88/usb.c
 +++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -570,8 +570,8 @@ static void rtw_usb_rx_handler(struct wo
+@@ -571,8 +571,8 @@ static void rtw_usb_rx_handler(struct wo
  
  		do {
  			rx_desc = skb->data;
diff --git a/package/kernel/mac80211/patches/rtl/020-v6.12-wifi-rtw88-Fix-the-RX-aggregation-in-USB-3-mode.patch b/package/kernel/mac80211/patches/rtl/020-v6.12-wifi-rtw88-Fix-the-RX-aggregation-in-USB-3-mode.patch
deleted file mode 100644
index 174ee10816..0000000000
--- a/package/kernel/mac80211/patches/rtl/020-v6.12-wifi-rtw88-Fix-the-RX-aggregation-in-USB-3-mode.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 4aefde403da7af30757915e0462d88398c9388c5 Mon Sep 17 00:00:00 2001
-From: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Date: Tue, 8 Oct 2024 21:44:02 +0300
-Subject: [PATCH] wifi: rtw88: Fix the RX aggregation in USB 3 mode
-
-RTL8822CU, RTL8822BU, and RTL8821CU don't need BIT_EN_PRE_CALC.
-In fact, RTL8822BU in USB 3 mode doesn't pass all the frames to the
-driver, resulting in much lower download speed than normal:
-
-$ iperf3 -c 192.168.0.1 -R
-Connecting to host 192.168.0.1, port 5201
-Reverse mode, remote host 192.168.0.1 is sending
-[  5] local 192.168.0.50 port 43062 connected to 192.168.0.1 port 5201
-[ ID] Interval           Transfer     Bitrate
-[  5]   0.00-1.00   sec  26.9 MBytes   225 Mbits/sec
-[  5]   1.00-2.00   sec  7.50 MBytes  62.9 Mbits/sec
-[  5]   2.00-3.00   sec  8.50 MBytes  71.3 Mbits/sec
-[  5]   3.00-4.00   sec  8.38 MBytes  70.3 Mbits/sec
-[  5]   4.00-5.00   sec  7.75 MBytes  65.0 Mbits/sec
-[  5]   5.00-6.00   sec  8.00 MBytes  67.1 Mbits/sec
-[  5]   6.00-7.00   sec  8.00 MBytes  67.1 Mbits/sec
-[  5]   7.00-8.00   sec  7.75 MBytes  65.0 Mbits/sec
-[  5]   8.00-9.00   sec  7.88 MBytes  66.1 Mbits/sec
-[  5]   9.00-10.00  sec  7.88 MBytes  66.1 Mbits/sec
-- - - - - - - - - - - - - - - - - - - - - - - - -
-[ ID] Interval           Transfer     Bitrate         Retr
-[  5]   0.00-10.02  sec   102 MBytes  85.1 Mbits/sec  224             sender
-[  5]   0.00-10.00  sec  98.6 MBytes  82.7 Mbits/sec                  receiver
-
-Don't set BIT_EN_PRE_CALC. Then the speed is much better:
-
-% iperf3 -c 192.168.0.1 -R
-Connecting to host 192.168.0.1, port 5201
-Reverse mode, remote host 192.168.0.1 is sending
-[  5] local 192.168.0.50 port 39000 connected to 192.168.0.1 port 5201
-[ ID] Interval           Transfer     Bitrate
-[  5]   0.00-1.00   sec  52.8 MBytes   442 Mbits/sec
-[  5]   1.00-2.00   sec  71.9 MBytes   603 Mbits/sec
-[  5]   2.00-3.00   sec  74.8 MBytes   627 Mbits/sec
-[  5]   3.00-4.00   sec  75.9 MBytes   636 Mbits/sec
-[  5]   4.00-5.00   sec  76.0 MBytes   638 Mbits/sec
-[  5]   5.00-6.00   sec  74.1 MBytes   622 Mbits/sec
-[  5]   6.00-7.00   sec  74.0 MBytes   621 Mbits/sec
-[  5]   7.00-8.00   sec  76.0 MBytes   638 Mbits/sec
-[  5]   8.00-9.00   sec  74.4 MBytes   624 Mbits/sec
-[  5]   9.00-10.00  sec  63.9 MBytes   536 Mbits/sec
-- - - - - - - - - - - - - - - - - - - - - - - - -
-[ ID] Interval           Transfer     Bitrate         Retr
-[  5]   0.00-10.00  sec   717 MBytes   601 Mbits/sec   24             sender
-[  5]   0.00-10.00  sec   714 MBytes   599 Mbits/sec                  receiver
-
-Fixes: 002a5db9a52a ("wifi: rtw88: Enable USB RX aggregation for 8822c/8822b/8821c")
-Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
-Acked-by: Ping-Ke Shih <pkshih at realtek.com>
-Signed-off-by: Kalle Valo <kvalo at kernel.org>
-Link: https://patch.msgid.link/afb94a82-3d18-459e-97fc-1a217608cdf0 at gmail.com
----
- drivers/net/wireless/realtek/rtw88/usb.c | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/net/wireless/realtek/rtw88/usb.c
-+++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -771,7 +771,6 @@ static void rtw_usb_dynamic_rx_agg_v1(st
- 	u8 size, timeout;
- 	u16 val16;
- 
--	rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC);
- 	rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN);
- 	rtw_write8_clr(rtwdev, REG_RXDMA_AGG_PG_TH + 3, BIT(7));
- 
diff --git a/package/kernel/mac80211/patches/rtl/030-v6.13-wifi-rtw88-Enable-data-rate-fallback-for-older-chips.patch b/package/kernel/mac80211/patches/rtl/030-v6.13-wifi-rtw88-Enable-data-rate-fallback-for-older-chips.patch
index 153c04ee20..944985edc9 100644
--- a/package/kernel/mac80211/patches/rtl/030-v6.13-wifi-rtw88-Enable-data-rate-fallback-for-older-chips.patch
+++ b/package/kernel/mac80211/patches/rtl/030-v6.13-wifi-rtw88-Enable-data-rate-fallback-for-older-chips.patch
@@ -174,7 +174,7 @@ Link: https://patch.msgid.link/2b3e3e6f-541b-4a3b-8ca3-65b267e6a95a at gmail.com
  void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev,
 --- a/drivers/net/wireless/realtek/rtw88/usb.c
 +++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -457,7 +457,7 @@ static int rtw_usb_write_data(struct rtw
+@@ -458,7 +458,7 @@ static int rtw_usb_write_data(struct rtw
  	skb_put_data(skb, buf, size);
  	skb_push(skb, chip->tx_pkt_desc_sz);
  	memset(skb->data, 0, chip->tx_pkt_desc_sz);
@@ -183,7 +183,7 @@ Link: https://patch.msgid.link/2b3e3e6f-541b-4a3b-8ca3-65b267e6a95a at gmail.com
  	rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data);
  
  	ret = rtw_usb_write_port(rtwdev, qsel, skb,
-@@ -524,7 +524,7 @@ static int rtw_usb_tx_write(struct rtw_d
+@@ -525,7 +525,7 @@ static int rtw_usb_tx_write(struct rtw_d
  	pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz);
  	memset(pkt_desc, 0, chip->tx_pkt_desc_sz);
  	ep = qsel_to_ep(rtwusb, pkt_info->qsel);
diff --git a/package/kernel/mac80211/patches/rtl/034-v6.13-wifi-rtw88-usb-Set-pkt_info.ls-for-the-reserved-page.patch b/package/kernel/mac80211/patches/rtl/034-v6.13-wifi-rtw88-usb-Set-pkt_info.ls-for-the-reserved-page.patch
index 7c6e135860..67d7d230f4 100644
--- a/package/kernel/mac80211/patches/rtl/034-v6.13-wifi-rtw88-usb-Set-pkt_info.ls-for-the-reserved-page.patch
+++ b/package/kernel/mac80211/patches/rtl/034-v6.13-wifi-rtw88-usb-Set-pkt_info.ls-for-the-reserved-page.patch
@@ -17,7 +17,7 @@ Link: https://patch.msgid.link/e443f5d9-4b53-4f64-985c-64313ec80bef at gmail.com
 
 --- a/drivers/net/wireless/realtek/rtw88/usb.c
 +++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -477,6 +477,7 @@ static int rtw_usb_write_data_rsvd_page(
+@@ -478,6 +478,7 @@ static int rtw_usb_write_data_rsvd_page(
  	pkt_info.tx_pkt_size = size;
  	pkt_info.qsel = TX_DESC_QSEL_BEACON;
  	pkt_info.offset = chip->tx_pkt_desc_sz;
diff --git a/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-usb-Support-USB-3-with-RTL8812AU.patch b/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-usb-Support-USB-3-with-RTL8812AU.patch
index 2ccefb9893..33ca91d77d 100644
--- a/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-usb-Support-USB-3-with-RTL8812AU.patch
+++ b/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-usb-Support-USB-3-with-RTL8812AU.patch
@@ -12,7 +12,7 @@ Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
 
 --- a/drivers/net/wireless/realtek/rtw88/usb.c
 +++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -929,6 +929,32 @@ static void rtw_usb_intf_deinit(struct r
+@@ -930,6 +930,32 @@ static void rtw_usb_intf_deinit(struct r
  	usb_set_intfdata(intf, NULL);
  }
  
@@ -45,7 +45,7 @@ Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
  static int rtw_usb_switch_mode_new(struct rtw_dev *rtwdev)
  {
  	enum usb_device_speed cur_speed;
-@@ -982,7 +1008,8 @@ static int rtw_usb_switch_mode(struct rt
+@@ -983,7 +1009,8 @@ static int rtw_usb_switch_mode(struct rt
  {
  	u8 id = rtwdev->chip->id;
  
@@ -55,7 +55,7 @@ Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
  		return 0;
  
  	if (!rtwdev->efuse.usb_mode_switch) {
-@@ -997,7 +1024,10 @@ static int rtw_usb_switch_mode(struct rt
+@@ -998,7 +1025,10 @@ static int rtw_usb_switch_mode(struct rt
  		return 0;
  	}
  
diff --git a/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-usb-Enable-RX-aggregation-for-8821au-8812.patch b/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-usb-Enable-RX-aggregation-for-8821au-8812.patch
index 00775c0281..d4c3ef3495 100644
--- a/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-usb-Enable-RX-aggregation-for-8821au-8812.patch
+++ b/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-usb-Enable-RX-aggregation-for-8821au-8812.patch
@@ -19,7 +19,7 @@ Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
 
 --- a/drivers/net/wireless/realtek/rtw88/usb.c
 +++ b/drivers/net/wireless/realtek/rtw88/usb.c
-@@ -788,6 +788,32 @@ static void rtw_usb_dynamic_rx_agg_v1(st
+@@ -789,6 +789,32 @@ static void rtw_usb_dynamic_rx_agg_v1(st
  	rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, val16);
  }
  
@@ -52,7 +52,7 @@ Signed-off-by: Bitterblue Smith <rtl8821cerfe2 at gmail.com>
  static void rtw_usb_dynamic_rx_agg(struct rtw_dev *rtwdev, bool enable)
  {
  	switch (rtwdev->chip->id) {
-@@ -796,6 +822,10 @@ static void rtw_usb_dynamic_rx_agg(struc
+@@ -797,6 +823,10 @@ static void rtw_usb_dynamic_rx_agg(struc
  	case RTW_CHIP_TYPE_8821C:
  		rtw_usb_dynamic_rx_agg_v1(rtwdev, enable);
  		break;
diff --git a/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch b/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
index eea165ccca..c9496b5e70 100644
--- a/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
+++ b/package/kernel/mac80211/patches/subsys/130-disable_auto_vif.patch
@@ -1,6 +1,6 @@
 --- a/net/mac80211/main.c
 +++ b/net/mac80211/main.c
-@@ -1581,24 +1581,6 @@ int ieee80211_register_hw(struct ieee802
+@@ -1583,24 +1583,6 @@ int ieee80211_register_hw(struct ieee802
  
  	ieee80211_check_wbrf_support(local);
  
diff --git a/package/kernel/mac80211/patches/subsys/220-allow-ibss-mixed.patch b/package/kernel/mac80211/patches/subsys/220-allow-ibss-mixed.patch
index 55376362a5..378ca275f5 100644
--- a/package/kernel/mac80211/patches/subsys/220-allow-ibss-mixed.patch
+++ b/package/kernel/mac80211/patches/subsys/220-allow-ibss-mixed.patch
@@ -16,7 +16,7 @@ and we should ignore this.
 
 --- a/net/wireless/core.c
 +++ b/net/wireless/core.c
-@@ -654,21 +654,6 @@ static int wiphy_verify_combinations(str
+@@ -678,21 +678,6 @@ int wiphy_verify_iface_combinations(stru
  				    c->limits[j].max > 1))
  				return -EINVAL;
  
diff --git a/package/kernel/mac80211/patches/subsys/310-cfg80211-allow-grace-period-for-DFS-available-after-.patch b/package/kernel/mac80211/patches/subsys/310-cfg80211-allow-grace-period-for-DFS-available-after-.patch
index 7e9be59e04..c86b836f2f 100644
--- a/package/kernel/mac80211/patches/subsys/310-cfg80211-allow-grace-period-for-DFS-available-after-.patch
+++ b/package/kernel/mac80211/patches/subsys/310-cfg80211-allow-grace-period-for-DFS-available-after-.patch
@@ -113,7 +113,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  {
 --- a/net/wireless/core.h
 +++ b/net/wireless/core.h
-@@ -467,6 +467,8 @@ void cfg80211_set_dfs_state(struct wiphy
+@@ -475,6 +475,8 @@ void cfg80211_set_dfs_state(struct wiphy
  			    enum nl80211_dfs_state dfs_state);
  
  void cfg80211_dfs_channels_update_work(struct work_struct *work);
@@ -124,7 +124,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
 --- a/net/wireless/mlme.c
 +++ b/net/wireless/mlme.c
-@@ -1037,6 +1037,8 @@ void cfg80211_dfs_channels_update_work(s
+@@ -1031,6 +1031,8 @@ void cfg80211_dfs_channels_update_work(s
  			if (c->dfs_state == NL80211_DFS_UNAVAILABLE) {
  				time_dfs_update = IEEE80211_DFS_MIN_NOP_TIME_MS;
  				radar_event = NL80211_RADAR_NOP_FINISHED;
@@ -133,7 +133,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			} else {
  				if (regulatory_pre_cac_allowed(wiphy) ||
  				    cfg80211_any_wiphy_oper_chan(wiphy, c))
-@@ -1044,11 +1046,10 @@ void cfg80211_dfs_channels_update_work(s
+@@ -1038,11 +1040,10 @@ void cfg80211_dfs_channels_update_work(s
  
  				time_dfs_update = REG_PRE_CAC_EXPIRY_GRACE_MS;
  				radar_event = NL80211_RADAR_PRE_CAC_EXPIRED;
diff --git a/package/kernel/mac80211/patches/subsys/320-mac80211-add-AQL-support-for-broadcast-packets.patch b/package/kernel/mac80211/patches/subsys/320-mac80211-add-AQL-support-for-broadcast-packets.patch
index c03f40d9b4..9513dc14bc 100644
--- a/package/kernel/mac80211/patches/subsys/320-mac80211-add-AQL-support-for-broadcast-packets.patch
+++ b/package/kernel/mac80211/patches/subsys/320-mac80211-add-AQL-support-for-broadcast-packets.patch
@@ -85,7 +85,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	const struct ieee80211_ops *ops;
 --- a/net/mac80211/main.c
 +++ b/net/mac80211/main.c
-@@ -952,6 +952,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
+@@ -954,6 +954,7 @@ struct ieee80211_hw *ieee80211_alloc_hw_
  	spin_lock_init(&local->rx_path_lock);
  	spin_lock_init(&local->queue_stop_reason_lock);
  
diff --git a/package/kernel/mac80211/patches/subsys/321-wifi-mac80211-do-not-pass-a-stopped-vif-to-the-drive.patch b/package/kernel/mac80211/patches/subsys/321-wifi-mac80211-do-not-pass-a-stopped-vif-to-the-drive.patch
deleted file mode 100644
index f48fa38e5e..0000000000
--- a/package/kernel/mac80211/patches/subsys/321-wifi-mac80211-do-not-pass-a-stopped-vif-to-the-drive.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From: Felix Fietkau <nbd at nbd.name>
-Date: Wed, 2 Oct 2024 11:45:35 +0200
-Subject: [PATCH] wifi: mac80211: do not pass a stopped vif to the driver in
- .get_txpower
-
-Avoid potentially crashing in the driver because of uninitialized private data
-
-Fixes: 5b3dc42b1b0d ("mac80211: add support for driver tx power reporting")
-Cc: stable at vger.kernel.org
-Signed-off-by: Felix Fietkau <nbd at nbd.name>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -3134,7 +3134,8 @@ static int ieee80211_get_tx_power(struct
- 	struct ieee80211_local *local = wiphy_priv(wiphy);
- 	struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
- 
--	if (local->ops->get_txpower)
-+	if (local->ops->get_txpower &&
-+	    (sdata->flags & IEEE80211_SDATA_IN_DRIVER))
- 		return drv_get_txpower(local, sdata, dbm);
- 
- 	if (local->emulate_chanctx)
diff --git a/package/kernel/mac80211/patches/subsys/350-wifi-cfg80211-add-option-for-vif-allowed-radios.patch b/package/kernel/mac80211/patches/subsys/330-wifi-cfg80211-add-option-for-vif-allowed-radios.patch
similarity index 96%
rename from package/kernel/mac80211/patches/subsys/350-wifi-cfg80211-add-option-for-vif-allowed-radios.patch
rename to package/kernel/mac80211/patches/subsys/330-wifi-cfg80211-add-option-for-vif-allowed-radios.patch
index d5b42f3a3a..3b09c46f28 100644
--- a/package/kernel/mac80211/patches/subsys/350-wifi-cfg80211-add-option-for-vif-allowed-radios.patch
+++ b/package/kernel/mac80211/patches/subsys/330-wifi-cfg80211-add-option-for-vif-allowed-radios.patch
@@ -23,15 +23,15 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/include/net/cfg80211.h
 +++ b/include/net/cfg80211.h
-@@ -6227,6 +6227,7 @@ enum ieee80211_ap_reg_power {
+@@ -6271,6 +6271,7 @@ enum ieee80211_ap_reg_power {
   *	entered.
-  * @links[].cac_time_ms: CAC time in ms
+  * @links.cac_time_ms: CAC time in ms
   * @valid_links: bitmap describing what elements of @links are valid
 + * @radio_mask: Bitmask of radios that this interface is allowed to operate on.
   */
  struct wireless_dev {
  	struct wiphy *wiphy;
-@@ -6339,6 +6340,8 @@ struct wireless_dev {
+@@ -6383,6 +6384,8 @@ struct wireless_dev {
  		unsigned int cac_time_ms;
  	} links[IEEE80211_MLD_MAX_NUM_LINKS];
  	u16 valid_links;
@@ -40,7 +40,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  };
  
  static inline const u8 *wdev_address(struct wireless_dev *wdev)
-@@ -6525,6 +6528,17 @@ bool cfg80211_radio_chandef_valid(const
+@@ -6569,6 +6572,17 @@ bool cfg80211_radio_chandef_valid(const
  				  const struct cfg80211_chan_def *chandef);
  
  /**
@@ -246,7 +246,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			continue;
  
  		for (i = 0; i < rdev_req->n_channels; i++) {
-@@ -3490,9 +3491,12 @@ int cfg80211_wext_siwscan(struct net_dev
+@@ -3519,9 +3520,12 @@ int cfg80211_wext_siwscan(struct net_dev
  			continue;
  
  		for (j = 0; j < wiphy->bands[band]->n_channels; j++) {
@@ -298,7 +298,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 +EXPORT_SYMBOL(cfg80211_wdev_channel_allowed);
 --- a/net/wireless/core.c
 +++ b/net/wireless/core.c
-@@ -1415,6 +1415,8 @@ void cfg80211_init_wdev(struct wireless_
+@@ -1424,6 +1424,8 @@ void cfg80211_init_wdev(struct wireless_
  	/* allow mac80211 to determine the timeout */
  	wdev->ps_timeout = -1;
  
diff --git a/package/kernel/mac80211/patches/subsys/330-wifi-mac80211-introduce-EHT-rate-support-in-AQL-airt.patch b/package/kernel/mac80211/patches/subsys/330-wifi-mac80211-introduce-EHT-rate-support-in-AQL-airt.patch
deleted file mode 100644
index 0a3c8ec53b..0000000000
--- a/package/kernel/mac80211/patches/subsys/330-wifi-mac80211-introduce-EHT-rate-support-in-AQL-airt.patch
+++ /dev/null
@@ -1,233 +0,0 @@
-From: Ming Yen Hsieh <mingyen.hsieh at mediatek.com>
-Date: Wed, 4 Sep 2024 19:12:56 +0800
-Subject: [PATCH] wifi: mac80211: introduce EHT rate support in AQL airtime
-
-Add definitions related to EHT mode and airtime calculation
-according to the 802.11BE_D4.0.
-
-Co-developed-by: Bo Jiao <Bo.Jiao at mediatek.com>
-Signed-off-by: Bo Jiao <Bo.Jiao at mediatek.com>
-Signed-off-by: Deren Wu <deren.wu at mediatek.com>
-Signed-off-by: Quan Zhou <quan.zhou at mediatek.com>
-Signed-off-by: Ming Yen Hsieh <mingyen.hsieh at mediatek.com>
-Link: https://patch.msgid.link/20240904111256.11734-1-mingyen.hsieh at mediatek.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/airtime.c
-+++ b/net/mac80211/airtime.c
-@@ -55,10 +55,21 @@
- #define HE_DURATION_S(shift, streams, gi, bps)		\
- 	(HE_DURATION(streams, gi, bps) >> shift)
- 
-+/* gi in HE/EHT is identical. It matches enum nl80211_eht_gi as well */
-+#define EHT_GI_08 HE_GI_08
-+#define EHT_GI_16 HE_GI_16
-+#define EHT_GI_32 HE_GI_32
-+
-+#define EHT_DURATION(streams, gi, bps)			\
-+	HE_DURATION(streams, gi, bps)
-+#define EHT_DURATION_S(shift, streams, gi, bps)		\
-+	HE_DURATION_S(shift, streams, gi, bps)
-+
- #define BW_20			0
- #define BW_40			1
- #define BW_80			2
- #define BW_160			3
-+#define BW_320			4
- 
- /*
-  * Define group sort order: HT40 -> SGI -> #streams
-@@ -68,17 +79,26 @@
- #define IEEE80211_VHT_STREAM_GROUPS	8 /* BW(=4) * SGI(=2) */
- 
- #define IEEE80211_HE_MAX_STREAMS	8
-+#define IEEE80211_HE_STREAM_GROUPS	12 /* BW(=4) * GI(=3) */
-+
-+#define IEEE80211_EHT_MAX_STREAMS	8
-+#define IEEE80211_EHT_STREAM_GROUPS	15 /* BW(=5) * GI(=3) */
- 
- #define IEEE80211_HT_GROUPS_NB	(IEEE80211_MAX_STREAMS *	\
- 				 IEEE80211_HT_STREAM_GROUPS)
- #define IEEE80211_VHT_GROUPS_NB	(IEEE80211_MAX_STREAMS *	\
- 					 IEEE80211_VHT_STREAM_GROUPS)
-+#define IEEE80211_HE_GROUPS_NB	(IEEE80211_HE_MAX_STREAMS *	\
-+				 IEEE80211_HE_STREAM_GROUPS)
-+#define IEEE80211_EHT_GROUPS_NB	(IEEE80211_EHT_MAX_STREAMS *	\
-+				 IEEE80211_EHT_STREAM_GROUPS)
- 
- #define IEEE80211_HT_GROUP_0	0
- #define IEEE80211_VHT_GROUP_0	(IEEE80211_HT_GROUP_0 + IEEE80211_HT_GROUPS_NB)
- #define IEEE80211_HE_GROUP_0	(IEEE80211_VHT_GROUP_0 + IEEE80211_VHT_GROUPS_NB)
-+#define IEEE80211_EHT_GROUP_0	(IEEE80211_HE_GROUP_0 + IEEE80211_HE_GROUPS_NB)
- 
--#define MCS_GROUP_RATES		12
-+#define MCS_GROUP_RATES		14
- 
- #define HT_GROUP_IDX(_streams, _sgi, _ht40)	\
- 	IEEE80211_HT_GROUP_0 +			\
-@@ -203,6 +223,69 @@
- #define HE_GROUP(_streams, _gi, _bw)					\
- 	__HE_GROUP(_streams, _gi, _bw,				\
- 		   HE_GROUP_SHIFT(_streams, _gi, _bw))
-+
-+#define EHT_BW2VBPS(_bw, r5, r4, r3, r2, r1)					\
-+	((_bw) == BW_320 ? r5 : BW2VBPS(_bw, r4, r3, r2, r1))
-+
-+#define EHT_GROUP_IDX(_streams, _gi, _bw)				\
-+	(IEEE80211_EHT_GROUP_0 +					\
-+	 IEEE80211_EHT_MAX_STREAMS * 3 * (_bw) +			\
-+	 IEEE80211_EHT_MAX_STREAMS * (_gi) +				\
-+	 (_streams) - 1)
-+
-+#define __EHT_GROUP(_streams, _gi, _bw, _s)						\
-+	[EHT_GROUP_IDX(_streams, _gi, _bw)] = {						\
-+	.shift = _s,									\
-+	.duration = {									\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw,  1960,   980,  490,  234,  117)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw,  3920,  1960,  980,  468,  234)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw,  5880,  2937, 1470,  702,  351)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw,  7840,  3920, 1960,  936,  468)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 11760,  5880, 2940, 1404,  702)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 15680,  7840, 3920, 1872,  936)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 17640,  8820, 4410, 2106, 1053)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 19600,  9800, 4900, 2340, 1170)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 23520, 11760, 5880, 2808, 1404)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 26133, 13066, 6533, 3120, 1560)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 29400, 14700, 7350, 3510, 1755)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 32666, 16333, 8166, 3900, 1950)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 35280, 17640, 8820, 4212, 2106)),	\
-+		EHT_DURATION_S(_s, _streams, _gi,					\
-+			       EHT_BW2VBPS(_bw, 39200, 19600, 9800, 4680, 2340))	\
-+		}									\
-+}
-+
-+#define EHT_GROUP_SHIFT(_streams, _gi, _bw)						\
-+	GROUP_SHIFT(EHT_DURATION(_streams, _gi,						\
-+				 EHT_BW2VBPS(_bw, 1960, 980, 490, 234, 117)))
-+
-+#define EHT_GROUP(_streams, _gi, _bw)					\
-+	__EHT_GROUP(_streams, _gi, _bw,				\
-+		   EHT_GROUP_SHIFT(_streams, _gi, _bw))
-+
-+#define EHT_GROUP_RANGE(_gi, _bw)	\
-+	EHT_GROUP(1, _gi, _bw),		\
-+	EHT_GROUP(2, _gi, _bw),		\
-+	EHT_GROUP(3, _gi, _bw),		\
-+	EHT_GROUP(4, _gi, _bw),		\
-+	EHT_GROUP(5, _gi, _bw),		\
-+	EHT_GROUP(6, _gi, _bw),		\
-+	EHT_GROUP(7, _gi, _bw),		\
-+	EHT_GROUP(8, _gi, _bw)
-+
- struct mcs_group {
- 	u8 shift;
- 	u16 duration[MCS_GROUP_RATES];
-@@ -376,6 +459,26 @@ static const struct mcs_group airtime_mc
- 	HE_GROUP(6, HE_GI_32, BW_160),
- 	HE_GROUP(7, HE_GI_32, BW_160),
- 	HE_GROUP(8, HE_GI_32, BW_160),
-+
-+	EHT_GROUP_RANGE(EHT_GI_08, BW_20),
-+	EHT_GROUP_RANGE(EHT_GI_16, BW_20),
-+	EHT_GROUP_RANGE(EHT_GI_32, BW_20),
-+
-+	EHT_GROUP_RANGE(EHT_GI_08, BW_40),
-+	EHT_GROUP_RANGE(EHT_GI_16, BW_40),
-+	EHT_GROUP_RANGE(EHT_GI_32, BW_40),
-+
-+	EHT_GROUP_RANGE(EHT_GI_08, BW_80),
-+	EHT_GROUP_RANGE(EHT_GI_16, BW_80),
-+	EHT_GROUP_RANGE(EHT_GI_32, BW_80),
-+
-+	EHT_GROUP_RANGE(EHT_GI_08, BW_160),
-+	EHT_GROUP_RANGE(EHT_GI_16, BW_160),
-+	EHT_GROUP_RANGE(EHT_GI_32, BW_160),
-+
-+	EHT_GROUP_RANGE(EHT_GI_08, BW_320),
-+	EHT_GROUP_RANGE(EHT_GI_16, BW_320),
-+	EHT_GROUP_RANGE(EHT_GI_32, BW_320),
- };
- 
- static u32
-@@ -422,6 +525,9 @@ static u32 ieee80211_get_rate_duration(s
- 	case RATE_INFO_BW_160:
- 		bw = BW_160;
- 		break;
-+	case RATE_INFO_BW_320:
-+		bw = BW_320;
-+		break;
- 	default:
- 		WARN_ON_ONCE(1);
- 		return 0;
-@@ -443,14 +549,27 @@ static u32 ieee80211_get_rate_duration(s
- 		idx = status->rate_idx;
- 		group = HE_GROUP_IDX(streams, status->he_gi, bw);
- 		break;
-+	case RX_ENC_EHT:
-+		streams = status->nss;
-+		idx = status->rate_idx;
-+		group = EHT_GROUP_IDX(streams, status->eht.gi, bw);
-+		break;
- 	default:
- 		WARN_ON_ONCE(1);
- 		return 0;
- 	}
- 
--	if (WARN_ON_ONCE((status->encoding != RX_ENC_HE && streams > 4) ||
--			 (status->encoding == RX_ENC_HE && streams > 8)))
--		return 0;
-+	switch (status->encoding) {
-+	case RX_ENC_EHT:
-+	case RX_ENC_HE:
-+		if (WARN_ON_ONCE(streams > 8))
-+			return 0;
-+		break;
-+	default:
-+		if (WARN_ON_ONCE(streams > 4))
-+			return 0;
-+		break;
-+	}
- 
- 	if (idx >= MCS_GROUP_RATES)
- 		return 0;
-@@ -517,7 +636,9 @@ static bool ieee80211_fill_rate_info(str
- 	stat->nss = ri->nss;
- 	stat->rate_idx = ri->mcs;
- 
--	if (ri->flags & RATE_INFO_FLAGS_HE_MCS)
-+	if (ri->flags & RATE_INFO_FLAGS_EHT_MCS)
-+		stat->encoding = RX_ENC_EHT;
-+	else if (ri->flags & RATE_INFO_FLAGS_HE_MCS)
- 		stat->encoding = RX_ENC_HE;
- 	else if (ri->flags & RATE_INFO_FLAGS_VHT_MCS)
- 		stat->encoding = RX_ENC_VHT;
-@@ -529,7 +650,14 @@ static bool ieee80211_fill_rate_info(str
- 	if (ri->flags & RATE_INFO_FLAGS_SHORT_GI)
- 		stat->enc_flags |= RX_ENC_FLAG_SHORT_GI;
- 
--	stat->he_gi = ri->he_gi;
-+	switch (stat->encoding) {
-+	case RX_ENC_EHT:
-+		stat->eht.gi = ri->eht_gi;
-+		break;
-+	default:
-+		stat->he_gi = ri->he_gi;
-+		break;
-+	}
- 
- 	if (stat->encoding != RX_ENC_LEGACY)
- 		return true;
diff --git a/package/kernel/mac80211/patches/subsys/331-wifi-cfg80211-check-radio-iface-combination-for-mult.patch b/package/kernel/mac80211/patches/subsys/331-wifi-cfg80211-check-radio-iface-combination-for-mult.patch
deleted file mode 100644
index 76c351aa83..0000000000
--- a/package/kernel/mac80211/patches/subsys/331-wifi-cfg80211-check-radio-iface-combination-for-mult.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From: Karthikeyan Periyasamy <quic_periyasa at quicinc.com>
-Date: Tue, 17 Sep 2024 19:32:39 +0530
-Subject: [PATCH] wifi: cfg80211: check radio iface combination for multi radio
- per wiphy
-
-Currently, wiphy_verify_combinations() fails for the multi-radio per wiphy
-due to the condition check on new global interface combination that DFS
-only works on one channel. In a multi-radio scenario, new global interface
-combination encompasses the capabilities of all radio combinations, so it
-supports more than one channel with DFS. For multi-radio per wiphy,
-interface combination verification needs to be performed for radio specific
-interface combinations. This is necessary as the new global interface
-combination combines the capabilities of all radio combinations.
-
-Fixes: a01b1e9f9955 ("wifi: mac80211: add support for DFS with multiple radios")
-Signed-off-by: Karthikeyan Periyasamy <quic_periyasa at quicinc.com>
----
-
---- a/net/wireless/core.c
-+++ b/net/wireless/core.c
-@@ -599,16 +599,20 @@ use_default_name:
- }
- EXPORT_SYMBOL(wiphy_new_nm);
- 
--static int wiphy_verify_combinations(struct wiphy *wiphy)
-+static
-+int wiphy_verify_iface_combinations(struct wiphy *wiphy,
-+				    const struct ieee80211_iface_combination *iface_comb,
-+				    int n_iface_comb,
-+				    bool combined_radio)
- {
- 	const struct ieee80211_iface_combination *c;
- 	int i, j;
- 
--	for (i = 0; i < wiphy->n_iface_combinations; i++) {
-+	for (i = 0; i < n_iface_comb; i++) {
- 		u32 cnt = 0;
- 		u16 all_iftypes = 0;
- 
--		c = &wiphy->iface_combinations[i];
-+		c = &iface_comb[i];
- 
- 		/*
- 		 * Combinations with just one interface aren't real,
-@@ -621,9 +625,13 @@ static int wiphy_verify_combinations(str
- 		if (WARN_ON(!c->num_different_channels))
- 			return -EINVAL;
- 
--		/* DFS only works on one channel. */
--		if (WARN_ON(c->radar_detect_widths &&
--			    (c->num_different_channels > 1)))
-+		/* DFS only works on one channel. Avoid this check
-+		 * for multi-radio global combination, since it hold
-+		 * the capabilities of all radio combinations.
-+		 */
-+		if (!combined_radio &&
-+		    WARN_ON(c->radar_detect_widths &&
-+			    c->num_different_channels > 1))
- 			return -EINVAL;
- 
- 		if (WARN_ON(!c->n_limits))
-@@ -644,13 +652,21 @@ static int wiphy_verify_combinations(str
- 			if (WARN_ON(wiphy->software_iftypes & types))
- 				return -EINVAL;
- 
--			/* Only a single P2P_DEVICE can be allowed */
--			if (WARN_ON(types & BIT(NL80211_IFTYPE_P2P_DEVICE) &&
-+			/* Only a single P2P_DEVICE can be allowed, avoid this
-+			 * check for multi-radio global combination, since it
-+			 * hold the capabilities of all radio combinations.
-+			 */
-+			if (!combined_radio &&
-+			    WARN_ON(types & BIT(NL80211_IFTYPE_P2P_DEVICE) &&
- 				    c->limits[j].max > 1))
- 				return -EINVAL;
- 
--			/* Only a single NAN can be allowed */
--			if (WARN_ON(types & BIT(NL80211_IFTYPE_NAN) &&
-+			/* Only a single NAN can be allowed, avoid this
-+			 * check for multi-radio global combination, since it
-+			 * hold the capabilities of all radio combinations.
-+			 */
-+			if (!combined_radio &&
-+			    WARN_ON(types & BIT(NL80211_IFTYPE_NAN) &&
- 				    c->limits[j].max > 1))
- 				return -EINVAL;
- 
-@@ -674,6 +690,34 @@ static int wiphy_verify_combinations(str
- 	return 0;
- }
- 
-+static int wiphy_verify_combinations(struct wiphy *wiphy)
-+{
-+	int i, ret;
-+	bool combined_radio = false;
-+
-+	if (wiphy->n_radio) {
-+		for (i = 0; i < wiphy->n_radio; i++) {
-+			const struct wiphy_radio *radio = &wiphy->radio[i];
-+
-+			ret = wiphy_verify_iface_combinations(wiphy,
-+							      radio->iface_combinations,
-+							      radio->n_iface_combinations,
-+							      false);
-+			if (ret)
-+				return ret;
-+		}
-+
-+		combined_radio = true;
-+	}
-+
-+	ret = wiphy_verify_iface_combinations(wiphy,
-+					      wiphy->iface_combinations,
-+					      wiphy->n_iface_combinations,
-+					      combined_radio);
-+
-+	return ret;
-+}
-+
- int wiphy_register(struct wiphy *wiphy)
- {
- 	struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy);
diff --git a/package/kernel/mac80211/patches/subsys/351-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch
similarity index 88%
rename from package/kernel/mac80211/patches/subsys/351-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch
rename to package/kernel/mac80211/patches/subsys/331-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch
index 7363c3873f..779857fe88 100644
--- a/package/kernel/mac80211/patches/subsys/351-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch
+++ b/package/kernel/mac80211/patches/subsys/331-wifi-mac80211-use-vif-radio-mask-to-limit-ibss-scan-.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/mac80211/scan.c
 +++ b/net/mac80211/scan.c
-@@ -1178,14 +1178,14 @@ int ieee80211_request_ibss_scan(struct i
+@@ -1176,14 +1176,14 @@ int ieee80211_request_ibss_scan(struct i
  				unsigned int n_channels)
  {
  	struct ieee80211_local *local = sdata->local;
@@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	/* fill internal scan request */
  	if (!channels) {
-@@ -1202,7 +1202,9 @@ int ieee80211_request_ibss_scan(struct i
+@@ -1200,7 +1200,9 @@ int ieee80211_request_ibss_scan(struct i
  				    &local->hw.wiphy->bands[band]->channels[i];
  
  				if (tmp_ch->flags & (IEEE80211_CHAN_NO_IR |
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  					continue;
  
  				local->int_scan_req->channels[n_ch] = tmp_ch;
-@@ -1211,21 +1213,23 @@ int ieee80211_request_ibss_scan(struct i
+@@ -1209,21 +1211,23 @@ int ieee80211_request_ibss_scan(struct i
  		}
  
  		if (WARN_ON_ONCE(n_ch == 0))
@@ -66,7 +66,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  		local->int_scan_req->n_channels = n_ch;
  	}
-@@ -1235,9 +1239,7 @@ int ieee80211_request_ibss_scan(struct i
+@@ -1233,9 +1237,7 @@ int ieee80211_request_ibss_scan(struct i
  	memcpy(local->int_scan_req->ssids[0].ssid, ssid, IEEE80211_MAX_SSID_LEN);
  	local->int_scan_req->ssids[0].ssid_len = ssid_len;
  
diff --git a/package/kernel/mac80211/patches/subsys/332-wifi-cfg80211-Set-correct-chandef-when-starting-CAC.patch b/package/kernel/mac80211/patches/subsys/332-wifi-cfg80211-Set-correct-chandef-when-starting-CAC.patch
deleted file mode 100644
index 72a3510aac..0000000000
--- a/package/kernel/mac80211/patches/subsys/332-wifi-cfg80211-Set-correct-chandef-when-starting-CAC.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From: Issam Hamdi <ih at simonwunderlich.de>
-Date: Fri, 16 Aug 2024 16:24:18 +0200
-Subject: [PATCH] wifi: cfg80211: Set correct chandef when starting CAC
-
-When starting CAC in a mode other than AP mode, it return a
-"WARNING: CPU: 0 PID: 63 at cfg80211_chandef_dfs_usable+0x20/0xaf [cfg80211]"
-caused by the chandef.chan being null at the end of CAC.
-
-Solution: Ensure the channel definition is set for the different modes
-when starting CAC to avoid getting a NULL 'chan' at the end of CAC.
-
- Call Trace:
-  ? show_regs.part.0+0x14/0x16
-  ? __warn+0x67/0xc0
-  ? cfg80211_chandef_dfs_usable+0x20/0xaf [cfg80211]
-  ? report_bug+0xa7/0x130
-  ? exc_overflow+0x30/0x30
-  ? handle_bug+0x27/0x50
-  ? exc_invalid_op+0x18/0x60
-  ? handle_exception+0xf6/0xf6
-  ? exc_overflow+0x30/0x30
-  ? cfg80211_chandef_dfs_usable+0x20/0xaf [cfg80211]
-  ? exc_overflow+0x30/0x30
-  ? cfg80211_chandef_dfs_usable+0x20/0xaf [cfg80211]
-  ? regulatory_propagate_dfs_state.cold+0x1b/0x4c [cfg80211]
-  ? cfg80211_propagate_cac_done_wk+0x1a/0x30 [cfg80211]
-  ? process_one_work+0x165/0x280
-  ? worker_thread+0x120/0x3f0
-  ? kthread+0xc2/0xf0
-  ? process_one_work+0x280/0x280
-  ? kthread_complete_and_exit+0x20/0x20
-  ? ret_from_fork+0x19/0x24
-
-Reported-by: Kretschmer Mathias <mathias.kretschmer at fit.fraunhofer.de>
-Signed-off-by: Issam Hamdi <ih at simonwunderlich.de>
-Link: https://patch.msgid.link/20240816142418.3381951-1-ih at simonwunderlich.de
-[shorten subject, remove OCB, reorder cases to match previous list]
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -10144,7 +10144,20 @@ static int nl80211_start_radar_detection
- 
- 	err = rdev_start_radar_detection(rdev, dev, &chandef, cac_time_ms);
- 	if (!err) {
--		wdev->links[0].ap.chandef = chandef;
-+		switch (wdev->iftype) {
-+		case NL80211_IFTYPE_AP:
-+		case NL80211_IFTYPE_P2P_GO:
-+			wdev->links[0].ap.chandef = chandef;
-+			break;
-+		case NL80211_IFTYPE_ADHOC:
-+			wdev->u.ibss.chandef = chandef;
-+			break;
-+		case NL80211_IFTYPE_MESH_POINT:
-+			wdev->u.mesh.chandef = chandef;
-+			break;
-+		default:
-+			break;
-+		}
- 		wdev->cac_started = true;
- 		wdev->cac_start_time = jiffies;
- 		wdev->cac_time_ms = cac_time_ms;
diff --git a/package/kernel/mac80211/patches/subsys/352-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch b/package/kernel/mac80211/patches/subsys/332-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch
similarity index 86%
rename from package/kernel/mac80211/patches/subsys/352-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch
rename to package/kernel/mac80211/patches/subsys/332-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch
index ac3d101148..0c8c894eaa 100644
--- a/package/kernel/mac80211/patches/subsys/352-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch
+++ b/package/kernel/mac80211/patches/subsys/332-wifi-mac80211-use-vif-radio-mask-to-limit-chanctx-an.patch
@@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/mac80211/chan.c
 +++ b/net/mac80211/chan.c
-@@ -1167,7 +1167,7 @@ ieee80211_replace_chanctx(struct ieee802
+@@ -1169,7 +1169,7 @@ ieee80211_replace_chanctx(struct ieee802
  static bool
  ieee80211_find_available_radio(struct ieee80211_local *local,
  			       const struct ieee80211_chan_req *chanreq,
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  {
  	struct wiphy *wiphy = local->hw.wiphy;
  	const struct wiphy_radio *radio;
-@@ -1178,6 +1178,9 @@ ieee80211_find_available_radio(struct ie
+@@ -1180,6 +1180,9 @@ ieee80211_find_available_radio(struct ie
  		return true;
  
  	for (i = 0; i < wiphy->n_radio; i++) {
@@ -28,7 +28,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		radio = &wiphy->radio[i];
  		if (!cfg80211_radio_chandef_valid(radio, &chanreq->oper))
  			continue;
-@@ -1211,7 +1214,9 @@ int ieee80211_link_reserve_chanctx(struc
+@@ -1213,7 +1216,9 @@ int ieee80211_link_reserve_chanctx(struc
  	new_ctx = ieee80211_find_reservation_chanctx(local, chanreq, mode);
  	if (!new_ctx) {
  		if (ieee80211_can_create_new_chanctx(local, -1) &&
@@ -39,7 +39,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			new_ctx = ieee80211_new_chanctx(local, chanreq, mode,
  							false, radio_idx);
  		else
-@@ -1881,7 +1886,9 @@ int _ieee80211_link_use_channel(struct i
+@@ -1883,7 +1888,9 @@ int _ieee80211_link_use_channel(struct i
  	/* Note: context is now reserved */
  	if (ctx)
  		reserved = true;
diff --git a/package/kernel/mac80211/patches/subsys/333-Revert-wifi-mac80211-move-radar-detect-work-to-sdata.patch b/package/kernel/mac80211/patches/subsys/333-Revert-wifi-mac80211-move-radar-detect-work-to-sdata.patch
deleted file mode 100644
index d12df8f53e..0000000000
--- a/package/kernel/mac80211/patches/subsys/333-Revert-wifi-mac80211-move-radar-detect-work-to-sdata.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:19 +0530
-Subject: [PATCH] Revert "wifi: mac80211: move radar detect work to sdata"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This reverts commit ce9e660ef32e ("wifi: mac80211: move radar detect work to sdata").
-
-To enable radar detection with MLO, it?s essential to handle it on a
-per-link basis. This is because when using MLO, multiple links may already
-be active and beaconing. In this scenario, another link should be able to
-initiate a radar detection. Also, if underlying links are associated with
-different hardware devices but grouped together for MLO, they could
-potentially start radar detection simultaneously. Therefore, it makes
-sense to manage radar detection settings separately for each link by moving
-them back to a per-link data structure.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-2-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -1658,7 +1658,7 @@ static int ieee80211_stop_ap(struct wiph
- 
- 	if (sdata->wdev.cac_started) {
- 		chandef = link_conf->chanreq.oper;
--		wiphy_delayed_work_cancel(wiphy, &sdata->dfs_cac_timer_work);
-+		wiphy_delayed_work_cancel(wiphy, &link->dfs_cac_timer_work);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_ABORTED,
- 				   GFP_KERNEL);
-@@ -3482,7 +3482,7 @@ static int ieee80211_start_radar_detecti
- 	if (err)
- 		goto out_unlock;
- 
--	wiphy_delayed_work_queue(wiphy, &sdata->dfs_cac_timer_work,
-+	wiphy_delayed_work_queue(wiphy, &sdata->deflink.dfs_cac_timer_work,
- 				 msecs_to_jiffies(cac_time_ms));
- 
-  out_unlock:
-@@ -3499,7 +3499,7 @@ static void ieee80211_end_cac(struct wip
- 
- 	list_for_each_entry(sdata, &local->interfaces, list) {
- 		wiphy_delayed_work_cancel(wiphy,
--					  &sdata->dfs_cac_timer_work);
-+					  &sdata->deflink.dfs_cac_timer_work);
- 
- 		if (sdata->wdev.cac_started) {
- 			ieee80211_link_release_channel(&sdata->deflink);
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -1069,6 +1069,7 @@ struct ieee80211_link_data {
- 	int ap_power_level; /* in dBm */
- 
- 	bool radar_required;
-+	struct wiphy_delayed_work dfs_cac_timer_work;
- 
- 	union {
- 		struct ieee80211_link_data_managed mgd;
-@@ -1167,8 +1168,6 @@ struct ieee80211_sub_if_data {
- 	struct ieee80211_link_data deflink;
- 	struct ieee80211_link_data __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
- 
--	struct wiphy_delayed_work dfs_cac_timer_work;
--
- 	/* for ieee80211_set_active_links_async() */
- 	struct wiphy_work activate_links_work;
- 	u16 desired_active_links;
---- a/net/mac80211/iface.c
-+++ b/net/mac80211/iface.c
-@@ -551,7 +551,7 @@ static void ieee80211_do_stop(struct iee
- 	wiphy_work_cancel(local->hw.wiphy,
- 			  &sdata->deflink.color_change_finalize_work);
- 	wiphy_delayed_work_cancel(local->hw.wiphy,
--				  &sdata->dfs_cac_timer_work);
-+				  &sdata->deflink.dfs_cac_timer_work);
- 
- 	if (sdata->wdev.cac_started) {
- 		chandef = sdata->vif.bss_conf.chanreq.oper;
-@@ -1744,8 +1744,6 @@ static void ieee80211_setup_sdata(struct
- 	wiphy_work_init(&sdata->work, ieee80211_iface_work);
- 	wiphy_work_init(&sdata->activate_links_work,
- 			ieee80211_activate_links_work);
--	wiphy_delayed_work_init(&sdata->dfs_cac_timer_work,
--				ieee80211_dfs_cac_timer_work);
- 
- 	switch (type) {
- 	case NL80211_IFTYPE_P2P_GO:
---- a/net/mac80211/link.c
-+++ b/net/mac80211/link.c
-@@ -45,6 +45,8 @@ void ieee80211_link_init(struct ieee8021
- 			  ieee80211_color_collision_detection_work);
- 	INIT_LIST_HEAD(&link->assigned_chanctx_list);
- 	INIT_LIST_HEAD(&link->reserved_chanctx_list);
-+	wiphy_delayed_work_init(&link->dfs_cac_timer_work,
-+				ieee80211_dfs_cac_timer_work);
- 
- 	if (!deflink) {
- 		switch (sdata->vif.type) {
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -3031,15 +3031,16 @@ void ieee80211_dynamic_ps_timer(struct t
- 
- void ieee80211_dfs_cac_timer_work(struct wiphy *wiphy, struct wiphy_work *work)
- {
--	struct ieee80211_sub_if_data *sdata =
--		container_of(work, struct ieee80211_sub_if_data,
-+	struct ieee80211_link_data *link =
-+		container_of(work, struct ieee80211_link_data,
- 			     dfs_cac_timer_work.work);
--	struct cfg80211_chan_def chandef = sdata->vif.bss_conf.chanreq.oper;
-+	struct cfg80211_chan_def chandef = link->conf->chanreq.oper;
-+	struct ieee80211_sub_if_data *sdata = link->sdata;
- 
- 	lockdep_assert_wiphy(sdata->local->hw.wiphy);
- 
- 	if (sdata->wdev.cac_started) {
--		ieee80211_link_release_channel(&sdata->deflink);
-+		ieee80211_link_release_channel(link);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED,
- 				   GFP_KERNEL);
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -3460,7 +3460,7 @@ void ieee80211_dfs_cac_cancel(struct iee
- 
- 	list_for_each_entry(sdata, &local->interfaces, list) {
- 		wiphy_delayed_work_cancel(local->hw.wiphy,
--					  &sdata->dfs_cac_timer_work);
-+					  &sdata->deflink.dfs_cac_timer_work);
- 
- 		if (sdata->wdev.cac_started) {
- 			chandef = sdata->vif.bss_conf.chanreq.oper;
diff --git a/package/kernel/mac80211/patches/subsys/353-wifi-mac80211-remove-status-ampdu_delimiter_crc.patch b/package/kernel/mac80211/patches/subsys/333-wifi-mac80211-remove-status-ampdu_delimiter_crc.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/353-wifi-mac80211-remove-status-ampdu_delimiter_crc.patch
rename to package/kernel/mac80211/patches/subsys/333-wifi-mac80211-remove-status-ampdu_delimiter_crc.patch
diff --git a/package/kernel/mac80211/patches/subsys/354-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch b/package/kernel/mac80211/patches/subsys/334-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch
similarity index 98%
rename from package/kernel/mac80211/patches/subsys/354-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch
rename to package/kernel/mac80211/patches/subsys/334-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch
index c2a915963c..ef8a36a9af 100644
--- a/package/kernel/mac80211/patches/subsys/354-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch
+++ b/package/kernel/mac80211/patches/subsys/334-wifi-cfg80211-pass-net_device-to-.set_monitor_channel.patch
@@ -88,7 +88,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  bool cfg80211_any_usable_channels(struct wiphy *wiphy,
 --- a/net/wireless/core.h
 +++ b/net/wireless/core.h
-@@ -510,6 +510,7 @@ static inline unsigned int elapsed_jiffi
+@@ -518,6 +518,7 @@ static inline unsigned int elapsed_jiffi
  }
  
  int cfg80211_set_monitor_channel(struct cfg80211_registered_device *rdev,
diff --git a/package/kernel/mac80211/patches/subsys/334-wifi-mac80211-remove-label-usage-in-ieee80211_start_.patch b/package/kernel/mac80211/patches/subsys/334-wifi-mac80211-remove-label-usage-in-ieee80211_start_.patch
deleted file mode 100644
index 329b645462..0000000000
--- a/package/kernel/mac80211/patches/subsys/334-wifi-mac80211-remove-label-usage-in-ieee80211_start_.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:20 +0530
-Subject: [PATCH] wifi: mac80211: remove label usage in
- ieee80211_start_radar_detection()
-
-After locks rework [1], ieee80211_start_radar_detection() function is no
-longer acquiring any lock as such explicitly. Hence, it is not unlocking
-anything as well. However, label "out_unlock" is still used which creates
-confusion. Also, now there is no need of goto label as such.
-
-Get rid of the goto logic and use direct return statements.
-
-[1]: https://lore.kernel.org/all/20230828135928.b1c6efffe9ad.I4aec875e25abc9ef0b5ad1e70b5747fd483fbd3c at changeid/
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-3-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -3468,10 +3468,8 @@ static int ieee80211_start_radar_detecti
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
- 
--	if (!list_empty(&local->roc_list) || local->scanning) {
--		err = -EBUSY;
--		goto out_unlock;
--	}
-+	if (!list_empty(&local->roc_list) || local->scanning)
-+		return -EBUSY;
- 
- 	/* whatever, but channel contexts should not complain about that one */
- 	sdata->deflink.smps_mode = IEEE80211_SMPS_OFF;
-@@ -3480,13 +3478,12 @@ static int ieee80211_start_radar_detecti
- 	err = ieee80211_link_use_channel(&sdata->deflink, &chanreq,
- 					 IEEE80211_CHANCTX_SHARED);
- 	if (err)
--		goto out_unlock;
-+		return err;
- 
- 	wiphy_delayed_work_queue(wiphy, &sdata->deflink.dfs_cac_timer_work,
- 				 msecs_to_jiffies(cac_time_ms));
- 
-- out_unlock:
--	return err;
-+	return 0;
- }
- 
- static void ieee80211_end_cac(struct wiphy *wiphy,
diff --git a/package/kernel/mac80211/patches/subsys/355-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch b/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch
similarity index 93%
rename from package/kernel/mac80211/patches/subsys/355-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch
rename to package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch
index 2510cb0dbe..604abfd43f 100644
--- a/package/kernel/mac80211/patches/subsys/355-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch
+++ b/package/kernel/mac80211/patches/subsys/335-wifi-mac80211-add-flag-to-opt-out-of-virtual-monitor.patch
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	if (ret)
  		return ret;
  done:
-@@ -3049,7 +3057,8 @@ static int ieee80211_set_tx_power(struct
+@@ -3050,7 +3058,8 @@ static int ieee80211_set_tx_power(struct
  	if (wdev) {
  		sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
  
@@ -105,7 +105,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			if (!ieee80211_hw_check(&local->hw, WANT_MONITOR_VIF))
  				return -EOPNOTSUPP;
  
-@@ -3097,7 +3106,8 @@ static int ieee80211_set_tx_power(struct
+@@ -3098,7 +3107,8 @@ static int ieee80211_set_tx_power(struct
  	}
  
  	list_for_each_entry(sdata, &local->interfaces, list) {
@@ -115,7 +115,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			has_monitor = true;
  			continue;
  		}
-@@ -3107,7 +3117,8 @@ static int ieee80211_set_tx_power(struct
+@@ -3108,7 +3118,8 @@ static int ieee80211_set_tx_power(struct
  		sdata->vif.bss_conf.txpower_type = txp_type;
  	}
  	list_for_each_entry(sdata, &local->interfaces, list) {
@@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  			continue;
  		ieee80211_recalc_txpower(sdata, update_txp_type);
  	}
-@@ -4299,7 +4310,8 @@ static int ieee80211_cfg_get_channel(str
+@@ -4303,7 +4314,8 @@ static int ieee80211_cfg_get_channel(str
  	if (chanctx_conf) {
  		*chandef = link->conf->chanreq.oper;
  		ret = 0;
@@ -137,7 +137,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		*chandef = local->monitor_chanreq.oper;
 --- a/net/mac80211/chan.c
 +++ b/net/mac80211/chan.c
-@@ -337,6 +337,10 @@ ieee80211_get_chanctx_max_required_bw(st
+@@ -339,6 +339,10 @@ ieee80211_get_chanctx_max_required_bw(st
  		case NL80211_IFTYPE_P2P_DEVICE:
  		case NL80211_IFTYPE_NAN:
  			continue;
@@ -148,7 +148,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		case NL80211_IFTYPE_ADHOC:
  		case NL80211_IFTYPE_MESH_POINT:
  		case NL80211_IFTYPE_OCB:
-@@ -345,7 +349,6 @@ ieee80211_get_chanctx_max_required_bw(st
+@@ -347,7 +351,6 @@ ieee80211_get_chanctx_max_required_bw(st
  		case NL80211_IFTYPE_WDS:
  		case NL80211_IFTYPE_UNSPECIFIED:
  		case NUM_NL80211_IFTYPES:
@@ -156,7 +156,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		case NL80211_IFTYPE_P2P_CLIENT:
  		case NL80211_IFTYPE_P2P_GO:
  			WARN_ON_ONCE(1);
-@@ -954,6 +957,10 @@ void ieee80211_recalc_smps_chanctx(struc
+@@ -956,6 +959,10 @@ void ieee80211_recalc_smps_chanctx(struc
  			if (!link->sdata->u.mgd.associated)
  				continue;
  			break;
@@ -167,7 +167,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		case NL80211_IFTYPE_AP:
  		case NL80211_IFTYPE_ADHOC:
  		case NL80211_IFTYPE_MESH_POINT:
-@@ -966,6 +973,11 @@ void ieee80211_recalc_smps_chanctx(struc
+@@ -968,6 +975,11 @@ void ieee80211_recalc_smps_chanctx(struc
  		if (rcu_access_pointer(link->conf->chanctx_conf) != &chanctx->conf)
  			continue;
  
@@ -296,8 +296,8 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		}
 --- a/net/mac80211/util.c
 +++ b/net/mac80211/util.c
-@@ -754,7 +754,8 @@ static void __iterate_interfaces(struct
- 	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
+@@ -739,7 +739,8 @@ static void __iterate_interfaces(struct
+ 				lockdep_is_held(&local->hw.wiphy->mtx)) {
  		switch (sdata->vif.type) {
  		case NL80211_IFTYPE_MONITOR:
 -			if (!(sdata->u.mntr.flags & MONITOR_FLAG_ACTIVE))
@@ -306,7 +306,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  				continue;
  			break;
  		case NL80211_IFTYPE_AP_VLAN:
-@@ -1857,8 +1858,10 @@ int ieee80211_reconfig(struct ieee80211_
+@@ -1856,8 +1857,10 @@ int ieee80211_reconfig(struct ieee80211_
  	}
  
  	list_for_each_entry(sdata, &local->interfaces, list) {
@@ -318,7 +318,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		    ieee80211_sdata_running(sdata)) {
  			res = drv_add_interface(local, sdata);
  			if (WARN_ON(res))
-@@ -1871,11 +1874,14 @@ int ieee80211_reconfig(struct ieee80211_
+@@ -1870,11 +1873,14 @@ int ieee80211_reconfig(struct ieee80211_
  	 */
  	if (res) {
  		list_for_each_entry_continue_reverse(sdata, &local->interfaces,
diff --git a/package/kernel/mac80211/patches/subsys/335-wifi-trace-unlink-rdev_end_cac-trace-event-from-wiph.patch b/package/kernel/mac80211/patches/subsys/335-wifi-trace-unlink-rdev_end_cac-trace-event-from-wiph.patch
deleted file mode 100644
index 98bc0c26fd..0000000000
--- a/package/kernel/mac80211/patches/subsys/335-wifi-trace-unlink-rdev_end_cac-trace-event-from-wiph.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:21 +0530
-Subject: [PATCH] wifi: trace: unlink rdev_end_cac trace event from
- wiphy_netdev_evt class
-
-rdev_end_cac trace event is linked with wiphy_netdev_evt event class.
-There is no option to pass link ID currently to wiphy_netdev_evt class.
-A subsequent change would pass link ID to rdev_end_cac event and hence
-it can no longer derive the event class from wiphy_netdev_evt.
-
-Therefore, unlink rdev_end_cac event from wiphy_netdev_evt and define it's
-own independent trace event. Link ID would be passed in subsequent change.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-4-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/wireless/trace.h
-+++ b/net/wireless/trace.h
-@@ -805,9 +805,18 @@ DEFINE_EVENT(wiphy_netdev_evt, rdev_flus
- 	TP_ARGS(wiphy, netdev)
- );
- 
--DEFINE_EVENT(wiphy_netdev_evt, rdev_end_cac,
--	     TP_PROTO(struct wiphy *wiphy, struct net_device *netdev),
--	     TP_ARGS(wiphy, netdev)
-+TRACE_EVENT(rdev_end_cac,
-+	TP_PROTO(struct wiphy *wiphy, struct net_device *netdev),
-+	TP_ARGS(wiphy, netdev),
-+	TP_STRUCT__entry(
-+		WIPHY_ENTRY
-+		NETDEV_ENTRY
-+	),
-+	TP_fast_assign(
-+		WIPHY_ASSIGN;
-+		NETDEV_ASSIGN;
-+	),
-+	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT, WIPHY_PR_ARG, NETDEV_PR_ARG)
- );
- 
- DECLARE_EVENT_CLASS(station_add_change,
diff --git a/package/kernel/mac80211/patches/subsys/356-wifi-cfg80211-add-monitor-SKIP_TX-flag.patch b/package/kernel/mac80211/patches/subsys/336-wifi-cfg80211-add-monitor-SKIP_TX-flag.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/356-wifi-cfg80211-add-monitor-SKIP_TX-flag.patch
rename to package/kernel/mac80211/patches/subsys/336-wifi-cfg80211-add-monitor-SKIP_TX-flag.patch
diff --git a/package/kernel/mac80211/patches/subsys/336-wifi-cfg80211-move-DFS-related-members-to-links-in-w.patch b/package/kernel/mac80211/patches/subsys/336-wifi-cfg80211-move-DFS-related-members-to-links-in-w.patch
deleted file mode 100644
index 95dac04de5..0000000000
--- a/package/kernel/mac80211/patches/subsys/336-wifi-cfg80211-move-DFS-related-members-to-links-in-w.patch
+++ /dev/null
@@ -1,309 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:22 +0530
-Subject: [PATCH] wifi: cfg80211: move DFS related members to links[] in
- wireless_dev
-
-A few members related to DFS handling are currently under per wireless
-device data structure. However, in order to support DFS with MLO, there is
-a need to have them on a per-link manner.
-
-Hence, as a preliminary step, move members cac_started, cac_start_time
-and cac_time_ms to be on a per-link basis.
-
-Since currently, link ID is not known at all places, use default value of
-0 for now.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-5-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/drivers/net/wireless/marvell/mwifiex/11h.c
-+++ b/drivers/net/wireless/marvell/mwifiex/11h.c
-@@ -117,7 +117,7 @@ void mwifiex_dfs_cac_work_queue(struct w
- 				     dfs_cac_work);
- 
- 	chandef = priv->dfs_chandef;
--	if (priv->wdev.cac_started) {
-+	if (priv->wdev.links[0].cac_started) {
- 		mwifiex_dbg(priv->adapter, MSG,
- 			    "CAC timer finished; No radar detected\n");
- 		cfg80211_cac_event(priv->netdev, &chandef,
-@@ -174,7 +174,7 @@ int mwifiex_stop_radar_detection(struct
-  */
- void mwifiex_abort_cac(struct mwifiex_private *priv)
- {
--	if (priv->wdev.cac_started) {
-+	if (priv->wdev.links[0].cac_started) {
- 		if (mwifiex_stop_radar_detection(priv, &priv->dfs_chandef))
- 			mwifiex_dbg(priv->adapter, ERROR,
- 				    "failed to stop CAC in FW\n");
---- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c
-+++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c
-@@ -1880,7 +1880,7 @@ mwifiex_cfg80211_del_station(struct wiph
- 	struct mwifiex_sta_node *sta_node;
- 	u8 deauth_mac[ETH_ALEN];
- 
--	if (!priv->bss_started && priv->wdev.cac_started) {
-+	if (!priv->bss_started && priv->wdev.links[0].cac_started) {
- 		mwifiex_dbg(priv->adapter, INFO, "%s: abort CAC!\n", __func__);
- 		mwifiex_abort_cac(priv);
- 	}
-@@ -3978,7 +3978,7 @@ mwifiex_cfg80211_channel_switch(struct w
- 		return -EBUSY;
- 	}
- 
--	if (priv->wdev.cac_started)
-+	if (priv->wdev.links[0].cac_started)
- 		return -EBUSY;
- 
- 	if (cfg80211_chandef_identical(&params->chandef,
---- a/drivers/net/wireless/quantenna/qtnfmac/event.c
-+++ b/drivers/net/wireless/quantenna/qtnfmac/event.c
-@@ -520,21 +520,21 @@ static int qtnf_event_handle_radar(struc
- 		cfg80211_radar_event(wiphy, &chandef, GFP_KERNEL);
- 		break;
- 	case QLINK_RADAR_CAC_FINISHED:
--		if (!vif->wdev.cac_started)
-+		if (!vif->wdev.links[0].cac_started)
- 			break;
- 
- 		cfg80211_cac_event(vif->netdev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED, GFP_KERNEL);
- 		break;
- 	case QLINK_RADAR_CAC_ABORTED:
--		if (!vif->wdev.cac_started)
-+		if (!vif->wdev.links[0].cac_started)
- 			break;
- 
- 		cfg80211_cac_event(vif->netdev, &chandef,
- 				   NL80211_RADAR_CAC_ABORTED, GFP_KERNEL);
- 		break;
- 	case QLINK_RADAR_CAC_STARTED:
--		if (vif->wdev.cac_started)
-+		if (vif->wdev.links[0].cac_started)
- 			break;
- 
- 		if (!wiphy_ext_feature_isset(wiphy,
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -6198,9 +6198,6 @@ enum ieee80211_ap_reg_power {
-  * @address: The address for this device, valid only if @netdev is %NULL
-  * @is_running: true if this is a non-netdev device that has been started, e.g.
-  *	the P2P Device.
-- * @cac_started: true if DFS channel availability check has been started
-- * @cac_start_time: timestamp (jiffies) when the dfs state was entered.
-- * @cac_time_ms: CAC time in ms
-  * @ps: powersave mode is enabled
-  * @ps_timeout: dynamic powersave timeout
-  * @ap_unexpected_nlportid: (private) netlink port ID of application
-@@ -6224,6 +6221,11 @@ enum ieee80211_ap_reg_power {
-  *	unprotected beacon report
-  * @links: array of %IEEE80211_MLD_MAX_NUM_LINKS elements containing @addr
-  *	@ap and @client for each link
-+ * @links[].cac_started: true if DFS channel availability check has been
-+ *	started
-+ * @links[].cac_start_time: timestamp (jiffies) when the dfs state was
-+ *	entered.
-+ * @links[].cac_time_ms: CAC time in ms
-  * @valid_links: bitmap describing what elements of @links are valid
-  */
- struct wireless_dev {
-@@ -6265,11 +6267,6 @@ struct wireless_dev {
- 	u32 owner_nlportid;
- 	bool nl_owner_dead;
- 
--	/* FIXME: need to rework radar detection for MLO */
--	bool cac_started;
--	unsigned long cac_start_time;
--	unsigned int cac_time_ms;
--
- #ifdef CPTCFG_CFG80211_WEXT
- 	/* wext data */
- 	struct {
-@@ -6336,6 +6333,10 @@ struct wireless_dev {
- 				struct cfg80211_internal_bss *current_bss;
- 			} client;
- 		};
-+
-+		bool cac_started;
-+		unsigned long cac_start_time;
-+		unsigned int cac_time_ms;
- 	} links[IEEE80211_MLD_MAX_NUM_LINKS];
- 	u16 valid_links;
- };
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -1656,7 +1656,7 @@ static int ieee80211_stop_ap(struct wiph
- 	ieee80211_link_info_change_notify(sdata, link,
- 					  BSS_CHANGED_BEACON_ENABLED);
- 
--	if (sdata->wdev.cac_started) {
-+	if (sdata->wdev.links[0].cac_started) {
- 		chandef = link_conf->chanreq.oper;
- 		wiphy_delayed_work_cancel(wiphy, &link->dfs_cac_timer_work);
- 		cfg80211_cac_event(sdata->dev, &chandef,
-@@ -3498,9 +3498,9 @@ static void ieee80211_end_cac(struct wip
- 		wiphy_delayed_work_cancel(wiphy,
- 					  &sdata->deflink.dfs_cac_timer_work);
- 
--		if (sdata->wdev.cac_started) {
-+		if (sdata->wdev.links[0].cac_started) {
- 			ieee80211_link_release_channel(&sdata->deflink);
--			sdata->wdev.cac_started = false;
-+			sdata->wdev.links[0].cac_started = false;
- 		}
- 	}
- }
-@@ -3955,7 +3955,7 @@ __ieee80211_channel_switch(struct wiphy
- 	if (!list_empty(&local->roc_list) || local->scanning)
- 		return -EBUSY;
- 
--	if (sdata->wdev.cac_started)
-+	if (sdata->wdev.links[0].cac_started)
- 		return -EBUSY;
- 
- 	if (WARN_ON(link_id >= IEEE80211_MLD_MAX_NUM_LINKS))
---- a/net/mac80211/iface.c
-+++ b/net/mac80211/iface.c
-@@ -553,7 +553,7 @@ static void ieee80211_do_stop(struct iee
- 	wiphy_delayed_work_cancel(local->hw.wiphy,
- 				  &sdata->deflink.dfs_cac_timer_work);
- 
--	if (sdata->wdev.cac_started) {
-+	if (sdata->wdev.links[0].cac_started) {
- 		chandef = sdata->vif.bss_conf.chanreq.oper;
- 		WARN_ON(local->suspended);
- 		ieee80211_link_release_channel(&sdata->deflink);
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -3039,7 +3039,7 @@ void ieee80211_dfs_cac_timer_work(struct
- 
- 	lockdep_assert_wiphy(sdata->local->hw.wiphy);
- 
--	if (sdata->wdev.cac_started) {
-+	if (sdata->wdev.links[0].cac_started) {
- 		ieee80211_link_release_channel(link);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED,
---- a/net/mac80211/scan.c
-+++ b/net/mac80211/scan.c
-@@ -585,7 +585,7 @@ static bool __ieee80211_can_leave_ch(str
- 		return false;
- 
- 	list_for_each_entry(sdata_iter, &local->interfaces, list) {
--		if (sdata_iter->wdev.cac_started)
-+		if (sdata_iter->wdev.links[0].cac_started)
- 			return false;
- 	}
- 
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -3462,7 +3462,7 @@ void ieee80211_dfs_cac_cancel(struct iee
- 		wiphy_delayed_work_cancel(local->hw.wiphy,
- 					  &sdata->deflink.dfs_cac_timer_work);
- 
--		if (sdata->wdev.cac_started) {
-+		if (sdata->wdev.links[0].cac_started) {
- 			chandef = sdata->vif.bss_conf.chanreq.oper;
- 			ieee80211_link_release_channel(&sdata->deflink);
- 			cfg80211_cac_event(sdata->dev,
---- a/net/wireless/ibss.c
-+++ b/net/wireless/ibss.c
-@@ -94,7 +94,7 @@ int __cfg80211_join_ibss(struct cfg80211
- 
- 	lockdep_assert_held(&rdev->wiphy.mtx);
- 
--	if (wdev->cac_started)
-+	if (wdev->links[0].cac_started)
- 		return -EBUSY;
- 
- 	if (wdev->u.ibss.ssid_len)
---- a/net/wireless/mesh.c
-+++ b/net/wireless/mesh.c
-@@ -127,7 +127,7 @@ int __cfg80211_join_mesh(struct cfg80211
- 	if (!rdev->ops->join_mesh)
- 		return -EOPNOTSUPP;
- 
--	if (wdev->cac_started)
-+	if (wdev->links[0].cac_started)
- 		return -EBUSY;
- 
- 	if (!setup->chandef.chan) {
---- a/net/wireless/mlme.c
-+++ b/net/wireless/mlme.c
-@@ -1124,13 +1124,14 @@ void cfg80211_cac_event(struct net_devic
- 
- 	trace_cfg80211_cac_event(netdev, event);
- 
--	if (WARN_ON(!wdev->cac_started && event != NL80211_RADAR_CAC_STARTED))
-+	if (WARN_ON(!wdev->links[0].cac_started &&
-+		    event != NL80211_RADAR_CAC_STARTED))
- 		return;
- 
- 	switch (event) {
- 	case NL80211_RADAR_CAC_FINISHED:
--		timeout = wdev->cac_start_time +
--			  msecs_to_jiffies(wdev->cac_time_ms);
-+		timeout = wdev->links[0].cac_start_time +
-+			  msecs_to_jiffies(wdev->links[0].cac_time_ms);
- 		WARN_ON(!time_after_eq(jiffies, timeout));
- 		cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
- 		memcpy(&rdev->cac_done_chandef, chandef,
-@@ -1139,10 +1140,10 @@ void cfg80211_cac_event(struct net_devic
- 		cfg80211_sched_dfs_chan_update(rdev);
- 		fallthrough;
- 	case NL80211_RADAR_CAC_ABORTED:
--		wdev->cac_started = false;
-+		wdev->links[0].cac_started = false;
- 		break;
- 	case NL80211_RADAR_CAC_STARTED:
--		wdev->cac_started = true;
-+		wdev->links[0].cac_started = true;
- 		break;
- 	default:
- 		WARN_ON(1);
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -6066,7 +6066,7 @@ static int nl80211_start_ap(struct sk_bu
- 	if (!rdev->ops->start_ap)
- 		return -EOPNOTSUPP;
- 
--	if (wdev->cac_started)
-+	if (wdev->links[0].cac_started)
- 		return -EBUSY;
- 
- 	if (wdev->links[link_id].ap.beacon_interval)
-@@ -10122,7 +10122,7 @@ static int nl80211_start_radar_detection
- 		goto unlock;
- 	}
- 
--	if (cfg80211_beaconing_iface_active(wdev) || wdev->cac_started) {
-+	if (cfg80211_beaconing_iface_active(wdev) || wdev->links[0].cac_started) {
- 		err = -EBUSY;
- 		goto unlock;
- 	}
-@@ -10158,9 +10158,9 @@ static int nl80211_start_radar_detection
- 		default:
- 			break;
- 		}
--		wdev->cac_started = true;
--		wdev->cac_start_time = jiffies;
--		wdev->cac_time_ms = cac_time_ms;
-+		wdev->links[0].cac_started = true;
-+		wdev->links[0].cac_start_time = jiffies;
-+		wdev->links[0].cac_time_ms = cac_time_ms;
- 	}
- unlock:
- 	wiphy_unlock(wiphy);
---- a/net/wireless/reg.c
-+++ b/net/wireless/reg.c
-@@ -4241,7 +4241,7 @@ static void cfg80211_check_and_end_cac(s
- 	list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) {
- 		struct cfg80211_chan_def *chandef;
- 
--		if (!wdev->cac_started)
-+		if (!wdev->links[0].cac_started)
- 			continue;
- 
- 		/* FIXME: radar detection is tied to link 0 for now */
diff --git a/package/kernel/mac80211/patches/subsys/337-wifi-cfg80211-handle-DFS-per-link.patch b/package/kernel/mac80211/patches/subsys/337-wifi-cfg80211-handle-DFS-per-link.patch
deleted file mode 100644
index a4e0333642..0000000000
--- a/package/kernel/mac80211/patches/subsys/337-wifi-cfg80211-handle-DFS-per-link.patch
+++ /dev/null
@@ -1,435 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:23 +0530
-Subject: [PATCH] wifi: cfg80211: handle DFS per link
-
-Currently, during starting a radar detection, no link id information is
-parsed and passed down. In order to support starting radar detection
-during Multi Link Operation, it is required to pass link id as well.
-
-Add changes to first parse and then pass link id in the start radar
-detection path.
-
-Additionally, update notification APIs to allow drivers/mac80211 to
-pass the link ID.
-
-However, everything is handled at link 0 only until all API's are ready to
-handle it per link.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-6-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/drivers/net/wireless/marvell/mwifiex/11h.c
-+++ b/drivers/net/wireless/marvell/mwifiex/11h.c
-@@ -122,7 +122,7 @@ void mwifiex_dfs_cac_work_queue(struct w
- 			    "CAC timer finished; No radar detected\n");
- 		cfg80211_cac_event(priv->netdev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED,
--				   GFP_KERNEL);
-+				   GFP_KERNEL, 0);
- 	}
- }
- 
-@@ -182,7 +182,8 @@ void mwifiex_abort_cac(struct mwifiex_pr
- 			    "Aborting delayed work for CAC.\n");
- 		cancel_delayed_work_sync(&priv->dfs_cac_work);
- 		cfg80211_cac_event(priv->netdev, &priv->dfs_chandef,
--				   NL80211_RADAR_CAC_ABORTED, GFP_KERNEL);
-+				   NL80211_RADAR_CAC_ABORTED, GFP_KERNEL,
-+				   0);
- 	}
- }
- 
-@@ -221,7 +222,7 @@ int mwifiex_11h_handle_chanrpt_ready(str
- 				cfg80211_cac_event(priv->netdev,
- 						   &priv->dfs_chandef,
- 						   NL80211_RADAR_DETECTED,
--						   GFP_KERNEL);
-+						   GFP_KERNEL, 0);
- 			}
- 			break;
- 		default:
---- a/drivers/net/wireless/marvell/mwifiex/cfg80211.c
-+++ b/drivers/net/wireless/marvell/mwifiex/cfg80211.c
-@@ -4145,7 +4145,7 @@ static int
- mwifiex_cfg80211_start_radar_detection(struct wiphy *wiphy,
- 				       struct net_device *dev,
- 				       struct cfg80211_chan_def *chandef,
--				       u32 cac_time_ms)
-+				       u32 cac_time_ms, int link_id)
- {
- 	struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev);
- 	struct mwifiex_radar_params radar_params;
---- a/drivers/net/wireless/quantenna/qtnfmac/cfg80211.c
-+++ b/drivers/net/wireless/quantenna/qtnfmac/cfg80211.c
-@@ -837,7 +837,7 @@ static int qtnf_channel_switch(struct wi
- static int qtnf_start_radar_detection(struct wiphy *wiphy,
- 				      struct net_device *ndev,
- 				      struct cfg80211_chan_def *chandef,
--				      u32 cac_time_ms)
-+				      u32 cac_time_ms, int link_id)
- {
- 	struct qtnf_vif *vif = qtnf_netdev_get_priv(ndev);
- 	int ret;
---- a/drivers/net/wireless/quantenna/qtnfmac/event.c
-+++ b/drivers/net/wireless/quantenna/qtnfmac/event.c
-@@ -524,14 +524,14 @@ static int qtnf_event_handle_radar(struc
- 			break;
- 
- 		cfg80211_cac_event(vif->netdev, &chandef,
--				   NL80211_RADAR_CAC_FINISHED, GFP_KERNEL);
-+				   NL80211_RADAR_CAC_FINISHED, GFP_KERNEL, 0);
- 		break;
- 	case QLINK_RADAR_CAC_ABORTED:
- 		if (!vif->wdev.links[0].cac_started)
- 			break;
- 
- 		cfg80211_cac_event(vif->netdev, &chandef,
--				   NL80211_RADAR_CAC_ABORTED, GFP_KERNEL);
-+				   NL80211_RADAR_CAC_ABORTED, GFP_KERNEL, 0);
- 		break;
- 	case QLINK_RADAR_CAC_STARTED:
- 		if (vif->wdev.links[0].cac_started)
-@@ -542,7 +542,7 @@ static int qtnf_event_handle_radar(struc
- 			break;
- 
- 		cfg80211_cac_event(vif->netdev, &chandef,
--				   NL80211_RADAR_CAC_STARTED, GFP_KERNEL);
-+				   NL80211_RADAR_CAC_STARTED, GFP_KERNEL, 0);
- 		break;
- 	default:
- 		pr_warn("%s: unhandled radar event %u\n",
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -4841,9 +4841,9 @@ struct cfg80211_ops {
- 	int	(*start_radar_detection)(struct wiphy *wiphy,
- 					 struct net_device *dev,
- 					 struct cfg80211_chan_def *chandef,
--					 u32 cac_time_ms);
-+					 u32 cac_time_ms, int link_id);
- 	void	(*end_cac)(struct wiphy *wiphy,
--				struct net_device *dev);
-+			   struct net_device *dev, unsigned int link_id);
- 	int	(*update_ft_ies)(struct wiphy *wiphy, struct net_device *dev,
- 				 struct cfg80211_update_ft_ies_params *ftie);
- 	int	(*crit_proto_start)(struct wiphy *wiphy,
-@@ -8745,6 +8745,7 @@ void cfg80211_sta_opmode_change_notify(s
-  * @chandef: chandef for the current channel
-  * @event: type of event
-  * @gfp: context flags
-+ * @link_id: valid link_id for MLO operation or 0 otherwise.
-  *
-  * This function is called when a Channel availability check (CAC) is finished
-  * or aborted. This must be called to notify the completion of a CAC process,
-@@ -8752,7 +8753,8 @@ void cfg80211_sta_opmode_change_notify(s
-  */
- void cfg80211_cac_event(struct net_device *netdev,
- 			const struct cfg80211_chan_def *chandef,
--			enum nl80211_radar_event event, gfp_t gfp);
-+			enum nl80211_radar_event event, gfp_t gfp,
-+			unsigned int link_id);
- 
- /**
-  * cfg80211_background_cac_abort - Channel Availability Check offchan abort event
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -1661,7 +1661,7 @@ static int ieee80211_stop_ap(struct wiph
- 		wiphy_delayed_work_cancel(wiphy, &link->dfs_cac_timer_work);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_ABORTED,
--				   GFP_KERNEL);
-+				   GFP_KERNEL, 0);
- 	}
- 
- 	drv_stop_ap(sdata->local, sdata, link_conf);
-@@ -3459,7 +3459,7 @@ static int ieee80211_set_bitrate_mask(st
- static int ieee80211_start_radar_detection(struct wiphy *wiphy,
- 					   struct net_device *dev,
- 					   struct cfg80211_chan_def *chandef,
--					   u32 cac_time_ms)
-+					   u32 cac_time_ms, int link_id)
- {
- 	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
- 	struct ieee80211_chan_req chanreq = { .oper = *chandef };
-@@ -3487,7 +3487,7 @@ static int ieee80211_start_radar_detecti
- }
- 
- static void ieee80211_end_cac(struct wiphy *wiphy,
--			      struct net_device *dev)
-+			      struct net_device *dev, unsigned int link_id)
- {
- 	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
- 	struct ieee80211_local *local = sdata->local;
---- a/net/mac80211/iface.c
-+++ b/net/mac80211/iface.c
-@@ -559,7 +559,7 @@ static void ieee80211_do_stop(struct iee
- 		ieee80211_link_release_channel(&sdata->deflink);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_ABORTED,
--				   GFP_KERNEL);
-+				   GFP_KERNEL, 0);
- 	}
- 
- 	if (sdata->vif.type == NL80211_IFTYPE_AP) {
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -3043,7 +3043,7 @@ void ieee80211_dfs_cac_timer_work(struct
- 		ieee80211_link_release_channel(link);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED,
--				   GFP_KERNEL);
-+				   GFP_KERNEL, 0);
- 	}
- }
- 
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -3468,7 +3468,7 @@ void ieee80211_dfs_cac_cancel(struct iee
- 			cfg80211_cac_event(sdata->dev,
- 					   &chandef,
- 					   NL80211_RADAR_CAC_ABORTED,
--					   GFP_KERNEL);
-+					   GFP_KERNEL, 0);
- 		}
- 	}
- }
---- a/net/wireless/mlme.c
-+++ b/net/wireless/mlme.c
-@@ -1111,18 +1111,19 @@ EXPORT_SYMBOL(__cfg80211_radar_event);
- 
- void cfg80211_cac_event(struct net_device *netdev,
- 			const struct cfg80211_chan_def *chandef,
--			enum nl80211_radar_event event, gfp_t gfp)
-+			enum nl80211_radar_event event, gfp_t gfp,
-+			unsigned int link_id)
- {
- 	struct wireless_dev *wdev = netdev->ieee80211_ptr;
- 	struct wiphy *wiphy = wdev->wiphy;
- 	struct cfg80211_registered_device *rdev = wiphy_to_rdev(wiphy);
- 	unsigned long timeout;
- 
--	/* not yet supported */
--	if (wdev->valid_links)
-+	if (WARN_ON(wdev->valid_links &&
-+		    !(wdev->valid_links & BIT(link_id))))
- 		return;
- 
--	trace_cfg80211_cac_event(netdev, event);
-+	trace_cfg80211_cac_event(netdev, event, link_id);
- 
- 	if (WARN_ON(!wdev->links[0].cac_started &&
- 		    event != NL80211_RADAR_CAC_STARTED))
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -10122,7 +10122,20 @@ static int nl80211_start_radar_detection
- 		goto unlock;
- 	}
- 
--	if (cfg80211_beaconing_iface_active(wdev) || wdev->links[0].cac_started) {
-+	if (cfg80211_beaconing_iface_active(wdev)) {
-+		/* During MLO other link(s) can beacon, only the current link
-+		 * can not already beacon
-+		 */
-+		if (wdev->valid_links &&
-+		    !wdev->links[0].ap.beacon_interval) {
-+			/* nothing */
-+		} else {
-+			err = -EBUSY;
-+			goto unlock;
-+		}
-+	}
-+
-+	if (wdev->links[0].cac_started) {
- 		err = -EBUSY;
- 		goto unlock;
- 	}
-@@ -10142,7 +10155,8 @@ static int nl80211_start_radar_detection
- 	if (WARN_ON(!cac_time_ms))
- 		cac_time_ms = IEEE80211_DFS_MIN_CAC_TIME_MS;
- 
--	err = rdev_start_radar_detection(rdev, dev, &chandef, cac_time_ms);
-+	err = rdev_start_radar_detection(rdev, dev, &chandef, cac_time_ms,
-+					 0);
- 	if (!err) {
- 		switch (wdev->iftype) {
- 		case NL80211_IFTYPE_AP:
-@@ -16512,10 +16526,10 @@ nl80211_set_ttlm(struct sk_buff *skb, st
- 	SELECTOR(__sel, NETDEV_UP_NOTMX,		\
- 		 NL80211_FLAG_NEED_NETDEV_UP |		\
- 		 NL80211_FLAG_NO_WIPHY_MTX)		\
--	SELECTOR(__sel, NETDEV_UP_NOTMX_NOMLO,		\
-+	SELECTOR(__sel, NETDEV_UP_NOTMX_MLO,		\
- 		 NL80211_FLAG_NEED_NETDEV_UP |		\
- 		 NL80211_FLAG_NO_WIPHY_MTX |		\
--		 NL80211_FLAG_MLO_UNSUPPORTED)		\
-+		 NL80211_FLAG_MLO_VALID_LINK_ID)	\
- 	SELECTOR(__sel, NETDEV_UP_CLEAR,		\
- 		 NL80211_FLAG_NEED_NETDEV_UP |		\
- 		 NL80211_FLAG_CLEAR_SKB)		\
-@@ -17410,7 +17424,7 @@ static const struct genl_small_ops nl802
- 		.flags = GENL_UNS_ADMIN_PERM,
- 		.internal_flags = IFLAGS(NL80211_FLAG_NEED_NETDEV_UP |
- 					 NL80211_FLAG_NO_WIPHY_MTX |
--					 NL80211_FLAG_MLO_UNSUPPORTED),
-+					 NL80211_FLAG_MLO_VALID_LINK_ID),
- 	},
- 	{
- 		.cmd = NL80211_CMD_GET_PROTOCOL_FEATURES,
---- a/net/wireless/rdev-ops.h
-+++ b/net/wireless/rdev-ops.h
-@@ -1200,26 +1200,27 @@ static inline int
- rdev_start_radar_detection(struct cfg80211_registered_device *rdev,
- 			   struct net_device *dev,
- 			   struct cfg80211_chan_def *chandef,
--			   u32 cac_time_ms)
-+			   u32 cac_time_ms, int link_id)
- {
- 	int ret = -EOPNOTSUPP;
- 
- 	trace_rdev_start_radar_detection(&rdev->wiphy, dev, chandef,
--					 cac_time_ms);
-+					 cac_time_ms, link_id);
- 	if (rdev->ops->start_radar_detection)
- 		ret = rdev->ops->start_radar_detection(&rdev->wiphy, dev,
--						       chandef, cac_time_ms);
-+						       chandef, cac_time_ms,
-+						       link_id);
- 	trace_rdev_return_int(&rdev->wiphy, ret);
- 	return ret;
- }
- 
- static inline void
- rdev_end_cac(struct cfg80211_registered_device *rdev,
--	     struct net_device *dev)
-+	     struct net_device *dev, unsigned int link_id)
- {
--	trace_rdev_end_cac(&rdev->wiphy, dev);
-+	trace_rdev_end_cac(&rdev->wiphy, dev, link_id);
- 	if (rdev->ops->end_cac)
--		rdev->ops->end_cac(&rdev->wiphy, dev);
-+		rdev->ops->end_cac(&rdev->wiphy, dev, link_id);
- 	trace_rdev_return_void(&rdev->wiphy);
- }
- 
---- a/net/wireless/reg.c
-+++ b/net/wireless/reg.c
-@@ -4229,6 +4229,8 @@ EXPORT_SYMBOL(regulatory_pre_cac_allowed
- static void cfg80211_check_and_end_cac(struct cfg80211_registered_device *rdev)
- {
- 	struct wireless_dev *wdev;
-+	unsigned int link_id;
-+
- 	/* If we finished CAC or received radar, we should end any
- 	 * CAC running on the same channels.
- 	 * the check !cfg80211_chandef_dfs_usable contain 2 options:
-@@ -4241,16 +4243,17 @@ static void cfg80211_check_and_end_cac(s
- 	list_for_each_entry(wdev, &rdev->wiphy.wdev_list, list) {
- 		struct cfg80211_chan_def *chandef;
- 
--		if (!wdev->links[0].cac_started)
--			continue;
-+		for_each_valid_link(wdev, link_id) {
-+			if (!wdev->links[link_id].cac_started)
-+				continue;
- 
--		/* FIXME: radar detection is tied to link 0 for now */
--		chandef = wdev_chandef(wdev, 0);
--		if (!chandef)
--			continue;
-+			chandef = wdev_chandef(wdev, link_id);
-+			if (!chandef)
-+				continue;
- 
--		if (!cfg80211_chandef_dfs_usable(&rdev->wiphy, chandef))
--			rdev_end_cac(rdev, wdev->netdev);
-+			if (!cfg80211_chandef_dfs_usable(&rdev->wiphy, chandef))
-+				rdev_end_cac(rdev, wdev->netdev, link_id);
-+		}
- 	}
- }
- 
---- a/net/wireless/trace.h
-+++ b/net/wireless/trace.h
-@@ -806,17 +806,21 @@ DEFINE_EVENT(wiphy_netdev_evt, rdev_flus
- );
- 
- TRACE_EVENT(rdev_end_cac,
--	TP_PROTO(struct wiphy *wiphy, struct net_device *netdev),
--	TP_ARGS(wiphy, netdev),
-+	TP_PROTO(struct wiphy *wiphy, struct net_device *netdev,
-+		 unsigned int link_id),
-+	TP_ARGS(wiphy, netdev, link_id),
- 	TP_STRUCT__entry(
- 		WIPHY_ENTRY
- 		NETDEV_ENTRY
-+		__field(unsigned int, link_id)
- 	),
- 	TP_fast_assign(
- 		WIPHY_ASSIGN;
- 		NETDEV_ASSIGN;
-+		__entry->link_id = link_id;
- 	),
--	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT, WIPHY_PR_ARG, NETDEV_PR_ARG)
-+	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT ", link_id: %d",
-+		  WIPHY_PR_ARG, NETDEV_PR_ARG, __entry->link_id)
- );
- 
- DECLARE_EVENT_CLASS(station_add_change,
-@@ -2661,24 +2665,26 @@ TRACE_EVENT(rdev_external_auth,
- TRACE_EVENT(rdev_start_radar_detection,
- 	TP_PROTO(struct wiphy *wiphy, struct net_device *netdev,
- 		 struct cfg80211_chan_def *chandef,
--		 u32 cac_time_ms),
--	TP_ARGS(wiphy, netdev, chandef, cac_time_ms),
-+		 u32 cac_time_ms, int link_id),
-+	TP_ARGS(wiphy, netdev, chandef, cac_time_ms, link_id),
- 	TP_STRUCT__entry(
- 		WIPHY_ENTRY
- 		NETDEV_ENTRY
- 		CHAN_DEF_ENTRY
- 		__field(u32, cac_time_ms)
-+		__field(int, link_id)
- 	),
- 	TP_fast_assign(
- 		WIPHY_ASSIGN;
- 		NETDEV_ASSIGN;
- 		CHAN_DEF_ASSIGN(chandef);
- 		__entry->cac_time_ms = cac_time_ms;
-+		__entry->link_id = link_id;
- 	),
- 	TP_printk(WIPHY_PR_FMT ", " NETDEV_PR_FMT ", " CHAN_DEF_PR_FMT
--		  ", cac_time_ms=%u",
-+		  ", cac_time_ms=%u, link_id=%d",
- 		  WIPHY_PR_ARG, NETDEV_PR_ARG, CHAN_DEF_PR_ARG,
--		  __entry->cac_time_ms)
-+		  __entry->cac_time_ms, __entry->link_id)
- );
- 
- TRACE_EVENT(rdev_set_mcast_rate,
-@@ -3492,18 +3498,21 @@ TRACE_EVENT(cfg80211_radar_event,
- );
- 
- TRACE_EVENT(cfg80211_cac_event,
--	TP_PROTO(struct net_device *netdev, enum nl80211_radar_event evt),
--	TP_ARGS(netdev, evt),
-+	TP_PROTO(struct net_device *netdev, enum nl80211_radar_event evt,
-+		 unsigned int link_id),
-+	TP_ARGS(netdev, evt, link_id),
- 	TP_STRUCT__entry(
- 		NETDEV_ENTRY
- 		__field(enum nl80211_radar_event, evt)
-+		__field(unsigned int, link_id)
- 	),
- 	TP_fast_assign(
- 		NETDEV_ASSIGN;
- 		__entry->evt = evt;
-+		__entry->link_id = link_id;
- 	),
--	TP_printk(NETDEV_PR_FMT ",  event: %d",
--		  NETDEV_PR_ARG, __entry->evt)
-+	TP_printk(NETDEV_PR_FMT ",  event: %d, link_id=%u",
-+		  NETDEV_PR_ARG, __entry->evt, __entry->link_id)
- );
- 
- DECLARE_EVENT_CLASS(cfg80211_rx_evt,
diff --git a/package/kernel/mac80211/patches/subsys/357-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch b/package/kernel/mac80211/patches/subsys/337-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch
similarity index 97%
rename from package/kernel/mac80211/patches/subsys/357-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch
rename to package/kernel/mac80211/patches/subsys/337-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch
index e62c15c19d..d9e484eeba 100644
--- a/package/kernel/mac80211/patches/subsys/357-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch
+++ b/package/kernel/mac80211/patches/subsys/337-wifi-mac80211-add-support-for-the-monitor-SKIP_TX-fl.patch
@@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/mac80211/ieee80211_i.h
 +++ b/net/mac80211/ieee80211_i.h
-@@ -1374,7 +1374,7 @@ struct ieee80211_local {
+@@ -1373,7 +1373,7 @@ struct ieee80211_local {
  	spinlock_t queue_stop_reason_lock;
  
  	int open_count;
diff --git a/package/kernel/mac80211/patches/subsys/338-wifi-mac80211-handle-DFS-per-link.patch b/package/kernel/mac80211/patches/subsys/338-wifi-mac80211-handle-DFS-per-link.patch
deleted file mode 100644
index 388c0575c8..0000000000
--- a/package/kernel/mac80211/patches/subsys/338-wifi-mac80211-handle-DFS-per-link.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:24 +0530
-Subject: [PATCH] wifi: mac80211: handle DFS per link
-
-In order to support DFS with MLO, handle the link ID now passed from
-cfg80211, adjust the code to do everything per link and call the
-notifications to cfg80211 correctly.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-7-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -3464,6 +3464,7 @@ static int ieee80211_start_radar_detecti
- 	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
- 	struct ieee80211_chan_req chanreq = { .oper = *chandef };
- 	struct ieee80211_local *local = sdata->local;
-+	struct ieee80211_link_data *link_data;
- 	int err;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
-@@ -3471,16 +3472,20 @@ static int ieee80211_start_radar_detecti
- 	if (!list_empty(&local->roc_list) || local->scanning)
- 		return -EBUSY;
- 
-+	link_data = sdata_dereference(sdata->link[link_id], sdata);
-+	if (!link_data)
-+		return -ENOLINK;
-+
- 	/* whatever, but channel contexts should not complain about that one */
--	sdata->deflink.smps_mode = IEEE80211_SMPS_OFF;
--	sdata->deflink.needed_rx_chains = local->rx_chains;
-+	link_data->smps_mode = IEEE80211_SMPS_OFF;
-+	link_data->needed_rx_chains = local->rx_chains;
- 
--	err = ieee80211_link_use_channel(&sdata->deflink, &chanreq,
-+	err = ieee80211_link_use_channel(link_data, &chanreq,
- 					 IEEE80211_CHANCTX_SHARED);
- 	if (err)
- 		return err;
- 
--	wiphy_delayed_work_queue(wiphy, &sdata->deflink.dfs_cac_timer_work,
-+	wiphy_delayed_work_queue(wiphy, &link_data->dfs_cac_timer_work,
- 				 msecs_to_jiffies(cac_time_ms));
- 
- 	return 0;
-@@ -3491,16 +3496,21 @@ static void ieee80211_end_cac(struct wip
- {
- 	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
- 	struct ieee80211_local *local = sdata->local;
-+	struct ieee80211_link_data *link_data;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
- 
- 	list_for_each_entry(sdata, &local->interfaces, list) {
-+		link_data = sdata_dereference(sdata->link[link_id], sdata);
-+		if (!link_data)
-+			continue;
-+
- 		wiphy_delayed_work_cancel(wiphy,
--					  &sdata->deflink.dfs_cac_timer_work);
-+					  &link_data->dfs_cac_timer_work);
- 
--		if (sdata->wdev.links[0].cac_started) {
--			ieee80211_link_release_channel(&sdata->deflink);
--			sdata->wdev.links[0].cac_started = false;
-+		if (sdata->wdev.links[link_id].cac_started) {
-+			ieee80211_link_release_channel(link_data);
-+			sdata->wdev.links[link_id].cac_started = false;
- 		}
- 	}
- }
---- a/net/mac80211/link.c
-+++ b/net/mac80211/link.c
-@@ -77,6 +77,16 @@ void ieee80211_link_stop(struct ieee8021
- 			  &link->color_change_finalize_work);
- 	wiphy_work_cancel(link->sdata->local->hw.wiphy,
- 			  &link->csa.finalize_work);
-+
-+	if (link->sdata->wdev.links[link->link_id].cac_started) {
-+		wiphy_delayed_work_cancel(link->sdata->local->hw.wiphy,
-+					  &link->dfs_cac_timer_work);
-+		cfg80211_cac_event(link->sdata->dev,
-+				   &link->conf->chanreq.oper,
-+				   NL80211_RADAR_CAC_ABORTED,
-+				   GFP_KERNEL, link->link_id);
-+	}
-+
- 	ieee80211_link_release_channel(link);
- }
- 
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -3455,20 +3455,30 @@ void ieee80211_dfs_cac_cancel(struct iee
- {
- 	struct ieee80211_sub_if_data *sdata;
- 	struct cfg80211_chan_def chandef;
-+	struct ieee80211_link_data *link;
-+	unsigned int link_id;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
- 
- 	list_for_each_entry(sdata, &local->interfaces, list) {
--		wiphy_delayed_work_cancel(local->hw.wiphy,
--					  &sdata->deflink.dfs_cac_timer_work);
-+		for (link_id = 0; link_id < IEEE80211_MLD_MAX_NUM_LINKS;
-+		     link_id++) {
-+			link = sdata_dereference(sdata->link[link_id],
-+						 sdata);
-+			if (!link)
-+				continue;
- 
--		if (sdata->wdev.links[0].cac_started) {
--			chandef = sdata->vif.bss_conf.chanreq.oper;
--			ieee80211_link_release_channel(&sdata->deflink);
--			cfg80211_cac_event(sdata->dev,
--					   &chandef,
-+			wiphy_delayed_work_cancel(local->hw.wiphy,
-+						  &link->dfs_cac_timer_work);
-+
-+			if (!sdata->wdev.links[link_id].cac_started)
-+				continue;
-+
-+			chandef = link->conf->chanreq.oper;
-+			ieee80211_link_release_channel(link);
-+			cfg80211_cac_event(sdata->dev, &chandef,
- 					   NL80211_RADAR_CAC_ABORTED,
--					   GFP_KERNEL, 0);
-+					   GFP_KERNEL, link_id);
- 		}
- 	}
- }
diff --git a/package/kernel/mac80211/patches/subsys/358-wifi-mac80211-refactor-ieee80211_rx_monitor.patch b/package/kernel/mac80211/patches/subsys/338-wifi-mac80211-refactor-ieee80211_rx_monitor.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/358-wifi-mac80211-refactor-ieee80211_rx_monitor.patch
rename to package/kernel/mac80211/patches/subsys/338-wifi-mac80211-refactor-ieee80211_rx_monitor.patch
diff --git a/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-mac80211-use-proper-link-ID-for-DFS.patch b/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-mac80211-use-proper-link-ID-for-DFS.patch
deleted file mode 100644
index 53079b6cf6..0000000000
--- a/package/kernel/mac80211/patches/subsys/339-wifi-cfg80211-mac80211-use-proper-link-ID-for-DFS.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:25 +0530
-Subject: [PATCH] wifi: cfg80211/mac80211: use proper link ID for DFS
-
-Now that all APIs have support to handle DFS per link, use proper link ID
-instead of 0.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-8-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -1656,12 +1656,12 @@ static int ieee80211_stop_ap(struct wiph
- 	ieee80211_link_info_change_notify(sdata, link,
- 					  BSS_CHANGED_BEACON_ENABLED);
- 
--	if (sdata->wdev.links[0].cac_started) {
-+	if (sdata->wdev.links[link_id].cac_started) {
- 		chandef = link_conf->chanreq.oper;
- 		wiphy_delayed_work_cancel(wiphy, &link->dfs_cac_timer_work);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_ABORTED,
--				   GFP_KERNEL, 0);
-+				   GFP_KERNEL, link_id);
- 	}
- 
- 	drv_stop_ap(sdata->local, sdata, link_conf);
-@@ -3965,7 +3965,7 @@ __ieee80211_channel_switch(struct wiphy
- 	if (!list_empty(&local->roc_list) || local->scanning)
- 		return -EBUSY;
- 
--	if (sdata->wdev.links[0].cac_started)
-+	if (sdata->wdev.links[link_id].cac_started)
- 		return -EBUSY;
- 
- 	if (WARN_ON(link_id >= IEEE80211_MLD_MAX_NUM_LINKS))
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -3039,11 +3039,11 @@ void ieee80211_dfs_cac_timer_work(struct
- 
- 	lockdep_assert_wiphy(sdata->local->hw.wiphy);
- 
--	if (sdata->wdev.links[0].cac_started) {
-+	if (sdata->wdev.links[link->link_id].cac_started) {
- 		ieee80211_link_release_channel(link);
- 		cfg80211_cac_event(sdata->dev, &chandef,
- 				   NL80211_RADAR_CAC_FINISHED,
--				   GFP_KERNEL, 0);
-+				   GFP_KERNEL, link->link_id);
- 	}
- }
- 
---- a/net/mac80211/scan.c
-+++ b/net/mac80211/scan.c
-@@ -575,6 +575,7 @@ static bool __ieee80211_can_leave_ch(str
- {
- 	struct ieee80211_local *local = sdata->local;
- 	struct ieee80211_sub_if_data *sdata_iter;
-+	unsigned int link_id;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
- 
-@@ -585,8 +586,9 @@ static bool __ieee80211_can_leave_ch(str
- 		return false;
- 
- 	list_for_each_entry(sdata_iter, &local->interfaces, list) {
--		if (sdata_iter->wdev.links[0].cac_started)
--			return false;
-+		for_each_valid_link(&sdata_iter->wdev, link_id)
-+			if (sdata_iter->wdev.links[link_id].cac_started)
-+				return false;
- 	}
- 
- 	return true;
---- a/net/wireless/mlme.c
-+++ b/net/wireless/mlme.c
-@@ -1125,14 +1125,14 @@ void cfg80211_cac_event(struct net_devic
- 
- 	trace_cfg80211_cac_event(netdev, event, link_id);
- 
--	if (WARN_ON(!wdev->links[0].cac_started &&
-+	if (WARN_ON(!wdev->links[link_id].cac_started &&
- 		    event != NL80211_RADAR_CAC_STARTED))
- 		return;
- 
- 	switch (event) {
- 	case NL80211_RADAR_CAC_FINISHED:
--		timeout = wdev->links[0].cac_start_time +
--			  msecs_to_jiffies(wdev->links[0].cac_time_ms);
-+		timeout = wdev->links[link_id].cac_start_time +
-+			  msecs_to_jiffies(wdev->links[link_id].cac_time_ms);
- 		WARN_ON(!time_after_eq(jiffies, timeout));
- 		cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
- 		memcpy(&rdev->cac_done_chandef, chandef,
-@@ -1141,10 +1141,10 @@ void cfg80211_cac_event(struct net_devic
- 		cfg80211_sched_dfs_chan_update(rdev);
- 		fallthrough;
- 	case NL80211_RADAR_CAC_ABORTED:
--		wdev->links[0].cac_started = false;
-+		wdev->links[link_id].cac_started = false;
- 		break;
- 	case NL80211_RADAR_CAC_STARTED:
--		wdev->links[0].cac_started = true;
-+		wdev->links[link_id].cac_started = true;
- 		break;
- 	default:
- 		WARN_ON(1);
---- a/net/wireless/nl80211.c
-+++ b/net/wireless/nl80211.c
-@@ -6066,7 +6066,7 @@ static int nl80211_start_ap(struct sk_bu
- 	if (!rdev->ops->start_ap)
- 		return -EOPNOTSUPP;
- 
--	if (wdev->links[0].cac_started)
-+	if (wdev->links[link_id].cac_started)
- 		return -EBUSY;
- 
- 	if (wdev->links[link_id].ap.beacon_interval)
-@@ -10073,6 +10073,7 @@ static int nl80211_start_radar_detection
- 	struct cfg80211_registered_device *rdev = info->user_ptr[0];
- 	struct net_device *dev = info->user_ptr[1];
- 	struct wireless_dev *wdev = dev->ieee80211_ptr;
-+	int link_id = nl80211_link_id(info->attrs);
- 	struct wiphy *wiphy = wdev->wiphy;
- 	struct cfg80211_chan_def chandef;
- 	enum nl80211_dfs_regions dfs_region;
-@@ -10127,7 +10128,7 @@ static int nl80211_start_radar_detection
- 		 * can not already beacon
- 		 */
- 		if (wdev->valid_links &&
--		    !wdev->links[0].ap.beacon_interval) {
-+		    !wdev->links[link_id].ap.beacon_interval) {
- 			/* nothing */
- 		} else {
- 			err = -EBUSY;
-@@ -10135,7 +10136,7 @@ static int nl80211_start_radar_detection
- 		}
- 	}
- 
--	if (wdev->links[0].cac_started) {
-+	if (wdev->links[link_id].cac_started) {
- 		err = -EBUSY;
- 		goto unlock;
- 	}
-@@ -10156,7 +10157,7 @@ static int nl80211_start_radar_detection
- 		cac_time_ms = IEEE80211_DFS_MIN_CAC_TIME_MS;
- 
- 	err = rdev_start_radar_detection(rdev, dev, &chandef, cac_time_ms,
--					 0);
-+					 link_id);
- 	if (!err) {
- 		switch (wdev->iftype) {
- 		case NL80211_IFTYPE_AP:
-@@ -10172,9 +10173,9 @@ static int nl80211_start_radar_detection
- 		default:
- 			break;
- 		}
--		wdev->links[0].cac_started = true;
--		wdev->links[0].cac_start_time = jiffies;
--		wdev->links[0].cac_time_ms = cac_time_ms;
-+		wdev->links[link_id].cac_started = true;
-+		wdev->links[link_id].cac_start_time = jiffies;
-+		wdev->links[link_id].cac_time_ms = cac_time_ms;
- 	}
- unlock:
- 	wiphy_unlock(wiphy);
diff --git a/package/kernel/mac80211/patches/subsys/359-wifi-mac80211-filter-on-monitor-interfaces-based-on-.patch b/package/kernel/mac80211/patches/subsys/339-wifi-mac80211-filter-on-monitor-interfaces-based-on-.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/359-wifi-mac80211-filter-on-monitor-interfaces-based-on-.patch
rename to package/kernel/mac80211/patches/subsys/339-wifi-mac80211-filter-on-monitor-interfaces-based-on-.patch
diff --git a/package/kernel/mac80211/patches/subsys/360-wifi-cfg80211-report-per-wiphy-radio-antenna-mask.patch b/package/kernel/mac80211/patches/subsys/340-wifi-cfg80211-report-per-wiphy-radio-antenna-mask.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/360-wifi-cfg80211-report-per-wiphy-radio-antenna-mask.patch
rename to package/kernel/mac80211/patches/subsys/340-wifi-cfg80211-report-per-wiphy-radio-antenna-mask.patch
diff --git a/package/kernel/mac80211/patches/subsys/340-wifi-mac80211-handle-ieee80211_radar_detected-for-ML.patch b/package/kernel/mac80211/patches/subsys/340-wifi-mac80211-handle-ieee80211_radar_detected-for-ML.patch
deleted file mode 100644
index 3f64864bd4..0000000000
--- a/package/kernel/mac80211/patches/subsys/340-wifi-mac80211-handle-ieee80211_radar_detected-for-ML.patch
+++ /dev/null
@@ -1,360 +0,0 @@
-From: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Date: Fri, 6 Sep 2024 12:14:26 +0530
-Subject: [PATCH] wifi: mac80211: handle ieee80211_radar_detected() for MLO
-
-Currently DFS works under assumption there could be only one channel
-context in the hardware. Hence, drivers just calls the function
-ieee80211_radar_detected() passing the hardware structure. However, with
-MLO, this obviously will not work since number of channel contexts will be
-more than one and hence drivers would need to pass the channel information
-as well on which the radar is detected.
-
-Also, when radar is detected in one of the links, other link's CAC should
-not be cancelled.
-
-Hence, in order to support DFS with MLO, do the following changes -
-  * Add channel context conf pointer as an argument to the function
-    ieee80211_radar_detected(). During MLO, drivers would have to pass on
-    which channel context conf radar is detected. Otherwise, drivers could
-    just pass NULL.
-  * ieee80211_radar_detected() will iterate over all channel contexts
-    present and
-  	* if channel context conf is passed, only mark that as radar
-  	  detected
-  	* if NULL is passed, then mark all channel contexts as radar
-  	  detected
-  	* Then as usual, schedule the radar detected work.
-  * In the worker, go over all the contexts again and for all such context
-    which is marked with radar detected, cancel the ongoing CAC by calling
-    ieee80211_dfs_cac_cancel() and then notify cfg80211 via
-    cfg80211_radar_event().
-  * To cancel the CAC, pass the channel context as well where radar is
-    detected to ieee80211_dfs_cac_cancel(). This ensures that CAC is
-    canceled only on the links using the provided context, leaving other
-    links unaffected.
-
-This would also help in scenarios where there is split phy 5 GHz radio,
-which is capable of DFS channels in both lower and upper band. In this
-case, simultaneous radars can be detected.
-
-Signed-off-by: Aditya Kumar Singh <quic_adisi at quicinc.com>
-Link: https://patch.msgid.link/20240906064426.2101315-9-quic_adisi at quicinc.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/drivers/net/wireless/ath/ath10k/debug.c
-+++ b/drivers/net/wireless/ath/ath10k/debug.c
-@@ -3,7 +3,7 @@
-  * Copyright (c) 2005-2011 Atheros Communications Inc.
-  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
-  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
-- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
-+ * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
-  */
- 
- #include <linux/module.h>
-@@ -1774,7 +1774,7 @@ static ssize_t ath10k_write_simulate_rad
- 	if (!arvif->is_started)
- 		return -EINVAL;
- 
--	ieee80211_radar_detected(ar->hw);
-+	ieee80211_radar_detected(ar->hw, NULL);
- 
- 	return count;
- }
---- a/drivers/net/wireless/ath/ath10k/mac.c
-+++ b/drivers/net/wireless/ath/ath10k/mac.c
-@@ -1437,7 +1437,7 @@ static void ath10k_recalc_radar_detectio
- 		 * by indicating that radar was detected.
- 		 */
- 		ath10k_warn(ar, "failed to start CAC: %d\n", ret);
--		ieee80211_radar_detected(ar->hw);
-+		ieee80211_radar_detected(ar->hw, NULL);
- 	}
- }
- 
---- a/drivers/net/wireless/ath/ath10k/wmi.c
-+++ b/drivers/net/wireless/ath/ath10k/wmi.c
-@@ -3990,7 +3990,7 @@ static void ath10k_radar_detected(struct
- 	if (ar->dfs_block_radar_events)
- 		ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
- 	else
--		ieee80211_radar_detected(ar->hw);
-+		ieee80211_radar_detected(ar->hw, NULL);
- }
- 
- static void ath10k_radar_confirmation_work(struct work_struct *work)
---- a/drivers/net/wireless/ath/ath11k/wmi.c
-+++ b/drivers/net/wireless/ath/ath11k/wmi.c
-@@ -8358,7 +8358,7 @@ ath11k_wmi_pdev_dfs_radar_detected_event
- 	if (ar->dfs_block_radar_events)
- 		ath11k_info(ab, "DFS Radar detected, but ignored as requested\n");
- 	else
--		ieee80211_radar_detected(ar->hw);
-+		ieee80211_radar_detected(ar->hw, NULL);
- 
- exit:
- 	rcu_read_unlock();
---- a/drivers/net/wireless/ath/ath12k/wmi.c
-+++ b/drivers/net/wireless/ath/ath12k/wmi.c
-@@ -6789,7 +6789,7 @@ ath12k_wmi_pdev_dfs_radar_detected_event
- 	if (ar->dfs_block_radar_events)
- 		ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
- 	else
--		ieee80211_radar_detected(ath12k_ar_to_hw(ar));
-+		ieee80211_radar_detected(ath12k_ar_to_hw(ar), NULL);
- 
- exit:
- 	rcu_read_unlock();
---- a/drivers/net/wireless/ath/ath9k/dfs.c
-+++ b/drivers/net/wireless/ath/ath9k/dfs.c
-@@ -280,7 +280,7 @@ ath9k_dfs_process_radar_pulse(struct ath
- 	if (!pd->add_pulse(pd, pe, NULL))
- 		return;
- 	DFS_STAT_INC(sc, radar_detected);
--	ieee80211_radar_detected(sc->hw);
-+	ieee80211_radar_detected(sc->hw, NULL);
- }
- 
- /*
---- a/drivers/net/wireless/ath/ath9k/dfs_debug.c
-+++ b/drivers/net/wireless/ath/ath9k/dfs_debug.c
-@@ -116,7 +116,7 @@ static ssize_t write_file_simulate_radar
- {
- 	struct ath_softc *sc = file->private_data;
- 
--	ieee80211_radar_detected(sc->hw);
-+	ieee80211_radar_detected(sc->hw, NULL);
- 
- 	return count;
- }
---- a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c
-@@ -394,7 +394,7 @@ mt7615_mcu_rx_radar_detected(struct mt76
- 	if (mt76_phy_dfs_state(mphy) < MT_DFS_STATE_CAC)
- 		return;
- 
--	ieee80211_radar_detected(mphy->hw);
-+	ieee80211_radar_detected(mphy->hw, NULL);
- 	dev->hw_pattern++;
- }
- 
---- a/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c
-@@ -630,7 +630,7 @@ static void mt76x02_dfs_tasklet(struct t
- 		radar_detected = mt76x02_dfs_check_detection(dev);
- 		if (radar_detected) {
- 			/* sw detector rx radar pattern */
--			ieee80211_radar_detected(dev->mt76.hw);
-+			ieee80211_radar_detected(dev->mt76.hw, NULL);
- 			mt76x02_dfs_detector_reset(dev);
- 
- 			return;
-@@ -658,7 +658,7 @@ static void mt76x02_dfs_tasklet(struct t
- 
- 		/* hw detector rx radar pattern */
- 		dfs_pd->stats[i].hw_pattern++;
--		ieee80211_radar_detected(dev->mt76.hw);
-+		ieee80211_radar_detected(dev->mt76.hw, NULL);
- 		mt76x02_dfs_detector_reset(dev);
- 
- 		return;
---- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c
-@@ -293,7 +293,7 @@ mt7915_mcu_rx_radar_detected(struct mt79
- 						&dev->rdd2_chandef,
- 						GFP_ATOMIC);
- 	else
--		ieee80211_radar_detected(mphy->hw);
-+		ieee80211_radar_detected(mphy->hw, NULL);
- 	dev->hw_pattern++;
- }
- 
---- a/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
-+++ b/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
-@@ -371,7 +371,7 @@ mt7996_mcu_rx_radar_detected(struct mt79
- 						&dev->rdd2_chandef,
- 						GFP_ATOMIC);
- 	else
--		ieee80211_radar_detected(mphy->hw);
-+		ieee80211_radar_detected(mphy->hw, NULL);
- 	dev->hw_pattern++;
- }
- 
---- a/drivers/net/wireless/ti/wl18xx/event.c
-+++ b/drivers/net/wireless/ti/wl18xx/event.c
-@@ -142,7 +142,7 @@ int wl18xx_process_mailbox_events(struct
- 			    wl18xx_radar_type_decode(mbox->radar_type));
- 
- 		if (!wl->radar_debug_mode)
--			ieee80211_radar_detected(wl->hw);
-+			ieee80211_radar_detected(wl->hw, NULL);
- 	}
- 
- 	if (vector & PERIODIC_SCAN_REPORT_EVENT_ID) {
---- a/drivers/net/wireless/virtual/mac80211_hwsim.c
-+++ b/drivers/net/wireless/virtual/mac80211_hwsim.c
-@@ -1146,7 +1146,7 @@ static int hwsim_write_simulate_radar(vo
- {
- 	struct mac80211_hwsim_data *data = dat;
- 
--	ieee80211_radar_detected(data->hw);
-+	ieee80211_radar_detected(data->hw, NULL);
- 
- 	return 0;
- }
---- a/include/net/mac80211.h
-+++ b/include/net/mac80211.h
-@@ -6717,8 +6717,11 @@ void ieee80211_cqm_beacon_loss_notify(st
-  * ieee80211_radar_detected - inform that a radar was detected
-  *
-  * @hw: pointer as obtained from ieee80211_alloc_hw()
-+ * @chanctx_conf: Channel context on which radar is detected. Mandatory to
-+ *	pass a valid pointer during MLO. For non-MLO %NULL can be passed
-  */
--void ieee80211_radar_detected(struct ieee80211_hw *hw);
-+void ieee80211_radar_detected(struct ieee80211_hw *hw,
-+			      struct ieee80211_chanctx_conf *chanctx_conf);
- 
- /**
-  * ieee80211_chswitch_done - Complete channel switch process
---- a/net/mac80211/chan.c
-+++ b/net/mac80211/chan.c
-@@ -681,6 +681,7 @@ ieee80211_alloc_chanctx(struct ieee80211
- 	ctx->mode = mode;
- 	ctx->conf.radar_enabled = false;
- 	ctx->conf.radio_idx = radio_idx;
-+	ctx->radar_detected = false;
- 	_ieee80211_recalc_chanctx_min_def(local, ctx, NULL, false);
- 
- 	return ctx;
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -895,6 +895,8 @@ struct ieee80211_chanctx {
- 	struct ieee80211_chan_req req;
- 
- 	struct ieee80211_chanctx_conf conf;
-+
-+	bool radar_detected;
- };
- 
- struct mac80211_qos_map {
-@@ -2632,7 +2634,8 @@ void ieee80211_recalc_chanctx_min_def(st
- bool ieee80211_is_radar_required(struct ieee80211_local *local);
- 
- void ieee80211_dfs_cac_timer_work(struct wiphy *wiphy, struct wiphy_work *work);
--void ieee80211_dfs_cac_cancel(struct ieee80211_local *local);
-+void ieee80211_dfs_cac_cancel(struct ieee80211_local *local,
-+			      struct ieee80211_chanctx *chanctx);
- void ieee80211_dfs_radar_detected_work(struct wiphy *wiphy,
- 				       struct wiphy_work *work);
- int ieee80211_send_action_csa(struct ieee80211_sub_if_data *sdata,
---- a/net/mac80211/pm.c
-+++ b/net/mac80211/pm.c
-@@ -32,7 +32,7 @@ int __ieee80211_suspend(struct ieee80211
- 
- 	ieee80211_scan_cancel(local);
- 
--	ieee80211_dfs_cac_cancel(local);
-+	ieee80211_dfs_cac_cancel(local, NULL);
- 
- 	ieee80211_roc_purge(local, NULL);
- 
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -3451,11 +3451,16 @@ u64 ieee80211_calculate_rx_timestamp(str
- 	return ts;
- }
- 
--void ieee80211_dfs_cac_cancel(struct ieee80211_local *local)
-+/* Cancel CAC for the interfaces under the specified @local. If @ctx is
-+ * also provided, only the interfaces using that ctx will be canceled.
-+ */
-+void ieee80211_dfs_cac_cancel(struct ieee80211_local *local,
-+			      struct ieee80211_chanctx *ctx)
- {
- 	struct ieee80211_sub_if_data *sdata;
- 	struct cfg80211_chan_def chandef;
- 	struct ieee80211_link_data *link;
-+	struct ieee80211_chanctx_conf *chanctx_conf;
- 	unsigned int link_id;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
-@@ -3468,6 +3473,11 @@ void ieee80211_dfs_cac_cancel(struct iee
- 			if (!link)
- 				continue;
- 
-+			chanctx_conf = sdata_dereference(link->conf->chanctx_conf,
-+							 sdata);
-+			if (ctx && &ctx->conf != chanctx_conf)
-+				continue;
-+
- 			wiphy_delayed_work_cancel(local->hw.wiphy,
- 						  &link->dfs_cac_timer_work);
- 
-@@ -3488,9 +3498,8 @@ void ieee80211_dfs_radar_detected_work(s
- {
- 	struct ieee80211_local *local =
- 		container_of(work, struct ieee80211_local, radar_detected_work);
--	struct cfg80211_chan_def chandef = local->hw.conf.chandef;
-+	struct cfg80211_chan_def chandef;
- 	struct ieee80211_chanctx *ctx;
--	int num_chanctx = 0;
- 
- 	lockdep_assert_wiphy(local->hw.wiphy);
- 
-@@ -3498,25 +3507,46 @@ void ieee80211_dfs_radar_detected_work(s
- 		if (ctx->replace_state == IEEE80211_CHANCTX_REPLACES_OTHER)
- 			continue;
- 
--		num_chanctx++;
-+		if (!ctx->radar_detected)
-+			continue;
-+
-+		ctx->radar_detected = false;
-+
- 		chandef = ctx->conf.def;
-+
-+		ieee80211_dfs_cac_cancel(local, ctx);
-+		cfg80211_radar_event(local->hw.wiphy, &chandef, GFP_KERNEL);
- 	}
-+}
- 
--	ieee80211_dfs_cac_cancel(local);
-+static void
-+ieee80211_radar_mark_chan_ctx_iterator(struct ieee80211_hw *hw,
-+				       struct ieee80211_chanctx_conf *chanctx_conf,
-+				       void *data)
-+{
-+	struct ieee80211_chanctx *ctx =
-+		container_of(chanctx_conf, struct ieee80211_chanctx,
-+			     conf);
- 
--	if (num_chanctx > 1)
--		/* XXX: multi-channel is not supported yet */
--		WARN_ON(1);
--	else
--		cfg80211_radar_event(local->hw.wiphy, &chandef, GFP_KERNEL);
-+	if (ctx->replace_state == IEEE80211_CHANCTX_REPLACES_OTHER)
-+		return;
-+
-+	if (data && data != chanctx_conf)
-+		return;
-+
-+	ctx->radar_detected = true;
- }
- 
--void ieee80211_radar_detected(struct ieee80211_hw *hw)
-+void ieee80211_radar_detected(struct ieee80211_hw *hw,
-+			      struct ieee80211_chanctx_conf *chanctx_conf)
- {
- 	struct ieee80211_local *local = hw_to_local(hw);
- 
- 	trace_api_radar_detected(local);
- 
-+	ieee80211_iter_chan_contexts_atomic(hw, ieee80211_radar_mark_chan_ctx_iterator,
-+					    chanctx_conf);
-+
- 	wiphy_work_queue(hw->wiphy, &local->radar_detected_work);
- }
- EXPORT_SYMBOL(ieee80211_radar_detected);
diff --git a/package/kernel/mac80211/patches/subsys/361-wifi-mac80211-fix-vif-addr-when-switching-from-monit.patch b/package/kernel/mac80211/patches/subsys/341-wifi-mac80211-fix-vif-addr-when-switching-from-monit.patch
similarity index 100%
rename from package/kernel/mac80211/patches/subsys/361-wifi-mac80211-fix-vif-addr-when-switching-from-monit.patch
rename to package/kernel/mac80211/patches/subsys/341-wifi-mac80211-fix-vif-addr-when-switching-from-monit.patch
diff --git a/package/kernel/mac80211/patches/subsys/341-wifi-mac80211-skip-non-uploaded-keys-in-ieee80211_it.patch b/package/kernel/mac80211/patches/subsys/341-wifi-mac80211-skip-non-uploaded-keys-in-ieee80211_it.patch
deleted file mode 100644
index b426d68c32..0000000000
--- a/package/kernel/mac80211/patches/subsys/341-wifi-mac80211-skip-non-uploaded-keys-in-ieee80211_it.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From: Felix Fietkau <nbd at nbd.name>
-Date: Sun, 6 Oct 2024 17:34:08 +0200
-Subject: [PATCH] wifi: mac80211: skip non-uploaded keys in ieee80211_iter_keys
-
-Sync iterator conditions with ieee80211_iter_keys_rcu.
-
-Fixes: 830af02f24fb ("mac80211: allow driver to iterate keys")
-Signed-off-by: Felix Fietkau <nbd at nbd.name>
----
-
---- a/net/mac80211/key.c
-+++ b/net/mac80211/key.c
-@@ -987,6 +987,26 @@ void ieee80211_reenable_keys(struct ieee
- 	}
- }
- 
-+static void
-+ieee80211_key_iter(struct ieee80211_hw *hw,
-+		   struct ieee80211_vif *vif,
-+		   struct ieee80211_key *key,
-+		   void (*iter)(struct ieee80211_hw *hw,
-+				struct ieee80211_vif *vif,
-+				struct ieee80211_sta *sta,
-+				struct ieee80211_key_conf *key,
-+				void *data),
-+		   void *iter_data)
-+{
-+	/* skip keys of station in removal process */
-+	if (key->sta && key->sta->removed)
-+		return;
-+	if (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE))
-+		return;
-+	iter(hw, vif, key->sta ? &key->sta->sta : NULL,
-+	     &key->conf, iter_data);
-+}
-+
- void ieee80211_iter_keys(struct ieee80211_hw *hw,
- 			 struct ieee80211_vif *vif,
- 			 void (*iter)(struct ieee80211_hw *hw,
-@@ -1005,16 +1025,13 @@ void ieee80211_iter_keys(struct ieee8021
- 	if (vif) {
- 		sdata = vif_to_sdata(vif);
- 		list_for_each_entry_safe(key, tmp, &sdata->key_list, list)
--			iter(hw, &sdata->vif,
--			     key->sta ? &key->sta->sta : NULL,
--			     &key->conf, iter_data);
-+			ieee80211_key_iter(hw, vif, key, iter, iter_data);
- 	} else {
- 		list_for_each_entry(sdata, &local->interfaces, list)
- 			list_for_each_entry_safe(key, tmp,
- 						 &sdata->key_list, list)
--				iter(hw, &sdata->vif,
--				     key->sta ? &key->sta->sta : NULL,
--				     &key->conf, iter_data);
-+				ieee80211_key_iter(hw, &sdata->vif, key,
-+						   iter, iter_data);
- 	}
- }
- EXPORT_SYMBOL(ieee80211_iter_keys);
-@@ -1031,17 +1048,8 @@ _ieee80211_iter_keys_rcu(struct ieee8021
- {
- 	struct ieee80211_key *key;
- 
--	list_for_each_entry_rcu(key, &sdata->key_list, list) {
--		/* skip keys of station in removal process */
--		if (key->sta && key->sta->removed)
--			continue;
--		if (!(key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE))
--			continue;
--
--		iter(hw, &sdata->vif,
--		     key->sta ? &key->sta->sta : NULL,
--		     &key->conf, iter_data);
--	}
-+	list_for_each_entry_rcu(key, &sdata->key_list, list)
-+		ieee80211_key_iter(hw, &sdata->vif, key, iter, iter_data);
- }
- 
- void ieee80211_iter_keys_rcu(struct ieee80211_hw *hw,
diff --git a/package/kernel/mac80211/patches/subsys/362-wifi-mac80211-fix-incorrect-timing-to-initialize-sta.patch b/package/kernel/mac80211/patches/subsys/362-wifi-mac80211-fix-incorrect-timing-to-initialize-sta.patch
deleted file mode 100644
index 94e51afd85..0000000000
--- a/package/kernel/mac80211/patches/subsys/362-wifi-mac80211-fix-incorrect-timing-to-initialize-sta.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From: Benjamin Lin <benjamin-jw.lin at mediatek.com>
-Date: Mon, 18 Nov 2024 16:07:22 +0800
-Subject: [PATCH] wifi: mac80211: fix incorrect timing to initialize
- station NSS capability
-
-Station's spatial streaming capability should be initialized before
-handling VHT OMN, because the handling requires the capability information.
-
-Fixes: a8bca3e9371d ("wifi: mac80211: track capability/opmode NSS separately")
-Signed-off-by: Benjamin Lin <benjamin-jw.lin at mediatek.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -1914,6 +1914,8 @@ static int sta_link_apply_parameters(str
- 						    params->eht_capa_len,
- 						    link_sta);
- 
-+	ieee80211_sta_init_nss(link_sta);
-+
- 	if (params->opmode_notif_used) {
- 		/* returned value is only needed for rc update, but the
- 		 * rc isn't initialized here yet, so ignore it
-@@ -1923,8 +1925,6 @@ static int sta_link_apply_parameters(str
- 					      sband->band);
- 	}
- 
--	ieee80211_sta_init_nss(link_sta);
--
- 	return 0;
- }
- 
diff --git a/package/kernel/mac80211/patches/subsys/363-wifi-mac80211-ieee80211_i-Fix-memory-corruption-bug-.patch b/package/kernel/mac80211/patches/subsys/363-wifi-mac80211-ieee80211_i-Fix-memory-corruption-bug-.patch
deleted file mode 100644
index dcdb89cd4a..0000000000
--- a/package/kernel/mac80211/patches/subsys/363-wifi-mac80211-ieee80211_i-Fix-memory-corruption-bug-.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From: "Gustavo A. R. Silva" <gustavoars at kernel.org>
-Date: Fri, 25 Oct 2024 16:05:50 -0600
-Subject: [PATCH] wifi: mac80211: ieee80211_i: Fix memory corruption bug in
- struct ieee80211_chanctx
-
-Move the `struct ieee80211_chanctx_conf conf` to the end of
-`struct ieee80211_chanctx` and fix a memory corruption bug
-triggered e.g. in `hwsim_set_chanctx_magic()`: `radar_detected`
-is being overwritten when `cp->magic = HWSIM_CHANCTX_MAGIC;`
-See the function call sequence below:
-
-drv_add_chanctx(... struct ieee80211_chanctx *ctx) ->
-    local->ops->add_chanctx(&local->hw, &ctx->conf) ->
-	mac80211_hwsim_add_chanctx(... struct ieee80211_chanctx_conf *ctx) ->
-	    hwsim_set_chanctx_magic(ctx)
-
-This also happens in a number of other drivers.
-
-Also, add a code comment to try to prevent people from introducing
-new members after `struct ieee80211_chanctx_conf conf`. Notice that
-`struct ieee80211_chanctx_conf` is a flexible structure --a structure
-that contains a flexible-array member, so it should always be at
-the end of any other containing structures.
-
-This change also fixes 50 of the following warnings:
-
-net/mac80211/ieee80211_i.h:895:39: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end]
-
--Wflex-array-member-not-at-end was introduced in GCC-14, and we are
-getting ready to enable it, globally.
-
-Fixes: bca8bc0399ac ("wifi: mac80211: handle ieee80211_radar_detected() for MLO")
-Signed-off-by: Gustavo A. R. Silva <gustavoars at kernel.org>
-Link: https://patch.msgid.link/ZxwWPrncTeSi1UTq at kspp
-[also refer to other drivers in commit message]
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -894,9 +894,10 @@ struct ieee80211_chanctx {
- 	/* temporary data for search algorithm etc. */
- 	struct ieee80211_chan_req req;
- 
--	struct ieee80211_chanctx_conf conf;
--
- 	bool radar_detected;
-+
-+	/* MUST be last - ends in a flexible-array member. */
-+	struct ieee80211_chanctx_conf conf;
- };
- 
- struct mac80211_qos_map {
diff --git a/package/kernel/mac80211/patches/subsys/364-mac80211-fix-user-power-when-emulating-chanctx.patch b/package/kernel/mac80211/patches/subsys/364-mac80211-fix-user-power-when-emulating-chanctx.patch
deleted file mode 100644
index 15db2c54e4..0000000000
--- a/package/kernel/mac80211/patches/subsys/364-mac80211-fix-user-power-when-emulating-chanctx.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From: Ben Greear <greearb at candelatech.com>
-Date: Thu, 10 Oct 2024 13:39:54 -0700
-Subject: [PATCH] mac80211: fix user-power when emulating chanctx
-
-ieee80211_calc_hw_conf_chan was ignoring the configured
-user_txpower.  If it is set, use it to potentially decrease
-txpower as requested.
-
-Signed-off-by: Ben Greear <greearb at candelatech.com>
-Link: https://patch.msgid.link/20241010203954.1219686-1-greearb at candelatech.com
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/main.c
-+++ b/net/mac80211/main.c
-@@ -167,6 +167,8 @@ static u32 ieee80211_calc_hw_conf_chan(s
- 	}
- 
- 	power = ieee80211_chandef_max_power(&chandef);
-+	if (local->user_power_level != IEEE80211_UNSET_POWER_LEVEL)
-+		power = min(local->user_power_level, power);
- 
- 	rcu_read_lock();
- 	list_for_each_entry_rcu(sdata, &local->interfaces, list) {
diff --git a/package/kernel/mac80211/patches/subsys/365-wifi-cfg80211-Add-wiphy_delayed_work_pending.patch b/package/kernel/mac80211/patches/subsys/365-wifi-cfg80211-Add-wiphy_delayed_work_pending.patch
deleted file mode 100644
index 981cc2433b..0000000000
--- a/package/kernel/mac80211/patches/subsys/365-wifi-cfg80211-Add-wiphy_delayed_work_pending.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From: Remi Pommarel <repk at triplefau.lt>
-Date: Tue, 24 Sep 2024 21:28:04 +0200
-Subject: [PATCH] wifi: cfg80211: Add wiphy_delayed_work_pending()
-
-Add wiphy_delayed_work_pending() to check if any delayed work timer is
-pending, that can be used to be sure that wiphy_delayed_work_queue()
-won't postpone an already pending delayed work.
-
-Signed-off-by: Remi Pommarel <repk at triplefau.lt>
-Link: https://patch.msgid.link/20240924192805.13859-2-repk at triplefau.lt
-[fix return value kernel-doc]
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/include/net/cfg80211.h
-+++ b/include/net/cfg80211.h
-@@ -6141,6 +6141,50 @@ void wiphy_delayed_work_flush(struct wip
- 			      struct wiphy_delayed_work *dwork);
- 
- /**
-+ * wiphy_delayed_work_pending - Find out whether a wiphy delayable
-+ * work item is currently pending.
-+ *
-+ * @wiphy: the wiphy, for debug purposes
-+ * @dwork: the delayed work in question
-+ *
-+ * Return: true if timer is pending, false otherwise
-+ *
-+ * How wiphy_delayed_work_queue() works is by setting a timer which
-+ * when it expires calls wiphy_work_queue() to queue the wiphy work.
-+ * Because wiphy_delayed_work_queue() uses mod_timer(), if it is
-+ * called twice and the second call happens before the first call
-+ * deadline, the work will rescheduled for the second deadline and
-+ * won't run before that.
-+ *
-+ * wiphy_delayed_work_pending() can be used to detect if calling
-+ * wiphy_work_delayed_work_queue() would start a new work schedule
-+ * or delayed a previous one. As seen below it cannot be used to
-+ * detect precisely if the work has finished to execute nor if it
-+ * is currently executing.
-+ *
-+ *      CPU0                                CPU1
-+ * wiphy_delayed_work_queue(wk)
-+ *  mod_timer(wk->timer)
-+ *                                     wiphy_delayed_work_pending(wk) -> true
-+ *
-+ * [...]
-+ * expire_timers(wk->timer)
-+ *  detach_timer(wk->timer)
-+ *                                     wiphy_delayed_work_pending(wk) -> false
-+ *  wk->timer->function()                          |
-+ *   wiphy_work_queue(wk)                          | delayed work pending
-+ *    list_add_tail()                              | returns false but
-+ *    queue_work(cfg80211_wiphy_work)              | wk->func() has not
-+ *                                                 | been run yet
-+ * [...]                                           |
-+ *  cfg80211_wiphy_work()                          |
-+ *   wk->func()                                    V
-+ *
-+ */
-+bool wiphy_delayed_work_pending(struct wiphy *wiphy,
-+				struct wiphy_delayed_work *dwork);
-+
-+/**
-  * enum ieee80211_ap_reg_power - regulatory power for an Access Point
-  *
-  * @IEEE80211_REG_UNSET_AP: Access Point has no regulatory power mode
---- a/net/wireless/core.c
-+++ b/net/wireless/core.c
-@@ -1735,6 +1735,13 @@ void wiphy_delayed_work_flush(struct wip
- }
- EXPORT_SYMBOL_GPL(wiphy_delayed_work_flush);
- 
-+bool wiphy_delayed_work_pending(struct wiphy *wiphy,
-+				struct wiphy_delayed_work *dwork)
-+{
-+	return timer_pending(&dwork->timer);
-+}
-+EXPORT_SYMBOL_GPL(wiphy_delayed_work_pending);
-+
- static int __init cfg80211_init(void)
- {
- 	int err;
diff --git a/package/kernel/mac80211/patches/subsys/366-wifi-mac80211-Convert-color-collision-detection-to-w.patch b/package/kernel/mac80211/patches/subsys/366-wifi-mac80211-Convert-color-collision-detection-to-w.patch
deleted file mode 100644
index ae72441c46..0000000000
--- a/package/kernel/mac80211/patches/subsys/366-wifi-mac80211-Convert-color-collision-detection-to-w.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From: Remi Pommarel <repk at triplefau.lt>
-Date: Tue, 24 Sep 2024 21:28:05 +0200
-Subject: [PATCH] wifi: mac80211: Convert color collision detection to wiphy
- work
-
-Call to ieee80211_color_collision_detection_work() needs wiphy lock to
-be held (see lockdep assert in cfg80211_bss_color_notify()). Not locking
-wiphy causes the following lockdep error:
-
-  WARNING: CPU: 2 PID: 42 at net/wireless/nl80211.c:19505 cfg80211_bss_color_notify+0x1a4/0x25c
-  Modules linked in:
-  CPU: 2 PID: 42 Comm: kworker/u8:3 Tainted: G        W          6.4.0-02327-g36c6cb260481 #1048
-  Hardware name:
-  Workqueue: phy1 ieee80211_color_collision_detection_work
-  pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
-  pc : cfg80211_bss_color_notify+0x1a4/0x25c
-  lr : cfg80211_bss_color_notify+0x1a0/0x25c
-  sp : ffff000002947d00
-  x29: ffff000002947d00 x28: ffff800008e1a000 x27: ffff000002bd4705
-  x26: ffff00000d034000 x25: ffff80000903cf40 x24: 0000000000000000
-  x23: ffff00000cb70720 x22: 0000000000800000 x21: ffff800008dfb008
-  x20: 000000000000008d x19: ffff00000d035fa8 x18: 0000000000000010
-  x17: 0000000000000001 x16: 000003564b1ce96a x15: 000d69696d057970
-  x14: 000000000000003b x13: 0000000000000001 x12: 0000000000040000
-  x11: 0000000000000001 x10: ffff80000978f9c0 x9 : ffff0000028d3174
-  x8 : ffff800008e30000 x7 : 0000000000000000 x6 : 0000000000000028
-  x5 : 000000000002f498 x4 : ffff00000d034a80 x3 : 0000000000800000
-  x2 : ffff800016143000 x1 : 0000000000000000 x0 : 0000000000000000
-  Call trace:
-   cfg80211_bss_color_notify+0x1a4/0x25c
-   ieee80211_color_collision_detection_work+0x20/0x118
-   process_one_work+0x294/0x554
-   worker_thread+0x70/0x440
-   kthread+0xf4/0xf8
-   ret_from_fork+0x10/0x20
-  irq event stamp: 77372
-  hardirqs last  enabled at (77371): [<ffff800008a346fc>] _raw_spin_unlock_irq+0x2c/0x4c
-  hardirqs last disabled at (77372): [<ffff800008a28754>] el1_dbg+0x20/0x48
-  softirqs last  enabled at (77350): [<ffff8000089e120c>] batadv_send_outstanding_bcast_packet+0xb8/0x120
-  softirqs last disabled at (77348): [<ffff8000089e11d4>] batadv_send_outstanding_bcast_packet+0x80/0x120
-
-The wiphy lock cannot be taken directly from color collision detection
-delayed work (ieee80211_color_collision_detection_work()) because this
-work is cancel_delayed_work_sync() under this wiphy lock causing a
-potential deadlock( see [0] for details).
-
-To fix that ieee80211_color_collision_detection_work() could be
-converted to a wiphy work and cancel_delayed_work_sync() can be simply
-replaced by wiphy_delayed_work_cancel() serving the same purpose under
-wiphy lock.
-
-This could potentially fix [1].
-
-[0]: https://lore.kernel.org/linux-wireless/D4A40Q44OAY2.W3SIF6UEPBUN at freebox.fr/
-[1]: https://lore.kernel.org/lkml/000000000000612f290618eee3e5 at google.com/
-
-Reported-by: Nicolas Escande <nescande at freebox.fr>
-Signed-off-by: Remi Pommarel <repk at triplefau.lt>
-Link: https://patch.msgid.link/20240924192805.13859-3-repk at triplefau.lt
-Signed-off-by: Johannes Berg <johannes.berg at intel.com>
----
-
---- a/net/mac80211/cfg.c
-+++ b/net/mac80211/cfg.c
-@@ -4836,12 +4836,12 @@ void ieee80211_color_change_finalize_wor
- 	ieee80211_color_change_finalize(link);
- }
- 
--void ieee80211_color_collision_detection_work(struct work_struct *work)
-+void ieee80211_color_collision_detection_work(struct wiphy *wiphy,
-+					      struct wiphy_work *work)
- {
--	struct delayed_work *delayed_work = to_delayed_work(work);
- 	struct ieee80211_link_data *link =
--		container_of(delayed_work, struct ieee80211_link_data,
--			     color_collision_detect_work);
-+		container_of(work, struct ieee80211_link_data,
-+			     color_collision_detect_work.work);
- 	struct ieee80211_sub_if_data *sdata = link->sdata;
- 
- 	cfg80211_obss_color_collision_notify(sdata->dev, link->color_bitmap,
-@@ -4894,7 +4894,8 @@ ieee80211_obss_color_collision_notify(st
- 		return;
- 	}
- 
--	if (delayed_work_pending(&link->color_collision_detect_work)) {
-+	if (wiphy_delayed_work_pending(sdata->local->hw.wiphy,
-+				       &link->color_collision_detect_work)) {
- 		rcu_read_unlock();
- 		return;
- 	}
-@@ -4903,9 +4904,9 @@ ieee80211_obss_color_collision_notify(st
- 	/* queue the color collision detection event every 500 ms in order to
- 	 * avoid sending too much netlink messages to userspace.
- 	 */
--	ieee80211_queue_delayed_work(&sdata->local->hw,
--				     &link->color_collision_detect_work,
--				     msecs_to_jiffies(500));
-+	wiphy_delayed_work_queue(sdata->local->hw.wiphy,
-+				 &link->color_collision_detect_work,
-+				 msecs_to_jiffies(500));
- 
- 	rcu_read_unlock();
- }
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -1056,7 +1056,7 @@ struct ieee80211_link_data {
- 	} csa;
- 
- 	struct wiphy_work color_change_finalize_work;
--	struct delayed_work color_collision_detect_work;
-+	struct wiphy_delayed_work color_collision_detect_work;
- 	u64 color_bitmap;
- 
- 	/* context reservation -- protected with wiphy mutex */
-@@ -2010,7 +2010,8 @@ int ieee80211_channel_switch(struct wiph
- /* color change handling */
- void ieee80211_color_change_finalize_work(struct wiphy *wiphy,
- 					  struct wiphy_work *work);
--void ieee80211_color_collision_detection_work(struct work_struct *work);
-+void ieee80211_color_collision_detection_work(struct wiphy *wiphy,
-+					      struct wiphy_work *work);
- 
- /* interface handling */
- #define MAC80211_SUPPORTED_FEATURES_TX	(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \
---- a/net/mac80211/link.c
-+++ b/net/mac80211/link.c
-@@ -41,8 +41,8 @@ void ieee80211_link_init(struct ieee8021
- 			ieee80211_csa_finalize_work);
- 	wiphy_work_init(&link->color_change_finalize_work,
- 			ieee80211_color_change_finalize_work);
--	INIT_DELAYED_WORK(&link->color_collision_detect_work,
--			  ieee80211_color_collision_detection_work);
-+	wiphy_delayed_work_init(&link->color_collision_detect_work,
-+				ieee80211_color_collision_detection_work);
- 	INIT_LIST_HEAD(&link->assigned_chanctx_list);
- 	INIT_LIST_HEAD(&link->reserved_chanctx_list);
- 	wiphy_delayed_work_init(&link->dfs_cac_timer_work,
-@@ -72,7 +72,8 @@ void ieee80211_link_stop(struct ieee8021
- 	if (link->sdata->vif.type == NL80211_IFTYPE_STATION)
- 		ieee80211_mgd_stop_link(link);
- 
--	cancel_delayed_work_sync(&link->color_collision_detect_work);
-+	wiphy_delayed_work_cancel(link->sdata->local->hw.wiphy,
-+				  &link->color_collision_detect_work);
- 	wiphy_work_cancel(link->sdata->local->hw.wiphy,
- 			  &link->color_change_finalize_work);
- 	wiphy_work_cancel(link->sdata->local->hw.wiphy,



From lede-commits at lists.infradead.org  Fri Jan  3 03:07:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 06:07:25 -0500
Subject: [openwrt/openwrt]  ubus: update to Git HEAD (2025-01-02)
In-Reply-To: <173590244545.731335.9039359704647061416@git-01.infra.openwrt.org>
References: <173590244545.731335.9039359704647061416@git-01.infra.openwrt.org>
Message-ID: <mailman.30549.1735902453.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/efebdf077cb21b76124f492d048b84c4e63c1e2c

commit efebdf077cb21b76124f492d048b84c4e63c1e2c
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 2 14:08:36 2025 +0100

    ubus: update to Git HEAD (2025-01-02)
    
    d996988ae55b libubus: close file descriptor after sending it from a request
    afa57cce0aff libubus: add support for using channels
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit f0df6e3a4a4996eca917fa17591b8f1d483dfa30)
---
 package/system/ubus/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile
index bef5e622d7..9a807852a2 100644
--- a/package/system/ubus/Makefile
+++ b/package/system/ubus/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git
-PKG_SOURCE_DATE:=2024-10-20
-PKG_SOURCE_VERSION:=252a9b0c1774790fb9c25735d5a09c27dba895db
-PKG_MIRROR_HASH:=72c21f02710d2314447670f1f1ea1833d2961f65fea3f9f94c060dda7c9d5914
+PKG_SOURCE_DATE:=2025-01-02
+PKG_SOURCE_VERSION:=afa57cce0aff82f4a7a0e509d4387ebc23dd3be7
+PKG_MIRROR_HASH:=a0b3c1961f5f49d31c34a44576ce44538c3ee97bfce97f86f732d7ecc1df9798
 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
 CMAKE_INSTALL:=1
 



From lede-commits at lists.infradead.org  Fri Jan  3 06:48:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 09:48:38 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix label MAC address for FritzBox
 7520/7530
In-Reply-To: <173591571876.1053647.3982710605815071471@git-01.infra.openwrt.org>
References: <173591571876.1053647.3982710605815071471@git-01.infra.openwrt.org>
Message-ID: <mailman.30631.1735915783.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b2b6955f80d05a8cec69f8497df8bed44cf3c64d

commit b2b6955f80d05a8cec69f8497df8bed44cf3c64d
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Fri Jan 3 13:28:42 2025 +0100

    ipq40xx: fix label MAC address for FritzBox 7520/7530
    
    The MAC address of the GMAC is contained inside the CWMP-Account number on the label.
    
    Similar fix as to the 4040 in b22d382ae4eaa1af42930115d91855f402314cac
    Link #13240
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17467
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts      | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 2344ae7bf8..4f6cafb885 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -19,6 +19,7 @@
 		led-failsafe = &info_red;
 		led-running = &power_green;
 		led-upgrade = &info_red;
+		label-mac-device = &gmac;
 	};
 
 	soc {



From lede-commits at lists.infradead.org  Fri Jan  3 06:49:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 09:49:13 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix label MAC address for FritzBox
 7520/7530
In-Reply-To: <173591575376.1054251.10800348158312210832@git-01.infra.openwrt.org>
References: <173591575376.1054251.10800348158312210832@git-01.infra.openwrt.org>
Message-ID: <mailman.30632.1735915783.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/9b9622271e1da65ae0693868124471386f76999a

commit 9b9622271e1da65ae0693868124471386f76999a
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Fri Jan 3 13:28:42 2025 +0100

    ipq40xx: fix label MAC address for FritzBox 7520/7530
    
    The MAC address of the GMAC is contained inside the CWMP-Account number on the label.
    
    Similar fix as to the 4040 in b22d382ae4eaa1af42930115d91855f402314cac
    Link #13240
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17467
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit b2b6955f80d05a8cec69f8497df8bed44cf3c64d)
---
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts      | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 2344ae7bf8..4f6cafb885 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -19,6 +19,7 @@
 		led-failsafe = &info_red;
 		led-running = &power_green;
 		led-upgrade = &info_red;
+		label-mac-device = &gmac;
 	};
 
 	soc {



From lede-commits at lists.infradead.org  Fri Jan  3 06:59:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 09:59:28 -0500
Subject: [openwrt/openwrt]  rockchip: fix phy reset on rk356x
In-Reply-To: <173591636895.1069662.658398260595623771@git-01.infra.openwrt.org>
References: <173591636895.1069662.658398260595623771@git-01.infra.openwrt.org>
Message-ID: <mailman.30635.1735916372.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8a477bafb4637e3499f69f569133039ce060559e

commit 8a477bafb4637e3499f69f569133039ce060559e
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Fri Jan 3 20:37:41 2025 +0800

    rockchip: fix phy reset on rk356x
    
    The commit 7160820d742a ("phy: rockchip: naneng-combphy: fix phy reset")
    was backported to kernel 6.6 branch by upstream, however the correspond
    dtsi fixes was not, resulting the following error:
    ```
    [    0.225521] rockchip-naneng-combphy fe830000.phy: error -ENOENT: failed to get phy reset
    [    0.227467] rockchip-naneng-combphy fe840000.phy: error -ENOENT: failed to get phy reset
    ```
    
    So backport the dtsi fixes here manually.
    
    Fixes: 89b2356b8c2f ("kernel: bump 6.6 to 6.6.69")
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17468
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...hip-add-reset-names-for-combphy-on-rk3568.patch | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch b/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch
new file mode 100644
index 0000000000..7a8f86a46f
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch
@@ -0,0 +1,44 @@
+From 8b9c12757f919157752646faf3821abf2b7d2a64 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus at jmu.edu.cn>
+Date: Fri, 22 Nov 2024 15:30:05 +0800
+Subject: [PATCH] arm64: dts: rockchip: add reset-names for combphy on rk3568
+
+The reset-names of combphy are missing, add it.
+
+Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
+Fixes: fd3ac6e80497 ("dt-bindings: phy: rockchip: rk3588 has two reset lines")
+Link: https://lore.kernel.org/r/20241122073006.99309-1-amadeus at jmu.edu.cn
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3568.dtsi      | 1 +
+ arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 ++
+ 2 files changed, 3 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+@@ -223,6 +223,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY0>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
+ 		#phy-cells = <1>;
+--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+@@ -1747,6 +1747,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY1>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
+ 		#phy-cells = <1>;
+@@ -1763,6 +1764,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY2>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
+ 		#phy-cells = <1>;



From lede-commits at lists.infradead.org  Fri Jan  3 11:23:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 14:23:15 -0500
Subject: [openwrt/openwrt]  kernel: add workaround for page_pool_release
 warnings
In-Reply-To: <173593219506.1442757.14246636958483786275@git-01.infra.openwrt.org>
References: <173593219506.1442757.14246636958483786275@git-01.infra.openwrt.org>
Message-ID: <mailman.30820.1735932199.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2b70b32aef9e8e1ff275872d551c610368079911

commit 2b70b32aef9e8e1ff275872d551c610368079911
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 3 20:22:13 2025 +0100

    kernel: add workaround for page_pool_release warnings
    
    defer_list skbs held by NAPI can block releasing page pools.
    Work around this by scheduling rx softirq on all CPUs while trying to release
    a page pool.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...ol-try-to-free-deferred-skbs-while-waitin.patch | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
new file mode 100644
index 0000000000..36c28b94f6
--- /dev/null
+++ b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
@@ -0,0 +1,43 @@
+From: Felix Fietkau <nbd at nbd.name>
+Date: Fri, 3 Jan 2025 19:29:00 +0100
+Subject: [PATCH] net: page_pool: try to free deferred skbs while waiting for
+ pool release
+
+The NAPI defer list can accumulate no longer used skbs, which can be reused
+during alloc. If this happens on a CPU that otherwise does not do any
+rx softirq processing, skbs can be held indefinitely, causing warnings
+on releasing page pools.
+Deal with this by scheduling rx softirq on all CPUs.
+
+Patch by Lorenzo Bianconi
+
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -862,12 +862,23 @@ static void page_pool_release_retry(stru
+ {
+ 	struct delayed_work *dwq = to_delayed_work(wq);
+ 	struct page_pool *pool = container_of(dwq, typeof(*pool), release_dw);
+-	int inflight;
++	int cpu, inflight;
+ 
+ 	inflight = page_pool_release(pool);
+ 	if (!inflight)
+ 		return;
+ 
++	/* Run NET_RX_SOFTIRQ in order to free pending skbs in softnet_data
++	 * defer_list that can stay in the list until we have enough queued
++	 * traffic.
++	 */
++	for_each_online_cpu(cpu) {
++		struct softnet_data *sd = &per_cpu(softnet_data, cpu);
++
++		if (!cmpxchg(&sd->defer_ipi_scheduled, 0, 1))
++			smp_call_function_single_async(cpu, &sd->defer_csd);
++	}
++
+ 	/* Periodic warning */
+ 	if (time_after_eq(jiffies, pool->defer_warn)) {
+ 		int sec = (s32)((u32)jiffies - (u32)pool->defer_start) / HZ;



From lede-commits at lists.infradead.org  Fri Jan  3 11:23:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 14:23:52 -0500
Subject: [openwrt/openwrt]  kernel: add workaround for page_pool_release
 warnings
In-Reply-To: <173593223270.1444386.16710193706110704907@git-01.infra.openwrt.org>
References: <173593223270.1444386.16710193706110704907@git-01.infra.openwrt.org>
Message-ID: <mailman.30821.1735932235.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/bbfebf85273cf8e7c99fa9d1e40c7fa6b5602390

commit bbfebf85273cf8e7c99fa9d1e40c7fa6b5602390
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 3 20:22:13 2025 +0100

    kernel: add workaround for page_pool_release warnings
    
    defer_list skbs held by NAPI can block releasing page pools.
    Work around this by scheduling rx softirq on all CPUs while trying to release
    a page pool.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 2b70b32aef9e8e1ff275872d551c610368079911)
---
 ...ol-try-to-free-deferred-skbs-while-waitin.patch | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
new file mode 100644
index 0000000000..36c28b94f6
--- /dev/null
+++ b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
@@ -0,0 +1,43 @@
+From: Felix Fietkau <nbd at nbd.name>
+Date: Fri, 3 Jan 2025 19:29:00 +0100
+Subject: [PATCH] net: page_pool: try to free deferred skbs while waiting for
+ pool release
+
+The NAPI defer list can accumulate no longer used skbs, which can be reused
+during alloc. If this happens on a CPU that otherwise does not do any
+rx softirq processing, skbs can be held indefinitely, causing warnings
+on releasing page pools.
+Deal with this by scheduling rx softirq on all CPUs.
+
+Patch by Lorenzo Bianconi
+
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -862,12 +862,23 @@ static void page_pool_release_retry(stru
+ {
+ 	struct delayed_work *dwq = to_delayed_work(wq);
+ 	struct page_pool *pool = container_of(dwq, typeof(*pool), release_dw);
+-	int inflight;
++	int cpu, inflight;
+ 
+ 	inflight = page_pool_release(pool);
+ 	if (!inflight)
+ 		return;
+ 
++	/* Run NET_RX_SOFTIRQ in order to free pending skbs in softnet_data
++	 * defer_list that can stay in the list until we have enough queued
++	 * traffic.
++	 */
++	for_each_online_cpu(cpu) {
++		struct softnet_data *sd = &per_cpu(softnet_data, cpu);
++
++		if (!cmpxchg(&sd->defer_ipi_scheduled, 0, 1))
++			smp_call_function_single_async(cpu, &sd->defer_csd);
++	}
++
+ 	/* Periodic warning */
+ 	if (time_after_eq(jiffies, pool->defer_warn)) {
+ 		int sec = (s32)((u32)jiffies - (u32)pool->defer_start) / HZ;



From lede-commits at lists.infradead.org  Fri Jan  3 13:30:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 16:30:54 -0500
Subject: [openwrt/openwrt]  mbedtls: Deactivate ARIA block cipher by default
In-Reply-To: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
References: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
Message-ID: <mailman.30874.1735939854.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/cf887640a39b7823fa3e047bf1d3b7b98abd1fef

commit cf887640a39b7823fa3e047bf1d3b7b98abd1fef
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Sun Dec 22 17:33:21 2024 +0100

    mbedtls: Deactivate ARIA block cipher by default
    
    The ARIA block cipher is pretty uncommon in TLS, deactivate it for now.
    This saves some space and reduces the possible variations and attack
    vectors of mbedtls.
    
    ARIA support was deactivated in OpenWrt 23.05 by default.
    
    Link: https://github.com/openwrt/openwrt/pull/17342
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 3c0ef48bc82cb11edd0b4fdbc4beaa3f95708967)
---
 package/libs/mbedtls/Config.in | 4 ++++
 package/libs/mbedtls/Makefile  | 1 +
 2 files changed, 5 insertions(+)

diff --git a/package/libs/mbedtls/Config.in b/package/libs/mbedtls/Config.in
index 51f8bcbbdd..0a760ed2cb 100644
--- a/package/libs/mbedtls/Config.in
+++ b/package/libs/mbedtls/Config.in
@@ -8,6 +8,10 @@ config MBEDTLS_AES_C
 	bool "MBEDTLS_AES_C"
 	default y
 
+config MBEDTLS_ARIA_C
+	bool "MBEDTLS_ARIA_C"
+	default n
+
 config MBEDTLS_CAMELLIA_C
 	bool "MBEDTLS_CAMELLIA_C"
 	default n
diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile
index 2efdf86cd2..f5bff13324 100644
--- a/package/libs/mbedtls/Makefile
+++ b/package/libs/mbedtls/Makefile
@@ -37,6 +37,7 @@ MBEDTLS_BUILD_OPTS_CURVES= \
 
 MBEDTLS_BUILD_OPTS_CIPHERS= \
   CONFIG_MBEDTLS_AES_C \
+  CONFIG_MBEDTLS_ARIA_C \
   CONFIG_MBEDTLS_CAMELLIA_C \
   CONFIG_MBEDTLS_CCM_C \
   CONFIG_MBEDTLS_CMAC_C \



From lede-commits at lists.infradead.org  Fri Jan  3 13:30:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 16:30:51 -0500
Subject: [openwrt/openwrt]  rockchip: fix phy reset on rk356x
In-Reply-To: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
References: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
Message-ID: <mailman.30875.1735939854.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/14722242af819cdb168968c00dd6fda4303b0b3e

commit 14722242af819cdb168968c00dd6fda4303b0b3e
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Fri Jan 3 20:37:41 2025 +0800

    rockchip: fix phy reset on rk356x
    
    The commit 7160820d742a ("phy: rockchip: naneng-combphy: fix phy reset")
    was backported to kernel 6.6 branch by upstream, however the correspond
    dtsi fixes was not, resulting the following error:
    ```
    [    0.225521] rockchip-naneng-combphy fe830000.phy: error -ENOENT: failed to get phy reset
    [    0.227467] rockchip-naneng-combphy fe840000.phy: error -ENOENT: failed to get phy reset
    ```
    
    So backport the dtsi fixes here manually.
    
    Fixes: 89b2356b8c2f ("kernel: bump 6.6 to 6.6.69")
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17468
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 8a477bafb4637e3499f69f569133039ce060559e)
---
 ...hip-add-reset-names-for-combphy-on-rk3568.patch | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch b/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch
new file mode 100644
index 0000000000..7a8f86a46f
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/016-v6.13-arm64-dts-rockchip-add-reset-names-for-combphy-on-rk3568.patch
@@ -0,0 +1,44 @@
+From 8b9c12757f919157752646faf3821abf2b7d2a64 Mon Sep 17 00:00:00 2001
+From: Chukun Pan <amadeus at jmu.edu.cn>
+Date: Fri, 22 Nov 2024 15:30:05 +0800
+Subject: [PATCH] arm64: dts: rockchip: add reset-names for combphy on rk3568
+
+The reset-names of combphy are missing, add it.
+
+Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
+Fixes: fd3ac6e80497 ("dt-bindings: phy: rockchip: rk3588 has two reset lines")
+Link: https://lore.kernel.org/r/20241122073006.99309-1-amadeus at jmu.edu.cn
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3568.dtsi      | 1 +
+ arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 2 ++
+ 2 files changed, 3 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+@@ -223,6 +223,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY0>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
+ 		#phy-cells = <1>;
+--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+@@ -1747,6 +1747,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY1>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
+ 		#phy-cells = <1>;
+@@ -1763,6 +1764,7 @@
+ 		assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
+ 		assigned-clock-rates = <100000000>;
+ 		resets = <&cru SRST_PIPEPHY2>;
++		reset-names = "phy";
+ 		rockchip,pipe-grf = <&pipegrf>;
+ 		rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
+ 		#phy-cells = <1>;



From lede-commits at lists.infradead.org  Fri Jan  3 13:30:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 16:30:53 -0500
Subject: [openwrt/openwrt]  config: enable SECCOMP support for loongarch64
In-Reply-To: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
References: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
Message-ID: <mailman.30876.1735939855.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/993ade9eb3cbc3e1a6aa2faa02220343a04eb725

commit 993ade9eb3cbc3e1a6aa2faa02220343a04eb725
Author: Weijie Gao <hackpascal at gmail.com>
AuthorDate: Sun Dec 22 18:32:54 2024 +0800

    config: enable SECCOMP support for loongarch64
    
    Make USE_SECCOMP selectable for loongarch64
    
    Signed-off-by: Weijie Gao <hackpascal at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17335
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit b6b6148d7d19f7081551491192e161f46cb0bdb8)
---
 config/Config-build.in | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/Config-build.in b/config/Config-build.in
index 08acae63d3..a9e968f944 100644
--- a/config/Config-build.in
+++ b/config/Config-build.in
@@ -427,7 +427,7 @@ menu "Global build settings"
 		bool "Enable SECCOMP"
 		select KERNEL_SECCOMP
 		select PACKAGE_procd-seccomp
-		depends on (aarch64 || arm || armeb || mips || mipsel || mips64 || mips64el || i386 || powerpc || x86_64)
+		depends on (aarch64 || arm || armeb || mips || mipsel || mips64 || mips64el || i386 || loongarch64 || powerpc || x86_64)
 		depends on !TARGET_uml
 		default y
 		help



From lede-commits at lists.infradead.org  Fri Jan  3 13:30:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 16:30:50 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.69
In-Reply-To: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
References: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
Message-ID: <mailman.30877.1735939855.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/09fcac8bc079edb20eabda857544022e115973a9

commit 09fcac8bc079edb20eabda857544022e115973a9
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 2 06:34:15 2025 -0500

    kernel: bump 6.6 to 6.6.69
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.69
    
    All patches automatically rebased.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17459
    Signed-off-by: Nick Hainke <vincent at systemli.org>
    (cherry picked from commit 89b2356b8c2fd420b49bacaa865fb9bd24173ecc)
---
 include/kernel-6.6                                     |  4 ++--
 ...519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  8 ++++----
 ...v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch | 18 +++++++++---------
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index c2805b4540..6cee9d1e8c 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .68
-LINUX_KERNEL_HASH-6.6.68 = 283ff410e3f352ceed161ae30c0020301326059db03e86efcb384d46ac5840e2
+LINUX_VERSION-6.6 = .69
+LINUX_KERNEL_HASH-6.6.69 = 9c6305567b75d99514cde6eb9de39973f3d5c857a75bd9dcdfca57041f8d4f34
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index fe77f21211..551bfccc75 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -68,7 +68,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	select SOC_BRCMSTB if ARCH_BRCMSTB
 --- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
 +++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
-@@ -335,6 +335,36 @@ static void usb_init_common_7216(struct
+@@ -341,6 +341,36 @@ static void usb_init_common_7216(struct
  	usb_init_common(params);
  }
  
@@ -105,7 +105,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  static void usb_init_xhci(struct brcm_usb_init_params *params)
  {
  	pr_debug("%s\n", __func__);
-@@ -380,6 +410,18 @@ static void usb_uninit_common_7211b0(str
+@@ -386,6 +416,18 @@ static void usb_uninit_common_7211b0(str
  
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  static void usb_uninit_xhci(struct brcm_usb_init_params *params)
  {
  
-@@ -434,6 +476,16 @@ static const struct brcm_usb_init_ops bc
+@@ -440,6 +482,16 @@ static const struct brcm_usb_init_ops bc
  	.set_dual_select = usb_set_dual_select,
  };
  
@@ -141,7 +141,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
  {
  
-@@ -451,3 +503,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
+@@ -457,3 +509,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
  	params->family_name = "7211";
  	params->ops = &bcm7211b0_ops;
  }
diff --git a/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch b/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
index c399b768b0..984034125c 100644
--- a/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
+++ b/target/linux/mediatek/patches-6.6/251-v6.8-watchdog-mediatek-mt7988-add-wdt-support.patch
@@ -18,7 +18,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
 
 --- a/drivers/watchdog/mtk_wdt.c
 +++ b/drivers/watchdog/mtk_wdt.c
-@@ -58,9 +58,13 @@
+@@ -59,9 +59,13 @@
  #define WDT_SWSYSRST		0x18U
  #define WDT_SWSYS_RST_KEY	0x88000000
  
@@ -32,7 +32,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static bool nowayout = WATCHDOG_NOWAYOUT;
  static unsigned int timeout;
  
-@@ -71,10 +75,12 @@ struct mtk_wdt_dev {
+@@ -72,10 +76,12 @@ struct mtk_wdt_dev {
  	struct reset_controller_dev rcdev;
  	bool disable_wdt_extrst;
  	bool reset_by_toprgu;
@@ -45,7 +45,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  };
  
  static const struct mtk_wdt_data mt2712_data = {
-@@ -89,6 +95,11 @@ static const struct mtk_wdt_data mt7986_
+@@ -94,6 +100,11 @@ static const struct mtk_wdt_data mt7986_
  	.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
  };
  
@@ -57,7 +57,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static const struct mtk_wdt_data mt8183_data = {
  	.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
  };
-@@ -109,6 +120,28 @@ static const struct mtk_wdt_data mt8195_
+@@ -114,6 +125,28 @@ static const struct mtk_wdt_data mt8195_
  	.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
  };
  
@@ -86,7 +86,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  static int toprgu_reset_update(struct reset_controller_dev *rcdev,
  			       unsigned long id, bool assert)
  {
-@@ -119,6 +152,9 @@ static int toprgu_reset_update(struct re
+@@ -124,6 +157,9 @@ static int toprgu_reset_update(struct re
  
  	spin_lock_irqsave(&data->lock, flags);
  
@@ -96,7 +96,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	tmp = readl(data->wdt_base + WDT_SWSYSRST);
  	if (assert)
  		tmp |= BIT(id);
-@@ -127,6 +163,9 @@ static int toprgu_reset_update(struct re
+@@ -132,6 +168,9 @@ static int toprgu_reset_update(struct re
  	tmp |= WDT_SWSYS_RST_KEY;
  	writel(tmp, data->wdt_base + WDT_SWSYSRST);
  
@@ -106,7 +106,7 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	spin_unlock_irqrestore(&data->lock, flags);
  
  	return 0;
-@@ -412,6 +451,8 @@ static int mtk_wdt_probe(struct platform
+@@ -417,6 +456,8 @@ static int mtk_wdt_probe(struct platform
  						       wdt_data->toprgu_sw_rst_num);
  		if (err)
  			return err;
@@ -115,8 +115,8 @@ Signed-off-by: Wim Van Sebroeck <wim at linux-watchdog.org>
  	}
  
  	mtk_wdt->disable_wdt_extrst =
-@@ -450,6 +491,7 @@ static const struct of_device_id mtk_wdt
- 	{ .compatible = "mediatek,mt6589-wdt" },
+@@ -456,6 +497,7 @@ static const struct of_device_id mtk_wdt
+ 	{ .compatible = "mediatek,mt6735-wdt", .data = &mt6735_data },
  	{ .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data },
  	{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
 +	{ .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data },



From lede-commits at lists.infradead.org  Fri Jan  3 13:30:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 16:30:52 -0500
Subject: [openwrt/openwrt]  procd: update to Git HEAD (2024-12-22)
In-Reply-To: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
References: <173593985073.1658642.1463313577335410728@git-01.infra.openwrt.org>
Message-ID: <mailman.30878.1735939855.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/43e1b47d70b4b7d43564b17f0e40346a2d26de30

commit 43e1b47d70b4b7d43564b17f0e40346a2d26de30
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Sun Dec 22 17:47:34 2024 +0100

    procd: update to Git HEAD (2024-12-22)
    
    42d3937 jail/seccomp: add support for loongarch64
    
    Link: https://github.com/openwrt/openwrt/pull/17335
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit f69fc4c413357ab2e981f11eacd6101b6a59ab34)
---
 package/system/procd/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index 7a2276a46d..65cc0ad9f6 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
-PKG_MIRROR_HASH:=99139ce325d73f5b250d115703540acfac3bcdc8ee202f2d3aacf3083042bc70
-PKG_SOURCE_DATE:=2024-12-17
-PKG_SOURCE_VERSION:=fd01fb852302a2683d09ee1c2193d7c51e2b0ba8
+PKG_MIRROR_HASH:=41dbb5352eff931ecc78c4ce9a081645c26a7fb8dc57cdd6521a2f8d3a142567
+PKG_SOURCE_DATE:=2024-12-22
+PKG_SOURCE_VERSION:=42d3937654508b04da64969f9d764ac2ec411904
 CMAKE_INSTALL:=1
 
 PKG_LICENSE:=GPL-2.0



From lede-commits at lists.infradead.org  Fri Jan  3 15:40:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 18:40:33 -0500
Subject: [openwrt/openwrt]  generic: 6.6: backport upstream Realtek PHY
 patches
In-Reply-To: <173594763390.1840962.3412256196951039364@git-01.infra.openwrt.org>
References: <173594763390.1840962.3412256196951039364@git-01.infra.openwrt.org>
Message-ID: <mailman.30897.1735947638.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/fedb1f86b50986a962c899d7406566d991e030ee

commit fedb1f86b50986a962c899d7406566d991e030ee
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Mon Dec 30 01:01:33 2024 +0100

    generic: 6.6: backport upstream Realtek PHY patches
    
    8989bad54113 net: phy: realtek: add RTL8125D-internal PHY
    f87a17ed3b51 net: phy: realtek: merge the drivers for internal NBase-T PHY's
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...ltek-merge-the-drivers-for-internal-NBase.patch | 136 +++++++++++++++++++++
 ...net-phy-realtek-add-RTL8125D-internal-PHY.patch |  29 +++++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch |  18 +--
 ...ek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch |   4 +-
 ...ltek-make-sure-paged-read-is-protected-by.patch |   2 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch |  14 +--
 ...-realtek-detect-early-version-of-RTL8221B.patch |   4 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  10 +-
 8 files changed, 191 insertions(+), 26 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch b/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch
new file mode 100644
index 0000000000..771f60df91
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch
@@ -0,0 +1,136 @@
+From f87a17ed3b51fba4dfdd8f8b643b5423a85fc551 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Tue, 15 Oct 2024 07:47:14 +0200
+Subject: [PATCH] net: phy: realtek: merge the drivers for internal NBase-T
+ PHY's
+
+The Realtek RTL8125/RTL8126 NBase-T MAC/PHY chips have internal PHY's
+which are register-compatible, at least for the registers we use here.
+So let's use just one PHY driver to support all of them.
+These internal PHY's exist also as external C45 PHY's, but on the
+internal PHY's no access to MMD registers is possible. This can be
+used to differentiate between the internal and external version.
+
+As a side effect the drivers for two now external-only drivers don't
+require read_mmd/write_mmd hooks any longer.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/c57081a6-811f-4571-ab35-34f4ca6de9af at gmail.com
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/phy/realtek.c | 53 +++++++++++++++++++++++++++++++--------
+ 1 file changed, 43 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -95,6 +95,7 @@
+ 
+ #define RTL_GENERIC_PHYID			0x001cc800
+ #define RTL_8211FVD_PHYID			0x001cc878
++#define RTL_8221B				0x001cc840
+ #define RTL_8221B_VB_CG				0x001cc849
+ #define RTL_8221B_VN_CG				0x001cc84a
+ #define RTL_8251B				0x001cc862
+@@ -1077,6 +1078,23 @@ static bool rtlgen_supports_2_5gbps(stru
+ 	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
+ }
+ 
++/* On internal PHY's MMD reads over C22 always return 0.
++ * Check a MMD register which is known to be non-zero.
++ */
++static bool rtlgen_supports_mmd(struct phy_device *phydev)
++{
++	int val;
++
++	phy_lock_mdio_bus(phydev);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
++	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
++	val = __phy_read(phydev, MII_MMD_DATA);
++	phy_unlock_mdio_bus(phydev);
++
++	return val > 0;
++}
++
+ static int rtlgen_match_phy_device(struct phy_device *phydev)
+ {
+ 	return phydev->phy_id == RTL_GENERIC_PHYID &&
+@@ -1086,7 +1104,8 @@ static int rtlgen_match_phy_device(struc
+ static int rtl8226_match_phy_device(struct phy_device *phydev)
+ {
+ 	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       rtlgen_supports_2_5gbps(phydev);
++	       rtlgen_supports_2_5gbps(phydev) &&
++	       rtlgen_supports_mmd(phydev);
+ }
+ 
+ static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+@@ -1098,6 +1117,11 @@ static int rtlgen_is_c45_match(struct ph
+ 		return !is_c45 && (id == phydev->phy_id);
+ }
+ 
++static int rtl8221b_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
++}
++
+ static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+ {
+ 	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
+@@ -1118,9 +1142,21 @@ static int rtl8221b_vn_cg_c45_match_phy_
+ 	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+ }
+ 
+-static int rtl8251b_c22_match_phy_device(struct phy_device *phydev)
++static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
+ {
+-	return rtlgen_is_c45_match(phydev, RTL_8251B, false);
++	if (phydev->is_c45)
++		return false;
++
++	switch (phydev->phy_id) {
++	case RTL_GENERIC_PHYID:
++	case RTL_8221B:
++	case RTL_8251B:
++		break;
++	default:
++		return false;
++	}
++
++	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
+ }
+ 
+ static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
+@@ -1382,10 +1418,8 @@ static struct phy_driver realtek_drvs[]
+ 		.resume		= rtlgen_resume,
+ 		.read_page	= rtl821x_read_page,
+ 		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+ 	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc840),
++		.match_phy_device = rtl8221b_match_phy_device,
+ 		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+@@ -1396,8 +1430,6 @@ static struct phy_driver realtek_drvs[]
+ 		.resume		= rtlgen_resume,
+ 		.read_page	= rtl821x_read_page,
+ 		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+ 	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc838),
+ 		.name           = "RTL8226-CG 2.5Gbps PHY",
+@@ -1475,8 +1507,9 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
+-		.match_phy_device = rtl8251b_c22_match_phy_device,
+-		.name           = "RTL8126A-internal 5Gbps PHY",
++		.match_phy_device = rtl_internal_nbaset_match_phy_device,
++		.name           = "Realtek Internal NBASE-T PHY",
++		.flags		= PHY_IS_INTERNAL,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch b/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch
new file mode 100644
index 0000000000..4b9b9e8d48
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch
@@ -0,0 +1,29 @@
+From 8989bad541133c43550bff2b80edbe37b8fb9659 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 17 Oct 2024 18:01:13 +0200
+Subject: [PATCH] net: phy: realtek: add RTL8125D-internal PHY
+
+The first boards show up with Realtek's RTL8125D. This MAC/PHY chip
+comes with an integrated 2.5Gbps PHY with ID 0x001cc841. It's not
+clear yet whether there's an external version of this PHY and how
+Realtek calls it, therefore use the numeric id for now.
+
+Link: https://lore.kernel.org/netdev/2ada65e1-5dfa-456c-9334-2bc51272e9da at gmail.com/T/
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Message-ID: <7d2924de-053b-44d2-a479-870dc3878170 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/phy/realtek.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1151,6 +1151,7 @@ static int rtl_internal_nbaset_match_phy
+ 	case RTL_GENERIC_PHYID:
+ 	case RTL_8221B:
+ 	case RTL_8251B:
++	case 0x001cc841:
+ 		break;
+ 	default:
+ 		return false;
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 2b77b6e02f..8de57707a2 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1375,6 +1375,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1412,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,15 +23,15 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1387,6 +1388,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1422,6 +1423,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc840),
+ 		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
 +		.soft_reset     = genphy_soft_reset,
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1401,6 +1403,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1434,6 +1436,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1411,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1444,6 +1447,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1423,6 +1427,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1456,6 +1460,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1435,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1468,6 +1473,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1445,6 +1451,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1478,6 +1484,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1457,6 +1464,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1490,6 +1497,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
index cbef74d317..7e48c16515 100644
--- a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
@@ -20,7 +20,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -814,8 +814,8 @@ static int rtl822x_write_mmd(struct phy_
+@@ -815,8 +815,8 @@ static int rtl822x_write_mmd(struct phy_
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
@@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
  			    phydev->host_interfaces) ||
-@@ -865,7 +865,29 @@ static int rtl822xb_config_init(struct p
+@@ -866,7 +866,29 @@ static int rtl822xb_config_init(struct p
  	if (ret < 0)
  		return ret;
  
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 216fa918e1..722ec02cdc 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1092,9 +1092,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1093,9 +1093,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 08c13f34e4..1b9cdada6d 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1152,6 +1156,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1189,6 +1193,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
@@ -50,7 +50,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1427,6 +1450,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1460,6 +1483,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -58,7 +58,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1438,6 +1462,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1471,6 +1495,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -66,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1451,6 +1476,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1484,6 +1509,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1464,6 +1490,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1497,6 +1523,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1475,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1508,6 +1535,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -90,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1488,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1521,6 +1549,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 6938552d14..63ffd0a0c9 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1120,10 +1120,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1139,10 +1139,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
@@ -49,4 +49,4 @@ Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 +	}
  }
  
- static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+ static int rtl8221b_match_phy_device(struct phy_device *phydev)
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index a796b8f011..c9e15fb463 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1332,6 +1332,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1369,6 +1369,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1498,6 +1543,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1531,6 +1576,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1512,6 +1559,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1545,6 +1592,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1524,6 +1573,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1557,6 +1606,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1538,6 +1589,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1571,6 +1622,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",



From lede-commits at lists.infradead.org  Fri Jan  3 15:42:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 18:42:01 -0500
Subject: [openwrt/openwrt]  generic: 6.6: backport upstream r8169 patches
In-Reply-To: <173594772191.1843666.14543218347439302359@git-01.infra.openwrt.org>
References: <173594772191.1843666.14543218347439302359@git-01.infra.openwrt.org>
Message-ID: <mailman.30898.1735947727.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0eeba04a16fb72b13d90973ef8ba95f0549f973e

commit 0eeba04a16fb72b13d90973ef8ba95f0549f973e
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Mon Dec 30 01:01:33 2024 +0100

    generic: 6.6: backport upstream r8169 patches
    
    7a3bcd39ae1f r8169: use helper r8169_mod_reg8_cond to simplify rtl_jumbo_config
    e3e9e9039fa6 r8169: align WAKE_PHY handling with r8125/r8126 vendor drivers
    330dc2297c82 r8169: improve rtl_set_d3_pll_down
    c507e96b5763 r8169: improve __rtl8169_set_wol
    83cb4b470c66 r8169: remove leftover locks after reverted change
    2cd02f2fdd8a r8169: improve initialization of RSS registers on RTL8125/RTL8126
    a3d8520e6a19 r8169: align RTL8126 EEE config with vendor driver
    4af2f60bf737 r8169: align RTL8125/RTL8126 PHY config with vendor driver
    eb90f876b796 r8169: align RTL8125 EEE config with vendor driver
    b8bd8c44a266 r8169: fix inconsistent indenting in rtl8169_get_eth_mac_stats
    f75d1fbe7809 r8169: add support for RTL8125D
    c4e64095c00c r8169: enable EEE at 2.5G per default on RTL8125B
    d64113c6bb5e r8169: remove rtl_dash_loop_wait_high/low
    1c105bacb160 r8169: avoid duplicated messages if loading firmware fails and switch to warn level
    ac48430368c1 r8169: don't take RTNL lock in rtl_task()
    e3fc5139bd8f r8169: implement additional ethtool stats ops
    b8bf38440ba9 r8169: enable SG/TSO on selected chip versions per default
    854d71c555df r8169: remove original workaround for RTL8125 broken rx issue
    1ffcc8d41306 r8169: add support for the temperature sensor being available from RTL8125B
    
    The following patches require backporting additional linux patches:
    e2015942e90a r8169: replace custom flag with disable_work() et al
    e340bff27e63 r8169: copy vendor driver 2.5G/5G EEE advertisement constraints
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 package/kernel/linux/modules/netdevices.mk         |   2 +-
 ...upport-for-the-temperature-sensor-being-a.patch |  83 ++++++++++++
 ...e-original-workaround-for-RTL8125-broken-.patch |  33 +++++
 ...e-SG-TSO-on-selected-chip-versions-per-de.patch |  52 ++++++++
 ...69-implement-additional-ethtool-stats-ops.patch | 130 +++++++++++++++++++
 ...13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch |  50 +++++++
 ...-duplicated-messages-if-loading-firmware-.patch |  41 ++++++
 ...-r8169-remove-rtl_dash_loop_wait_high-low.patch |  82 ++++++++++++
 ...nable-EEE-at-2.5G-per-default-on-RTL8125B.patch |  28 ++++
 ...0-33-v6.13-r8169-add-support-for-RTL8125D.patch | 143 +++++++++++++++++++++
 ...nconsistent-indenting-in-rtl8169_get_eth_.patch |  30 +++++
 ...ign-RTL8125-EEE-config-with-vendor-driver.patch |  49 +++++++
 ...-RTL8125-RTL8126-PHY-config-with-vendor-d.patch |  46 +++++++
 ...ign-RTL8126-EEE-config-with-vendor-driver.patch |  25 ++++
 ...ve-initialization-of-RSS-registers-on-RTL.patch |  38 ++++++
 ...move-leftover-locks-after-reverted-change.patch | 113 ++++++++++++++++
 ...-40-v6.13-r8169-improve-__rtl8169_set_wol.patch | 108 ++++++++++++++++
 ...1-v6.13-r8169-improve-rtl_set_d3_pll_down.patch |  44 +++++++
 ...-WAKE_PHY-handling-with-r8125-r8126-vendo.patch |  29 +++++
 ...elper-r8169_mod_reg8_cond-to-simplify-rtl.patch | 117 +++++++++++++++++
 20 files changed, 1242 insertions(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index 097bea7f50..dc256237e9 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -970,7 +970,7 @@ $(eval $(call KernelPackage,8139cp))
 define KernelPackage/r8169
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres
+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres +kmod-hwmon-core
   KCONFIG:= \
     CONFIG_R8169 \
     CONFIG_R8169_LEDS=y
diff --git a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
new file mode 100644
index 0000000000..2403da5d55
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
@@ -0,0 +1,83 @@
+From 1ffcc8d41306fd2e5f140b276820714a26a11cc4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 7 Oct 2024 20:34:12 +0200
+Subject: [PATCH] r8169: add support for the temperature sensor being available
+ from RTL8125B
+
+This adds support for the temperature sensor being available from
+RTL8125B. Register information was taken from r8125 vendor driver.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 44 +++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -16,6 +16,7 @@
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/ethtool.h>
++#include <linux/hwmon.h>
+ #include <linux/phy.h>
+ #include <linux/if_vlan.h>
+ #include <linux/in.h>
+@@ -5373,6 +5374,43 @@ static bool rtl_aspm_is_safe(struct rtl8
+ 	return false;
+ }
+ 
++static umode_t r8169_hwmon_is_visible(const void *drvdata,
++				      enum hwmon_sensor_types type,
++				      u32 attr, int channel)
++{
++	return 0444;
++}
++
++static int r8169_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
++			    u32 attr, int channel, long *val)
++{
++	struct rtl8169_private *tp = dev_get_drvdata(dev);
++	int val_raw;
++
++	val_raw = phy_read_paged(tp->phydev, 0xbd8, 0x12) & 0x3ff;
++	if (val_raw >= 512)
++		val_raw -= 1024;
++
++	*val = 1000 * val_raw / 2;
++
++	return 0;
++}
++
++static const struct hwmon_ops r8169_hwmon_ops = {
++	.is_visible =  r8169_hwmon_is_visible,
++	.read = r8169_hwmon_read,
++};
++
++static const struct hwmon_channel_info * const r8169_hwmon_info[] = {
++	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
++	NULL
++};
++
++static const struct hwmon_chip_info r8169_hwmon_chip_info = {
++	.ops = &r8169_hwmon_ops,
++	.info = r8169_hwmon_info,
++};
++
+ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
+ {
+ 	struct rtl8169_private *tp;
+@@ -5547,6 +5585,12 @@ static int rtl_init_one(struct pci_dev *
+ 	if (rc)
+ 		return rc;
+ 
++	/* The temperature sensor is available from RTl8125B */
++	if (IS_REACHABLE(CONFIG_HWMON) && tp->mac_version >= RTL_GIGA_MAC_VER_63)
++		/* ignore errors */
++		devm_hwmon_device_register_with_info(&pdev->dev, "nic_temp", tp,
++						     &r8169_hwmon_chip_info,
++						     NULL);
+ 	rc = register_netdev(dev);
+ 	if (rc)
+ 		return rc;
diff --git a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
new file mode 100644
index 0000000000..8c6e6d8dc4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
@@ -0,0 +1,33 @@
+From 854d71c555dfc3383c1fde7d9989b6046e21093d Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 9 Oct 2024 07:48:05 +0200
+Subject: [PATCH] r8169: remove original workaround for RTL8125 broken rx issue
+
+Now that we have b9c7ac4fe22c ("r8169: disable ALDPS per default for
+RTL8125"), the first attempt to fix the issue shouldn't be needed
+any longer. So let's effectively revert 621735f59064 ("r8169: fix
+rare issue with broken rx after link-down on RTL8125") and see
+whether anybody complains.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/382d8c88-cbce-400f-ad62-fda0181c7e38 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4779,11 +4779,7 @@ static void r8169_phylink_handler(struct
+ 	if (netif_carrier_ok(ndev)) {
+ 		rtl_link_chg_patch(tp);
+ 		pm_request_resume(d);
+-		netif_wake_queue(tp->dev);
+ 	} else {
+-		/* In few cases rx is broken after link-down otherwise */
+-		if (rtl_is_8125(tp))
+-			rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
+ 		pm_runtime_idle(d);
+ 	}
+ 
diff --git a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
new file mode 100644
index 0000000000..dc05299628
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
@@ -0,0 +1,52 @@
+From b8bf38440ba94e8ed8e2ae55c5dfb0276d30e843 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 10 Oct 2024 12:58:02 +0200
+Subject: [PATCH] r8169: enable SG/TSO on selected chip versions per default
+
+Due to problem reports in the past SG and TSO/TSO6 are disabled per
+default. It's not fully clear which chip versions are affected, so we
+may impact also users of unaffected chip versions, unless they know
+how to use ethtool for enabling SG/TSO/TSO6.
+Vendor drivers r8168/r8125 enable SG/TSO/TSO6 for selected chip
+versions per default, I'd interpret this as confirmation that these
+chip versions are unaffected. So let's do the same here.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5529,11 +5529,6 @@ static int rtl_init_one(struct pci_dev *
+ 
+ 	dev->features |= dev->hw_features;
+ 
+-	/* There has been a number of reports that using SG/TSO results in
+-	 * tx timeouts. However for a lot of people SG/TSO works fine.
+-	 * Therefore disable both features by default, but allow users to
+-	 * enable them. Use at own risk!
+-	 */
+ 	if (rtl_chip_supports_csum_v2(tp)) {
+ 		dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
+ 		netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
+@@ -5544,6 +5539,17 @@ static int rtl_init_one(struct pci_dev *
+ 		netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
+ 	}
+ 
++	/* There has been a number of reports that using SG/TSO results in
++	 * tx timeouts. However for a lot of people SG/TSO works fine.
++	 * It's not fully clear which chip versions are affected. Vendor
++	 * drivers enable SG/TSO for certain chip versions per default,
++	 * let's mimic this here. On other chip versions users can
++	 * use ethtool to enable SG/TSO, use at own risk!
++	 */
++	if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_61)
++		dev->features |= dev->hw_features;
++
+ 	dev->hw_features |= NETIF_F_RXALL;
+ 	dev->hw_features |= NETIF_F_RXFCS;
+ 
diff --git a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
new file mode 100644
index 0000000000..faab0df7f4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
@@ -0,0 +1,130 @@
+From e3fc5139bd8ffaa1498adc21be4e8ecbc6aed508 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sun, 13 Oct 2024 11:17:39 +0200
+Subject: [PATCH] r8169: implement additional ethtool stats ops
+
+This adds support for ethtool standard statistics, and makes use of the
+extended hardware statistics being available from RTl8125.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/58e0da73-a7dd-4be3-82ae-d5b3f9069bde at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 82 +++++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2162,6 +2162,19 @@ static void rtl8169_get_ringparam(struct
+ 	data->tx_pending = NUM_TX_DESC;
+ }
+ 
++static void rtl8169_get_pause_stats(struct net_device *dev,
++				    struct ethtool_pause_stats *pause_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	rtl8169_update_counters(tp);
++	pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on);
++	pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on);
++}
++
+ static void rtl8169_get_pauseparam(struct net_device *dev,
+ 				   struct ethtool_pauseparam *data)
+ {
+@@ -2188,6 +2201,69 @@ static int rtl8169_set_pauseparam(struct
+ 	return 0;
+ }
+ 
++static void rtl8169_get_eth_mac_stats(struct net_device *dev,
++				      struct ethtool_eth_mac_stats *mac_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	rtl8169_update_counters(tp);
++
++	mac_stats->FramesTransmittedOK =
++		le64_to_cpu(tp->counters->tx_packets);
++	mac_stats->SingleCollisionFrames =
++		le32_to_cpu(tp->counters->tx_one_collision);
++	mac_stats->MultipleCollisionFrames =
++		le32_to_cpu(tp->counters->tx_multi_collision);
++	mac_stats->FramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_packets);
++	mac_stats->AlignmentErrors =
++		le16_to_cpu(tp->counters->align_errors);
++	mac_stats->FramesLostDueToIntMACXmitError =
++		le64_to_cpu(tp->counters->tx_errors);
++	mac_stats->BroadcastFramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_broadcast);
++	mac_stats->MulticastFramesReceivedOK =
++		le32_to_cpu(tp->counters->rx_multicast);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	mac_stats->AlignmentErrors =
++		le32_to_cpu(tp->counters->align_errors32);
++	mac_stats->OctetsTransmittedOK =
++		le64_to_cpu(tp->counters->tx_octets);
++	mac_stats->LateCollisions =
++		le32_to_cpu(tp->counters->tx_late_collision);
++	mac_stats->FramesAbortedDueToXSColls =
++		le32_to_cpu(tp->counters->tx_aborted32);
++	mac_stats->OctetsReceivedOK =
++		le64_to_cpu(tp->counters->rx_octets);
++	mac_stats->FramesLostDueToIntMACRcvError =
++		le32_to_cpu(tp->counters->rx_mac_error);
++	mac_stats->MulticastFramesXmittedOK =
++		le64_to_cpu(tp->counters->tx_multicast64);
++	mac_stats->BroadcastFramesXmittedOK =
++		le64_to_cpu(tp->counters->tx_broadcast64);
++	mac_stats->MulticastFramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_multicast64);
++	 mac_stats->FrameTooLongErrors =
++		le32_to_cpu(tp->counters->rx_frame_too_long);
++}
++
++static void rtl8169_get_eth_ctrl_stats(struct net_device *dev,
++				       struct ethtool_eth_ctrl_stats *ctrl_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	rtl8169_update_counters(tp);
++
++	ctrl_stats->UnsupportedOpcodesReceived =
++		le32_to_cpu(tp->counters->rx_unknown_opcode);
++}
++
+ static const struct ethtool_ops rtl8169_ethtool_ops = {
+ 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
+ 				     ETHTOOL_COALESCE_MAX_FRAMES,
+@@ -2209,8 +2285,11 @@ static const struct ethtool_ops rtl8169_
+ 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
+ 	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
+ 	.get_ringparam		= rtl8169_get_ringparam,
++	.get_pause_stats	= rtl8169_get_pause_stats,
+ 	.get_pauseparam		= rtl8169_get_pauseparam,
+ 	.set_pauseparam		= rtl8169_set_pauseparam,
++	.get_eth_mac_stats	= rtl8169_get_eth_mac_stats,
++	.get_eth_ctrl_stats	= rtl8169_get_eth_ctrl_stats,
+ };
+ 
+ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
+@@ -3895,6 +3974,9 @@ static void rtl_hw_start_8125(struct rtl
+ 		break;
+ 	}
+ 
++	/* enable extended tally counter */
++	r8168_mac_ocp_modify(tp, 0xea84, 0, BIT(1) | BIT(0));
++
+ 	rtl_hw_config(tp);
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
new file mode 100644
index 0000000000..38b5035441
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
@@ -0,0 +1,50 @@
+From ac48430368c1a4f4e6c2fa92243b4b93fd25bee4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:05:57 +0200
+Subject: [PATCH] r8169: don't take RTNL lock in rtl_task()
+
+There's not really a benefit here in taking the RTNL lock. The task
+handler does exception handling only, so we're in trouble anyway when
+we come here, and there's no need to protect against e.g. a parallel
+ethtool call.
+A benefit of removing the RTNL lock here is that we now can
+synchronously cancel the workqueue from a context holding the RTNL mutex.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4802,10 +4802,8 @@ static void rtl_task(struct work_struct
+ 		container_of(work, struct rtl8169_private, wk.work);
+ 	int ret;
+ 
+-	rtnl_lock();
+-
+ 	if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
+-		goto out_unlock;
++		return;
+ 
+ 	if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
+ 		/* if chip isn't accessible, reset bus to revive it */
+@@ -4814,7 +4812,7 @@ static void rtl_task(struct work_struct
+ 			if (ret < 0) {
+ 				netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
+ 				netif_device_detach(tp->dev);
+-				goto out_unlock;
++				return;
+ 			}
+ 		}
+ 
+@@ -4833,8 +4831,6 @@ reset:
+ 	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
+ 		rtl_reset_work(tp);
+ 	}
+-out_unlock:
+-	rtnl_unlock();
+ }
+ 
+ static int rtl8169_poll(struct napi_struct *napi, int budget)
diff --git a/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch b/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch
new file mode 100644
index 0000000000..6430d32252
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch
@@ -0,0 +1,41 @@
+From 1c105bacb160b5918e917ab811552b7be69fc69c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:29:39 +0200
+Subject: [PATCH] r8169: avoid duplicated messages if loading firmware fails
+ and switch to warn level
+
+In case of a problem with firmware loading we inform at the driver level,
+in addition the firmware load code itself issues warnings. Therefore
+switch to firmware_request_nowarn() to avoid duplicated error messages.
+In addition switch to warn level because the firmware is optional and
+typically just fixes compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <d9c5094c-89a6-40e2-b5fe-8df7df4624ef at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_firmware.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_firmware.c
++++ b/drivers/net/ethernet/realtek/r8169_firmware.c
+@@ -215,7 +215,7 @@ int rtl_fw_request_firmware(struct rtl_f
+ {
+ 	int rc;
+ 
+-	rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
++	rc = firmware_request_nowarn(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
+ 	if (rc < 0)
+ 		goto out;
+ 
+@@ -227,7 +227,7 @@ int rtl_fw_request_firmware(struct rtl_f
+ 
+ 	return 0;
+ out:
+-	dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
+-		rtl_fw->fw_name, rc);
++	dev_warn(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
++		 rtl_fw->fw_name, rc);
+ 	return rc;
+ }
diff --git a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
new file mode 100644
index 0000000000..4792e371b6
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
@@ -0,0 +1,82 @@
+From d64113c6bb5ea5a70b7c9c3a6bcadef307638187 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:31:10 +0200
+Subject: [PATCH] r8169: remove rtl_dash_loop_wait_high/low
+
+Remove rtl_dash_loop_wait_high/low to simplify the code.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <fb8c490c-2d92-48f5-8bbf-1fc1f2ee1649 at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++-----------------
+ 1 file changed, 8 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1347,40 +1347,19 @@ static void rtl8168ep_stop_cmac(struct r
+ 	RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
+ }
+ 
+-static void rtl_dash_loop_wait(struct rtl8169_private *tp,
+-			       const struct rtl_cond *c,
+-			       unsigned long usecs, int n, bool high)
+-{
+-	if (!tp->dash_enabled)
+-		return;
+-	rtl_loop_wait(tp, c, usecs, n, high);
+-}
+-
+-static void rtl_dash_loop_wait_high(struct rtl8169_private *tp,
+-				    const struct rtl_cond *c,
+-				    unsigned long d, int n)
+-{
+-	rtl_dash_loop_wait(tp, c, d, n, true);
+-}
+-
+-static void rtl_dash_loop_wait_low(struct rtl8169_private *tp,
+-				   const struct rtl_cond *c,
+-				   unsigned long d, int n)
+-{
+-	rtl_dash_loop_wait(tp, c, d, n, false);
+-}
+-
+ static void rtl8168dp_driver_start(struct rtl8169_private *tp)
+ {
+ 	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_START);
+-	rtl_dash_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168ep_driver_start(struct rtl8169_private *tp)
+ {
+ 	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START);
+ 	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+-	rtl_dash_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
++	if (tp->dash_enabled)
++		rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
+ }
+ 
+ static void rtl8168_driver_start(struct rtl8169_private *tp)
+@@ -1394,7 +1373,8 @@ static void rtl8168_driver_start(struct
+ static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
+ {
+ 	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
+-	rtl_dash_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
+@@ -1402,7 +1382,8 @@ static void rtl8168ep_driver_stop(struct
+ 	rtl8168ep_stop_cmac(tp);
+ 	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
+ 	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+-	rtl_dash_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168_driver_stop(struct rtl8169_private *tp)
diff --git a/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch b/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch
new file mode 100644
index 0000000000..4ec06cc601
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch
@@ -0,0 +1,28 @@
+From c4e64095c00cb2de413cd6b90be047c273bcd491 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 17 Oct 2024 22:27:44 +0200
+Subject: [PATCH] r8169: enable EEE at 2.5G per default on RTL8125B
+
+Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line
+disables advertisement of EEE at 2.5G. Latest vendor driver r8125
+doesn't do this (any longer?), so this mode seems to be safe.
+EEE saves quite some energy, therefore enable this mode per default.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <95dd5a0c-09ea-4847-94d9-b7aa3063e8ff at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -99,7 +99,6 @@ static void rtl8125a_config_eee_phy(stru
+ 
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+-	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+ 	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+ 	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+ 	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
diff --git a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
new file mode 100644
index 0000000000..81058e5e9f
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
@@ -0,0 +1,143 @@
+From f75d1fbe7809bc5ed134204b920fd9e2fc5db1df Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 24 Oct 2024 22:42:33 +0200
+Subject: [PATCH] r8169: add support for RTL8125D
+
+This adds support for new chip version RTL8125D, which can be found on
+boards like Gigabyte X870E AORUS ELITE WIFI7. Firmware rtl8125d-1.fw
+for this chip version is available in linux-firmware already.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/d0306912-e88e-4c25-8b5d-545ae8834c0c at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169.h          |  1 +
+ drivers/net/ethernet/realtek/r8169_main.c     | 23 +++++++++++++------
+ .../net/ethernet/realtek/r8169_phy_config.c   | 10 ++++++++
+ 3 files changed, 27 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -68,6 +68,7 @@ enum mac_version {
+ 	/* support for RTL_GIGA_MAC_VER_60 has been removed */
+ 	RTL_GIGA_MAC_VER_61,
+ 	RTL_GIGA_MAC_VER_63,
++	RTL_GIGA_MAC_VER_64,
+ 	RTL_GIGA_MAC_VER_65,
+ 	RTL_GIGA_MAC_VER_66,
+ 	RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -56,6 +56,7 @@
+ #define FIRMWARE_8107E_2	"rtl_nic/rtl8107e-2.fw"
+ #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"
+ #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
++#define FIRMWARE_8125D_1	"rtl_nic/rtl8125d-1.fw"
+ #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
+ 
+@@ -139,6 +140,7 @@ static const struct {
+ 	[RTL_GIGA_MAC_VER_61] = {"RTL8125A",		FIRMWARE_8125A_3},
+ 	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ 	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
++	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},
+ 	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},
+ 	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},
+ };
+@@ -708,6 +710,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+ MODULE_FIRMWARE(FIRMWARE_8107E_2);
+ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
++MODULE_FIRMWARE(FIRMWARE_8125D_1);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+ 
+@@ -2080,10 +2083,7 @@ static void rtl_set_eee_txidle_timer(str
+ 		tp->tx_lpi_timer = timer_val;
+ 		r8168_mac_ocp_write(tp, 0xe048, timer_val);
+ 		break;
+-	case RTL_GIGA_MAC_VER_61:
+-	case RTL_GIGA_MAC_VER_63:
+-	case RTL_GIGA_MAC_VER_65:
+-	case RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ 		tp->tx_lpi_timer = timer_val;
+ 		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
+ 		break;
+@@ -2295,6 +2295,9 @@ static enum mac_version rtl8169_get_mac_
+ 		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },
+ 		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
+ 
++		/* 8125D family. */
++		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },
++
+ 		/* 8125B family. */
+ 		{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63 },
+ 
+@@ -2562,9 +2565,7 @@ static void rtl_init_rxcfg(struct rtl816
+ 	case RTL_GIGA_MAC_VER_61:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
+ 		break;
+-	case RTL_GIGA_MAC_VER_63:
+-	case RTL_GIGA_MAC_VER_65:
+-	case RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
+ 			RX_PAUSE_SLOT_ON);
+ 		break;
+@@ -3876,6 +3877,12 @@ static void rtl_hw_start_8125b(struct rt
+ 	rtl_hw_start_8125_common(tp);
+ }
+ 
++static void rtl_hw_start_8125d(struct rtl8169_private *tp)
++{
++	rtl_set_def_aspm_entry_latency(tp);
++	rtl_hw_start_8125_common(tp);
++}
++
+ static void rtl_hw_start_8126a(struct rtl8169_private *tp)
+ {
+ 	rtl_set_def_aspm_entry_latency(tp);
+@@ -3924,6 +3931,7 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
+ 		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
++		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ 		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
+ 		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
+ 	};
+@@ -3941,6 +3949,7 @@ static void rtl_hw_start_8125(struct rtl
+ 	/* disable interrupt coalescing */
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_61:
++	case RTL_GIGA_MAC_VER_64:
+ 		for (i = 0xa00; i < 0xb00; i += 4)
+ 			RTL_W32(tp, i, 0);
+ 		break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1103,6 +1103,15 @@ static void rtl8125b_hw_phy_config(struc
+ 	rtl8125b_config_eee_phy(phydev);
+ }
+ 
++static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
++				   struct phy_device *phydev)
++{
++	r8169_apply_firmware(tp);
++	rtl8125_legacy_force_mode(phydev);
++	rtl8168g_disable_aldps(phydev);
++	rtl8125b_config_eee_phy(phydev);
++}
++
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+ 				   struct phy_device *phydev)
+ {
+@@ -1159,6 +1168,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
++		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
+ 	};
diff --git a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
new file mode 100644
index 0000000000..721e51ebf0
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
@@ -0,0 +1,30 @@
+From b8bd8c44a266c9a7dcb907eab10fbb119e3f6494 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 24 Oct 2024 22:48:59 +0200
+Subject: [PATCH] r8169: fix inconsistent indenting in
+ rtl8169_get_eth_mac_stats
+
+This fixes an inconsistent indenting introduced with e3fc5139bd8f
+("r8169: implement additional ethtool stats ops").
+
+Reported-by: kernel test robot <lkp at intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202410220413.1gAxIJ4t-lkp at intel.com/
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/20fd6f39-3c1b-4af0-9adc-7d1f49728fad at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2227,7 +2227,7 @@ static void rtl8169_get_eth_mac_stats(st
+ 		le64_to_cpu(tp->counters->tx_broadcast64);
+ 	mac_stats->MulticastFramesReceivedOK =
+ 		le64_to_cpu(tp->counters->rx_multicast64);
+-	 mac_stats->FrameTooLongErrors =
++	mac_stats->FrameTooLongErrors =
+ 		le32_to_cpu(tp->counters->rx_frame_too_long);
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch b/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch
new file mode 100644
index 0000000000..de2be0165c
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch
@@ -0,0 +1,49 @@
+From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:42:52 +0100
+Subject: [PATCH] r8169: align RTL8125 EEE config with vendor driver
+
+Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125.
+This should help to avoid compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/044c925e-8669-4b98-87df-95b4056f4f5f at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ .../net/ethernet/realtek/r8169_phy_config.c    | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(stru
+ 	phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
+ }
+ 
+-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++static void rtl8125_common_config_eee_phy(struct phy_device *phydev)
+ {
+-	rtl8168h_config_eee_phy(phydev);
++	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
++	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++}
+ 
++static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++{
++	rtl8168g_config_eee_phy(phydev);
++	/* disable EEE at 2.5Gbps */
+ 	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+-	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+-	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+-	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+-	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++	rtl8168g_config_eee_phy(phydev);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
diff --git a/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch b/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch
new file mode 100644
index 0000000000..a546c426b4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch
@@ -0,0 +1,46 @@
+From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:43:45 +0100
+Subject: [PATCH] r8169: align RTL8125/RTL8126 PHY config with vendor driver
+
+This aligns some parameters with vendor driver r8125/r8126 to avoid
+compatibility issues. Note that for RTL8125B there's no functional
+change, just the open-coded version of the function is replaced.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/a8a9d896-fbe6-41f2-bf87-666567d3cdb3 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
+ 
+-	phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
+ 	phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
+ 	phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
+ 
+@@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
+ 	rtl8125b_config_eee_phy(phydev);
+@@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
++	rtl8125_legacy_force_mode(phydev);
++	rtl8168g_disable_aldps(phydev);
+ }
+ 
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
diff --git a/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch b/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch
new file mode 100644
index 0000000000..36c8041c94
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch
@@ -0,0 +1,25 @@
+From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:44:36 +0100
+Subject: [PATCH] r8169: align RTL8126 EEE config with vendor driver
+
+Align the EEE config for RTL8126A with vendor driver r8126 to avoid
+compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/71e4859e-4cd0-4b6b-b7fa-621d7721992f at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struc
+ 	rtl8168g_enable_gphy_10m(phydev);
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
diff --git a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
new file mode 100644
index 0000000000..8cb79c82cf
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
@@ -0,0 +1,38 @@
+From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 2 Nov 2024 14:49:01 +0100
+Subject: [PATCH] r8169: improve initialization of RSS registers on
+ RTL8125/RTL8126
+
+Replace the register addresses with the names used in r8125/r8126
+vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/3bf2f340-b369-4174-97bf-fd38d4217492 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -347,6 +347,8 @@ enum rtl8125_registers {
+ 	TxPoll_8125		= 0x90,
+ 	LEDSEL3			= 0x96,
+ 	MAC0_BKP		= 0x19e0,
++	RSS_CTRL_8125		= 0x4500,
++	Q_NUM_CTRL_8125		= 0x4800,
+ 	EEE_TXIDLE_TIMER_8125	= 0x6048,
+ };
+ 
+@@ -3770,8 +3772,8 @@ static void rtl_hw_start_8125_common(str
+ 	rtl_pcie_state_l2l3_disable(tp);
+ 
+ 	RTL_W16(tp, 0x382, 0x221b);
+-	RTL_W8(tp, 0x4500, 0);
+-	RTL_W16(tp, 0x4800, 0);
++	RTL_W32(tp, RSS_CTRL_8125, 0);
++	RTL_W16(tp, Q_NUM_CTRL_8125, 0);
+ 
+ 	/* disable UPS */
+ 	r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);
diff --git a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
new file mode 100644
index 0000000000..20c42955e3
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
@@ -0,0 +1,113 @@
+From 83cb4b470c66b37b19a347a35cea01e0cbdd258d Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 4 Nov 2024 23:16:20 +0100
+Subject: [PATCH] r8169: remove leftover locks after reverted change
+
+After e31a9fedc7d8 ("Revert "r8169: disable ASPM during NAPI poll"")
+these locks aren't needed any longer.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/680f2606-ac7d-4ced-8694-e5033855da9b at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 29 ++---------------------
+ 1 file changed, 2 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -663,13 +663,9 @@ struct rtl8169_private {
+ 		struct work_struct work;
+ 	} wk;
+ 
+-	raw_spinlock_t config25_lock;
+ 	raw_spinlock_t mac_ocp_lock;
+ 	struct mutex led_lock;	/* serialize LED ctrl RMW access */
+ 
+-	raw_spinlock_t cfg9346_usage_lock;
+-	int cfg9346_usage_count;
+-
+ 	unsigned supports_gmii:1;
+ 	unsigned aspm_manageable:1;
+ 	unsigned dash_enabled:1;
+@@ -723,22 +719,12 @@ static inline struct device *tp_to_dev(s
+ 
+ static void rtl_lock_config_regs(struct rtl8169_private *tp)
+ {
+-	unsigned long flags;
+-
+-	raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+-	if (!--tp->cfg9346_usage_count)
+-		RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+-	raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++	RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+ }
+ 
+ static void rtl_unlock_config_regs(struct rtl8169_private *tp)
+ {
+-	unsigned long flags;
+-
+-	raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+-	if (!tp->cfg9346_usage_count++)
+-		RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+-	raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++	RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+ }
+ 
+ static void rtl_pci_commit(struct rtl8169_private *tp)
+@@ -749,24 +735,18 @@ static void rtl_pci_commit(struct rtl816
+ 
+ static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+-	unsigned long flags;
+ 	u8 val;
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	val = RTL_R8(tp, Config2);
+ 	RTL_W8(tp, Config2, (val & ~clear) | set);
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+ 
+ static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+-	unsigned long flags;
+ 	u8 val;
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	val = RTL_R8(tp, Config5);
+ 	RTL_W8(tp, Config5, (val & ~clear) | set);
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+ 
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+@@ -1572,7 +1552,6 @@ static void __rtl8169_set_wol(struct rtl
+ 		{ WAKE_MAGIC, Config3, MagicPacket }
+ 	};
+ 	unsigned int i, tmp = ARRAY_SIZE(cfg);
+-	unsigned long flags;
+ 	u8 options;
+ 
+ 	rtl_unlock_config_regs(tp);
+@@ -1591,14 +1570,12 @@ static void __rtl8169_set_wol(struct rtl
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
+ 	}
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	for (i = 0; i < tmp; i++) {
+ 		options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+ 		if (wolopts & cfg[i].opt)
+ 			options |= cfg[i].mask;
+ 		RTL_W8(tp, cfg[i].reg, options);
+ 	}
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ 
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+@@ -5498,8 +5475,6 @@ static int rtl_init_one(struct pci_dev *
+ 	tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
+ 	tp->ocp_base = OCP_STD_PHY_BASE;
+ 
+-	raw_spin_lock_init(&tp->cfg9346_usage_lock);
+-	raw_spin_lock_init(&tp->config25_lock);
+ 	raw_spin_lock_init(&tp->mac_ocp_lock);
+ 	mutex_init(&tp->led_lock);
+ 
diff --git a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
new file mode 100644
index 0000000000..8c88c078f2
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
@@ -0,0 +1,108 @@
+From c507e96b5763b36b63ad50ad804341f72ea000e4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:55:45 +0100
+Subject: [PATCH] r8169: improve __rtl8169_set_wol
+
+Add helper r8169_mod_reg8_cond() what allows to significantly simplify
+__rtl8169_set_wol().
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/697b197a-8eac-40c6-8847-27093cacec36 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 55 ++++++++++-------------
+ 1 file changed, 24 insertions(+), 31 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -749,6 +749,20 @@ static void rtl_mod_config5(struct rtl81
+ 	RTL_W8(tp, Config5, (val & ~clear) | set);
+ }
+ 
++static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,
++				u8 bits, bool cond)
++{
++	u8 val, old_val;
++
++	old_val = RTL_R8(tp, reg);
++	if (cond)
++		val = old_val | bits;
++	else
++		val = old_val & ~bits;
++	if (val != old_val)
++		RTL_W8(tp, reg, val);
++}
++
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+ {
+ 	return tp->mac_version >= RTL_GIGA_MAC_VER_61;
+@@ -1539,58 +1553,37 @@ static void rtl8169_get_wol(struct net_d
+ 
+ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
+ {
+-	static const struct {
+-		u32 opt;
+-		u16 reg;
+-		u8  mask;
+-	} cfg[] = {
+-		{ WAKE_PHY,   Config3, LinkUp },
+-		{ WAKE_UCAST, Config5, UWF },
+-		{ WAKE_BCAST, Config5, BWF },
+-		{ WAKE_MCAST, Config5, MWF },
+-		{ WAKE_ANY,   Config5, LanWake },
+-		{ WAKE_MAGIC, Config3, MagicPacket }
+-	};
+-	unsigned int i, tmp = ARRAY_SIZE(cfg);
+-	u8 options;
+-
+ 	rtl_unlock_config_regs(tp);
+ 
+ 	if (rtl_is_8168evl_up(tp)) {
+-		tmp--;
+ 		if (wolopts & WAKE_MAGIC)
+ 			rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);
+ 		else
+ 			rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);
+ 	} else if (rtl_is_8125(tp)) {
+-		tmp--;
+ 		if (wolopts & WAKE_MAGIC)
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));
+ 		else
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
++	} else {
++		r8169_mod_reg8_cond(tp, Config3, MagicPacket,
++				    wolopts & WAKE_MAGIC);
+ 	}
+ 
+-	for (i = 0; i < tmp; i++) {
+-		options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+-		if (wolopts & cfg[i].opt)
+-			options |= cfg[i].mask;
+-		RTL_W8(tp, cfg[i].reg, options);
+-	}
++	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++	r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
++	r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
++	r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
++	r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);
+ 
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+-		options = RTL_R8(tp, Config1) & ~PMEnable;
+-		if (wolopts)
+-			options |= PMEnable;
+-		RTL_W8(tp, Config1, options);
++		r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_34:
+ 	case RTL_GIGA_MAC_VER_37:
+ 	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+-		if (wolopts)
+-			rtl_mod_config2(tp, 0, PME_SIGNAL);
+-		else
+-			rtl_mod_config2(tp, PME_SIGNAL, 0);
++		r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
+ 		break;
+ 	default:
+ 		break;
diff --git a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
new file mode 100644
index 0000000000..e762617310
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
@@ -0,0 +1,44 @@
+From 330dc2297c82953dff402e0b4176a5383a618538 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:56:28 +0100
+Subject: [PATCH] r8169: improve rtl_set_d3_pll_down
+
+Make use of new helper r8169_mod_reg8_cond() and move from a switch()
+to an if() clause. Benefit is that we don't have to touch this piece of
+code each time support for a new chip version is added.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/e1ccdb85-a4ed-4800-89c2-89770ff06452 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 18 +++++-------------
+ 1 file changed, 5 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1432,19 +1432,11 @@ static enum rtl_dash_type rtl_get_dash_t
+ 
+ static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
+ {
+-	switch (tp->mac_version) {
+-	case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
+-	case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
+-	case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
+-	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+-		if (enable)
+-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
+-		else
+-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);
+-		break;
+-	default:
+-		break;
+-	}
++	if (tp->mac_version >= RTL_GIGA_MAC_VER_25 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_28 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_31 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_38)
++		r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, !enable);
+ }
+ 
+ static void rtl_reset_packet_filter(struct rtl8169_private *tp)
diff --git a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
new file mode 100644
index 0000000000..de86c2f6cd
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
@@ -0,0 +1,29 @@
+From e3e9e9039fa6ae885c7d5c954d7b9f105fa23e8f Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:57:08 +0100
+Subject: [PATCH] r8169: align WAKE_PHY handling with r8125/r8126 vendor
+ drivers
+
+Vendor drivers r8125/r8126 apply this additional magic setting when
+enabling WAKE_PHY, so do the same here.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/51130715-45be-4db5-abb7-05d87e1f5df9 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1563,6 +1563,9 @@ static void __rtl8169_set_wol(struct rtl
+ 	}
+ 
+ 	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++	if (rtl_is_8125(tp))
++		r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,
++				     wolopts & WAKE_PHY ? 0x13 : 0);
+ 	r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
+ 	r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
+ 	r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
diff --git a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
new file mode 100644
index 0000000000..5bcf06098a
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
@@ -0,0 +1,117 @@
+From 7a3bcd39ae1f0e3ab896d9df62339ab4297a0bfd Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 9 Nov 2024 23:12:12 +0100
+Subject: [PATCH] r8169: use helper r8169_mod_reg8_cond to simplify
+ rtl_jumbo_config
+
+Use recently added helper r8169_mod_reg8_cond() to simplify jumbo
+mode configuration.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/3df1d484-a02e-46e7-8f75-db5b428e422e at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 77 ++++-------------------
+ 1 file changed, 11 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2547,86 +2547,31 @@ static void rtl8169_init_ring_indexes(st
+ 	tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
+ }
+ 
+-static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+-}
+-
+-static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+-}
+-
+-static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-}
+-
+-static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-}
+-
+-static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, MaxTxPacketSize, 0x24);
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
+-}
+-
+-static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, MaxTxPacketSize, 0x3f);
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
+-}
+-
+-static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
+-}
+-
+-static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
+-}
+-
+ static void rtl_jumbo_config(struct rtl8169_private *tp)
+ {
+ 	bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
+ 	int readrq = 4096;
+ 
++	if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 &&
++	    tp->mac_version <= RTL_GIGA_MAC_VER_26)
++		readrq = 512;
++
+ 	rtl_unlock_config_regs(tp);
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_17:
+-		if (jumbo) {
+-			readrq = 512;
+-			r8168b_1_hw_jumbo_enable(tp);
+-		} else {
+-			r8168b_1_hw_jumbo_disable(tp);
+-		}
++		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
+-		if (jumbo) {
+-			readrq = 512;
+-			r8168c_hw_jumbo_enable(tp);
+-		} else {
+-			r8168c_hw_jumbo_disable(tp);
+-		}
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++		r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_28:
+-		if (jumbo)
+-			r8168dp_hw_jumbo_enable(tp);
+-		else
+-			r8168dp_hw_jumbo_disable(tp);
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
+-		if (jumbo)
+-			r8168e_hw_jumbo_enable(tp);
+-		else
+-			r8168e_hw_jumbo_disable(tp);
++		RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ 		break;
+ 	default:
+ 		break;



From lede-commits at lists.infradead.org  Fri Jan  3 15:54:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 03 Jan 2025 18:54:51 -0500
Subject: [openwrt/openwrt]  rockchip: refresh patch
In-Reply-To: <173594849117.1867954.1251895483887274006@git-01.infra.openwrt.org>
References: <173594849117.1867954.1251895483887274006@git-01.infra.openwrt.org>
Message-ID: <mailman.30901.1735948495.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/484f670ed3d41e44375bfa7f8892e660d3c8c26a

commit 484f670ed3d41e44375bfa7f8892e660d3c8c26a
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Sat Jan 4 00:46:00 2025 +0100

    rockchip: refresh patch
    
    Commit 8a477bafb4637e3499f69f569133039ce060559e backported an upstream patch
    without refreshing the patches.
    
    Fixes: 8a477bafb463 ("rockchip: fix phy reset on rk356x")
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17474
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch         | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
index 130bf6723c..6ba8002c75 100644
--- a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
+++ b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-@@ -257,6 +257,13 @@
+@@ -258,6 +258,13 @@
  	};
  };
  



From lede-commits at lists.infradead.org  Sat Jan  4 00:11:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 03:11:27 -0500
Subject: [openwrt/openwrt]  rockchip: refresh patch
In-Reply-To: <173597828747.2587686.468584857435950844@git-01.infra.openwrt.org>
References: <173597828747.2587686.468584857435950844@git-01.infra.openwrt.org>
Message-ID: <mailman.30962.1735978291.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/111c62a06ab550c47b5d3fe759687ae4f7f1a580

commit 111c62a06ab550c47b5d3fe759687ae4f7f1a580
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Sat Jan 4 00:46:00 2025 +0100

    rockchip: refresh patch
    
    Commit 8a477bafb4637e3499f69f569133039ce060559e backported an upstream patch
    without refreshing the patches.
    
    Fixes: 8a477bafb463 ("rockchip: fix phy reset on rk356x")
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17474
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 484f670ed3d41e44375bfa7f8892e660d3c8c26a)
---
 .../301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch         | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
index 130bf6723c..6ba8002c75 100644
--- a/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
+++ b/target/linux/rockchip/patches-6.6/301-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK3568.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
-@@ -257,6 +257,13 @@
+@@ -258,6 +258,13 @@
  	};
  };
  



From lede-commits at lists.infradead.org  Sat Jan  4 00:15:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 03:15:38 -0500
Subject: [openwrt/openwrt]  generic: 6.6: backport upstream Realtek PHY
 patches
In-Reply-To: <173597853887.2593547.13386559288062792828@git-01.infra.openwrt.org>
References: <173597853887.2593547.13386559288062792828@git-01.infra.openwrt.org>
Message-ID: <mailman.30963.1735978542.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/56b19f0d5095fd69739805620a3da64569620277

commit 56b19f0d5095fd69739805620a3da64569620277
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Mon Dec 30 01:01:33 2024 +0100

    generic: 6.6: backport upstream Realtek PHY patches
    
    8989bad54113 net: phy: realtek: add RTL8125D-internal PHY
    f87a17ed3b51 net: phy: realtek: merge the drivers for internal NBase-T PHY's
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit fedb1f86b50986a962c899d7406566d991e030ee)
---
 ...ltek-merge-the-drivers-for-internal-NBase.patch | 136 +++++++++++++++++++++
 ...net-phy-realtek-add-RTL8125D-internal-PHY.patch |  29 +++++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch |  18 +--
 ...ek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch |   4 +-
 ...ltek-make-sure-paged-read-is-protected-by.patch |   2 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch |  14 +--
 ...-realtek-detect-early-version-of-RTL8221B.patch |   4 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  10 +-
 8 files changed, 191 insertions(+), 26 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch b/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch
new file mode 100644
index 0000000000..771f60df91
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-18-v6.13-net-phy-realtek-merge-the-drivers-for-internal-NBase.patch
@@ -0,0 +1,136 @@
+From f87a17ed3b51fba4dfdd8f8b643b5423a85fc551 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Tue, 15 Oct 2024 07:47:14 +0200
+Subject: [PATCH] net: phy: realtek: merge the drivers for internal NBase-T
+ PHY's
+
+The Realtek RTL8125/RTL8126 NBase-T MAC/PHY chips have internal PHY's
+which are register-compatible, at least for the registers we use here.
+So let's use just one PHY driver to support all of them.
+These internal PHY's exist also as external C45 PHY's, but on the
+internal PHY's no access to MMD registers is possible. This can be
+used to differentiate between the internal and external version.
+
+As a side effect the drivers for two now external-only drivers don't
+require read_mmd/write_mmd hooks any longer.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/c57081a6-811f-4571-ab35-34f4ca6de9af at gmail.com
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/phy/realtek.c | 53 +++++++++++++++++++++++++++++++--------
+ 1 file changed, 43 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -95,6 +95,7 @@
+ 
+ #define RTL_GENERIC_PHYID			0x001cc800
+ #define RTL_8211FVD_PHYID			0x001cc878
++#define RTL_8221B				0x001cc840
+ #define RTL_8221B_VB_CG				0x001cc849
+ #define RTL_8221B_VN_CG				0x001cc84a
+ #define RTL_8251B				0x001cc862
+@@ -1077,6 +1078,23 @@ static bool rtlgen_supports_2_5gbps(stru
+ 	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
+ }
+ 
++/* On internal PHY's MMD reads over C22 always return 0.
++ * Check a MMD register which is known to be non-zero.
++ */
++static bool rtlgen_supports_mmd(struct phy_device *phydev)
++{
++	int val;
++
++	phy_lock_mdio_bus(phydev);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
++	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
++	val = __phy_read(phydev, MII_MMD_DATA);
++	phy_unlock_mdio_bus(phydev);
++
++	return val > 0;
++}
++
+ static int rtlgen_match_phy_device(struct phy_device *phydev)
+ {
+ 	return phydev->phy_id == RTL_GENERIC_PHYID &&
+@@ -1086,7 +1104,8 @@ static int rtlgen_match_phy_device(struc
+ static int rtl8226_match_phy_device(struct phy_device *phydev)
+ {
+ 	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       rtlgen_supports_2_5gbps(phydev);
++	       rtlgen_supports_2_5gbps(phydev) &&
++	       rtlgen_supports_mmd(phydev);
+ }
+ 
+ static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+@@ -1098,6 +1117,11 @@ static int rtlgen_is_c45_match(struct ph
+ 		return !is_c45 && (id == phydev->phy_id);
+ }
+ 
++static int rtl8221b_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
++}
++
+ static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+ {
+ 	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
+@@ -1118,9 +1142,21 @@ static int rtl8221b_vn_cg_c45_match_phy_
+ 	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+ }
+ 
+-static int rtl8251b_c22_match_phy_device(struct phy_device *phydev)
++static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
+ {
+-	return rtlgen_is_c45_match(phydev, RTL_8251B, false);
++	if (phydev->is_c45)
++		return false;
++
++	switch (phydev->phy_id) {
++	case RTL_GENERIC_PHYID:
++	case RTL_8221B:
++	case RTL_8251B:
++		break;
++	default:
++		return false;
++	}
++
++	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
+ }
+ 
+ static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
+@@ -1382,10 +1418,8 @@ static struct phy_driver realtek_drvs[]
+ 		.resume		= rtlgen_resume,
+ 		.read_page	= rtl821x_read_page,
+ 		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+ 	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc840),
++		.match_phy_device = rtl8221b_match_phy_device,
+ 		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
+ 		.get_features	= rtl822x_get_features,
+ 		.config_aneg	= rtl822x_config_aneg,
+@@ -1396,8 +1430,6 @@ static struct phy_driver realtek_drvs[]
+ 		.resume		= rtlgen_resume,
+ 		.read_page	= rtl821x_read_page,
+ 		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+ 	}, {
+ 		PHY_ID_MATCH_EXACT(0x001cc838),
+ 		.name           = "RTL8226-CG 2.5Gbps PHY",
+@@ -1475,8 +1507,9 @@ static struct phy_driver realtek_drvs[]
+ 		.read_page      = rtl821x_read_page,
+ 		.write_page     = rtl821x_write_page,
+ 	}, {
+-		.match_phy_device = rtl8251b_c22_match_phy_device,
+-		.name           = "RTL8126A-internal 5Gbps PHY",
++		.match_phy_device = rtl_internal_nbaset_match_phy_device,
++		.name           = "Realtek Internal NBASE-T PHY",
++		.flags		= PHY_IS_INTERNAL,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch b/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch
new file mode 100644
index 0000000000..4b9b9e8d48
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-19-v6.13-net-phy-realtek-add-RTL8125D-internal-PHY.patch
@@ -0,0 +1,29 @@
+From 8989bad541133c43550bff2b80edbe37b8fb9659 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 17 Oct 2024 18:01:13 +0200
+Subject: [PATCH] net: phy: realtek: add RTL8125D-internal PHY
+
+The first boards show up with Realtek's RTL8125D. This MAC/PHY chip
+comes with an integrated 2.5Gbps PHY with ID 0x001cc841. It's not
+clear yet whether there's an external version of this PHY and how
+Realtek calls it, therefore use the numeric id for now.
+
+Link: https://lore.kernel.org/netdev/2ada65e1-5dfa-456c-9334-2bc51272e9da at gmail.com/T/
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Message-ID: <7d2924de-053b-44d2-a479-870dc3878170 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/phy/realtek.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1151,6 +1151,7 @@ static int rtl_internal_nbaset_match_phy
+ 	case RTL_GENERIC_PHYID:
+ 	case RTL_8221B:
+ 	case RTL_8251B:
++	case 0x001cc841:
+ 		break;
+ 	default:
+ 		return false;
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 2b77b6e02f..8de57707a2 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1375,6 +1375,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1412,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,15 +23,15 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1387,6 +1388,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1422,6 +1423,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc840),
+ 		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
 +		.soft_reset     = genphy_soft_reset,
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1401,6 +1403,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1434,6 +1436,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1411,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1444,6 +1447,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1423,6 +1427,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1456,6 +1460,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1435,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1468,6 +1473,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1445,6 +1451,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1478,6 +1484,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1457,6 +1464,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1490,6 +1497,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
index cbef74d317..7e48c16515 100644
--- a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
@@ -20,7 +20,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -814,8 +814,8 @@ static int rtl822x_write_mmd(struct phy_
+@@ -815,8 +815,8 @@ static int rtl822x_write_mmd(struct phy_
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
@@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
  			    phydev->host_interfaces) ||
-@@ -865,7 +865,29 @@ static int rtl822xb_config_init(struct p
+@@ -866,7 +866,29 @@ static int rtl822xb_config_init(struct p
  	if (ret < 0)
  		return ret;
  
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 216fa918e1..722ec02cdc 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1092,9 +1092,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1093,9 +1093,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 08c13f34e4..1b9cdada6d 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1152,6 +1156,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1189,6 +1193,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
@@ -50,7 +50,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1427,6 +1450,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1460,6 +1483,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -58,7 +58,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1438,6 +1462,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1471,6 +1495,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -66,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1451,6 +1476,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1484,6 +1509,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1464,6 +1490,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1497,6 +1523,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1475,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1508,6 +1535,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -90,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1488,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1521,6 +1549,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 6938552d14..63ffd0a0c9 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1120,10 +1120,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1139,10 +1139,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
@@ -49,4 +49,4 @@ Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 +	}
  }
  
- static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+ static int rtl8221b_match_phy_device(struct phy_device *phydev)
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index a796b8f011..c9e15fb463 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek.c
 +++ b/drivers/net/phy/realtek.c
-@@ -1332,6 +1332,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1369,6 +1369,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1498,6 +1543,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1531,6 +1576,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1512,6 +1559,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1545,6 +1592,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1524,6 +1573,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1557,6 +1606,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1538,6 +1589,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1571,6 +1622,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",



From lede-commits at lists.infradead.org  Sat Jan  4 00:15:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 03:15:39 -0500
Subject: [openwrt/openwrt]  generic: 6.6: backport upstream r8169 patches
In-Reply-To: <173597853887.2593547.13386559288062792828@git-01.infra.openwrt.org>
References: <173597853887.2593547.13386559288062792828@git-01.infra.openwrt.org>
Message-ID: <mailman.30966.1735978544.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/56b2d856a245fbfc64496c50cc66c0205888ea5f

commit 56b2d856a245fbfc64496c50cc66c0205888ea5f
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Mon Dec 30 01:01:33 2024 +0100

    generic: 6.6: backport upstream r8169 patches
    
    7a3bcd39ae1f r8169: use helper r8169_mod_reg8_cond to simplify rtl_jumbo_config
    e3e9e9039fa6 r8169: align WAKE_PHY handling with r8125/r8126 vendor drivers
    330dc2297c82 r8169: improve rtl_set_d3_pll_down
    c507e96b5763 r8169: improve __rtl8169_set_wol
    83cb4b470c66 r8169: remove leftover locks after reverted change
    2cd02f2fdd8a r8169: improve initialization of RSS registers on RTL8125/RTL8126
    a3d8520e6a19 r8169: align RTL8126 EEE config with vendor driver
    4af2f60bf737 r8169: align RTL8125/RTL8126 PHY config with vendor driver
    eb90f876b796 r8169: align RTL8125 EEE config with vendor driver
    b8bd8c44a266 r8169: fix inconsistent indenting in rtl8169_get_eth_mac_stats
    f75d1fbe7809 r8169: add support for RTL8125D
    c4e64095c00c r8169: enable EEE at 2.5G per default on RTL8125B
    d64113c6bb5e r8169: remove rtl_dash_loop_wait_high/low
    1c105bacb160 r8169: avoid duplicated messages if loading firmware fails and switch to warn level
    ac48430368c1 r8169: don't take RTNL lock in rtl_task()
    e3fc5139bd8f r8169: implement additional ethtool stats ops
    b8bf38440ba9 r8169: enable SG/TSO on selected chip versions per default
    854d71c555df r8169: remove original workaround for RTL8125 broken rx issue
    1ffcc8d41306 r8169: add support for the temperature sensor being available from RTL8125B
    
    The following patches require backporting additional linux patches:
    e2015942e90a r8169: replace custom flag with disable_work() et al
    e340bff27e63 r8169: copy vendor driver 2.5G/5G EEE advertisement constraints
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 0eeba04a16fb72b13d90973ef8ba95f0549f973e)
---
 package/kernel/linux/modules/netdevices.mk         |   2 +-
 ...upport-for-the-temperature-sensor-being-a.patch |  83 ++++++++++++
 ...e-original-workaround-for-RTL8125-broken-.patch |  33 +++++
 ...e-SG-TSO-on-selected-chip-versions-per-de.patch |  52 ++++++++
 ...69-implement-additional-ethtool-stats-ops.patch | 130 +++++++++++++++++++
 ...13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch |  50 +++++++
 ...-duplicated-messages-if-loading-firmware-.patch |  41 ++++++
 ...-r8169-remove-rtl_dash_loop_wait_high-low.patch |  82 ++++++++++++
 ...nable-EEE-at-2.5G-per-default-on-RTL8125B.patch |  28 ++++
 ...0-33-v6.13-r8169-add-support-for-RTL8125D.patch | 143 +++++++++++++++++++++
 ...nconsistent-indenting-in-rtl8169_get_eth_.patch |  30 +++++
 ...ign-RTL8125-EEE-config-with-vendor-driver.patch |  49 +++++++
 ...-RTL8125-RTL8126-PHY-config-with-vendor-d.patch |  46 +++++++
 ...ign-RTL8126-EEE-config-with-vendor-driver.patch |  25 ++++
 ...ve-initialization-of-RSS-registers-on-RTL.patch |  38 ++++++
 ...move-leftover-locks-after-reverted-change.patch | 113 ++++++++++++++++
 ...-40-v6.13-r8169-improve-__rtl8169_set_wol.patch | 108 ++++++++++++++++
 ...1-v6.13-r8169-improve-rtl_set_d3_pll_down.patch |  44 +++++++
 ...-WAKE_PHY-handling-with-r8125-r8126-vendo.patch |  29 +++++
 ...elper-r8169_mod_reg8_cond-to-simplify-rtl.patch | 117 +++++++++++++++++
 20 files changed, 1242 insertions(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index cd24fb3ecb..ee9654761b 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -953,7 +953,7 @@ $(eval $(call KernelPackage,8139cp))
 define KernelPackage/r8169
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres
+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres +kmod-hwmon-core
   KCONFIG:= \
     CONFIG_R8169 \
     CONFIG_R8169_LEDS=y
diff --git a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
new file mode 100644
index 0000000000..2403da5d55
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
@@ -0,0 +1,83 @@
+From 1ffcc8d41306fd2e5f140b276820714a26a11cc4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 7 Oct 2024 20:34:12 +0200
+Subject: [PATCH] r8169: add support for the temperature sensor being available
+ from RTL8125B
+
+This adds support for the temperature sensor being available from
+RTL8125B. Register information was taken from r8125 vendor driver.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 44 +++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -16,6 +16,7 @@
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/ethtool.h>
++#include <linux/hwmon.h>
+ #include <linux/phy.h>
+ #include <linux/if_vlan.h>
+ #include <linux/in.h>
+@@ -5373,6 +5374,43 @@ static bool rtl_aspm_is_safe(struct rtl8
+ 	return false;
+ }
+ 
++static umode_t r8169_hwmon_is_visible(const void *drvdata,
++				      enum hwmon_sensor_types type,
++				      u32 attr, int channel)
++{
++	return 0444;
++}
++
++static int r8169_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
++			    u32 attr, int channel, long *val)
++{
++	struct rtl8169_private *tp = dev_get_drvdata(dev);
++	int val_raw;
++
++	val_raw = phy_read_paged(tp->phydev, 0xbd8, 0x12) & 0x3ff;
++	if (val_raw >= 512)
++		val_raw -= 1024;
++
++	*val = 1000 * val_raw / 2;
++
++	return 0;
++}
++
++static const struct hwmon_ops r8169_hwmon_ops = {
++	.is_visible =  r8169_hwmon_is_visible,
++	.read = r8169_hwmon_read,
++};
++
++static const struct hwmon_channel_info * const r8169_hwmon_info[] = {
++	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
++	NULL
++};
++
++static const struct hwmon_chip_info r8169_hwmon_chip_info = {
++	.ops = &r8169_hwmon_ops,
++	.info = r8169_hwmon_info,
++};
++
+ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
+ {
+ 	struct rtl8169_private *tp;
+@@ -5547,6 +5585,12 @@ static int rtl_init_one(struct pci_dev *
+ 	if (rc)
+ 		return rc;
+ 
++	/* The temperature sensor is available from RTl8125B */
++	if (IS_REACHABLE(CONFIG_HWMON) && tp->mac_version >= RTL_GIGA_MAC_VER_63)
++		/* ignore errors */
++		devm_hwmon_device_register_with_info(&pdev->dev, "nic_temp", tp,
++						     &r8169_hwmon_chip_info,
++						     NULL);
+ 	rc = register_netdev(dev);
+ 	if (rc)
+ 		return rc;
diff --git a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
new file mode 100644
index 0000000000..8c6e6d8dc4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
@@ -0,0 +1,33 @@
+From 854d71c555dfc3383c1fde7d9989b6046e21093d Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 9 Oct 2024 07:48:05 +0200
+Subject: [PATCH] r8169: remove original workaround for RTL8125 broken rx issue
+
+Now that we have b9c7ac4fe22c ("r8169: disable ALDPS per default for
+RTL8125"), the first attempt to fix the issue shouldn't be needed
+any longer. So let's effectively revert 621735f59064 ("r8169: fix
+rare issue with broken rx after link-down on RTL8125") and see
+whether anybody complains.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/382d8c88-cbce-400f-ad62-fda0181c7e38 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4779,11 +4779,7 @@ static void r8169_phylink_handler(struct
+ 	if (netif_carrier_ok(ndev)) {
+ 		rtl_link_chg_patch(tp);
+ 		pm_request_resume(d);
+-		netif_wake_queue(tp->dev);
+ 	} else {
+-		/* In few cases rx is broken after link-down otherwise */
+-		if (rtl_is_8125(tp))
+-			rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
+ 		pm_runtime_idle(d);
+ 	}
+ 
diff --git a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
new file mode 100644
index 0000000000..dc05299628
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
@@ -0,0 +1,52 @@
+From b8bf38440ba94e8ed8e2ae55c5dfb0276d30e843 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 10 Oct 2024 12:58:02 +0200
+Subject: [PATCH] r8169: enable SG/TSO on selected chip versions per default
+
+Due to problem reports in the past SG and TSO/TSO6 are disabled per
+default. It's not fully clear which chip versions are affected, so we
+may impact also users of unaffected chip versions, unless they know
+how to use ethtool for enabling SG/TSO/TSO6.
+Vendor drivers r8168/r8125 enable SG/TSO/TSO6 for selected chip
+versions per default, I'd interpret this as confirmation that these
+chip versions are unaffected. So let's do the same here.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5529,11 +5529,6 @@ static int rtl_init_one(struct pci_dev *
+ 
+ 	dev->features |= dev->hw_features;
+ 
+-	/* There has been a number of reports that using SG/TSO results in
+-	 * tx timeouts. However for a lot of people SG/TSO works fine.
+-	 * Therefore disable both features by default, but allow users to
+-	 * enable them. Use at own risk!
+-	 */
+ 	if (rtl_chip_supports_csum_v2(tp)) {
+ 		dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
+ 		netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
+@@ -5544,6 +5539,17 @@ static int rtl_init_one(struct pci_dev *
+ 		netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
+ 	}
+ 
++	/* There has been a number of reports that using SG/TSO results in
++	 * tx timeouts. However for a lot of people SG/TSO works fine.
++	 * It's not fully clear which chip versions are affected. Vendor
++	 * drivers enable SG/TSO for certain chip versions per default,
++	 * let's mimic this here. On other chip versions users can
++	 * use ethtool to enable SG/TSO, use at own risk!
++	 */
++	if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_61)
++		dev->features |= dev->hw_features;
++
+ 	dev->hw_features |= NETIF_F_RXALL;
+ 	dev->hw_features |= NETIF_F_RXFCS;
+ 
diff --git a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
new file mode 100644
index 0000000000..faab0df7f4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
@@ -0,0 +1,130 @@
+From e3fc5139bd8ffaa1498adc21be4e8ecbc6aed508 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sun, 13 Oct 2024 11:17:39 +0200
+Subject: [PATCH] r8169: implement additional ethtool stats ops
+
+This adds support for ethtool standard statistics, and makes use of the
+extended hardware statistics being available from RTl8125.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/58e0da73-a7dd-4be3-82ae-d5b3f9069bde at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 82 +++++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2162,6 +2162,19 @@ static void rtl8169_get_ringparam(struct
+ 	data->tx_pending = NUM_TX_DESC;
+ }
+ 
++static void rtl8169_get_pause_stats(struct net_device *dev,
++				    struct ethtool_pause_stats *pause_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	rtl8169_update_counters(tp);
++	pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on);
++	pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on);
++}
++
+ static void rtl8169_get_pauseparam(struct net_device *dev,
+ 				   struct ethtool_pauseparam *data)
+ {
+@@ -2188,6 +2201,69 @@ static int rtl8169_set_pauseparam(struct
+ 	return 0;
+ }
+ 
++static void rtl8169_get_eth_mac_stats(struct net_device *dev,
++				      struct ethtool_eth_mac_stats *mac_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	rtl8169_update_counters(tp);
++
++	mac_stats->FramesTransmittedOK =
++		le64_to_cpu(tp->counters->tx_packets);
++	mac_stats->SingleCollisionFrames =
++		le32_to_cpu(tp->counters->tx_one_collision);
++	mac_stats->MultipleCollisionFrames =
++		le32_to_cpu(tp->counters->tx_multi_collision);
++	mac_stats->FramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_packets);
++	mac_stats->AlignmentErrors =
++		le16_to_cpu(tp->counters->align_errors);
++	mac_stats->FramesLostDueToIntMACXmitError =
++		le64_to_cpu(tp->counters->tx_errors);
++	mac_stats->BroadcastFramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_broadcast);
++	mac_stats->MulticastFramesReceivedOK =
++		le32_to_cpu(tp->counters->rx_multicast);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	mac_stats->AlignmentErrors =
++		le32_to_cpu(tp->counters->align_errors32);
++	mac_stats->OctetsTransmittedOK =
++		le64_to_cpu(tp->counters->tx_octets);
++	mac_stats->LateCollisions =
++		le32_to_cpu(tp->counters->tx_late_collision);
++	mac_stats->FramesAbortedDueToXSColls =
++		le32_to_cpu(tp->counters->tx_aborted32);
++	mac_stats->OctetsReceivedOK =
++		le64_to_cpu(tp->counters->rx_octets);
++	mac_stats->FramesLostDueToIntMACRcvError =
++		le32_to_cpu(tp->counters->rx_mac_error);
++	mac_stats->MulticastFramesXmittedOK =
++		le64_to_cpu(tp->counters->tx_multicast64);
++	mac_stats->BroadcastFramesXmittedOK =
++		le64_to_cpu(tp->counters->tx_broadcast64);
++	mac_stats->MulticastFramesReceivedOK =
++		le64_to_cpu(tp->counters->rx_multicast64);
++	 mac_stats->FrameTooLongErrors =
++		le32_to_cpu(tp->counters->rx_frame_too_long);
++}
++
++static void rtl8169_get_eth_ctrl_stats(struct net_device *dev,
++				       struct ethtool_eth_ctrl_stats *ctrl_stats)
++{
++	struct rtl8169_private *tp = netdev_priv(dev);
++
++	if (!rtl_is_8125(tp))
++		return;
++
++	rtl8169_update_counters(tp);
++
++	ctrl_stats->UnsupportedOpcodesReceived =
++		le32_to_cpu(tp->counters->rx_unknown_opcode);
++}
++
+ static const struct ethtool_ops rtl8169_ethtool_ops = {
+ 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
+ 				     ETHTOOL_COALESCE_MAX_FRAMES,
+@@ -2209,8 +2285,11 @@ static const struct ethtool_ops rtl8169_
+ 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
+ 	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
+ 	.get_ringparam		= rtl8169_get_ringparam,
++	.get_pause_stats	= rtl8169_get_pause_stats,
+ 	.get_pauseparam		= rtl8169_get_pauseparam,
+ 	.set_pauseparam		= rtl8169_set_pauseparam,
++	.get_eth_mac_stats	= rtl8169_get_eth_mac_stats,
++	.get_eth_ctrl_stats	= rtl8169_get_eth_ctrl_stats,
+ };
+ 
+ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
+@@ -3895,6 +3974,9 @@ static void rtl_hw_start_8125(struct rtl
+ 		break;
+ 	}
+ 
++	/* enable extended tally counter */
++	r8168_mac_ocp_modify(tp, 0xea84, 0, BIT(1) | BIT(0));
++
+ 	rtl_hw_config(tp);
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
new file mode 100644
index 0000000000..38b5035441
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
@@ -0,0 +1,50 @@
+From ac48430368c1a4f4e6c2fa92243b4b93fd25bee4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:05:57 +0200
+Subject: [PATCH] r8169: don't take RTNL lock in rtl_task()
+
+There's not really a benefit here in taking the RTNL lock. The task
+handler does exception handling only, so we're in trouble anyway when
+we come here, and there's no need to protect against e.g. a parallel
+ethtool call.
+A benefit of removing the RTNL lock here is that we now can
+synchronously cancel the workqueue from a context holding the RTNL mutex.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4802,10 +4802,8 @@ static void rtl_task(struct work_struct
+ 		container_of(work, struct rtl8169_private, wk.work);
+ 	int ret;
+ 
+-	rtnl_lock();
+-
+ 	if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
+-		goto out_unlock;
++		return;
+ 
+ 	if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
+ 		/* if chip isn't accessible, reset bus to revive it */
+@@ -4814,7 +4812,7 @@ static void rtl_task(struct work_struct
+ 			if (ret < 0) {
+ 				netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
+ 				netif_device_detach(tp->dev);
+-				goto out_unlock;
++				return;
+ 			}
+ 		}
+ 
+@@ -4833,8 +4831,6 @@ reset:
+ 	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
+ 		rtl_reset_work(tp);
+ 	}
+-out_unlock:
+-	rtnl_unlock();
+ }
+ 
+ static int rtl8169_poll(struct napi_struct *napi, int budget)
diff --git a/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch b/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch
new file mode 100644
index 0000000000..6430d32252
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-30-v6.13-r8169-avoid-duplicated-messages-if-loading-firmware-.patch
@@ -0,0 +1,41 @@
+From 1c105bacb160b5918e917ab811552b7be69fc69c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:29:39 +0200
+Subject: [PATCH] r8169: avoid duplicated messages if loading firmware fails
+ and switch to warn level
+
+In case of a problem with firmware loading we inform at the driver level,
+in addition the firmware load code itself issues warnings. Therefore
+switch to firmware_request_nowarn() to avoid duplicated error messages.
+In addition switch to warn level because the firmware is optional and
+typically just fixes compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <d9c5094c-89a6-40e2-b5fe-8df7df4624ef at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_firmware.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_firmware.c
++++ b/drivers/net/ethernet/realtek/r8169_firmware.c
+@@ -215,7 +215,7 @@ int rtl_fw_request_firmware(struct rtl_f
+ {
+ 	int rc;
+ 
+-	rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
++	rc = firmware_request_nowarn(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
+ 	if (rc < 0)
+ 		goto out;
+ 
+@@ -227,7 +227,7 @@ int rtl_fw_request_firmware(struct rtl_f
+ 
+ 	return 0;
+ out:
+-	dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
+-		rtl_fw->fw_name, rc);
++	dev_warn(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
++		 rtl_fw->fw_name, rc);
+ 	return rc;
+ }
diff --git a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
new file mode 100644
index 0000000000..4792e371b6
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
@@ -0,0 +1,82 @@
+From d64113c6bb5ea5a70b7c9c3a6bcadef307638187 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 16 Oct 2024 22:31:10 +0200
+Subject: [PATCH] r8169: remove rtl_dash_loop_wait_high/low
+
+Remove rtl_dash_loop_wait_high/low to simplify the code.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <fb8c490c-2d92-48f5-8bbf-1fc1f2ee1649 at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++-----------------
+ 1 file changed, 8 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1347,40 +1347,19 @@ static void rtl8168ep_stop_cmac(struct r
+ 	RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
+ }
+ 
+-static void rtl_dash_loop_wait(struct rtl8169_private *tp,
+-			       const struct rtl_cond *c,
+-			       unsigned long usecs, int n, bool high)
+-{
+-	if (!tp->dash_enabled)
+-		return;
+-	rtl_loop_wait(tp, c, usecs, n, high);
+-}
+-
+-static void rtl_dash_loop_wait_high(struct rtl8169_private *tp,
+-				    const struct rtl_cond *c,
+-				    unsigned long d, int n)
+-{
+-	rtl_dash_loop_wait(tp, c, d, n, true);
+-}
+-
+-static void rtl_dash_loop_wait_low(struct rtl8169_private *tp,
+-				   const struct rtl_cond *c,
+-				   unsigned long d, int n)
+-{
+-	rtl_dash_loop_wait(tp, c, d, n, false);
+-}
+-
+ static void rtl8168dp_driver_start(struct rtl8169_private *tp)
+ {
+ 	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_START);
+-	rtl_dash_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168ep_driver_start(struct rtl8169_private *tp)
+ {
+ 	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START);
+ 	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+-	rtl_dash_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
++	if (tp->dash_enabled)
++		rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
+ }
+ 
+ static void rtl8168_driver_start(struct rtl8169_private *tp)
+@@ -1394,7 +1373,8 @@ static void rtl8168_driver_start(struct
+ static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
+ {
+ 	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
+-	rtl_dash_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
+@@ -1402,7 +1382,8 @@ static void rtl8168ep_driver_stop(struct
+ 	rtl8168ep_stop_cmac(tp);
+ 	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
+ 	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+-	rtl_dash_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
++	if (tp->dash_enabled)
++		rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
+ }
+ 
+ static void rtl8168_driver_stop(struct rtl8169_private *tp)
diff --git a/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch b/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch
new file mode 100644
index 0000000000..4ec06cc601
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-32-v6.13-r8169-enable-EEE-at-2.5G-per-default-on-RTL8125B.patch
@@ -0,0 +1,28 @@
+From c4e64095c00cb2de413cd6b90be047c273bcd491 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 17 Oct 2024 22:27:44 +0200
+Subject: [PATCH] r8169: enable EEE at 2.5G per default on RTL8125B
+
+Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line
+disables advertisement of EEE at 2.5G. Latest vendor driver r8125
+doesn't do this (any longer?), so this mode seems to be safe.
+EEE saves quite some energy, therefore enable this mode per default.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <95dd5a0c-09ea-4847-94d9-b7aa3063e8ff at gmail.com>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -99,7 +99,6 @@ static void rtl8125a_config_eee_phy(stru
+ 
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+-	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+ 	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+ 	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+ 	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
diff --git a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
new file mode 100644
index 0000000000..81058e5e9f
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
@@ -0,0 +1,143 @@
+From f75d1fbe7809bc5ed134204b920fd9e2fc5db1df Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 24 Oct 2024 22:42:33 +0200
+Subject: [PATCH] r8169: add support for RTL8125D
+
+This adds support for new chip version RTL8125D, which can be found on
+boards like Gigabyte X870E AORUS ELITE WIFI7. Firmware rtl8125d-1.fw
+for this chip version is available in linux-firmware already.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/d0306912-e88e-4c25-8b5d-545ae8834c0c at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169.h          |  1 +
+ drivers/net/ethernet/realtek/r8169_main.c     | 23 +++++++++++++------
+ .../net/ethernet/realtek/r8169_phy_config.c   | 10 ++++++++
+ 3 files changed, 27 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -68,6 +68,7 @@ enum mac_version {
+ 	/* support for RTL_GIGA_MAC_VER_60 has been removed */
+ 	RTL_GIGA_MAC_VER_61,
+ 	RTL_GIGA_MAC_VER_63,
++	RTL_GIGA_MAC_VER_64,
+ 	RTL_GIGA_MAC_VER_65,
+ 	RTL_GIGA_MAC_VER_66,
+ 	RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -56,6 +56,7 @@
+ #define FIRMWARE_8107E_2	"rtl_nic/rtl8107e-2.fw"
+ #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"
+ #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
++#define FIRMWARE_8125D_1	"rtl_nic/rtl8125d-1.fw"
+ #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
+ 
+@@ -139,6 +140,7 @@ static const struct {
+ 	[RTL_GIGA_MAC_VER_61] = {"RTL8125A",		FIRMWARE_8125A_3},
+ 	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ 	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
++	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},
+ 	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},
+ 	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},
+ };
+@@ -708,6 +710,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+ MODULE_FIRMWARE(FIRMWARE_8107E_2);
+ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
++MODULE_FIRMWARE(FIRMWARE_8125D_1);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+ 
+@@ -2080,10 +2083,7 @@ static void rtl_set_eee_txidle_timer(str
+ 		tp->tx_lpi_timer = timer_val;
+ 		r8168_mac_ocp_write(tp, 0xe048, timer_val);
+ 		break;
+-	case RTL_GIGA_MAC_VER_61:
+-	case RTL_GIGA_MAC_VER_63:
+-	case RTL_GIGA_MAC_VER_65:
+-	case RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ 		tp->tx_lpi_timer = timer_val;
+ 		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
+ 		break;
+@@ -2295,6 +2295,9 @@ static enum mac_version rtl8169_get_mac_
+ 		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },
+ 		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
+ 
++		/* 8125D family. */
++		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },
++
+ 		/* 8125B family. */
+ 		{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63 },
+ 
+@@ -2562,9 +2565,7 @@ static void rtl_init_rxcfg(struct rtl816
+ 	case RTL_GIGA_MAC_VER_61:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
+ 		break;
+-	case RTL_GIGA_MAC_VER_63:
+-	case RTL_GIGA_MAC_VER_65:
+-	case RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
+ 			RX_PAUSE_SLOT_ON);
+ 		break;
+@@ -3876,6 +3877,12 @@ static void rtl_hw_start_8125b(struct rt
+ 	rtl_hw_start_8125_common(tp);
+ }
+ 
++static void rtl_hw_start_8125d(struct rtl8169_private *tp)
++{
++	rtl_set_def_aspm_entry_latency(tp);
++	rtl_hw_start_8125_common(tp);
++}
++
+ static void rtl_hw_start_8126a(struct rtl8169_private *tp)
+ {
+ 	rtl_set_def_aspm_entry_latency(tp);
+@@ -3924,6 +3931,7 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
+ 		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
++		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ 		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
+ 		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
+ 	};
+@@ -3941,6 +3949,7 @@ static void rtl_hw_start_8125(struct rtl
+ 	/* disable interrupt coalescing */
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_61:
++	case RTL_GIGA_MAC_VER_64:
+ 		for (i = 0xa00; i < 0xb00; i += 4)
+ 			RTL_W32(tp, i, 0);
+ 		break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1103,6 +1103,15 @@ static void rtl8125b_hw_phy_config(struc
+ 	rtl8125b_config_eee_phy(phydev);
+ }
+ 
++static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
++				   struct phy_device *phydev)
++{
++	r8169_apply_firmware(tp);
++	rtl8125_legacy_force_mode(phydev);
++	rtl8168g_disable_aldps(phydev);
++	rtl8125b_config_eee_phy(phydev);
++}
++
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+ 				   struct phy_device *phydev)
+ {
+@@ -1159,6 +1168,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
++		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
+ 	};
diff --git a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
new file mode 100644
index 0000000000..721e51ebf0
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
@@ -0,0 +1,30 @@
+From b8bd8c44a266c9a7dcb907eab10fbb119e3f6494 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 24 Oct 2024 22:48:59 +0200
+Subject: [PATCH] r8169: fix inconsistent indenting in
+ rtl8169_get_eth_mac_stats
+
+This fixes an inconsistent indenting introduced with e3fc5139bd8f
+("r8169: implement additional ethtool stats ops").
+
+Reported-by: kernel test robot <lkp at intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202410220413.1gAxIJ4t-lkp at intel.com/
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/20fd6f39-3c1b-4af0-9adc-7d1f49728fad at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2227,7 +2227,7 @@ static void rtl8169_get_eth_mac_stats(st
+ 		le64_to_cpu(tp->counters->tx_broadcast64);
+ 	mac_stats->MulticastFramesReceivedOK =
+ 		le64_to_cpu(tp->counters->rx_multicast64);
+-	 mac_stats->FrameTooLongErrors =
++	mac_stats->FrameTooLongErrors =
+ 		le32_to_cpu(tp->counters->rx_frame_too_long);
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch b/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch
new file mode 100644
index 0000000000..de2be0165c
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-35-v6.13-r8169-align-RTL8125-EEE-config-with-vendor-driver.patch
@@ -0,0 +1,49 @@
+From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:42:52 +0100
+Subject: [PATCH] r8169: align RTL8125 EEE config with vendor driver
+
+Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125.
+This should help to avoid compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/044c925e-8669-4b98-87df-95b4056f4f5f at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ .../net/ethernet/realtek/r8169_phy_config.c    | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(stru
+ 	phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
+ }
+ 
+-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++static void rtl8125_common_config_eee_phy(struct phy_device *phydev)
+ {
+-	rtl8168h_config_eee_phy(phydev);
++	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
++	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++}
+ 
++static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++{
++	rtl8168g_config_eee_phy(phydev);
++	/* disable EEE at 2.5Gbps */
+ 	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+-	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+-	phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+-	phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+-	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++	rtl8168g_config_eee_phy(phydev);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
diff --git a/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch b/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch
new file mode 100644
index 0000000000..a546c426b4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-36-v6.13-r8169-align-RTL8125-RTL8126-PHY-config-with-vendor-d.patch
@@ -0,0 +1,46 @@
+From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:43:45 +0100
+Subject: [PATCH] r8169: align RTL8125/RTL8126 PHY config with vendor driver
+
+This aligns some parameters with vendor driver r8125/r8126 to avoid
+compatibility issues. Note that for RTL8125B there's no functional
+change, just the open-coded version of the function is replaced.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/a8a9d896-fbe6-41f2-bf87-666567d3cdb3 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
+ 
+-	phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
+ 	phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
+ 	phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
+ 
+@@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
+ 	rtl8125b_config_eee_phy(phydev);
+@@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struc
+ 				   struct phy_device *phydev)
+ {
+ 	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
++	rtl8125_legacy_force_mode(phydev);
++	rtl8168g_disable_aldps(phydev);
+ }
+ 
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
diff --git a/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch b/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch
new file mode 100644
index 0000000000..36c8041c94
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-37-v6.13-r8169-align-RTL8126-EEE-config-with-vendor-driver.patch
@@ -0,0 +1,25 @@
+From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Thu, 31 Oct 2024 22:44:36 +0100
+Subject: [PATCH] r8169: align RTL8126 EEE config with vendor driver
+
+Align the EEE config for RTL8126A with vendor driver r8126 to avoid
+compatibility issues.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/71e4859e-4cd0-4b6b-b7fa-621d7721992f at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struc
+ 	rtl8168g_enable_gphy_10m(phydev);
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
++	rtl8125_common_config_eee_phy(phydev);
+ }
+ 
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
diff --git a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
new file mode 100644
index 0000000000..8cb79c82cf
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
@@ -0,0 +1,38 @@
+From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 2 Nov 2024 14:49:01 +0100
+Subject: [PATCH] r8169: improve initialization of RSS registers on
+ RTL8125/RTL8126
+
+Replace the register addresses with the names used in r8125/r8126
+vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/3bf2f340-b369-4174-97bf-fd38d4217492 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -347,6 +347,8 @@ enum rtl8125_registers {
+ 	TxPoll_8125		= 0x90,
+ 	LEDSEL3			= 0x96,
+ 	MAC0_BKP		= 0x19e0,
++	RSS_CTRL_8125		= 0x4500,
++	Q_NUM_CTRL_8125		= 0x4800,
+ 	EEE_TXIDLE_TIMER_8125	= 0x6048,
+ };
+ 
+@@ -3770,8 +3772,8 @@ static void rtl_hw_start_8125_common(str
+ 	rtl_pcie_state_l2l3_disable(tp);
+ 
+ 	RTL_W16(tp, 0x382, 0x221b);
+-	RTL_W8(tp, 0x4500, 0);
+-	RTL_W16(tp, 0x4800, 0);
++	RTL_W32(tp, RSS_CTRL_8125, 0);
++	RTL_W16(tp, Q_NUM_CTRL_8125, 0);
+ 
+ 	/* disable UPS */
+ 	r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);
diff --git a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
new file mode 100644
index 0000000000..20c42955e3
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
@@ -0,0 +1,113 @@
+From 83cb4b470c66b37b19a347a35cea01e0cbdd258d Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 4 Nov 2024 23:16:20 +0100
+Subject: [PATCH] r8169: remove leftover locks after reverted change
+
+After e31a9fedc7d8 ("Revert "r8169: disable ASPM during NAPI poll"")
+these locks aren't needed any longer.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/680f2606-ac7d-4ced-8694-e5033855da9b at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 29 ++---------------------
+ 1 file changed, 2 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -663,13 +663,9 @@ struct rtl8169_private {
+ 		struct work_struct work;
+ 	} wk;
+ 
+-	raw_spinlock_t config25_lock;
+ 	raw_spinlock_t mac_ocp_lock;
+ 	struct mutex led_lock;	/* serialize LED ctrl RMW access */
+ 
+-	raw_spinlock_t cfg9346_usage_lock;
+-	int cfg9346_usage_count;
+-
+ 	unsigned supports_gmii:1;
+ 	unsigned aspm_manageable:1;
+ 	unsigned dash_enabled:1;
+@@ -723,22 +719,12 @@ static inline struct device *tp_to_dev(s
+ 
+ static void rtl_lock_config_regs(struct rtl8169_private *tp)
+ {
+-	unsigned long flags;
+-
+-	raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+-	if (!--tp->cfg9346_usage_count)
+-		RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+-	raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++	RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+ }
+ 
+ static void rtl_unlock_config_regs(struct rtl8169_private *tp)
+ {
+-	unsigned long flags;
+-
+-	raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+-	if (!tp->cfg9346_usage_count++)
+-		RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+-	raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++	RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+ }
+ 
+ static void rtl_pci_commit(struct rtl8169_private *tp)
+@@ -749,24 +735,18 @@ static void rtl_pci_commit(struct rtl816
+ 
+ static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+-	unsigned long flags;
+ 	u8 val;
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	val = RTL_R8(tp, Config2);
+ 	RTL_W8(tp, Config2, (val & ~clear) | set);
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+ 
+ static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+-	unsigned long flags;
+ 	u8 val;
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	val = RTL_R8(tp, Config5);
+ 	RTL_W8(tp, Config5, (val & ~clear) | set);
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+ 
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+@@ -1572,7 +1552,6 @@ static void __rtl8169_set_wol(struct rtl
+ 		{ WAKE_MAGIC, Config3, MagicPacket }
+ 	};
+ 	unsigned int i, tmp = ARRAY_SIZE(cfg);
+-	unsigned long flags;
+ 	u8 options;
+ 
+ 	rtl_unlock_config_regs(tp);
+@@ -1591,14 +1570,12 @@ static void __rtl8169_set_wol(struct rtl
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
+ 	}
+ 
+-	raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ 	for (i = 0; i < tmp; i++) {
+ 		options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+ 		if (wolopts & cfg[i].opt)
+ 			options |= cfg[i].mask;
+ 		RTL_W8(tp, cfg[i].reg, options);
+ 	}
+-	raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ 
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+@@ -5498,8 +5475,6 @@ static int rtl_init_one(struct pci_dev *
+ 	tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
+ 	tp->ocp_base = OCP_STD_PHY_BASE;
+ 
+-	raw_spin_lock_init(&tp->cfg9346_usage_lock);
+-	raw_spin_lock_init(&tp->config25_lock);
+ 	raw_spin_lock_init(&tp->mac_ocp_lock);
+ 	mutex_init(&tp->led_lock);
+ 
diff --git a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
new file mode 100644
index 0000000000..8c88c078f2
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
@@ -0,0 +1,108 @@
+From c507e96b5763b36b63ad50ad804341f72ea000e4 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:55:45 +0100
+Subject: [PATCH] r8169: improve __rtl8169_set_wol
+
+Add helper r8169_mod_reg8_cond() what allows to significantly simplify
+__rtl8169_set_wol().
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/697b197a-8eac-40c6-8847-27093cacec36 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 55 ++++++++++-------------
+ 1 file changed, 24 insertions(+), 31 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -749,6 +749,20 @@ static void rtl_mod_config5(struct rtl81
+ 	RTL_W8(tp, Config5, (val & ~clear) | set);
+ }
+ 
++static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,
++				u8 bits, bool cond)
++{
++	u8 val, old_val;
++
++	old_val = RTL_R8(tp, reg);
++	if (cond)
++		val = old_val | bits;
++	else
++		val = old_val & ~bits;
++	if (val != old_val)
++		RTL_W8(tp, reg, val);
++}
++
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+ {
+ 	return tp->mac_version >= RTL_GIGA_MAC_VER_61;
+@@ -1539,58 +1553,37 @@ static void rtl8169_get_wol(struct net_d
+ 
+ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
+ {
+-	static const struct {
+-		u32 opt;
+-		u16 reg;
+-		u8  mask;
+-	} cfg[] = {
+-		{ WAKE_PHY,   Config3, LinkUp },
+-		{ WAKE_UCAST, Config5, UWF },
+-		{ WAKE_BCAST, Config5, BWF },
+-		{ WAKE_MCAST, Config5, MWF },
+-		{ WAKE_ANY,   Config5, LanWake },
+-		{ WAKE_MAGIC, Config3, MagicPacket }
+-	};
+-	unsigned int i, tmp = ARRAY_SIZE(cfg);
+-	u8 options;
+-
+ 	rtl_unlock_config_regs(tp);
+ 
+ 	if (rtl_is_8168evl_up(tp)) {
+-		tmp--;
+ 		if (wolopts & WAKE_MAGIC)
+ 			rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);
+ 		else
+ 			rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);
+ 	} else if (rtl_is_8125(tp)) {
+-		tmp--;
+ 		if (wolopts & WAKE_MAGIC)
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));
+ 		else
+ 			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
++	} else {
++		r8169_mod_reg8_cond(tp, Config3, MagicPacket,
++				    wolopts & WAKE_MAGIC);
+ 	}
+ 
+-	for (i = 0; i < tmp; i++) {
+-		options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+-		if (wolopts & cfg[i].opt)
+-			options |= cfg[i].mask;
+-		RTL_W8(tp, cfg[i].reg, options);
+-	}
++	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++	r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
++	r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
++	r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
++	r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);
+ 
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+-		options = RTL_R8(tp, Config1) & ~PMEnable;
+-		if (wolopts)
+-			options |= PMEnable;
+-		RTL_W8(tp, Config1, options);
++		r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_34:
+ 	case RTL_GIGA_MAC_VER_37:
+ 	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+-		if (wolopts)
+-			rtl_mod_config2(tp, 0, PME_SIGNAL);
+-		else
+-			rtl_mod_config2(tp, PME_SIGNAL, 0);
++		r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
+ 		break;
+ 	default:
+ 		break;
diff --git a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
new file mode 100644
index 0000000000..e762617310
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
@@ -0,0 +1,44 @@
+From 330dc2297c82953dff402e0b4176a5383a618538 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:56:28 +0100
+Subject: [PATCH] r8169: improve rtl_set_d3_pll_down
+
+Make use of new helper r8169_mod_reg8_cond() and move from a switch()
+to an if() clause. Benefit is that we don't have to touch this piece of
+code each time support for a new chip version is added.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/e1ccdb85-a4ed-4800-89c2-89770ff06452 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 18 +++++-------------
+ 1 file changed, 5 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1432,19 +1432,11 @@ static enum rtl_dash_type rtl_get_dash_t
+ 
+ static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
+ {
+-	switch (tp->mac_version) {
+-	case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
+-	case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
+-	case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
+-	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+-		if (enable)
+-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
+-		else
+-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);
+-		break;
+-	default:
+-		break;
+-	}
++	if (tp->mac_version >= RTL_GIGA_MAC_VER_25 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_28 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_31 &&
++	    tp->mac_version != RTL_GIGA_MAC_VER_38)
++		r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, !enable);
+ }
+ 
+ static void rtl_reset_packet_filter(struct rtl8169_private *tp)
diff --git a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
new file mode 100644
index 0000000000..de86c2f6cd
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
@@ -0,0 +1,29 @@
+From e3e9e9039fa6ae885c7d5c954d7b9f105fa23e8f Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Wed, 6 Nov 2024 17:57:08 +0100
+Subject: [PATCH] r8169: align WAKE_PHY handling with r8125/r8126 vendor
+ drivers
+
+Vendor drivers r8125/r8126 apply this additional magic setting when
+enabling WAKE_PHY, so do the same here.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/51130715-45be-4db5-abb7-05d87e1f5df9 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1563,6 +1563,9 @@ static void __rtl8169_set_wol(struct rtl
+ 	}
+ 
+ 	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++	if (rtl_is_8125(tp))
++		r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,
++				     wolopts & WAKE_PHY ? 0x13 : 0);
+ 	r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
+ 	r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
+ 	r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
diff --git a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
new file mode 100644
index 0000000000..5bcf06098a
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
@@ -0,0 +1,117 @@
+From 7a3bcd39ae1f0e3ab896d9df62339ab4297a0bfd Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 9 Nov 2024 23:12:12 +0100
+Subject: [PATCH] r8169: use helper r8169_mod_reg8_cond to simplify
+ rtl_jumbo_config
+
+Use recently added helper r8169_mod_reg8_cond() to simplify jumbo
+mode configuration.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/3df1d484-a02e-46e7-8f75-db5b428e422e at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 77 ++++-------------------
+ 1 file changed, 11 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2547,86 +2547,31 @@ static void rtl8169_init_ring_indexes(st
+ 	tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
+ }
+ 
+-static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+-}
+-
+-static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+-}
+-
+-static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-}
+-
+-static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-}
+-
+-static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, MaxTxPacketSize, 0x24);
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
+-}
+-
+-static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, MaxTxPacketSize, 0x3f);
+-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
+-}
+-
+-static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
+-}
+-
+-static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
+-}
+-
+ static void rtl_jumbo_config(struct rtl8169_private *tp)
+ {
+ 	bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
+ 	int readrq = 4096;
+ 
++	if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 &&
++	    tp->mac_version <= RTL_GIGA_MAC_VER_26)
++		readrq = 512;
++
+ 	rtl_unlock_config_regs(tp);
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_17:
+-		if (jumbo) {
+-			readrq = 512;
+-			r8168b_1_hw_jumbo_enable(tp);
+-		} else {
+-			r8168b_1_hw_jumbo_disable(tp);
+-		}
++		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
+-		if (jumbo) {
+-			readrq = 512;
+-			r8168c_hw_jumbo_enable(tp);
+-		} else {
+-			r8168c_hw_jumbo_disable(tp);
+-		}
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++		r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_28:
+-		if (jumbo)
+-			r8168dp_hw_jumbo_enable(tp);
+-		else
+-			r8168dp_hw_jumbo_disable(tp);
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
+-		if (jumbo)
+-			r8168e_hw_jumbo_enable(tp);
+-		else
+-			r8168e_hw_jumbo_disable(tp);
++		RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);
++		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ 		break;
+ 	default:
+ 		break;



From lede-commits at lists.infradead.org  Sat Jan  4 02:55:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 05:55:24 -0500
Subject: [openwrt/openwrt]  wifi-scripts: fix setting tx power on some drivers
In-Reply-To: <173598812348.2808192.13483056631442136585@git-01.infra.openwrt.org>
References: <173598812348.2808192.13483056631442136585@git-01.infra.openwrt.org>
Message-ID: <mailman.31007.1735988127.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b795e5cbcffc54e858bc8d3bde0031a2ca32377e

commit b795e5cbcffc54e858bc8d3bde0031a2ca32377e
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sat Jan 4 11:52:50 2025 +0100

    wifi-scripts: fix setting tx power on some drivers
    
    On some drivers, setting the tx power on the interface is not enough.
    Set it for the phy as well.
    
    Fixes: 04fb05914ea7 ("wifi-scripts: add multi-radio config support")
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../wifi-scripts/files-ucode/lib/netifd/wireless/mac80211.sh      | 1 +
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh     | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/package/network/config/wifi-scripts/files-ucode/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files-ucode/lib/netifd/wireless/mac80211.sh
index 93ab404d57..9b86abcee5 100755
--- a/package/network/config/wifi-scripts/files-ucode/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files-ucode/lib/netifd/wireless/mac80211.sh
@@ -195,6 +195,7 @@ function setup_phy(phy, config, data) {
 	log(`Configuring '${phy}' txantenna: ${config.txantenna}, rxantenna: ${config.rxantenna} distance: ${config.distance}`);
 	system(`iw phy ${phy} set antenna ${config.txantenna} ${config.rxantenna}`);
 	system(`iw phy ${phy} set distance ${config.distance}`);
+	system(`iw phy ${phy} set txpower ${config.txpower}`);
 
 	if (config.frag)
 		system(`iw phy ${phy} set frag ${frag}`);
diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 5d9bf8ee09..9e9922e0b3 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -1210,6 +1210,14 @@ drv_mac80211_setup() {
 	wdev_tool "$phy$phy_suffix" set_config "$(json_dump)" $active_ifnames
 	json_set_namespace "$prev"
 
+	[ -z "$phy_suffix" ] && {
+		if [ -n "$txpower" ]; then
+			iw phy "$phy" set txpower fixed "${txpower%%.*}00"
+		else
+			iw phy "$phy" set txpower auto
+		fi
+	}
+
 	for_each_interface "ap sta adhoc mesh monitor" mac80211_set_vif_txpower
 	wireless_set_up
 }



From lede-commits at lists.infradead.org  Sat Jan  4 02:55:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 05:55:23 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-04)
In-Reply-To: <173598812348.2808192.13483056631442136585@git-01.infra.openwrt.org>
References: <173598812348.2808192.13483056631442136585@git-01.infra.openwrt.org>
Message-ID: <mailman.31008.1735988127.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f11bc4f201e3a4ffec8c1e2083124ebda60dd763

commit f11bc4f201e3a4ffec8c1e2083124ebda60dd763
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sat Jan 4 11:54:22 2025 +0100

    mt76: update to Git HEAD (2025-01-04)
    
    35bcf68a6297 wifi: mt76: scan: fix setting tx_info fields
    4d8d6e2e7710 wifi: mt76: scan: set vif offchannel link for scanning/roc
    e354436db440 wifi: mt76: mt7996: use the correct vif link for scanning/roc
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index d603b6215f..7bc030a9df 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-03
-PKG_SOURCE_VERSION:=959a2d40007f502d9465b8aede79e761f875abd3
-PKG_MIRROR_HASH:=a00a26a4685c053a639a95657804b09d0d4a1452744647871070beb6332b7c3a
+PKG_SOURCE_DATE:=2025-01-04
+PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
+PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Sat Jan  4 02:56:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 05:56:21 -0500
Subject: [openwrt/openwrt]  wifi-scripts: fix setting tx power on some drivers
In-Reply-To: <173598818058.2809313.14910345701650939229@git-01.infra.openwrt.org>
References: <173598818058.2809313.14910345701650939229@git-01.infra.openwrt.org>
Message-ID: <mailman.31009.1735988183.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/2f60e7f00629bb12b066c06fee6b67664776b475

commit 2f60e7f00629bb12b066c06fee6b67664776b475
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sat Jan 4 11:52:50 2025 +0100

    wifi-scripts: fix setting tx power on some drivers
    
    On some drivers, setting the tx power on the interface is not enough.
    Set it for the phy as well.
    
    Fixes: 04fb05914ea7 ("wifi-scripts: add multi-radio config support")
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit b795e5cbcffc54e858bc8d3bde0031a2ca32377e)
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh     | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 5837f1c748..42d7bc66d0 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -1203,6 +1203,14 @@ drv_mac80211_setup() {
 	wdev_tool "$phy$phy_suffix" set_config "$(json_dump)" $active_ifnames
 	json_set_namespace "$prev"
 
+	[ -z "$phy_suffix" ] && {
+		if [ -n "$txpower" ]; then
+			iw phy "$phy" set txpower fixed "${txpower%%.*}00"
+		else
+			iw phy "$phy" set txpower auto
+		fi
+	}
+
 	for_each_interface "ap sta adhoc mesh monitor" mac80211_set_vif_txpower
 	wireless_set_up
 }



From lede-commits at lists.infradead.org  Sat Jan  4 02:56:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 05:56:20 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-04)
In-Reply-To: <173598818058.2809313.14910345701650939229@git-01.infra.openwrt.org>
References: <173598818058.2809313.14910345701650939229@git-01.infra.openwrt.org>
Message-ID: <mailman.31010.1735988184.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6ba1f831c7a20288eb0bf16767fc5a26f30cc8eb

commit 6ba1f831c7a20288eb0bf16767fc5a26f30cc8eb
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sat Jan 4 11:54:22 2025 +0100

    mt76: update to Git HEAD (2025-01-04)
    
    35bcf68a6297 wifi: mt76: scan: fix setting tx_info fields
    4d8d6e2e7710 wifi: mt76: scan: set vif offchannel link for scanning/roc
    e354436db440 wifi: mt76: mt7996: use the correct vif link for scanning/roc
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit f11bc4f201e3a4ffec8c1e2083124ebda60dd763)
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index d603b6215f..7bc030a9df 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-03
-PKG_SOURCE_VERSION:=959a2d40007f502d9465b8aede79e761f875abd3
-PKG_MIRROR_HASH:=a00a26a4685c053a639a95657804b09d0d4a1452744647871070beb6332b7c3a
+PKG_SOURCE_DATE:=2025-01-04
+PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
+PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Sat Jan  4 03:16:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 06:16:08 -0500
Subject: [openwrt/openwrt]  bcm27xx/bcm2712: Fix-up RP1 modules
In-Reply-To: <173598936888.2845163.3899918716818113409@git-01.infra.openwrt.org>
References: <173598936888.2845163.3899918716818113409@git-01.infra.openwrt.org>
Message-ID: <mailman.31011.1735989373.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f105d1a9a9739267fb25612d039c392a397775bd

commit f105d1a9a9739267fb25612d039c392a397775bd
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 2 07:50:26 2025 -0500

    bcm27xx/bcm2712: Fix-up RP1 modules
    
    Correct a few mistakes around dependencies and naming and unset
    CONFIG_FIRMWARE_RP1 in RPi5B's config and instead of a builtin, build it
    as a module.
    
    Without this change, there are two entries for rp1.ko in
    /lib/modules/$(uname -r)/modules.builtin due to how we strip the leading
    directories when we generate it. See: package/kernel/linux/Makefile
    around line 63.
    
      % grep rp1.ko /lib/modules/$(uname -r)/modules.builtin
      pwm-rp1.ko
      clk-rp1.ko
      rp1.ko
      rp1.ko
    
    The kernel log gets spammed with tons of superfluous warnings as a
    results of the double entry:
    
      daemon.warn modprobe: found duplicate builtin module rp1
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17461
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/bcm27xx/bcm2712/config-6.6 |  8 ++--
 target/linux/bcm27xx/modules/hwmon.mk   | 19 +++++++++
 target/linux/bcm27xx/modules/other.mk   | 70 ++++++++++++++++++++++++++++++++-
 target/linux/bcm27xx/modules/video.mk   |  2 +-
 4 files changed, 92 insertions(+), 7 deletions(-)

diff --git a/target/linux/bcm27xx/bcm2712/config-6.6 b/target/linux/bcm27xx/bcm2712/config-6.6
index 9dac0688df..749c569a54 100644
--- a/target/linux/bcm27xx/bcm2712/config-6.6
+++ b/target/linux/bcm27xx/bcm2712/config-6.6
@@ -239,7 +239,7 @@ CONFIG_FB_DEVICE=y
 CONFIG_FB_IOMEM_FOPS=y
 CONFIG_FB_IOMEM_HELPERS=y
 CONFIG_FB_SIMPLE=y
-CONFIG_FIRMWARE_RP1=y
+# CONFIG_FIRMWARE_RP1 is not set
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
 CONFIG_FONT_8x16=y
@@ -372,7 +372,7 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6
 CONFIG_MAILBOX=y
 # CONFIG_MAILBOX_TEST is not set
-CONFIG_MBOX_RP1=y
+# CONFIG_MBOX_RP1 is not set
 CONFIG_MDIO_BCM_UNIMAC=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
@@ -537,7 +537,7 @@ CONFIG_RESET_RASPBERRYPI=y
 CONFIG_RESET_SIMPLE=y
 CONFIG_RFS_ACCEL=y
 CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
-CONFIG_RP1_PIO=y
+# CONFIG_RP1_PIO is not set
 # CONFIG_RPI_POE_POWER is not set
 CONFIG_RPS=y
 CONFIG_RTC_CLASS=y
@@ -550,7 +550,7 @@ CONFIG_SCSI_COMMON=y
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_SENSORS_RASPBERRYPI_HWMON=y
-CONFIG_SENSORS_RP1_ADC=y
+# CONFIG_SENSORS_RP1_ADC is not set
 CONFIG_SERIAL_8250_BCM2835AUX=y
 CONFIG_SERIAL_8250_BCM7271=y
 # CONFIG_SERIAL_8250_DMA is not set
diff --git a/target/linux/bcm27xx/modules/hwmon.mk b/target/linux/bcm27xx/modules/hwmon.mk
index 0f1547cd4f..db8ba30f87 100644
--- a/target/linux/bcm27xx/modules/hwmon.mk
+++ b/target/linux/bcm27xx/modules/hwmon.mk
@@ -2,6 +2,23 @@
 #
 # Copyright (C) 2019 OpenWrt.org
 
+define KernelPackage/rp1-adc
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 ADC and temperature sensor driver
+  KCONFIG:=CONFIG_SENSORS_RP1_ADC
+  FILES:=$(LINUX_DIR)/drivers/hwmon/rp1-adc.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-adc)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1-adc/description
+  Kernel module for RP1 silicon providing ADC and
+  temperature monitoring.
+endef
+
+$(eval $(call KernelPackage,rp1-adc))
+
+
 define KernelPackage/hwmon-raspberrypi
   TITLE:=Raspberry Pi voltage monitor
   KCONFIG:=CONFIG_SENSORS_RASPBERRYPI_HWMON
@@ -15,3 +32,5 @@ define KernelPackage/hwmon-raspberrypi/description
 endef
 
 $(eval $(call KernelPackage,hwmon-raspberrypi))
+
+
diff --git a/target/linux/bcm27xx/modules/other.mk b/target/linux/bcm27xx/modules/other.mk
index 5a69000748..099ce3ce14 100644
--- a/target/linux/bcm27xx/modules/other.mk
+++ b/target/linux/bcm27xx/modules/other.mk
@@ -55,13 +55,46 @@ endef
 $(eval $(call KernelPackage,smi-bcm2835-dev))
 
 
+define KernelPackage/rp1
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 firmware
+  KCONFIG:=CONFIG_FIRMWARE_RP1
+  FILES:=$(LINUX_DIR)/drivers/firmware/rp1.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1/description
+  This driver provides a firmware interface to the RP1 processor using shared
+  memory and a mailbox.
+endef
+
+$(eval $(call KernelPackage,rp1))
+
+
+define KernelPackage/rp1-pio
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 PIO block support
+  KCONFIG:=CONFIG_RP1_PIO
+  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
+endef
+
+define KernelPackage/rp1-pio/description
+  Driver providing control of the Raspberry Pi PIO block, as found in RP1
+endef
+
+$(eval $(call KernelPackage,rp1-pio))
+
+
 define KernelPackage/pwm-pio-rp1
   SUBMENU:=$(OTHER_MENU)
   TITLE:=RP1 PWM support
   KCONFIG:=CONFIG_PWM_PIO_RP1
   FILES:=$(LINUX_DIR)/drivers/pwm/pwm-pio-rp1.ko
   AUTOLOAD:=$(call AutoLoad,21,pwm-pio-rp1)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
 endef
 
 define KernelPackage/pwm-pio-rp1/description
@@ -80,7 +113,7 @@ define KernelPackage/ws2812-pio-rp1
   KCONFIG:=CONFIG_WS2812_PIO_RP1
   FILES:=$(LINUX_DIR)/drivers/misc/ws2812-pio-rp1.ko
   AUTOLOAD:=$(call AutoLoad,21,ws2812-pio-rp1)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
 endef
 
 define KernelPackage/ws2812-pio-rp1/description
@@ -90,3 +123,36 @@ define KernelPackage/ws2812-pio-rp1/description
 endef
 
 $(eval $(call KernelPackage,ws2812-pio-rp1))
+
+
+define KernelPackage/rp1-mailbox
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 mailbox IPC driver
+  KCONFIG:=CONFIG_MBOX_RP1
+  FILES:=$(LINUX_DIR)/drivers/mailbox/rp1-mailbox.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-mailbox)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1-mailbox/description
+  This is a RP1 mailbox IPC driver.
+endef
+
+$(eval $(call KernelPackage,rp1-mailbox))
+
+
+define KernelPackage/rp1-pio
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 PIO driver
+  KCONFIG:=CONFIG_RP1_PIO
+  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
+endef
+
+define KernelPackage/rp1-pio/description
+  Driver for the RP1 PIO.
+endef
+
+$(eval $(call KernelPackage,rp1-pio))
+
diff --git a/target/linux/bcm27xx/modules/video.mk b/target/linux/bcm27xx/modules/video.mk
index dddf13e0f4..e8a61f138c 100644
--- a/target/linux/bcm27xx/modules/video.mk
+++ b/target/linux/bcm27xx/modules/video.mk
@@ -175,7 +175,7 @@ define KernelPackage/drm-rp1-dpi
     CONFIG_DRM_TTM_HELPER=n
   FILES:=$(LINUX_DIR)/drivers/gpu/drm/rp1/rp1-dpi/drm-rp1-dpi.ko
   AUTOLOAD:=$(call AutoLoad,67,drm-rp1-dpi)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4 +kmod-rp1-pio
 endef
 
 define KernelPackage/drm-rp1-dpi/description



From lede-commits at lists.infradead.org  Sat Jan  4 04:42:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 07:42:03 -0500
Subject: [openwrt/openwrt]  bcm27xx/bcm2712: Fix-up RP1 modules
In-Reply-To: <173599452357.2988081.11032758234938459097@git-01.infra.openwrt.org>
References: <173599452357.2988081.11032758234938459097@git-01.infra.openwrt.org>
Message-ID: <mailman.31026.1735994559.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7a112661d5f0c35805392fdfd59574e023cd6f09

commit 7a112661d5f0c35805392fdfd59574e023cd6f09
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 2 07:50:26 2025 -0500

    bcm27xx/bcm2712: Fix-up RP1 modules
    
    Correct a few mistakes around dependencies and naming and unset
    CONFIG_FIRMWARE_RP1 in RPi5B's config and instead of a builtin, build it
    as a module.
    
    Without this change, there are two entries for rp1.ko in
    /lib/modules/$(uname -r)/modules.builtin due to how we strip the leading
    directories when we generate it. See: package/kernel/linux/Makefile
    around line 63.
    
      % grep rp1.ko /lib/modules/$(uname -r)/modules.builtin
      pwm-rp1.ko
      clk-rp1.ko
      rp1.ko
      rp1.ko
    
    The kernel log gets spammed with tons of superfluous warnings as a
    results of the double entry:
    
      daemon.warn modprobe: found duplicate builtin module rp1
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17461
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit f105d1a9a9739267fb25612d039c392a397775bd)
---
 target/linux/bcm27xx/bcm2712/config-6.6 |  8 ++--
 target/linux/bcm27xx/modules/hwmon.mk   | 19 +++++++++
 target/linux/bcm27xx/modules/other.mk   | 70 ++++++++++++++++++++++++++++++++-
 target/linux/bcm27xx/modules/video.mk   |  2 +-
 4 files changed, 92 insertions(+), 7 deletions(-)

diff --git a/target/linux/bcm27xx/bcm2712/config-6.6 b/target/linux/bcm27xx/bcm2712/config-6.6
index 9dac0688df..749c569a54 100644
--- a/target/linux/bcm27xx/bcm2712/config-6.6
+++ b/target/linux/bcm27xx/bcm2712/config-6.6
@@ -239,7 +239,7 @@ CONFIG_FB_DEVICE=y
 CONFIG_FB_IOMEM_FOPS=y
 CONFIG_FB_IOMEM_HELPERS=y
 CONFIG_FB_SIMPLE=y
-CONFIG_FIRMWARE_RP1=y
+# CONFIG_FIRMWARE_RP1 is not set
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
 CONFIG_FONT_8x16=y
@@ -372,7 +372,7 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1f6
 CONFIG_MAILBOX=y
 # CONFIG_MAILBOX_TEST is not set
-CONFIG_MBOX_RP1=y
+# CONFIG_MBOX_RP1 is not set
 CONFIG_MDIO_BCM_UNIMAC=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
@@ -537,7 +537,7 @@ CONFIG_RESET_RASPBERRYPI=y
 CONFIG_RESET_SIMPLE=y
 CONFIG_RFS_ACCEL=y
 CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
-CONFIG_RP1_PIO=y
+# CONFIG_RP1_PIO is not set
 # CONFIG_RPI_POE_POWER is not set
 CONFIG_RPS=y
 CONFIG_RTC_CLASS=y
@@ -550,7 +550,7 @@ CONFIG_SCSI_COMMON=y
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_SENSORS_RASPBERRYPI_HWMON=y
-CONFIG_SENSORS_RP1_ADC=y
+# CONFIG_SENSORS_RP1_ADC is not set
 CONFIG_SERIAL_8250_BCM2835AUX=y
 CONFIG_SERIAL_8250_BCM7271=y
 # CONFIG_SERIAL_8250_DMA is not set
diff --git a/target/linux/bcm27xx/modules/hwmon.mk b/target/linux/bcm27xx/modules/hwmon.mk
index 0f1547cd4f..db8ba30f87 100644
--- a/target/linux/bcm27xx/modules/hwmon.mk
+++ b/target/linux/bcm27xx/modules/hwmon.mk
@@ -2,6 +2,23 @@
 #
 # Copyright (C) 2019 OpenWrt.org
 
+define KernelPackage/rp1-adc
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 ADC and temperature sensor driver
+  KCONFIG:=CONFIG_SENSORS_RP1_ADC
+  FILES:=$(LINUX_DIR)/drivers/hwmon/rp1-adc.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-adc)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1-adc/description
+  Kernel module for RP1 silicon providing ADC and
+  temperature monitoring.
+endef
+
+$(eval $(call KernelPackage,rp1-adc))
+
+
 define KernelPackage/hwmon-raspberrypi
   TITLE:=Raspberry Pi voltage monitor
   KCONFIG:=CONFIG_SENSORS_RASPBERRYPI_HWMON
@@ -15,3 +32,5 @@ define KernelPackage/hwmon-raspberrypi/description
 endef
 
 $(eval $(call KernelPackage,hwmon-raspberrypi))
+
+
diff --git a/target/linux/bcm27xx/modules/other.mk b/target/linux/bcm27xx/modules/other.mk
index 5a69000748..099ce3ce14 100644
--- a/target/linux/bcm27xx/modules/other.mk
+++ b/target/linux/bcm27xx/modules/other.mk
@@ -55,13 +55,46 @@ endef
 $(eval $(call KernelPackage,smi-bcm2835-dev))
 
 
+define KernelPackage/rp1
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 firmware
+  KCONFIG:=CONFIG_FIRMWARE_RP1
+  FILES:=$(LINUX_DIR)/drivers/firmware/rp1.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1/description
+  This driver provides a firmware interface to the RP1 processor using shared
+  memory and a mailbox.
+endef
+
+$(eval $(call KernelPackage,rp1))
+
+
+define KernelPackage/rp1-pio
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 PIO block support
+  KCONFIG:=CONFIG_RP1_PIO
+  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
+endef
+
+define KernelPackage/rp1-pio/description
+  Driver providing control of the Raspberry Pi PIO block, as found in RP1
+endef
+
+$(eval $(call KernelPackage,rp1-pio))
+
+
 define KernelPackage/pwm-pio-rp1
   SUBMENU:=$(OTHER_MENU)
   TITLE:=RP1 PWM support
   KCONFIG:=CONFIG_PWM_PIO_RP1
   FILES:=$(LINUX_DIR)/drivers/pwm/pwm-pio-rp1.ko
   AUTOLOAD:=$(call AutoLoad,21,pwm-pio-rp1)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
 endef
 
 define KernelPackage/pwm-pio-rp1/description
@@ -80,7 +113,7 @@ define KernelPackage/ws2812-pio-rp1
   KCONFIG:=CONFIG_WS2812_PIO_RP1
   FILES:=$(LINUX_DIR)/drivers/misc/ws2812-pio-rp1.ko
   AUTOLOAD:=$(call AutoLoad,21,ws2812-pio-rp1)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1-pio
 endef
 
 define KernelPackage/ws2812-pio-rp1/description
@@ -90,3 +123,36 @@ define KernelPackage/ws2812-pio-rp1/description
 endef
 
 $(eval $(call KernelPackage,ws2812-pio-rp1))
+
+
+define KernelPackage/rp1-mailbox
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 mailbox IPC driver
+  KCONFIG:=CONFIG_MBOX_RP1
+  FILES:=$(LINUX_DIR)/drivers/mailbox/rp1-mailbox.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-mailbox)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712
+endef
+
+define KernelPackage/rp1-mailbox/description
+  This is a RP1 mailbox IPC driver.
+endef
+
+$(eval $(call KernelPackage,rp1-mailbox))
+
+
+define KernelPackage/rp1-pio
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=RP1 PIO driver
+  KCONFIG:=CONFIG_RP1_PIO
+  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
+  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
+endef
+
+define KernelPackage/rp1-pio/description
+  Driver for the RP1 PIO.
+endef
+
+$(eval $(call KernelPackage,rp1-pio))
+
diff --git a/target/linux/bcm27xx/modules/video.mk b/target/linux/bcm27xx/modules/video.mk
index 8e2b19bd87..f8b39c71c4 100644
--- a/target/linux/bcm27xx/modules/video.mk
+++ b/target/linux/bcm27xx/modules/video.mk
@@ -156,7 +156,7 @@ define KernelPackage/drm-rp1-dpi
     CONFIG_DRM_TTM_HELPER=n
   FILES:=$(LINUX_DIR)/drivers/gpu/drm/rp1/rp1-dpi/drm-rp1-dpi.ko
   AUTOLOAD:=$(call AutoLoad,67,drm-rp1-dpi)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4
+  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-drm-vc4 +kmod-rp1-pio
 endef
 
 define KernelPackage/drm-rp1-dpi/description



From lede-commits at lists.infradead.org  Sat Jan  4 05:16:49 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:16:49 -0500
Subject: [openwrt/openwrt]  uboot-mediatek: fix Routerich AX3000 support patch
In-Reply-To: <173599660954.3037086.532643335196863963@git-01.infra.openwrt.org>
References: <173599660954.3037086.532643335196863963@git-01.infra.openwrt.org>
Message-ID: <mailman.31031.1735996614.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9f97e39a9336e279be7ea1c00c4221ec3f448457

commit 9f97e39a9336e279be7ea1c00c4221ec3f448457
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sun Dec 22 00:30:43 2024 +0800

    uboot-mediatek: fix Routerich AX3000 support patch
    
    It seems that the original patch has been manually modified. The
    newly added line number is incorrect.
    
    Fixes: c0581520b1c5 ("uboot-mediatek: add Routerich AX3000 support")
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17338
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch b/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
index 9aa31843de..f33ca07633 100644
--- a/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
+++ b/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7981_routerich_ax3000_defconfig
-@@ -0,0 +1,107 @@
+@@ -0,0 +1,108 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y



From lede-commits at lists.infradead.org  Sat Jan  4 05:16:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:16:50 -0500
Subject: [openwrt/openwrt]  uboot-mediatek: add missing LED command for
 OpenWrt One
In-Reply-To: <173599660954.3037086.532643335196863963@git-01.infra.openwrt.org>
References: <173599660954.3037086.532643335196863963@git-01.infra.openwrt.org>
Message-ID: <mailman.31032.1735996619.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5ef71eaafd4e128ec3708a66b5633214427da373

commit 5ef71eaafd4e128ec3708a66b5633214427da373
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sun Dec 22 00:31:06 2024 +0800

    uboot-mediatek: add missing LED command for OpenWrt One
    
    The u-boot LED command "led_loop_done" is missing from the OpenWrt
    One NAND flash u-boot. Copy it from the OpenWrt One NOR flash u-boot
    default environment to fix this issue.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17310
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17338
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
index 6c31d88be8..ed54cedbc3 100644
--- a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
+++ b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
@@ -520,7 +520,7 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       [33m$ver[0m"
 --- /dev/null
 +++ b/openwrt-one-spi-nand_env
-@@ -0,0 +1,61 @@
+@@ -0,0 +1,62 @@
 +ethaddr_factory=mtd read factory 0x46000000 0x0 0x20000 && env readmem -b ethaddr 0x4600002a 0x6 ; setenv ethaddr_factory
 +ipaddr=192.168.11.11
 +serverip=192.168.11.23
@@ -562,6 +562,7 @@
 +check_buttons=if button front ; then run boot_recovery ; run boot_tftp ; run led_loop_error ; else if button back ; then ; run usb_recover ; run led_loop_error ; fi ; fi
 +led_boot=led green on ; led white on ; led red on
 +led_done=led green on ; led white off ; led red off
++led_loop_done=led white off ; led green on ; echo done ; while true ; do  sleep 1 ; done
 +led_loop_error=led white off ; led green off ; while true ; do led red on ; sleep 1 ; led red off ; sleep 1 ; done
 +led_start=led white on ; led green off ; led red off
 +preboot=run led_boot



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:40 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:40 -0500
Subject: [openwrt/openwrt]  ramips: mmc-mtk: add more vendor driver register
 init values
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31037.1735998584.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f70cdfd682a87c9de942f9251fb5a0caaf43f7cf

commit f70cdfd682a87c9de942f9251fb5a0caaf43f7cf
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sat Jul 13 11:32:45 2024 +0800

    ramips: mmc-mtk: add more vendor driver register init values
    
    In the MTK vendor driver, mt762x SDXC registers MSDC_PATCH_BIT and
    MSDC_PATCH_BIT1 have different init values than upstream driver.
    These magical values should have some help for the stability.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...d-initialize-pad-delay-and-drive-strength.patch | 53 ++++++++++++++++++----
 1 file changed, 44 insertions(+), 9 deletions(-)

diff --git a/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
index 1d5c6dcd40..c3d13932ef 100644
--- a/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
+++ b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
@@ -4,6 +4,8 @@ Subject: [PATCH] mmc: mtk-sd: initialize the pad and tune registers
 
 Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
 ---
+ drivers/mmc/host/mtk-sd.c | 26 +++++++++++++++++++++++---
+ 1 file changed, 23 insertions(+), 3 deletions(-)
 
 --- a/drivers/mmc/host/mtk-sd.c
 +++ b/drivers/mmc/host/mtk-sd.c
@@ -20,19 +22,52 @@ Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
  #define PAD_DS_TUNE      0x188
  #define PAD_CMD_TUNE     0x18c
  #define EMMC51_CFG0	 0x204
-@@ -1795,6 +1799,16 @@ static void msdc_init_hw(struct msdc_hos
+@@ -400,6 +404,7 @@ struct mtk_mmc_compatible {
+ 	bool enhance_rx;
+ 	bool support_64g;
+ 	bool use_internal_cd;
++	bool legacy_mt762x; /* for mt7620, mt7621 and mt76x8 */
+ };
+ 
+ struct msdc_tune_para {
+@@ -537,6 +542,7 @@ static const struct mtk_mmc_compatible m
+ 	.stop_clk_fix = false,
+ 	.enhance_rx = false,
+ 	.use_internal_cd = true,
++	.legacy_mt762x = true,
+ };
+ 
+ static const struct mtk_mmc_compatible mt7622_compat = {
+@@ -1729,9 +1735,11 @@ static void msdc_init_hw(struct msdc_hos
+ 	}
+ 	writel(0, host->base + MSDC_IOCON);
+ 	sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
+-	writel(0x403c0046, host->base + MSDC_PATCH_BIT);
+-	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
+-	writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
++	if(!host->dev_comp->legacy_mt762x) {
++		writel(0x403c0046, host->base + MSDC_PATCH_BIT);
++		sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
++		writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
++	}
+ 	sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
+ 
+ 	if (host->dev_comp->stop_clk_fix) {
+@@ -1795,6 +1803,18 @@ static void msdc_init_hw(struct msdc_hos
  				     MSDC_PAD_TUNE_RXDLYSEL);
  	}
  
-+	/* Set pins drive strength */
-+	writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
-+	writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
-+	writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
++	if (host->dev_comp->legacy_mt762x) {
++		/* Set pins drive strength */
++		writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
++		writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
++		writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
 +
-+	/* Set pad delay */
-+	writel(0x84101010, host->base + MSDC_PAD_TUNE);
-+	writel(0x10101010, host->base + MSDC_PAD_TUNE0);
-+	writel(0x10101010, host->base + MSDC_PAD_TUNE1);
++		/* Set pad delay */
++		writel(0x84101010, host->base + MSDC_PAD_TUNE);
++		writel(0x10101010, host->base + MSDC_PAD_TUNE0);
++		writel(0x10101010, host->base + MSDC_PAD_TUNE1);
++	}
 +
  	if (mmc->caps2 & MMC_CAP2_NO_SDIO) {
  		sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO);



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:41 -0500
Subject: [openwrt/openwrt]  ramips: pinctrl: allow mux SDXC pins for mt76x8
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31038.1735998584.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/05ec3b50a8e673786dda0224b23f18b5d96a4a65

commit 05ec3b50a8e673786dda0224b23f18b5d96a4a65
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:06:10 2025 +0800

    ramips: pinctrl: allow mux SDXC pins for mt76x8
    
    The mt76x8 SDXC pin register definition is incompatible with the
    mtmips generic pinctrl driver structure. This hack allows us to
    mux the SDXC IO to different pin groups in device tree.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...trl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch | 105 +++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch b/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch
new file mode 100644
index 0000000000..69dcd7fb2c
--- /dev/null
+++ b/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch
@@ -0,0 +1,105 @@
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Wed, 1 Jan 2025 13:30:11 +0800
+Subject: [PATCH] pinctrl: mtmips: allow mux SDXC pins for mt76x8
+
+This is a hack to supprot two types of mt76x8 SDXC pinmaps:
+
+a) Use ethernet phy pins as SDXC IO.
+
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
+b) Use I2S/I2C/GPIO0/UART1 pins as SDXC IO.
+
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "i2s", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 24 ++++++++++++++++++++++-
+ 1 file changed, 22 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
+@@ -1,10 +1,13 @@
+ // SPDX-License-Identifier: GPL-2.0-only
+ 
++#include <asm/mach-ralink/ralink_regs.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/of.h>
+ #include "pinctrl-mtmips.h"
+ 
++#define SYSC_REG_AGPIO_CFG		0x3c
++
+ #define MT76X8_GPIO_MODE_MASK		0x3
+ 
+ #define MT76X8_GPIO_MODE_P4LED_KN	58
+@@ -26,6 +29,7 @@
+ #define MT76X8_GPIO_MODE_I2C		20
+ #define MT76X8_GPIO_MODE_REFCLK		18
+ #define MT76X8_GPIO_MODE_PERST		16
++#define MT76X8_GPIO_MODE_ESD		15
+ #define MT76X8_GPIO_MODE_WDT		14
+ #define MT76X8_GPIO_MODE_SPI		12
+ #define MT76X8_GPIO_MODE_SDMODE		10
+@@ -74,6 +78,12 @@ static struct mtmips_pmx_func refclk_grp
+ static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
+ static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
+ static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
++/*
++ * "esd" (Ethernet SDXC) group supports two mode:
++ * "gpio" - SDXC mux to I2S/I2C/GPIO0/UART1 pins with "gpio" mode
++ * "iot"  - SDXC mux to EPHY pins, eth p1-p4 pad must be set to "digital"
++ */
++static struct mtmips_pmx_func esd_grp[] = { FUNC("iot", 0, 47, 1) };
+ 
+ static struct mtmips_pmx_func sd_mode_grp[] = {
+ 	FUNC("jtag", 3, 22, 8),
+@@ -216,6 +226,7 @@ static struct mtmips_pmx_group mt76x8_pi
+ 	GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST),
+ 	GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT),
+ 	GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI),
++	GRP("esd", esd_grp, 1, MT76X8_GPIO_MODE_ESD),
+ 	GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK,
+ 				1, MT76X8_GPIO_MODE_SDMODE),
+ 	GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK,
+@@ -257,7 +268,18 @@ static struct mtmips_pmx_group mt76x8_pi
+ 
+ static int mt76x8_pinctrl_probe(struct platform_device *pdev)
+ {
+-	return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	int ret;
++
++	ret = mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	if (ret)
++		return ret;
++
++	if (of_property_present(pdev->dev.of_node, "ephy-analog"))
++		rt_sysc_m32(0xf << 17, 0, SYSC_REG_AGPIO_CFG);
++	else if (of_property_present(pdev->dev.of_node, "ephy-digital"))
++		rt_sysc_m32(0xf << 17, 0xf << 17, SYSC_REG_AGPIO_CFG);
++
++	return ret;
+ }
+ 
+ static const struct of_device_id mt76x8_pinctrl_match[] = {



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:42 -0500
Subject: [openwrt/openwrt]  ramips: add back SDXC card reader support for
 HiWiFi HC5x61A
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31041.1735998585.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/cea4aae0a921d71407d11957502f8cc3b652be21

commit cea4aae0a921d71407d11957502f8cc3b652be21
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:06:38 2025 +0800

    ramips: add back SDXC card reader support for HiWiFi HC5x61A
    
    After adding the correct package and pin group configurations,
    the SDXC card slot can now function properly.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts | 20 +++++++++++++++++++-
 target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts | 18 +++++++++++++++++-
 target/linux/ramips/image/mt76x8.mk                 |  3 ++-
 3 files changed, 38 insertions(+), 3 deletions(-)

diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts b/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
index 9e4068ce8c..52cd3afac8 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
 #include "mt7628an_hiwifi_hc5x61a.dtsi"
 
 / {
@@ -25,9 +27,25 @@
 	};
 };
 
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_router_mode>;
+	pinctrl-1 = <&sdxc_router_mode>;
+};
+
 &state_default {
 	gpio {
-		groups = "i2c", "refclk", "wdt", "wled_an";
+		groups = "i2s", "refclk", "wdt", "wled_an";
 		function = "gpio";
 	};
 };
diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
index 5ec041c804..940df6e19a 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
@@ -44,9 +44,25 @@
 	};
 };
 
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_router_mode>;
+	pinctrl-1 = <&sdxc_router_mode>;
+};
+
 &state_default {
 	gpio {
-		groups = "i2c", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
+		groups = "i2s", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
 		function = "gpio";
 	};
 };
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index 25a7344afb..da44b0005c 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -289,6 +289,7 @@ define Device/hiwifi_hc5661a
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5661A
+  DEVICE_PACKAGES := kmod-mmc-mtk
   SUPPORTED_DEVICES += hc5661a
 endef
 TARGET_DEVICES += hiwifi_hc5661a
@@ -297,7 +298,7 @@ define Device/hiwifi_hc5761a
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5761A
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x0e kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += hiwifi_hc5761a
 



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:43 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:43 -0500
Subject: [openwrt/openwrt]  ramips: fix SDXC function for mt76x8 one eth port
 devices
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31042.1735998587.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f5996ae947c88461029060d74ace6a85a30dd9fd

commit f5996ae947c88461029060d74ace6a85a30dd9fd
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:16:29 2025 +0800

    ramips: fix SDXC function for mt76x8 one eth port devices
    
    There are only 5 devices in mt76x8 sub-target selected the MTK SDXC
    driver package. And they are all single ethernet port routers or dev
    boards:
    
    * LinkIt Smart 7688
    * Onion Omega2+
    * RAVPower RP-WD009
    * VoCore VoCore2
    * VoCore VoCore2-Lite
    
    For these devices, they are using the ephy p1 - p4 as the SDXC IO
    pins. Therefore, these GPIO pads must be configured in "digital"
    IO mode.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../dts/mt7628an_mediatek_linkit-smart-7688.dts    | 19 ++++++++++++++++++
 target/linux/ramips/dts/mt7628an_onion_omega2.dtsi | 19 ++++++++++++++++++
 .../ramips/dts/mt7628an_ravpower_rp-wd009.dts      | 19 ++++++++++++++++++
 .../linux/ramips/dts/mt7628an_vocore_vocore2.dtsi  | 23 ++++++++++++++++++++++
 4 files changed, 80 insertions(+)

diff --git a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
index 34ef15eca0..fab70dc7b7 100644
--- a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
+++ b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
@@ -168,8 +168,27 @@
 	nvmem-cell-names = "mac-address";
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 	cd-inverted;
 };
 
diff --git a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
index d279cbcfb8..2d45e0385f 100644
--- a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
+++ b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
@@ -170,8 +170,27 @@
 	nvmem-cell-names = "mac-address";
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts b/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
index 607787f68e..71c77d7ae6 100644
--- a/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
+++ b/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
@@ -84,6 +84,22 @@
 	};
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &state_default {
 	gpio {
 		groups = "uart1", "wled_an", "p0led_an", "p2led_an", "p3led_an",
@@ -94,6 +110,9 @@
 
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 };
 
 &i2c {
diff --git a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
index 4982d8bccc..da2026ec7d 100644
--- a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
+++ b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
@@ -68,6 +68,22 @@
 	};
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &state_default {
 	gpio {
 		groups = "wled_an", "refclk", "wdt";
@@ -75,6 +91,13 @@
 	};
 };
 
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
+};
+
 &wmac {
 	status = "okay";
 



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:44 -0500
Subject: [openwrt/openwrt]  ramips: make package kmod-sdhci-mt7620 conflict
 with kmod-mmc-mtk
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31043.1735998588.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0764e3008228bbdafb5e4a9837fe9efec7e138a0

commit 0764e3008228bbdafb5e4a9837fe9efec7e138a0
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:17:08 2025 +0800

    ramips: make package kmod-sdhci-mt7620 conflict with kmod-mmc-mtk
    
    These two packages are SDXC drivers for Mediatek mt762x series SoCs.
    One is upstream implementation, and the other is downstream driver.
    Installing them together will result in conflicts.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/modules.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ramips/modules.mk b/target/linux/ramips/modules.mk
index ced479dc93..175ba94eff 100644
--- a/target/linux/ramips/modules.mk
+++ b/target/linux/ramips/modules.mk
@@ -47,6 +47,7 @@ $(eval $(call KernelPackage,pwm-mediatek-ramips))
 define KernelPackage/sdhci-mt7620
   SUBMENU:=Other modules
   TITLE:=MT7620 SDCI
+  CONFLICTS:=kmod-mmc-mtk
   DEPENDS:=@(TARGET_ramips_mt7620||TARGET_ramips_mt76x8||TARGET_ramips_mt7621) +kmod-mmc
   KCONFIG:= \
 	CONFIG_MTK_MMC \



From lede-commits at lists.infradead.org  Sat Jan  4 05:49:45 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:49:45 -0500
Subject: [openwrt/openwrt]  ramips: mtk-mmc: remove nt76x8 pinctrl hack
In-Reply-To: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
References: <173599858073.3092047.10649738121562450748@git-01.infra.openwrt.org>
Message-ID: <mailman.31044.1735998588.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b4a9f85c1394f13806fc2f51f5f6f23494773d7e

commit b4a9f85c1394f13806fc2f51f5f6f23494773d7e
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:17:53 2025 +0800

    ramips: mtk-mmc: remove nt76x8 pinctrl hack
    
    Now we can set the mt76x8 SDXC pinmux in device tree.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
index df95900a26..a9c242bfd3 100644
--- a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
+++ b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
@@ -2210,12 +2210,6 @@ static int msdc_drv_probe(struct platform_device *pdev)
 	struct msdc_hw *hw;
 	int ret;
 
-	//FIXME: this should be done by pinconf and not by the sd driver
-	if ((ralink_soc == MT762X_SOC_MT7688 ||
-	     ralink_soc == MT762X_SOC_MT7628AN) &&
-	    (!(rt_sysc_r32(0x60) & BIT(15))))
-		rt_sysc_m32(0xf << 17, 0xf << 17, 0x3c);
-
 	hw = &msdc0_hw;
 
 	if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))



From lede-commits at lists.infradead.org  Sat Jan  4 05:59:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 08:59:31 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: add support for lan3 and lan4 on
 AVM 5490/5491
In-Reply-To: <173599917104.3112386.5519221606602720938@git-01.infra.openwrt.org>
References: <173599917104.3112386.5519221606602720938@git-01.infra.openwrt.org>
Message-ID: <mailman.31049.1735999231.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/14be320291e0c00a1291ad8bd220fd37b12ba138

commit 14be320291e0c00a1291ad8bd220fd37b12ba138
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Fri Jan 3 19:59:22 2025 +0100

    lantiq: xrx200: add support for lan3 and lan4 on AVM 5490/5491
    
    On the AVM 5490/5491, lan1, lan2 and wan ports are connected directly
    to the internal GSWIP switch. The lan3 and lan4 ports are connected via
    an external QCA8334 switch. This commit adds the missing entries in dts
    and adds the driver module.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17473
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi    | 66 ++++++++++++++++++++++
 target/linux/lantiq/image/vr9.mk                   |  4 +-
 .../xrx200/base-files/etc/board.d/02_network       |  6 +-
 3 files changed, 70 insertions(+), 6 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
index b38ac9f8b8..2ba8e680b4 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
@@ -46,6 +46,61 @@
 	phy9: ethernet-phy at 9 {
 		reg = <0x09>;
 	};
+
+	switch at 0 {
+		compatible = "qca,qca8334";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reg = <0>;
+
+		dsa,member = <1 0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				ethernet = <&rgmii0>;
+				phy-mode = "rgmii-txid";
+				tx-internal-delay-ps = <3000>;
+
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+
+			port at 2 {
+				reg = <2>;
+				label = "lan3";
+				phy-mode = "internal";
+				phy-handle = <&phy_port2>;
+			};
+
+			port at 3 {
+				reg = <3>;
+				label = "lan4";
+				phy-mode = "internal";
+				phy-handle = <&phy_port3>;
+			};
+		};
+
+		mdio {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy_port2: phy at 1 {
+				reg = <1>;
+			};
+
+			phy_port3: phy at 2 {
+				reg = <2>;
+			};
+		};
+	};
 };
 
 &gswip_ports {
@@ -56,6 +111,17 @@
 		phy-handle = <&phy6>;
 	};
 
+	rgmii0: port at 1 {
+		reg = <1>;
+		label = "sw0";
+		phy-mode = "rgmii";
+
+		fixed-link {
+			speed = <1000>;
+			full-duplex;
+		};
+	};
+
 	port at 2 {
 		reg = <2>;
 		label = "lan2";
diff --git a/target/linux/lantiq/image/vr9.mk b/target/linux/lantiq/image/vr9.mk
index e2608213dc..48a372f476 100644
--- a/target/linux/lantiq/image/vr9.mk
+++ b/target/linux/lantiq/image/vr9.mk
@@ -177,7 +177,7 @@ define Device/avm_fritz5490
   DEVICE_VARIANT := Other NAND
   KERNEL_SIZE := 4096k
   IMAGE_SIZE := 49152k
-  DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
+  DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
 	-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
 	-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
 	-ltq-vdsl-vr9-app -kmod-owl-loader \
@@ -195,7 +195,7 @@ define Device/avm_fritz5490-micron
   DEVICE_VARIANT := Micron NAND
   KERNEL_SIZE := 4096k
   IMAGE_SIZE := 49152k
-  DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
+  DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
 	-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
 	-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
 	-ltq-vdsl-vr9-app -kmod-owl-loader \
diff --git a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
index 6c35c7a4de..8c2cdb12af 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
+++ b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
@@ -14,15 +14,13 @@ lantiq_setup_interfaces()
 	arcadyan,arv7519rw22)
 		ucidef_set_interface_lan "lan1 lan2 lan3 lan4 lan5"
 		;;
-	avm,fritz5490|\
-	avm,fritz5490-micron)
-		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
-		;;
 	arcadyan,vgv7510kw22-brn|\
 	arcadyan,vgv7510kw22-nor|\
 	arcadyan,vgv7519-brn|\
 	arcadyan,vgv7519-nor|\
 	arcadyan,vrv9510kwac23|\
+	avm,fritz5490|\
+	avm,fritz5490-micron|\
 	bt,homehub-v5a|\
 	lantiq,easy80920-nand|\
 	lantiq,easy80920-nor|\



From lede-commits at lists.infradead.org  Sat Jan  4 06:15:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 09:15:18 -0500
Subject: [openwrt/openwrt]  bcm53xx: backport nvmem mac for meraki mr26
In-Reply-To: <173600011845.3133048.7549925428094994810@git-01.infra.openwrt.org>
References: <173600011845.3133048.7549925428094994810@git-01.infra.openwrt.org>
Message-ID: <mailman.31052.1736000122.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/58056df84f6dfd0c86d45e2e22d715a3c501ce1e

commit 58056df84f6dfd0c86d45e2e22d715a3c501ce1e
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Sun Nov 24 12:43:07 2024 -0800

    bcm53xx: backport nvmem mac for meraki mr26
    
    Avoids having to set the MAC in userspace.
    
    Also added a mac-base change to set the wifi MACs. It's not clear if
    upstream would want it once mac-base is upstreamed.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17064
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../bcm53xx/base-files/etc/board.d/02_network      |  5 --
 .../etc/hotplug.d/ieee80211/10-fix-mac-address     | 18 ------
 ...dts-meraki-mr26-set-mac-address-for-gmac0.patch | 52 +++++++++++++++++
 .../051-ARM-dts-meraki-mr26-wifi-MACs-in-dts.patch | 67 ++++++++++++++++++++++
 4 files changed, 119 insertions(+), 23 deletions(-)

diff --git a/target/linux/bcm53xx/base-files/etc/board.d/02_network b/target/linux/bcm53xx/base-files/etc/board.d/02_network
index 19569e7a78..5edf6ec9b8 100644
--- a/target/linux/bcm53xx/base-files/etc/board.d/02_network
+++ b/target/linux/bcm53xx/base-files/etc/board.d/02_network
@@ -71,11 +71,6 @@ bcm53xx_setup_macs()
 		etXmacaddr=$(nvram get et0macaddr)
 		offset=5
 		;;
-	meraki,mr26)
-		label_mac="$(mtd_get_mac_binary_ubi board-config 0x66)"
-		ucidef_set_interface_macaddr "lan" "$label_mac"
-		ucidef_set_label_macaddr "$label_mac"
-		;;
 	meraki,mx64 | \
 	meraki,mx64-a0 | \
 	meraki,mx65)
diff --git a/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address b/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address
deleted file mode 100644
index c1c56a10f3..0000000000
--- a/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address
+++ /dev/null
@@ -1,18 +0,0 @@
-#!/bin/ash
-
-[ "$ACTION" = "add" ] || exit 0
-
-PHYNBR=${DEVPATH##*/phy}
-
-[ -n $PHYNBR ] || exit 0
-
-. /lib/functions.sh
-. /lib/functions/system.sh
-
-board=$(board_name)
-
-case "$board" in
-meraki,mr26)
-	macaddr_add "$(macaddr_setbit_la $(mtd_get_mac_binary_ubi 'board-config' 0x66))" $(($PHYNBR * 8 + 1)) > /sys${DEVPATH}/macaddress
-	;;
-esac
diff --git a/target/linux/bcm53xx/patches-6.6/050-v6.13-ARM-dts-meraki-mr26-set-mac-address-for-gmac0.patch b/target/linux/bcm53xx/patches-6.6/050-v6.13-ARM-dts-meraki-mr26-set-mac-address-for-gmac0.patch
new file mode 100644
index 0000000000..f6a6f819d1
--- /dev/null
+++ b/target/linux/bcm53xx/patches-6.6/050-v6.13-ARM-dts-meraki-mr26-set-mac-address-for-gmac0.patch
@@ -0,0 +1,52 @@
+From ad1915e2070cf832bfb81dcbeb44b073c09e6dcc Mon Sep 17 00:00:00 2001
+From: Rosen Penev <rosenp at gmail.com>
+Date: Sun, 20 Oct 2024 18:51:47 -0700
+Subject: [PATCH] ARM: dts: meraki-mr26: set mac address for gmac0
+
+Currently this needs to be done in userspace.
+
+Signed-off-by: Rosen Penev <rosenp at gmail.com>
+Link: https://lore.kernel.org/r/20241021015147.172700-1-rosenp at gmail.com
+Signed-off-by: Florian Fainelli <florian.fainelli at broadcom.com>
+---
+ .../dts/broadcom/bcm53015-meraki-mr26.dts     | 20 +++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
++++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+@@ -59,6 +59,9 @@
+ 
+ &gmac0 {
+ 	status = "okay";
++
++	nvmem-cells = <&macaddr_board_config_66>;
++	nvmem-cell-names = "mac-address";
+ };
+ 
+ &gmac1 {
+@@ -102,8 +105,25 @@
+ 		};
+ 
+ 		partition at 800000 {
++			compatible = "linux,ubi";
+ 			label = "ubi";
+ 			reg = <0x800000 0x7780000>;
++
++			volumes {
++				ubi-volume-board-config {
++					volname = "board-config";
++
++					nvmem-layout {
++						compatible = "fixed-layout";
++						#address-cells = <1>;
++						#size-cells = <1>;
++
++						macaddr_board_config_66: macaddr at 66 {
++							reg = <0x66 0x6>;
++						};
++					};
++				};
++			};
+ 		};
+ 	};
+ };
diff --git a/target/linux/bcm53xx/patches-6.6/051-ARM-dts-meraki-mr26-wifi-MACs-in-dts.patch b/target/linux/bcm53xx/patches-6.6/051-ARM-dts-meraki-mr26-wifi-MACs-in-dts.patch
new file mode 100644
index 0000000000..fd31438cdb
--- /dev/null
+++ b/target/linux/bcm53xx/patches-6.6/051-ARM-dts-meraki-mr26-wifi-MACs-in-dts.patch
@@ -0,0 +1,67 @@
+From c18e0b14b466fb0aa17c8ca6e61f16ba1254aebd Mon Sep 17 00:00:00 2001
+From: Rosen Penev <rosenp at gmail.com>
+Date: Sun, 24 Nov 2024 12:58:51 -0800
+Subject: [PATCH] ARM: dts: meraki-mr26: wifi MACs in dts
+
+OPENWRT HACK. Probably will not be accepted upstream.
+
+Signed-off-by: Rosen Penev <rosenp at gmail.com>
+---
+ .../dts/broadcom/bcm53015-meraki-mr26.dts     | 31 ++++++++++++++++++-
+ 1 file changed, 30 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
++++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+@@ -60,7 +60,7 @@
+ &gmac0 {
+ 	status = "okay";
+ 
+-	nvmem-cells = <&macaddr_board_config_66>;
++	nvmem-cells = <&macaddr_board_config_66 0>;
+ 	nvmem-cell-names = "mac-address";
+ };
+ 
+@@ -74,6 +74,33 @@
+ 	status = "disabled";
+ };
+ 
++&pcie0 {
++	wifi at 0,0 {
++		reg = <0x0000 0 0 0 0>;
++		compatible = "brcm,bcm43431";
++		nvmem-cells = <&macaddr_board_config_66 1>;
++		nvmem-cell-names = "mac-address";
++	};
++};
++
++&pcie1 {
++	wifi at 0,0 {
++		reg = <0x0000 0 0 0 0>;
++		compatible = "brcm,bcm43431";
++		nvmem-cells = <&macaddr_board_config_66 2>;
++		nvmem-cell-names = "mac-address";
++	};
++};
++
++&pcie2 {
++	wifi at 0,0 {
++		reg = <0x0000 0 0 0 0>;
++		compatible = "brcm,bcm43428";
++		nvmem-cells = <&macaddr_board_config_66 3>;
++		nvmem-cell-names = "mac-address";
++	};
++};
++
+ &nandcs {
+ 	partitions {
+ 		compatible = "fixed-partitions";
+@@ -119,7 +146,9 @@
+ 						#size-cells = <1>;
+ 
+ 						macaddr_board_config_66: macaddr at 66 {
++							compatible = "mac-base";
+ 							reg = <0x66 0x6>;
++							#nvmem-cell-cells = <1>;
+ 						};
+ 					};
+ 				};



From lede-commits at lists.infradead.org  Sat Jan  4 07:29:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 10:29:47 -0500
Subject: [openwrt/openwrt]  base-files: strip space and tab characters from
 ASCII mac address
In-Reply-To: <173600458654.3225113.6585420474355538436@git-01.infra.openwrt.org>
References: <173600458654.3225113.6585420474355538436@git-01.infra.openwrt.org>
Message-ID: <mailman.31064.1736004592.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/551e04f3c9c063d885ca7a91db36f27f684a3a5c

commit 551e04f3c9c063d885ca7a91db36f27f684a3a5c
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Mon Dec 16 15:09:50 2024 +0800

    base-files: strip space and tab characters from ASCII mac address
    
    Spaces and tabs are widely used in variable definitions. We have to
    remove them to ensure that get_mac_ascii() works properly.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17262
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/base-files/files/lib/functions/system.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/base-files/files/lib/functions/system.sh b/package/base-files/files/lib/functions/system.sh
index aaeb75f261..f43281b5dc 100644
--- a/package/base-files/files/lib/functions/system.sh
+++ b/package/base-files/files/lib/functions/system.sh
@@ -66,7 +66,7 @@ get_mac_ascii() {
 	local key="$2"
 	local mac_dirty
 
-	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p' | head -n 1)
+	mac_dirty=$(strings "$part" | tr -d ' \t' | sed -n 's/^'"$key"'=//p' | head -n 1)
 
 	# "canonicalize" mac
 	[ -n "$mac_dirty" ] && macaddr_canonicalize "$mac_dirty"



From lede-commits at lists.infradead.org  Sat Jan  4 07:29:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 10:29:46 -0500
Subject: [openwrt/openwrt]  base-files: enable get_mac_ascii() to handle
 redundant strings
In-Reply-To: <173600458654.3225113.6585420474355538436@git-01.infra.openwrt.org>
References: <173600458654.3225113.6585420474355538436@git-01.infra.openwrt.org>
Message-ID: <mailman.31065.1736004592.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3410ad2f40c085e5db7a71f6ae4b80734826a1e3

commit 3410ad2f40c085e5db7a71f6ae4b80734826a1e3
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Fri Dec 13 13:30:38 2024 +0800

    base-files: enable get_mac_ascii() to handle redundant strings
    
    The function get_mac_ascii() will fail when there are two or more
    same MAC address variable names in the mtd partition. Only retain
    the first variable to workaround this rare situation.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17236
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17262
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/base-files/files/lib/functions/system.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/base-files/files/lib/functions/system.sh b/package/base-files/files/lib/functions/system.sh
index 048e32f0e1..aaeb75f261 100644
--- a/package/base-files/files/lib/functions/system.sh
+++ b/package/base-files/files/lib/functions/system.sh
@@ -66,7 +66,7 @@ get_mac_ascii() {
 	local key="$2"
 	local mac_dirty
 
-	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p')
+	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p' | head -n 1)
 
 	# "canonicalize" mac
 	[ -n "$mac_dirty" ] && macaddr_canonicalize "$mac_dirty"



From lede-commits at lists.infradead.org  Sat Jan  4 08:16:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 11:16:31 -0500
Subject: [openwrt/openwrt]  rockchip: enable USB3 port on NanoPC T6
In-Reply-To: <173600739069.3301064.1075122516547862989@git-01.infra.openwrt.org>
References: <173600739069.3301064.1075122516547862989@git-01.infra.openwrt.org>
Message-ID: <mailman.31066.1736007394.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/096e3f26efd880dca202422804124e10dbffd648

commit 096e3f26efd880dca202422804124e10dbffd648
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Mon Dec 23 21:13:24 2024 +0800

    rockchip: enable USB3 port on NanoPC T6
    
    Enable the USB3 port on FriendlyELEC NanoPC-T6.
    
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17349
    (cherry picked from commit 6881b48dc603e25320a14e11c5e1797321891b76)
    Link: https://github.com/openwrt/openwrt/pull/17466
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...m64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch | 87 ++++++++++++++++++++++
 ...ts-rockchip-lower-mmc-speed-for-nanopc-t6.patch |  2 +-
 2 files changed, 88 insertions(+), 1 deletion(-)

diff --git a/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch
new file mode 100644
index 0000000000..d3aa8b9cc3
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/055-16-v6.13-arm64-dts-rockchip-enable-USB3-on-NanoPC-T6.patch
@@ -0,0 +1,87 @@
+From a6ae420439dc47a58550a6e61e596e9dd1562caf Mon Sep 17 00:00:00 2001
+From: Rick Wertenbroek <rick.wertenbroek at gmail.com>
+Date: Wed, 6 Nov 2024 14:03:13 +0100
+Subject: [PATCH] arm64: dts: rockchip: enable USB3 on NanoPC-T6
+
+Enable the USB3 port on FriendlyELEC NanoPC-T6.
+
+Signed-off-by: Rick Wertenbroek <rick.wertenbroek at gmail.com>
+Link: https://lore.kernel.org/r/20241106130314.1289055-1-rick.wertenbroek at gmail.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ .../boot/dts/rockchip/rk3588-nanopc-t6.dtsi   | 36 +++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+@@ -160,6 +160,20 @@
+ 		vin-supply = <&vcc5v0_sys>;
+ 	};
+ 
++	vbus5v0_usb: vbus5v0-usb-regulator {
++		compatible = "regulator-fixed";
++		enable-active-high;
++		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&usb5v_pwren>;
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-name = "vbus5v0_usb";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		vin-supply = <&vcc5v0_sys>;
++	};
++
+ 	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
+ 		compatible = "regulator-fixed";
+ 		enable-active-high;
+@@ -577,6 +591,10 @@
+ 			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ 		};
+ 
++		usb5v_pwren: usb5v_pwren {
++			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
+ 		usbc0_int: usbc0-int {
+ 			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ 		};
+@@ -976,6 +994,14 @@
+ 	status = "okay";
+ };
+ 
++&u2phy1 {
++	status = "okay";
++};
++
++&u2phy1_otg {
++	status = "okay";
++};
++
+ &u2phy2_host {
+ 	status = "okay";
+ };
+@@ -1015,6 +1041,11 @@
+ 	};
+ };
+ 
++&usbdp_phy1 {
++	phy-supply = <&vbus5v0_usb>;
++	status = "okay";
++};
++
+ &usb_host0_ehci {
+ 	status = "okay";
+ };
+@@ -1035,6 +1066,11 @@
+ 	};
+ };
+ 
++&usb_host1_xhci {
++	dr_mode = "host";
++	status = "okay";
++};
++
+ &usb_host1_ehci {
+ 	status = "okay";
+ };
diff --git a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
index bbcff01790..1b76fac103 100644
--- a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
+++ b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
-@@ -616,7 +616,7 @@
+@@ -634,7 +634,7 @@
  	disable-wp;
  	no-mmc;
  	no-sdio;



From lede-commits at lists.infradead.org  Sat Jan  4 08:16:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 11:16:30 -0500
Subject: [openwrt/openwrt]  rockchip: backport recent rk3588 clk updates
In-Reply-To: <173600739069.3301064.1075122516547862989@git-01.infra.openwrt.org>
References: <173600739069.3301064.1075122516547862989@git-01.infra.openwrt.org>
Message-ID: <mailman.31067.1736007394.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/767ad6492139c151e22f7ef61f8d66f454cca849

commit 767ad6492139c151e22f7ef61f8d66f454cca849
Author: Tianling Shen <cnsztl at immortalwrt.org>
AuthorDate: Mon Dec 23 19:07:13 2024 +0800

    rockchip: backport recent rk3588 clk updates
    
    Backport recent rk3588 clk updates from upstream,
    including one bug fix.
    
    Signed-off-by: Tianling Shen <cnsztl at immortalwrt.org>
    Link: https://github.com/openwrt/openwrt/pull/17349
    (cherry picked from commit 8ad02ca2f8477b1cfdc5ea6124fae60c07687aa1)
    Link: https://github.com/openwrt/openwrt/pull/17466
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch | 51 +++++++++++++++++
 ...6.12-clk-rockchip-rk3588-drop-unused-code.patch | 65 ++++++++++++++++++++++
 ...-rockchip-fix-finding-of-maximum-clock-ID.patch | 29 ++++++++++
 3 files changed, 145 insertions(+)

diff --git a/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch
new file mode 100644
index 0000000000..0d68f687fa
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-09-v6.12-clk-rockchip-Add-new-pll-type-pll_rk3588_ddr.patch
@@ -0,0 +1,51 @@
+From e781bffc296766b55dbd048890d558655031e8d1 Mon Sep 17 00:00:00 2001
+From: Elaine Zhang <zhangqing at rock-chips.com>
+Date: Wed, 28 Aug 2024 15:42:52 +0000
+Subject: [PATCH] clk: rockchip: Add new pll type pll_rk3588_ddr
+
+That PLL type is similar to the other rk3588 pll types but the actual
+rate is twice the configured rate.
+Therefore, the returned calculated rate must be multiplied by two.
+
+Signed-off-by: Elaine Zhang <zhangqing at rock-chips.com>
+Signed-off-by: Detlev Casanova <detlev.casanova at collabora.com>
+Acked-by: Dragan Simic <dsimic at manjaro.org>
+Link: https://lore.kernel.org/r/0102019199a76ec4-9d5846d4-d76a-4e69-a241-c88c2983d607-000000 at eu-west-1.amazonses.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ drivers/clk/rockchip/clk-pll.c | 6 +++++-
+ drivers/clk/rockchip/clk.h     | 1 +
+ 2 files changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/rockchip/clk-pll.c
++++ b/drivers/clk/rockchip/clk-pll.c
+@@ -914,7 +914,10 @@ static unsigned long rockchip_rk3588_pll
+ 	}
+ 	rate64 = rate64 >> cur.s;
+ 
+-	return (unsigned long)rate64;
++	if (pll->type == pll_rk3588_ddr)
++		return (unsigned long)rate64 * 2;
++	else
++		return (unsigned long)rate64;
+ }
+ 
+ static int rockchip_rk3588_pll_set_params(struct rockchip_clk_pll *pll,
+@@ -1167,6 +1170,7 @@ struct clk *rockchip_clk_register_pll(st
+ 		break;
+ 	case pll_rk3588:
+ 	case pll_rk3588_core:
++	case pll_rk3588_ddr:
+ 		if (!pll->rate_table)
+ 			init.ops = &rockchip_rk3588_pll_clk_norate_ops;
+ 		else
+--- a/drivers/clk/rockchip/clk.h
++++ b/drivers/clk/rockchip/clk.h
+@@ -287,6 +287,7 @@ enum rockchip_pll_type {
+ 	pll_rk3399,
+ 	pll_rk3588,
+ 	pll_rk3588_core,
++	pll_rk3588_ddr,
+ };
+ 
+ #define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
diff --git a/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch
new file mode 100644
index 0000000000..0164bf26e5
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-10-v6.12-clk-rockchip-rk3588-drop-unused-code.patch
@@ -0,0 +1,65 @@
+From 2e7b3daa8cb1ebd17e6a7f417ef5e6553203035c Mon Sep 17 00:00:00 2001
+From: Sebastian Reichel <sebastian.reichel at collabora.com>
+Date: Mon, 25 Mar 2024 20:33:32 +0100
+Subject: [PATCH] clk: rockchip: rk3588: drop unused code
+
+All clocks are registered early using CLK_OF_DECLARE(), which marks
+the DT node as processed. For the processed DT node the probe routine
+is never called. Thus this whole code is never executed. This could
+be "fixed" by using CLK_OF_DECLARE_DRIVER, which avoids marking the
+DT node as processed. But then the probe routine would re-register
+all the clocks by calling rk3588_clk_init() again.
+
+Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
+Link: https://lore.kernel.org/r/20240325193609.237182-2-sebastian.reichel at collabora.com
+Signed-off-by: Heiko Stuebner <heiko at sntech.de>
+---
+ drivers/clk/rockchip/clk-rk3588.c | 40 -------------------------------
+ 1 file changed, 40 deletions(-)
+
+--- a/drivers/clk/rockchip/clk-rk3588.c
++++ b/drivers/clk/rockchip/clk-rk3588.c
+@@ -2502,43 +2502,3 @@ static void __init rk3588_clk_init(struc
+ }
+ 
+ CLK_OF_DECLARE(rk3588_cru, "rockchip,rk3588-cru", rk3588_clk_init);
+-
+-struct clk_rk3588_inits {
+-	void (*inits)(struct device_node *np);
+-};
+-
+-static const struct clk_rk3588_inits clk_3588_cru_init = {
+-	.inits = rk3588_clk_init,
+-};
+-
+-static const struct of_device_id clk_rk3588_match_table[] = {
+-	{
+-		.compatible = "rockchip,rk3588-cru",
+-		.data = &clk_3588_cru_init,
+-	},
+-	{ }
+-};
+-
+-static int __init clk_rk3588_probe(struct platform_device *pdev)
+-{
+-	const struct clk_rk3588_inits *init_data;
+-	struct device *dev = &pdev->dev;
+-
+-	init_data = device_get_match_data(dev);
+-	if (!init_data)
+-		return -EINVAL;
+-
+-	if (init_data->inits)
+-		init_data->inits(dev->of_node);
+-
+-	return 0;
+-}
+-
+-static struct platform_driver clk_rk3588_driver = {
+-	.driver		= {
+-		.name	= "clk-rk3588",
+-		.of_match_table = clk_rk3588_match_table,
+-		.suppress_bind_attrs = true,
+-	},
+-};
+-builtin_platform_driver_probe(clk_rk3588_driver, clk_rk3588_probe);
diff --git a/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch
new file mode 100644
index 0000000000..912c2c7778
--- /dev/null
+++ b/target/linux/rockchip/patches-6.6/030-11-v6.13-clk-rockchip-fix-finding-of-maximum-clock-ID.patch
@@ -0,0 +1,29 @@
+From ad1081a0da2744141d12e94ff816ac91feb871ca Mon Sep 17 00:00:00 2001
+From: Yao Zi <ziyao at disroot.org>
+Date: Thu, 12 Sep 2024 13:32:05 +0000
+Subject: [PATCH] clk: rockchip: fix finding of maximum clock ID
+
+If an ID of a branch's child is greater than current maximum, we should
+set new maximum to the child's ID, instead of its parent's.
+
+Fixes: 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage")
+Signed-off-by: Yao Zi <ziyao at disroot.org>
+Link: https://lore.kernel.org/r/20240912133204.29089-2-ziyao at disroot.org
+Reviewed-by: Sebastian Reichel <sebastian.reichel at collabora.com>
+Reviewed-by: Heiko Stuebner <heiko at sntech.de>
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
+---
+ drivers/clk/rockchip/clk.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/rockchip/clk.c
++++ b/drivers/clk/rockchip/clk.c
+@@ -439,7 +439,7 @@ unsigned long rockchip_clk_find_max_clk_
+ 		if (list->id > max)
+ 			max = list->id;
+ 		if (list->child && list->child->id > max)
+-			max = list->id;
++			max = list->child->id;
+ 	}
+ 
+ 	return max;



From lede-commits at lists.infradead.org  Sat Jan  4 09:12:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 12:12:14 -0500
Subject: [openwrt/openwrt]  include/trusted-firmware-a.mk: unset CC before
 compiling
In-Reply-To: <173601073495.3392491.13823059039370970455@git-01.infra.openwrt.org>
References: <173601073495.3392491.13823059039370970455@git-01.infra.openwrt.org>
Message-ID: <mailman.31098.1736010738.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4baa20ec661725550a830e7c86f9f75cbb1fbc4b

commit 4baa20ec661725550a830e7c86f9f75cbb1fbc4b
Author: Thomas Richard <thomas.richard at bootlin.com>
AuthorDate: Fri Jan 3 10:19:05 2025 +0100

    include/trusted-firmware-a.mk: unset CC before compiling
    
    If CC is explicitly set to a non default value, TF-A keeps this value.
    Otherwise it assigns generic default value.
    As the build bot set CC=/usr/bin/gcc-10, TF-A uses it which causes a
    compile issue.
    So unset CC before compiling.
    
    It's a new behavior since v2.12. A part of the explanation is available in
    this commit [1].
    
    [1] https://github.com/ARM-software/arm-trusted-firmware/commit/e01c71266f9df46ac46dc72669449490d1c94419
    
    Signed-off-by: Thomas Richard <thomas.richard at bootlin.com>
    Link: https://github.com/openwrt/openwrt/pull/17465
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 include/trusted-firmware-a.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/trusted-firmware-a.mk b/include/trusted-firmware-a.mk
index c0d11d68c4..c329b76c56 100644
--- a/include/trusted-firmware-a.mk
+++ b/include/trusted-firmware-a.mk
@@ -77,7 +77,8 @@ endef
 DTC=$(wildcard $(LINUX_DIR)/scripts/dtc/dtc)
 
 define Build/Compile/Trusted-Firmware-A
-	+$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \
+	+unset CC; \
+	$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \
 		CROSS_COMPILE=$(TARGET_CROSS) \
 		OPENSSL_DIR=$(STAGING_DIR_HOST) \
 		$(if $(DTC),DTC="$(DTC)") \



From lede-commits at lists.infradead.org  Sat Jan  4 09:14:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 12:14:55 -0500
Subject: [openwrt/openwrt]  ramips: mt76x8: add support for Keenetic Extra
 (KN-1713)
In-Reply-To: <173601089576.3397381.16502070603689703802@git-01.infra.openwrt.org>
References: <173601089576.3397381.16502070603689703802@git-01.infra.openwrt.org>
Message-ID: <mailman.31099.1736010904.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d5545a9595cdf9571fbf1e57ae03291145feeceb

commit d5545a9595cdf9571fbf1e57ae03291145feeceb
Author: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
AuthorDate: Thu Dec 26 09:42:53 2024 +0500

    ramips: mt76x8: add support for Keenetic Extra (KN-1713)
    
    Specification:
    SoC: MediaTek MT7628AN
    RAM: 128M DDR2, Etron Technology EM68C16CWQG-25H
    Flash: 32M, cFeon EN25QH256A (Dual Boot, SPI)
    Switch: MediaTek MT7628AN, 4 ports 100 Mbps
    WiFi: MediaTek MT7628AN 2.4 GHz 802.11n and MediaTek MT7613BEN 5 GHz 802.11ac
    USB: 1 port USB 2.0
    GPIO: 3 buttons (Wi-Fi, Reset, FN), 4 LEDs (Power, Internet, FN, Wi-Fi), USB port power controls
    
    Disassembly:
    There are 2 screws at the bottom. After removing the screws, pry the gray plastic part around (it is secured with latches) and remove it.
    
    UART Interface:
    The UART interface can be connected to the 5 pin located between the WAN port and the RESET button.
    Pins (from WAN port to Reset button): VCC, TX, RX, NC, GRD
    Settings: 115200, 8N1
    
    Flashing via OEM recovery software:
    1. Download the OEM recovery software from the manufacturer's website
    2. Download the firmware image (for OpenWRT it is *-squashfs-factory.bin), rename it to KN-1713_recovery.bin
    3. Replace the file in the fw folder OEM recovery software with the file from step 2.
    4. Run the OEM recovery software and follow the instructions.
    
    Flashing via TFTP:
    1. Connect your PC and router to port 1-3, configure PC interface using IP 192.168.1.2, mask 255.255.255.252
    2. Serve the firmware image (for OpenWRT it is *-squashfs-factory.bin) renamed to KN-1713_recovery.bin via TFTP
    3. Power up the router while pressing Reset button on the back
    4. Release Restart button when Power LED starts blinking
    
    To revert back to OEM firmware:
    The return to the OEM firmware is carried out by using the methods described above with the help of the appropriate firmware image.
    
    When using OEM bootloader, the firmware image size cannot exceed the size of one OEM ?Firmware_x? partition or Kernel + rootFS size.
    
    Signed-off-by: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
    Link: https://github.com/openwrt/openwrt/pull/17382
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/ramips/dts/mt7628an_keenetic_kn-1713.dts | 241 +++++++++++++++++++++
 target/linux/ramips/image/mt76x8.mk                |  12 +
 .../ramips/mt76x8/base-files/etc/board.d/01_leds   |   3 +-
 .../mt76x8/base-files/etc/board.d/02_network       |   1 +
 4 files changed, 256 insertions(+), 1 deletion(-)

diff --git a/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts b/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts
new file mode 100644
index 0000000000..972c88eadd
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts
@@ -0,0 +1,241 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "keenetic,kn-1713", "mediatek,mt7628an-soc";
+	model = "Keenetic KN-1713";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	regulator-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "USB-power";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		internet {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+
+		fn {
+			function = LED_FUNCTION_USB;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi {
+			function = LED_FUNCTION_WLAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt","phy1tpt";
+		};
+	};
+
+
+	keys {
+		compatible = "gpio-keys";
+
+		fn {
+			label = "fn";
+			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+
+		reset {
+			label = "restart";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&firmware1 &firmware2>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x0 0x1CC0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2s", "i2c", "gpio", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition at 30000 {
+				label = "u-config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition at 40000 {
+				label = "rf-eeprom";
+				reg = <0x40000 0x10000>;
+				read-only;
+				
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom at 0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_factory_400: eeprom at 400 {
+						reg = <0x400 0x4da8>;
+					};
+
+					macaddr_factory_4: macaddr at 4 {
+						reg = <0x4 0x6>;
+					};
+				};
+			};
+
+			firmware1: partition at 50000 {
+				label = "firmware_1";
+				reg = <0x50000 0xe60000>;
+			};
+
+			partition at EB0000 {
+				label = "config_1";
+				reg = <0xEB0000 0x40000>;
+				read-only;
+			};
+
+			partition at EF0000 {
+				label = "storage";
+				reg = <0xEF0000 0x100000>;
+				read-only;
+			};
+
+			partition at FF0000 {
+				label = "dump";
+				reg = <0xFF0000 0x10000>;
+				read-only;
+			};
+
+			partition at 1000000 {
+				label = "u-state";
+				reg = <0x1000000 0x30000>;
+				read-only;
+			};
+
+			partition at 1030000 {
+				label = "u-config_res";
+				reg = <0x1030000 0x10000>;
+				read-only;
+			};
+			
+			partition at 1040000 {
+				label = "rf-eeprom_res";
+				reg = <0x1040000 0x10000>;
+				read-only;
+			};
+
+			firmware2: partition at 1050000 {
+				label = "firmware_2";
+				reg = <0x1050000 0xE60000>;
+			};
+			
+			partition at 1EB0000 {
+				label = "Config_2";
+				reg = <0x1EB0000 0x40000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_400>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index da44b0005c..dbad26a140 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -366,6 +366,18 @@ define Device/keenetic_kn-1613
 endef
 TARGET_DEVICES += keenetic_kn-1613
 
+define Device/keenetic_kn-1713
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 13434880
+  DEVICE_VENDOR := Keenetic
+  DEVICE_MODEL := KN-1713
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb2
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to $$$$(BLOCKSIZE) | \
+	check-size | zyimage -d 0x801713 -v "KN-1713"
+endef
+TARGET_DEVICES += keenetic_kn-1713
+
 define Device/keenetic_kn-3211
   IMAGE_SIZE := 31488k
   DEVICE_VENDOR := Keenetic
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
index 00e5086bb3..fda4fa3bdf 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
@@ -58,7 +58,8 @@ hiwifi,hc5661a|\
 hiwifi,hc5761a)
 	ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x10"
 	;;
-keenetic,kn-1613)
+keenetic,kn-1613|\
+keenetic,kn-1713)
 	ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x01"
 	;;
 mediatek,linkit-smart-7688)
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
index e57643690a..10e0e84dde 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
@@ -130,6 +130,7 @@ ramips_setup_interfaces()
 			"0:lan" "1:lan" "2:lan" "6 at eth0"
 		;;
 	keenetic,kn-1613|\
+	keenetic,kn-1713|\
 	motorola,mwr03)
 		ucidef_add_switch "switch0" \
 			"1:lan" "2:lan" "3:lan" "0:wan" "6 at eth0"



From lede-commits at lists.infradead.org  Sat Jan  4 09:56:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 12:56:23 -0500
Subject: [openwrt/openwrt]  mediatek: mt7622: improve fixup of trx for Buffalo
 devices
In-Reply-To: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
References: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
Message-ID: <mailman.31102.1736013388.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5d0f61e957ff19a7f6ad0b733c8b422f965525c5

commit 5d0f61e957ff19a7f6ad0b733c8b422f965525c5
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sat Dec 28 17:38:11 2024 +0900

    mediatek: mt7622: improve fixup of trx for Buffalo devices
    
    Unify the common part to the function and don't fixup trx when booting
    with initramfs image.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17408
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../mt7622/base-files/etc/uci-defaults/09_fix_crc      | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc b/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
index 59b00a6e69..25c8a0359b 100644
--- a/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
+++ b/target/linux/mediatek/mt7622/base-files/etc/uci-defaults/09_fix_crc
@@ -1,14 +1,22 @@
 . /lib/functions.sh
 
-kernel_size=$(sed -n 's/mtd[0-9]*: \([0-9a-f]*\).*"\(kernel\|linux\)".*/\1/p' /proc/mtd)
+# don't modify FW data when booting with initramfs image
+fstype="$(/bin/mount | awk '($3 ~ /^\/$/) && ($5 !~ /rootfs/) { print $5 }')"
+[ "$fstype" = "tmpfs" ] && \
+	exit 0
+
+fixup_trx_crc() {
+	local trx_magic="$1"
+	local kernel_size=$(sed -n 's/mtd[0-9]*: \([0-9a-f]*\).*"\(kernel\|linux\)".*/\1/p' /proc/mtd)
+
+	mtd -M $trx_magic ${kernel_size:+-c 0x$kernel_size} fixtrx firmware
+}
 
 case "$(board_name)" in
 buffalo,wsr-2533dhp2)
-	mtd -M 0x44485032 ${kernel_size:+-c 0x$kernel_size} fixtrx firmware && exit 0
-	exit 1
+	fixup_trx_crc 0x44485032
 	;;
 buffalo,wsr-3200ax4s)
-	mtd -M 0x44485033 ${kernel_size:+-c 0x$kernel_size} fixtrx firmware && exit 0
-	exit 1
+	fixup_trx_crc 0x44485033
 	;;
 esac



From lede-commits at lists.infradead.org  Sat Jan  4 09:56:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 12:56:24 -0500
Subject: [openwrt/openwrt]  mediatek: mt7622: sync buffalo.sh with
 ramips/mt7621
In-Reply-To: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
References: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
Message-ID: <mailman.31103.1736013388.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/376d8f96b1d1285a6fce711146d223d5d325edf5

commit 376d8f96b1d1285a6fce711146d223d5d325edf5
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sat Dec 28 17:48:02 2024 +0900

    mediatek: mt7622: sync buffalo.sh with ramips/mt7621
    
    Sync buffalo.sh with the one in ramips/mt7621 to improve handling of the
    TRX magic numbers of Buffalo WSR devices and switching sysupgrade method
    between buffalo_upgrade_ubinized() and nand_do_upgrade().
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17408
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../mt7622/base-files/lib/upgrade/buffalo.sh       | 27 ++++++++++++++++++----
 .../mt7622/base-files/lib/upgrade/platform.sh      | 11 +--------
 2 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
index 844cc4ed95..fcfea36966 100644
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/buffalo.sh
@@ -34,20 +34,30 @@
 #
 # The mtd partitions "firmware" and "Kernel2" on NAND flash are os-image
 # partitions. These partitions are called as "Image1/Image2" in U-Boot
-# on WSR-2533DHP2, and they are checked conditions when booting.
+# on WSR devices, and they are checked conditions when booting.
 # "Image1" is always used for booting.
 #
 # == U-Boot Behaviors ==
 # - "Image1"/"Image2" images are good, images are different or
 #   "Image2" image is broken
-#   -> writes os-image to "Image2" from "Image1"
+#   -> copy os-image to "Image2" from "Image1"
 #
 # - "Image1" image is broken
-#   -> writes os-image to "Image1" from "Image2"
+#   -> copy os-image to "Image1" from "Image2"
 #
 # - "Image1"/"Image2" images are broken
 #   -> fall to U-Boot command line
 
+# TRX magic numbers of each model
+case "$(board_name)" in
+buffalo,wsr-2533dhp2)
+	BUFFALO_TRX_MAGIC="44485032" # "DHP2"
+	;;
+buffalo,wsr-3200ax4s)
+	BUFFALO_TRX_MAGIC="44485033" # "DHP3"
+	;;
+esac
+
 buffalo_check_image() {
 	local board="$1"
 	local boardname="$(echo $board | tr ',' '_')"
@@ -56,7 +66,7 @@ buffalo_check_image() {
 
 	# return error state if TRX + UBI formatted image specified
 	# to notify about configurations
-	if [ "$magic" = "44485032" -o "$magic" = "44485033" ]; then
+	if [ "$magic" = "$BUFFALO_TRX_MAGIC" ]; then
 		echo "Your configurations won't be saved if factory-uboot.bin image specified."
 		echo "But if you want to upgrade, please execute sysupgrade with \"-F\" option."
 		return 1
@@ -124,3 +134,12 @@ buffalo_upgrade_ubinized() {
 		exit 1
 	fi
 }
+
+buffalo_do_upgrade() {
+	if [ "$(get_magic_long "$1")" = "$BUFFALO_TRX_MAGIC" ]; then
+		buffalo_upgrade_ubinized "$1"
+	else
+		CI_KERNPART="firmware"
+		nand_do_upgrade "$1"
+	fi
+}
diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
index 2607f170e0..f017509637 100755
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
@@ -16,16 +16,7 @@ platform_do_upgrade() {
 		;;
 	buffalo,wsr-2533dhp2|\
 	buffalo,wsr-3200ax4s)
-		local magic="$(get_magic_long "$1")"
-
-		# use "mtd write" if the magic is "DHP2 (0x44485032)"
-		# or "DHP3 (0x44485033)"
-		if [ "$magic" = "44485032" -o "$magic" = "44485033" ]; then
-			buffalo_upgrade_ubinized "$1"
-		else
-			CI_KERNPART="firmware"
-			nand_do_upgrade "$1"
-		fi
+		buffalo_do_upgrade "$1"
 		;;
 	dlink,eagle-pro-ai-m32-a1|\
 	dlink,eagle-pro-ai-r32-a1|\



From lede-commits at lists.infradead.org  Sat Jan  4 09:56:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 12:56:25 -0500
Subject: [openwrt/openwrt]  mediatek: append metadata to factory-uboot.bin for
 WSR devices
In-Reply-To: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
References: <173601338350.3461132.16021905508368535266@git-01.infra.openwrt.org>
Message-ID: <mailman.31106.1736013389.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a06a2ef89db03fac2cbd950304e5b507da9deb1e

commit a06a2ef89db03fac2cbd950304e5b507da9deb1e
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sat Dec 28 19:07:09 2024 +0900

    mediatek: append metadata to factory-uboot.bin for WSR devices
    
    Append metadata to factory-uboot.bin image to pass the image verification
    on sysupgrade.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17408
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/image/mt7622.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index 9f5fdc8688..faf1b20e4a 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -123,7 +123,7 @@ define Device/buffalo_wsr
 	buffalo-enc $$(DEVICE_MODEL) $$(BUFFALO_TAG_VERSION) -l | \
 	buffalo-tag-dhp $$(DEVICE_MODEL) JP JP | buffalo-enc-tag -l | buffalo-dhp-image
   IMAGE/factory-uboot.bin := append-ubi | \
-	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark
+	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark | append-metadata
   IMAGE/sysupgrade.bin := \
 	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $(KDIR)/tmp/$$(DEVICE_NAME).null | \
 	sysupgrade-tar kernel=$$$$@ | append-metadata



From lede-commits at lists.infradead.org  Sat Jan  4 10:16:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:16:37 -0500
Subject: [openwrt/openwrt]  bcm27xx: remove duplicated kmod-rp1-pio package
In-Reply-To: <173601459782.3497557.16760317840669614507@git-01.infra.openwrt.org>
References: <173601459782.3497557.16760317840669614507@git-01.infra.openwrt.org>
Message-ID: <mailman.31113.1736014601.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d5669c040beb0fa29e6916049941f0e76ce07460

commit d5669c040beb0fa29e6916049941f0e76ce07460
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Sat Jan 4 16:36:20 2025 +0100

    bcm27xx: remove duplicated kmod-rp1-pio package
    
    Commit f105d1a9a9739267fb25612d039c392a397775bd added a duplicated
    kmod-rp1-pio package.
    Also remove unneeded blank lines added by the same commit.
    
    Fixes: f105d1a9a973 ("bcm27xx/bcm2712: Fix-up RP1 modules")
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 target/linux/bcm27xx/modules/hwmon.mk |  2 --
 target/linux/bcm27xx/modules/other.mk | 17 -----------------
 2 files changed, 19 deletions(-)

diff --git a/target/linux/bcm27xx/modules/hwmon.mk b/target/linux/bcm27xx/modules/hwmon.mk
index db8ba30f87..320b11708f 100644
--- a/target/linux/bcm27xx/modules/hwmon.mk
+++ b/target/linux/bcm27xx/modules/hwmon.mk
@@ -32,5 +32,3 @@ define KernelPackage/hwmon-raspberrypi/description
 endef
 
 $(eval $(call KernelPackage,hwmon-raspberrypi))
-
-
diff --git a/target/linux/bcm27xx/modules/other.mk b/target/linux/bcm27xx/modules/other.mk
index 099ce3ce14..7ec35c95f0 100644
--- a/target/linux/bcm27xx/modules/other.mk
+++ b/target/linux/bcm27xx/modules/other.mk
@@ -139,20 +139,3 @@ define KernelPackage/rp1-mailbox/description
 endef
 
 $(eval $(call KernelPackage,rp1-mailbox))
-
-
-define KernelPackage/rp1-pio
-  SUBMENU:=$(OTHER_MENU)
-  TITLE:=RP1 PIO driver
-  KCONFIG:=CONFIG_RP1_PIO
-  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
-  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
-endef
-
-define KernelPackage/rp1-pio/description
-  Driver for the RP1 PIO.
-endef
-
-$(eval $(call KernelPackage,rp1-pio))
-



From lede-commits at lists.infradead.org  Sat Jan  4 10:17:48 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:17:48 -0500
Subject: [openwrt/openwrt]  bcm27xx: remove duplicated kmod-rp1-pio package
In-Reply-To: <173601466874.3499472.11516555164544155138@git-01.infra.openwrt.org>
References: <173601466874.3499472.11516555164544155138@git-01.infra.openwrt.org>
Message-ID: <mailman.31114.1736014672.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/fe8812ab967f03498b689fd5ece5b2cea03659dc

commit fe8812ab967f03498b689fd5ece5b2cea03659dc
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Sat Jan 4 16:36:20 2025 +0100

    bcm27xx: remove duplicated kmod-rp1-pio package
    
    Commit f105d1a9a9739267fb25612d039c392a397775bd added a duplicated
    kmod-rp1-pio package.
    Also remove unneeded blank lines added by the same commit.
    
    Fixes: f105d1a9a973 ("bcm27xx/bcm2712: Fix-up RP1 modules")
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit d5669c040beb0fa29e6916049941f0e76ce07460)
---
 target/linux/bcm27xx/modules/hwmon.mk |  2 --
 target/linux/bcm27xx/modules/other.mk | 17 -----------------
 2 files changed, 19 deletions(-)

diff --git a/target/linux/bcm27xx/modules/hwmon.mk b/target/linux/bcm27xx/modules/hwmon.mk
index db8ba30f87..320b11708f 100644
--- a/target/linux/bcm27xx/modules/hwmon.mk
+++ b/target/linux/bcm27xx/modules/hwmon.mk
@@ -32,5 +32,3 @@ define KernelPackage/hwmon-raspberrypi/description
 endef
 
 $(eval $(call KernelPackage,hwmon-raspberrypi))
-
-
diff --git a/target/linux/bcm27xx/modules/other.mk b/target/linux/bcm27xx/modules/other.mk
index 099ce3ce14..7ec35c95f0 100644
--- a/target/linux/bcm27xx/modules/other.mk
+++ b/target/linux/bcm27xx/modules/other.mk
@@ -139,20 +139,3 @@ define KernelPackage/rp1-mailbox/description
 endef
 
 $(eval $(call KernelPackage,rp1-mailbox))
-
-
-define KernelPackage/rp1-pio
-  SUBMENU:=$(OTHER_MENU)
-  TITLE:=RP1 PIO driver
-  KCONFIG:=CONFIG_RP1_PIO
-  FILES:=$(LINUX_DIR)/drivers/misc/rp1-pio.ko
-  AUTOLOAD:=$(call AutoLoad,21,rp1-pio)
-  DEPENDS:=@TARGET_bcm27xx_bcm2712 +kmod-rp1
-endef
-
-define KernelPackage/rp1-pio/description
-  Driver for the RP1 PIO.
-endef
-
-$(eval $(call KernelPackage,rp1-pio))
-



From lede-commits at lists.infradead.org  Sat Jan  4 10:18:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:18:53 -0500
Subject: [openwrt/openwrt]  ath79: Push MV88E6060 DSA switch into package
In-Reply-To: <173601473335.3500910.10094925261619402774@git-01.infra.openwrt.org>
References: <173601473335.3500910.10094925261619402774@git-01.infra.openwrt.org>
Message-ID: <mailman.31115.1736014736.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e7419381fdd43a49e7583a786ce2d9c2ed1b4afe

commit e7419381fdd43a49e7583a786ce2d9c2ed1b4afe
Author: Linus Walleij <linus.walleij at linaro.org>
AuthorDate: Thu Jan 2 15:44:45 2025 +0100

    ath79: Push MV88E6060 DSA switch into package
    
    We can use a package for the MV88E6060 DSA switch on the single
    ath79 device that uses it, saving around 600 KB of memory on
    all other devices (for the DSA infrastructure, mainly).
    
    As far as I can see the TP-Link TL WR941 v2 is the only device
    using MV88E6060 and the only device with a DSA switch overall.
    
    However the ath79 people should look at this so I'm not
    mistaken.
    
    Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250102-ath79-mv88e6060-module-v1-1-c2a8e31e72fc at linaro.org/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/tiny-tp-link.mk | 1 +
 target/linux/ath79/tiny/config-default   | 3 ---
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/linux/ath79/image/tiny-tp-link.mk b/target/linux/ath79/image/tiny-tp-link.mk
index 93cbc7d148..70c3ab4c7b 100644
--- a/target/linux/ath79/image/tiny-tp-link.mk
+++ b/target/linux/ath79/image/tiny-tp-link.mk
@@ -481,6 +481,7 @@ define Device/tplink_tl-wr941-v2
   $(Device/tplink-4m)
   SOC := ar9132
   DEVICE_MODEL := TL-WR941ND
+  DEVICE_PACKAGES := kmod-dsa-mv88e6060
   DEVICE_VARIANT := v2/v3
   DEVICE_ALT0_VENDOR := TP-Link
   DEVICE_ALT0_MODEL := TL-WR941N
diff --git a/target/linux/ath79/tiny/config-default b/target/linux/ath79/tiny/config-default
index e47260df82..38fbe1b522 100644
--- a/target/linux/ath79/tiny/config-default
+++ b/target/linux/ath79/tiny/config-default
@@ -1,9 +1,6 @@
 CONFIG_GRO_CELLS=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
 CONFIG_NET_DEVLINK=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6060=y
-CONFIG_NET_DSA_TAG_TRAILER=y
 CONFIG_NET_SWITCHDEV=y
 CONFIG_NVMEM_SYSFS=y
 CONFIG_NVMEM_U_BOOT_ENV=y



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:58 -0500
Subject: [openwrt/openwrt]  ramips: mtk-mmc: remove nt76x8 pinctrl hack
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31116.1736016297.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/976bfe61e0dbec27fd103b531a32d6853cba3ba4

commit 976bfe61e0dbec27fd103b531a32d6853cba3ba4
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:17:53 2025 +0800

    ramips: mtk-mmc: remove nt76x8 pinctrl hack
    
    Now we can set the mt76x8 SDXC pinmux in device tree.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit b4a9f85c1394f13806fc2f51f5f6f23494773d7e)
---
 target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
index df95900a26..a9c242bfd3 100644
--- a/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
+++ b/target/linux/ramips/files/drivers/mmc/host/mtk-mmc/sd.c
@@ -2210,12 +2210,6 @@ static int msdc_drv_probe(struct platform_device *pdev)
 	struct msdc_hw *hw;
 	int ret;
 
-	//FIXME: this should be done by pinconf and not by the sd driver
-	if ((ralink_soc == MT762X_SOC_MT7688 ||
-	     ralink_soc == MT762X_SOC_MT7628AN) &&
-	    (!(rt_sysc_r32(0x60) & BIT(15))))
-		rt_sysc_m32(0xf << 17, 0xf << 17, 0x3c);
-
 	hw = &msdc0_hw;
 
 	if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:02 -0500
Subject: [openwrt/openwrt]  base-files: strip space and tab characters from
 ASCII mac address
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31117.1736016297.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/8b5f3ee940793be326aa1c3398c9fe017f18e73a

commit 8b5f3ee940793be326aa1c3398c9fe017f18e73a
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Mon Dec 16 15:09:50 2024 +0800

    base-files: strip space and tab characters from ASCII mac address
    
    Spaces and tabs are widely used in variable definitions. We have to
    remove them to ensure that get_mac_ascii() works properly.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17262
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 551e04f3c9c063d885ca7a91db36f27f684a3a5c)
---
 package/base-files/files/lib/functions/system.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/base-files/files/lib/functions/system.sh b/package/base-files/files/lib/functions/system.sh
index aaeb75f261..f43281b5dc 100644
--- a/package/base-files/files/lib/functions/system.sh
+++ b/package/base-files/files/lib/functions/system.sh
@@ -66,7 +66,7 @@ get_mac_ascii() {
 	local key="$2"
 	local mac_dirty
 
-	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p' | head -n 1)
+	mac_dirty=$(strings "$part" | tr -d ' \t' | sed -n 's/^'"$key"'=//p' | head -n 1)
 
 	# "canonicalize" mac
 	[ -n "$mac_dirty" ] && macaddr_canonicalize "$mac_dirty"



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:59 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:59 -0500
Subject: [openwrt/openwrt]  uboot-mediatek: fix Routerich AX3000 support patch
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31120.1736016299.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d543a9ae66b81d6d4f5ca9908087c8412f4ce026

commit d543a9ae66b81d6d4f5ca9908087c8412f4ce026
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sun Dec 22 00:30:43 2024 +0800

    uboot-mediatek: fix Routerich AX3000 support patch
    
    It seems that the original patch has been manually modified. The
    newly added line number is incorrect.
    
    Fixes: c0581520b1c5 ("uboot-mediatek: add Routerich AX3000 support")
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17338
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 9f97e39a9336e279be7ea1c00c4221ec3f448457)
---
 package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch b/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
index 9aa31843de..f33ca07633 100644
--- a/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
+++ b/package/boot/uboot-mediatek/patches/460-add-routerich-ax3000.patch
@@ -1,6 +1,6 @@
 --- /dev/null
 +++ b/configs/mt7981_routerich_ax3000_defconfig
-@@ -0,0 +1,107 @@
+@@ -0,0 +1,108 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:01 -0500
Subject: [openwrt/openwrt]  base-files: enable get_mac_ascii() to handle
 redundant strings
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31121.1736016299.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/676dfd1363fbfc1b92331aa293672f8af9770a02

commit 676dfd1363fbfc1b92331aa293672f8af9770a02
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Fri Dec 13 13:30:38 2024 +0800

    base-files: enable get_mac_ascii() to handle redundant strings
    
    The function get_mac_ascii() will fail when there are two or more
    same MAC address variable names in the mtd partition. Only retain
    the first variable to workaround this rare situation.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17236
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17262
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 3410ad2f40c085e5db7a71f6ae4b80734826a1e3)
---
 package/base-files/files/lib/functions/system.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/base-files/files/lib/functions/system.sh b/package/base-files/files/lib/functions/system.sh
index 048e32f0e1..aaeb75f261 100644
--- a/package/base-files/files/lib/functions/system.sh
+++ b/package/base-files/files/lib/functions/system.sh
@@ -66,7 +66,7 @@ get_mac_ascii() {
 	local key="$2"
 	local mac_dirty
 
-	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p')
+	mac_dirty=$(strings "$part" | sed -n 's/^'"$key"'=//p' | head -n 1)
 
 	# "canonicalize" mac
 	[ -n "$mac_dirty" ] && macaddr_canonicalize "$mac_dirty"



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:55 -0500
Subject: [openwrt/openwrt]  ramips: add back SDXC card reader support for
 HiWiFi HC5x61A
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31122.1736016299.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f81f707c0595bb990ea579a7edd4dd0d2723ba0b

commit f81f707c0595bb990ea579a7edd4dd0d2723ba0b
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:06:38 2025 +0800

    ramips: add back SDXC card reader support for HiWiFi HC5x61A
    
    After adding the correct package and pin group configurations,
    the SDXC card slot can now function properly.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit cea4aae0a921d71407d11957502f8cc3b652be21)
---
 target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts | 20 +++++++++++++++++++-
 target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts | 18 +++++++++++++++++-
 target/linux/ramips/image/mt76x8.mk                 |  3 ++-
 3 files changed, 38 insertions(+), 3 deletions(-)

diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts b/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
index 9e4068ce8c..52cd3afac8 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5661a.dts
@@ -1,3 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
 #include "mt7628an_hiwifi_hc5x61a.dtsi"
 
 / {
@@ -25,9 +27,25 @@
 	};
 };
 
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_router_mode>;
+	pinctrl-1 = <&sdxc_router_mode>;
+};
+
 &state_default {
 	gpio {
-		groups = "i2c", "refclk", "wdt", "wled_an";
+		groups = "i2s", "refclk", "wdt", "wled_an";
 		function = "gpio";
 	};
 };
diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
index 5ec041c804..940df6e19a 100644
--- a/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
+++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts
@@ -44,9 +44,25 @@
 	};
 };
 
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_router_mode>;
+	pinctrl-1 = <&sdxc_router_mode>;
+};
+
 &state_default {
 	gpio {
-		groups = "i2c", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
+		groups = "i2s", "refclk", "wdt", "p2led_an", "p3led_an", "wled_an";
 		function = "gpio";
 	};
 };
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index 7e343bf016..953dfeb50f 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -289,6 +289,7 @@ define Device/hiwifi_hc5661a
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5661A
+  DEVICE_PACKAGES := kmod-mmc-mtk
   SUPPORTED_DEVICES += hc5661a
 endef
 TARGET_DEVICES += hiwifi_hc5661a
@@ -297,7 +298,7 @@ define Device/hiwifi_hc5761a
   IMAGE_SIZE := 15808k
   DEVICE_VENDOR := HiWiFi
   DEVICE_MODEL := HC5761A
-  DEVICE_PACKAGES := kmod-mt76x0e kmod-usb2 kmod-usb-ohci
+  DEVICE_PACKAGES := kmod-mmc-mtk kmod-mt76x0e kmod-usb2 kmod-usb-ohci
 endef
 TARGET_DEVICES += hiwifi_hc5761a
 



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:00 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:00 -0500
Subject: [openwrt/openwrt]  uboot-mediatek: add missing LED command for
 OpenWrt One
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31123.1736016299.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b0261c3861afff7438cb7be4735d2fccb12a74bc

commit b0261c3861afff7438cb7be4735d2fccb12a74bc
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sun Dec 22 00:31:06 2024 +0800

    uboot-mediatek: add missing LED command for OpenWrt One
    
    The u-boot LED command "led_loop_done" is missing from the OpenWrt
    One NAND flash u-boot. Copy it from the OpenWrt One NOR flash u-boot
    default environment to fix this issue.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17310
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17338
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 5ef71eaafd4e128ec3708a66b5633214427da373)
---
 package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
index cf5f79f584..1968f66953 100644
--- a/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
+++ b/package/boot/uboot-mediatek/patches/453-add-openwrt-one.patch
@@ -519,7 +519,7 @@
 +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       [33m$ver[0m"
 --- /dev/null
 +++ b/openwrt-one-spi-nand_env
-@@ -0,0 +1,60 @@
+@@ -0,0 +1,61 @@
 +ethaddr_factory=mtd read factory 0x46000000 0x0 0x20000 && env readmem -b ethaddr 0x4600002a 0x6 ; setenv ethaddr_factory
 +ipaddr=192.168.11.11
 +serverip=192.168.11.23
@@ -561,6 +561,7 @@
 +check_buttons=if button front ; then run boot_recovery ; run boot_tftp ; run led_loop_error ; else if button back ; then ; run usb_recover ; run led_loop_error ; fi ; fi
 +led_boot=led green on ; led white on ; led red on
 +led_done=led green on ; led white off ; led red off
++led_loop_done=led white off ; led green on ; echo done ; while true ; do  sleep 1 ; done
 +led_loop_error=led white off ; led green off ; while true ; do led red on ; sleep 1 ; led red off ; sleep 1 ; done
 +led_start=led white on ; led green off ; led red off
 +preboot=run led_boot



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:57 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:57 -0500
Subject: [openwrt/openwrt]  ramips: make package kmod-sdhci-mt7620 conflict
 with kmod-mmc-mtk
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31124.1736016299.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/09378395cd9322fa80974488c4a616257f9582be

commit 09378395cd9322fa80974488c4a616257f9582be
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:17:08 2025 +0800

    ramips: make package kmod-sdhci-mt7620 conflict with kmod-mmc-mtk
    
    These two packages are SDXC drivers for Mediatek mt762x series SoCs.
    One is upstream implementation, and the other is downstream driver.
    Installing them together will result in conflicts.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 0764e3008228bbdafb5e4a9837fe9efec7e138a0)
---
 target/linux/ramips/modules.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ramips/modules.mk b/target/linux/ramips/modules.mk
index ced479dc93..175ba94eff 100644
--- a/target/linux/ramips/modules.mk
+++ b/target/linux/ramips/modules.mk
@@ -47,6 +47,7 @@ $(eval $(call KernelPackage,pwm-mediatek-ramips))
 define KernelPackage/sdhci-mt7620
   SUBMENU:=Other modules
   TITLE:=MT7620 SDCI
+  CONFLICTS:=kmod-mmc-mtk
   DEPENDS:=@(TARGET_ramips_mt7620||TARGET_ramips_mt76x8||TARGET_ramips_mt7621) +kmod-mmc
   KCONFIG:= \
 	CONFIG_MTK_MMC \



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:54 -0500
Subject: [openwrt/openwrt]  ramips: mmc-mtk: add more vendor driver register
 init values
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31125.1736016302.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/4d9b06c571e201287817ab7af2500469b9ca7621

commit 4d9b06c571e201287817ab7af2500469b9ca7621
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sat Jul 13 11:32:45 2024 +0800

    ramips: mmc-mtk: add more vendor driver register init values
    
    In the MTK vendor driver, mt762x SDXC registers MSDC_PATCH_BIT and
    MSDC_PATCH_BIT1 have different init values than upstream driver.
    These magical values should have some help for the stability.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit f70cdfd682a87c9de942f9251fb5a0caaf43f7cf)
---
 ...d-initialize-pad-delay-and-drive-strength.patch | 53 ++++++++++++++++++----
 1 file changed, 44 insertions(+), 9 deletions(-)

diff --git a/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
index 1d5c6dcd40..c3d13932ef 100644
--- a/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
+++ b/target/linux/ramips/patches-6.6/831-mmc-mtk-sd-initialize-pad-delay-and-drive-strength.patch
@@ -4,6 +4,8 @@ Subject: [PATCH] mmc: mtk-sd: initialize the pad and tune registers
 
 Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
 ---
+ drivers/mmc/host/mtk-sd.c | 26 +++++++++++++++++++++++---
+ 1 file changed, 23 insertions(+), 3 deletions(-)
 
 --- a/drivers/mmc/host/mtk-sd.c
 +++ b/drivers/mmc/host/mtk-sd.c
@@ -20,19 +22,52 @@ Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
  #define PAD_DS_TUNE      0x188
  #define PAD_CMD_TUNE     0x18c
  #define EMMC51_CFG0	 0x204
-@@ -1795,6 +1799,16 @@ static void msdc_init_hw(struct msdc_hos
+@@ -400,6 +404,7 @@ struct mtk_mmc_compatible {
+ 	bool enhance_rx;
+ 	bool support_64g;
+ 	bool use_internal_cd;
++	bool legacy_mt762x; /* for mt7620, mt7621 and mt76x8 */
+ };
+ 
+ struct msdc_tune_para {
+@@ -537,6 +542,7 @@ static const struct mtk_mmc_compatible m
+ 	.stop_clk_fix = false,
+ 	.enhance_rx = false,
+ 	.use_internal_cd = true,
++	.legacy_mt762x = true,
+ };
+ 
+ static const struct mtk_mmc_compatible mt7622_compat = {
+@@ -1729,9 +1735,11 @@ static void msdc_init_hw(struct msdc_hos
+ 	}
+ 	writel(0, host->base + MSDC_IOCON);
+ 	sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
+-	writel(0x403c0046, host->base + MSDC_PATCH_BIT);
+-	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
+-	writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
++	if(!host->dev_comp->legacy_mt762x) {
++		writel(0x403c0046, host->base + MSDC_PATCH_BIT);
++		sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
++		writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
++	}
+ 	sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
+ 
+ 	if (host->dev_comp->stop_clk_fix) {
+@@ -1795,6 +1803,18 @@ static void msdc_init_hw(struct msdc_hos
  				     MSDC_PAD_TUNE_RXDLYSEL);
  	}
  
-+	/* Set pins drive strength */
-+	writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
-+	writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
-+	writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
++	if (host->dev_comp->legacy_mt762x) {
++		/* Set pins drive strength */
++		writel(0x000d0044, host->base + MSDC_PAD_CTRL0);
++		writel(0x000e0044, host->base + MSDC_PAD_CTRL1);
++		writel(0x000e0044, host->base + MSDC_PAD_CTRL2);
 +
-+	/* Set pad delay */
-+	writel(0x84101010, host->base + MSDC_PAD_TUNE);
-+	writel(0x10101010, host->base + MSDC_PAD_TUNE0);
-+	writel(0x10101010, host->base + MSDC_PAD_TUNE1);
++		/* Set pad delay */
++		writel(0x84101010, host->base + MSDC_PAD_TUNE);
++		writel(0x10101010, host->base + MSDC_PAD_TUNE0);
++		writel(0x10101010, host->base + MSDC_PAD_TUNE1);
++	}
 +
  	if (mmc->caps2 & MMC_CAP2_NO_SDIO) {
  		sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO);



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:56 -0500
Subject: [openwrt/openwrt]  ramips: fix SDXC function for mt76x8 one eth port
 devices
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31128.1736016302.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f311c9754c359736481ac2a3285ba16352da46d8

commit f311c9754c359736481ac2a3285ba16352da46d8
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:16:29 2025 +0800

    ramips: fix SDXC function for mt76x8 one eth port devices
    
    There are only 5 devices in mt76x8 sub-target selected the MTK SDXC
    driver package. And they are all single ethernet port routers or dev
    boards:
    
    * LinkIt Smart 7688
    * Onion Omega2+
    * RAVPower RP-WD009
    * VoCore VoCore2
    * VoCore VoCore2-Lite
    
    For these devices, they are using the ephy p1 - p4 as the SDXC IO
    pins. Therefore, these GPIO pads must be configured in "digital"
    IO mode.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit f5996ae947c88461029060d74ace6a85a30dd9fd)
---
 .../dts/mt7628an_mediatek_linkit-smart-7688.dts    | 19 ++++++++++++++++++
 target/linux/ramips/dts/mt7628an_onion_omega2.dtsi | 19 ++++++++++++++++++
 .../ramips/dts/mt7628an_ravpower_rp-wd009.dts      | 19 ++++++++++++++++++
 .../linux/ramips/dts/mt7628an_vocore_vocore2.dtsi  | 23 ++++++++++++++++++++++
 4 files changed, 80 insertions(+)

diff --git a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
index 34ef15eca0..fab70dc7b7 100644
--- a/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
+++ b/target/linux/ramips/dts/mt7628an_mediatek_linkit-smart-7688.dts
@@ -168,8 +168,27 @@
 	nvmem-cell-names = "mac-address";
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 	cd-inverted;
 };
 
diff --git a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
index d279cbcfb8..2d45e0385f 100644
--- a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
+++ b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi
@@ -170,8 +170,27 @@
 	nvmem-cell-names = "mac-address";
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 };
 
 &wmac {
diff --git a/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts b/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
index 607787f68e..71c77d7ae6 100644
--- a/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
+++ b/target/linux/ramips/dts/mt7628an_ravpower_rp-wd009.dts
@@ -84,6 +84,22 @@
 	};
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &state_default {
 	gpio {
 		groups = "uart1", "wled_an", "p0led_an", "p2led_an", "p3led_an",
@@ -94,6 +110,9 @@
 
 &sdhci {
 	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
 };
 
 &i2c {
diff --git a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
index 4982d8bccc..da2026ec7d 100644
--- a/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
+++ b/target/linux/ramips/dts/mt7628an_vocore_vocore2.dtsi
@@ -68,6 +68,22 @@
 	};
 };
 
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
 &state_default {
 	gpio {
 		groups = "wled_an", "refclk", "wdt";
@@ -75,6 +91,13 @@
 	};
 };
 
+&sdhci {
+	status = "okay";
+
+	pinctrl-0 = <&sdxc_iot_mode>;
+	pinctrl-1 = <&sdxc_iot_mode>;
+};
+
 &wmac {
 	status = "okay";
 



From lede-commits at lists.infradead.org  Sat Jan  4 10:44:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:44:53 -0500
Subject: [openwrt/openwrt]  ramips: mt762{0,8}: reduce default MMC clock to 24
 MHz
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31129.1736016302.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/cc733e7e2a2da29ca90fba8ca91bb3752a6c9b65

commit cc733e7e2a2da29ca90fba8ca91bb3752a6c9b65
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 20:33:23 2024 +0800

    ramips: mt762{0,8}: reduce default MMC clock to 24 MHz
    
    The upstream mtk-sd driver did not perform specific timing
    optimization for MT762x series SoC, hence the SDHC peripheral
    of some boards cannot run at too high frequency. Reduce the
    maximum clock frequency to fix the mmc read/write error.
    
    Closes: https://github.com/openwrt/openwrt/issues/17364
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17375
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit de0c143742517d401c4730137f092be8fb7e882a)
---
 target/linux/ramips/dts/mt7620a.dtsi              | 2 +-
 target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts | 4 ----
 target/linux/ramips/dts/mt7628an.dtsi             | 2 +-
 3 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 93b4286193..0555674802 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -540,7 +540,7 @@
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
-		max-frequency = <48000000>;
+		max-frequency = <24000000>;
 
 		pinctrl-names = "default", "state_uhs";
 		pinctrl-0 = <&sdhci_pins>;
diff --git a/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
index 29aff9958a..2cb7017972 100644
--- a/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
+++ b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
@@ -108,10 +108,6 @@
 	};
 };
 
-&sdhci {
-	max-frequency = <24000000>;
-};
-
 &wmac {
 	pinctrl-names = "default", "pa_gpio";
 	pinctrl-0 = <&pa_pins>;
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index 239211b1e1..79763332b8 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -394,7 +394,7 @@
 		interrupt-parent = <&intc>;
 		interrupts = <14>;
 
-		max-frequency = <48000000>;
+		max-frequency = <24000000>;
 
 		pinctrl-names = "default", "state_uhs";
 		pinctrl-0 = <&sdxc_pins>;



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:06 -0500
Subject: [openwrt/openwrt]  ath79: Push MV88E6060 DSA switch into package
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31130.1736018231.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/8931d617dd0dd5e59394be8befabd38d492c2945

commit 8931d617dd0dd5e59394be8befabd38d492c2945
Author: Linus Walleij <linus.walleij at linaro.org>
AuthorDate: Thu Jan 2 15:44:45 2025 +0100

    ath79: Push MV88E6060 DSA switch into package
    
    We can use a package for the MV88E6060 DSA switch on the single
    ath79 device that uses it, saving around 600 KB of memory on
    all other devices (for the DSA infrastructure, mainly).
    
    As far as I can see the TP-Link TL WR941 v2 is the only device
    using MV88E6060 and the only device with a DSA switch overall.
    
    However the ath79 people should look at this so I'm not
    mistaken.
    
    Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250102-ath79-mv88e6060-module-v1-1-c2a8e31e72fc at linaro.org/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit e7419381fdd43a49e7583a786ce2d9c2ed1b4afe)
---
 target/linux/ath79/image/tiny-tp-link.mk | 1 +
 target/linux/ath79/tiny/config-default   | 3 ---
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/linux/ath79/image/tiny-tp-link.mk b/target/linux/ath79/image/tiny-tp-link.mk
index 93cbc7d148..70c3ab4c7b 100644
--- a/target/linux/ath79/image/tiny-tp-link.mk
+++ b/target/linux/ath79/image/tiny-tp-link.mk
@@ -481,6 +481,7 @@ define Device/tplink_tl-wr941-v2
   $(Device/tplink-4m)
   SOC := ar9132
   DEVICE_MODEL := TL-WR941ND
+  DEVICE_PACKAGES := kmod-dsa-mv88e6060
   DEVICE_VARIANT := v2/v3
   DEVICE_ALT0_VENDOR := TP-Link
   DEVICE_ALT0_MODEL := TL-WR941N
diff --git a/target/linux/ath79/tiny/config-default b/target/linux/ath79/tiny/config-default
index e47260df82..38fbe1b522 100644
--- a/target/linux/ath79/tiny/config-default
+++ b/target/linux/ath79/tiny/config-default
@@ -1,9 +1,6 @@
 CONFIG_GRO_CELLS=y
 CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
 CONFIG_NET_DEVLINK=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6060=y
-CONFIG_NET_DSA_TAG_TRAILER=y
 CONFIG_NET_SWITCHDEV=y
 CONFIG_NVMEM_SYSFS=y
 CONFIG_NVMEM_U_BOOT_ENV=y



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:03 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: add support for lan3 and lan4 on
 AVM 5490/5491
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31131.1736018262.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/deb0f28b5e05307926c77752ff87c24f4d674d38

commit deb0f28b5e05307926c77752ff87c24f4d674d38
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Fri Jan 3 19:59:22 2025 +0100

    lantiq: xrx200: add support for lan3 and lan4 on AVM 5490/5491
    
    On the AVM 5490/5491, lan1, lan2 and wan ports are connected directly
    to the internal GSWIP switch. The lan3 and lan4 ports are connected via
    an external QCA8334 switch. This commit adds the missing entries in dts
    and adds the driver module.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17473
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 14be320291e0c00a1291ad8bd220fd37b12ba138)
---
 .../mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi    | 66 ++++++++++++++++++++++
 target/linux/lantiq/image/vr9.mk                   |  4 +-
 .../xrx200/base-files/etc/board.d/02_network       |  6 +-
 3 files changed, 70 insertions(+), 6 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
index b38ac9f8b8..2ba8e680b4 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz5490.dtsi
@@ -46,6 +46,61 @@
 	phy9: ethernet-phy at 9 {
 		reg = <0x09>;
 	};
+
+	switch at 0 {
+		compatible = "qca,qca8334";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+		reg = <0>;
+
+		dsa,member = <1 0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				ethernet = <&rgmii0>;
+				phy-mode = "rgmii-txid";
+				tx-internal-delay-ps = <3000>;
+
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+
+			port at 2 {
+				reg = <2>;
+				label = "lan3";
+				phy-mode = "internal";
+				phy-handle = <&phy_port2>;
+			};
+
+			port at 3 {
+				reg = <3>;
+				label = "lan4";
+				phy-mode = "internal";
+				phy-handle = <&phy_port3>;
+			};
+		};
+
+		mdio {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy_port2: phy at 1 {
+				reg = <1>;
+			};
+
+			phy_port3: phy at 2 {
+				reg = <2>;
+			};
+		};
+	};
 };
 
 &gswip_ports {
@@ -56,6 +111,17 @@
 		phy-handle = <&phy6>;
 	};
 
+	rgmii0: port at 1 {
+		reg = <1>;
+		label = "sw0";
+		phy-mode = "rgmii";
+
+		fixed-link {
+			speed = <1000>;
+			full-duplex;
+		};
+	};
+
 	port at 2 {
 		reg = <2>;
 		label = "lan2";
diff --git a/target/linux/lantiq/image/vr9.mk b/target/linux/lantiq/image/vr9.mk
index e2608213dc..48a372f476 100644
--- a/target/linux/lantiq/image/vr9.mk
+++ b/target/linux/lantiq/image/vr9.mk
@@ -177,7 +177,7 @@ define Device/avm_fritz5490
   DEVICE_VARIANT := Other NAND
   KERNEL_SIZE := 4096k
   IMAGE_SIZE := 49152k
-  DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
+  DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
 	-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
 	-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
 	-ltq-vdsl-vr9-app -kmod-owl-loader \
@@ -195,7 +195,7 @@ define Device/avm_fritz5490-micron
   DEVICE_VARIANT := Micron NAND
   KERNEL_SIZE := 4096k
   IMAGE_SIZE := 49152k
-  DEVICE_PACKAGES := kmod-usb3 fritz-tffs \
+  DEVICE_PACKAGES := kmod-dsa-qca8k kmod-phy-qca83xx kmod-usb3 fritz-tffs \
 	-ltq-vdsl-vr9-vectoring-fw-installer -kmod-ltq-vdsl-vr9-mei \
 	-kmod-ltq-vdsl-vr9 -kmod-ltq-atm-vr9 -kmod-ltq-ptm-vr9 \
 	-ltq-vdsl-vr9-app -kmod-owl-loader \
diff --git a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
index 6c35c7a4de..8c2cdb12af 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
+++ b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
@@ -14,15 +14,13 @@ lantiq_setup_interfaces()
 	arcadyan,arv7519rw22)
 		ucidef_set_interface_lan "lan1 lan2 lan3 lan4 lan5"
 		;;
-	avm,fritz5490|\
-	avm,fritz5490-micron)
-		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
-		;;
 	arcadyan,vgv7510kw22-brn|\
 	arcadyan,vgv7510kw22-nor|\
 	arcadyan,vgv7519-brn|\
 	arcadyan,vgv7519-nor|\
 	arcadyan,vrv9510kwac23|\
+	avm,fritz5490|\
+	avm,fritz5490-micron|\
 	bt,homehub-v5a|\
 	lantiq,easy80920-nand|\
 	lantiq,easy80920-nor|\



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:04 -0500
Subject: [openwrt/openwrt]  mediatek: append metadata to factory-uboot.bin for
 WSR devices
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31132.1736018296.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3d0ed57b16bf093f9ca94436b4710da48393b746

commit 3d0ed57b16bf093f9ca94436b4710da48393b746
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sat Dec 28 19:07:09 2024 +0900

    mediatek: append metadata to factory-uboot.bin for WSR devices
    
    Append metadata to factory-uboot.bin image to pass the image verification
    on sysupgrade.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17408
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit a06a2ef89db03fac2cbd950304e5b507da9deb1e)
---
 target/linux/mediatek/image/mt7622.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index 9f5fdc8688..faf1b20e4a 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -123,7 +123,7 @@ define Device/buffalo_wsr
 	buffalo-enc $$(DEVICE_MODEL) $$(BUFFALO_TAG_VERSION) -l | \
 	buffalo-tag-dhp $$(DEVICE_MODEL) JP JP | buffalo-enc-tag -l | buffalo-dhp-image
   IMAGE/factory-uboot.bin := append-ubi | \
-	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark
+	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $$$$@ $(KDIR)/ubi_mark | append-metadata
   IMAGE/sysupgrade.bin := \
 	buffalo-trx $$$$(BUFFALO_TRX_MAGIC) $(KDIR)/tmp/$$(DEVICE_NAME).null | \
 	sysupgrade-tar kernel=$$$$@ | append-metadata



From lede-commits at lists.infradead.org  Sat Jan  4 10:45:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 13:45:05 -0500
Subject: [openwrt/openwrt]  ixp4xx: Break out mv88e6060 DSA switch to package
In-Reply-To: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
References: <173601629394.3542247.4187991953785762111@git-01.infra.openwrt.org>
Message-ID: <mailman.31135.1736018328.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e80b7a63f18120620a534db598dd0d96df38a5e1

commit e80b7a63f18120620a534db598dd0d96df38a5e1
Author: Linus Walleij <linus.walleij at linaro.org>
AuthorDate: Sat Dec 28 00:13:37 2024 +0100

    ixp4xx: Break out mv88e6060 DSA switch to package
    
    Just one of the devices uses the Marvell MV88E6060 DSA
    switch so break this out from the generic kernel config
    and into a package selected only by that single device
    and probed at boot instead.
    
    The big win is from being able to drop the dsa_core
    (~600KB) kernel module out of the common kernel on
    devices with no DSA switch.
    
    Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
    (cherry picked from commit 2456a2fd7f72d6afcee4ac9c2eccb312d0b1d36d)
---
 package/kernel/linux/modules/netdevices.mk | 17 +++++++++++++++++
 target/linux/ixp4xx/config-6.6             |  3 ---
 target/linux/ixp4xx/image/Makefile         |  2 +-
 3 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index ee9654761b..247f3782d5 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -575,6 +575,23 @@ endef
 
 $(eval $(call KernelPackage,dsa-b53-mdio))
 
+define KernelPackage/dsa-mv88e6060
+  SUBMENU:=$(NETWORK_DEVICES_MENU)
+  TITLE:=Marvell MV88E6060 DSA Switch
+  DEPENDS:=+kmod-dsa +kmod-phy-marvell
+  KCONFIG:=CONFIG_NET_DSA_TAG_TRAILER \
+  CONFIG_NET_DSA_MV88E6060
+  FILES:= \
+  $(LINUX_DIR)/drivers/net/dsa/mv88e6060.ko \
+  $(LINUX_DIR)/net/dsa/tag_trailer.ko
+  AUTOLOAD:=$(call AutoLoad,41,mv88e6060,1)
+endef
+
+define KernelPackage/dsa-mv88e6060/description
+  Kernel modules for MV88E6060 DSA switches
+endef
+
+$(eval $(call KernelPackage,dsa-mv88e6060))
 
 define KernelPackage/dsa-tag-dsa
   SUBMENU:=$(NETWORK_DEVICES_MENU)
diff --git a/target/linux/ixp4xx/config-6.6 b/target/linux/ixp4xx/config-6.6
index 84a72c8d5c..c0211c940b 100644
--- a/target/linux/ixp4xx/config-6.6
+++ b/target/linux/ixp4xx/config-6.6
@@ -168,9 +168,6 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_KUSER_HELPERS=y
 CONFIG_NEED_PER_CPU_KM=y
 CONFIG_NET_DEVLINK=y
-CONFIG_NET_DSA=y
-CONFIG_NET_DSA_MV88E6060=y
-CONFIG_NET_DSA_TAG_TRAILER=y
 CONFIG_NET_EGRESS=y
 CONFIG_NET_INGRESS=y
 CONFIG_NET_PTP_CLASSIFY=y
diff --git a/target/linux/ixp4xx/image/Makefile b/target/linux/ixp4xx/image/Makefile
index ace533e50f..c33eddee8a 100644
--- a/target/linux/ixp4xx/image/Makefile
+++ b/target/linux/ixp4xx/image/Makefile
@@ -128,7 +128,7 @@ define Device/usrobotics_usr8200
 	DEVICE_VENDOR := USRobotics
 	DEVICE_MODEL := USR8200
 	# USB2 is compiled in and needs no package
-	DEVICE_PACKAGES := ixp4xx-microcode-ethernet kmod-rtc-r7301 kmod-firewire kmod-firewire-ohci
+	DEVICE_PACKAGES := ixp4xx-microcode-ethernet kmod-rtc-r7301 kmod-firewire kmod-firewire-ohci kmod-dsa-mv88e6060
 	DEVICE_DTS := intel-ixp42x-usrobotics-usr8200
 	KERNEL := kernel-bin | append-dtb
 	IMAGES := kernel.bin rootfs.bin



From lede-commits at lists.infradead.org  Sat Jan  4 11:39:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 14:39:22 -0500
Subject: [openwrt/openwrt]  realtek: trim default package selection
In-Reply-To: <173601956242.3613329.6274023730094776493@git-01.infra.openwrt.org>
References: <173601956242.3613329.6274023730094776493@git-01.infra.openwrt.org>
Message-ID: <mailman.31136.1736019565.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c9ae39b2d156ff893d88a7d75b9044aac2fdd8d0

commit c9ae39b2d156ff893d88a7d75b9044aac2fdd8d0
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 1 22:18:05 2025 +0100

    realtek: trim default package selection
    
    Images for certain devices are staring to become too large, as some
    device only have 6MB available in their vendor partition layout for the
    initial install. This is especially pressing for bootloaders only
    supporting gzip compression.
    
    Drop some packages from DEFAULT_PACKAGES that aren't strictly required
    for a factory install. The user can always install more packages later
    using opkg/apk, or via a sysupgrade to a custom build.
    
    firewall4 is kept to ensure the most recent firewall package is selected
    in builds including LuCI.
    ethtool is kept as a frequently used diagnostics tool.
    
    Link: https://github.com/openwrt/openwrt/pull/17450
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/Makefile | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/target/linux/realtek/Makefile b/target/linux/realtek/Makefile
index 2614b148c4..6cdd32a9d8 100644
--- a/target/linux/realtek/Makefile
+++ b/target/linux/realtek/Makefile
@@ -20,13 +20,8 @@ include $(INCLUDE_DIR)/target.mk
 DEFAULT_PACKAGES += \
 	ethtool \
 	firewall4 \
-	ip-bridge \
-	ip-full \
 	kmod-gpio-button-hotplug \
-	kmod-nft-offload \
-	nftables \
 	odhcp6c \
-	tc-bpf \
 	uboot-envtools \
 
 



From lede-commits at lists.infradead.org  Sat Jan  4 11:40:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 14:40:35 -0500
Subject: [openwrt/openwrt]  realtek: trim default package selection
In-Reply-To: <173601963526.3615173.18053290040150172505@git-01.infra.openwrt.org>
References: <173601963526.3615173.18053290040150172505@git-01.infra.openwrt.org>
Message-ID: <mailman.31137.1736019643.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e63d289bbd2f394538ee08fb51ba9f2326b57275

commit e63d289bbd2f394538ee08fb51ba9f2326b57275
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 1 22:18:05 2025 +0100

    realtek: trim default package selection
    
    Images for certain devices are staring to become too large, as some
    device only have 6MB available in their vendor partition layout for the
    initial install. This is especially pressing for bootloaders only
    supporting gzip compression.
    
    Drop some packages from DEFAULT_PACKAGES that aren't strictly required
    for a factory install. The user can always install more packages later
    using opkg/apk, or via a sysupgrade to a custom build.
    
    firewall4 is kept to ensure the most recent firewall package is selected
    in builds including LuCI.
    ethtool is kept as a frequently used diagnostics tool.
    
    Link: https://github.com/openwrt/openwrt/pull/17450
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    (cherry picked from commit c9ae39b2d156ff893d88a7d75b9044aac2fdd8d0)
---
 target/linux/realtek/Makefile | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/target/linux/realtek/Makefile b/target/linux/realtek/Makefile
index 2614b148c4..6cdd32a9d8 100644
--- a/target/linux/realtek/Makefile
+++ b/target/linux/realtek/Makefile
@@ -20,13 +20,8 @@ include $(INCLUDE_DIR)/target.mk
 DEFAULT_PACKAGES += \
 	ethtool \
 	firewall4 \
-	ip-bridge \
-	ip-full \
 	kmod-gpio-button-hotplug \
-	kmod-nft-offload \
-	nftables \
 	odhcp6c \
-	tc-bpf \
 	uboot-envtools \
 
 



From lede-commits at lists.infradead.org  Sat Jan  4 13:10:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:10:19 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for rt5592
In-Reply-To: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
References: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
Message-ID: <mailman.31162.1736025022.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/59557ca19a460d8ad70991f63616d1ad0dfe9823

commit 59557ca19a460d8ad70991f63616d1ad0dfe9823
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for rt5592
    
    This patch contains some performance and stability improvements
    for RT5592:
    
    1. Fix RFCSR register init values for RT5592.
    2. Fix BBP register init values for RT5592.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...fix-RFCSR-register-init-values-for-RT5592.patch | 230 +++++++++++++++++++++
 ...0-fix-BBP-register-init-values-for-RT5592.patch | 119 +++++++++++
 ...import-support-for-external-LNA-on-MT7620.patch |   4 +-
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch |  22 +-
 4 files changed, 362 insertions(+), 13 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch b/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch
new file mode 100644
index 0000000000..15d1601eef
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch
@@ -0,0 +1,230 @@
+From b48887d5de9921d0ff9e88068e3cd555a383d702 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 1/2] rt2x00: fix RFCSR register init values for RT5592
+
+Based on Raink proprietary driver 2.7.1.5, correct the initial
+values of some RFCSR registers for RT5592.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 122 ++++++++----------
+ 1 file changed, 53 insertions(+), 69 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3576,9 +3576,8 @@ static void rt2800_config_channel_rf55xx
+ 
+ 		/* TODO RF27 <- tssi */
+ 
+-		rfcsr = rf->channel <= 10 ? 0x07 : 0x06;
+-		rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
+-		rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
++		rt2800_rfcsr_write(rt2x00dev, 23, rf->channel <= 10 ? 0x08 : 0x07);
++		rt2800_rfcsr_write(rt2x00dev, 59, rf->channel <= 4 ? 0x06 : 0x04);
+ 
+ 		if (is_11b) {
+ 			/* CCK */
+@@ -3599,7 +3598,7 @@ static void rt2800_config_channel_rf55xx
+ 		power_bound = POWER_BOUND;
+ 		ep_reg = 0x2;
+ 	} else {
+-		rt2800_rfcsr_write(rt2x00dev, 10, 0x97);
++		rt2800_rfcsr_write(rt2x00dev, 10, 0x95);
+ 		/* FIMXE: RF11 overwrite */
+ 		rt2800_rfcsr_write(rt2x00dev, 11, 0x40);
+ 		rt2800_rfcsr_write(rt2x00dev, 25, 0xBF);
+@@ -3608,13 +3607,15 @@ static void rt2800_config_channel_rf55xx
+ 		rt2800_rfcsr_write(rt2x00dev, 37, 0x04);
+ 		rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
+ 		rt2800_rfcsr_write(rt2x00dev, 40, 0x42);
+-		rt2800_rfcsr_write(rt2x00dev, 41, 0xBB);
++		rt2800_rfcsr_write(rt2x00dev, 41, 0xAB);
+ 		rt2800_rfcsr_write(rt2x00dev, 42, 0xD7);
+-		rt2800_rfcsr_write(rt2x00dev, 45, 0x41);
++		rt2800_rfcsr_write(rt2x00dev, 45, 0x01);
+ 		rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
+ 		rt2800_rfcsr_write(rt2x00dev, 57, 0x77);
++		rt2800_rfcsr_write(rt2x00dev, 58, 0x19);
+ 		rt2800_rfcsr_write(rt2x00dev, 60, 0x05);
+ 		rt2800_rfcsr_write(rt2x00dev, 61, 0x01);
++		rt2800_rfcsr_write(rt2x00dev, 62, 0x19);
+ 
+ 		/* TODO RF27 <- tssi */
+ 
+@@ -3623,82 +3624,59 @@ static void rt2800_config_channel_rf55xx
+ 			rt2800_rfcsr_write(rt2x00dev, 12, 0x2E);
+ 			rt2800_rfcsr_write(rt2x00dev, 13, 0x22);
+ 			rt2800_rfcsr_write(rt2x00dev, 22, 0x60);
+-			rt2800_rfcsr_write(rt2x00dev, 23, 0x7F);
+-			if (rf->channel <= 50)
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x09);
+-			else if (rf->channel >= 52)
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
++			rt2800_rfcsr_write(rt2x00dev, 23, 0x7E);
++			rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
+ 			rt2800_rfcsr_write(rt2x00dev, 39, 0x1C);
+ 			rt2800_rfcsr_write(rt2x00dev, 43, 0x5B);
+-			rt2800_rfcsr_write(rt2x00dev, 44, 0X40);
+ 			rt2800_rfcsr_write(rt2x00dev, 46, 0X00);
+-			rt2800_rfcsr_write(rt2x00dev, 51, 0xFE);
+-			rt2800_rfcsr_write(rt2x00dev, 52, 0x0C);
+-			rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
++			rt2800_rfcsr_write(rt2x00dev, 51, 0xFD);
++			rt2800_rfcsr_write(rt2x00dev, 52, 0x0E);
++			rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
++			rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
++			rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
++
+ 			if (rf->channel <= 50) {
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x06),
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xD3);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0X32);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
+ 			} else if (rf->channel >= 52) {
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0X2A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
+ 			}
+-
+-			rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
+-			rt2800_rfcsr_write(rt2x00dev, 59, 0x7F);
+-			rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
+-
+ 		} else if (rf->channel >= 100 && rf->channel <= 165) {
+-
+ 			rt2800_rfcsr_write(rt2x00dev, 12, 0x0E);
+ 			rt2800_rfcsr_write(rt2x00dev, 13, 0x42);
+ 			rt2800_rfcsr_write(rt2x00dev, 22, 0x40);
+-			if (rf->channel <= 153) {
+-				rt2800_rfcsr_write(rt2x00dev, 23, 0x3C);
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x06);
+-			} else if (rf->channel >= 155) {
+-				rt2800_rfcsr_write(rt2x00dev, 23, 0x38);
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x05);
+-			}
++			rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
++			rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
++
+ 			if (rf->channel <= 138) {
++				rt2800_rfcsr_write(rt2x00dev, 23, 0x7C);
+ 				rt2800_rfcsr_write(rt2x00dev, 39, 0x1A);
+ 				rt2800_rfcsr_write(rt2x00dev, 43, 0x3B);
+-				rt2800_rfcsr_write(rt2x00dev, 44, 0x20);
+ 				rt2800_rfcsr_write(rt2x00dev, 46, 0x18);
+-			} else if (rf->channel >= 140) {
++			} else {
++				rt2800_rfcsr_write(rt2x00dev, 23, 0x78);
+ 				rt2800_rfcsr_write(rt2x00dev, 39, 0x18);
+ 				rt2800_rfcsr_write(rt2x00dev, 43, 0x1B);
+-				rt2800_rfcsr_write(rt2x00dev, 44, 0x10);
+ 				rt2800_rfcsr_write(rt2x00dev, 46, 0X08);
+ 			}
+-			if (rf->channel <= 124)
+-				rt2800_rfcsr_write(rt2x00dev, 51, 0xFC);
+-			else if (rf->channel >= 126)
+-				rt2800_rfcsr_write(rt2x00dev, 51, 0xEC);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
+-			rt2800_rfcsr_write(rt2x00dev, 54, 0xEB);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x00);
+-			if (rf->channel <= 128)
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
+-			else if (rf->channel >= 130)
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xAB);
+-			if (rf->channel <= 116)
+-				rt2800_rfcsr_write(rt2x00dev, 58, 0x1D);
+-			else if (rf->channel >= 118)
+-				rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 59, 0x3F);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
+-			if (rf->channel <= 116)
+-				rt2800_rfcsr_write(rt2x00dev, 62, 0x1D);
+-			else if (rf->channel >= 118)
+-				rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
++
++			if (rf->channel <= 114) {
++				rt2800_rfcsr_write(rt2x00dev, 24, 0x02);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0x1A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xEA);
++				rt2800_rfcsr_write(rt2x00dev, 56, 0xB3);
++			} else {
++				rt2800_rfcsr_write(rt2x00dev, 24, 0x03);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0x0A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
++				rt2800_rfcsr_write(rt2x00dev, 56, 0x9B);
++			}
++
++			rt2800_rfcsr_write(rt2x00dev, 51, rf->channel <= 124 ? 0xFC : 0xEC);
++			rt2800_rfcsr_write(rt2x00dev, 58, rf->channel <= 116 ? 0x1D : 0x15);
++			rfcsr = (rf->channel >= 116 && rf->channel <= 138) ? 0x7E : 0x7C;
++			rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
+ 		}
+ 
+ 		power_bound = POWER_BOUND_5G;
+@@ -3710,7 +3688,7 @@ static void rt2800_config_channel_rf55xx
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_TX, power_bound);
+ 	else
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
+-	if (is_type_ep)
++	if (!is_type_ep)
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_EP, ep_reg);
+ 	rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
+ 
+@@ -3719,7 +3697,7 @@ static void rt2800_config_channel_rf55xx
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_TX, power_bound);
+ 	else
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_TX, info->default_power2);
+-	if (is_type_ep)
++	if (!is_type_ep)
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_EP, ep_reg);
+ 	rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
+ 
+@@ -3740,7 +3718,6 @@ static void rt2800_config_channel_rf55xx
+ 	rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
+ 
+ 	rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
+-	rt2800_rfcsr_write(rt2x00dev, 6, 0xe4);
+ 
+ 	if (conf_is_ht40(conf))
+ 		rt2800_rfcsr_write(rt2x00dev, 30, 0x16);
+@@ -8505,12 +8482,15 @@ static void rt2800_init_rfcsr_5392(struc
+ 
+ static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
+ {
++	u16 eeprom;
++
+ 	rt2800_rf_init_calibration(rt2x00dev, 30);
+ 
+ 	rt2800_rfcsr_write(rt2x00dev, 1, 0x3F);
++	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
+ 	rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
+ 	rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
+-	rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
++	rt2800_rfcsr_write(rt2x00dev, 6, 0xE0);
+ 	rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
+ 	rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
+ 	rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
+@@ -8526,9 +8506,13 @@ static void rt2800_init_rfcsr_5592(struc
+ 	rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
+ 	rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
+ 	rt2800_rfcsr_write(rt2x00dev, 47, 0x0C);
+-	rt2800_rfcsr_write(rt2x00dev, 53, 0x22);
++	rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
+ 	rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
+ 
++	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
++	if (!rt2x00_get_field16(eeprom, EEPROM_NIC_CONF2_CRYSTAL))
++		rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
++
+ 	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
+ 	msleep(1);
+ 
diff --git a/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch b/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch
new file mode 100644
index 0000000000..19d1951b7b
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch
@@ -0,0 +1,119 @@
+From 1847d817df5585f9d957d16ed2a56ceb41cf6df7 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/2] rt2x00: fix BBP register init values for RT5592
+
+Based on Raink proprietary driver 2.7.1.5, correct the initial
+values of some BBP registers for RT5592.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 32 +++++++++----------
+ 1 file changed, 15 insertions(+), 17 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3746,6 +3746,7 @@ static void rt2800_config_channel_rf55xx
+ 	rt2800_bbp_write(rt2x00dev, 80, (rf->channel <= 14) ? 0x0E : 0x08);
+ 	rt2800_bbp_write(rt2x00dev, 81, (rf->channel <= 14) ? 0x3A : 0x38);
+ 	rt2800_bbp_write(rt2x00dev, 82, (rf->channel <= 14) ? 0x62 : 0x92);
++	rt2800_bbp_write(rt2x00dev, 95, (rf->channel <= 14) ? 0x9A : 0x1A);
+ 
+ 	/* GLRT band configuration */
+ 	rt2800_bbp_write(rt2x00dev, 195, 128);
+@@ -3758,7 +3759,7 @@ static void rt2800_config_channel_rf55xx
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x32 : 0x20);
+ 	rt2800_bbp_write(rt2x00dev, 195, 133);
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x28 : 0x7F);
+-	rt2800_bbp_write(rt2x00dev, 195, 124);
++	rt2800_bbp_write(rt2x00dev, 195, 134);
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F);
+ }
+ 
+@@ -4304,7 +4305,8 @@ static void rt2800_config_channel(struct
+ 		rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
+ 		rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
+ 		rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
+-		if (rt2x00_rt(rt2x00dev, RT6352))
++		if (rt2x00_rt(rt2x00dev, RT5592) ||
++		    rt2x00_rt(rt2x00dev, RT6352))
+ 			rt2800_bbp_write(rt2x00dev, 86, 0x38);
+ 		else
+ 			rt2800_bbp_write(rt2x00dev, 86, 0);
+@@ -4313,6 +4315,7 @@ static void rt2800_config_channel(struct
+ 	if (rf->channel <= 14) {
+ 		if (!rt2x00_rt(rt2x00dev, RT5390) &&
+ 		    !rt2x00_rt(rt2x00dev, RT5392) &&
++		    !rt2x00_rt(rt2x00dev, RT5592) &&
+ 		    !rt2x00_rt(rt2x00dev, RT6352)) {
+ 			if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ 				rt2800_bbp_write(rt2x00dev, 82, 0x62);
+@@ -4336,17 +4339,20 @@ static void rt2800_config_channel(struct
+ 		else if (rt2x00_rt(rt2x00dev, RT3593) ||
+ 			 rt2x00_rt(rt2x00dev, RT3883))
+ 			rt2800_bbp_write(rt2x00dev, 82, 0x82);
+-		else if (!rt2x00_rt(rt2x00dev, RT6352))
++		else if (!rt2x00_rt(rt2x00dev, RT5592) &&
++			 !rt2x00_rt(rt2x00dev, RT6352))
+ 			rt2800_bbp_write(rt2x00dev, 82, 0xf2);
+ 
+ 		if (rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT3883))
+ 			rt2800_bbp_write(rt2x00dev, 83, 0x9a);
+ 
+-		if (rt2x00_has_cap_external_lna_a(rt2x00dev))
+-			rt2800_bbp_write(rt2x00dev, 75, 0x46);
+-		else
+-			rt2800_bbp_write(rt2x00dev, 75, 0x50);
++		if (!rt2x00_rt(rt2x00dev, RT5592)) {
++			if (rt2x00_has_cap_external_lna_a(rt2x00dev))
++				rt2800_bbp_write(rt2x00dev, 75, 0x46);
++			else
++				rt2800_bbp_write(rt2x00dev, 75, 0x50);
++		}
+ 	}
+ 
+ 	reg = rt2800_register_read(rt2x00dev, TX_BAND_CFG);
+@@ -5783,12 +5789,10 @@ static inline void rt2800_set_vgc(struct
+ 		if (rt2x00_rt(rt2x00dev, RT3572) ||
+ 		    rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT3883) ||
++		    rt2x00_rt(rt2x00dev, RT5592) ||
+ 		    rt2x00_rt(rt2x00dev, RT6352)) {
+ 			rt2800_bbp_write_with_rx_chain(rt2x00dev, 66,
+ 						       vgc_level);
+-		} else if (rt2x00_rt(rt2x00dev, RT5592)) {
+-			rt2800_bbp_write(rt2x00dev, 83, qual->rssi > -65 ? 0x4a : 0x7a);
+-			rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, vgc_level);
+ 		} else {
+ 			rt2800_bbp_write(rt2x00dev, 66, vgc_level);
+ 		}
+@@ -7016,7 +7020,6 @@ static void rt2800_init_bbp_5592(struct
+ 	rt2800_bbp_write(rt2x00dev, 88, 0x90);
+ 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
+ 	rt2800_bbp_write(rt2x00dev, 92, 0x02);
+-	rt2800_bbp_write(rt2x00dev, 95, 0x9a);
+ 	rt2800_bbp_write(rt2x00dev, 98, 0x12);
+ 	rt2800_bbp_write(rt2x00dev, 103, 0xC0);
+ 	rt2800_bbp_write(rt2x00dev, 104, 0x92);
+@@ -7027,6 +7030,7 @@ static void rt2800_init_bbp_5592(struct
+ 	rt2800_bbp_write(rt2x00dev, 134, 0xD0);
+ 	rt2800_bbp_write(rt2x00dev, 135, 0xF6);
+ 	rt2800_bbp_write(rt2x00dev, 137, 0x0F);
++	rt2800_bbp_write(rt2x00dev, 148, 0x84);
+ 
+ 	/* Initialize GLRT (Generalized Likehood Radio Test) */
+ 	rt2800_init_bbp_5592_glrt(rt2x00dev);
+@@ -7051,12 +7055,6 @@ static void rt2800_init_bbp_5592(struct
+ 		rt2x00_set_field8(&value, BBP254_BIT7, 1);
+ 		rt2800_bbp_write(rt2x00dev, 254, value);
+ 	}
+-
+-	rt2800_init_freq_calibration(rt2x00dev);
+-
+-	rt2800_bbp_write(rt2x00dev, 84, 0x19);
+-	if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C))
+-		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
+ }
+ 
+ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index 9d15d181d7..88a72fd03e 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10446,8 +10464,10 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10428,8 +10446,10 @@ static void rt2800_restore_rf_bbp_rt6352
  static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
  {
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
@@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	rt2800_r_calibration(rt2x00dev);
  }
-@@ -10471,6 +10491,8 @@ static void rt2800_calibration_rt6352_st
+@@ -10453,6 +10473,8 @@ static void rt2800_calibration_rt6352_st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index f4cc044322..eb0237a389 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -14,7 +14,7 @@
   */
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -3864,14 +3864,16 @@ static void rt2800_config_channel_rf7620
+@@ -3842,14 +3842,16 @@ static void rt2800_config_channel_rf7620
  	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
  	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
  
@@ -39,7 +39,7 @@
  
  	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
  	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
-@@ -3905,18 +3907,23 @@ static void rt2800_config_channel_rf7620
+@@ -3883,18 +3885,23 @@ static void rt2800_config_channel_rf7620
  		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
  	}
  
@@ -73,7 +73,7 @@
  
  	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
  		if (conf_is_ht40(conf)) {
-@@ -4030,25 +4037,29 @@ static void rt2800_config_alc_rt6352(str
+@@ -4008,25 +4015,29 @@ static void rt2800_config_alc_rt6352(str
  	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
  		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
  
@@ -121,7 +121,7 @@
  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
  
  	rt2800_vco_calibration(rt2x00dev);
-@@ -4541,7 +4552,8 @@ static void rt2800_config_channel(struct
+@@ -4524,7 +4535,8 @@ static void rt2800_config_channel(struct
  	if (rt2x00_rt(rt2x00dev, RT6352)) {
  		/* BBP for GLRT BW */
  		bbp = conf_is_ht40(conf) ?
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6061,18 +6073,34 @@ static int rt2800_init_registers(struct
+@@ -6042,18 +6054,34 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -178,7 +178,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7185,14 +7213,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7160,14 +7188,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -203,7 +203,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10422,6 +10452,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10404,6 +10434,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -213,7 +213,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10503,6 +10536,9 @@ static void rt2800_calibration_rt6352_st
+@@ -10485,6 +10518,9 @@ static void rt2800_calibration_rt6352_st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -223,7 +223,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10593,31 +10629,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10575,31 +10611,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -285,7 +285,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10683,63 +10724,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10665,63 +10706,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -412,7 +412,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10802,12 +10851,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10784,12 +10833,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  



From lede-commits at lists.infradead.org  Sat Jan  4 13:10:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:10:18 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for mt7620
In-Reply-To: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
References: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
Message-ID: <mailman.31163.1736025022.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5d583901657bdfbbf9fad77d9247872427aa5c99

commit 5d583901657bdfbbf9fad77d9247872427aa5c99
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for mt7620
    
    This patch contains some performance and stability improvements
    for MT7620:
    
    1. Always calibrate MT7620 when switching channel.
    2. Rework link tuner for MT7620.
    3. Correct MT7620 SDM mode register value.
    4. Fix register operation on RXIQ calibration.
    5. Fix TX_PIN_CFG and TX_ALC_VGA3 init values.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...ys-calibrate-MT7620-when-switching-channe.patch | 77 ++++++++++++++++++++++
 ...21-02-rt2x00-rework-link-tuner-for-MT7620.patch | 48 ++++++++++++++
 ...00-correct-MT7620-SDM-mode-register-value.patch | 25 +++++++
 ...ix-register-operation-on-RXIQ-calibration.patch | 60 +++++++++++++++++
 ...import-support-for-external-LNA-on-MT7620.patch | 10 +--
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch | 25 +++----
 6 files changed, 228 insertions(+), 17 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch b/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch
new file mode 100644
index 0000000000..e66fbd4369
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch
@@ -0,0 +1,77 @@
+From 2c5aad0f9990724cce48e0a53b66bc0438e4603d Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 1/4] rt2x00: always calibrate MT7620 when switching channel
+
+Perform calibration work after each channel switching operation.
+This should help improve the rx/tx signal strength for MT7620.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 24 ++++++++++++++-----
+ 1 file changed, 18 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5704,6 +5704,9 @@ static void rt2800_config_ps(struct rt2x
+ 	}
+ }
+ 
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev);
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev);
++
+ void rt2800_config(struct rt2x00_dev *rt2x00dev,
+ 		   struct rt2x00lib_conf *libconf,
+ 		   const unsigned int flags)
+@@ -5718,10 +5721,18 @@ void rt2800_config(struct rt2x00_dev *rt
+ 		 */
+ 		rt2800_update_survey(rt2x00dev);
+ 
++		if (rt2x00_rt(rt2x00dev, RT6352) &&
++		    !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++			rt2800_calibration_rt6352_stage1(rt2x00dev);
++
+ 		rt2800_config_channel(rt2x00dev, libconf->conf,
+ 				      &libconf->rf, &libconf->channel);
+ 		rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+ 				      libconf->conf->power_level);
++
++		if (rt2x00_rt(rt2x00dev, RT6352) &&
++		    !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++			rt2800_calibration_rt6352_stage2(rt2x00dev);
+ 	}
+ 	if (flags & IEEE80211_CONF_CHANGE_POWER)
+ 		rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+@@ -10427,15 +10438,19 @@ static void rt2800_restore_rf_bbp_rt6352
+ 	}
+ }
+ 
+-static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
+-	u32 reg;
+-
+ 	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ 	    rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ 		rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+ 
+ 	rt2800_r_calibration(rt2x00dev);
++}
++
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev)
++{
++	u32 reg;
++
+ 	rt2800_rf_self_txdc_cal(rt2x00dev);
+ 	rt2800_rxdcoc_calibration(rt2x00dev);
+ 	rt2800_bw_filter_calibration(rt2x00dev, true);
+@@ -10766,9 +10781,6 @@ static void rt2800_init_rfcsr_6352(struc
+ 
+ 	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ 	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+-
+-	/* Do calibration and init PA/LNA */
+-	rt2800_calibration_rt6352(rt2x00dev);
+ }
+ 
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
diff --git a/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch
new file mode 100644
index 0000000000..f7e7a8e5ff
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch
@@ -0,0 +1,48 @@
+From aaa57924324c1ee77afa5e3effc95cc86158ddcc Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/4] rt2x00: rework link tuner for MT7620
+
+Correct the VGC gain value for MT7620 and only do gain calibration
+for supported devices.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5561,6 +5561,9 @@ static void rt2800_config_txpower(struct
+ 
+ void rt2800_gain_calibration(struct rt2x00_dev *rt2x00dev)
+ {
++	if (rt2x00_rt(rt2x00dev, RT6352))
++		return;
++
+ 	rt2800_config_txpower(rt2x00dev, rt2x00dev->hw->conf.chandef.chan,
+ 			      rt2x00dev->tx_power);
+ }
+@@ -5773,9 +5776,10 @@ static u8 rt2800_get_default_vgc(struct
+ 		    rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT5390) ||
+ 		    rt2x00_rt(rt2x00dev, RT5392) ||
+-		    rt2x00_rt(rt2x00dev, RT5592) ||
+-		    rt2x00_rt(rt2x00dev, RT6352))
++		    rt2x00_rt(rt2x00dev, RT5592))
+ 			vgc = 0x1c + (2 * rt2x00dev->lna_gain);
++		else if(rt2x00_rt(rt2x00dev, RT6352))
++			vgc = 0x04 + (2 * rt2x00dev->lna_gain);
+ 		else
+ 			vgc = 0x2e + rt2x00dev->lna_gain;
+ 	} else { /* 5GHZ band */
+@@ -5828,7 +5832,8 @@ void rt2800_link_tuner(struct rt2x00_dev
+ {
+ 	u8 vgc;
+ 
+-	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C))
++	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C) ||
++	    rt2x00_rt(rt2x00dev, RT6352))
+ 		return;
+ 
+ 	/* When RSSI is better than a certain threshold, increase VGC
diff --git a/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch b/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch
new file mode 100644
index 0000000000..7c376df197
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch
@@ -0,0 +1,25 @@
+From b672507ca9f06bb17213036b16bc4f5c5bc65357 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 3/4] rt2x00: correct MT7620 SDM mode register value
+
+rt2x00_set_field8() is a mask writing function. If we want to set
+the BIT(7) for the SDM mode register here, we only need to fill "4"
+in the mask.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3848,7 +3848,7 @@ static void rt2800_config_channel_rf7620
+ 
+ 	/* Default: XO=20MHz , SDM mode */
+ 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+-	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
+ 	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+ 
+ 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
diff --git a/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch b/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch
new file mode 100644
index 0000000000..aa6f9c437c
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch
@@ -0,0 +1,60 @@
+From 2585ada646e4dcf152ab813a24d667e6903105f4 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 4/4] rt2x00: fix register operation on RXIQ calibration
+
+In rt2800_rxiq_calibration(), some variables are overwritten
+before being used. Based on the values of the relevant registers
+in other functions, I believe the correct operation should be
+bit mask writing.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -8846,7 +8846,7 @@ static void rt2800_rxiq_calibration(stru
+ 		rt2x00_warn(rt2x00dev, "Timeout waiting for MAC status in RXIQ calibration\n");
+ 
+ 	bbpval = bbp4 & (~0x18);
+-	bbpval = bbp4 | 0x00;
++	bbpval = bbpval | 0x00;
+ 	rt2800_bbp_write(rt2x00dev, 4, bbpval);
+ 
+ 	bbpval = rt2800_bbp_read(rt2x00dev, 21);
+@@ -8928,13 +8928,13 @@ static void rt2800_rxiq_calibration(stru
+ 	for (ch_idx = 0; ch_idx < 2; ch_idx = ch_idx + 1) {
+ 		if (ch_idx == 0) {
+ 			rfval = rfb0r1 & (~0x3);
+-			rfval = rfb0r1 | 0x1;
++			rfval = rfval | 0x1;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ 			rfval = rfb0r2 & (~0x33);
+-			rfval = rfb0r2 | 0x11;
++			rfval = rfval | 0x11;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ 			rfval = rfb0r42 & (~0x50);
+-			rfval = rfb0r42 | 0x10;
++			rfval = rfval | 0x10;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+ 
+ 			rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006);
+@@ -8947,13 +8947,13 @@ static void rt2800_rxiq_calibration(stru
+ 			rt2800_bbp_dcoc_write(rt2x00dev, 1, 0x00);
+ 		} else {
+ 			rfval = rfb0r1 & (~0x3);
+-			rfval = rfb0r1 | 0x2;
++			rfval = rfval | 0x2;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ 			rfval = rfb0r2 & (~0x33);
+-			rfval = rfb0r2 | 0x22;
++			rfval = rfval | 0x22;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ 			rfval = rfb0r42 & (~0x50);
+-			rfval = rfb0r42 | 0x40;
++			rfval = rfval | 0x40;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+ 
+ 			rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006);
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index 869879178f..9d15d181d7 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,9 +52,9 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
- 	u32 reg;
- 
+@@ -10446,8 +10464,10 @@ static void rt2800_restore_rf_bbp_rt6352
+ static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
 -	    rt2x00_has_cap_external_lna_bg(rt2x00dev))
 +	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
@@ -63,8 +63,8 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 +	}
  
  	rt2800_r_calibration(rt2x00dev);
- 	rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
+ }
+@@ -10471,6 +10491,8 @@ static void rt2800_calibration_rt6352_st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index df7f9927af..f4cc044322 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -20,7 +20,7 @@
  
 -	/* Default: XO=20MHz , SDM mode */
 -	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
--	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+-	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
 -	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
 -
 -	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -29,7 +29,7 @@
 +	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
 +		/* Default: XO=20MHz , SDM mode */
 +		rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
-+		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
 +		rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
 +
 +		rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
+@@ -6061,18 +6073,34 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -162,7 +162,8 @@
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
-+			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
++			rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150f0f);
++			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);
 +			rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
 +			rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
 +			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
@@ -177,7 +178,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7185,14 +7213,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -202,7 +203,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10422,6 +10452,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -212,7 +213,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10503,6 +10536,9 @@ static void rt2800_calibration_rt6352_st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -222,7 +223,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10593,31 +10629,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -284,7 +285,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10683,63 +10724,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -411,7 +412,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10802,12 +10851,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  
@@ -431,6 +432,6 @@
 +		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
 +		rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
 +	}
+ }
  
- 	/* Do calibration and init PA/LNA */
- 	rt2800_calibration_rt6352(rt2x00dev);
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)



From lede-commits at lists.infradead.org  Sat Jan  4 13:10:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:10:17 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for rt2800
 generic
In-Reply-To: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
References: <173602501766.3739784.10467345748064380446@git-01.infra.openwrt.org>
Message-ID: <mailman.31166.1736025026.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/70733c6093ee1e2fae12fdff97425270ea733dae

commit 70733c6093ee1e2fae12fdff97425270ea733dae
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for rt2800 generic
    
    1. Respect the rt2800 hardware TX queue index.
    2. Increase the watchdog sampling frequency.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...00-respect-rt2800-hardware-TX-queue-index.patch | 257 +++++++++++++++++++++
 ...-increase-the-watchdog-sampling-frequency.patch |  74 ++++++
 ...import-support-for-external-LNA-on-MT7620.patch |   4 +-
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch |  22 +-
 4 files changed, 344 insertions(+), 13 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch b/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch
new file mode 100644
index 0000000000..e2c75979df
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch
@@ -0,0 +1,257 @@
+From 654653e718f6c55c6f29fd94cc8152a92c8166ac Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Tue, 24 Dec 2024 08:36:32 +0800
+Subject: [PATCH 1/2] rt2x00: respect the rt2800 hardware TX queue index
+
+The Ralink TX queue register index is different from the Linux
+IEEE80211 queue id definition. Their conversion table is as follows:
+
+Queue   IEEE80211   Ralink
+AC_VO      0          3
+AC_VI      1          2
+AC_BE      2          0
+AC_BK      3          1
+
+The TX queues are still functioning properly under the current
+configuration. I don't have evidence, but I believe there should
+be some differences in the internal hardware implementation of
+different TX queues, e.g. interrupt priority. so it's better to
+respect the queue index defined by the Ralink when we construct
+the TX rings and descriptors.
+
+And the more important thing is that we are using the wrong queue
+index to calculate the register offset and mask in .conf_tx(),
+which resulted in writing incorrect AIFSN, CWMAX, CWMIN and TXOP
+values for all TX queues. This patch introduces a index conversion
+table to fix these parameters.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800.h   | 24 ++++++------
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 20 +++++++---
+ .../net/wireless/ralink/rt2x00/rt2800mmio.c   | 38 ++++++++++---------
+ .../net/wireless/ralink/rt2x00/rt2x00queue.h  | 20 ++++++++++
+ 4 files changed, 67 insertions(+), 35 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
+@@ -379,10 +379,10 @@
+ 
+ /*
+  * WMM_AIFSN_CFG: Aifsn for each EDCA AC
+- * AIFSN0: AC_VO
+- * AIFSN1: AC_VI
+- * AIFSN2: AC_BE
+- * AIFSN3: AC_BK
++ * AIFSN0: AC_BE
++ * AIFSN1: AC_BK
++ * AIFSN2: AC_VI
++ * AIFSN3: AC_VO
+  */
+ #define WMM_AIFSN_CFG			0x0214
+ #define WMM_AIFSN_CFG_AIFSN0		FIELD32(0x0000000f)
+@@ -392,10 +392,10 @@
+ 
+ /*
+  * WMM_CWMIN_CSR: CWmin for each EDCA AC
+- * CWMIN0: AC_VO
+- * CWMIN1: AC_VI
+- * CWMIN2: AC_BE
+- * CWMIN3: AC_BK
++ * CWMIN0: AC_BE
++ * CWMIN1: AC_BK
++ * CWMIN2: AC_VI
++ * CWMIN3: AC_VO
+  */
+ #define WMM_CWMIN_CFG			0x0218
+ #define WMM_CWMIN_CFG_CWMIN0		FIELD32(0x0000000f)
+@@ -405,10 +405,10 @@
+ 
+ /*
+  * WMM_CWMAX_CSR: CWmax for each EDCA AC
+- * CWMAX0: AC_VO
+- * CWMAX1: AC_VI
+- * CWMAX2: AC_BE
+- * CWMAX3: AC_BK
++ * CWMAX0: AC_BE
++ * CWMAX1: AC_BK
++ * CWMAX2: AC_VI
++ * CWMAX3: AC_VO
+  */
+ #define WMM_CWMAX_CFG			0x021c
+ #define WMM_CWMAX_CFG_CWMAX0		FIELD32(0x0000000f)
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -835,7 +835,8 @@ void rt2800_write_tx_data(struct queue_e
+ 			   txdesc->key_idx : txdesc->u.ht.wcid);
+ 	rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
+ 			   txdesc->length);
+-	rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid);
++	rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE,
++			   rt2x00_ac_to_hwq(entry->queue->qid));
+ 	rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1);
+ 	rt2x00_desc_write(txwi, 1, word);
+ 
+@@ -1125,6 +1126,12 @@ void rt2800_txdone(struct rt2x00_dev *rt
+ 	u32 reg;
+ 	u8 qid;
+ 	bool match;
++	static const u8 rt2ac[] = {
++		IEEE80211_AC_BE,
++		IEEE80211_AC_BK,
++		IEEE80211_AC_VI,
++		IEEE80211_AC_VO,
++	};
+ 
+ 	while (quota-- > 0 && kfifo_get(&rt2x00dev->txstatus_fifo, &reg)) {
+ 		/*
+@@ -1132,6 +1139,8 @@ void rt2800_txdone(struct rt2x00_dev *rt
+ 		 * guaranteed to be one of the TX QIDs .
+ 		 */
+ 		qid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_QUEUE);
++		/* Convert Ralink hardware queue index to IEEE80211 queue id. */
++		qid = rt2ac[qid];
+ 		queue = rt2x00queue_get_tx_queue(rt2x00dev, qid);
+ 
+ 		if (unlikely(rt2x00queue_empty(queue))) {
+@@ -12188,8 +12197,9 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);
+ 
+ 	/* Update WMM TXOP register */
+-	offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
+-	field.bit_offset = (queue_idx & 1) * 16;
++	offset = WMM_TXOP0_CFG +
++		 (sizeof(u32) * (!!(rt2x00_ac_to_hwq(queue_idx) & 2)));
++	field.bit_offset = (rt2x00_ac_to_hwq(queue_idx) & 1) * 16;
+ 	field.bit_mask = 0xffff << field.bit_offset;
+ 
+ 	reg = rt2800_register_read(rt2x00dev, offset);
+@@ -12197,7 +12207,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	rt2800_register_write(rt2x00dev, offset, reg);
+ 
+ 	/* Update WMM registers */
+-	field.bit_offset = queue_idx * 4;
++	field.bit_offset = rt2x00_ac_to_hwq(queue_idx) * 4;
+ 	field.bit_mask = 0xf << field.bit_offset;
+ 
+ 	reg = rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG);
+@@ -12213,7 +12223,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
+ 
+ 	/* Update EDCA registers */
+-	offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
++	offset = EDCA_AC0_CFG + (sizeof(u32) * rt2x00_ac_to_hwq(queue_idx));
+ 
+ 	reg = rt2800_register_read(rt2x00dev, offset);
+ 	rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
+@@ -35,7 +35,7 @@ unsigned int rt2800mmio_get_dma_done(str
+ 	case QID_AC_VI:
+ 	case QID_AC_BE:
+ 	case QID_AC_BK:
+-		qid = queue->qid;
++		qid = rt2x00_ac_to_hwq(queue->qid);
+ 		idx = rt2x00mmio_register_read(rt2x00dev, TX_DTX_IDX(qid));
+ 		break;
+ 	case QID_MGMT:
+@@ -456,6 +456,7 @@ void rt2800mmio_kick_queue(struct data_q
+ {
+ 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+ 	struct queue_entry *entry;
++	u8 qid;
+ 
+ 	switch (queue->qid) {
+ 	case QID_AC_VO:
+@@ -464,7 +465,8 @@ void rt2800mmio_kick_queue(struct data_q
+ 	case QID_AC_BK:
+ 		WARN_ON_ONCE(rt2x00queue_empty(queue));
+ 		entry = rt2x00queue_get_entry(queue, Q_INDEX);
+-		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),
++		qid = rt2x00_ac_to_hwq(queue->qid);
++		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(qid),
+ 					  entry->entry_idx);
+ 		hrtimer_start(&rt2x00dev->txstatus_timer,
+ 			      TXSTATUS_TIMEOUT, HRTIMER_MODE_REL);
+@@ -666,36 +668,36 @@ int rt2800mmio_init_queues(struct rt2x00
+ 	 * Initialize registers.
+ 	 */
+ 	entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
+ 				  rt2x00dev->tx[0].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
+ 				  rt2x00dev->tx[1].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
+ 				  rt2x00dev->tx[2].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
+ 				  rt2x00dev->tx[3].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
+ 
+ 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);
+ 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);
+--- a/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
+@@ -57,6 +57,26 @@ enum data_queue_qid {
+ };
+ 
+ /**
++ * rt2x00_ac_to_hwq - Convert IEEE80211 queue id to Ralink hardware
++ * queue register index.
++ * @ac: TX queue id.
++ */
++static inline u8 rt2x00_ac_to_hwq(enum data_queue_qid ac)
++{
++	static const u8 ralink_queue_map[] = {
++		[IEEE80211_AC_BE] = 0,
++		[IEEE80211_AC_BK] = 1,
++		[IEEE80211_AC_VI] = 2,
++		[IEEE80211_AC_VO] = 3,
++	};
++
++	if (unlikely(ac >= IEEE80211_NUM_ACS))
++		return ac;
++
++	return ralink_queue_map[ac];
++}
++
++/**
+  * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
+  *
+  * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
diff --git a/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch b/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch
new file mode 100644
index 0000000000..c60d2ad54a
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch
@@ -0,0 +1,74 @@
+From aec50d1a30349759de0ac535f54c3441bf7ebef7 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/2] rt2x00: increase the watchdog sampling frequency
+
+Increase the sampling frequency of the watchdog when the hung
+counter reaches the threshold to avoid some unnecessary resets.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 45 +++++++++++++------
+ 1 file changed, 32 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -1320,26 +1320,45 @@ static bool rt2800_watchdog_hung(struct
+ 	return true;
+ }
+ 
++static inline bool check_dma_busy_rx(u32 reg_cfg, u32 reg_int)
++{
++	return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
++		rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT));
++}
++
++static inline bool check_dma_busy_tx(u32 reg_cfg, u32 reg_int)
++{
++	return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
++		rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT));
++}
++
+ static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
+ {
+ 	bool busy_rx, busy_tx;
+ 	u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
+ 	u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
+ 
+-	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
+-	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
+-		rt2x00dev->rxdma_busy++;
+-	else
+-		rt2x00dev->rxdma_busy = 0;
+-
+-	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
+-	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
+-		rt2x00dev->txdma_busy++;
+-	else
+-		rt2x00dev->txdma_busy = 0;
++	rt2x00dev->rxdma_busy = check_dma_busy_rx(reg_cfg, reg_int) ?
++				rt2x00dev->rxdma_busy + 1 : 0;
++	rt2x00dev->txdma_busy = check_dma_busy_tx(reg_cfg, reg_int) ?
++				rt2x00dev->txdma_busy + 1 : 0;
++
++	if (rt2x00dev->rxdma_busy > 25 || rt2x00dev->txdma_busy > 25) {
++		int cnt;
++		for (cnt = 0; cnt < 10; cnt++) {
++			msleep(5);
++			reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
++			reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
++
++			if (!check_dma_busy_rx(reg_cfg, reg_int))
++				rt2x00dev->rxdma_busy = 0;
++			if (!check_dma_busy_tx(reg_cfg, reg_int))
++				rt2x00dev->txdma_busy = 0;
++		}
++	}
+ 
+-	busy_rx = rt2x00dev->rxdma_busy > 30;
+-	busy_tx = rt2x00dev->txdma_busy > 30;
++	busy_rx = rt2x00dev->rxdma_busy > 40;
++	busy_tx = rt2x00dev->txdma_busy > 40;
+ 
+ 	if (!busy_rx && !busy_tx)
+ 		return false;
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index bb3f819702..869879178f 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10404,8 +10422,10 @@ static void rt2800_calibration_rt6352(st
+@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
  	u32 reg;
  
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
@@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	rt2800_r_calibration(rt2x00dev);
  	rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10423,6 +10443,8 @@ static void rt2800_calibration_rt6352(st
+@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index 4c07a10590..df7f9927af 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -14,7 +14,7 @@
   */
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -3836,14 +3836,16 @@ static void rt2800_config_channel_rf7620
+@@ -3864,14 +3864,16 @@ static void rt2800_config_channel_rf7620
  	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
  	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
  
@@ -39,7 +39,7 @@
  
  	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
  	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
-@@ -3877,18 +3879,23 @@ static void rt2800_config_channel_rf7620
+@@ -3905,18 +3907,23 @@ static void rt2800_config_channel_rf7620
  		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
  	}
  
@@ -73,7 +73,7 @@
  
  	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
  		if (conf_is_ht40(conf)) {
-@@ -4002,25 +4009,29 @@ static void rt2800_config_alc_rt6352(str
+@@ -4030,25 +4037,29 @@ static void rt2800_config_alc_rt6352(str
  	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
  		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
  
@@ -121,7 +121,7 @@
  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
  
  	rt2800_vco_calibration(rt2x00dev);
-@@ -4513,7 +4524,8 @@ static void rt2800_config_channel(struct
+@@ -4541,7 +4552,8 @@ static void rt2800_config_channel(struct
  	if (rt2x00_rt(rt2x00dev, RT6352)) {
  		/* BBP for GLRT BW */
  		bbp = conf_is_ht40(conf) ?
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6017,18 +6029,33 @@ static int rt2800_init_registers(struct
+@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -177,7 +177,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7141,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -202,7 +202,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10378,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -212,7 +212,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10455,6 +10487,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -222,7 +222,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10545,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -284,7 +284,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10635,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -411,7 +411,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10754,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  



From lede-commits at lists.infradead.org  Sat Jan  4 13:31:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:31:54 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for mt7620
In-Reply-To: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
References: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
Message-ID: <mailman.31167.1736026317.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b8c53881db18abd666624e854b54133831021f3c

commit b8c53881db18abd666624e854b54133831021f3c
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for mt7620
    
    This patch contains some performance and stability improvements
    for MT7620:
    
    1. Always calibrate MT7620 when switching channel.
    2. Rework link tuner for MT7620.
    3. Correct MT7620 SDM mode register value.
    4. Fix register operation on RXIQ calibration.
    5. Fix TX_PIN_CFG and TX_ALC_VGA3 init values.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 5d583901657bdfbbf9fad77d9247872427aa5c99)
---
 ...ys-calibrate-MT7620-when-switching-channe.patch | 77 ++++++++++++++++++++++
 ...21-02-rt2x00-rework-link-tuner-for-MT7620.patch | 48 ++++++++++++++
 ...00-correct-MT7620-SDM-mode-register-value.patch | 25 +++++++
 ...ix-register-operation-on-RXIQ-calibration.patch | 60 +++++++++++++++++
 ...import-support-for-external-LNA-on-MT7620.patch | 10 +--
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch | 25 +++----
 6 files changed, 228 insertions(+), 17 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch b/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch
new file mode 100644
index 0000000000..e66fbd4369
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-01-rt2x00-always-calibrate-MT7620-when-switching-channe.patch
@@ -0,0 +1,77 @@
+From 2c5aad0f9990724cce48e0a53b66bc0438e4603d Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 1/4] rt2x00: always calibrate MT7620 when switching channel
+
+Perform calibration work after each channel switching operation.
+This should help improve the rx/tx signal strength for MT7620.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 24 ++++++++++++++-----
+ 1 file changed, 18 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5704,6 +5704,9 @@ static void rt2800_config_ps(struct rt2x
+ 	}
+ }
+ 
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev);
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev);
++
+ void rt2800_config(struct rt2x00_dev *rt2x00dev,
+ 		   struct rt2x00lib_conf *libconf,
+ 		   const unsigned int flags)
+@@ -5718,10 +5721,18 @@ void rt2800_config(struct rt2x00_dev *rt
+ 		 */
+ 		rt2800_update_survey(rt2x00dev);
+ 
++		if (rt2x00_rt(rt2x00dev, RT6352) &&
++		    !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++			rt2800_calibration_rt6352_stage1(rt2x00dev);
++
+ 		rt2800_config_channel(rt2x00dev, libconf->conf,
+ 				      &libconf->rf, &libconf->channel);
+ 		rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+ 				      libconf->conf->power_level);
++
++		if (rt2x00_rt(rt2x00dev, RT6352) &&
++		    !test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags))
++			rt2800_calibration_rt6352_stage2(rt2x00dev);
+ 	}
+ 	if (flags & IEEE80211_CONF_CHANGE_POWER)
+ 		rt2800_config_txpower(rt2x00dev, libconf->conf->chandef.chan,
+@@ -10427,15 +10438,19 @@ static void rt2800_restore_rf_bbp_rt6352
+ 	}
+ }
+ 
+-static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
++static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
+-	u32 reg;
+-
+ 	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
+ 	    rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ 		rt2800_restore_rf_bbp_rt6352(rt2x00dev);
+ 
+ 	rt2800_r_calibration(rt2x00dev);
++}
++
++static void rt2800_calibration_rt6352_stage2(struct rt2x00_dev *rt2x00dev)
++{
++	u32 reg;
++
+ 	rt2800_rf_self_txdc_cal(rt2x00dev);
+ 	rt2800_rxdcoc_calibration(rt2x00dev);
+ 	rt2800_bw_filter_calibration(rt2x00dev, true);
+@@ -10766,9 +10781,6 @@ static void rt2800_init_rfcsr_6352(struc
+ 
+ 	rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ 	rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+-
+-	/* Do calibration and init PA/LNA */
+-	rt2800_calibration_rt6352(rt2x00dev);
+ }
+ 
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
diff --git a/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch
new file mode 100644
index 0000000000..f7e7a8e5ff
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-02-rt2x00-rework-link-tuner-for-MT7620.patch
@@ -0,0 +1,48 @@
+From aaa57924324c1ee77afa5e3effc95cc86158ddcc Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/4] rt2x00: rework link tuner for MT7620
+
+Correct the VGC gain value for MT7620 and only do gain calibration
+for supported devices.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -5561,6 +5561,9 @@ static void rt2800_config_txpower(struct
+ 
+ void rt2800_gain_calibration(struct rt2x00_dev *rt2x00dev)
+ {
++	if (rt2x00_rt(rt2x00dev, RT6352))
++		return;
++
+ 	rt2800_config_txpower(rt2x00dev, rt2x00dev->hw->conf.chandef.chan,
+ 			      rt2x00dev->tx_power);
+ }
+@@ -5773,9 +5776,10 @@ static u8 rt2800_get_default_vgc(struct
+ 		    rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT5390) ||
+ 		    rt2x00_rt(rt2x00dev, RT5392) ||
+-		    rt2x00_rt(rt2x00dev, RT5592) ||
+-		    rt2x00_rt(rt2x00dev, RT6352))
++		    rt2x00_rt(rt2x00dev, RT5592))
+ 			vgc = 0x1c + (2 * rt2x00dev->lna_gain);
++		else if(rt2x00_rt(rt2x00dev, RT6352))
++			vgc = 0x04 + (2 * rt2x00dev->lna_gain);
+ 		else
+ 			vgc = 0x2e + rt2x00dev->lna_gain;
+ 	} else { /* 5GHZ band */
+@@ -5828,7 +5832,8 @@ void rt2800_link_tuner(struct rt2x00_dev
+ {
+ 	u8 vgc;
+ 
+-	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C))
++	if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C) ||
++	    rt2x00_rt(rt2x00dev, RT6352))
+ 		return;
+ 
+ 	/* When RSSI is better than a certain threshold, increase VGC
diff --git a/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch b/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch
new file mode 100644
index 0000000000..7c376df197
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-03-rt2x00-correct-MT7620-SDM-mode-register-value.patch
@@ -0,0 +1,25 @@
+From b672507ca9f06bb17213036b16bc4f5c5bc65357 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 3/4] rt2x00: correct MT7620 SDM mode register value
+
+rt2x00_set_field8() is a mask writing function. If we want to set
+the BIT(7) for the SDM mode register here, we only need to fill "4"
+in the mask.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3848,7 +3848,7 @@ static void rt2800_config_channel_rf7620
+ 
+ 	/* Default: XO=20MHz , SDM mode */
+ 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
+-	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
+ 	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+ 
+ 	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
diff --git a/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch b/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch
new file mode 100644
index 0000000000..aa6f9c437c
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/621-04-rt2x00-fix-register-operation-on-RXIQ-calibration.patch
@@ -0,0 +1,60 @@
+From 2585ada646e4dcf152ab813a24d667e6903105f4 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 4/4] rt2x00: fix register operation on RXIQ calibration
+
+In rt2800_rxiq_calibration(), some variables are overwritten
+before being used. Based on the values of the relevant registers
+in other functions, I believe the correct operation should be
+bit mask writing.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -8846,7 +8846,7 @@ static void rt2800_rxiq_calibration(stru
+ 		rt2x00_warn(rt2x00dev, "Timeout waiting for MAC status in RXIQ calibration\n");
+ 
+ 	bbpval = bbp4 & (~0x18);
+-	bbpval = bbp4 | 0x00;
++	bbpval = bbpval | 0x00;
+ 	rt2800_bbp_write(rt2x00dev, 4, bbpval);
+ 
+ 	bbpval = rt2800_bbp_read(rt2x00dev, 21);
+@@ -8928,13 +8928,13 @@ static void rt2800_rxiq_calibration(stru
+ 	for (ch_idx = 0; ch_idx < 2; ch_idx = ch_idx + 1) {
+ 		if (ch_idx == 0) {
+ 			rfval = rfb0r1 & (~0x3);
+-			rfval = rfb0r1 | 0x1;
++			rfval = rfval | 0x1;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ 			rfval = rfb0r2 & (~0x33);
+-			rfval = rfb0r2 | 0x11;
++			rfval = rfval | 0x11;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ 			rfval = rfb0r42 & (~0x50);
+-			rfval = rfb0r42 | 0x10;
++			rfval = rfval | 0x10;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+ 
+ 			rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006);
+@@ -8947,13 +8947,13 @@ static void rt2800_rxiq_calibration(stru
+ 			rt2800_bbp_dcoc_write(rt2x00dev, 1, 0x00);
+ 		} else {
+ 			rfval = rfb0r1 & (~0x3);
+-			rfval = rfb0r1 | 0x2;
++			rfval = rfval | 0x2;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, rfval);
+ 			rfval = rfb0r2 & (~0x33);
+-			rfval = rfb0r2 | 0x22;
++			rfval = rfval | 0x22;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 2, rfval);
+ 			rfval = rfb0r42 & (~0x50);
+-			rfval = rfb0r42 | 0x40;
++			rfval = rfval | 0x40;
+ 			rt2800_rfcsr_write_bank(rt2x00dev, 0, 42, rfval);
+ 
+ 			rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006);
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index 869879178f..9d15d181d7 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,9 +52,9 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
- 	u32 reg;
- 
+@@ -10446,8 +10464,10 @@ static void rt2800_restore_rf_bbp_rt6352
+ static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
+ {
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
 -	    rt2x00_has_cap_external_lna_bg(rt2x00dev))
 +	    rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
@@ -63,8 +63,8 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 +	}
  
  	rt2800_r_calibration(rt2x00dev);
- 	rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
+ }
+@@ -10471,6 +10491,8 @@ static void rt2800_calibration_rt6352_st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index df7f9927af..f4cc044322 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -20,7 +20,7 @@
  
 -	/* Default: XO=20MHz , SDM mode */
 -	rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
--	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+-	rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
 -	rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
 -
 -	rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -29,7 +29,7 @@
 +	if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
 +		/* Default: XO=20MHz , SDM mode */
 +		rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
-+		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
++		rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 4);
 +		rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
 +
 +		rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
+@@ -6061,18 +6073,34 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -162,7 +162,8 @@
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
 +			rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
-+			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
++			rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150f0f);
++			rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);
 +			rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
 +			rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
 +			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
@@ -177,7 +178,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7185,14 +7213,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -202,7 +203,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10422,6 +10452,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -212,7 +213,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10503,6 +10536,9 @@ static void rt2800_calibration_rt6352_st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -222,7 +223,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10593,31 +10629,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -284,7 +285,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10683,63 +10724,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -411,7 +412,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10802,12 +10851,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  
@@ -431,6 +432,6 @@
 +		rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
 +		rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
 +	}
+ }
  
- 	/* Do calibration and init PA/LNA */
- 	rt2800_calibration_rt6352(rt2x00dev);
+ static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)



From lede-commits at lists.infradead.org  Sat Jan  4 13:31:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:31:53 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for rt2800
 generic
In-Reply-To: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
References: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
Message-ID: <mailman.31170.1736026317.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/5679b7aef6c65e1996bded86d734206c8f34c6ca

commit 5679b7aef6c65e1996bded86d734206c8f34c6ca
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for rt2800 generic
    
    1. Respect the rt2800 hardware TX queue index.
    2. Increase the watchdog sampling frequency.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 70733c6093ee1e2fae12fdff97425270ea733dae)
---
 ...00-respect-rt2800-hardware-TX-queue-index.patch | 257 +++++++++++++++++++++
 ...-increase-the-watchdog-sampling-frequency.patch |  74 ++++++
 ...import-support-for-external-LNA-on-MT7620.patch |   4 +-
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch |  22 +-
 4 files changed, 344 insertions(+), 13 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch b/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch
new file mode 100644
index 0000000000..e2c75979df
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/620-01-rt2x00-respect-rt2800-hardware-TX-queue-index.patch
@@ -0,0 +1,257 @@
+From 654653e718f6c55c6f29fd94cc8152a92c8166ac Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Tue, 24 Dec 2024 08:36:32 +0800
+Subject: [PATCH 1/2] rt2x00: respect the rt2800 hardware TX queue index
+
+The Ralink TX queue register index is different from the Linux
+IEEE80211 queue id definition. Their conversion table is as follows:
+
+Queue   IEEE80211   Ralink
+AC_VO      0          3
+AC_VI      1          2
+AC_BE      2          0
+AC_BK      3          1
+
+The TX queues are still functioning properly under the current
+configuration. I don't have evidence, but I believe there should
+be some differences in the internal hardware implementation of
+different TX queues, e.g. interrupt priority. so it's better to
+respect the queue index defined by the Ralink when we construct
+the TX rings and descriptors.
+
+And the more important thing is that we are using the wrong queue
+index to calculate the register offset and mask in .conf_tx(),
+which resulted in writing incorrect AIFSN, CWMAX, CWMIN and TXOP
+values for all TX queues. This patch introduces a index conversion
+table to fix these parameters.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800.h   | 24 ++++++------
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 20 +++++++---
+ .../net/wireless/ralink/rt2x00/rt2800mmio.c   | 38 ++++++++++---------
+ .../net/wireless/ralink/rt2x00/rt2x00queue.h  | 20 ++++++++++
+ 4 files changed, 67 insertions(+), 35 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
+@@ -379,10 +379,10 @@
+ 
+ /*
+  * WMM_AIFSN_CFG: Aifsn for each EDCA AC
+- * AIFSN0: AC_VO
+- * AIFSN1: AC_VI
+- * AIFSN2: AC_BE
+- * AIFSN3: AC_BK
++ * AIFSN0: AC_BE
++ * AIFSN1: AC_BK
++ * AIFSN2: AC_VI
++ * AIFSN3: AC_VO
+  */
+ #define WMM_AIFSN_CFG			0x0214
+ #define WMM_AIFSN_CFG_AIFSN0		FIELD32(0x0000000f)
+@@ -392,10 +392,10 @@
+ 
+ /*
+  * WMM_CWMIN_CSR: CWmin for each EDCA AC
+- * CWMIN0: AC_VO
+- * CWMIN1: AC_VI
+- * CWMIN2: AC_BE
+- * CWMIN3: AC_BK
++ * CWMIN0: AC_BE
++ * CWMIN1: AC_BK
++ * CWMIN2: AC_VI
++ * CWMIN3: AC_VO
+  */
+ #define WMM_CWMIN_CFG			0x0218
+ #define WMM_CWMIN_CFG_CWMIN0		FIELD32(0x0000000f)
+@@ -405,10 +405,10 @@
+ 
+ /*
+  * WMM_CWMAX_CSR: CWmax for each EDCA AC
+- * CWMAX0: AC_VO
+- * CWMAX1: AC_VI
+- * CWMAX2: AC_BE
+- * CWMAX3: AC_BK
++ * CWMAX0: AC_BE
++ * CWMAX1: AC_BK
++ * CWMAX2: AC_VI
++ * CWMAX3: AC_VO
+  */
+ #define WMM_CWMAX_CFG			0x021c
+ #define WMM_CWMAX_CFG_CWMAX0		FIELD32(0x0000000f)
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -835,7 +835,8 @@ void rt2800_write_tx_data(struct queue_e
+ 			   txdesc->key_idx : txdesc->u.ht.wcid);
+ 	rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
+ 			   txdesc->length);
+-	rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid);
++	rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE,
++			   rt2x00_ac_to_hwq(entry->queue->qid));
+ 	rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1);
+ 	rt2x00_desc_write(txwi, 1, word);
+ 
+@@ -1125,6 +1126,12 @@ void rt2800_txdone(struct rt2x00_dev *rt
+ 	u32 reg;
+ 	u8 qid;
+ 	bool match;
++	static const u8 rt2ac[] = {
++		IEEE80211_AC_BE,
++		IEEE80211_AC_BK,
++		IEEE80211_AC_VI,
++		IEEE80211_AC_VO,
++	};
+ 
+ 	while (quota-- > 0 && kfifo_get(&rt2x00dev->txstatus_fifo, &reg)) {
+ 		/*
+@@ -1132,6 +1139,8 @@ void rt2800_txdone(struct rt2x00_dev *rt
+ 		 * guaranteed to be one of the TX QIDs .
+ 		 */
+ 		qid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_QUEUE);
++		/* Convert Ralink hardware queue index to IEEE80211 queue id. */
++		qid = rt2ac[qid];
+ 		queue = rt2x00queue_get_tx_queue(rt2x00dev, qid);
+ 
+ 		if (unlikely(rt2x00queue_empty(queue))) {
+@@ -12188,8 +12197,9 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);
+ 
+ 	/* Update WMM TXOP register */
+-	offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
+-	field.bit_offset = (queue_idx & 1) * 16;
++	offset = WMM_TXOP0_CFG +
++		 (sizeof(u32) * (!!(rt2x00_ac_to_hwq(queue_idx) & 2)));
++	field.bit_offset = (rt2x00_ac_to_hwq(queue_idx) & 1) * 16;
+ 	field.bit_mask = 0xffff << field.bit_offset;
+ 
+ 	reg = rt2800_register_read(rt2x00dev, offset);
+@@ -12197,7 +12207,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	rt2800_register_write(rt2x00dev, offset, reg);
+ 
+ 	/* Update WMM registers */
+-	field.bit_offset = queue_idx * 4;
++	field.bit_offset = rt2x00_ac_to_hwq(queue_idx) * 4;
+ 	field.bit_mask = 0xf << field.bit_offset;
+ 
+ 	reg = rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG);
+@@ -12213,7 +12223,7 @@ int rt2800_conf_tx(struct ieee80211_hw *
+ 	rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
+ 
+ 	/* Update EDCA registers */
+-	offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
++	offset = EDCA_AC0_CFG + (sizeof(u32) * rt2x00_ac_to_hwq(queue_idx));
+ 
+ 	reg = rt2800_register_read(rt2x00dev, offset);
+ 	rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c
+@@ -35,7 +35,7 @@ unsigned int rt2800mmio_get_dma_done(str
+ 	case QID_AC_VI:
+ 	case QID_AC_BE:
+ 	case QID_AC_BK:
+-		qid = queue->qid;
++		qid = rt2x00_ac_to_hwq(queue->qid);
+ 		idx = rt2x00mmio_register_read(rt2x00dev, TX_DTX_IDX(qid));
+ 		break;
+ 	case QID_MGMT:
+@@ -456,6 +456,7 @@ void rt2800mmio_kick_queue(struct data_q
+ {
+ 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
+ 	struct queue_entry *entry;
++	u8 qid;
+ 
+ 	switch (queue->qid) {
+ 	case QID_AC_VO:
+@@ -464,7 +465,8 @@ void rt2800mmio_kick_queue(struct data_q
+ 	case QID_AC_BK:
+ 		WARN_ON_ONCE(rt2x00queue_empty(queue));
+ 		entry = rt2x00queue_get_entry(queue, Q_INDEX);
+-		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),
++		qid = rt2x00_ac_to_hwq(queue->qid);
++		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(qid),
+ 					  entry->entry_idx);
+ 		hrtimer_start(&rt2x00dev->txstatus_timer,
+ 			      TXSTATUS_TIMEOUT, HRTIMER_MODE_REL);
+@@ -666,36 +668,36 @@ int rt2800mmio_init_queues(struct rt2x00
+ 	 * Initialize registers.
+ 	 */
+ 	entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
+ 				  rt2x00dev->tx[0].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
+ 				  rt2x00dev->tx[1].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR2,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR0,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT2,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT0,
+ 				  rt2x00dev->tx[2].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX2, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX2, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX0, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX0, 0);
+ 
+ 	entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
+-	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR3,
++	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR1,
+ 				  entry_priv->desc_dma);
+-	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT3,
++	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT1,
+ 				  rt2x00dev->tx[3].limit);
+-	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX3, 0);
+-	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX3, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX1, 0);
++	rt2x00mmio_register_write(rt2x00dev, TX_DTX_IDX1, 0);
+ 
+ 	rt2x00mmio_register_write(rt2x00dev, TX_BASE_PTR4, 0);
+ 	rt2x00mmio_register_write(rt2x00dev, TX_MAX_CNT4, 0);
+--- a/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
++++ b/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
+@@ -57,6 +57,26 @@ enum data_queue_qid {
+ };
+ 
+ /**
++ * rt2x00_ac_to_hwq - Convert IEEE80211 queue id to Ralink hardware
++ * queue register index.
++ * @ac: TX queue id.
++ */
++static inline u8 rt2x00_ac_to_hwq(enum data_queue_qid ac)
++{
++	static const u8 ralink_queue_map[] = {
++		[IEEE80211_AC_BE] = 0,
++		[IEEE80211_AC_BK] = 1,
++		[IEEE80211_AC_VI] = 2,
++		[IEEE80211_AC_VO] = 3,
++	};
++
++	if (unlikely(ac >= IEEE80211_NUM_ACS))
++		return ac;
++
++	return ralink_queue_map[ac];
++}
++
++/**
+  * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
+  *
+  * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
diff --git a/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch b/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch
new file mode 100644
index 0000000000..c60d2ad54a
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/620-02-rt2x00-increase-the-watchdog-sampling-frequency.patch
@@ -0,0 +1,74 @@
+From aec50d1a30349759de0ac535f54c3441bf7ebef7 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/2] rt2x00: increase the watchdog sampling frequency
+
+Increase the sampling frequency of the watchdog when the hung
+counter reaches the threshold to avoid some unnecessary resets.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 45 +++++++++++++------
+ 1 file changed, 32 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -1320,26 +1320,45 @@ static bool rt2800_watchdog_hung(struct
+ 	return true;
+ }
+ 
++static inline bool check_dma_busy_rx(u32 reg_cfg, u32 reg_int)
++{
++	return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
++		rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT));
++}
++
++static inline bool check_dma_busy_tx(u32 reg_cfg, u32 reg_int)
++{
++	return (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
++		rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT));
++}
++
+ static bool rt2800_watchdog_dma_busy(struct rt2x00_dev *rt2x00dev)
+ {
+ 	bool busy_rx, busy_tx;
+ 	u32 reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
+ 	u32 reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
+ 
+-	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_RX_DMA_BUSY) &&
+-	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_RX_COHERENT))
+-		rt2x00dev->rxdma_busy++;
+-	else
+-		rt2x00dev->rxdma_busy = 0;
+-
+-	if (rt2x00_get_field32(reg_cfg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
+-	    rt2x00_get_field32(reg_int, INT_SOURCE_CSR_TX_COHERENT))
+-		rt2x00dev->txdma_busy++;
+-	else
+-		rt2x00dev->txdma_busy = 0;
++	rt2x00dev->rxdma_busy = check_dma_busy_rx(reg_cfg, reg_int) ?
++				rt2x00dev->rxdma_busy + 1 : 0;
++	rt2x00dev->txdma_busy = check_dma_busy_tx(reg_cfg, reg_int) ?
++				rt2x00dev->txdma_busy + 1 : 0;
++
++	if (rt2x00dev->rxdma_busy > 25 || rt2x00dev->txdma_busy > 25) {
++		int cnt;
++		for (cnt = 0; cnt < 10; cnt++) {
++			msleep(5);
++			reg_cfg = rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG);
++			reg_int = rt2800_register_read(rt2x00dev, INT_SOURCE_CSR);
++
++			if (!check_dma_busy_rx(reg_cfg, reg_int))
++				rt2x00dev->rxdma_busy = 0;
++			if (!check_dma_busy_tx(reg_cfg, reg_int))
++				rt2x00dev->txdma_busy = 0;
++		}
++	}
+ 
+-	busy_rx = rt2x00dev->rxdma_busy > 30;
+-	busy_tx = rt2x00dev->txdma_busy > 30;
++	busy_rx = rt2x00dev->rxdma_busy > 40;
++	busy_tx = rt2x00dev->txdma_busy > 40;
+ 
+ 	if (!busy_rx && !busy_tx)
+ 		return false;
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index bb3f819702..869879178f 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10404,8 +10422,10 @@ static void rt2800_calibration_rt6352(st
+@@ -10432,8 +10450,10 @@ static void rt2800_calibration_rt6352(st
  	u32 reg;
  
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
@@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	rt2800_r_calibration(rt2x00dev);
  	rt2800_rf_self_txdc_cal(rt2x00dev);
-@@ -10423,6 +10443,8 @@ static void rt2800_calibration_rt6352(st
+@@ -10451,6 +10471,8 @@ static void rt2800_calibration_rt6352(st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index 4c07a10590..df7f9927af 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -14,7 +14,7 @@
   */
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -3836,14 +3836,16 @@ static void rt2800_config_channel_rf7620
+@@ -3864,14 +3864,16 @@ static void rt2800_config_channel_rf7620
  	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
  	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
  
@@ -39,7 +39,7 @@
  
  	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
  	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
-@@ -3877,18 +3879,23 @@ static void rt2800_config_channel_rf7620
+@@ -3905,18 +3907,23 @@ static void rt2800_config_channel_rf7620
  		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
  	}
  
@@ -73,7 +73,7 @@
  
  	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
  		if (conf_is_ht40(conf)) {
-@@ -4002,25 +4009,29 @@ static void rt2800_config_alc_rt6352(str
+@@ -4030,25 +4037,29 @@ static void rt2800_config_alc_rt6352(str
  	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
  		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
  
@@ -121,7 +121,7 @@
  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
  
  	rt2800_vco_calibration(rt2x00dev);
-@@ -4513,7 +4524,8 @@ static void rt2800_config_channel(struct
+@@ -4541,7 +4552,8 @@ static void rt2800_config_channel(struct
  	if (rt2x00_rt(rt2x00dev, RT6352)) {
  		/* BBP for GLRT BW */
  		bbp = conf_is_ht40(conf) ?
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6017,18 +6029,33 @@ static int rt2800_init_registers(struct
+@@ -6045,18 +6057,33 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -177,7 +177,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7141,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7169,14 +7196,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -202,7 +202,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10378,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10406,6 +10435,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -212,7 +212,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10455,6 +10487,9 @@ static void rt2800_calibration_rt6352(st
+@@ -10483,6 +10515,9 @@ static void rt2800_calibration_rt6352(st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -222,7 +222,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10545,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10573,31 +10608,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -284,7 +284,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10635,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10663,63 +10703,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -411,7 +411,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10754,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10782,12 +10830,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  



From lede-commits at lists.infradead.org  Sat Jan  4 13:31:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:31:55 -0500
Subject: [openwrt/openwrt]  mac80211: rt2x00: some improvements for rt5592
In-Reply-To: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
References: <173602631385.3766072.3899885458092877813@git-01.infra.openwrt.org>
Message-ID: <mailman.31171.1736026319.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/785ea040ec956877d42df46ffa0c91e65fb4ba3c

commit 785ea040ec956877d42df46ffa0c91e65fb4ba3c
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Dec 25 19:39:29 2024 +0800

    mac80211: rt2x00: some improvements for rt5592
    
    This patch contains some performance and stability improvements
    for RT5592:
    
    1. Fix RFCSR register init values for RT5592.
    2. Fix BBP register init values for RT5592.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16845
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 59557ca19a460d8ad70991f63616d1ad0dfe9823)
---
 ...fix-RFCSR-register-init-values-for-RT5592.patch | 230 +++++++++++++++++++++
 ...0-fix-BBP-register-init-values-for-RT5592.patch | 119 +++++++++++
 ...import-support-for-external-LNA-on-MT7620.patch |   4 +-
 ...t7620-differentiate-based-on-SoC-CHIP_VER.patch |  22 +-
 4 files changed, 362 insertions(+), 13 deletions(-)

diff --git a/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch b/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch
new file mode 100644
index 0000000000..15d1601eef
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/622-01-rt2x00-fix-RFCSR-register-init-values-for-RT5592.patch
@@ -0,0 +1,230 @@
+From b48887d5de9921d0ff9e88068e3cd555a383d702 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 1/2] rt2x00: fix RFCSR register init values for RT5592
+
+Based on Raink proprietary driver 2.7.1.5, correct the initial
+values of some RFCSR registers for RT5592.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 122 ++++++++----------
+ 1 file changed, 53 insertions(+), 69 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3576,9 +3576,8 @@ static void rt2800_config_channel_rf55xx
+ 
+ 		/* TODO RF27 <- tssi */
+ 
+-		rfcsr = rf->channel <= 10 ? 0x07 : 0x06;
+-		rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
+-		rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
++		rt2800_rfcsr_write(rt2x00dev, 23, rf->channel <= 10 ? 0x08 : 0x07);
++		rt2800_rfcsr_write(rt2x00dev, 59, rf->channel <= 4 ? 0x06 : 0x04);
+ 
+ 		if (is_11b) {
+ 			/* CCK */
+@@ -3599,7 +3598,7 @@ static void rt2800_config_channel_rf55xx
+ 		power_bound = POWER_BOUND;
+ 		ep_reg = 0x2;
+ 	} else {
+-		rt2800_rfcsr_write(rt2x00dev, 10, 0x97);
++		rt2800_rfcsr_write(rt2x00dev, 10, 0x95);
+ 		/* FIMXE: RF11 overwrite */
+ 		rt2800_rfcsr_write(rt2x00dev, 11, 0x40);
+ 		rt2800_rfcsr_write(rt2x00dev, 25, 0xBF);
+@@ -3608,13 +3607,15 @@ static void rt2800_config_channel_rf55xx
+ 		rt2800_rfcsr_write(rt2x00dev, 37, 0x04);
+ 		rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
+ 		rt2800_rfcsr_write(rt2x00dev, 40, 0x42);
+-		rt2800_rfcsr_write(rt2x00dev, 41, 0xBB);
++		rt2800_rfcsr_write(rt2x00dev, 41, 0xAB);
+ 		rt2800_rfcsr_write(rt2x00dev, 42, 0xD7);
+-		rt2800_rfcsr_write(rt2x00dev, 45, 0x41);
++		rt2800_rfcsr_write(rt2x00dev, 45, 0x01);
+ 		rt2800_rfcsr_write(rt2x00dev, 48, 0x00);
+ 		rt2800_rfcsr_write(rt2x00dev, 57, 0x77);
++		rt2800_rfcsr_write(rt2x00dev, 58, 0x19);
+ 		rt2800_rfcsr_write(rt2x00dev, 60, 0x05);
+ 		rt2800_rfcsr_write(rt2x00dev, 61, 0x01);
++		rt2800_rfcsr_write(rt2x00dev, 62, 0x19);
+ 
+ 		/* TODO RF27 <- tssi */
+ 
+@@ -3623,82 +3624,59 @@ static void rt2800_config_channel_rf55xx
+ 			rt2800_rfcsr_write(rt2x00dev, 12, 0x2E);
+ 			rt2800_rfcsr_write(rt2x00dev, 13, 0x22);
+ 			rt2800_rfcsr_write(rt2x00dev, 22, 0x60);
+-			rt2800_rfcsr_write(rt2x00dev, 23, 0x7F);
+-			if (rf->channel <= 50)
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x09);
+-			else if (rf->channel >= 52)
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
++			rt2800_rfcsr_write(rt2x00dev, 23, 0x7E);
++			rt2800_rfcsr_write(rt2x00dev, 24, 0x07);
+ 			rt2800_rfcsr_write(rt2x00dev, 39, 0x1C);
+ 			rt2800_rfcsr_write(rt2x00dev, 43, 0x5B);
+-			rt2800_rfcsr_write(rt2x00dev, 44, 0X40);
+ 			rt2800_rfcsr_write(rt2x00dev, 46, 0X00);
+-			rt2800_rfcsr_write(rt2x00dev, 51, 0xFE);
+-			rt2800_rfcsr_write(rt2x00dev, 52, 0x0C);
+-			rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
++			rt2800_rfcsr_write(rt2x00dev, 51, 0xFD);
++			rt2800_rfcsr_write(rt2x00dev, 52, 0x0E);
++			rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
++			rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
++			rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
++
+ 			if (rf->channel <= 50) {
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x06),
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xD3);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0X32);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
+ 			} else if (rf->channel >= 52) {
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x04);
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0X2A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF8);
+ 			}
+-
+-			rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
+-			rt2800_rfcsr_write(rt2x00dev, 59, 0x7F);
+-			rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
+-
+ 		} else if (rf->channel >= 100 && rf->channel <= 165) {
+-
+ 			rt2800_rfcsr_write(rt2x00dev, 12, 0x0E);
+ 			rt2800_rfcsr_write(rt2x00dev, 13, 0x42);
+ 			rt2800_rfcsr_write(rt2x00dev, 22, 0x40);
+-			if (rf->channel <= 153) {
+-				rt2800_rfcsr_write(rt2x00dev, 23, 0x3C);
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x06);
+-			} else if (rf->channel >= 155) {
+-				rt2800_rfcsr_write(rt2x00dev, 23, 0x38);
+-				rt2800_rfcsr_write(rt2x00dev, 24, 0x05);
+-			}
++			rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
++			rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
++
+ 			if (rf->channel <= 138) {
++				rt2800_rfcsr_write(rt2x00dev, 23, 0x7C);
+ 				rt2800_rfcsr_write(rt2x00dev, 39, 0x1A);
+ 				rt2800_rfcsr_write(rt2x00dev, 43, 0x3B);
+-				rt2800_rfcsr_write(rt2x00dev, 44, 0x20);
+ 				rt2800_rfcsr_write(rt2x00dev, 46, 0x18);
+-			} else if (rf->channel >= 140) {
++			} else {
++				rt2800_rfcsr_write(rt2x00dev, 23, 0x78);
+ 				rt2800_rfcsr_write(rt2x00dev, 39, 0x18);
+ 				rt2800_rfcsr_write(rt2x00dev, 43, 0x1B);
+-				rt2800_rfcsr_write(rt2x00dev, 44, 0x10);
+ 				rt2800_rfcsr_write(rt2x00dev, 46, 0X08);
+ 			}
+-			if (rf->channel <= 124)
+-				rt2800_rfcsr_write(rt2x00dev, 51, 0xFC);
+-			else if (rf->channel >= 126)
+-				rt2800_rfcsr_write(rt2x00dev, 51, 0xEC);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 52, 0x06);
+-			rt2800_rfcsr_write(rt2x00dev, 54, 0xEB);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x01);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 55, 0x00);
+-			if (rf->channel <= 128)
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xBB);
+-			else if (rf->channel >= 130)
+-				rt2800_rfcsr_write(rt2x00dev, 56, 0xAB);
+-			if (rf->channel <= 116)
+-				rt2800_rfcsr_write(rt2x00dev, 58, 0x1D);
+-			else if (rf->channel >= 118)
+-				rt2800_rfcsr_write(rt2x00dev, 58, 0x15);
+-			if (rf->channel <= 138)
+-				rt2800_rfcsr_write(rt2x00dev, 59, 0x3F);
+-			else if (rf->channel >= 140)
+-				rt2800_rfcsr_write(rt2x00dev, 59, 0x7C);
+-			if (rf->channel <= 116)
+-				rt2800_rfcsr_write(rt2x00dev, 62, 0x1D);
+-			else if (rf->channel >= 118)
+-				rt2800_rfcsr_write(rt2x00dev, 62, 0x15);
++
++			if (rf->channel <= 114) {
++				rt2800_rfcsr_write(rt2x00dev, 24, 0x02);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0x1A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xEA);
++				rt2800_rfcsr_write(rt2x00dev, 56, 0xB3);
++			} else {
++				rt2800_rfcsr_write(rt2x00dev, 24, 0x03);
++				rt2800_rfcsr_write(rt2x00dev, 44, 0x0A);
++				rt2800_rfcsr_write(rt2x00dev, 54, 0xF9);
++				rt2800_rfcsr_write(rt2x00dev, 56, 0x9B);
++			}
++
++			rt2800_rfcsr_write(rt2x00dev, 51, rf->channel <= 124 ? 0xFC : 0xEC);
++			rt2800_rfcsr_write(rt2x00dev, 58, rf->channel <= 116 ? 0x1D : 0x15);
++			rfcsr = (rf->channel >= 116 && rf->channel <= 138) ? 0x7E : 0x7C;
++			rt2800_rfcsr_write(rt2x00dev, 59, rfcsr);
+ 		}
+ 
+ 		power_bound = POWER_BOUND_5G;
+@@ -3710,7 +3688,7 @@ static void rt2800_config_channel_rf55xx
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_TX, power_bound);
+ 	else
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1);
+-	if (is_type_ep)
++	if (!is_type_ep)
+ 		rt2x00_set_field8(&rfcsr, RFCSR49_EP, ep_reg);
+ 	rt2800_rfcsr_write(rt2x00dev, 49, rfcsr);
+ 
+@@ -3719,7 +3697,7 @@ static void rt2800_config_channel_rf55xx
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_TX, power_bound);
+ 	else
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_TX, info->default_power2);
+-	if (is_type_ep)
++	if (!is_type_ep)
+ 		rt2x00_set_field8(&rfcsr, RFCSR50_EP, ep_reg);
+ 	rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
+ 
+@@ -3740,7 +3718,6 @@ static void rt2800_config_channel_rf55xx
+ 	rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
+ 
+ 	rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
+-	rt2800_rfcsr_write(rt2x00dev, 6, 0xe4);
+ 
+ 	if (conf_is_ht40(conf))
+ 		rt2800_rfcsr_write(rt2x00dev, 30, 0x16);
+@@ -8505,12 +8482,15 @@ static void rt2800_init_rfcsr_5392(struc
+ 
+ static void rt2800_init_rfcsr_5592(struct rt2x00_dev *rt2x00dev)
+ {
++	u16 eeprom;
++
+ 	rt2800_rf_init_calibration(rt2x00dev, 30);
+ 
+ 	rt2800_rfcsr_write(rt2x00dev, 1, 0x3F);
++	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
+ 	rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
+ 	rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
+-	rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
++	rt2800_rfcsr_write(rt2x00dev, 6, 0xE0);
+ 	rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
+ 	rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
+ 	rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
+@@ -8526,9 +8506,13 @@ static void rt2800_init_rfcsr_5592(struc
+ 	rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
+ 	rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
+ 	rt2800_rfcsr_write(rt2x00dev, 47, 0x0C);
+-	rt2800_rfcsr_write(rt2x00dev, 53, 0x22);
++	rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
+ 	rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
+ 
++	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
++	if (!rt2x00_get_field16(eeprom, EEPROM_NIC_CONF2_CRYSTAL))
++		rt2800_rfcsr_write(rt2x00dev, 6, 0xE4);
++
+ 	rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
+ 	msleep(1);
+ 
diff --git a/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch b/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch
new file mode 100644
index 0000000000..19d1951b7b
--- /dev/null
+++ b/package/kernel/mac80211/patches/rt2x00/622-02-rt2x00-fix-BBP-register-init-values-for-RT5592.patch
@@ -0,0 +1,119 @@
+From 1847d817df5585f9d957d16ed2a56ceb41cf6df7 Mon Sep 17 00:00:00 2001
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Sun, 22 Dec 2024 17:06:59 +0800
+Subject: [PATCH 2/2] rt2x00: fix BBP register init values for RT5592
+
+Based on Raink proprietary driver 2.7.1.5, correct the initial
+values of some BBP registers for RT5592.
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ .../net/wireless/ralink/rt2x00/rt2800lib.c    | 32 +++++++++----------
+ 1 file changed, 15 insertions(+), 17 deletions(-)
+
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+@@ -3746,6 +3746,7 @@ static void rt2800_config_channel_rf55xx
+ 	rt2800_bbp_write(rt2x00dev, 80, (rf->channel <= 14) ? 0x0E : 0x08);
+ 	rt2800_bbp_write(rt2x00dev, 81, (rf->channel <= 14) ? 0x3A : 0x38);
+ 	rt2800_bbp_write(rt2x00dev, 82, (rf->channel <= 14) ? 0x62 : 0x92);
++	rt2800_bbp_write(rt2x00dev, 95, (rf->channel <= 14) ? 0x9A : 0x1A);
+ 
+ 	/* GLRT band configuration */
+ 	rt2800_bbp_write(rt2x00dev, 195, 128);
+@@ -3758,7 +3759,7 @@ static void rt2800_config_channel_rf55xx
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x32 : 0x20);
+ 	rt2800_bbp_write(rt2x00dev, 195, 133);
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x28 : 0x7F);
+-	rt2800_bbp_write(rt2x00dev, 195, 124);
++	rt2800_bbp_write(rt2x00dev, 195, 134);
+ 	rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F);
+ }
+ 
+@@ -4304,7 +4305,8 @@ static void rt2800_config_channel(struct
+ 		rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
+ 		rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
+ 		rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
+-		if (rt2x00_rt(rt2x00dev, RT6352))
++		if (rt2x00_rt(rt2x00dev, RT5592) ||
++		    rt2x00_rt(rt2x00dev, RT6352))
+ 			rt2800_bbp_write(rt2x00dev, 86, 0x38);
+ 		else
+ 			rt2800_bbp_write(rt2x00dev, 86, 0);
+@@ -4313,6 +4315,7 @@ static void rt2800_config_channel(struct
+ 	if (rf->channel <= 14) {
+ 		if (!rt2x00_rt(rt2x00dev, RT5390) &&
+ 		    !rt2x00_rt(rt2x00dev, RT5392) &&
++		    !rt2x00_rt(rt2x00dev, RT5592) &&
+ 		    !rt2x00_rt(rt2x00dev, RT6352)) {
+ 			if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ 				rt2800_bbp_write(rt2x00dev, 82, 0x62);
+@@ -4336,17 +4339,20 @@ static void rt2800_config_channel(struct
+ 		else if (rt2x00_rt(rt2x00dev, RT3593) ||
+ 			 rt2x00_rt(rt2x00dev, RT3883))
+ 			rt2800_bbp_write(rt2x00dev, 82, 0x82);
+-		else if (!rt2x00_rt(rt2x00dev, RT6352))
++		else if (!rt2x00_rt(rt2x00dev, RT5592) &&
++			 !rt2x00_rt(rt2x00dev, RT6352))
+ 			rt2800_bbp_write(rt2x00dev, 82, 0xf2);
+ 
+ 		if (rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT3883))
+ 			rt2800_bbp_write(rt2x00dev, 83, 0x9a);
+ 
+-		if (rt2x00_has_cap_external_lna_a(rt2x00dev))
+-			rt2800_bbp_write(rt2x00dev, 75, 0x46);
+-		else
+-			rt2800_bbp_write(rt2x00dev, 75, 0x50);
++		if (!rt2x00_rt(rt2x00dev, RT5592)) {
++			if (rt2x00_has_cap_external_lna_a(rt2x00dev))
++				rt2800_bbp_write(rt2x00dev, 75, 0x46);
++			else
++				rt2800_bbp_write(rt2x00dev, 75, 0x50);
++		}
+ 	}
+ 
+ 	reg = rt2800_register_read(rt2x00dev, TX_BAND_CFG);
+@@ -5783,12 +5789,10 @@ static inline void rt2800_set_vgc(struct
+ 		if (rt2x00_rt(rt2x00dev, RT3572) ||
+ 		    rt2x00_rt(rt2x00dev, RT3593) ||
+ 		    rt2x00_rt(rt2x00dev, RT3883) ||
++		    rt2x00_rt(rt2x00dev, RT5592) ||
+ 		    rt2x00_rt(rt2x00dev, RT6352)) {
+ 			rt2800_bbp_write_with_rx_chain(rt2x00dev, 66,
+ 						       vgc_level);
+-		} else if (rt2x00_rt(rt2x00dev, RT5592)) {
+-			rt2800_bbp_write(rt2x00dev, 83, qual->rssi > -65 ? 0x4a : 0x7a);
+-			rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, vgc_level);
+ 		} else {
+ 			rt2800_bbp_write(rt2x00dev, 66, vgc_level);
+ 		}
+@@ -7016,7 +7020,6 @@ static void rt2800_init_bbp_5592(struct
+ 	rt2800_bbp_write(rt2x00dev, 88, 0x90);
+ 	rt2800_bbp_write(rt2x00dev, 91, 0x04);
+ 	rt2800_bbp_write(rt2x00dev, 92, 0x02);
+-	rt2800_bbp_write(rt2x00dev, 95, 0x9a);
+ 	rt2800_bbp_write(rt2x00dev, 98, 0x12);
+ 	rt2800_bbp_write(rt2x00dev, 103, 0xC0);
+ 	rt2800_bbp_write(rt2x00dev, 104, 0x92);
+@@ -7027,6 +7030,7 @@ static void rt2800_init_bbp_5592(struct
+ 	rt2800_bbp_write(rt2x00dev, 134, 0xD0);
+ 	rt2800_bbp_write(rt2x00dev, 135, 0xF6);
+ 	rt2800_bbp_write(rt2x00dev, 137, 0x0F);
++	rt2800_bbp_write(rt2x00dev, 148, 0x84);
+ 
+ 	/* Initialize GLRT (Generalized Likehood Radio Test) */
+ 	rt2800_init_bbp_5592_glrt(rt2x00dev);
+@@ -7051,12 +7055,6 @@ static void rt2800_init_bbp_5592(struct
+ 		rt2x00_set_field8(&value, BBP254_BIT7, 1);
+ 		rt2800_bbp_write(rt2x00dev, 254, value);
+ 	}
+-
+-	rt2800_init_freq_calibration(rt2x00dev);
+-
+-	rt2800_bbp_write(rt2x00dev, 84, 0x19);
+-	if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C))
+-		rt2800_bbp_write(rt2x00dev, 103, 0xc0);
+ }
+ 
+ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
diff --git a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
index 9d15d181d7..88a72fd03e 100644
--- a/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
+++ b/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  	[EEPROM_CHIP_ID]		= 0x0000,
  	[EEPROM_VERSION]		= 0x0001,
-@@ -10446,8 +10464,10 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10428,8 +10446,10 @@ static void rt2800_restore_rf_bbp_rt6352
  static void rt2800_calibration_rt6352_stage1(struct rt2x00_dev *rt2x00dev)
  {
  	if (rt2x00_has_cap_external_pa(rt2x00dev) ||
@@ -64,7 +64,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	rt2800_r_calibration(rt2x00dev);
  }
-@@ -10471,6 +10491,8 @@ static void rt2800_calibration_rt6352_st
+@@ -10453,6 +10473,8 @@ static void rt2800_calibration_rt6352_st
  	    !rt2x00_has_cap_external_lna_bg(rt2x00dev))
  		return;
  
diff --git a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
index f4cc044322..eb0237a389 100644
--- a/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
+++ b/package/kernel/mac80211/patches/rt2x00/996-rt2x00-mt7620-differentiate-based-on-SoC-CHIP_VER.patch
@@ -14,7 +14,7 @@
   */
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
-@@ -3864,14 +3864,16 @@ static void rt2800_config_channel_rf7620
+@@ -3842,14 +3842,16 @@ static void rt2800_config_channel_rf7620
  	rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
  	rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
  
@@ -39,7 +39,7 @@
  
  	rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
  	rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
-@@ -3905,18 +3907,23 @@ static void rt2800_config_channel_rf7620
+@@ -3883,18 +3885,23 @@ static void rt2800_config_channel_rf7620
  		rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
  	}
  
@@ -73,7 +73,7 @@
  
  	if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
  		if (conf_is_ht40(conf)) {
-@@ -4030,25 +4037,29 @@ static void rt2800_config_alc_rt6352(str
+@@ -4008,25 +4015,29 @@ static void rt2800_config_alc_rt6352(str
  	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
  		rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
  
@@ -121,7 +121,7 @@
  	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
  
  	rt2800_vco_calibration(rt2x00dev);
-@@ -4541,7 +4552,8 @@ static void rt2800_config_channel(struct
+@@ -4524,7 +4535,8 @@ static void rt2800_config_channel(struct
  	if (rt2x00_rt(rt2x00dev, RT6352)) {
  		/* BBP for GLRT BW */
  		bbp = conf_is_ht40(conf) ?
@@ -131,7 +131,7 @@
  		      0x15 : 0x1a;
  		rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
  
-@@ -6061,18 +6073,34 @@ static int rt2800_init_registers(struct
+@@ -6042,18 +6054,34 @@ static int rt2800_init_registers(struct
  	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
  	} else if (rt2x00_rt(rt2x00dev, RT6352)) {
@@ -178,7 +178,7 @@
  		reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
  		rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
  		rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
-@@ -7185,14 +7213,16 @@ static void rt2800_init_bbp_6352(struct
+@@ -7160,14 +7188,16 @@ static void rt2800_init_bbp_6352(struct
  	rt2800_bbp_write(rt2x00dev, 188, 0x00);
  	rt2800_bbp_write(rt2x00dev, 189, 0x00);
  
@@ -203,7 +203,7 @@
  
  	/* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
  	rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
-@@ -10422,6 +10452,9 @@ static void rt2800_restore_rf_bbp_rt6352
+@@ -10404,6 +10434,9 @@ static void rt2800_restore_rf_bbp_rt6352
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
  	}
  
@@ -213,7 +213,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
-@@ -10503,6 +10536,9 @@ static void rt2800_calibration_rt6352_st
+@@ -10485,6 +10518,9 @@ static void rt2800_calibration_rt6352_st
  		rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  	}
  
@@ -223,7 +223,7 @@
  	if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  		rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
-@@ -10593,31 +10629,36 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10575,31 +10611,36 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
  	rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
  
@@ -285,7 +285,7 @@
  
  	/* Initialize RF channel register to default value */
  	rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
-@@ -10683,63 +10724,71 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10665,63 +10706,71 @@ static void rt2800_init_rfcsr_6352(struc
  
  	rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
  
@@ -412,7 +412,7 @@
  
  	/* Initialize RF DC calibration register to default value */
  	rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
-@@ -10802,12 +10851,17 @@ static void rt2800_init_rfcsr_6352(struc
+@@ -10784,12 +10833,17 @@ static void rt2800_init_rfcsr_6352(struc
  	rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
  	rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
  



From lede-commits at lists.infradead.org  Sat Jan  4 13:33:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:33:19 -0500
Subject: [openwrt/openwrt]  mediatek: Fix U-Boot variables handling for D-Link
 M30 A1
In-Reply-To: <173602639909.3768263.123309596080834117@git-01.infra.openwrt.org>
References: <173602639909.3768263.123309596080834117@git-01.infra.openwrt.org>
Message-ID: <mailman.31174.1736026402.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/70610a5240a94648e178713f091435bd0ba158d3

commit 70610a5240a94648e178713f091435bd0ba158d3
Author: Roland Reinl <reinlroland+github at gmail.com>
AuthorDate: Wed Dec 18 15:45:37 2024 +0100

    mediatek: Fix U-Boot variables handling for D-Link M30 A1
    
    I think I implemented the U-Boot handling incorrectly on M30 (saw the issue while porting M60 to OpenWrt). Maybe someone with more U-Boot experience can have a look at it.
    What I understood until now:
    
    Before flashing, `sw_tryactive` must be set to 0 because OpenWrt runs on partition 0
    
    During reset after flashing, U-Boot executes the following line:
    `boot_rd_auto_sw_img=if itest.s ${sw_tryactive} == 2; then run boot_by_part; else run boot_by_tryactive; fi`
    
    As `sw_tryactive` was set to 0 before flashing, `boot_by_tryactive` will be executed:
    `boot_by_tryactive=if itest.s ${sw_tryactive} == 0; then setenv sw_tryactive 2; setenv sw_active 1; saveenv; run ub0; else setenv sw_tryactive 2; setenv sw_active 2; saveenv; run ub1; fi`
    
    As `sw_tryactive` was set to 0 before flashing, `sw_active` will be set to 1 and `ub0` will be executed:
    `ub0=setenv bootpart 0; mtkboardboot; run ub0to1; uip main; reset`
    
    If the OpenWrt boot is successful, `ub0to1` and `uip` main will never be executed. Only in case OpenWrt cannot be loaded, `mtkboardboot` will return and the fallback `ub0to1` is executed.
    
    Conclusion: It's sufficient to set `sw_tryacitve` to 0 before flashing, the added code in `target/linux/mediatek/filogic/base-files/etc/init.d/bootcount` is useless.
    In the worst case (/proc/cmdline doesn't contain `bootpart=ubi0` as expected), the bootpart variable would be set to 1 and causes starting the firmware from the second partition instead of the one on the first partition.
    
    Signed-off-by: Roland Reinl <reinlroland+github at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17298
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/filogic/base-files/etc/init.d/bootcount    | 7 -------
 target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh | 1 +
 2 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
index e186589f28..c52d004c63 100755
--- a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
+++ b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
@@ -5,13 +5,6 @@ START=99
 
 boot() {
 	case $(board_name) in
-	dlink,aquila-pro-ai-m30-a1)
-		if grep -q bootpart=ubi0 /proc/cmdline; then
-			fw_setenv bootpart 0
-		else
-			fw_setenv bootpart 1
-		fi
-		;;
 	zyxel,ex5700-telenor)
 		fw_setenv uboot_bootcount 0
 		;;
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index baab9ac291..7556be52bd 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -123,6 +123,7 @@ platform_do_upgrade() {
 	yuncore,ax835)
 		default_do_upgrade "$1"
 		;;
+	dlink,aquila-pro-ai-m30-a1|\
 	dlink,aquila-pro-ai-m60-a1)
 		fw_setenv sw_tryactive 0
 		nand_do_upgrade "$1"



From lede-commits at lists.infradead.org  Sat Jan  4 13:35:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:35:15 -0500
Subject: [openwrt/openwrt]  mediatek: Fix U-Boot variables handling for D-Link
 M30 A1
In-Reply-To: <173602651499.3770812.4565226989802608357@git-01.infra.openwrt.org>
References: <173602651499.3770812.4565226989802608357@git-01.infra.openwrt.org>
Message-ID: <mailman.31175.1736026518.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d92fc99360f0e8c5e8974fdc53d398c107a53072

commit d92fc99360f0e8c5e8974fdc53d398c107a53072
Author: Roland Reinl <reinlroland+github at gmail.com>
AuthorDate: Wed Dec 18 15:45:37 2024 +0100

    mediatek: Fix U-Boot variables handling for D-Link M30 A1
    
    I think I implemented the U-Boot handling incorrectly on M30 (saw the issue while porting M60 to OpenWrt). Maybe someone with more U-Boot experience can have a look at it.
    What I understood until now:
    
    Before flashing, `sw_tryactive` must be set to 0 because OpenWrt runs on partition 0
    
    During reset after flashing, U-Boot executes the following line:
    `boot_rd_auto_sw_img=if itest.s ${sw_tryactive} == 2; then run boot_by_part; else run boot_by_tryactive; fi`
    
    As `sw_tryactive` was set to 0 before flashing, `boot_by_tryactive` will be executed:
    `boot_by_tryactive=if itest.s ${sw_tryactive} == 0; then setenv sw_tryactive 2; setenv sw_active 1; saveenv; run ub0; else setenv sw_tryactive 2; setenv sw_active 2; saveenv; run ub1; fi`
    
    As `sw_tryactive` was set to 0 before flashing, `sw_active` will be set to 1 and `ub0` will be executed:
    `ub0=setenv bootpart 0; mtkboardboot; run ub0to1; uip main; reset`
    
    If the OpenWrt boot is successful, `ub0to1` and `uip` main will never be executed. Only in case OpenWrt cannot be loaded, `mtkboardboot` will return and the fallback `ub0to1` is executed.
    
    Conclusion: It's sufficient to set `sw_tryacitve` to 0 before flashing, the added code in `target/linux/mediatek/filogic/base-files/etc/init.d/bootcount` is useless.
    In the worst case (/proc/cmdline doesn't contain `bootpart=ubi0` as expected), the bootpart variable would be set to 1 and causes starting the firmware from the second partition instead of the one on the first partition.
    
    Signed-off-by: Roland Reinl <reinlroland+github at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17298
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 70610a5240a94648e178713f091435bd0ba158d3)
---
 target/linux/mediatek/filogic/base-files/etc/init.d/bootcount    | 7 -------
 target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh | 1 +
 2 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
index e186589f28..c52d004c63 100755
--- a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
+++ b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
@@ -5,13 +5,6 @@ START=99
 
 boot() {
 	case $(board_name) in
-	dlink,aquila-pro-ai-m30-a1)
-		if grep -q bootpart=ubi0 /proc/cmdline; then
-			fw_setenv bootpart 0
-		else
-			fw_setenv bootpart 1
-		fi
-		;;
 	zyxel,ex5700-telenor)
 		fw_setenv uboot_bootcount 0
 		;;
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index cf80cb5edc..2ad92b2f56 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -123,6 +123,7 @@ platform_do_upgrade() {
 	yuncore,ax835)
 		default_do_upgrade "$1"
 		;;
+	dlink,aquila-pro-ai-m30-a1|\
 	dlink,aquila-pro-ai-m60-a1)
 		fw_setenv sw_tryactive 0
 		nand_do_upgrade "$1"



From lede-commits at lists.infradead.org  Sat Jan  4 13:37:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 04 Jan 2025 16:37:19 -0500
Subject: [openwrt/openwrt]  mediatek/filogic: add support for Cudy AP3000 v1
In-Reply-To: <173602663933.3773504.1031914364079097432@git-01.infra.openwrt.org>
References: <173602663933.3773504.1031914364079097432@git-01.infra.openwrt.org>
Message-ID: <mailman.31176.1736026642.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6dacba30a75b0ac8a65115f78808a97abbb34939

commit 6dacba30a75b0ac8a65115f78808a97abbb34939
Author: Maxim Anisimov <maxim.anisimov.ua at gmail.com>
AuthorDate: Tue Dec 10 16:37:02 2024 +0300

    mediatek/filogic: add support for Cudy AP3000 v1
    
    Hardware:
      SoC:     MT7981b
      RAM:     512 MB
      Flash:   256 MB SPI NAND
      Ethernet:
        1x2.5Gbps (rtl8221b)
      WiFi:    2x2 MT7981
      Button:  Reset
      LED:     1x multicolor
    
    Installation
    ------------
    At the moment, firmware installation is only possible via a transition firmware.
    It's can be requested from the manufacturer by email to support at cudy.com
    
    Signed-off-by: Maxim Anisimov <maxim.anisimov.ua at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17225
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 6992d6e51af34603de099d7bbe9d7e848f109e22)
---
 .../linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts  | 218 +++++++++++++++++++++
 .../filogic/base-files/etc/board.d/02_network      |   1 +
 .../etc/hotplug.d/ieee80211/11_fix_wifi_mac        |   9 +-
 target/linux/mediatek/image/filogic.mk             |  17 ++
 4 files changed, 239 insertions(+), 6 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
new file mode 100644
index 0000000000..bd6c15225b
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
@@ -0,0 +1,218 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+
+/dts-v1/;
+
+#include "mt7981.dtsi"
+
+/ {
+	model = "Cudy AP3000 v1";
+	compatible = "cudy,ap3000-v1", "mediatek,mt7981";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &status_led;
+		led-failsafe = &status_led;
+		led-running = &status_led;
+		led-upgrade = &status_led;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		button-reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&pio 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led-1 {
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		status_led: led-2 {
+			color = <LED_COLOR_ID_AMBER>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	watchdog {
+		compatible = "linux,wdt-gpio";
+		gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
+		hw_algo = "level";
+		hw_margin_ms = <10000>;
+		always-running;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+	status = "okay";
+
+	gmac0: mac at 0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-handle = <&phy1>;
+		phy-mode = "2500base-x";
+
+		nvmem-cell-names = "mac-address";
+		nvmem-cells = <&macaddr_bdinfo_de00 0>;
+	};
+};
+
+&mdio_bus {
+	phy1: phy at 1 {
+		reg = <1>;
+		interrupt-parent = <&pio>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <100000>;
+		reset-deassert-us = <100000>;
+	};
+};
+
+&pio {
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+		};
+
+		conf-pd {
+			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		};
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "okay";
+
+	/* ESMT F50L2G41XA (256M) */
+	spi_nand at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		reg = <0>;
+
+		spi-max-frequency = <52000000>;
+		spi-tx-buswidth = <4>;
+		spi-rx-buswidth = <4>;
+
+		spi-cal-enable;
+		spi-cal-mode = "read-data";
+		spi-cal-datalen = <7>;
+		spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
+		spi-cal-addrlen = <5>;
+		spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "bl2";
+				reg = <0x0 0x100000>;
+				read-only;
+			};
+
+			partition at 100000 {
+				label = "u-boot-env";
+				reg = <0x100000 0x80000>;
+			};
+
+			partition at 180000 {
+				label = "factory";
+				reg = <0x180000 0x200000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom at 0 {
+						reg = <0x0 0x1000>;
+					};
+				};
+			};
+
+			partition at 380000 {
+				label = "bdinfo";
+				reg = <0x380000 0x40000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_bdinfo_de00: macaddr at de00 {
+						compatible = "mac-base";
+						reg = <0xde00 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+
+			partition at 3C0000 {
+				label = "fip";
+				reg = <0x3C0000 0x200000>;
+				read-only;
+			};
+
+			partition at 5C0000 {
+				label = "ubi";
+				reg = <0x5C0000 0x4000000>;
+			};
+		};
+	};
+};
+
+&wifi {
+	nvmem-cell-names = "eeprom";
+	nvmem-cells = <&eeprom_factory_0>;
+	status = "okay";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 31b362c24a..b9c149d072 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -71,6 +71,7 @@ mediatek_setup_interfaces()
 		ucidef_set_interfaces_lan_wan "lan1" eth1
 		;;
 	cudy,ap3000outdoor-v1|\
+	cudy,ap3000-v1|\
 	cudy,re3000-v1|\
 	netgear,wax220|\
 	ubnt,unifi-6-plus|\
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index 4a6e0589a2..6ee525e8d0 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -73,14 +73,11 @@ case "$board" in
 		addr=$(mtd_get_mac_binary "Factory" 0x8000)
 		[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
 		;;
-	cudy,tr3000-v1|\
-	cudy,re3000-v1)
-		addr=$(mtd_get_mac_binary bdinfo 0xde00)
-		[ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
-		[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 1) > /sys${DEVPATH}/macaddress
-		;;
 	cudy,ap3000outdoor-v1|\
+	cudy,ap3000-v1|\
 	cudy,m3000-v1|\
+	cudy,re3000-v1|\
+	cudy,tr3000-v1|\
 	cudy,wr3000s-v1|\
 	cudy,wr3000-v1)
 		addr=$(mtd_get_mac_binary bdinfo 0xde00)
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index c1a3eff6c7..d8d35954b0 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -592,6 +592,23 @@ define Device/cudy_ap3000outdoor-v1
 endef
 TARGET_DEVICES += cudy_ap3000outdoor-v1
 
+define Device/cudy_ap3000-v1
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := AP3000
+  DEVICE_VARIANT := v1
+  DEVICE_DTS := mt7981b-cudy-ap3000-v1
+  DEVICE_DTS_DIR := ../dts
+  SUPPORTED_DEVICES += R49
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE_SIZE := 65536k
+  KERNEL_IN_UBI := 1
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
+endef
+TARGET_DEVICES += cudy_ap3000-v1
+
 define Device/cudy_m3000-v1
   DEVICE_VENDOR := Cudy
   DEVICE_MODEL := M3000



From lede-commits at lists.infradead.org  Sun Jan  5 03:12:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 06:12:16 -0500
Subject: [openwrt/openwrt]  generic: add STMicroelectronics LED1202 driver
In-Reply-To: <173607553612.764488.8548232850815144924@git-01.infra.openwrt.org>
References: <173607553612.764488.8548232850815144924@git-01.infra.openwrt.org>
Message-ID: <mailman.31274.1736075539.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8925c469f4ec919b3df5d8afdbc608cfdb7a8b33

commit 8925c469f4ec919b3df5d8afdbc608cfdb7a8b33
Author: Manuel Fombuena <fombuena at outlook.com>
AuthorDate: Wed Jan 1 20:42:37 2025 +0000

    generic: add STMicroelectronics LED1202 driver
    
    This LED controller has a driver under development which is currently being reviewed by the respective kernel maintainers. They are currently on v11 which is included here.
    
    The LED1202 is a 12-channel low quiescent current LED driver with:
      * Supply range from 2.6 V to 5 V
      * 20 mA current capability per channel
      * 1.8 V compatible I2C control interface
      * 8-bit analog dimming individual control
      * 12-bit local PWM resolution
      * 8 programmable patterns
    
    If the led node is present in the controller then the channel is
    set to active.
    
    The output current can be adjusted separately for each channel by 8-bit
    analog (current sink input) and 12-bit digital (PWM) dimming control. The
    LED1202 implements 12 low-side current generators with independent dimming
    control.
    
    Internal volatile memory allows the user to store up to 8 different patterns,
    each pattern is a particular output configuration in terms of PWM
    duty-cycle (on 4096 steps). Analog dimming (on 256 steps) is per channel but
    common to all patterns. Each device tree LED node will have a corresponding
    entry in /sys/class/leds with the label name. The brightness property
    corresponds to the per channel analog dimming, while the patterns[1-8] to the
    PWM dimming control.
    
    Signed-off-by: Manuel Fombuena <fombuena at outlook.com>
    Link: https://github.com/openwrt/openwrt/pull/17451
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/kernel/linux/modules/leds.mk               |  17 +
 ...00-leds-add-reset-controller-based-driver.patch |   4 +-
 ...support-for-Sercomm-MSP430-LED-controller.patch |   2 +-
 ...-bindings-leds-Add-LED1202-LED-Controller.patch | 181 ++++++++
 .../892-leds-Add-LED1202-I2C-driver.patch          | 513 +++++++++++++++++++++
 .../patches-6.6/950-smartrg-i2c-led-driver.patch   |   4 +-
 6 files changed, 716 insertions(+), 5 deletions(-)

diff --git a/package/kernel/linux/modules/leds.mk b/package/kernel/linux/modules/leds.mk
index 0c42895bb2..98e6fc8849 100644
--- a/package/kernel/linux/modules/leds.mk
+++ b/package/kernel/linux/modules/leds.mk
@@ -233,6 +233,23 @@ endef
 $(eval $(call KernelPackage,leds-pwm))
 
 
+define KernelPackage/leds-st1202
+  SUBMENU:=LED modules
+  TITLE:=LED support for ST LED1202 I2C chips
+  DEPENDS:=+kmod-i2c-core +kmod-ledtrig-pattern
+  KCONFIG:=CONFIG_LEDS_ST1202
+  FILES:= $(LINUX_DIR)/drivers/leds/leds-st1202.ko
+  AUTOLOAD:=$(call AutoProbe,leds-st1202)
+endef
+
+define KernelPackage/leds-st1202/description
+  This option enables support for LEDs connected to LED1202
+  LED driver chips accessed via the I2C bus.
+endef
+
+$(eval $(call KernelPackage,leds-st1202))
+
+
 define KernelPackage/leds-tlc591xx
   SUBMENU:=$(LEDS_MENU)
   TITLE:=LED driver for TLC59108 and TLC59116 controllers
diff --git a/target/linux/ath79/patches-6.6/800-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-6.6/800-leds-add-reset-controller-based-driver.patch
index fa958e767b..e84cc00f4b 100644
--- a/target/linux/ath79/patches-6.6/800-leds-add-reset-controller-based-driver.patch
+++ b/target/linux/ath79/patches-6.6/800-leds-add-reset-controller-based-driver.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <john at phrozen.org>
 
 --- a/drivers/leds/Kconfig
 +++ b/drivers/leds/Kconfig
-@@ -901,6 +901,17 @@ source "drivers/leds/flash/Kconfig"
+@@ -911,6 +911,17 @@ source "drivers/leds/flash/Kconfig"
  comment "RGB LED drivers"
  source "drivers/leds/rgb/Kconfig"
  
@@ -176,7 +176,7 @@ Signed-off-by: John Crispin <john at phrozen.org>
 +MODULE_ALIAS("platform:leds-reset");
 --- a/drivers/leds/Makefile
 +++ b/drivers/leds/Makefile
-@@ -88,6 +88,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
+@@ -89,6 +89,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
  obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
  obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
  obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
diff --git a/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch
index a2e4a62349..0b9a29b18f 100644
--- a/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch
+++ b/target/linux/bmips/patches-6.6/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch
@@ -40,6 +40,6 @@ Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
  obj-$(CONFIG_LEDS_REGULATOR)		+= leds-regulator.o
  obj-$(CONFIG_LEDS_SC27XX_BLTC)		+= leds-sc27xx-bltc.o
 +obj-$(CONFIG_LEDS_SERCOMM_MSP430)	+= leds-sercomm-msp430.o
+ obj-$(CONFIG_LEDS_ST1202)		+= leds-st1202.o
  obj-$(CONFIG_LEDS_SUNFIRE)		+= leds-sunfire.o
  obj-$(CONFIG_LEDS_SYSCON)		+= leds-syscon.o
- obj-$(CONFIG_LEDS_TCA6507)		+= leds-tca6507.o
diff --git a/target/linux/generic/pending-6.6/891-dt-bindings-leds-Add-LED1202-LED-Controller.patch b/target/linux/generic/pending-6.6/891-dt-bindings-leds-Add-LED1202-LED-Controller.patch
new file mode 100644
index 0000000000..164256081a
--- /dev/null
+++ b/target/linux/generic/pending-6.6/891-dt-bindings-leds-Add-LED1202-LED-Controller.patch
@@ -0,0 +1,181 @@
+From: Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>
+To: Pavel Machek <pavel at ucw.cz>, Lee Jones <lee at kernel.org>,
+	Rob Herring <robh at kernel.org>,
+	Krzysztof Kozlowski <krzk+dt at kernel.org>,
+	Conor Dooley <conor+dt at kernel.org>,
+	Jonathan Corbet <corbet at lwn.net>,
+	Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>,
+	linux-leds at vger.kernel.org, devicetree at vger.kernel.org,
+	linux-kernel at vger.kernel.org, linux-doc at vger.kernel.org
+Cc: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+Subject: [PATCH v11 2/3] dt-bindings: leds: Add LED1202 LED Controller
+Date: Wed, 18 Dec 2024 18:33:58 +0000	[thread overview]
+Message-ID: <20241218183401.41687-3-vicentiu.galanopulo at remote-tech.co.uk> (raw)
+In-Reply-To: <20241218183401.41687-1-vicentiu.galanopulo at remote-tech.co.uk>
+
+The LED1202 is a 12-channel low quiescent current LED driver with:
+  * Supply range from 2.6 V to 5 V
+  * 20 mA current capability per channel
+  * 1.8 V compatible I2C control interface
+  * 8-bit analog dimming individual control
+  * 12-bit local PWM resolution
+  * 8 programmable patterns
+
+If the led node is present in the controller then the channel is
+set to active.
+
+Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+---
+    v1: https://lore.kernel.org/lkml/ZnCnnQfwuRueCIQ0 at admins-Air/T/
+    v2: https://lore.kernel.org/all/ZniNdGgKyUMV-hjq at admins-Air/T/
+    v3: https://lore.kernel.org/all/ZniNdGgKyUMV-hjq at admins-Air/T/
+    
+    Changes in v4:
+      - remove label property, use devm_led_classdev_register_ext instead
+    Changes in v3:
+      - remove active property
+    Changes in v2:
+      - renamed label to remove color from it
+      - add color property for each node
+      - add function and function-enumerator property for each node
+
+ .../devicetree/bindings/leds/st,led1202.yaml  | 132 ++++++++++++++++++
+ 1 file changed, 132 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/leds/st,led1202.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/leds/st,led1202.yaml
+@@ -0,0 +1,132 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/leds/st,led1202.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: ST LED1202 LED controllers
++
++maintainers:
++  - Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>
++
++description: |
++  The LED1202 is a 12-channel low quiescent current LED controller
++  programmable via I2C; The output current can be adjusted separately
++  for each channel by 8-bit analog and 12-bit digital dimming control.
++  Datasheet available at
++  https://www.st.com/en/power-management/led1202.html
++
++properties:
++  compatible:
++    const: st,led1202
++
++  reg:
++    maxItems: 1
++
++  "#address-cells":
++    const: 1
++
++  "#size-cells":
++    const: 0
++
++patternProperties:
++  "^led@[0-9a-f]$":
++    type: object
++    $ref: common.yaml#
++    unevaluatedProperties: false
++
++    properties:
++      reg:
++        minimum: 0
++        maximum: 11
++
++    required:
++      - reg
++
++required:
++  - compatible
++  - reg
++  - "#address-cells"
++  - "#size-cells"
++
++additionalProperties: false
++
++examples:
++  - |
++    #include <dt-bindings/leds/common.h>
++
++    i2c {
++        #address-cells = <1>;
++        #size-cells = <0>;
++
++        led-controller at 58 {
++            compatible = "st,led1202";
++            reg = <0x58>;
++            #address-cells = <1>;
++            #size-cells = <0>;
++
++            led at 0 {
++                reg = <0x0>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_RED>;
++                function-enumerator = <1>;
++            };
++
++            led at 1 {
++                reg = <0x1>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_GREEN>;
++                function-enumerator = <2>;
++            };
++
++            led at 2 {
++                reg = <0x2>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_BLUE>;
++                function-enumerator = <3>;
++            };
++
++            led at 3 {
++                reg = <0x3>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_RED>;
++                function-enumerator = <4>;
++            };
++
++            led at 4 {
++                reg = <0x4>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_GREEN>;
++                function-enumerator = <5>;
++            };
++
++            led at 5 {
++                reg = <0x5>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_BLUE>;
++                function-enumerator = <6>;
++            };
++
++            led at 6 {
++                reg = <0x6>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_RED>;
++                function-enumerator = <7>;
++            };
++
++            led at 7 {
++                reg = <0x7>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_GREEN>;
++                function-enumerator = <8>;
++            };
++
++            led at 8 {
++                reg = <0x8>;
++                function = LED_FUNCTION_STATUS;
++                color = <LED_COLOR_ID_BLUE>;
++                function-enumerator = <9>;
++            };
++        };
++    };
++...
diff --git a/target/linux/generic/pending-6.6/892-leds-Add-LED1202-I2C-driver.patch b/target/linux/generic/pending-6.6/892-leds-Add-LED1202-I2C-driver.patch
new file mode 100644
index 0000000000..0777c5ce28
--- /dev/null
+++ b/target/linux/generic/pending-6.6/892-leds-Add-LED1202-I2C-driver.patch
@@ -0,0 +1,513 @@
+From: Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>
+To: Pavel Machek <pavel at ucw.cz>, Lee Jones <lee at kernel.org>,
+	Rob Herring <robh at kernel.org>,
+	Krzysztof Kozlowski <krzk+dt at kernel.org>,
+	Conor Dooley <conor+dt at kernel.org>,
+	Jonathan Corbet <corbet at lwn.net>,
+	Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>,
+	linux-leds at vger.kernel.org, devicetree at vger.kernel.org,
+	linux-kernel at vger.kernel.org, linux-doc at vger.kernel.org
+Subject: [PATCH v11 3/3] leds: Add LED1202 I2C driver
+Date: Wed, 18 Dec 2024 18:33:59 +0000	[thread overview]
+Message-ID: <20241218183401.41687-4-vicentiu.galanopulo at remote-tech.co.uk> (raw)
+In-Reply-To: <20241218183401.41687-1-vicentiu.galanopulo at remote-tech.co.uk>
+
+The output current can be adjusted separately for each channel by 8-bit
+analog (current sink input) and 12-bit digital (PWM) dimming control. The
+LED1202 implements 12 low-side current generators with independent dimming
+control.
+Internal volatile memory allows the user to store up to 8 different patterns,
+each pattern is a particular output configuration in terms of PWM
+duty-cycle (on 4096 steps). Analog dimming (on 256 steps) is per channel but
+common to all patterns. Each device tree LED node will have a corresponding
+entry in /sys/class/leds with the label name. The brightness property
+corresponds to the per channel analog dimming, while the patterns[1-8] to the
+PWM dimming control.
+
+Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo at remote-tech.co.uk>
+---
+    Changes in v10:
+      - update description help in Kconfig
+      - move st1202_led and st1202_chip into one line, declaration and definition
+    Changes in v9:
+      - log errors directly in st1202_write_reg and st1202_read_reg
+      - use mutex guards instead of lock/unlock
+      - remove i2c_set_clientdata
+    Changes in v7:
+      - fix st1202_brightness_get() error: uninitialized symbol 'value'
+    Changes in v6:
+      - fix build error
+    Changes in v5:
+      - remove unused macros
+      - switch to using devm_led_classdev_register_ext (struct st1202_led update)
+      - add prescalar_to_milliseconds (convert [22..5660]ms to [0..255] reg value)
+      - remove register range check in dt_init (range protected by yaml)
+      - address all review comments in v4
+    Changes in v4:
+      - Remove attributes/extended attributes implementation
+      - Use /sys/class/leds/<led>/hw_pattern (Pavel suggestion)
+      - Implement review findings of Christophe JAILLET
+    Changes in v3:
+      - Rename all ll1202 to st1202, including driver file name
+      - Convert all magic numbers to defines
+      - Refactor the show/store callbacks as per Lee's and Thomas's review
+      - Remove ll1202_get_channel and use dev_ext_attributes instead
+      - Log all error values for all the functions
+      - Use sysfs_emit for show callbacks
+    Changes in v2:
+      - Fix build error for device_attribute modes
+
+ drivers/leds/Kconfig       |  10 +
+ drivers/leds/Makefile      |   1 +
+ drivers/leds/leds-st1202.c | 416 +++++++++++++++++++++++++++++++++++++
+ 3 files changed, 427 insertions(+)
+ create mode 100644 drivers/leds/leds-st1202.c
+
+--- a/drivers/leds/Kconfig
++++ b/drivers/leds/Kconfig
+@@ -865,6 +865,16 @@ config LEDS_LM36274
+ 	  Say Y to enable the LM36274 LED driver for TI LMU devices.
+ 	  This supports the LED device LM36274.
+ 
++config LEDS_ST1202
++	tristate "LED Support for STMicroelectronics LED1202 I2C chips"
++	depends on LEDS_CLASS
++	depends on I2C
++	depends on OF
++	select LEDS_TRIGGERS
++	help
++	  Say Y to enable support for LEDs connected to LED1202
++	  LED driver chips accessed via the I2C bus.
++
+ config LEDS_TPS6105X
+ 	tristate "LED support for TI TPS6105X"
+ 	depends on LEDS_CLASS
+--- a/drivers/leds/Makefile
++++ b/drivers/leds/Makefile
+@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_POWERNV)		+= leds-powe
+ obj-$(CONFIG_LEDS_PWM)			+= leds-pwm.o
+ obj-$(CONFIG_LEDS_REGULATOR)		+= leds-regulator.o
+ obj-$(CONFIG_LEDS_SC27XX_BLTC)		+= leds-sc27xx-bltc.o
++obj-$(CONFIG_LEDS_ST1202)		+= leds-st1202.o
+ obj-$(CONFIG_LEDS_SUNFIRE)		+= leds-sunfire.o
+ obj-$(CONFIG_LEDS_SYSCON)		+= leds-syscon.o
+ obj-$(CONFIG_LEDS_TCA6507)		+= leds-tca6507.o
+--- /dev/null
++++ b/drivers/leds/leds-st1202.c
+@@ -0,0 +1,416 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ * LED driver for STMicroelectronics LED1202 chip
++ *
++ * Copyright (C) 2024 Remote-Tech Ltd. UK
++ */
++
++#include <linux/cleanup.h>
++#include <linux/ctype.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/gpio.h>
++#include <linux/i2c.h>
++#include <linux/leds.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/string.h>
++
++#define ST1202_CHAN_DISABLE_ALL            0x00
++#define ST1202_CHAN_ENABLE_HIGH            0x03
++#define ST1202_CHAN_ENABLE_LOW             0x02
++#define ST1202_CONFIG_REG                  0x04
++/* PATS: Pattern sequence feature enable */
++#define ST1202_CONFIG_REG_PATS             BIT(7)
++/* PATSR: Pattern sequence runs (self-clear when sequence is finished) */
++#define ST1202_CONFIG_REG_PATSR            BIT(6)
++#define ST1202_CONFIG_REG_SHFT             BIT(3)
++#define ST1202_DEV_ENABLE                  0x01
++#define ST1202_DEV_ENABLE_ON               BIT(0)
++#define ST1202_DEV_ENABLE_RESET            BIT(7)
++#define ST1202_DEVICE_ID                   0x00
++#define ST1202_ILED_REG0                   0x09
++#define ST1202_MAX_LEDS                    12
++#define ST1202_MAX_PATTERNS                8
++#define ST1202_MILLIS_PATTERN_DUR_MAX      5660
++#define ST1202_MILLIS_PATTERN_DUR_MIN      22
++#define ST1202_PATTERN_DUR                 0x16
++#define ST1202_PATTERN_PWM                 0x1E
++#define ST1202_PATTERN_REP                 0x15
++
++struct st1202_led {
++	struct fwnode_handle *fwnode;
++	struct led_classdev led_cdev;
++	struct st1202_chip *chip;
++	bool is_active;
++	int led_num;
++};
++
++struct st1202_chip {
++	struct i2c_client *client;
++	struct mutex lock;
++	struct st1202_led leds[ST1202_MAX_LEDS];
++};
++
++static struct st1202_led *cdev_to_st1202_led(struct led_classdev *cdev)
++{
++	return container_of(cdev, struct st1202_led, led_cdev);
++}
++
++static int st1202_read_reg(struct st1202_chip *chip, int reg, uint8_t *val)
++{
++	struct device *dev = &chip->client->dev;
++	int ret;
++
++	ret = i2c_smbus_read_byte_data(chip->client, reg);
++	if (ret < 0) {
++		dev_err(dev, "Failed to read register [0x%x]: %d\n", reg, ret);
++		return ret;
++	}
++
++	*val = (uint8_t)ret;
++	return 0;
++}
++
++static int st1202_write_reg(struct st1202_chip *chip, int reg, uint8_t val)
++{
++	struct device *dev = &chip->client->dev;
++	int ret;
++
++	ret = i2c_smbus_write_byte_data(chip->client, reg, val);
++	if (ret != 0)
++		dev_err(dev, "Failed to write %d to register [0x%x]: %d\n", val, reg, ret);
++
++	return ret;
++}
++
++static uint8_t st1202_prescalar_to_miliseconds(unsigned int value)
++{
++	return value / ST1202_MILLIS_PATTERN_DUR_MIN - 1;
++}
++
++static int st1202_pwm_pattern_write(struct st1202_chip *chip, int led_num,
++				int pattern, unsigned int value)
++{
++	u8 value_l, value_h;
++	int ret;
++
++	value_l = (u8)value;
++	value_h = (u8)(value >> 8);
++
++	/*
++	 *  Datasheet: Register address low = 1Eh + 2*(xh) + 18h*(yh),
++	 *  where x is the channel number (led number) in hexadecimal (x = 00h .. 0Bh)
++	 *  and y is the pattern number in hexadecimal (y = 00h .. 07h)
++	 */
++	ret = st1202_write_reg(chip, (ST1202_PATTERN_PWM + (led_num * 2) + 0x18 * pattern),
++				value_l);
++	if (ret != 0)
++		return ret;
++
++	/*
++	 * Datasheet: Register address high = 1Eh + 01h + 2(xh) +18h*(yh),
++	 * where x is the channel number in hexadecimal (x = 00h .. 0Bh)
++	 * and y is the pattern number in hexadecimal (y = 00h .. 07h)
++	 */
++	ret = st1202_write_reg(chip, (ST1202_PATTERN_PWM + 0x1 + (led_num * 2) + 0x18 * pattern),
++				value_h);
++	if (ret != 0)
++		return ret;
++
++	return 0;
++}
++
++static int st1202_duration_pattern_write(struct st1202_chip *chip, int pattern,
++					unsigned int value)
++{
++	return st1202_write_reg(chip, (ST1202_PATTERN_DUR + pattern),
++				st1202_prescalar_to_miliseconds(value));
++}
++
++static void st1202_brightness_set(struct led_classdev *led_cdev,
++				enum led_brightness value)
++{
++	struct st1202_led *led = cdev_to_st1202_led(led_cdev);
++	struct st1202_chip *chip = led->chip;
++
++	guard(mutex)(&chip->lock);
++
++	st1202_write_reg(chip, ST1202_ILED_REG0 + led->led_num, value);
++}
++
++static enum led_brightness st1202_brightness_get(struct led_classdev *led_cdev)
++{
++	struct st1202_led *led = cdev_to_st1202_led(led_cdev);
++	struct st1202_chip *chip = led->chip;
++	u8 value = 0;
++
++	guard(mutex)(&chip->lock);
++
++	st1202_read_reg(chip, ST1202_ILED_REG0 + led->led_num, &value);
++
++	return value;
++}
++
++static int st1202_channel_set(struct st1202_chip *chip, int led_num, bool active)
++{
++	u8 chan_low, chan_high;
++	int ret;
++
++	guard(mutex)(&chip->lock);
++
++	if (led_num <= 7) {
++		ret = st1202_read_reg(chip, ST1202_CHAN_ENABLE_LOW, &chan_low);
++		if (ret < 0)
++			return ret;
++
++		chan_low = active ? chan_low | BIT(led_num) : chan_low & ~BIT(led_num);
++
++		ret = st1202_write_reg(chip, ST1202_CHAN_ENABLE_LOW, chan_low);
++		if (ret < 0)
++			return ret;
++
++	} else {
++		ret = st1202_read_reg(chip, ST1202_CHAN_ENABLE_HIGH, &chan_high);
++		if (ret < 0)
++			return ret;
++
++		chan_high = active ? chan_high | (BIT(led_num) >> 8) :
++					chan_high & ~(BIT(led_num) >> 8);
++
++		ret = st1202_write_reg(chip, ST1202_CHAN_ENABLE_HIGH, chan_high);
++		if (ret < 0)
++			return ret;
++	}
++
++	return 0;
++}
++
++static int st1202_led_set(struct led_classdev *ldev, enum led_brightness value)
++{
++	struct st1202_led *led = cdev_to_st1202_led(ldev);
++	struct st1202_chip *chip = led->chip;
++
++	return st1202_channel_set(chip, led->led_num, value == LED_OFF ? false : true);
++}
++
++static int st1202_led_pattern_clear(struct led_classdev *ldev)
++{
++	struct st1202_led *led = cdev_to_st1202_led(ldev);
++	struct st1202_chip *chip = led->chip;
++	int ret;
++
++	guard(mutex)(&chip->lock);
++
++	for (int patt = 0; patt < ST1202_MAX_PATTERNS; patt++) {
++		ret = st1202_pwm_pattern_write(chip, led->led_num, patt, LED_OFF);
++		if (ret != 0)
++			return ret;
++
++		ret = st1202_duration_pattern_write(chip, patt, ST1202_MILLIS_PATTERN_DUR_MIN);
++		if (ret != 0)
++			return ret;
++	}
++
++	return 0;
++}
++
++static int st1202_led_pattern_set(struct led_classdev *ldev,
++				struct led_pattern *pattern,
++				u32 len, int repeat)
++{
++	struct st1202_led *led = cdev_to_st1202_led(ldev);
++	struct st1202_chip *chip = led->chip;
++	int ret;
++
++	if (len > ST1202_MAX_PATTERNS)
++		return -EINVAL;
++
++	guard(mutex)(&chip->lock);
++
++	for (int patt = 0; patt < len; patt++) {
++		if (pattern[patt].delta_t < ST1202_MILLIS_PATTERN_DUR_MIN ||
++				pattern[patt].delta_t > ST1202_MILLIS_PATTERN_DUR_MAX)
++			return -EINVAL;
++
++		ret = st1202_pwm_pattern_write(chip, led->led_num, patt, pattern[patt].brightness);
++		if (ret != 0)
++			return ret;
++
++		ret = st1202_duration_pattern_write(chip, patt, pattern[patt].delta_t);
++		if (ret != 0)
++			return ret;
++	}
++
++	ret = st1202_write_reg(chip, ST1202_PATTERN_REP, repeat);
++	if (ret != 0)
++		return ret;
++
++	ret = st1202_write_reg(chip, ST1202_CONFIG_REG, (ST1202_CONFIG_REG_PATSR |
++							ST1202_CONFIG_REG_PATS | ST1202_CONFIG_REG_SHFT));
++	if (ret != 0)
++		return ret;
++
++	return 0;
++}
++
++static int st1202_dt_init(struct st1202_chip *chip)
++{
++	struct device *dev = &chip->client->dev;
++	struct st1202_led *led;
++	int err, reg;
++
++	for_each_available_child_of_node_scoped(dev_of_node(dev), child) {
++		struct led_init_data init_data = {};
++
++		err = of_property_read_u32(child, "reg", &reg);
++		if (err)
++			return dev_err_probe(dev, err, "Invalid register\n");
++
++		led = &chip->leds[reg];
++		led->is_active = true;
++		led->fwnode = of_fwnode_handle(child);
++
++		led->led_cdev.max_brightness = U8_MAX;
++		led->led_cdev.brightness_set_blocking = st1202_led_set;
++		led->led_cdev.pattern_set = st1202_led_pattern_set;
++		led->led_cdev.pattern_clear = st1202_led_pattern_clear;
++		led->led_cdev.default_trigger = "pattern";
++
++		init_data.fwnode = led->fwnode;
++		init_data.devicename = "st1202";
++		init_data.default_label = ":";
++
++		err = devm_led_classdev_register_ext(dev, &led->led_cdev, &init_data);
++		if (err < 0)
++			return dev_err_probe(dev, err, "Failed to register LED class device\n");
++
++		led->led_cdev.brightness_set = st1202_brightness_set;
++		led->led_cdev.brightness_get = st1202_brightness_get;
++	}
++
++	return 0;
++}
++
++static int st1202_setup(struct st1202_chip *chip)
++{
++	int ret;
++
++	guard(mutex)(&chip->lock);
++
++	/*
++	 * Once the supply voltage is applied, the LED1202 executes some internal checks,
++	 * afterwords it stops the oscillator and puts the internal LDO in quiescent mode.
++	 * To start the device, EN bit must be set inside the ?Device Enable? register at
++	 * address 01h. As soon as EN is set, the LED1202 loads the adjustment parameters
++	 * from the internal non-volatile memory and performs an auto-calibration procedure
++	 * in order to increase the output current precision.
++	 * Such initialization lasts about 6.5 ms.
++	 */
++
++	/* Reset the chip during setup */
++	ret = st1202_write_reg(chip, ST1202_DEV_ENABLE, ST1202_DEV_ENABLE_RESET);
++	if (ret < 0)
++		return ret;
++
++	/* Enable phase-shift delay feature */
++	ret = st1202_write_reg(chip, ST1202_CONFIG_REG, ST1202_CONFIG_REG_SHFT);
++	if (ret < 0)
++		return ret;
++
++	/* Enable the device */
++	ret = st1202_write_reg(chip, ST1202_DEV_ENABLE, ST1202_DEV_ENABLE_ON);
++	if (ret < 0)
++		return ret;
++
++	/* Duration of initialization */
++	usleep_range(6500, 10000);
++
++	/* Deactivate all LEDS (channels) and activate only the ones found in Device Tree */
++	ret = st1202_write_reg(chip, ST1202_CHAN_ENABLE_LOW, ST1202_CHAN_DISABLE_ALL);
++	if (ret < 0)
++		return ret;
++
++	ret = st1202_write_reg(chip, ST1202_CHAN_ENABLE_HIGH, ST1202_CHAN_DISABLE_ALL);
++	if (ret < 0)
++		return ret;
++
++	ret = st1202_write_reg(chip, ST1202_CONFIG_REG,
++				ST1202_CONFIG_REG_PATS | ST1202_CONFIG_REG_PATSR);
++	if (ret < 0)
++		return ret;
++
++	return 0;
++}
++
++static int st1202_probe(struct i2c_client *client)
++{
++	struct st1202_chip *chip;
++	struct st1202_led *led;
++	int ret;
++
++	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
++		return dev_err_probe(&client->dev, -EIO, "SMBUS Byte Data not Supported\n");
++
++	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
++	if (!chip)
++		return -ENOMEM;
++
++	devm_mutex_init(&client->dev, &chip->lock);
++	chip->client = client;
++
++	ret = st1202_dt_init(chip);
++	if (ret < 0)
++		return ret;
++
++	ret = st1202_setup(chip);
++	if (ret < 0)
++		return ret;
++
++	for (int i = 0; i < ST1202_MAX_LEDS; i++) {
++		led = &chip->leds[i];
++		led->chip = chip;
++		led->led_num = i;
++
++		if (!led->is_active)
++			continue;
++
++		ret = st1202_channel_set(led->chip, led->led_num, true);
++		if (ret < 0)
++			return dev_err_probe(&client->dev, ret,
++					"Failed to activate LED channel\n");
++
++		ret = st1202_led_pattern_clear(&led->led_cdev);
++		if (ret < 0)
++			return dev_err_probe(&client->dev, ret,
++					"Failed to clear LED pattern\n");
++	}
++
++	return 0;
++}
++
++static const struct i2c_device_id st1202_id[] = {
++	{ "st1202-i2c" },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(i2c, st1202_id);
++
++static const struct of_device_id st1202_dt_ids[] = {
++	{ .compatible = "st,led1202" },
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, st1202_dt_ids);
++
++static struct i2c_driver st1202_driver = {
++	.driver = {
++		.name = "leds-st1202",
++		.of_match_table = of_match_ptr(st1202_dt_ids),
++	},
++	.probe = st1202_probe,
++	.id_table = st1202_id,
++};
++module_i2c_driver(st1202_driver);
++
++MODULE_AUTHOR("Remote Tech LTD");
++MODULE_DESCRIPTION("STMicroelectronics LED1202 : 12-channel constant current LED driver");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/patches-6.6/950-smartrg-i2c-led-driver.patch b/target/linux/mediatek/patches-6.6/950-smartrg-i2c-led-driver.patch
index cb3b394dc6..81234f68ea 100644
--- a/target/linux/mediatek/patches-6.6/950-smartrg-i2c-led-driver.patch
+++ b/target/linux/mediatek/patches-6.6/950-smartrg-i2c-led-driver.patch
@@ -5,7 +5,7 @@
 
 --- a/drivers/leds/Kconfig
 +++ b/drivers/leds/Kconfig
-@@ -901,6 +901,16 @@ source "drivers/leds/flash/Kconfig"
+@@ -911,6 +911,16 @@ source "drivers/leds/flash/Kconfig"
  comment "RGB LED drivers"
  source "drivers/leds/rgb/Kconfig"
  
@@ -29,6 +29,6 @@
  obj-$(CONFIG_LEDS_REGULATOR)		+= leds-regulator.o
  obj-$(CONFIG_LEDS_SC27XX_BLTC)		+= leds-sc27xx-bltc.o
 +obj-$(CONFIG_LEDS_SMARTRG_LED)		+= leds-smartrg-system.o
+ obj-$(CONFIG_LEDS_ST1202)		+= leds-st1202.o
  obj-$(CONFIG_LEDS_SUNFIRE)		+= leds-sunfire.o
  obj-$(CONFIG_LEDS_SYSCON)		+= leds-syscon.o
- obj-$(CONFIG_LEDS_TCA6507)		+= leds-tca6507.o



From lede-commits at lists.infradead.org  Sun Jan  5 03:12:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 06:12:17 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq807x: mx4200v2:  fix LED controller
In-Reply-To: <173607553612.764488.8548232850815144924@git-01.infra.openwrt.org>
References: <173607553612.764488.8548232850815144924@git-01.infra.openwrt.org>
Message-ID: <mailman.31277.1736075539.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7ce4ed4829fafdd37a57681304ea91e3749bc3c8

commit 7ce4ed4829fafdd37a57681304ea91e3749bc3c8
Author: Manuel Fombuena <fombuena at outlook.com>
AuthorDate: Thu Jan 2 18:28:16 2025 +0000

    qualcommax: ipq807x: mx4200v2:  fix LED controller
    
    The Linksys MX4200v2 doesn't have the same LED controller as the MX4200v1 or MX4300.  It comes with the STMicroelectronics LED1202 while the others come with the NXP PCA9633.
    
    This LED controller has a driver under development which is currently being reviewed by the respective kernel maintainers. They are currently on v11.
    
    Apart from the changes needed on the MX4200v2, this commit also amends the configuration of other devices affected by this change as the LED controller is no common to all of them as it was originally thought.
    
    Signed-off-by: Manuel Fombuena <fombuena at outlook.com>
    Link: https://github.com/openwrt/openwrt/pull/17451
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts  | 29 ++++++++++++++++++++++
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts  | 26 +++++++++++++++++++
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts    | 29 ++++++++++++++++++++++
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi   | 26 -------------------
 target/linux/qualcommax/image/ipq807x.mk           | 12 +++++----
 5 files changed, 91 insertions(+), 31 deletions(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
index 7946e5c54d..12897419bb 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
@@ -11,6 +11,35 @@
 	compatible = "linksys,mx4200v1", "qcom,ipq8074";
 };
 
+&blsp1_i2c2 {
+
+	led-controller at 62 {
+		compatible = "nxp,pca9633";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x62>;
+		nxp,hw-blink;
+
+		led_system_red: led at 0 {
+			reg = <0>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_green: led at 1 {
+			reg = <1>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_blue: led at 2 {
+			reg = <2>;
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+		};
+	};
+};
+
 &wifi {
 	status = "okay";
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
index 44e1b72f16..c1779a2d48 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
@@ -10,6 +10,32 @@
 	compatible = "linksys,mx4200v2", "qcom,ipq8074";
 };
 
+&blsp1_i2c2 {
+
+	led-controller at 58 {
+		compatible = "st,led1202";
+		reg = <0x58>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		led_system_green: led at 0 {
+			reg = <0>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+		led_system_red: led at 1 {
+			reg = <1>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+		};
+		led_system_blue: led at 2 {
+			reg = <2>;
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+		};
+	};
+};
+
 &wifi {
 	status = "okay";
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
index 1477019ab9..d09710b9c4 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
@@ -242,6 +242,35 @@
 	};
 };
 
+&blsp1_i2c2 {
+
+	led-controller at 62 {
+		compatible = "nxp,pca9633";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x62>;
+		nxp,hw-blink;
+
+		led_system_red: led at 0 {
+			reg = <0>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_green: led at 1 {
+			reg = <1>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_blue: led at 2 {
+			reg = <2>;
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+		};
+	};
+};
+
 &dp2 {
 	status = "okay";
 	phy-handle = <&qca8075_1>;
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
index 84e68dae35..2dca7ffd3b 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
@@ -94,32 +94,6 @@
 
 &blsp1_i2c2 {
 	status = "okay";
-
-	led-controller at 62 {
-		compatible = "nxp,pca9633";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x62>;
-		nxp,hw-blink;
-
-		led_system_red: led at 0 {
-			reg = <0>;
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_green: led at 1 {
-			reg = <1>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_blue: led at 2 {
-			reg = <2>;
-			color = <LED_COLOR_ID_BLUE>;
-			function = LED_FUNCTION_STATUS;
-		};
-	};
 };
 
 &mdio {
diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk
index 260b358ce8..731c2ba0ca 100644
--- a/target/linux/qualcommax/image/ipq807x.mk
+++ b/target/linux/qualcommax/image/ipq807x.mk
@@ -167,7 +167,6 @@ define Device/linksys_mx
 	SOC := ipq8072
 	IMAGES += factory.bin
 	IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=$$$$(DEVICE_MODEL)
-	DEVICE_PACKAGES := kmod-leds-pca963x
 endef
 
 define Device/linksys_mx4x00
@@ -180,13 +179,15 @@ define Device/linksys_mx4200v1
 	$(call Device/linksys_mx4x00)
 	DEVICE_MODEL := MX4200
 	DEVICE_VARIANT := v1
-	DEVICE_PACKAGES += kmod-bluetooth
+	DEVICE_PACKAGES += kmod-bluetooth kmod-leds-pca963x
 endef
 TARGET_DEVICES += linksys_mx4200v1
 
 define Device/linksys_mx4200v2
-	$(call Device/linksys_mx4200v1)
+	$(call Device/linksys_mx4x00)
+	DEVICE_MODEL := MX4200
 	DEVICE_VARIANT := v2
+	DEVICE_PACKAGES += kmod-bluetooth kmod-leds-st1202
 endef
 TARGET_DEVICES += linksys_mx4200v2
 
@@ -198,6 +199,7 @@ define Device/linksys_mx4300
 	KERNEL_SIZE := 8192k
 	IMAGE_SIZE := 171264k
 	NAND_SIZE := 1024m
+	DEVICE_PACKAGES += kmod-leds-pca963x
 endef
 TARGET_DEVICES += linksys_mx4300
 
@@ -205,7 +207,7 @@ define Device/linksys_mx5300
 	$(call Device/linksys_mx)
 	DEVICE_MODEL := MX5300
 	DEVICE_PACKAGES += kmod-rtc-ds1307 ipq-wifi-linksys_mx5300 \
-		kmod-ath10k-ct ath10k-firmware-qca9984-ct
+		kmod-ath10k-ct ath10k-firmware-qca9984-ct kmod-leds-pca963x
 endef
 TARGET_DEVICES += linksys_mx5300
 
@@ -213,7 +215,7 @@ define Device/linksys_mx8500
 	$(call Device/linksys_mx)
 	DEVICE_MODEL := MX8500
 	DEVICE_PACKAGES += ipq-wifi-linksys_mx8500 kmod-ath11k-pci \
-		ath11k-firmware-qcn9074 kmod-bluetooth
+		ath11k-firmware-qcn9074 kmod-bluetooth kmod-leds-pca963x
 endef
 TARGET_DEVICES += linksys_mx8500
 



From lede-commits at lists.infradead.org  Sun Jan  5 03:33:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 06:33:11 -0500
Subject: [openwrt/openwrt]  Revert "qualcommax: ipq807x: mx4200v2:  fix LED
 controller"
In-Reply-To: <173607679107.803625.3420366433397481935@git-01.infra.openwrt.org>
References: <173607679107.803625.3420366433397481935@git-01.infra.openwrt.org>
Message-ID: <mailman.31288.1736076794.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/39b61ee36fa8e5802e008ee01c428b97cba83e46

commit 39b61ee36fa8e5802e008ee01c428b97cba83e46
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Sun Jan 5 12:32:32 2025 +0100

    Revert "qualcommax: ipq807x: mx4200v2:  fix LED controller"
    
    This reverts commit 7ce4ed4829fafdd37a57681304ea91e3749bc3c8.
    
    Turns out that this requires more work, so revert to prevent making the
    LED uncontrollable.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts  | 29 ----------------------
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts  | 26 -------------------
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts    | 29 ----------------------
 .../arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi   | 26 +++++++++++++++++++
 target/linux/qualcommax/image/ipq807x.mk           | 12 ++++-----
 5 files changed, 31 insertions(+), 91 deletions(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
index 12897419bb..7946e5c54d 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v1.dts
@@ -11,35 +11,6 @@
 	compatible = "linksys,mx4200v1", "qcom,ipq8074";
 };
 
-&blsp1_i2c2 {
-
-	led-controller at 62 {
-		compatible = "nxp,pca9633";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x62>;
-		nxp,hw-blink;
-
-		led_system_red: led at 0 {
-			reg = <0>;
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_green: led at 1 {
-			reg = <1>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_blue: led at 2 {
-			reg = <2>;
-			color = <LED_COLOR_ID_BLUE>;
-			function = LED_FUNCTION_STATUS;
-		};
-	};
-};
-
 &wifi {
 	status = "okay";
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
index c1779a2d48..44e1b72f16 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4200v2.dts
@@ -10,32 +10,6 @@
 	compatible = "linksys,mx4200v2", "qcom,ipq8074";
 };
 
-&blsp1_i2c2 {
-
-	led-controller at 58 {
-		compatible = "st,led1202";
-		reg = <0x58>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		led_system_green: led at 0 {
-			reg = <0>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_STATUS;
-		};
-		led_system_red: led at 1 {
-			reg = <1>;
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_STATUS;
-		};
-		led_system_blue: led at 2 {
-			reg = <2>;
-			color = <LED_COLOR_ID_BLUE>;
-			function = LED_FUNCTION_STATUS;
-		};
-	};
-};
-
 &wifi {
 	status = "okay";
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
index d09710b9c4..1477019ab9 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4300.dts
@@ -242,35 +242,6 @@
 	};
 };
 
-&blsp1_i2c2 {
-
-	led-controller at 62 {
-		compatible = "nxp,pca9633";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x62>;
-		nxp,hw-blink;
-
-		led_system_red: led at 0 {
-			reg = <0>;
-			color = <LED_COLOR_ID_RED>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_green: led at 1 {
-			reg = <1>;
-			color = <LED_COLOR_ID_GREEN>;
-			function = LED_FUNCTION_STATUS;
-		};
-
-		led_system_blue: led at 2 {
-			reg = <2>;
-			color = <LED_COLOR_ID_BLUE>;
-			function = LED_FUNCTION_STATUS;
-		};
-	};
-};
-
 &dp2 {
 	status = "okay";
 	phy-handle = <&qca8075_1>;
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
index 2dca7ffd3b..84e68dae35 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-mx4x00.dtsi
@@ -94,6 +94,32 @@
 
 &blsp1_i2c2 {
 	status = "okay";
+
+	led-controller at 62 {
+		compatible = "nxp,pca9633";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x62>;
+		nxp,hw-blink;
+
+		led_system_red: led at 0 {
+			reg = <0>;
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_green: led at 1 {
+			reg = <1>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+
+		led_system_blue: led at 2 {
+			reg = <2>;
+			color = <LED_COLOR_ID_BLUE>;
+			function = LED_FUNCTION_STATUS;
+		};
+	};
 };
 
 &mdio {
diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk
index 731c2ba0ca..260b358ce8 100644
--- a/target/linux/qualcommax/image/ipq807x.mk
+++ b/target/linux/qualcommax/image/ipq807x.mk
@@ -167,6 +167,7 @@ define Device/linksys_mx
 	SOC := ipq8072
 	IMAGES += factory.bin
 	IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | linksys-image type=$$$$(DEVICE_MODEL)
+	DEVICE_PACKAGES := kmod-leds-pca963x
 endef
 
 define Device/linksys_mx4x00
@@ -179,15 +180,13 @@ define Device/linksys_mx4200v1
 	$(call Device/linksys_mx4x00)
 	DEVICE_MODEL := MX4200
 	DEVICE_VARIANT := v1
-	DEVICE_PACKAGES += kmod-bluetooth kmod-leds-pca963x
+	DEVICE_PACKAGES += kmod-bluetooth
 endef
 TARGET_DEVICES += linksys_mx4200v1
 
 define Device/linksys_mx4200v2
-	$(call Device/linksys_mx4x00)
-	DEVICE_MODEL := MX4200
+	$(call Device/linksys_mx4200v1)
 	DEVICE_VARIANT := v2
-	DEVICE_PACKAGES += kmod-bluetooth kmod-leds-st1202
 endef
 TARGET_DEVICES += linksys_mx4200v2
 
@@ -199,7 +198,6 @@ define Device/linksys_mx4300
 	KERNEL_SIZE := 8192k
 	IMAGE_SIZE := 171264k
 	NAND_SIZE := 1024m
-	DEVICE_PACKAGES += kmod-leds-pca963x
 endef
 TARGET_DEVICES += linksys_mx4300
 
@@ -207,7 +205,7 @@ define Device/linksys_mx5300
 	$(call Device/linksys_mx)
 	DEVICE_MODEL := MX5300
 	DEVICE_PACKAGES += kmod-rtc-ds1307 ipq-wifi-linksys_mx5300 \
-		kmod-ath10k-ct ath10k-firmware-qca9984-ct kmod-leds-pca963x
+		kmod-ath10k-ct ath10k-firmware-qca9984-ct
 endef
 TARGET_DEVICES += linksys_mx5300
 
@@ -215,7 +213,7 @@ define Device/linksys_mx8500
 	$(call Device/linksys_mx)
 	DEVICE_MODEL := MX8500
 	DEVICE_PACKAGES += ipq-wifi-linksys_mx8500 kmod-ath11k-pci \
-		ath11k-firmware-qcn9074 kmod-bluetooth kmod-leds-pca963x
+		ath11k-firmware-qcn9074 kmod-bluetooth
 endef
 TARGET_DEVICES += linksys_mx8500
 



From lede-commits at lists.infradead.org  Sun Jan  5 10:07:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 13:07:41 -0500
Subject: [openwrt/openwrt]  ath79: reset ETH switch for AR9344
In-Reply-To: <173610046173.1378390.16584712106158670480@git-01.infra.openwrt.org>
References: <173610046173.1378390.16584712106158670480@git-01.infra.openwrt.org>
Message-ID: <mailman.31363.1736100470.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/916af73fc388d638b1a717a2411792e0680dd8e6

commit 916af73fc388d638b1a717a2411792e0680dd8e6
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 3 21:46:13 2025 +0100

    ath79: reset ETH switch for AR9344
    
    According to datasheet, on AR9344 the switch and switch analog need to
    be reset first before initiating a full reset.
    
    Resetting these systems fixes spurious reset hangs on Atheros AR9344
    SoCs.
    
    Link: https://github.com/freifunk-gluon/gluon/issues/2904
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 104 +++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
new file mode 100644
index 0000000000..dcac5be58b
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
@@ -0,0 +1,104 @@
+From: David Bauer <mail at david-bauer.net>
+Date: Tue, 2 Jan 2025 19:22:40 +0100
+Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
+
+According to datasheet, on AR9344 the switch and switch analog need to
+be reset first before initiating a full reset.
+
+Resetting these systems fixes spurious reset hangs on Atheros AR9344
+SoCs.
+
+Link: https://github.com/freifunk-gluon/gluon/issues/2904
+
+Signed-off-by: David Bauer <mail at david-bauer.net>
+
+--- a/drivers/reset/reset-ath79.c
++++ b/drivers/reset/reset-ath79.c
+@@ -12,8 +12,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/reset-controller.h>
+ #include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/of.h>
+ 
+ struct ath79_reset {
++	struct platform_device *pdev;
+ 	struct reset_controller_dev rcdev;
+ 	struct notifier_block restart_nb;
+ 	void __iomem *base;
+@@ -21,16 +24,13 @@ struct ath79_reset {
+ };
+ 
+ #define FULL_CHIP_RESET 24
++#define ETH_SWITCH_RESET 8
++#define ETH_SWITCH_ARESET 12
+ 
+-static int ath79_reset_update(struct reset_controller_dev *rcdev,
++static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
+ 			unsigned long id, bool assert)
+ {
+-	struct ath79_reset *ath79_reset =
+-		container_of(rcdev, struct ath79_reset, rcdev);
+-	unsigned long flags;
+ 	u32 val;
+-
+-	spin_lock_irqsave(&ath79_reset->lock, flags);
+ 	val = readl(ath79_reset->base);
+ 	if (assert)
+ 		val |= BIT(id);
+@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
+ 	writel(val, ath79_reset->base);
+ 	/* Flush cache */
+ 	readl(ath79_reset->base);
++}
++
++static int ath79_reset_update(struct reset_controller_dev *rcdev,
++			unsigned long id, bool assert)
++{
++	struct ath79_reset *ath79_reset =
++		container_of(rcdev, struct ath79_reset, rcdev);
++	unsigned long flags;
++
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++	__ath79_reset_update_unlocked(ath79_reset, id, assert);
+ 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return 0;
+@@ -79,8 +90,27 @@ static int ath79_reset_restart_handler(s
+ {
+ 	struct ath79_reset *ath79_reset =
+ 		container_of(nb, struct ath79_reset, restart_nb);
++	unsigned long flags;
+ 
+-	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++
++	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
++		/**
++		 * AR9344 has been observed to hang on reboot in rare cases.
++		 *
++		 * Datasheet states to reset the ETH switch systems before asserting
++		 * full chip reset. See page 111 of the AR9344 datasheet.
++		 */
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
++		mdelay(10);
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
++		mdelay(10);
++	}
++
++	__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++	mdelay(10);
++
++	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return NOTIFY_DONE;
+ }
+@@ -95,6 +125,8 @@ static int ath79_reset_probe(struct plat
+ 	if (!ath79_reset)
+ 		return -ENOMEM;
+ 
++	ath79_reset->pdev = pdev;
++
+ 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ 	if (IS_ERR(ath79_reset->base))
+ 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sun Jan  5 13:50:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 16:50:42 -0500
Subject: [openwrt/openwrt]  ppp: update to 2.5.2
In-Reply-To: <173611384268.1681949.6905945215971652954@git-01.infra.openwrt.org>
References: <173611384268.1681949.6905945215971652954@git-01.infra.openwrt.org>
Message-ID: <mailman.31396.1736113916.1089.lede-commits@lists.infradead.org>

nick pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/381f6624cfb5a1beb763cb09967cb931bcd98427

commit 381f6624cfb5a1beb763cb09967cb931bcd98427
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Sat Jan 4 15:59:57 2025 +0800

    ppp: update to 2.5.2
    
    This is a minor upgrade that mainly fixes some compilation errors
    and remove old unused code.
    
    The Makefile has been reorganized. Now all package make parameters
    are passed as configure arguments instead of environment variables.
    The compilation dependencies remain the same as ppp v2.5.1 and the
    package size changes are negligible.
    
    Change log:
    https://github.com/ppp-project/ppp/blob/v2.5.2/README#L70
    
    Upstreamed patches:
    101-pppd-crypto-fix-build-without-openssl.patch [1]
    102-pppd-make-pid-directory-before-create-the-pid-file.patch [2]
    103-pppd-crypto-fix-gcc-14-build.patch [3]
    
    [1] https://github.com/ppp-project/ppp/commit/5f6eabdb6666d914e0f8feb3facfa591dee75a1f
    [2] https://github.com/ppp-project/ppp/commit/734bc0438e78b7c7cd34acfce3a4ec119d9a50b6
    [3] https://github.com/ppp-project/ppp/commit/ac269dbf7c142371cd975c775c6171707ac4dde8
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17477
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 package/network/services/ppp/Makefile              | 37 ++++++++++--------
 ...101-pppd-crypto-fix-build-without-openssl.patch | 45 ----------------------
 ...-pid-directory-before-create-the-pid-file.patch | 27 -------------
 .../patches/103-pppd-crypto-fix-gcc-14-build.patch | 42 --------------------
 .../services/ppp/patches/105-debian_demand.patch   | 10 ++---
 .../services/ppp/patches/204-radius_config.patch   |  4 +-
 .../services/ppp/patches/208-fix_status_code.patch |  4 +-
 .../ppp/patches/310-precompile_filter.patch        |  4 +-
 .../321-multilink_support_custom_iface_names.patch | 12 +++---
 .../ppp/patches/340-populate_default_gateway.patch |  4 +-
 .../ppp/patches/400-simplify_kernel_checks.patch   | 24 ++++++------
 .../services/ppp/patches/401-no_record_file.patch  |  6 +--
 .../404-remove_obsolete_protocol_names.patch       | 16 ++++----
 .../services/ppp/patches/500-add-pptp-plugin.patch |  4 +-
 14 files changed, 65 insertions(+), 174 deletions(-)

diff --git a/package/network/services/ppp/Makefile b/package/network/services/ppp/Makefile
index 760a31dc0d..ceb32c3978 100644
--- a/package/network/services/ppp/Makefile
+++ b/package/network/services/ppp/Makefile
@@ -9,14 +9,14 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=ppp
-PKG_VERSION:=2.5.1
+PKG_VERSION:=2.5.2
 PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://github.com/ppp-project/ppp
-PKG_SOURCE_DATE:=2024-09-18
-PKG_SOURCE_VERSION:=d5aeec65752d4a9b3bb46771d0b221c4a4a6539e
-PKG_MIRROR_HASH:=b98125933d8160ff3476b053414e787e65a94948c0ecee53f6261cd403ff4b03
+PKG_SOURCE_DATE:=2024-12-31
+PKG_SOURCE_VERSION:=9f612dc02c34509f062ed63b60bcc7e937e25178
+PKG_MIRROR_HASH:=677b71d23b668db986146e13b0c651f2ac506eb4fb244ffba1ff406cbae3511b
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_LICENSE:=BSD-4-Clause
@@ -30,17 +30,22 @@ PKG_FIXUP:=autoreconf
 PKG_INSTALL:=1
 
 include $(INCLUDE_DIR)/package.mk
-CONFIGURE_VARS += \
-	enable_eaptls=no \
-	enable_microsoft_extensions=yes \
-	enable_peap=no
-
 CONFIGURE_ARGS += \
-	with_openssl=no \
-	with_pam=no \
-	with_pcap=no \
-	with_srp=no \
-	with_static_pcap=yes
+	--disable-cbcp \
+	--disable-eaptls \
+	--disable-mslanman \
+	--disable-openssl-engine \
+	--disable-peap \
+	--disable-systemd \
+	--enable-ipv6cp \
+	--enable-microsoft-extensions \
+	--enable-plugins \
+	--with-atm \
+	--with-static-pcap \
+	--without-openssl \
+	--without-pam \
+	--without-pcap \
+	--without-srp
 
 define Package/ppp/Default
   SECTION:=net
@@ -185,8 +190,8 @@ not initiate a session. Can be useful to debug pppoe.
 endef
 
 ifeq ($(BUILD_VARIANT),multilink)
-  CONFIGURE_VARS += \
-	enable_multilink=yes
+  CONFIGURE_ARGS += \
+	--enable-multilink
 endif
 
 define Build/InstallDev
diff --git a/package/network/services/ppp/patches/101-pppd-crypto-fix-build-without-openssl.patch b/package/network/services/ppp/patches/101-pppd-crypto-fix-build-without-openssl.patch
deleted file mode 100644
index eb243694ec..0000000000
--- a/package/network/services/ppp/patches/101-pppd-crypto-fix-build-without-openssl.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From: Shiji Yang <yangshiji66 at outlook.com>
-Date: Fri, 4 Oct 2024 12:19:42 +0000
-Subject: [PATCH] pppd/crypto: fix build without openssl
-
-Compile openssl relevant code only when PPP_WITH_OPENSSL is defined.
-
-Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
----
- pppd/crypto.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/pppd/crypto.c
-+++ b/pppd/crypto.c
-@@ -199,6 +199,7 @@ int PPP_crypto_init()
- {
-     int retval = 0;
- 
-+#ifdef PPP_WITH_OPENSSL
- #if OPENSSL_VERSION_NUMBER >= 0x30000000L
-     g_crypto_ctx.legacy = OSSL_PROVIDER_load(NULL, "legacy");
-     if (g_crypto_ctx.legacy == NULL)
-@@ -214,6 +215,7 @@ int PPP_crypto_init()
-         goto done;
-     }
- #endif
-+#endif
- 
-     retval = 1;
- 
-@@ -224,6 +226,7 @@ done:
- 
- int PPP_crypto_deinit()
- {
-+#ifdef PPP_WITH_OPENSSL
- #if OPENSSL_VERSION_NUMBER >= 0x30000000L
-     if (g_crypto_ctx.legacy) {
-         OSSL_PROVIDER_unload(g_crypto_ctx.legacy);
-@@ -239,6 +242,7 @@ int PPP_crypto_deinit()
- #if OPENSSL_VERSION_NUMBER < 0x10100000L
-     ERR_free_strings();
- #endif
-+#endif
-     return 1;
- }
- 
diff --git a/package/network/services/ppp/patches/102-pppd-make-pid-directory-before-create-the-pid-file.patch b/package/network/services/ppp/patches/102-pppd-make-pid-directory-before-create-the-pid-file.patch
deleted file mode 100644
index 69e68cdff4..0000000000
--- a/package/network/services/ppp/patches/102-pppd-make-pid-directory-before-create-the-pid-file.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From: Shiji Yang <yangshiji66 at outlook.com>
-Date: Fri, 4 Oct 2024 14:02:14 +0000
-Subject: [PATCH] pppd: make pid directory before create the pid file
-
-If multilink feature is not enabled, the '/var/run/pppd' directory
-won't be created before adding pid file.
-
-Fixes error message:
-'Failed to create pid file /var/run/pppd/pppoe-wan.pid: No such file or directory'
-
-Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
----
- pppd/main.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/pppd/main.c
-+++ b/pppd/main.c
-@@ -921,6 +921,9 @@ create_pidfile(int pid)
- {
-     FILE *pidfile;
- 
-+#ifndef PPP_WITH_TDB
-+    mkdir_recursive(PPP_PATH_VARRUN);
-+#endif
-     slprintf(pidfilename, sizeof(pidfilename), "%s/%s.pid",
- 	     PPP_PATH_VARRUN, ifname);
-     if ((pidfile = fopen(pidfilename, "w")) != NULL) {
diff --git a/package/network/services/ppp/patches/103-pppd-crypto-fix-gcc-14-build.patch b/package/network/services/ppp/patches/103-pppd-crypto-fix-gcc-14-build.patch
deleted file mode 100644
index 3a76deb042..0000000000
--- a/package/network/services/ppp/patches/103-pppd-crypto-fix-gcc-14-build.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From: Tan Zien <nabsdh9 at gmail.com>
-Date: Tue, 1 Oct 2024 10:38:45 +0800
-Subject: [PATCH] pppd/crypto: fix gcc 14 build
-
-fix this:
-
-crypto.c: In function 'PPP_crypto_error':
-crypto.c:178:11: error: implicit declaration of function 'vsnprintf' [-Wimplicit-function-declaration]
-  178 |     off = vsnprintf(buf, len, fmt, args);
-      |           ^~~~~~~~~
-crypto.c:41:1: note: include '<stdio.h>' or provide a declaration of 'vsnprintf'
-   40 | #include "crypto-priv.h"
-  +++ |+#include <stdio.h>
-   41 |
-crypto.c:178:26: warning: 'vsnprintf' argument 2 type is 'int' where 'long unsigned int' is expected in a call to built-in function declared without prototype [-Wbuiltin-declaration-mismatch]
-  178 |     off = vsnprintf(buf, len, fmt, args);
-      |                          ^~~
-<built-in>: note: built-in 'vsnprintf' declared here
-
-Signed-off-by: Tan Zien <nabsdh9 at gmail.com>
----
- pppd/crypto.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/pppd/crypto.c
-+++ b/pppd/crypto.c
-@@ -34,6 +34,7 @@
- 
- #include <stdlib.h>
- #include <string.h>
-+#include <stdio.h>
- 
- #include "pppd.h"
- #include "crypto.h"
-@@ -247,7 +248,6 @@ int PPP_crypto_deinit()
- }
- 
- #ifdef UNIT_TEST
--#include <stdio.h>
- 
- int debug;
- int error_count;
diff --git a/package/network/services/ppp/patches/105-debian_demand.patch b/package/network/services/ppp/patches/105-debian_demand.patch
index 10ce13b253..25f1644aa4 100644
--- a/package/network/services/ppp/patches/105-debian_demand.patch
+++ b/package/network/services/ppp/patches/105-debian_demand.patch
@@ -1,6 +1,6 @@
 --- a/pppd/demand.c
 +++ b/pppd/demand.c
-@@ -40,6 +40,8 @@
+@@ -34,6 +34,8 @@
  #include <errno.h>
  #include <fcntl.h>
  #include <netdb.h>
@@ -9,7 +9,7 @@
  #include <sys/param.h>
  #include <sys/types.h>
  #include <sys/wait.h>
-@@ -47,6 +49,8 @@
+@@ -41,6 +43,8 @@
  #include <sys/resource.h>
  #include <sys/stat.h>
  #include <sys/socket.h>
@@ -18,7 +18,7 @@
  #ifdef PPP_WITH_FILTER
  #include <pcap-bpf.h>
  #endif
-@@ -223,6 +227,14 @@ loop_chars(unsigned char *p, int n)
+@@ -217,6 +221,14 @@ loop_chars(unsigned char *p, int n)
      int c, rv;
  
      rv = 0;
@@ -33,7 +33,7 @@
      for (; n > 0; --n) {
  	c = *p++;
  	if (c == PPP_FLAG) {
-@@ -299,16 +311,100 @@ loop_frame(unsigned char *frame, int len
+@@ -293,16 +305,100 @@ loop_frame(unsigned char *frame, int len
   * loopback, now that the real serial link is up.
   */
  void
@@ -159,7 +159,7 @@
      } else {
 --- a/pppd/pppd-private.h
 +++ b/pppd/pppd-private.h
-@@ -368,7 +368,7 @@ void demand_conf(void);	/* config interf
+@@ -370,7 +370,7 @@ void demand_conf(void);	/* config interf
  void demand_block(void);	/* set all NPs to queue up packets */
  void demand_unblock(void); /* set all NPs to pass packets */
  void demand_discard(void); /* set all NPs to discard packets */
diff --git a/package/network/services/ppp/patches/204-radius_config.patch b/package/network/services/ppp/patches/204-radius_config.patch
index 3f6db59b71..1f5fdffa95 100644
--- a/package/network/services/ppp/patches/204-radius_config.patch
+++ b/package/network/services/ppp/patches/204-radius_config.patch
@@ -1,6 +1,6 @@
 --- a/pppd/plugins/radius/config.c
 +++ b/pppd/plugins/radius/config.c
-@@ -381,31 +381,37 @@ static int test_config(char *filename)
+@@ -379,31 +379,37 @@ static int test_config(char *filename)
  	}
  #endif
  
@@ -40,7 +40,7 @@
  }
 --- a/pppd/plugins/radius/options.h
 +++ b/pppd/plugins/radius/options.h
-@@ -31,24 +31,21 @@ typedef struct _option {
+@@ -29,24 +29,21 @@ typedef struct _option {
  static SERVER acctserver = {0};
  static SERVER authserver = {0};
  
diff --git a/package/network/services/ppp/patches/208-fix_status_code.patch b/package/network/services/ppp/patches/208-fix_status_code.patch
index 10cd945374..2d1e02742e 100644
--- a/package/network/services/ppp/patches/208-fix_status_code.patch
+++ b/package/network/services/ppp/patches/208-fix_status_code.patch
@@ -12,13 +12,13 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
 
 --- a/pppd/main.c
 +++ b/pppd/main.c
-@@ -1152,7 +1152,8 @@ get_input(void)
+@@ -1150,7 +1150,8 @@ get_input(void)
  	}
  	notice("Modem hangup");
  	hungup = 1;
 -	code = EXIT_HANGUP;
 +	if (code == EXIT_OK)
 +		code = EXIT_HANGUP;
+ 	need_holdoff = 0;
  	lcp_lowerdown(0);	/* serial link is no longer available */
  	link_terminated(0);
- 	return;
diff --git a/package/network/services/ppp/patches/310-precompile_filter.patch b/package/network/services/ppp/patches/310-precompile_filter.patch
index ad0dd03de8..6a6d276979 100644
--- a/package/network/services/ppp/patches/310-precompile_filter.patch
+++ b/package/network/services/ppp/patches/310-precompile_filter.patch
@@ -23,7 +23,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  #
  # SunOS provides a version of libpcap that would work, but SunOS has no support for activity filter
  AM_CONDITIONAL([PPP_WITH_FILTER], [ test "x${with_pcap}" = "xyes" && test "x${build_sunos}" != "xyes" ])
-@@ -359,6 +362,7 @@ $PACKAGE_NAME version $PACKAGE_VERSION
+@@ -348,6 +351,7 @@ $PACKAGE_NAME version $PACKAGE_VERSION
      With libatm..........: ${with_atm:-no}
      With libpam..........: ${with_pam:-no}
      With libpcap.........: ${with_pcap:-no}
@@ -33,7 +33,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      Linker...............: $LD $LDFLAGS $LIBS
 --- a/pppd/Makefile.am
 +++ b/pppd/Makefile.am
-@@ -138,6 +138,12 @@ pppd_LDFLAGS += $(PCAP_LDFLAGS)
+@@ -137,6 +137,12 @@ pppd_LDFLAGS += $(PCAP_LDFLAGS)
  pppd_LIBS += $(PCAP_LIBS)
  endif
  
diff --git a/package/network/services/ppp/patches/321-multilink_support_custom_iface_names.patch b/package/network/services/ppp/patches/321-multilink_support_custom_iface_names.patch
index a761ca650d..2070ab7d09 100644
--- a/package/network/services/ppp/patches/321-multilink_support_custom_iface_names.patch
+++ b/package/network/services/ppp/patches/321-multilink_support_custom_iface_names.patch
@@ -8,7 +8,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  2 files changed, 53 insertions(+), 14 deletions(-)
 --- a/pppd/multilink.c
 +++ b/pppd/multilink.c
-@@ -40,6 +40,7 @@
+@@ -36,6 +36,7 @@
  #include <signal.h>
  #include <netinet/in.h>
  #include <unistd.h>
@@ -16,7 +16,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  
  #include "pppd-private.h"
  #include "fsm.h"
-@@ -62,7 +63,8 @@ static void iterate_bundle_links(void (*
+@@ -58,7 +59,8 @@ static void iterate_bundle_links(void (*
  
  static int get_default_epdisc(struct epdisc *);
  static int parse_num(char *str, const char *key, int *valp);
@@ -26,7 +26,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  
  #define set_ip_epdisc(ep, addr) do {	\
  	ep->length = 4;			\
-@@ -215,35 +217,38 @@ mp_join_bundle(void)
+@@ -211,35 +213,38 @@ mp_join_bundle(void)
  	key.dptr = bundle_id;
  	key.dsize = p - bundle_id;
  	pid = tdb_fetch(pppdb, key);
@@ -73,7 +73,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  	}
  
  	/* we have to make a new bundle */
-@@ -423,20 +428,39 @@ parse_num(char *str, const char *key, in
+@@ -419,20 +424,39 @@ parse_num(char *str, const char *key, in
  	return 0;
  }
  
@@ -119,7 +119,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  			&& memcmp(vd.dptr, key.dptr, vd.dsize) == 0;
 --- a/pppd/sys-linux.c
 +++ b/pppd/sys-linux.c
-@@ -984,6 +984,16 @@ void cfg_bundle(int mrru, int mtru, int
+@@ -980,6 +980,16 @@ void cfg_bundle(int mrru, int mtru, int
  	add_fd(ppp_dev_fd);
  }
  
@@ -136,7 +136,7 @@ Signed-off-by: George Kashperko <george at znau.edu.ua>
  /*
   * make_new_bundle - create a new PPP unit (i.e. a bundle)
   * and connect our channel to it.  This should only get called
-@@ -1002,6 +1012,8 @@ void make_new_bundle(int mrru, int mtru,
+@@ -998,6 +1008,8 @@ void make_new_bundle(int mrru, int mtru,
  
  	/* set the mrru and flags */
  	cfg_bundle(mrru, mtru, rssn, tssn);
diff --git a/package/network/services/ppp/patches/340-populate_default_gateway.patch b/package/network/services/ppp/patches/340-populate_default_gateway.patch
index f327971346..7d20f0449d 100644
--- a/package/network/services/ppp/patches/340-populate_default_gateway.patch
+++ b/package/network/services/ppp/patches/340-populate_default_gateway.patch
@@ -13,7 +13,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
 
 --- a/pppd/sys-linux.c
 +++ b/pppd/sys-linux.c
-@@ -2251,6 +2251,9 @@ int sifdefaultroute (int unit, u_int32_t
+@@ -2247,6 +2247,9 @@ int sifdefaultroute (int unit, u_int32_t
      memset (&rt, 0, sizeof (rt));
      SET_SA_FAMILY (rt.rt_dst, AF_INET);
  
@@ -23,7 +23,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      rt.rt_dev = ifname;
      rt.rt_metric = dfl_route_metric + 1; /* +1 for binary compatibility */
  
-@@ -2259,7 +2262,7 @@ int sifdefaultroute (int unit, u_int32_t
+@@ -2255,7 +2258,7 @@ int sifdefaultroute (int unit, u_int32_t
  	SIN_ADDR(rt.rt_genmask) = 0L;
      }
  
diff --git a/package/network/services/ppp/patches/400-simplify_kernel_checks.patch b/package/network/services/ppp/patches/400-simplify_kernel_checks.patch
index 311bb8752f..014831a3a4 100644
--- a/package/network/services/ppp/patches/400-simplify_kernel_checks.patch
+++ b/package/network/services/ppp/patches/400-simplify_kernel_checks.patch
@@ -10,7 +10,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
 
 --- a/pppd/sys-linux.c
 +++ b/pppd/sys-linux.c
-@@ -224,14 +224,10 @@ static fd_set in_fds;		/* set of fds tha
+@@ -220,14 +220,10 @@ static fd_set in_fds;		/* set of fds tha
  static int max_in_fd;		/* highest fd set in in_fds */
  
  static int has_proxy_arp       = 0;
@@ -26,7 +26,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  
  static char loop_name[20];
  static unsigned char inbuf[512]; /* buffer for chars read from loopback */
-@@ -249,9 +245,8 @@ static int	dynaddr_set;		/* 1 if ip_dyna
+@@ -245,9 +241,8 @@ static int	dynaddr_set;		/* 1 if ip_dyna
  static int	looped;			/* 1 if using loop */
  static int	link_mtu;		/* mtu for the link (not bundle) */
  
@@ -37,7 +37,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  
  #define MAX_IFS		100
  
-@@ -1970,11 +1965,12 @@ int ccp_fatal_error (int unit)
+@@ -1966,11 +1961,12 @@ int ccp_fatal_error (int unit)
   *
   * path_to_procfs - find the path to the proc file system mount point
   */
@@ -52,7 +52,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      struct mntent *mntent;
      FILE *fp;
  
-@@ -1996,6 +1992,7 @@ static char *path_to_procfs(const char *
+@@ -1992,6 +1988,7 @@ static char *path_to_procfs(const char *
  	    fclose (fp);
  	}
      }
@@ -60,7 +60,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  
      strlcpy(proc_path + proc_path_len, tail,
  	    sizeof(proc_path) - proc_path_len);
-@@ -2889,6 +2886,8 @@ ppp_registered(void)
+@@ -2883,6 +2880,8 @@ ppp_registered(void)
  
  int ppp_check_kernel_support(void)
  {
@@ -69,7 +69,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      int s, ok, fd;
      struct ifreq ifr;
      int    size;
-@@ -3016,6 +3015,7 @@ int ppp_check_kernel_support(void)
+@@ -3010,6 +3009,7 @@ int ppp_check_kernel_support(void)
      }
      close(s);
      return ok;
@@ -77,7 +77,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  }
  
  #ifndef HAVE_LOGWTMP
-@@ -3577,6 +3577,7 @@ get_pty(int *master_fdp, int *slave_fdp,
+@@ -3571,6 +3571,7 @@ get_pty(int *master_fdp, int *slave_fdp,
      }
  #endif /* TIOCGPTN */
  
@@ -85,7 +85,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      if (sfd < 0) {
  	/* the old way - scan through the pty name space */
  	for (i = 0; i < 64; ++i) {
-@@ -3601,6 +3602,7 @@ get_pty(int *master_fdp, int *slave_fdp,
+@@ -3595,6 +3596,7 @@ get_pty(int *master_fdp, int *slave_fdp,
  	    }
  	}
      }
@@ -93,7 +93,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  
      if (sfd < 0)
  	return 0;
-@@ -3716,6 +3718,7 @@ get_host_seed(void)
+@@ -3710,6 +3712,7 @@ get_host_seed(void)
  int
  sys_check_options(void)
  {
@@ -101,7 +101,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      if (demand && driver_is_old) {
  	ppp_option_error("demand dialling is not supported by kernel driver "
  		     "version %d.%d.%d", driver_version, driver_modification,
-@@ -3726,6 +3729,7 @@ sys_check_options(void)
+@@ -3720,6 +3723,7 @@ sys_check_options(void)
  	warn("Warning: multilink is not supported by the kernel driver");
  	multilink = 0;
      }
@@ -124,7 +124,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  #endif
 --- a/pppd/plugins/pppoe/plugin.c
 +++ b/pppd/plugins/pppoe/plugin.c
-@@ -57,9 +57,6 @@ static char const RCSID[] =
+@@ -54,9 +54,6 @@
  
  char pppd_version[] = PPPD_VERSION;
  
@@ -134,7 +134,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  char *pppd_pppoe_service = NULL;
  static char *acName = NULL;
  static char *existingSession = NULL;
-@@ -421,10 +418,6 @@ PPPoEDevnameHook(char *cmd, char **argv,
+@@ -418,10 +415,6 @@ PPPoEDevnameHook(char *cmd, char **argv,
  void
  plugin_init(void)
  {
diff --git a/package/network/services/ppp/patches/401-no_record_file.patch b/package/network/services/ppp/patches/401-no_record_file.patch
index 5ef1a178d7..436bfb5f5e 100644
--- a/package/network/services/ppp/patches/401-no_record_file.patch
+++ b/package/network/services/ppp/patches/401-no_record_file.patch
@@ -7,7 +7,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
 
 --- a/pppd/pppd-private.h
 +++ b/pppd/pppd-private.h
-@@ -187,7 +187,6 @@ extern int	holdoff;	/* Dead time before
+@@ -189,7 +189,6 @@ extern int	holdoff;	/* Dead time before
  extern bool	holdoff_specified; /* true if user gave a holdoff value */
  extern bool	notty;		/* Stdin/out is not a tty */
  extern char	*pty_socket;	/* Socket to connect to pty */
@@ -17,7 +17,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  extern bool	tune_kernel;	/* May alter kernel settings as necessary */
 --- a/pppd/tty.c
 +++ b/pppd/tty.c
-@@ -150,7 +150,7 @@ char	*disconnect_script = NULL; /* Scrip
+@@ -146,7 +146,7 @@ char	*disconnect_script = NULL; /* Scrip
  char	*welcomer = NULL;	/* Script to run after phys link estab. */
  char	*ptycommand = NULL;	/* Command to run on other side of pty */
  bool	notty = 0;		/* Stdin/out is not a tty */
@@ -26,7 +26,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
  int	max_data_rate;		/* max bytes/sec through charshunt */
  bool	sync_serial = 0;	/* Device is synchronous serial device */
  char	*pty_socket = NULL;	/* Socket to connect to pty */
-@@ -206,8 +206,10 @@ static struct option tty_options[] = {
+@@ -202,8 +202,10 @@ static struct option tty_options[] = {
        "Send and receive over socket, arg is host:port",
        OPT_PRIO | OPT_DEVNAM },
  
diff --git a/package/network/services/ppp/patches/404-remove_obsolete_protocol_names.patch b/package/network/services/ppp/patches/404-remove_obsolete_protocol_names.patch
index 6b2d15ed25..5738118c5f 100644
--- a/package/network/services/ppp/patches/404-remove_obsolete_protocol_names.patch
+++ b/package/network/services/ppp/patches/404-remove_obsolete_protocol_names.patch
@@ -7,7 +7,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
 
 --- a/pppd/main.c
 +++ b/pppd/main.c
-@@ -984,14 +984,17 @@ struct protocol_list {
+@@ -982,14 +982,17 @@ struct protocol_list {
      const char	*name;
  } protocol_list[] = {
      { 0x21,	"IP" },
@@ -25,7 +25,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x33,	"Stream Protocol ST-II" },
      { 0x35,	"Banyan Vines" },
      { 0x39,	"AppleTalk EDDP" },
-@@ -1005,8 +1008,11 @@ struct protocol_list {
+@@ -1003,8 +1006,11 @@ struct protocol_list {
      { 0x49,	"Serial Data Transport Protocol (PPP-SDTP)" },
      { 0x4b,	"SNA over 802.2" },
      { 0x4d,	"SNA" },
@@ -37,7 +37,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x53,	"Encryption" },
      { 0x55,	"Individual Link Encryption" },
      { 0x57,	"IPv6" },
-@@ -1017,12 +1023,15 @@ struct protocol_list {
+@@ -1015,12 +1021,15 @@ struct protocol_list {
      { 0x65,	"RTP IPHC Compressed non-TCP" },
      { 0x67,	"RTP IPHC Compressed UDP 8" },
      { 0x69,	"RTP IPHC Compressed RTP 8" },
@@ -53,7 +53,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x0203,	"IBM Source Routing BPDU" },
      { 0x0205,	"DEC LANBridge100 Spanning Tree" },
      { 0x0207,	"Cisco Discovery Protocol" },
-@@ -1034,15 +1043,19 @@ struct protocol_list {
+@@ -1032,15 +1041,19 @@ struct protocol_list {
      { 0x0231,	"Luxcom" },
      { 0x0233,	"Sigma Network Systems" },
      { 0x0235,	"Apple Client Server Protocol" },
@@ -73,7 +73,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x4001,	"Cray Communications Control Protocol" },
      { 0x4003,	"CDPD Mobile Network Registration Protocol" },
      { 0x4005,	"Expand accelerator protocol" },
-@@ -1053,8 +1066,10 @@ struct protocol_list {
+@@ -1051,8 +1064,10 @@ struct protocol_list {
      { 0x4023,	"RefTek Protocol" },
      { 0x4025,	"Fibre Channel" },
      { 0x4027,	"EMIT Protocols" },
@@ -84,7 +84,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x8023,	"OSI Network Layer Control Protocol" },
      { 0x8025,	"Xerox NS IDP Control Protocol" },
      { 0x8027,	"DECnet Phase IV Control Protocol" },
-@@ -1063,7 +1078,9 @@ struct protocol_list {
+@@ -1061,7 +1076,9 @@ struct protocol_list {
      { 0x8031,	"Bridging NCP" },
      { 0x8033,	"Stream Protocol Control Protocol" },
      { 0x8035,	"Banyan Vines Control Protocol" },
@@ -94,7 +94,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x803f,	"NETBIOS Framing Control Protocol" },
      { 0x8041,	"Cisco Systems Control Protocol" },
      { 0x8043,	"Ascom Timeplex" },
-@@ -1072,18 +1089,24 @@ struct protocol_list {
+@@ -1070,18 +1087,24 @@ struct protocol_list {
      { 0x8049,	"Serial Data Control Protocol (PPP-SDCP)" },
      { 0x804b,	"SNA over 802.2 Control Protocol" },
      { 0x804d,	"SNA Control Protocol" },
@@ -119,7 +119,7 @@ Signed-off-by: Jo-Philipp Wich <jo at mein.io>
      { 0x8207,	"Cisco Discovery Protocol Control" },
      { 0x8209,	"Netcs Twin Routing" },
      { 0x820b,	"STP - Control Protocol" },
-@@ -1092,24 +1115,29 @@ struct protocol_list {
+@@ -1090,24 +1113,29 @@ struct protocol_list {
      { 0x8281,	"MPLSCP" },
      { 0x8285,	"IEEE p1284.4 standard - Protocol Control" },
      { 0x8287,	"ETSI TETRA TNP1 Control Protocol" },
diff --git a/package/network/services/ppp/patches/500-add-pptp-plugin.patch b/package/network/services/ppp/patches/500-add-pptp-plugin.patch
index 4b66cd2165..38b0c82506 100644
--- a/package/network/services/ppp/patches/500-add-pptp-plugin.patch
+++ b/package/network/services/ppp/patches/500-add-pptp-plugin.patch
@@ -1,6 +1,6 @@
 --- a/configure.ac
 +++ b/configure.ac
-@@ -344,6 +344,7 @@ AC_CONFIG_FILES([
+@@ -333,6 +333,7 @@ AC_CONFIG_FILES([
      pppd/plugins/pppoatm/Makefile
      pppd/plugins/pppol2tp/Makefile
      pppd/plugins/radius/Makefile
@@ -10,7 +10,7 @@
      scripts/Makefile
 --- a/pppd/plugins/Makefile.am
 +++ b/pppd/plugins/Makefile.am
-@@ -21,5 +21,5 @@ winbind_la_LDFLAGS = $(PLUGIN_LDFLAGS)
+@@ -17,5 +17,5 @@ winbind_la_LDFLAGS = $(PLUGIN_LDFLAGS)
  winbind_la_SOURCES = winbind.c
  
  if !SUNOS



From lede-commits at lists.infradead.org  Sun Jan  5 16:33:59 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 19:33:59 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc5: adjust config defaults
In-Reply-To: <173612363989.1886296.5032176663795404107@git-01.infra.openwrt.org>
References: <173612363989.1886296.5032176663795404107@git-01.infra.openwrt.org>
Message-ID: <mailman.31436.1736123643.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3d17274ca80938c375651f878db883f8a534f65d

commit 3d17274ca80938c375651f878db883f8a534f65d
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 6 01:24:03 2025 +0100

    OpenWrt v24.10.0-rc5: adjust config defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 +
 version.date                       | 1 +
 5 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index 581de056c4..4bc784e68b 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
-src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
-src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
-src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
+src-git packages https://git.openwrt.org/feed/packages.git^c84e022ee9fae5884a7c698746bfac4d74a12a2d
+src-git luci https://git.openwrt.org/project/luci.git^65c86ed3244f5ad3dc5fdfca93f40b20ab2f550c
+src-git routing https://git.openwrt.org/feed/routing.git^84d97e684bcb6a63dbfdfbfd9ec7407192861239
+src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
diff --git a/include/version.mk b/include/version.mk
index a6ebe58779..37ad97a1f6 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc5)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28304-6dacba30a7)
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc5)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index 80db993d46..b2a42f8f74 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
+		default "https://downloads.openwrt.org/releases/24.10.0-rc5"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default y
+		default n
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
new file mode 100644
index 0000000000..98cb8f83ba
--- /dev/null
+++ b/version
@@ -0,0 +1 @@
+r28304-6dacba30a7
diff --git a/version.date b/version.date
new file mode 100644
index 0000000000..751ec8b464
--- /dev/null
+++ b/version.date
@@ -0,0 +1 @@
+1736026537



From lede-commits at lists.infradead.org  Sun Jan  5 16:34:00 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 05 Jan 2025 19:34:00 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc5: revert to branch defaults
In-Reply-To: <173612363989.1886296.5032176663795404107@git-01.infra.openwrt.org>
References: <173612363989.1886296.5032176663795404107@git-01.infra.openwrt.org>
Message-ID: <mailman.31439.1736123648.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/50dcebeb8ad712922853bacb34212129cdf7f94b

commit 50dcebeb8ad712922853bacb34212129cdf7f94b
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 6 01:24:07 2025 +0100

    OpenWrt v24.10.0-rc5: revert to branch defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 -
 version.date                       | 1 -
 5 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index 4bc784e68b..581de056c4 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git^c84e022ee9fae5884a7c698746bfac4d74a12a2d
-src-git luci https://git.openwrt.org/project/luci.git^65c86ed3244f5ad3dc5fdfca93f40b20ab2f550c
-src-git routing https://git.openwrt.org/feed/routing.git^84d97e684bcb6a63dbfdfbfd9ec7407192861239
-src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
+src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
+src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
+src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
+src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
diff --git a/include/version.mk b/include/version.mk
index 37ad97a1f6..a6ebe58779 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc5)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28304-6dacba30a7)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc5)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index b2a42f8f74..80db993d46 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10.0-rc5"
+		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default n
+		default y
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
deleted file mode 100644
index 98cb8f83ba..0000000000
--- a/version
+++ /dev/null
@@ -1 +0,0 @@
-r28304-6dacba30a7
diff --git a/version.date b/version.date
deleted file mode 100644
index 751ec8b464..0000000000
--- a/version.date
+++ /dev/null
@@ -1 +0,0 @@
-1736026537



From lede-commits at lists.infradead.org  Sun Jan  5 22:19:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 06 Jan 2025 01:19:52 -0500
Subject: [openwrt/openwrt]  mac80211: set basic-rate for mesh interfaces
In-Reply-To: <173614439264.2372362.14098750320639760995@git-01.infra.openwrt.org>
References: <173614439264.2372362.14098750320639760995@git-01.infra.openwrt.org>
Message-ID: <mailman.31507.1736144395.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3ec7f3a512a27f8ca6402954ad2a997176103b4b

commit 3ec7f3a512a27f8ca6402954ad2a997176103b4b
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Sun Dec 22 02:56:12 2024 +0100

    mac80211: set basic-rate for mesh interfaces
    
    Basic rates were not set for mesh-interfaces, resulting in the undesired
    behavior where 11s frames might be sent with a rate which was not
    configured.
    
    Depending on the driver, the basic rate might also be used to determine
    the beacon rate configured to the chip. One such example are MediaTek
    MT7915 platforms.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh       | 6 ++++++
 package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc  | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 9e9922e0b3..52c36a8c92 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -849,6 +849,11 @@ mac80211_setup_mesh() {
 	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
 	[ -n "$mesh_id" ] && ssid="$mesh_id"
 
+	brstr=
+	for br in $basic_rate_list; do
+		wpa_supplicant_add_rate brstr "$br"
+	done
+
 	local prev
 	json_set_namespace wdev_uc prev
 
@@ -859,6 +864,7 @@ mac80211_setup_mesh() {
 	json_add_string freq "$freq"
 	json_add_string htmode "$iw_htmode"
 	[ -n "$mcval" ] && json_add_string mcast-rate "$mcval"
+	[ -n "$brstr" ] && json_add_string basic-rates "$brstr"
 	json_add_int beacon-interval "$beacon_int"
 	mac80211_add_mesh_params
 
diff --git a/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc b/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
index d836a930fc..166e9403df 100644
--- a/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
+++ b/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
@@ -45,7 +45,7 @@ function iface_start(wdev)
 		system(cmd);
 	} else if (wdev.mode == "mesh") {
 		let cmd = [ "iw", "dev", ifname, "mesh", "join", wdev.ssid, "freq", wdev.freq, htmode ];
-		for (let key in [ "mcast-rate", "beacon-interval" ])
+		for (let key in [ "basic-rates", "mcast-rate", "beacon-interval" ])
 			if (wdev[key])
 				push(cmd, key, wdev[key]);
 		system(cmd);



From lede-commits at lists.infradead.org  Sun Jan  5 22:46:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 06 Jan 2025 01:46:38 -0500
Subject: [openwrt/openwrt]  ath79: reset ETH switch for AR9344
In-Reply-To: <173614599891.2418938.16474478400813700674@git-01.infra.openwrt.org>
References: <173614599891.2418938.16474478400813700674@git-01.infra.openwrt.org>
Message-ID: <mailman.31522.1736146002.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/0c52c9d6fc53ebe0834b3945c5d58277752d9648

commit 0c52c9d6fc53ebe0834b3945c5d58277752d9648
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 3 21:46:13 2025 +0100

    ath79: reset ETH switch for AR9344
    
    According to datasheet, on AR9344 the switch and switch analog need to
    be reset first before initiating a full reset.
    
    Resetting these systems fixes spurious reset hangs on Atheros AR9344
    SoCs.
    
    Link: https://github.com/freifunk-gluon/gluon/issues/2904
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
    (cherry picked from commit 916af73fc388d638b1a717a2411792e0680dd8e6)
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 104 +++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
new file mode 100644
index 0000000000..dcac5be58b
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
@@ -0,0 +1,104 @@
+From: David Bauer <mail at david-bauer.net>
+Date: Tue, 2 Jan 2025 19:22:40 +0100
+Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
+
+According to datasheet, on AR9344 the switch and switch analog need to
+be reset first before initiating a full reset.
+
+Resetting these systems fixes spurious reset hangs on Atheros AR9344
+SoCs.
+
+Link: https://github.com/freifunk-gluon/gluon/issues/2904
+
+Signed-off-by: David Bauer <mail at david-bauer.net>
+
+--- a/drivers/reset/reset-ath79.c
++++ b/drivers/reset/reset-ath79.c
+@@ -12,8 +12,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/reset-controller.h>
+ #include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/of.h>
+ 
+ struct ath79_reset {
++	struct platform_device *pdev;
+ 	struct reset_controller_dev rcdev;
+ 	struct notifier_block restart_nb;
+ 	void __iomem *base;
+@@ -21,16 +24,13 @@ struct ath79_reset {
+ };
+ 
+ #define FULL_CHIP_RESET 24
++#define ETH_SWITCH_RESET 8
++#define ETH_SWITCH_ARESET 12
+ 
+-static int ath79_reset_update(struct reset_controller_dev *rcdev,
++static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
+ 			unsigned long id, bool assert)
+ {
+-	struct ath79_reset *ath79_reset =
+-		container_of(rcdev, struct ath79_reset, rcdev);
+-	unsigned long flags;
+ 	u32 val;
+-
+-	spin_lock_irqsave(&ath79_reset->lock, flags);
+ 	val = readl(ath79_reset->base);
+ 	if (assert)
+ 		val |= BIT(id);
+@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
+ 	writel(val, ath79_reset->base);
+ 	/* Flush cache */
+ 	readl(ath79_reset->base);
++}
++
++static int ath79_reset_update(struct reset_controller_dev *rcdev,
++			unsigned long id, bool assert)
++{
++	struct ath79_reset *ath79_reset =
++		container_of(rcdev, struct ath79_reset, rcdev);
++	unsigned long flags;
++
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++	__ath79_reset_update_unlocked(ath79_reset, id, assert);
+ 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return 0;
+@@ -79,8 +90,27 @@ static int ath79_reset_restart_handler(s
+ {
+ 	struct ath79_reset *ath79_reset =
+ 		container_of(nb, struct ath79_reset, restart_nb);
++	unsigned long flags;
+ 
+-	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++
++	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
++		/**
++		 * AR9344 has been observed to hang on reboot in rare cases.
++		 *
++		 * Datasheet states to reset the ETH switch systems before asserting
++		 * full chip reset. See page 111 of the AR9344 datasheet.
++		 */
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
++		mdelay(10);
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
++		mdelay(10);
++	}
++
++	__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++	mdelay(10);
++
++	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return NOTIFY_DONE;
+ }
+@@ -95,6 +125,8 @@ static int ath79_reset_probe(struct plat
+ 	if (!ath79_reset)
+ 		return -ENOMEM;
+ 
++	ath79_reset->pdev = pdev;
++
+ 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ 	if (IS_ERR(ath79_reset->base))
+ 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sun Jan  5 22:46:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 06 Jan 2025 01:46:39 -0500
Subject: [openwrt/openwrt]  mac80211: set basic-rate for mesh interfaces
In-Reply-To: <173614599891.2418938.16474478400813700674@git-01.infra.openwrt.org>
References: <173614599891.2418938.16474478400813700674@git-01.infra.openwrt.org>
Message-ID: <mailman.31523.1736146003.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c06d4df9748aea84b9a4ffcbe51b2e6fff94de1e

commit c06d4df9748aea84b9a4ffcbe51b2e6fff94de1e
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Sun Dec 22 02:56:12 2024 +0100

    mac80211: set basic-rate for mesh interfaces
    
    Basic rates were not set for mesh-interfaces, resulting in the undesired
    behavior where 11s frames might be sent with a rate which was not
    configured.
    
    Depending on the driver, the basic rate might also be used to determine
    the beacon rate configured to the chip. One such example are MediaTek
    MT7915 platforms.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
    (cherry picked from commit 3ec7f3a512a27f8ca6402954ad2a997176103b4b)
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh       | 6 ++++++
 package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc  | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 42d7bc66d0..368885246a 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -846,6 +846,11 @@ mac80211_setup_mesh() {
 	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
 	[ -n "$mesh_id" ] && ssid="$mesh_id"
 
+	brstr=
+	for br in $basic_rate_list; do
+		wpa_supplicant_add_rate brstr "$br"
+	done
+
 	local prev
 	json_set_namespace wdev_uc prev
 
@@ -856,6 +861,7 @@ mac80211_setup_mesh() {
 	json_add_string freq "$freq"
 	json_add_string htmode "$iw_htmode"
 	[ -n "$mcval" ] && json_add_string mcast-rate "$mcval"
+	[ -n "$brstr" ] && json_add_string basic-rates "$brstr"
 	json_add_int beacon-interval "$beacon_int"
 	mac80211_add_mesh_params
 
diff --git a/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc b/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
index d836a930fc..166e9403df 100644
--- a/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
+++ b/package/network/config/wifi-scripts/files/usr/share/hostap/wdev.uc
@@ -45,7 +45,7 @@ function iface_start(wdev)
 		system(cmd);
 	} else if (wdev.mode == "mesh") {
 		let cmd = [ "iw", "dev", ifname, "mesh", "join", wdev.ssid, "freq", wdev.freq, htmode ];
-		for (let key in [ "mcast-rate", "beacon-interval" ])
+		for (let key in [ "basic-rates", "mcast-rate", "beacon-interval" ])
 			if (wdev[key])
 				push(cmd, key, wdev[key]);
 		system(cmd);



From lede-commits at lists.infradead.org  Mon Jan  6 08:53:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 06 Jan 2025 11:53:28 -0500
Subject: [openwrt/openwrt]  ipq40xx: dts: add ethernet0 alias for all devices
In-Reply-To: <173618240822.3495575.18338240458536738462@git-01.infra.openwrt.org>
References: <173618240822.3495575.18338240458536738462@git-01.infra.openwrt.org>
Message-ID: <mailman.32209.1736182631.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d09dd75fbd1314ec5f3571511195da4012d7a51a

commit d09dd75fbd1314ec5f3571511195da4012d7a51a
Author: Matthias Schiffer <mschiffer at universe-factory.net>
AuthorDate: Tue Dec 31 12:23:53 2024 +0100

    ipq40xx: dts: add ethernet0 alias for all devices
    
    Updating the driver patches for ipq40xx (correctly) removed the
    ethernet0 alias from qcom-ipq4019.dtsi; however, on some devices this
    alias is needed for the bootloader to set MAC addresses in the FDT.
    
    As it is unknown which devices actually need the alias, simply add it to
    all devices trees for now that enable the &gmac now to avoid regressions
    from previous OpenWrt releases. The additional alias should not cause any
    issues even when it is not needed.
    
    A TODO comment is added to the same Device Trees to document that the
    alias may not be needed (hopefully preventing it from being copied
    unnecessarily to newly added devices in the future). The following
    devices are known to need the alias for correct MAC address assignment,
    so no TODO comment is added:
    
    - FRITZ!Box 4040
    - FRITZ!Box 7530
    
    Fixes: cd9c7211241e ("ipq40xx: 6.1: use latest DSA and ethernet patches")
    Signed-off-by: Matthias Schiffer <mschiffer at universe-factory.net>
    Link: https://github.com/openwrt/openwrt/pull/17442
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts  | 1 +
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi      | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts        | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts       | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts  | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts   | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts    | 5 +++++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts     | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts     | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts  | 1 +
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts       | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts   | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts         | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts       | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts   | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi        | 5 +++++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts        | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi      | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts     | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts | 5 +++++
 61 files changed, 141 insertions(+)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
index c117a90538..6d1babf00e 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
index f2e2ed3f7f..83b4addb79 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
@@ -15,6 +15,8 @@
 		led-failsafe = &status;
 		led-running = &status;
 		led-upgrade = &status;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
index b061428bb3..f2690a095d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
index 8d09bfd0b7..469a6ca757 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
@@ -11,6 +11,8 @@
 	compatible = "ezviz,cs-w3-wd1200g-eup";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
index df5d9331a1..69164540cd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
@@ -11,6 +11,8 @@
 	compatible = "dlink,dap-2610";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_red;
 		led-failsafe = &led_red;
 		led-running = &led_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
index e80a540244..6cace3b88f 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
@@ -11,6 +11,8 @@
 	compatible = "linksys,ea6350v3";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
index f343bea725..049b3a5ba3 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
@@ -41,6 +41,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
index ca064837c8..a13fc71987 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
@@ -46,6 +46,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_amber;
 		led-failsafe = &power_amber;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
index bcb3b24232..0d7d8883fc 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
@@ -11,6 +11,7 @@
 	compatible = "avm,fritzbox-4040";
 
 	aliases {
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &flash;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
index d8b4300a52..4293191b07 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
@@ -11,6 +11,8 @@
 	compatible = "glinet,gl-a1300", "qcom,ipq4019";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_run;
 		led-failsafe = &led_run;
 		led-running = &led_run;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
index bb197c2742..4ed8a82af6 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
@@ -11,6 +11,8 @@
 	compatible = "glinet,gl-ap1300";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
index 07ad4d3d52..d91725dfb7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
index 9828b4b34e..fcacb98cb9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
@@ -8,6 +8,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
index 293bf3d20a..5deb9ba3de 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
@@ -9,6 +9,11 @@
 	model = "devolo Magic 2 WiFi next";
 	compatible = "devolo,magic-2-wifi-next";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
index bf2fc0e37e..c19262497d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
@@ -11,6 +11,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
index 957ccb306c..2b79169c0d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
index a353c7f9f3..8040bb494b 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_purple;
 		led-failsafe = &led_status_yellow;
 		led-running = &led_status_cyan;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
index e58b3378d5..946b3b3038 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
@@ -16,6 +16,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
index ea2102f7d6..56d920a6dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
@@ -7,6 +7,8 @@
 	compatible = "teltonika,rutx50";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_rssi0;
 		led-failsafe = &led_rssi0;
 		led-running = &led_rssi0;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
index 23e9457f02..d434145278 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
index 8515f3c034..982ceef044 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
@@ -16,6 +16,8 @@
 		led-failsafe = &led_power_amber;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_amber;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
index 2b357a1f03..f8b458f9f7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
@@ -18,6 +18,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
index 1f26db5869..fe6e8626ea 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
@@ -10,6 +10,8 @@
 	compatible = "linksys,whw01";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		serial0 = &blsp1_uart1;
 		led-boot = &led_system_blue;
 		led-running = &led_system_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
index dd56cb215e..990eb70daa 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
@@ -11,6 +11,8 @@
 	compatible = "pakedge,wr-1";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
index fc5a7a94aa..7c8e81de33 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
@@ -9,6 +9,11 @@
 	model = "Luma Home WRTQ-329ACN";
 	compatible = "luma,wrtq-329acn";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	i2c-gpio {
 		compatible = "i2c-gpio";
 		sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
index d8249236f0..79242a42e4 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
index 3569d6e53a..3346fc8098 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
@@ -11,6 +11,8 @@
 	compatible = "mobipromo,cm520-79f";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_sys;
 		led-failsafe = &led_sys;
 		led-running = &led_sys;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
index 243d19fb03..00fc918ccf 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
@@ -11,6 +11,11 @@
 / {
 	model = "Qxwlan E2600AC c1";
 	compatible = "qxwlan,e2600ac-c1";
+
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
 };
 
 &blsp1_spi1 {
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
index e065ef0168..c2c602114f 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
@@ -11,6 +11,11 @@
 / {
 	model = "Qxwlan E2600AC c2";
 	compatible = "qxwlan,e2600ac-c2";
+
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
 };
 
 &blsp1_spi1 {
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 4f6cafb885..39905d4342 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -15,6 +15,7 @@
 	};
 
 	aliases {
+		ethernet0 = &gmac;
 		led-boot = &power_green;
 		led-failsafe = &info_red;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
index 106c8031e3..e60cd42778 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
@@ -11,6 +11,8 @@
 	compatible = "avm,fritzrepeater-1200";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_green;
 		led-failsafe = &power_red;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
index e8daef63f1..f720be6d03 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
@@ -11,6 +11,8 @@
 	compatible = "avm,fritzrepeater-3000";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_led;
 		led-failsafe = &power_led;
 		led-running = &power_led;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
index 89ba523e57..33400170c8 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
@@ -20,6 +20,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport4;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
index 94be4d976e..d792599f1a 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
@@ -12,6 +12,8 @@
 	compatible = "8dev,habanero-dvk";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
index b1a04012fb..881abc23db 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_blue;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
index 4a3a323b5f..bd7f1b5cb9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_blue;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
index 4e5497cbc3..09d9a8f3dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
@@ -15,6 +15,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_backlight_white;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
index a5b55ff421..b042329bc7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
@@ -35,6 +35,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &user;
 		led-failsafe = &user;
 		led-running = &user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
index 7ec3c6a9ae..e3a5ad7be5 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
@@ -15,6 +15,8 @@
 		led-failsafe = &led_red0;
 		led-running = &led_blue0;
 		led-upgrade = &led_red0;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport4;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
index 7c0260ec3c..3eaa75b520 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
@@ -14,6 +14,8 @@
 	compatible = "zte,mf18a";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
index a4606dd21c..80a729e963 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
@@ -13,6 +13,8 @@
 	compatible = "zte,mf282plus";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_internal;
 		led-failsafe = &led_internal;
 		led-running = &led_internal;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
index 06d65b8944..91cf49b1b0 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
@@ -12,6 +12,8 @@
 	compatible = "zte,mf286d";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_internal;
 		led-failsafe = &led_internal;
 		led-running = &led_internal;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
index f5a985b6d1..f03717be33 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
@@ -13,6 +13,8 @@
 	compatible = "zte,mf289f";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
index e115c211aa..4bef499499 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
@@ -12,6 +12,8 @@
 	compatible = "sony,ncp-hg100-cellular";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_cloud_green;
 		led-failsafe = &led_cloud_red;
 		led-running = &led_cloud_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
index f87ab07416..f4c64d6b06 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
@@ -44,6 +44,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_orange;
 		led-failsafe = &led_status_blue;
 		led-running = &led_power_orange;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
index 0463c61236..5ebbaa90ad 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
@@ -12,6 +12,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_sys;
 		led-failsafe = &led_sys;
 		led-running = &led_sys;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
index 3cd8997a92..48b2e43d18 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
@@ -16,6 +16,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
index 7a13241b66..593b3959fc 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
@@ -14,6 +14,8 @@
 	compatible = "cellc,rtl30vw";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_blue;
 		led-failsafe = &led_power_red;
 		led-running = &led_power_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
index 54e3cc7818..cb12381022 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
@@ -8,6 +8,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_blue;
 		led-failsafe = &led_red;
 		led-running = &led_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
index 644329419d..887762bd23 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
@@ -11,6 +11,8 @@
 	model = "SKSpruce WIA3300-20";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac;
 		led-boot = &led_status_red;
 		led-failsafe = &led_status_lime;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
index f2e39c87ae..c6113e7aab 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
@@ -14,6 +14,8 @@
 	compatible = "google,wifi", "google,gale-v2", "qcom,ipq4019";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac0;
 		led-boot = &led0_blue;
 		led-failsafe = &led0_red;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
index ab985dfce1..c892bf0c5b 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
@@ -29,6 +29,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_blue;
 		led-failsafe = &led_power_orange;
 		led-running = &led_power_white;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
index 0673dc0241..3bcc5c3cec 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
@@ -26,6 +26,11 @@
 	};
 
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	soc {
 		tcsr at 1949000 {
 			compatible = "qcom,tcsr";
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
index 517d691d10..fd7878b47a 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
@@ -73,6 +73,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &status;
 		led-failsafe = &status;
 		led-upgrade = &status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
index 6227027266..1cb1b9d5dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
@@ -10,6 +10,8 @@
 	compatible = "aruba,ap-303h";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_red;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
index 7f8f9be795..520ccdfd1c 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
@@ -6,6 +6,11 @@
 #include <dt-bindings/soc/qcom,tcsr.h>
 
 / {
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
index dfb639e2bb..2aea68d520 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
@@ -25,6 +25,8 @@
 	compatible = "glinet,gl-b1300";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
index 8286e1899f..9d2f7ce1bc 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
@@ -20,6 +20,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &status_green;
 		led-failsafe = &status_red;
 		led-running = &status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
index 48e0bb903e..533ff388a9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
@@ -10,6 +10,8 @@
 	compatible = "extreme-networks,ws-ap3915i";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_amber;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
index 9e1dfa5c1d..254de0a46d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
@@ -10,6 +10,8 @@
 	compatible = "extreme-networks,ws-ap391x";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_red;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
index a549f03407..d432b2ec2d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
@@ -9,6 +9,11 @@
 	model = "Wallystech DR40X9";
 	compatible = "wallys,dr40x9";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	chosen {
 		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
 	};



From lede-commits at lists.infradead.org  Mon Jan  6 12:24:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 06 Jan 2025 15:24:47 -0500
Subject: [openwrt/openwrt]  uboot-envtools: ipq60xx: remove number of blocks
In-Reply-To: <173619508750.3844439.13351145080117198624@git-01.infra.openwrt.org>
References: <173619508750.3844439.13351145080117198624@git-01.infra.openwrt.org>
Message-ID: <mailman.32320.1736195094.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/285bdd29cb55900a2009e26303ab5abb66e165e9

commit 285bdd29cb55900a2009e26303ab5abb66e165e9
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Mon Jan 6 19:12:18 2025 +0100

    uboot-envtools: ipq60xx: remove number of blocks
    
    It is not required to specify the number of blocks as envtools are able
    to autodetect it.
    
    Link: https://github.com/openwrt/openwrt/pull/17504
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/boot/uboot-envtools/files/qualcommax_ipq60xx | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq60xx b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
index ccc74e2df6..eec99ce8f9 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq60xx
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
@@ -18,12 +18,12 @@ cambiumnetworks,xe3-4)
 linksys,mr7350)
 	idx="$(find_mtd_index u_env)"
 	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2"
+		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
 	;;
 netgear,wax214)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2"
+		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
 	;;
 yuncore,fap650)
 	idx="$(find_mtd_index 0:appsblenv)"



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:39 -0500
Subject: [openwrt/openwrt]  realtek: rtl839x: Refresh kernel config
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33083.1736257125.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d3b62ba3ed6aaad95ae52d76a46a72c438531770

commit d3b62ba3ed6aaad95ae52d76a46a72c438531770
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Dec 29 14:29:10 2024 +0100

    realtek: rtl839x: Refresh kernel config
    
    Run 'make kernel_oldconfig' to get an up-to-date config.
    
    "# CONFIG_I2C_MUX_RTL9300 is not set" is retained, as the kernel module
    build will selects CONFIG_I2C_MUX=m, on which this symbol depends.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl839x/config-6.6 | 41 +++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 12 deletions(-)

diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6
index 630027bf81..53a167e8f7 100644
--- a/target/linux/realtek/rtl839x/config-6.6
+++ b/target/linux/realtek/rtl839x/config-6.6
@@ -6,13 +6,15 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BMIPS_CPUFREQ is not set
-CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
 CONFIG_COMMON_CLK_REALTEK=y
 CONFIG_COMMON_CLK_RTL83XX=y
+CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
+CONFIG_CONTEXT_TRACKING=y
+CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_CPU_BIG_ENDIAN=y
@@ -38,6 +40,7 @@ CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_MIPSR2_IRQ_EI=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
 CONFIG_CPU_RMAP=y
@@ -46,24 +49,30 @@ CONFIG_CPU_SUPPORTS_CPUFREQ=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
-CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_UTILS=y
+CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_8250=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
-CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_FS_IOMAP=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
@@ -91,10 +100,10 @@ CONFIG_GPIO_RTL8231=y
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
 CONFIG_GRO_CELLS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HWMON=y
 CONFIG_HZ_PERIODIC=y
@@ -122,20 +131,15 @@ CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_SMBUS=y
-CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
 CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CLOCK_VSYSCALL=y
-# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
-CONFIG_MIPS_EBPF_JIT=y
 CONFIG_MIPS_EXTERNAL_TIMER=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_MIPS_LD_CAN_LINK_VDSO=y
 CONFIG_MIPS_MT=y
 # CONFIG_MIPS_MT_FPAFF is not set
 CONFIG_MIPS_MT_SMP=y
@@ -144,6 +148,7 @@ CONFIG_MIPS_NR_CPU_NR_MAP=2
 CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_GEOMETRY=y
@@ -158,18 +163,23 @@ CONFIG_MTD_SPLIT_TPLINK_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_MTD_VIRT_CONCAT=y
 CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SRCU_NMI_SAFE=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_RTL83XX=y
 CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EGRESS=y
 CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_RTL838X=y
 CONFIG_NET_SELFTESTS=y
 CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_XGRESS=y
 CONFIG_NO_EXCEPT_FILL=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+CONFIG_NVMEM_LAYOUTS=y
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_EARLY_FLATTREE=y
@@ -179,19 +189,25 @@ CONFIG_OF_IRQ=y
 CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_PADATA=y
+CONFIG_PAGE_POOL=y
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
 CONFIG_PCI_DRIVERS_LEGACY=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
 CONFIG_PM_OPP=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_POWER_RESET_SYSCON=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_QUEUED_RWLOCKS=y
 CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y
 CONFIG_REALTEK_OTTO_TIMER=y
 CONFIG_REALTEK_OTTO_WDT=y
@@ -215,8 +231,8 @@ CONFIG_SOCK_RX_QUEUE_MAPPING=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SRAM=y
-CONFIG_SRCU=y
 CONFIG_SWPHY=y
 CONFIG_SYNC_R4K=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
@@ -235,7 +251,8 @@ CONFIG_TARGET_ISA_REV=2
 CONFIG_TICK_CPU_ACCOUNTING=y
 CONFIG_TIMER_OF=y
 CONFIG_TIMER_PROBE=y
-CONFIG_TINY_SRCU=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
 CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
 CONFIG_USE_OF=y
 CONFIG_WATCHDOG_CORE=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:38 -0500
Subject: [openwrt/openwrt]  realtek: rtl838x: Refresh kernel config
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33084.1736257126.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a6edcb4cb0a67ca60f2ad86cb5596e14e1075cd0

commit a6edcb4cb0a67ca60f2ad86cb5596e14e1075cd0
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Dec 27 17:53:57 2024 +0100

    realtek: rtl838x: Refresh kernel config
    
    Run 'make kernel_oldconfig' to get an up-to-date config.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl838x/config-6.6 | 34 ++++++++++++++++++++++++---------
 1 file changed, 25 insertions(+), 9 deletions(-)

diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index 44c1d7e064..a190a69ec6 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -12,6 +12,7 @@ CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
 CONFIG_COMMON_CLK_REALTEK=y
 CONFIG_COMMON_CLK_RTL83XX=y
+CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
 CONFIG_CPUFREQ_DT=y
@@ -37,6 +38,7 @@ CONFIG_CPU_MIPS32=y
 # CONFIG_CPU_MIPS32_R1 is not set
 CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
@@ -44,29 +46,35 @@ CONFIG_CPU_SUPPORTS_CPUFREQ=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
-CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_UTILS=y
+CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_8250=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_EXTRA_FIRMWARE="rtl838x_phy/rtl838x_8214fc.fw rtl838x_phy/rtl838x_8218b.fw rtl838x_phy/rtl838x_8380.fw"
 CONFIG_EXTRA_FIRMWARE_DIR="firmware"
 CONFIG_FIXED_PHY=y
-CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_FORCE_NR_CPUS=y
+CONFIG_FS_IOMAP=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_LIB_ASHLDI3=y
 CONFIG_GENERIC_LIB_ASHRDI3=y
@@ -91,10 +99,10 @@ CONFIG_GPIO_RTL8231=y
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
 CONFIG_GRO_CELLS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HWMON=y
 CONFIG_HZ_PERIODIC=y
@@ -123,7 +131,6 @@ CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_SMBUS=y
-CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -131,13 +138,12 @@ CONFIG_MIPS_ASID_BITS=8
 CONFIG_MIPS_ASID_SHIFT=0
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
-CONFIG_MIPS_EBPF_JIT=y
 CONFIG_MIPS_EXTERNAL_TIMER=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_MIPS_LD_CAN_LINK_VDSO=y
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_GEOMETRY=y
@@ -157,12 +163,16 @@ CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_RTL83XX=y
 CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EGRESS=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_RTL838X=y
 CONFIG_NET_SELFTESTS=y
 CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_XGRESS=y
 CONFIG_NO_EXCEPT_FILL=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
 CONFIG_NVMEM=y
+CONFIG_NVMEM_LAYOUTS=y
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_EARLY_FLATTREE=y
@@ -171,17 +181,23 @@ CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
 CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
+CONFIG_PAGE_POOL=y
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
 CONFIG_PCI_DRIVERS_LEGACY=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
 CONFIG_PM_OPP=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_POWER_RESET_SYSCON=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y
 CONFIG_REALTEK_OTTO_TIMER=y
 CONFIG_REALTEK_OTTO_WDT=y
@@ -200,8 +216,8 @@ CONFIG_SFP=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SRAM=y
-CONFIG_SRCU=y
 CONFIG_SWPHY=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
 CONFIG_SYS_HAS_CPU_MIPS32_R1=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:43 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:43 -0500
Subject: [openwrt/openwrt]  realtek: rtl838x: Instantiate auxiliary MDIO bus
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33085.1736257126.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/92ae8cb16c46823d5a00489b4d3a9cc724ba67a4

commit 92ae8cb16c46823d5a00489b4d3a9cc724ba67a4
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Dec 27 15:56:44 2024 +0100

    realtek: rtl838x: Instantiate auxiliary MDIO bus
    
    Add a disabled node for the auxiliary MDIO bus, used to manage the
    RTL8231 expanders. A simple-mfd parent node is added, at the same
    (implied) address as the switch at 1b000000 node, as the switch drivers
    should anyway transistion to MFD subdivices at some point.
    
    Additionally, two pinctrl-single node are added to allow the MDX pins to
    be muxed correctly, in case the bootloader leaves these unconfigured.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl838x.dtsi   | 56 +++++++++++++++++++++++++++++++++
 target/linux/realtek/rtl838x/config-6.6 |  2 +-
 2 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/target/linux/realtek/dts/rtl838x.dtsi b/target/linux/realtek/dts/rtl838x.dtsi
index 13ba6450b2..ab034fc1bc 100644
--- a/target/linux/realtek/dts/rtl838x.dtsi
+++ b/target/linux/realtek/dts/rtl838x.dtsi
@@ -232,6 +232,42 @@
 		};
 	};
 
+	switchcore at 1b000000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x1b000000 0x20000>;
+
+		mdio_aux: mdio-aux {
+			compatible = "realtek,rtl8380-aux-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&mdio_aux_mdx>, <&aux_mode_mdio>;
+		};
+	};
+
+	pinmux at 1b000144 {
+		compatible = "pinctrl-single";
+		reg = <0x1b000144 0x4>;
+
+		pinctrl-single,bit-per-mux;
+		pinctrl-single,register-width = <32>;
+		pinctrl-single,function-mask = <0x1>;
+		#pinctrl-cells = <2>;
+
+		/* I2C mode */
+		aux_mode_i2c: i2c-pins {
+			pinctrl-single,bits = <0x0 0x0 0x1>;
+		};
+
+		/* MDIO mode */
+		aux_mode_mdio: mdx-pins {
+			pinctrl-single,bits = <0x0 0x1 0x1>;
+		};
+	};
+
 	pinmux: pinmux at 1b001000 {
 		compatible = "pinctrl-single";
 		reg = <0x1b001000 0x4>;
@@ -262,6 +298,26 @@
 		};
 	};
 
+	pinmux at 1b00a0e0 {
+		compatible = "pinctrl-single";
+		reg = <0x1b00a0e0 0x4>;
+
+		pinctrl-single,bit-per-mux;
+		pinctrl-single,register-width = <32>;
+		pinctrl-single,function-mask = <0x1>;
+		#pinctrl-cells = <2>;
+
+		/* Use SoC GPIO 2/3 as GPIO */
+		mdio_aux_gpio: gpio-pins {
+			pinctrl-single,bits = <0x0 0x0 0x1>;
+		};
+
+		/* Use SoC GPIO 2/3 as MDC/MDIO */
+		mdio_aux_mdx: mdx-pins {
+			pinctrl-single,bits = <0x0 0x1 0x1>;
+		};
+	};
+
 	ethernet0: ethernet at 1b00a300 {
 		compatible = "realtek,rtl838x-eth";
 		reg = <0x1b00a300 0x100>;
diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index 6cceded5af..9364888e47 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -130,7 +130,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
-# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
+CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:41 -0500
Subject: [openwrt/openwrt]  realtek: rtl931x: Refresh kernel config
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33086.1736257126.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c2240a75d5802be60b2b614f726ff0f638aa3541

commit c2240a75d5802be60b2b614f726ff0f638aa3541
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Dec 29 14:37:50 2024 +0100

    realtek: rtl931x: Refresh kernel config
    
    Run 'make kernel_oldconfig' to get an up-to-date config.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl931x/config-6.6 | 39 +++++++++++++++++++++++----------
 1 file changed, 28 insertions(+), 11 deletions(-)

diff --git a/target/linux/realtek/rtl931x/config-6.6 b/target/linux/realtek/rtl931x/config-6.6
index df235defe8..9d332cee27 100644
--- a/target/linux/realtek/rtl931x/config-6.6
+++ b/target/linux/realtek/rtl931x/config-6.6
@@ -8,15 +8,17 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 CONFIG_BOARD_SCACHE=y
-CONFIG_CEVT_RTL9300=y
 CONFIG_CLKSRC_MIPS_GIC=y
 CONFIG_CLOCKSOURCE_WATCHDOG=y
 CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
 # CONFIG_COMMON_CLK_REALTEK is not set
+CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
+CONFIG_CONTEXT_TRACKING=y
+CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_CPU_BIG_ENDIAN=y
 CONFIG_CPU_GENERIC_DUMP_TLB=y
 CONFIG_CPU_HAS_DIEI=y
@@ -29,6 +31,7 @@ CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
 CONFIG_CPU_MIPSR2_IRQ_EI=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
 CONFIG_CPU_RMAP=y
@@ -36,24 +39,29 @@ CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CSRC_R4K=y
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_UTILS=y
+CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_8250=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
-CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_FS_IOMAP=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
 CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
@@ -77,10 +85,10 @@ CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_REALTEK_OTTO=y
 CONFIG_GPIO_RTL8231=y
 CONFIG_GRO_CELLS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HIGHMEM=y
 CONFIG_HWMON=y
@@ -113,7 +121,6 @@ CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_SMBUS=y
-CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -127,10 +134,9 @@ CONFIG_MIPS_CPC=y
 CONFIG_MIPS_CPS=y
 # CONFIG_MIPS_CPS_NS16550_BOOL is not set
 CONFIG_MIPS_CPU_SCACHE=y
-CONFIG_MIPS_EBPF_JIT=y
+CONFIG_MIPS_EXTERNAL_TIMER=y
 CONFIG_MIPS_GIC=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_MIPS_LD_CAN_LINK_VDSO=y
 CONFIG_MIPS_MT=y
 CONFIG_MIPS_MT_FPAFF=y
 CONFIG_MIPS_MT_SMP=y
@@ -139,6 +145,7 @@ CONFIG_MIPS_NR_CPU_NR_MAP=2
 CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_GEOMETRY=y
@@ -151,18 +158,23 @@ CONFIG_MTD_SPLIT_FIRMWARE=y
 CONFIG_MTD_SPLIT_TPLINK_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SRCU_NMI_SAFE=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_RTL83XX=y
 CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EGRESS=y
 CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_RTL838X=y
 CONFIG_NET_SELFTESTS=y
 CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_XGRESS=y
 CONFIG_NO_EXCEPT_FILL=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+CONFIG_NVMEM_LAYOUTS=y
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_EARLY_FLATTREE=y
@@ -172,21 +184,26 @@ CONFIG_OF_IRQ=y
 CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
 CONFIG_PADATA=y
+CONFIG_PAGE_POOL=y
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
 CONFIG_PCI_DRIVERS_LEGACY=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_SYSCON=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_QUEUED_RWLOCKS=y
 CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y
 # CONFIG_REALTEK_OTTO_TIMER is not set
 CONFIG_REALTEK_OTTO_WDT=y
-# CONFIG_REALTEK_PHY is not set
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
@@ -209,7 +226,7 @@ CONFIG_SOCK_RX_QUEUE_MAPPING=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
-CONFIG_SRCU=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SWPHY=y
 CONFIG_SYNC_R4K=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:40 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:40 -0500
Subject: [openwrt/openwrt]  realtek: rtl930x: Refresh kernel config
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33089.1736257127.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e1777c95d3571f86fe0da84aa7191c28ac3b161d

commit e1777c95d3571f86fe0da84aa7191c28ac3b161d
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Dec 29 14:33:12 2024 +0100

    realtek: rtl930x: Refresh kernel config
    
    Run 'make kernel_oldconfig' to get an up-to-date config.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl930x/config-6.6 | 35 ++++++++++++++++++++++++---------
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/target/linux/realtek/rtl930x/config-6.6 b/target/linux/realtek/rtl930x/config-6.6
index 5a29bdc3c1..a6a23ebcff 100644
--- a/target/linux/realtek/rtl930x/config-6.6
+++ b/target/linux/realtek/rtl930x/config-6.6
@@ -12,6 +12,7 @@ CONFIG_BOARD_SCACHE=y
 CONFIG_CLONE_BACKWARDS=y
 CONFIG_COMMON_CLK=y
 # CONFIG_COMMON_CLK_REALTEK is not set
+CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
 CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
 CONFIG_CPU_BIG_ENDIAN=y
@@ -24,32 +25,40 @@ CONFIG_CPU_MIPS32=y
 # CONFIG_CPU_MIPS32_R1 is not set
 CONFIG_CPU_MIPS32_R2=y
 CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_MITIGATIONS=y
 CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
 CONFIG_CPU_R4K_CACHE_TLB=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_CPU_SUPPORTS_MSA=y
+CONFIG_CRC_CCITT=y
 CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
 CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
-CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_UTILS=y
+CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_8250=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
-CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_FORCE_NR_CPUS=y
+CONFIG_FS_IOMAP=y
+CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
 CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
 CONFIG_GENERIC_ATOMIC64=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_FIND_FIRST_BIT=y
 CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
 CONFIG_GENERIC_IOMAP=y
 CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GENERIC_IRQ_SHOW=y
 CONFIG_GENERIC_LIB_ASHLDI3=y
 CONFIG_GENERIC_LIB_ASHRDI3=y
@@ -71,10 +80,10 @@ CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_REALTEK_OTTO=y
 CONFIG_GPIO_RTL8231=y
 CONFIG_GRO_CELLS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDWARE_WATCHPOINTS=y
 CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HWMON=y
 CONFIG_HZ_PERIODIC=y
@@ -104,7 +113,6 @@ CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_SMBUS=y
-CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -113,14 +121,13 @@ CONFIG_MIPS_ASID_SHIFT=0
 # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
 CONFIG_MIPS_CMDLINE_FROM_DTB=y
 CONFIG_MIPS_CPU_SCACHE=y
-CONFIG_MIPS_EBPF_JIT=y
 CONFIG_MIPS_EXTERNAL_TIMER=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_MIPS_LD_CAN_LINK_VDSO=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_NO_APPENDED_DTB is not set
 CONFIG_MIPS_RAW_APPENDED_DTB=y
 CONFIG_MIPS_SPRAM=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_GEOMETRY=y
@@ -138,12 +145,16 @@ CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_RTL83XX=y
 CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EGRESS=y
+CONFIG_NET_INGRESS=y
 CONFIG_NET_RTL838X=y
 CONFIG_NET_SELFTESTS=y
 CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_XGRESS=y
 CONFIG_NO_EXCEPT_FILL=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
 CONFIG_NVMEM=y
+CONFIG_NVMEM_LAYOUTS=y
 CONFIG_OF=y
 CONFIG_OF_ADDRESS=y
 CONFIG_OF_EARLY_FLATTREE=y
@@ -152,16 +163,22 @@ CONFIG_OF_GPIO=y
 CONFIG_OF_IRQ=y
 CONFIG_OF_KOBJ=y
 CONFIG_OF_MDIO=y
+CONFIG_PAGE_POOL=y
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
 CONFIG_PCI_DRIVERS_LEGACY=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_POWER_RESET_SYSCON=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y
 CONFIG_REALTEK_OTTO_TIMER=y
 CONFIG_REALTEK_OTTO_WDT=y
@@ -181,7 +198,7 @@ CONFIG_SFP=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
-CONFIG_SRCU=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
 CONFIG_SWPHY=y
 CONFIG_SYSCTL_EXCEPTION_TRACE=y
 CONFIG_SYS_HAS_CPU_MIPS32_R1=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:45 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:45 -0500
Subject: [openwrt/openwrt]  realtek: rtl838x: Switch GS1900 rtl8231 driver
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33090.1736257129.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5141e2d8617efa774b64f9ebc6d97cdc85487dc8

commit 5141e2d8617efa774b64f9ebc6d97cdc85487dc8
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Dec 26 22:26:33 2024 +0100

    realtek: rtl838x: Switch GS1900 rtl8231 driver
    
    Update the devicetree files to switch the GS1900 devices over to the new
    pinctrl and GPIO driver. Enable the drivers to ensure the nodes can be
    used.
    
    This may fix issues caused by bad RMW behaviour on the GPIO data lines,
    or glitches due to setting the pin direction before the pin level.
    
    Although the driver supports retaining GPIO state after a warm boot,
    some bootloaders appear to apply a default configuration on boot, which
    may cause an interrupt in PoE-PSE support.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi | 25 ++++++++++++++++++----
 target/linux/realtek/rtl838x/config-6.6            |  7 +++++-
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 3889fe8859..927b9527a9 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -40,18 +40,35 @@
 			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
 		};
 	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	// Reset GPIO is <&gpio0 1 GPIO_ACTIVE_LOW>
+	// Don't specify the reset info so the mdio subsystem doesn't reset the bus
+	//reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+	//reset-delay-us = <1000>;
+	//reset-post-delay-us = <10000>;
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0x0>;
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
 		gpio-controller;
-		indirect-access-bus-id = <0>;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
 
 		poe_enable {
 			gpio-hog;
 			gpios = <13 GPIO_ACTIVE_HIGH>;
 			output-high;
 		};
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };
 
diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index 23f3d9adfb..58c15f7bb0 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -95,6 +95,7 @@ CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
 CONFIG_GPIO_REALTEK_OTTO=y
+CONFIG_GPIO_REGMAP=y
 CONFIG_GPIO_RTL8231=y
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
@@ -122,6 +123,7 @@ CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_JFFS2_ZLIB=y
 CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_RTL8231 is not set
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MACH_REALTEK_RTL=y
@@ -132,7 +134,8 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
-# CONFIG_MFD_RTL8231 is not set
+CONFIG_MFD_CORE=y
+CONFIG_MFD_RTL8231=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -193,6 +196,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_RTL8231=y
 CONFIG_PM_OPP=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
@@ -207,6 +211,7 @@ CONFIG_REALTEK_PHY=y
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MDIO=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RTL838X=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:44 -0500
Subject: [openwrt/openwrt]  realtek: Add pinctrl support for RTL8231
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33091.1736257130.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6ef6014887c393dc07f0349028d93e4fa82e0733

commit 6ef6014887c393dc07f0349028d93e4fa82e0733
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Dec 26 20:55:16 2024 +0100

    realtek: Add pinctrl support for RTL8231
    
    Add pending patches to add RTL8231 support as a MDIO-bus attached
    multi-functional device. This includes subdrivers for the pincontrol and
    GPIO features, as well as the LED matrix support.
    
    Leave the drivers disabled until required by a device.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 ...-regmap-Bypass-cache-for-shadowed-outputs.patch |  56 ++
 ...-gpio-regmap-Use-generic-request-free-ops.patch |  26 +
 .../802-mfd-Add-RTL8231-core-device.patch          | 330 ++++++++++++
 ...-Add-RTL8231-pin-control-and-GPIO-support.patch | 581 +++++++++++++++++++++
 ...s-Add-support-for-RTL8231-LED-scan-matrix.patch | 338 ++++++++++++
 target/linux/realtek/rtl838x/config-6.6            |   1 +
 target/linux/realtek/rtl839x/config-6.6            |   1 +
 target/linux/realtek/rtl930x/config-6.6            |   1 +
 target/linux/realtek/rtl931x/config-6.6            |   1 +
 9 files changed, 1335 insertions(+)

diff --git a/target/linux/realtek/patches-6.6/800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch b/target/linux/realtek/patches-6.6/800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch
new file mode 100644
index 0000000000..b4dbf320b2
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch
@@ -0,0 +1,56 @@
+From b3f79468c90d8770f007d628a1e32b2d5d44a5c2 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Sat, 15 May 2021 11:57:32 +0200
+Subject: [PATCH] gpio: regmap: Bypass cache for shadowed outputs
+
+Some chips have the read-only input and write-only output data registers
+aliased to the same offset, but do not perform direction multiplexing on
+writes. Upon writing the register, this then always updates the output
+value, even when the pin is configured as input. As a result it is not
+safe to perform read-modify-writes on output pins, when other pins are
+still configured as input.
+
+For example, on a bit-banged I2C bus, where the lines are switched
+between out-low and in (with external pull-up)
+
+    OUT(L) IN     OUT(H)
+SCK ....../''''''|''''''
+
+SDA '''''''''\..........
+             ^   ^- SCK switches to direction to OUT, but now has a high
+             |      value, breaking the clock.
+             |
+             \- Perform RMW to update SDA. This reads the current input
+                value for SCK, updates the SDA value and writes back a 1
+                for SCK as well.
+
+If a register is used for both the data input and data output (and is
+not marked as volatile) the driver should ensure the cache is not
+updated on register reads. This ensures proper functioning of writing
+the output register with regmap_update_bits(), which will then use and
+update the cache only on register writes.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/gpio/gpio-regmap.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -74,7 +74,15 @@ static int gpio_regmap_get(struct gpio_c
+ 	if (ret)
+ 		return ret;
+ 
+-	ret = regmap_read(gpio->regmap, reg, &val);
++	/*
++	 * Ensure we don't spoil the register cache with pin input values and
++	 * perform a bypassed read. This way the cache (if any) is only used and
++	 * updated on register writes.
++	 */
++	if (gpio->reg_dat_base == gpio->reg_set_base)
++		ret = regmap_read_bypassed(gpio->regmap, reg, &val);
++	else
++		ret = regmap_read(gpio->regmap, reg, &val);
+ 	if (ret)
+ 		return ret;
+ 
diff --git a/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..a06ba7464a
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,26 @@
+From f21b15dfe254b51f80c552750eb20b1dc752507a Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Mon, 30 Dec 2024 17:59:24 +0100
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+allowing pins to automatically be muxed to their GPIO function when
+requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -270,6 +270,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	chip->label = config->label ?: dev_name(config->parent);
+ 	chip->can_sleep = regmap_might_sleep(config->regmap);
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;
diff --git a/target/linux/realtek/patches-6.6/802-mfd-Add-RTL8231-core-device.patch b/target/linux/realtek/patches-6.6/802-mfd-Add-RTL8231-core-device.patch
new file mode 100644
index 0000000000..df4d4aa143
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/802-mfd-Add-RTL8231-core-device.patch
@@ -0,0 +1,330 @@
+From 4e3455e058d40eb2a7326016494e3c81dc506c33 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Mon, 10 May 2021 18:33:01 +0200
+Subject: [PATCH] mfd: Add RTL8231 core device
+
+The RTL8231 is implemented as an MDIO device, and provides a regmap
+interface for register access by the core and child devices.
+
+The chip can also be a device on an SMI bus, an I2C-like bus by Realtek.
+Since kernel support for SMI is limited, and no real-world SMI
+implementations have been encountered for this device, this is currently
+unimplemented. The use of the regmap interface should make any future
+support relatively straightforward.
+
+After reset, all pins are muxed to GPIO inputs before the pin drivers
+are enabled. This is done to prevent accidental system resets, when a
+pin is connected to the parent SoC's reset line.
+
+To provide different read and write semantics for the GPIO data
+registers, a secondary virtual register range is used to enable separate
+caching properties of pin input and output values.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/mfd/Kconfig         |   9 ++
+ drivers/mfd/Makefile        |   1 +
+ drivers/mfd/rtl8231.c       | 193 ++++++++++++++++++++++++++++++++++++
+ include/linux/mfd/rtl8231.h |  71 +++++++++++++
+ 4 files changed, 274 insertions(+)
+ create mode 100644 drivers/mfd/rtl8231.c
+ create mode 100644 include/linux/mfd/rtl8231.h
+
+--- a/drivers/mfd/Kconfig
++++ b/drivers/mfd/Kconfig
+@@ -1171,6 +1171,15 @@ config MFD_RDC321X
+ 	  southbridge which provides access to GPIOs and Watchdog using the
+ 	  southbridge PCI device configuration space.
+ 
++config MFD_RTL8231
++	tristate "Realtek RTL8231 GPIO and LED expander"
++	select MFD_CORE
++	select REGMAP_MDIO
++	help
++	  Support for the Realtek RTL8231 GPIO and LED expander.
++	  Provides up to 37 GPIOs, 88 LEDs, and one PWM output.
++	  When built as a module, this module will be named rtl8231.
++
+ config MFD_RT4831
+ 	tristate "Richtek RT4831 four channel WLED and Display Bias Voltage"
+ 	depends on I2C
+--- a/drivers/mfd/Makefile
++++ b/drivers/mfd/Makefile
+@@ -240,6 +240,7 @@ obj-$(CONFIG_MFD_HI6421_PMIC)	+= hi6421-
+ obj-$(CONFIG_MFD_HI6421_SPMI)	+= hi6421-spmi-pmic.o
+ obj-$(CONFIG_MFD_HI655X_PMIC)   += hi655x-pmic.o
+ obj-$(CONFIG_MFD_DLN2)		+= dln2.o
++obj-$(CONFIG_MFD_RTL8231)	+= rtl8231.o
+ obj-$(CONFIG_MFD_RT4831)	+= rt4831.o
+ obj-$(CONFIG_MFD_RT5033)	+= rt5033.o
+ obj-$(CONFIG_MFD_RT5120)	+= rt5120.o
+--- /dev/null
++++ b/drivers/mfd/rtl8231.c
+@@ -0,0 +1,193 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++#include <linux/bits.h>
++#include <linux/bitfield.h>
++#include <linux/delay.h>
++#include <linux/gpio/consumer.h>
++#include <linux/mfd/core.h>
++#include <linux/mdio.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/property.h>
++#include <linux/regmap.h>
++
++#include <linux/mfd/rtl8231.h>
++
++static bool rtl8231_volatile_reg(struct device *dev, unsigned int reg)
++{
++	switch (reg) {
++	/*
++	 * Registers with self-clearing bits, strapping pin values.
++	 * Don't mark the data registers as volatile, since we need
++	 * caching for the output values.
++	 */
++	case RTL8231_REG_FUNC0:
++	case RTL8231_REG_FUNC1:
++	case RTL8231_REG_PIN_HI_CFG:
++	case RTL8231_REG_LED_END:
++		return true;
++	default:
++		return false;
++	}
++}
++
++static const struct reg_field RTL8231_FIELD_LED_START = REG_FIELD(RTL8231_REG_FUNC0, 1, 1);
++
++static const struct mfd_cell rtl8231_cells[] = {
++	{
++		.name = "rtl8231-pinctrl",
++	},
++	{
++		.name = "rtl8231-leds",
++		.of_compatible = "realtek,rtl8231-leds",
++	},
++};
++
++static int rtl8231_soft_reset(struct regmap *map)
++{
++	const unsigned int all_pins_mask = GENMASK(RTL8231_BITS_VAL - 1, 0);
++	unsigned int val;
++	int err;
++
++	/* SOFT_RESET bit self-clears when done */
++	regmap_write_bits(map, RTL8231_REG_PIN_HI_CFG,
++		RTL8231_PIN_HI_CFG_SOFT_RESET, RTL8231_PIN_HI_CFG_SOFT_RESET);
++	err = regmap_read_poll_timeout(map, RTL8231_REG_PIN_HI_CFG, val,
++		!(val & RTL8231_PIN_HI_CFG_SOFT_RESET), 50, 1000);
++	if (err)
++		return err;
++
++	regcache_mark_dirty(map);
++
++	/*
++	 * Chip reset results in a pin configuration that is a mix of LED and GPIO outputs.
++	 * Select GPI functionality for all pins before enabling pin outputs.
++	 */
++	regmap_write(map, RTL8231_REG_PIN_MODE0, all_pins_mask);
++	regmap_write(map, RTL8231_REG_GPIO_DIR0, all_pins_mask);
++	regmap_write(map, RTL8231_REG_PIN_MODE1, all_pins_mask);
++	regmap_write(map, RTL8231_REG_GPIO_DIR1, all_pins_mask);
++	regmap_write(map, RTL8231_REG_PIN_HI_CFG,
++		RTL8231_PIN_HI_CFG_MODE_MASK | RTL8231_PIN_HI_CFG_DIR_MASK);
++
++	return 0;
++}
++
++static int rtl8231_init(struct device *dev, struct regmap *map)
++{
++	struct regmap_field *led_start;
++	unsigned int started;
++	unsigned int val;
++	int err;
++
++	err = regmap_read(map, RTL8231_REG_FUNC1, &val);
++	if (err) {
++		dev_err(dev, "failed to read READY_CODE\n");
++		return err;
++	}
++
++	val = FIELD_GET(RTL8231_FUNC1_READY_CODE_MASK, val);
++	if (val != RTL8231_FUNC1_READY_CODE_VALUE) {
++		dev_err(dev, "RTL8231 not present or ready 0x%x != 0x%x\n",
++			val, RTL8231_FUNC1_READY_CODE_VALUE);
++		return -ENODEV;
++	}
++
++	led_start = dev_get_drvdata(dev);
++	err = regmap_field_read(led_start, &started);
++	if (err)
++		return err;
++
++	if (!started) {
++		err = rtl8231_soft_reset(map);
++		if (err)
++			return err;
++		/* LED_START enables power to output pins, and starts the LED engine */
++		err = regmap_field_force_write(led_start, 1);
++	}
++
++	return err;
++}
++
++static const struct regmap_config rtl8231_mdio_regmap_config = {
++	.val_bits = RTL8231_BITS_VAL,
++	.reg_bits = RTL8231_BITS_REG,
++	.volatile_reg = rtl8231_volatile_reg,
++	.max_register = RTL8231_REG_COUNT - 1,
++	.use_single_read = true,
++	.use_single_write = true,
++	.reg_format_endian = REGMAP_ENDIAN_BIG,
++	.val_format_endian = REGMAP_ENDIAN_BIG,
++	/* Cannot use REGCACHE_FLAT because it's not smart enough about cache invalidation  */
++	.cache_type = REGCACHE_RBTREE,
++};
++
++static int rtl8231_mdio_probe(struct mdio_device *mdiodev)
++{
++	struct device *dev = &mdiodev->dev;
++	struct regmap_field *led_start;
++	struct regmap *map;
++	int err;
++
++	map = devm_regmap_init_mdio(mdiodev, &rtl8231_mdio_regmap_config);
++	if (IS_ERR(map)) {
++		dev_err(dev, "failed to init regmap\n");
++		return PTR_ERR(map);
++	}
++
++	led_start = devm_regmap_field_alloc(dev, map, RTL8231_FIELD_LED_START);
++	if (IS_ERR(led_start))
++		return PTR_ERR(led_start);
++
++	dev_set_drvdata(dev, led_start);
++
++	mdiodev->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
++	if (IS_ERR(mdiodev->reset_gpio))
++		return PTR_ERR(mdiodev->reset_gpio);
++
++	device_property_read_u32(dev, "reset-assert-delay", &mdiodev->reset_assert_delay);
++	device_property_read_u32(dev, "reset-deassert-delay", &mdiodev->reset_deassert_delay);
++
++	err = rtl8231_init(dev, map);
++	if (err)
++		return err;
++
++	return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, rtl8231_cells,
++		ARRAY_SIZE(rtl8231_cells), NULL, 0, NULL);
++}
++
++__maybe_unused static int rtl8231_suspend(struct device *dev)
++{
++	struct regmap_field *led_start = dev_get_drvdata(dev);
++
++	return regmap_field_force_write(led_start, 0);
++}
++
++__maybe_unused static int rtl8231_resume(struct device *dev)
++{
++	struct regmap_field *led_start = dev_get_drvdata(dev);
++
++	return regmap_field_force_write(led_start, 1);
++}
++
++static SIMPLE_DEV_PM_OPS(rtl8231_pm_ops, rtl8231_suspend, rtl8231_resume);
++
++static const struct of_device_id rtl8231_of_match[] = {
++	{ .compatible = "realtek,rtl8231" },
++	{}
++};
++MODULE_DEVICE_TABLE(of, rtl8231_of_match);
++
++static struct mdio_driver rtl8231_mdio_driver = {
++	.mdiodrv.driver = {
++		.name = "rtl8231-expander",
++		.of_match_table	= rtl8231_of_match,
++		.pm = pm_ptr(&rtl8231_pm_ops),
++	},
++	.probe = rtl8231_mdio_probe,
++};
++mdio_module_driver(rtl8231_mdio_driver);
++
++MODULE_AUTHOR("Sander Vanheule <sander at svanheule.net>");
++MODULE_DESCRIPTION("Realtek RTL8231 GPIO and LED expander");
++MODULE_LICENSE("GPL");
+--- /dev/null
++++ b/include/linux/mfd/rtl8231.h
+@@ -0,0 +1,71 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++/*
++ * Register definitions the RTL8231 GPIO and LED expander chip
++ */
++
++#ifndef __LINUX_MFD_RTL8231_H
++#define __LINUX_MFD_RTL8231_H
++
++#include <linux/bits.h>
++
++/*
++ * Registers addresses are 5 bit, values are 16 bit
++ * Also define a duplicated range of virtual addresses, to enable
++ * different read/write behaviour on the GPIO data registers
++ */
++#define RTL8231_BITS_VAL		16
++#define RTL8231_BITS_REG		5
++
++/* Chip control */
++#define RTL8231_REG_FUNC0		0x00
++#define RTL8231_FUNC0_SCAN_MODE		BIT(0)
++#define RTL8231_FUNC0_SCAN_SINGLE	0
++#define RTL8231_FUNC0_SCAN_BICOLOR	BIT(0)
++
++#define RTL8231_REG_FUNC1		0x01
++#define RTL8231_FUNC1_READY_CODE_VALUE	0x37
++#define RTL8231_FUNC1_READY_CODE_MASK	GENMASK(9, 4)
++#define RTL8231_FUNC1_DEBOUNCE_MASK	GENMASK(15, 10)
++
++/* Pin control */
++#define RTL8231_REG_PIN_MODE0		0x02
++#define RTL8231_REG_PIN_MODE1		0x03
++
++#define RTL8231_PIN_MODE_LED		0
++#define RTL8231_PIN_MODE_GPIO		1
++
++/* Pin high config: pin and GPIO control for pins 32-26 */
++#define RTL8231_REG_PIN_HI_CFG		0x04
++#define RTL8231_PIN_HI_CFG_MODE_MASK	GENMASK(4, 0)
++#define RTL8231_PIN_HI_CFG_DIR_MASK	GENMASK(9, 5)
++#define RTL8231_PIN_HI_CFG_INV_MASK	GENMASK(14, 10)
++#define RTL8231_PIN_HI_CFG_SOFT_RESET	BIT(15)
++
++/* GPIO control registers */
++#define RTL8231_REG_GPIO_DIR0		0x05
++#define RTL8231_REG_GPIO_DIR1		0x06
++#define RTL8231_REG_GPIO_INVERT0	0x07
++#define RTL8231_REG_GPIO_INVERT1	0x08
++
++#define RTL8231_GPIO_DIR_IN		1
++#define RTL8231_GPIO_DIR_OUT		0
++
++/*
++ * GPIO data registers
++ * Only the output data can be written to these registers, and only the input
++ * data can be read.
++ */
++#define RTL8231_REG_GPIO_DATA0		0x1c
++#define RTL8231_REG_GPIO_DATA1		0x1d
++#define RTL8231_REG_GPIO_DATA2		0x1e
++#define RTL8231_PIN_HI_DATA_MASK	GENMASK(4, 0)
++
++/* LED control base registers */
++#define RTL8231_REG_LED0_BASE		0x09
++#define RTL8231_REG_LED1_BASE		0x10
++#define RTL8231_REG_LED2_BASE		0x17
++#define RTL8231_REG_LED_END		0x1b
++
++#define RTL8231_REG_COUNT		0x1f
++
++#endif /* __LINUX_MFD_RTL8231_H */
diff --git a/target/linux/realtek/patches-6.6/803-pinctrl-Add-RTL8231-pin-control-and-GPIO-support.patch b/target/linux/realtek/patches-6.6/803-pinctrl-Add-RTL8231-pin-control-and-GPIO-support.patch
new file mode 100644
index 0000000000..de0f5ee868
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/803-pinctrl-Add-RTL8231-pin-control-and-GPIO-support.patch
@@ -0,0 +1,581 @@
+From 098324288a63a6dcc44e96cc381aef3d5c48d89e Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Mon, 10 May 2021 22:15:31 +0200
+Subject: [PATCH] pinctrl: Add RTL8231 pin control and GPIO support
+
+This driver implements the GPIO and pin muxing features provided by the
+RTL8231. The device should be instantiated as an MFD child, where the
+parent device has already configured the regmap used for register
+access.
+
+Debouncing is only available for the six highest GPIOs, and must be
+emulated when other pins are used for (button) inputs. Although
+described in the bindings, drive strength selection is currently not
+implemented.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/pinctrl/Kconfig           |  11 +
+ drivers/pinctrl/Makefile          |   1 +
+ drivers/pinctrl/pinctrl-rtl8231.c | 521 ++++++++++++++++++++++++++++++
+ 3 files changed, 533 insertions(+)
+ create mode 100644 drivers/pinctrl/pinctrl-rtl8231.c
+
+--- a/drivers/pinctrl/Kconfig
++++ b/drivers/pinctrl/Kconfig
+@@ -417,6 +417,17 @@ config PINCTRL_ROCKCHIP
+ 	help
+           This support pinctrl and GPIO driver for Rockchip SoCs.
+ 
++config PINCTRL_RTL8231
++	tristate "Realtek RTL8231 GPIO expander's pin controller"
++	depends on MFD_RTL8231
++	default MFD_RTL8231
++	select GPIO_REGMAP
++	select GENERIC_PINCONF
++	select GENERIC_PINMUX_FUNCTIONS
++	help
++	  Support for RTL8231 expander's GPIOs and pin controller.
++	  When built as a module, the module will be called pinctrl-rtl8231.
++
+ config PINCTRL_SINGLE
+ 	tristate "One-register-per-pin type device tree based pinctrl driver"
+ 	depends on OF
+--- a/drivers/pinctrl/Makefile
++++ b/drivers/pinctrl/Makefile
+@@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_PIC32)	+= pinctrl-p
+ obj-$(CONFIG_PINCTRL_PISTACHIO)	+= pinctrl-pistachio.o
+ obj-$(CONFIG_PINCTRL_RK805)	+= pinctrl-rk805.o
+ obj-$(CONFIG_PINCTRL_ROCKCHIP)	+= pinctrl-rockchip.o
++obj-$(CONFIG_PINCTRL_RTL8231)	+= pinctrl-rtl8231.o
+ obj-$(CONFIG_PINCTRL_SINGLE)	+= pinctrl-single.o
+ obj-$(CONFIG_PINCTRL_ST) 	+= pinctrl-st.o
+ obj-$(CONFIG_PINCTRL_STMFX) 	+= pinctrl-stmfx.o
+--- /dev/null
++++ b/drivers/pinctrl/pinctrl-rtl8231.c
+@@ -0,0 +1,525 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++#include <linux/bitfield.h>
++#include <linux/gpio/driver.h>
++#include <linux/gpio/regmap.h>
++#include <linux/module.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++
++#include "core.h"
++#include "pinmux.h"
++#include <linux/mfd/rtl8231.h>
++
++#define RTL8231_NUM_GPIOS		37
++#define RTL8231_DEBOUNCE_USEC		100000
++#define RTL8231_DEBOUNCE_MIN_OFFSET	31
++
++struct rtl8231_pin_ctrl {
++	struct pinctrl_desc pctl_desc;
++	struct regmap *map;
++};
++
++/*
++ * Pin controller functionality
++ */
++static const char * const rtl8231_pin_function_names[] = {
++	"gpio",
++	"led",
++	"pwm",
++};
++
++enum rtl8231_pin_function {
++	RTL8231_PIN_FUNCTION_GPIO = BIT(0),
++	RTL8231_PIN_FUNCTION_LED = BIT(1),
++	RTL8231_PIN_FUNCTION_PWM = BIT(2),
++};
++
++struct rtl8231_pin_desc {
++	const enum rtl8231_pin_function functions;
++	const u8 reg;
++	const u8 offset;
++	const u8 gpio_function_value;
++};
++
++#define RTL8231_PIN_DESC(_num, _func, _reg, _fld, _val)		\
++	[_num] = {						\
++		.functions = RTL8231_PIN_FUNCTION_GPIO | _func,	\
++		.reg = _reg,					\
++		.offset = _fld,					\
++		.gpio_function_value = _val,			\
++	}
++#define RTL8231_GPIO_PIN_DESC(_num, _reg, _fld)			\
++	RTL8231_PIN_DESC(_num, 0, _reg, _fld, RTL8231_PIN_MODE_GPIO)
++#define RTL8231_LED_PIN_DESC(_num, _reg, _fld)			\
++	RTL8231_PIN_DESC(_num, RTL8231_PIN_FUNCTION_LED, _reg, _fld, RTL8231_PIN_MODE_GPIO)
++#define RTL8231_PWM_PIN_DESC(_num, _reg, _fld)			\
++	RTL8231_PIN_DESC(_num, RTL8231_PIN_FUNCTION_PWM, _reg, _fld, 0)
++
++/*
++ * All pins have a GPIO/LED mux bit, but the bits for pins 35/36 are read-only. Use this bit
++ * for the GPIO-only pin instead of a placeholder, so the rest of the logic can stay generic.
++ */
++static struct rtl8231_pin_desc rtl8231_pin_data[RTL8231_NUM_GPIOS] = {
++	RTL8231_LED_PIN_DESC(0, RTL8231_REG_PIN_MODE0, 0),
++	RTL8231_LED_PIN_DESC(1, RTL8231_REG_PIN_MODE0, 1),
++	RTL8231_LED_PIN_DESC(2, RTL8231_REG_PIN_MODE0, 2),
++	RTL8231_LED_PIN_DESC(3, RTL8231_REG_PIN_MODE0, 3),
++	RTL8231_LED_PIN_DESC(4, RTL8231_REG_PIN_MODE0, 4),
++	RTL8231_LED_PIN_DESC(5, RTL8231_REG_PIN_MODE0, 5),
++	RTL8231_LED_PIN_DESC(6, RTL8231_REG_PIN_MODE0, 6),
++	RTL8231_LED_PIN_DESC(7, RTL8231_REG_PIN_MODE0, 7),
++	RTL8231_LED_PIN_DESC(8, RTL8231_REG_PIN_MODE0, 8),
++	RTL8231_LED_PIN_DESC(9, RTL8231_REG_PIN_MODE0, 9),
++	RTL8231_LED_PIN_DESC(10, RTL8231_REG_PIN_MODE0, 10),
++	RTL8231_LED_PIN_DESC(11, RTL8231_REG_PIN_MODE0, 11),
++	RTL8231_LED_PIN_DESC(12, RTL8231_REG_PIN_MODE0, 12),
++	RTL8231_LED_PIN_DESC(13, RTL8231_REG_PIN_MODE0, 13),
++	RTL8231_LED_PIN_DESC(14, RTL8231_REG_PIN_MODE0, 14),
++	RTL8231_LED_PIN_DESC(15, RTL8231_REG_PIN_MODE0, 15),
++	RTL8231_LED_PIN_DESC(16, RTL8231_REG_PIN_MODE1, 0),
++	RTL8231_LED_PIN_DESC(17, RTL8231_REG_PIN_MODE1, 1),
++	RTL8231_LED_PIN_DESC(18, RTL8231_REG_PIN_MODE1, 2),
++	RTL8231_LED_PIN_DESC(19, RTL8231_REG_PIN_MODE1, 3),
++	RTL8231_LED_PIN_DESC(20, RTL8231_REG_PIN_MODE1, 4),
++	RTL8231_LED_PIN_DESC(21, RTL8231_REG_PIN_MODE1, 5),
++	RTL8231_LED_PIN_DESC(22, RTL8231_REG_PIN_MODE1, 6),
++	RTL8231_LED_PIN_DESC(23, RTL8231_REG_PIN_MODE1, 7),
++	RTL8231_LED_PIN_DESC(24, RTL8231_REG_PIN_MODE1, 8),
++	RTL8231_LED_PIN_DESC(25, RTL8231_REG_PIN_MODE1, 9),
++	RTL8231_LED_PIN_DESC(26, RTL8231_REG_PIN_MODE1, 10),
++	RTL8231_LED_PIN_DESC(27, RTL8231_REG_PIN_MODE1, 11),
++	RTL8231_LED_PIN_DESC(28, RTL8231_REG_PIN_MODE1, 12),
++	RTL8231_LED_PIN_DESC(29, RTL8231_REG_PIN_MODE1, 13),
++	RTL8231_LED_PIN_DESC(30, RTL8231_REG_PIN_MODE1, 14),
++	RTL8231_LED_PIN_DESC(31, RTL8231_REG_PIN_MODE1, 15),
++	RTL8231_LED_PIN_DESC(32, RTL8231_REG_PIN_HI_CFG, 0),
++	RTL8231_LED_PIN_DESC(33, RTL8231_REG_PIN_HI_CFG, 1),
++	RTL8231_LED_PIN_DESC(34, RTL8231_REG_PIN_HI_CFG, 2),
++	RTL8231_PWM_PIN_DESC(35, RTL8231_REG_FUNC1, 3),
++	RTL8231_GPIO_PIN_DESC(36, RTL8231_REG_PIN_HI_CFG, 4),
++};
++
++#define RTL8231_PIN(_num)				\
++	{						\
++		.number = _num,				\
++		.name = "gpio" #_num,			\
++		.drv_data = &rtl8231_pin_data[_num]	\
++	}
++
++static const struct pinctrl_pin_desc rtl8231_pins[RTL8231_NUM_GPIOS] = {
++	RTL8231_PIN(0),
++	RTL8231_PIN(1),
++	RTL8231_PIN(2),
++	RTL8231_PIN(3),
++	RTL8231_PIN(4),
++	RTL8231_PIN(5),
++	RTL8231_PIN(6),
++	RTL8231_PIN(7),
++	RTL8231_PIN(8),
++	RTL8231_PIN(9),
++	RTL8231_PIN(10),
++	RTL8231_PIN(11),
++	RTL8231_PIN(12),
++	RTL8231_PIN(13),
++	RTL8231_PIN(14),
++	RTL8231_PIN(15),
++	RTL8231_PIN(16),
++	RTL8231_PIN(17),
++	RTL8231_PIN(18),
++	RTL8231_PIN(19),
++	RTL8231_PIN(20),
++	RTL8231_PIN(21),
++	RTL8231_PIN(22),
++	RTL8231_PIN(23),
++	RTL8231_PIN(24),
++	RTL8231_PIN(25),
++	RTL8231_PIN(26),
++	RTL8231_PIN(27),
++	RTL8231_PIN(28),
++	RTL8231_PIN(29),
++	RTL8231_PIN(30),
++	RTL8231_PIN(31),
++	RTL8231_PIN(32),
++	RTL8231_PIN(33),
++	RTL8231_PIN(34),
++	RTL8231_PIN(35),
++	RTL8231_PIN(36),
++};
++
++static int rtl8231_get_groups_count(struct pinctrl_dev *pctldev)
++{
++	return ARRAY_SIZE(rtl8231_pins);
++}
++
++static const char *rtl8231_get_group_name(struct pinctrl_dev *pctldev, unsigned int selector)
++{
++	return rtl8231_pins[selector].name;
++}
++
++static int rtl8231_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
++	const unsigned int **pins, unsigned int *num_pins)
++{
++	if (selector >= ARRAY_SIZE(rtl8231_pins))
++		return -EINVAL;
++
++	*pins = &rtl8231_pins[selector].number;
++	*num_pins = 1;
++
++	return 0;
++}
++
++static const struct pinctrl_ops rtl8231_pinctrl_ops = {
++	.get_groups_count = rtl8231_get_groups_count,
++	.get_group_name = rtl8231_get_group_name,
++	.get_group_pins = rtl8231_get_group_pins,
++	.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
++	.dt_free_map = pinconf_generic_dt_free_map,
++};
++
++static int rtl8231_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector,
++	unsigned int group_selector)
++{
++	const struct function_desc *func = pinmux_generic_get_function(pctldev, func_selector);
++	const struct rtl8231_pin_desc *desc = rtl8231_pins[group_selector].drv_data;
++	const struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
++	unsigned int func_flag = (uintptr_t) func->data;
++	unsigned int function_mask;
++	unsigned int gpio_function;
++
++	if (!(desc->functions & func_flag))
++		return -EINVAL;
++
++	function_mask = BIT(desc->offset);
++	gpio_function = desc->gpio_function_value << desc->offset;
++
++	if (func_flag == RTL8231_PIN_FUNCTION_GPIO)
++		return regmap_update_bits(ctrl->map, desc->reg, function_mask, gpio_function);
++	else
++		return regmap_update_bits(ctrl->map, desc->reg, function_mask, ~gpio_function);
++}
++
++static int rtl8231_gpio_request_enable(struct pinctrl_dev *pctldev,
++	struct pinctrl_gpio_range *range, unsigned int offset)
++{
++	const struct rtl8231_pin_desc *desc = rtl8231_pins[offset].drv_data;
++	struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
++	unsigned int function_mask;
++	unsigned int gpio_function;
++
++	function_mask = BIT(desc->offset);
++	gpio_function = desc->gpio_function_value << desc->offset;
++
++	return regmap_update_bits(ctrl->map, desc->reg, function_mask, gpio_function);
++}
++
++static const struct pinmux_ops rtl8231_pinmux_ops = {
++	.get_functions_count = pinmux_generic_get_function_count,
++	.get_function_name = pinmux_generic_get_function_name,
++	.get_function_groups = pinmux_generic_get_function_groups,
++	.set_mux = rtl8231_set_mux,
++	.gpio_request_enable = rtl8231_gpio_request_enable,
++	.strict = true,
++};
++
++static int rtl8231_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
++	unsigned long *config)
++{
++	struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
++	unsigned int param = pinconf_to_config_param(*config);
++	unsigned int arg;
++	int err;
++	int v;
++
++	switch (param) {
++	case PIN_CONFIG_INPUT_DEBOUNCE:
++		if (offset < RTL8231_DEBOUNCE_MIN_OFFSET)
++			return -EINVAL;
++
++		err = regmap_read(ctrl->map, RTL8231_REG_FUNC1, &v);
++		if (err)
++			return err;
++
++		v = FIELD_GET(RTL8231_FUNC1_DEBOUNCE_MASK, v);
++		if (v & BIT(offset - RTL8231_DEBOUNCE_MIN_OFFSET))
++			arg = RTL8231_DEBOUNCE_USEC;
++		else
++			arg = 0;
++		break;
++	default:
++		return -ENOTSUPP;
++	}
++
++	*config = pinconf_to_config_packed(param, arg);
++
++	return 0;
++}
++
++static int rtl8231_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
++	unsigned long *configs, unsigned int num_configs)
++{
++	struct rtl8231_pin_ctrl *ctrl = pinctrl_dev_get_drvdata(pctldev);
++	unsigned int param, arg;
++	unsigned int pin_mask;
++	int err;
++	int i;
++
++	for (i = 0; i < num_configs; i++) {
++		param = pinconf_to_config_param(configs[i]);
++		arg = pinconf_to_config_argument(configs[i]);
++
++		switch (param) {
++		case PIN_CONFIG_INPUT_DEBOUNCE:
++			if (offset < RTL8231_DEBOUNCE_MIN_OFFSET)
++				return -EINVAL;
++
++			pin_mask = FIELD_PREP(RTL8231_FUNC1_DEBOUNCE_MASK,
++				BIT(offset - RTL8231_DEBOUNCE_MIN_OFFSET));
++
++			switch (arg) {
++			case 0:
++				err = regmap_update_bits(ctrl->map, RTL8231_REG_FUNC1,
++					pin_mask, 0);
++				break;
++			case RTL8231_DEBOUNCE_USEC:
++				err = regmap_update_bits(ctrl->map, RTL8231_REG_FUNC1,
++					pin_mask, pin_mask);
++				break;
++			default:
++				return -EINVAL;
++			}
++
++			break;
++		default:
++			return -ENOTSUPP;
++		}
++	}
++
++	return err;
++}
++
++static const struct pinconf_ops rtl8231_pinconf_ops = {
++	.is_generic = true,
++	.pin_config_get = rtl8231_pin_config_get,
++	.pin_config_set = rtl8231_pin_config_set,
++};
++
++static int rtl8231_pinctrl_init_functions(struct pinctrl_dev *pctl, struct rtl8231_pin_ctrl *ctrl)
++{
++	const char *function_name;
++	const char **groups;
++	unsigned int f_idx;
++	unsigned int pin;
++	int num_groups;
++	int err;
++
++	for (f_idx = 0; f_idx < ARRAY_SIZE(rtl8231_pin_function_names); f_idx++) {
++		function_name = rtl8231_pin_function_names[f_idx];
++
++		for (pin = 0, num_groups = 0; pin < ctrl->pctl_desc.npins; pin++)
++			if (rtl8231_pin_data[pin].functions & BIT(f_idx))
++				num_groups++;
++
++		groups = devm_kcalloc(pctl->dev, num_groups, sizeof(*groups), GFP_KERNEL);
++		if (!groups)
++			return -ENOMEM;
++
++		for (pin = 0, num_groups = 0; pin < ctrl->pctl_desc.npins; pin++)
++			if (rtl8231_pin_data[pin].functions & BIT(f_idx))
++				groups[num_groups++] = rtl8231_pins[pin].name;
++
++		err = pinmux_generic_add_function(pctl, function_name, groups, num_groups,
++			(void *) BIT(f_idx));
++		if (err < 0)
++			return err;
++	}
++
++	return 0;
++}
++
++struct pin_field_info {
++	const struct reg_field gpio_data;
++	const struct reg_field gpio_dir;
++	const struct reg_field mode;
++};
++
++static const struct pin_field_info pin_fields[] = {
++	{
++		.gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA0, 0, 15),
++		.gpio_dir = REG_FIELD(RTL8231_REG_GPIO_DIR0, 0, 15),
++		.mode = REG_FIELD(RTL8231_REG_PIN_MODE0, 0, 15),
++	},
++	{
++		.gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA1, 0, 15),
++		.gpio_dir = REG_FIELD(RTL8231_REG_GPIO_DIR1, 0, 15),
++		.mode = REG_FIELD(RTL8231_REG_PIN_MODE1, 0, 15),
++	},
++	{
++		.gpio_data = REG_FIELD(RTL8231_REG_GPIO_DATA2, 0, 4),
++		.gpio_dir = REG_FIELD(RTL8231_REG_PIN_HI_CFG, 5, 9),
++		.mode = REG_FIELD(RTL8231_REG_PIN_HI_CFG, 0, 4),
++	},
++};
++
++static int rtl8231_configure_safe(struct device *dev, struct regmap *map)
++{
++	struct regmap_field *field_data;
++	struct regmap_field *field_mode;
++	struct regmap_field *field_dir;
++	unsigned int is_output;
++	unsigned int is_gpio;
++	unsigned int data;
++	unsigned int mode;
++	unsigned int dir;
++	int err;
++
++	for (unsigned int i = 0; i < ARRAY_SIZE(pin_fields); i++) {
++		field_data = devm_regmap_field_alloc(dev, map, pin_fields[i].gpio_data);
++		if (IS_ERR(field_data))
++			return PTR_ERR(field_data);
++
++		field_dir = devm_regmap_field_alloc(dev, map, pin_fields[i].gpio_dir);
++		if (IS_ERR(field_dir))
++			return PTR_ERR(field_dir);
++
++		field_mode = devm_regmap_field_alloc(dev, map, pin_fields[i].mode);
++		if (IS_ERR(field_mode))
++			return PTR_ERR(field_mode);
++
++		/* The register cache is invalid at start-up, so this should read from HW */
++		err = regmap_field_read(field_data, &data);
++		if (err)
++			return err;
++
++		err = regmap_field_read(field_dir, &dir);
++		if (err)
++			return err;
++
++		err = regmap_field_read(field_mode, &mode);
++		if (err)
++			return err;
++
++		/* Write back only the GPIO-out values to fix the cache */
++		data &= ~dir;
++		regmap_field_write(field_data, data);
++
++		/*
++		 * Set every pin that is configured as gpio-output but muxed for the alternative
++		 * (LED) function to gpio-in. That way the pin will be high impedance when it is
++		 * muxed to GPIO, preventing unwanted glitches.
++		 * The pin muxes are left as-is, so there are no signal changes.
++		 */
++		is_gpio = mode;
++		is_output = ~dir;
++		regmap_field_write(field_dir, dir | (~is_gpio & is_output));
++
++		devm_regmap_field_free(dev, field_data);
++		devm_regmap_field_free(dev, field_dir);
++		devm_regmap_field_free(dev, field_mode);
++	}
++
++	return 0;
++}
++
++static int rtl8231_pinctrl_init(struct device *dev, struct rtl8231_pin_ctrl *ctrl)
++{
++	struct pinctrl_dev *pctldev;
++	int err;
++
++	ctrl->pctl_desc.name = "rtl8231-pinctrl";
++	ctrl->pctl_desc.owner = THIS_MODULE;
++	ctrl->pctl_desc.confops = &rtl8231_pinconf_ops;
++	ctrl->pctl_desc.pctlops = &rtl8231_pinctrl_ops;
++	ctrl->pctl_desc.pmxops = &rtl8231_pinmux_ops;
++	ctrl->pctl_desc.npins = ARRAY_SIZE(rtl8231_pins);
++	ctrl->pctl_desc.pins = rtl8231_pins;
++
++	err = devm_pinctrl_register_and_init(dev->parent, &ctrl->pctl_desc, ctrl, &pctldev);
++	if (err) {
++		dev_err(dev, "failed to register pin controller\n");
++		return err;
++	}
++
++	err = rtl8231_pinctrl_init_functions(pctldev, ctrl);
++	if (err)
++		return err;
++
++	err = pinctrl_enable(pctldev);
++	if (err)
++		dev_err(dev, "failed to enable pin controller\n");
++
++	return err;
++}
++
++/*
++ * GPIO controller functionality
++ */
++static int rtl8231_gpio_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base,
++	unsigned int offset, unsigned int *reg, unsigned int *mask)
++{
++	unsigned int pin_mask = BIT(offset % RTL8231_BITS_VAL);
++
++	if (base == RTL8231_REG_GPIO_DATA0 || offset < 32) {
++		*reg = base + offset / RTL8231_BITS_VAL;
++		*mask = pin_mask;
++	} else if (base == RTL8231_REG_GPIO_DIR0) {
++		*reg = RTL8231_REG_PIN_HI_CFG;
++		*mask = FIELD_PREP(RTL8231_PIN_HI_CFG_DIR_MASK, pin_mask);
++	} else {
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static int rtl8231_pinctrl_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct rtl8231_pin_ctrl *ctrl;
++	struct gpio_regmap_config gpio_cfg = {};
++	int err;
++
++	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
++	if (!ctrl)
++		return -ENOMEM;
++
++	ctrl->map = dev_get_regmap(dev->parent, NULL);
++	if (!ctrl->map)
++		return -ENODEV;
++
++	err = rtl8231_configure_safe(dev, ctrl->map);
++	if (err)
++		return err;
++
++	err = rtl8231_pinctrl_init(dev, ctrl);
++	if (err)
++		return err;
++
++	gpio_cfg.regmap = ctrl->map;
++	gpio_cfg.parent = dev->parent;
++	gpio_cfg.ngpio = RTL8231_NUM_GPIOS;
++	gpio_cfg.ngpio_per_reg = RTL8231_BITS_VAL;
++
++	gpio_cfg.reg_dat_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DATA0);
++	gpio_cfg.reg_set_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DATA0);
++	gpio_cfg.reg_dir_in_base = GPIO_REGMAP_ADDR(RTL8231_REG_GPIO_DIR0);
++
++	gpio_cfg.reg_mask_xlate = rtl8231_gpio_reg_mask_xlate;
++
++	return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_cfg));
++}
++
++static struct platform_driver rtl8231_pinctrl_driver = {
++	.driver = {
++		.name = "rtl8231-pinctrl",
++	},
++	.probe = rtl8231_pinctrl_probe,
++};
++module_platform_driver(rtl8231_pinctrl_driver);
++
++MODULE_AUTHOR("Sander Vanheule <sander at svanheule.net>");
++MODULE_DESCRIPTION("Realtek RTL8231 pin control and GPIO support");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/realtek/patches-6.6/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch b/target/linux/realtek/patches-6.6/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch
new file mode 100644
index 0000000000..37542b8230
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/804-leds-Add-support-for-RTL8231-LED-scan-matrix.patch
@@ -0,0 +1,338 @@
+From 6b797a97c007e46d6081fc6f4b41ce8407078605 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Mon, 10 May 2021 22:16:11 +0200
+Subject: [PATCH] leds: Add support for RTL8231 LED scan matrix
+
+Both single and bi-color scanning modes are supported. The driver will
+verify that the addresses are valid for the current mode, before
+registering the LEDs. LEDs can be turned on, off, or toggled at one of
+six predefined rates from 40ms to 1280ms.
+
+Implements a platform device for use as a child device with RTL8231 MFD,
+and uses the parent regmap to access the required registers.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/leds/Kconfig        |  10 ++
+ drivers/leds/Makefile       |   1 +
+ drivers/leds/leds-rtl8231.c | 291 ++++++++++++++++++++++++++++++++++++
+ 3 files changed, 302 insertions(+)
+ create mode 100644 drivers/leds/leds-rtl8231.c
+
+--- a/drivers/leds/Kconfig
++++ b/drivers/leds/Kconfig
+@@ -586,6 +586,16 @@ config LEDS_REGULATOR
+ 	help
+ 	  This option enables support for regulator driven LEDs.
+ 
++config LEDS_RTL8231
++	tristate "RTL8231 LED matrix support"
++	depends on LEDS_CLASS
++	depends on MFD_RTL8231
++	default MFD_RTL8231
++	help
++	  This option enables support for using the LED scanning matrix output
++	  of the RTL8231 GPIO and LED expander chip.
++	  When built as a module, this module will be named leds-rtl8231.
++
+ config LEDS_BD2606MVV
+ 	tristate "LED driver for BD2606MVV"
+ 	depends on LEDS_CLASS
+--- a/drivers/leds/Makefile
++++ b/drivers/leds/Makefile
+@@ -77,6 +77,7 @@ obj-$(CONFIG_LEDS_PM8058)		+= leds-pm805
+ obj-$(CONFIG_LEDS_POWERNV)		+= leds-powernv.o
+ obj-$(CONFIG_LEDS_PWM)			+= leds-pwm.o
+ obj-$(CONFIG_LEDS_REGULATOR)		+= leds-regulator.o
++obj-$(CONFIG_LEDS_RTL8231)		+= leds-rtl8231.o
+ obj-$(CONFIG_LEDS_SC27XX_BLTC)		+= leds-sc27xx-bltc.o
+ obj-$(CONFIG_LEDS_ST1202)		+= leds-st1202.o
+ obj-$(CONFIG_LEDS_SUNFIRE)		+= leds-sunfire.o
+--- /dev/null
++++ b/drivers/leds/leds-rtl8231.c
+@@ -0,0 +1,285 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++#include <linux/device.h>
++#include <linux/leds.h>
++#include <linux/mod_devicetable.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/property.h>
++#include <linux/regmap.h>
++
++#include <linux/mfd/rtl8231.h>
++
++/**
++ * struct led_toggle_rate - description of an LED blinking mode
++ * @interval_ms:	LED toggle rate in milliseconds
++ * @mode:		Register field value used to activate this mode
++ *
++ * For LED hardware accelerated blinking, with equal on and off delay.
++ * Both delays are given by @interval, so the interval at which the LED blinks
++ * (i.e. turn on and off once) is double this value.
++ */
++struct led_toggle_rate {
++	u16 interval_ms;
++	u8 mode;
++};
++
++/**
++ * struct led_modes - description of all LED modes
++ * @toggle_rates:	Array of led_toggle_rate values, sorted by ascending interval
++ * @num_toggle_rates:	Number of elements in @led_toggle_rate
++ * @off:		Register field value to turn LED off
++ * @on:			Register field value to turn LED on
++ */
++struct led_modes {
++	const struct led_toggle_rate *toggle_rates;
++	unsigned int num_toggle_rates;
++	u8 off;
++	u8 on;
++};
++
++struct rtl8231_led {
++	struct led_classdev led;
++	const struct led_modes *modes;
++	struct regmap_field *reg_field;
++};
++#define to_rtl8231_led(_cdev) container_of(_cdev, struct rtl8231_led, led)
++
++#define RTL8231_NUM_LEDS	3
++#define RTL8231_LED_PER_REG	5
++#define RTL8231_BITS_PER_LED	3
++
++static const unsigned int rtl8231_led_port_counts_single[RTL8231_NUM_LEDS] = {32, 32, 24};
++static const unsigned int rtl8231_led_port_counts_bicolor[RTL8231_NUM_LEDS] = {24, 24, 24};
++
++static const unsigned int rtl8231_led_base[RTL8231_NUM_LEDS] = {
++	RTL8231_REG_LED0_BASE,
++	RTL8231_REG_LED1_BASE,
++	RTL8231_REG_LED2_BASE,
++};
++
++#define RTL8231_DEFAULT_TOGGLE_INTERVAL_MS	500
++
++static const struct led_toggle_rate rtl8231_toggle_rates[] = {
++	{  40, 1},
++	{  80, 2},
++	{ 160, 3},
++	{ 320, 4},
++	{ 640, 5},
++	{1280, 6},
++};
++
++static const struct led_modes rtl8231_led_modes = {
++	.off = 0,
++	.on = 7,
++	.num_toggle_rates = ARRAY_SIZE(rtl8231_toggle_rates),
++	.toggle_rates = rtl8231_toggle_rates,
++};
++
++static void rtl8231_led_brightness_set(struct led_classdev *led_cdev,
++	enum led_brightness brightness)
++{
++	struct rtl8231_led *pled = to_rtl8231_led(led_cdev);
++
++	if (brightness)
++		regmap_field_write(pled->reg_field, pled->modes->on);
++	else
++		regmap_field_write(pled->reg_field, pled->modes->off);
++}
++
++static enum led_brightness rtl8231_led_brightness_get(struct led_classdev *led_cdev)
++{
++	struct rtl8231_led *pled = to_rtl8231_led(led_cdev);
++	u32 current_mode = pled->modes->off;
++
++	regmap_field_read(pled->reg_field, &current_mode);
++
++	if (current_mode == pled->modes->off)
++		return LED_OFF;
++	else
++		return LED_ON;
++}
++
++static unsigned int rtl8231_led_current_interval(struct rtl8231_led *pled)
++{
++	unsigned int mode;
++	unsigned int i;
++
++	if (regmap_field_read(pled->reg_field, &mode))
++		return 0;
++
++	for (i = 0; i < pled->modes->num_toggle_rates; i++)
++		if (mode == pled->modes->toggle_rates[i].mode)
++			return pled->modes->toggle_rates[i].interval_ms;
++
++	return 0;
++}
++
++static int rtl8231_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
++	unsigned long *delay_off)
++{
++	struct rtl8231_led *pled = to_rtl8231_led(led_cdev);
++	const struct led_toggle_rate *rates = pled->modes->toggle_rates;
++	unsigned int num_rates = pled->modes->num_toggle_rates;
++	unsigned int interval_ms;
++	unsigned int i;
++	int err;
++
++	if (*delay_on == 0 && *delay_off == 0) {
++		interval_ms = RTL8231_DEFAULT_TOGGLE_INTERVAL_MS;
++	} else {
++		/*
++		 * If the current mode is blinking, choose the delay that (likely) changed.
++		 * Otherwise, choose the interval that would have the same total delay.
++		 */
++		interval_ms = rtl8231_led_current_interval(pled);
++		if (interval_ms > 0 && interval_ms == *delay_off)
++			interval_ms = *delay_on;
++		else if (interval_ms > 0 && interval_ms == *delay_on)
++			interval_ms = *delay_off;
++		else
++			interval_ms = (*delay_on + *delay_off) / 2;
++	}
++
++	/* Find clamped toggle interval */
++	for (i = 0; i < (num_rates - 1); i++)
++		if (interval_ms > rates[i].interval_ms)
++			break;
++
++	interval_ms = rates[i].interval_ms;
++
++	err = regmap_field_write(pled->reg_field, rates[i].mode);
++	if (err)
++		return err;
++
++	*delay_on = interval_ms;
++	*delay_off = interval_ms;
++
++	return 0;
++}
++
++static int rtl8231_led_read_address(struct fwnode_handle *fwnode, unsigned int *addr_port,
++	unsigned int *addr_led)
++{
++	u32 addr[2];
++	int err;
++
++	err = fwnode_property_count_u32(fwnode, "reg");
++	if (err < 0)
++		return err;
++	if (err != ARRAY_SIZE(addr))
++		return -EINVAL;
++
++	err = fwnode_property_read_u32_array(fwnode, "reg", addr, ARRAY_SIZE(addr));
++	if (err)
++		return err;
++
++	*addr_port = addr[0];
++	*addr_led = addr[1];
++
++	return 0;
++}
++
++static const struct regmap_field *rtl8231_led_get_field(struct device *dev, struct regmap *map,
++		unsigned int port_index, unsigned int led_index)
++{
++	unsigned int offset = port_index / RTL8231_LED_PER_REG;
++	unsigned int shift = (port_index % RTL8231_LED_PER_REG) * RTL8231_BITS_PER_LED;
++	const struct reg_field field = REG_FIELD(rtl8231_led_base[led_index] + offset, shift,
++			shift + RTL8231_BITS_PER_LED - 1);
++
++	return devm_regmap_field_alloc(dev, map, field);
++}
++
++static int rtl8231_led_probe_single(struct device *dev, struct regmap *map,
++	const unsigned int *port_counts, struct fwnode_handle *fwnode)
++{
++	struct led_init_data init_data = {};
++	struct rtl8231_led *pled;
++	unsigned int port_index;
++	unsigned int led_index;
++	int err;
++
++	pled = devm_kzalloc(dev, sizeof(*pled), GFP_KERNEL);
++	if (!pled)
++		return -ENOMEM;
++
++	err = rtl8231_led_read_address(fwnode, &port_index, &led_index);
++	if (err) {
++		dev_err(dev, "LED address invalid");
++		return err;
++	}
++
++	if (led_index >= RTL8231_NUM_LEDS || port_index >= port_counts[led_index]) {
++		dev_err(dev, "LED address (%d.%d) invalid", port_index, led_index);
++		return -EINVAL;
++	}
++
++	pled->reg_field = rtl8231_led_get_field(dev, map, port_index, led_index);
++	if (IS_ERR(pled->reg_field))
++		return PTR_ERR(pled->reg_field);
++
++	pled->modes = &rtl8231_led_modes;
++
++	pled->led.max_brightness = 1;
++	pled->led.brightness_get = rtl8231_led_brightness_get;
++	pled->led.brightness_set = rtl8231_led_brightness_set;
++	pled->led.blink_set = rtl8231_led_blink_set;
++
++	init_data.fwnode = fwnode;
++
++	return devm_led_classdev_register_ext(dev, &pled->led, &init_data);
++}
++
++static int rtl8231_led_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	const unsigned int *port_counts;
++	struct fwnode_handle *child;
++	struct regmap *map;
++	int err;
++
++	map = dev_get_regmap(dev->parent, NULL);
++	if (!map)
++		return -ENODEV;
++
++	if (device_property_match_string(dev, "realtek,led-scan-mode", "single-color") >= 0) {
++		port_counts = rtl8231_led_port_counts_single;
++		regmap_update_bits(map, RTL8231_REG_FUNC0,
++			RTL8231_FUNC0_SCAN_MODE, RTL8231_FUNC0_SCAN_SINGLE);
++	} else if (device_property_match_string(dev, "realtek,led-scan-mode", "bi-color") >= 0) {
++		port_counts = rtl8231_led_port_counts_bicolor;
++		regmap_update_bits(map, RTL8231_REG_FUNC0,
++			RTL8231_FUNC0_SCAN_MODE, RTL8231_FUNC0_SCAN_BICOLOR);
++	} else {
++		dev_err(dev, "scan mode missing or invalid");
++		return -EINVAL;
++	}
++
++	fwnode_for_each_available_child_node(dev->fwnode, child) {
++		err = rtl8231_led_probe_single(dev, map, port_counts, child);
++		if (err)
++			dev_warn(dev, "failed to register LED %pfwP", child);
++	}
++
++	return 0;
++}
++
++static const struct of_device_id of_rtl8231_led_match[] = {
++	{ .compatible = "realtek,rtl8231-leds" },
++	{}
++};
++MODULE_DEVICE_TABLE(of, of_rtl8231_led_match);
++
++static struct platform_driver rtl8231_led_driver = {
++	.driver = {
++		.name = "rtl8231-leds",
++		.of_match_table = of_rtl8231_led_match,
++	},
++	.probe = rtl8231_led_probe,
++};
++module_platform_driver(rtl8231_led_driver);
++
++MODULE_AUTHOR("Sander Vanheule <sander at svanheule.net>");
++MODULE_DESCRIPTION("Realtek RTL8231 LED support");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index 9364888e47..23f3d9adfb 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -132,6 +132,7 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
+# CONFIG_MFD_RTL8231 is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6
index ebf473db61..2616286a17 100644
--- a/target/linux/realtek/rtl839x/config-6.6
+++ b/target/linux/realtek/rtl839x/config-6.6
@@ -132,6 +132,7 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 # CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
+# CONFIG_MFD_RTL8231 is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
diff --git a/target/linux/realtek/rtl930x/config-6.6 b/target/linux/realtek/rtl930x/config-6.6
index 35d088fe08..5b070a8371 100644
--- a/target/linux/realtek/rtl930x/config-6.6
+++ b/target/linux/realtek/rtl930x/config-6.6
@@ -114,6 +114,7 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 # CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
+# CONFIG_MFD_RTL8231 is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
diff --git a/target/linux/realtek/rtl931x/config-6.6 b/target/linux/realtek/rtl931x/config-6.6
index d843382f51..716d805e51 100644
--- a/target/linux/realtek/rtl931x/config-6.6
+++ b/target/linux/realtek/rtl931x/config-6.6
@@ -122,6 +122,7 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 # CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
+# CONFIG_MFD_RTL8231 is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y



From lede-commits at lists.infradead.org  Tue Jan  7 05:38:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 08:38:42 -0500
Subject: [openwrt/openwrt]  realtek: Add driver for auxiliary MDIO busses
In-Reply-To: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
References: <173625711837.1557649.13467186197324827918@git-01.infra.openwrt.org>
Message-ID: <mailman.33094.1736257130.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ae833c01b312258c27ff2dc1c8d44b15b7028e32

commit ae833c01b312258c27ff2dc1c8d44b15b7028e32
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Dec 27 15:53:23 2024 +0100

    realtek: Add driver for auxiliary MDIO busses
    
    Add a driver that exposes the auxiliary busses, used for the RTL8231
    expanders, as a proper MDIO controller. The device must be instantiated
    under an MFD device, so the driver should also be compatible with SoC
    managed by an external CPU via SPI.
    
    Leave the driver disabled in builds until required.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 ...dio-Add-Realtek-Otto-auxiliary-controller.patch | 193 +++++++++++++++++++++
 target/linux/realtek/rtl838x/config-6.6            |   1 +
 target/linux/realtek/rtl839x/config-6.6            |   1 +
 target/linux/realtek/rtl930x/config-6.6            |   1 +
 target/linux/realtek/rtl931x/config-6.6            |   1 +
 5 files changed, 197 insertions(+)

diff --git a/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
new file mode 100644
index 0000000000..430f8f5c00
--- /dev/null
+++ b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
@@ -0,0 +1,193 @@
+From c7ddb74c981c1a29bad82d555d08724aca93b687 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Fri, 27 Dec 2024 14:55:31 +0100
+Subject: [PATCH] net: mdio: Add Realtek Otto auxiliary controller
+
+SoCs in Realtek's Otto platform such as the RTL8380 and RTL8391 have a
+simple auxiliary MDIO controller that is commonly used to manage RTL8231
+GPIO expanders on switch devices.
+
+Add a new MDIO controller driver supporting the RTL838x (maple) and
+RTL839x (cypress) SoCs.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+---
+ drivers/net/mdio/Kconfig                 |  10 ++
+ drivers/net/mdio/Makefile                |   1 +
+ drivers/net/mdio/mdio-realtek-otto-aux.c | 129 +++++++++++++++++++++++
+ 3 files changed, 140 insertions(+)
+ create mode 100644 drivers/net/mdio/mdio-realtek-otto-aux.c
+
+--- a/drivers/net/mdio/Kconfig
++++ b/drivers/net/mdio/Kconfig
+@@ -207,6 +207,16 @@ config MDIO_REGMAP
+ 	  regmap. Users willing to use this driver must explicitly select
+ 	  REGMAP.
+ 
++config MDIO_REALTEK_OTTO_AUX
++	tristate "Realtek Otto auxiliary MDIO interface support"
++	default MACH_REALTEK_RTL
++	depends on MACH_REALTEK_RTL
++	depends on MFD_SYSCON
++	select MDIO_DEVRES
++	help
++	  This driver supports the auxilairy MDIO bus on RTL838x SoCs. This bus
++	  is typically used to attach RTL8231 GPIO extenders.
++
+ config MDIO_THUNDER
+ 	tristate "ThunderX SOCs MDIO buses"
+ 	depends on 64BIT
+--- a/drivers/net/mdio/Makefile
++++ b/drivers/net/mdio/Makefile
+@@ -20,6 +20,7 @@ obj-$(CONFIG_MDIO_MSCC_MIIM)		+= mdio-ms
+ obj-$(CONFIG_MDIO_MVUSB)		+= mdio-mvusb.o
+ obj-$(CONFIG_MDIO_OCTEON)		+= mdio-octeon.o
+ obj-$(CONFIG_MDIO_REGMAP)		+= mdio-regmap.o
++obj-$(CONFIG_MDIO_REALTEK_OTTO_AUX)	+= mdio-realtek-otto-aux.o
+ obj-$(CONFIG_MDIO_SMBUS)		+= mdio-smbus.o
+ obj-$(CONFIG_MDIO_SUN4I)		+= mdio-sun4i.o
+ obj-$(CONFIG_MDIO_THUNDER)		+= mdio-thunder.o
+--- /dev/null
++++ b/drivers/net/mdio/mdio-realtek-otto-aux.c
+@@ -0,0 +1,141 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++
++#include <linux/mfd/core.h>
++#include <linux/mfd/syscon.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_mdio.h>
++#include <linux/of_platform.h>
++#include <linux/phy.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++
++#define RTL8380_EXT_GPIO_INDIRECT_ACCESS	0xA09C
++#define RTL8390_EXT_GPIO_INDIRECT_ACCESS	0x0224
++
++#define RTL83XX_AUX_MDIO_DATA			GENMASK(31, 16)
++#define RTL83XX_AUX_MDIO_REG			GENMASK(11, 7)
++#define RTL83XX_AUX_MDIO_PHY_ADDR		GENMASK(6, 2)
++#define RTL83XX_AUX_MDIO_WRITE			BIT(1)
++#define RTL83XX_AUX_MDIO_READ			0
++#define RTL83XX_AUX_MDIO_EXEC			BIT(0)
++
++struct realtek_aux_mdio_ctrl {
++	struct device *dev;
++	struct regmap *map;
++	unsigned int cmd_reg;
++};
++
++#define mii_bus_to_ctrl(bus)	((struct realtek_aux_mdio_ctrl *) bus->priv)
++
++static int rtl83xx_aux_mdio_cmd(struct realtek_aux_mdio_ctrl *ctrl, int addr, int regnum,
++		u32 rw_bit, u16 *data)
++{
++	unsigned int mask_volatile;
++	unsigned int cmd;
++	unsigned int run;
++	int err;
++
++	cmd = rw_bit | RTL83XX_AUX_MDIO_EXEC;
++	cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_PHY_ADDR, addr);
++	cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_REG, regnum);
++
++	mask_volatile = RTL83XX_AUX_MDIO_EXEC;
++
++	if (rw_bit == RTL83XX_AUX_MDIO_WRITE)
++		cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_DATA, *data);
++	else
++		mask_volatile |= RTL83XX_AUX_MDIO_DATA;
++
++	err = regmap_write(ctrl->map, ctrl->cmd_reg, cmd);
++	if (err)
++		return err;
++
++	err = regmap_read_poll_timeout(ctrl->map, ctrl->cmd_reg, run, (run != cmd), 3, 100);
++
++	if ((run & ~mask_volatile) != (cmd & ~mask_volatile)) {
++		dev_err(ctrl->dev, "Command modified. Is offloading still active?");
++		return -EIO;
++	}
++
++	if (!err && (rw_bit == RTL83XX_AUX_MDIO_READ))
++		*data = FIELD_GET(RTL83XX_AUX_MDIO_DATA, run);
++
++	return err;
++}
++
++static int rtl83xx_aux_mdio_read(struct mii_bus *bus, int addr, int regnum)
++{
++	struct realtek_aux_mdio_ctrl *ctrl = mii_bus_to_ctrl(bus);
++	u16 data;
++	int err;
++
++	err = rtl83xx_aux_mdio_cmd(ctrl, addr, regnum, RTL83XX_AUX_MDIO_READ, &data);
++
++	if (err)
++		return err;
++	else
++		return data;
++}
++
++static int rtl83xx_aux_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
++{
++	struct realtek_aux_mdio_ctrl *ctrl = mii_bus_to_ctrl(bus);
++
++	return rtl83xx_aux_mdio_cmd(ctrl, addr, regnum, RTL83XX_AUX_MDIO_WRITE, &val);
++}
++
++static int realtek_aux_mdio_probe(struct platform_device *pdev)
++{
++	struct device_node *np = pdev->dev.of_node;
++	struct realtek_aux_mdio_ctrl *ctrl;
++	struct mii_bus *bus;
++
++	bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*ctrl));
++	if (!bus)
++		return -ENOMEM;
++
++	ctrl = bus->priv;
++	ctrl->dev = &pdev->dev;
++	ctrl->cmd_reg = (unsigned int) device_get_match_data(ctrl->dev);
++	ctrl->map = syscon_node_to_regmap(np->parent);
++	if (IS_ERR(ctrl->map))
++		return PTR_ERR(ctrl->map);
++
++	bus->name = "RTL83xx auxiliary MDIO bus";
++	snprintf(bus->id, MII_BUS_ID_SIZE, "rtl83xx-aux-mdio") ;
++	bus->parent = ctrl->dev;
++	bus->read = rtl83xx_aux_mdio_read;
++	bus->write = rtl83xx_aux_mdio_write;
++	/* Don't have interrupts */
++	for (unsigned int i = 0; i < PHY_MAX_ADDR; i++)
++		bus->irq[i] = PHY_POLL;
++
++	return devm_of_mdiobus_register(ctrl->dev, bus, np);
++}
++
++static const struct of_device_id realtek_aux_mdio_of_match[] = {
++	{
++		.compatible = "realtek,rtl8380-aux-mdio",
++		.data = (void *) RTL8380_EXT_GPIO_INDIRECT_ACCESS,
++	},
++	{
++		.compatible = "realtek,rtl8390-aux-mdio",
++		.data = (void *) RTL8390_EXT_GPIO_INDIRECT_ACCESS,
++	},
++	{ /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, realtek_aux_mdio_of_match);
++
++static struct platform_driver realtek_aux_mdio_driver = {
++	.driver = {
++		.name = "realtek-otto-aux-mdio",
++		.of_match_table = realtek_aux_mdio_of_match
++	},
++	.probe = realtek_aux_mdio_probe,
++};
++module_platform_driver(realtek_aux_mdio_driver);
++
++MODULE_AUTHOR("Sander Vanheule <sander at svanheule.net>");
++MODULE_DESCRIPTION("Realtek RTL83xx auxiliary MDIO bus");
++MODULE_LICENSE("GPL v2");
diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index a190a69ec6..6cceded5af 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -130,6 +130,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
+# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6
index 53a167e8f7..ebf473db61 100644
--- a/target/linux/realtek/rtl839x/config-6.6
+++ b/target/linux/realtek/rtl839x/config-6.6
@@ -130,6 +130,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
+# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
diff --git a/target/linux/realtek/rtl930x/config-6.6 b/target/linux/realtek/rtl930x/config-6.6
index a6a23ebcff..35d088fe08 100644
--- a/target/linux/realtek/rtl930x/config-6.6
+++ b/target/linux/realtek/rtl930x/config-6.6
@@ -112,6 +112,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
+# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
diff --git a/target/linux/realtek/rtl931x/config-6.6 b/target/linux/realtek/rtl931x/config-6.6
index 9d332cee27..d843382f51 100644
--- a/target/linux/realtek/rtl931x/config-6.6
+++ b/target/linux/realtek/rtl931x/config-6.6
@@ -120,6 +120,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
+# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
 CONFIG_MDIO_SMBUS=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y



From lede-commits at lists.infradead.org  Tue Jan  7 19:41:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 07 Jan 2025 22:41:58 -0500
Subject: [openwrt/openwrt]  wifi-scripts: allow per-IF mesh basic rate
 selection
In-Reply-To: <173630771817.2954319.13996087814575706877@git-01.infra.openwrt.org>
References: <173630771817.2954319.13996087814575706877@git-01.infra.openwrt.org>
Message-ID: <mailman.33705.1736307724.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3deeb7805f69f54b9ab20c0e12f8dd916fec4de1

commit 3deeb7805f69f54b9ab20c0e12f8dd916fec4de1
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Tue Jan 7 11:43:36 2025 +0100

    wifi-scripts: allow per-IF mesh basic rate selection
    
    Bringing up a mesh interface using wpa_supplicant already supports a
    per-VIF basic rate selection. Add the same ability when creating a mesh
    VIF without wpa_supplicant.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh     | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 52c36a8c92..b4aa19bf52 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -844,13 +844,19 @@ mac80211_setup_adhoc() {
 
 mac80211_setup_mesh() {
 	json_get_vars ssid mesh_id mcast_rate
+	json_get_values iface_basic_rate_list basic_rate
 
 	mcval=
 	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
 	[ -n "$mesh_id" ] && ssid="$mesh_id"
 
+	br_list="$basic_rate_list"
+	if [ -n "$iface_basic_rate_list" ]; then
+		br_list="$iface_basic_rate_list"
+	fi
+
 	brstr=
-	for br in $basic_rate_list; do
+	for br in $br_list; do
 		wpa_supplicant_add_rate brstr "$br"
 	done
 



From lede-commits at lists.infradead.org  Wed Jan  8 05:55:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 08 Jan 2025 08:55:32 -0500
Subject: [openwrt/openwrt]  ath79: remove dr_mode and vbus-supply
In-Reply-To: <173634453224.4187731.15840923216231744112@git-01.infra.openwrt.org>
References: <173634453224.4187731.15840923216231744112@git-01.infra.openwrt.org>
Message-ID: <mailman.34373.1736344540.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4abd81968395ddf1a4b1db1324c6e0da10be1321

commit 4abd81968395ddf1a4b1db1324c6e0da10be1321
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Sat Jan 4 18:49:14 2025 -0800

    ath79: remove dr_mode and vbus-supply
    
    ath79 uses the generic-ehci driver, which does not support regulators
    using vbus-supply.
    
    dr_mode is also not useful as the driver does not support multiple
    modes.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17486
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/ath79/dts/ar9344_nec_aterm.dtsi           |  2 --
 target/linux/ath79/dts/ar9344_qihoo_c301.dts           |  4 ++--
 target/linux/ath79/dts/qca9531_8dev_carambola3.dts     |  2 --
 target/linux/ath79/dts/qca9531_8dev_lima.dts           |  2 --
 target/linux/ath79/dts/qca9531_alcatel_hh40v.dts       |  2 --
 target/linux/ath79/dts/qca9531_tplink_tl-wr810n-v1.dts |  2 --
 target/linux/ath79/dts/qca953x.dtsi                    |  1 -
 target/linux/ath79/dts/qca9558_aruba_ap-115.dts        |  1 -
 target/linux/ath79/dts/qca9558_nec_aterm.dtsi          |  2 --
 target/linux/ath79/dts/qca9558_sophos_ap.dtsi          |  4 ----
 target/linux/ath79/dts/qca9558_sophos_ap100.dts        |  1 -
 target/linux/ath79/dts/qca9558_sophos_ap55.dts         |  1 -
 target/linux/ath79/dts/qca9558_tplink_archer-d7.dtsi   |  4 ----
 target/linux/ath79/dts/qca955x_elecom_wab.dtsi         | 12 +-----------
 14 files changed, 3 insertions(+), 37 deletions(-)

diff --git a/target/linux/ath79/dts/ar9344_nec_aterm.dtsi b/target/linux/ath79/dts/ar9344_nec_aterm.dtsi
index dfe2b064b7..ba1cd41b8e 100644
--- a/target/linux/ath79/dts/ar9344_nec_aterm.dtsi
+++ b/target/linux/ath79/dts/ar9344_nec_aterm.dtsi
@@ -281,8 +281,6 @@
 	#address-cells = <1>;
 	#size-cells = <0>;
 
-	dr_mode = "host";
-
 	/delete-node/ port at 1;
 
 	/* NEC uPD720114 */
diff --git a/target/linux/ath79/dts/ar9344_qihoo_c301.dts b/target/linux/ath79/dts/ar9344_qihoo_c301.dts
index 0e9104dbb9..a63c8bc4d9 100644
--- a/target/linux/ath79/dts/ar9344_qihoo_c301.dts
+++ b/target/linux/ath79/dts/ar9344_qihoo_c301.dts
@@ -59,8 +59,9 @@
 		regulator-name = "usb_vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-		enable-active-high;
+		regulator-always-on;
 		gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
 	};
 };
 
@@ -208,7 +209,6 @@
 
 &usb_phy {
 	status = "okay";
-	phy-supply = <&usb_vbus>;
 };
 
 &pcie {
diff --git a/target/linux/ath79/dts/qca9531_8dev_carambola3.dts b/target/linux/ath79/dts/qca9531_8dev_carambola3.dts
index a1149aeaeb..a740999af6 100644
--- a/target/linux/ath79/dts/qca9531_8dev_carambola3.dts
+++ b/target/linux/ath79/dts/qca9531_8dev_carambola3.dts
@@ -35,8 +35,6 @@
 
 &usb0 {
 	status = "okay";
-
-	dr_mode = "host";
 };
 
 &usb_phy {
diff --git a/target/linux/ath79/dts/qca9531_8dev_lima.dts b/target/linux/ath79/dts/qca9531_8dev_lima.dts
index 884d1a588e..22d80a7d6f 100644
--- a/target/linux/ath79/dts/qca9531_8dev_lima.dts
+++ b/target/linux/ath79/dts/qca9531_8dev_lima.dts
@@ -26,8 +26,6 @@
 
 &usb0 {
 	status = "okay";
-
-	dr_mode = "host";
 };
 
 &usb_phy {
diff --git a/target/linux/ath79/dts/qca9531_alcatel_hh40v.dts b/target/linux/ath79/dts/qca9531_alcatel_hh40v.dts
index 16ba785a23..800d32611d 100644
--- a/target/linux/ath79/dts/qca9531_alcatel_hh40v.dts
+++ b/target/linux/ath79/dts/qca9531_alcatel_hh40v.dts
@@ -74,8 +74,6 @@
 
 &usb0 {
 	status = "okay";
-
-	dr_mode = "host";
 };
 
 &usb_phy {
diff --git a/target/linux/ath79/dts/qca9531_tplink_tl-wr810n-v1.dts b/target/linux/ath79/dts/qca9531_tplink_tl-wr810n-v1.dts
index 6f96b61392..127b1ad358 100644
--- a/target/linux/ath79/dts/qca9531_tplink_tl-wr810n-v1.dts
+++ b/target/linux/ath79/dts/qca9531_tplink_tl-wr810n-v1.dts
@@ -19,8 +19,6 @@
 
 &usb0 {
 	status = "okay";
-
-	vbus-supply = <&reg_usb_vbus>;
 };
 
 &usb_phy {
diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi
index 0e982016f4..782b0949ca 100644
--- a/target/linux/ath79/dts/qca953x.dtsi
+++ b/target/linux/ath79/dts/qca953x.dtsi
@@ -193,7 +193,6 @@
 
 			interrupts = <3>;
 			resets = <&rst 5>;
-			dr_mode = "host";
 
 			has-transaction-translator;
 			caps-offset = <0x100>;
diff --git a/target/linux/ath79/dts/qca9558_aruba_ap-115.dts b/target/linux/ath79/dts/qca9558_aruba_ap-115.dts
index 7a59bda6eb..8f6cb71724 100644
--- a/target/linux/ath79/dts/qca9558_aruba_ap-115.dts
+++ b/target/linux/ath79/dts/qca9558_aruba_ap-115.dts
@@ -243,6 +243,5 @@
 };
 
 &usb0 {
-	dr_mode = "host";
 	status = "okay";
 };
diff --git a/target/linux/ath79/dts/qca9558_nec_aterm.dtsi b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi
index 76d39c2ee7..441d906f44 100644
--- a/target/linux/ath79/dts/qca9558_nec_aterm.dtsi
+++ b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi
@@ -352,8 +352,6 @@
 	#address-cells = <1>;
 	#size-cells = <0>;
 
-	dr_mode = "host";
-
 	/delete-node/ port at 1;
 
 	/* NEC uPD720114 */
diff --git a/target/linux/ath79/dts/qca9558_sophos_ap.dtsi b/target/linux/ath79/dts/qca9558_sophos_ap.dtsi
index 744871a931..965ce351c9 100644
--- a/target/linux/ath79/dts/qca9558_sophos_ap.dtsi
+++ b/target/linux/ath79/dts/qca9558_sophos_ap.dtsi
@@ -191,7 +191,3 @@
 	nvmem-cells = <&cal_art_1000>;
 	nvmem-cell-names = "calibration";
 };
-
-&usb0 {
-	vbus-supply = <&reg_usb_vbus>;
-};
diff --git a/target/linux/ath79/dts/qca9558_sophos_ap100.dts b/target/linux/ath79/dts/qca9558_sophos_ap100.dts
index 50ed5fbfba..ebd82ebd79 100644
--- a/target/linux/ath79/dts/qca9558_sophos_ap100.dts
+++ b/target/linux/ath79/dts/qca9558_sophos_ap100.dts
@@ -17,5 +17,4 @@
 
 &usb0 {
 	status = "okay";
-	dr_mode = "host";
 };
diff --git a/target/linux/ath79/dts/qca9558_sophos_ap55.dts b/target/linux/ath79/dts/qca9558_sophos_ap55.dts
index 9a3fd61c93..2259360deb 100644
--- a/target/linux/ath79/dts/qca9558_sophos_ap55.dts
+++ b/target/linux/ath79/dts/qca9558_sophos_ap55.dts
@@ -17,5 +17,4 @@
 
 &usb0 {
 	status = "okay";
-	dr_mode = "host";
 };
diff --git a/target/linux/ath79/dts/qca9558_tplink_archer-d7.dtsi b/target/linux/ath79/dts/qca9558_tplink_archer-d7.dtsi
index b4f32b9fc7..b7fc212d8e 100644
--- a/target/linux/ath79/dts/qca9558_tplink_archer-d7.dtsi
+++ b/target/linux/ath79/dts/qca9558_tplink_archer-d7.dtsi
@@ -145,8 +145,6 @@
 };
 
 &usb0 {
-	dr_mode = "host";
-	vbus-supply = <&reg_usb0_vbus>;
 	status = "okay";
 };
 
@@ -155,7 +153,5 @@
 };
 
 &usb1 {
-	dr_mode = "host";
-	vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
 };
diff --git a/target/linux/ath79/dts/qca955x_elecom_wab.dtsi b/target/linux/ath79/dts/qca955x_elecom_wab.dtsi
index 43e34c6029..3d16d4aa70 100644
--- a/target/linux/ath79/dts/qca955x_elecom_wab.dtsi
+++ b/target/linux/ath79/dts/qca955x_elecom_wab.dtsi
@@ -34,7 +34,7 @@
 			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_USB;
-			trigger-sources = <&usb_port1>;
+			trigger-sources = <&hub_port0>;
 			linux,default-trigger = "usbport";
 		};
 	};
@@ -232,17 +232,7 @@
 };
 
 &usb0 {
-	#address-cells = <1>;
-	#size-cells = <0>;
 	status = "okay";
-
-	dr_mode = "host";
-	vbus-supply = <&reg_usb_vbus>;
-
-	usb_port1: port at 1 {
-		reg = <1>;
-		#trigger-source-cells = <0>;
-	};
 };
 
 &wdt {



From lede-commits at lists.infradead.org  Wed Jan  8 10:40:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 08 Jan 2025 13:40:31 -0500
Subject: [openwrt/openwrt]  generic: move gpio-regmap request/free ops patch
 from realtek
In-Reply-To: <173636163171.509853.3835771398317971943@git-01.infra.openwrt.org>
References: <173636163171.509853.3835771398317971943@git-01.infra.openwrt.org>
Message-ID: <mailman.34586.1736361691.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f5b1d340be9488af71e6522c3f10f1ebd1a35446

commit f5b1d340be9488af71e6522c3f10f1ebd1a35446
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 8 17:56:16 2025 +0100

    generic: move gpio-regmap request/free ops patch from realtek
    
    This patch is also needed on bmips since it fixes issues with GPIOs not being
    properly configured due to gpio_request_enable not being called on bcm63xx
    devices. Therefore we can now drop the bcm63268 gpio function patch.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 .../110-pinctrl-bcm63268-add-gpio-function.patch   | 260 ---------------------
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 +++++++++++
 ...-gpio-regmap-Use-generic-request-free-ops.patch |  26 ---
 3 files changed, 131 insertions(+), 286 deletions(-)

diff --git a/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch b/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch
deleted file mode 100644
index afd4aa8716..0000000000
--- a/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch
+++ /dev/null
@@ -1,260 +0,0 @@
-From patchwork Tue Dec 24 10:36:45 2024
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-MIME-Version: 1.0
-Content-Transfer-Encoding: 8bit
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- <noltari at gmail.com>
-X-Patchwork-Id: 2027352
-Return-Path: 
- <linux-gpio+bounces-14196-incoming=patchwork.ozlabs.org at vger.kernel.org>
-X-Original-To: incoming at patchwork.ozlabs.org
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-Authentication-Results: legolas.ozlabs.org;
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-From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>
-To: linus.walleij at linaro.org,
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-Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>
-Subject: [PATCH v2] pinctrl: bcm63268: add gpio function
-Date: Tue, 24 Dec 2024 11:36:45 +0100
-Message-Id: <20241224103645.1709996-1-noltari at gmail.com>
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-
-From: Kyle Hendry <kylehendrydev at gmail.com>
-
-There is no guarantee that the bootloader will leave the pin configuration
-in a known default state, so pinctrl needs to be explicitly set in some
-cases. This patch adds a gpio function for drivers that need it, i.e.
-gpio-leds.
-
-Signed-off-by: Kyle Hendry <kylehendrydev at gmail.com>
-Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
----
- drivers/pinctrl/bcm/pinctrl-bcm63268.c | 71 +++++++++++++++++++++++++-
- 1 file changed, 70 insertions(+), 1 deletion(-)
-
---- a/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-+++ b/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-@@ -34,6 +34,7 @@
- #define  BCM63268_BASEMODE_VDSL_PHY_3	BIT(9) /* GPIOs 26/27 */
- 
- enum bcm63268_pinctrl_reg {
-+	BCM63268_NONE,
- 	BCM63268_LEDCTRL,
- 	BCM63268_MODE,
- 	BCM63268_CTRL,
-@@ -242,6 +243,61 @@ static struct pingroup bcm63268_groups[]
- 	BCM_PIN_GROUP(vdsl_phy3_grp),
- };
- 
-+static const char * const gpio_groups[] = {
-+	"gpio0",
-+	"gpio1",
-+	"gpio2",
-+	"gpio3",
-+	"gpio4",
-+	"gpio5",
-+	"gpio6",
-+	"gpio7",
-+	"gpio8",
-+	"gpio9",
-+	"gpio10",
-+	"gpio11",
-+	"gpio12",
-+	"gpio13",
-+	"gpio14",
-+	"gpio15",
-+	"gpio16",
-+	"gpio17",
-+	"gpio18",
-+	"gpio19",
-+	"gpio20",
-+	"gpio21",
-+	"gpio22",
-+	"gpio23",
-+	"gpio24",
-+	"gpio25",
-+	"gpio26",
-+	"gpio27",
-+	"gpio28",
-+	"gpio29",
-+	"gpio30",
-+	"gpio31",
-+	"gpio32",
-+	"gpio33",
-+	"gpio34",
-+	"gpio35",
-+	"gpio36",
-+	"gpio37",
-+	"gpio38",
-+	"gpio39",
-+	"gpio40",
-+	"gpio41",
-+	"gpio42",
-+	"gpio43",
-+	"gpio44",
-+	"gpio45",
-+	"gpio46",
-+	"gpio47",
-+	"gpio48",
-+	"gpio49",
-+	"gpio50",
-+	"gpio51",
-+};
-+
- static const char * const led_groups[] = {
- 	"gpio0",
- 	"gpio1",
-@@ -394,6 +450,14 @@ static const char * const vdsl_phy_overr
- 	"vdsl_phy_override_3_grp",
- };
- 
-+#define BCM63268_GPIO_FUN(n)				\
-+	{						\
-+		.name = #n,				\
-+		.groups = n##_groups,			\
-+		.num_groups = ARRAY_SIZE(n##_groups),	\
-+		.reg = BCM63268_NONE,			\
-+	}
-+
- #define BCM63268_LED_FUN(n)				\
- 	{						\
- 		.name = #n,				\
-@@ -428,6 +492,7 @@ static const char * const vdsl_phy_overr
- 	}
- 
- static const struct bcm63268_function bcm63268_funcs[] = {
-+	BCM63268_GPIO_FUN(gpio),
- 	BCM63268_LED_FUN(led),
- 	BCM63268_MODE_FUN(serial_led_clk),
- 	BCM63268_MODE_FUN(serial_led_data),
-@@ -542,6 +607,9 @@ static int bcm63268_pinctrl_set_mux(stru
- 		bcm63268_set_gpio(pc, pg->pins[i]);
- 
- 	switch (f->reg) {
-+	case BCM63268_NONE:
-+		reg = 0;
-+		break;
- 	case BCM63268_LEDCTRL:
- 		reg = BCM63268_LED_REG;
- 		mask = BIT(pg->pins[0]);
-@@ -567,7 +635,8 @@ static int bcm63268_pinctrl_set_mux(stru
- 		return -EINVAL;
- 	}
- 
--	regmap_update_bits(pc->regs, reg, mask, val);
-+	if (reg)
-+		regmap_update_bits(pc->regs, reg, mask, val);
- 
- 	return 0;
- }
diff --git a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..344a5b1c5a
--- /dev/null
+++ b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,131 @@
+From patchwork Tue Jan  7 20:16:20 2025
+Content-Type: text/plain; charset="utf-8"
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+X-Patchwork-Id: 2031059
+Return-Path: 
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+From: Sander Vanheule <sander at svanheule.net>
+To: Michael Walle <mwalle at kernel.org>,
+	Linus Walleij <linus.walleij at linaro.org>,
+	Bartosz Golaszewski <brgl at bgdev.pl>,
+	linux-gpio at vger.kernel.org,
+	linux-kernel at vger.kernel.org
+Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
+ jonas.gorski at gmail.com, kylehendrydev at gmail.com,
+ florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+Date: Tue,  7 Jan 2025 21:16:20 +0100
+Message-ID: <20250107201621.12467-1-sander at svanheule.net>
+X-Mailer: git-send-email 2.47.1
+Precedence: bulk
+X-Mailing-List: linux-gpio at vger.kernel.org
+List-Id: <linux-gpio.vger.kernel.org>
+List-Subscribe: <mailto:linux-gpio+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:linux-gpio+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+---
+?lvaro has submitted a similar patch today. My implementation's impact
+is more limited, but I hadn't gotten around to submitting it yet.
+
+For the original (short) discussion, see:
+https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
+
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	chip->label = config->label ?: dev_name(config->parent);
+ 	chip->can_sleep = regmap_might_sleep(config->regmap);
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;
diff --git a/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch
deleted file mode 100644
index a06ba7464a..0000000000
--- a/target/linux/realtek/patches-6.6/801-gpio-regmap-Use-generic-request-free-ops.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From f21b15dfe254b51f80c552750eb20b1dc752507a Mon Sep 17 00:00:00 2001
-From: Sander Vanheule <sander at svanheule.net>
-Date: Mon, 30 Dec 2024 17:59:24 +0100
-Subject: [PATCH] gpio: regmap: Use generic request/free ops
-
-Set the gpiochip request and free ops to the generic implementations.
-This way a user can provide a gpio-ranges property defined for a pinmux,
-allowing pins to automatically be muxed to their GPIO function when
-requested.
-
-Signed-off-by: Sander Vanheule <sander at svanheule.net>
----
- drivers/gpio/gpio-regmap.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpio/gpio-regmap.c
-+++ b/drivers/gpio/gpio-regmap.c
-@@ -270,6 +270,8 @@ struct gpio_regmap *gpio_regmap_register
- 	chip->label = config->label ?: dev_name(config->parent);
- 	chip->can_sleep = regmap_might_sleep(config->regmap);
- 
-+	chip->request = gpiochip_generic_request;
-+	chip->free = gpiochip_generic_free;
- 	chip->get = gpio_regmap_get;
- 	if (gpio->reg_set_base && gpio->reg_clr_base)
- 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Wed Jan  8 22:46:07 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 09 Jan 2025 01:46:07 -0500
Subject: [openwrt/openwrt]  generic: add gpio-regmap request/free ops patch
In-Reply-To: <173640516736.1670663.10749353720640084976@git-01.infra.openwrt.org>
References: <173640516736.1670663.10749353720640084976@git-01.infra.openwrt.org>
Message-ID: <mailman.34899.1736405173.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3c8b23fad882cb3313b54a2667646ff17c694d98

commit 3c8b23fad882cb3313b54a2667646ff17c694d98
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 8 17:56:16 2025 +0100

    generic: add gpio-regmap request/free ops patch
    
    This patch is needed on bmips since it fixes issues with GPIOs not being
    properly configured due to gpio_request_enable not being called on bcm63xx
    devices. Therefore we can now drop the bcm63268 gpio function patch.
    
    Backported from f5b1d340be9488af71e6522c3f10f1ebd1a35446 with the exception of
    the realtek patch removal.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit f5b1d340be9488af71e6522c3f10f1ebd1a35446)
---
 .../110-pinctrl-bcm63268-add-gpio-function.patch   | 260 ---------------------
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 +++++++++++
 2 files changed, 131 insertions(+), 260 deletions(-)

diff --git a/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch b/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch
deleted file mode 100644
index afd4aa8716..0000000000
--- a/target/linux/bmips/patches-6.6/110-pinctrl-bcm63268-add-gpio-function.patch
+++ /dev/null
@@ -1,260 +0,0 @@
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-From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>
-To: linus.walleij at linaro.org,
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-Subject: [PATCH v2] pinctrl: bcm63268: add gpio function
-Date: Tue, 24 Dec 2024 11:36:45 +0100
-Message-Id: <20241224103645.1709996-1-noltari at gmail.com>
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-
-From: Kyle Hendry <kylehendrydev at gmail.com>
-
-There is no guarantee that the bootloader will leave the pin configuration
-in a known default state, so pinctrl needs to be explicitly set in some
-cases. This patch adds a gpio function for drivers that need it, i.e.
-gpio-leds.
-
-Signed-off-by: Kyle Hendry <kylehendrydev at gmail.com>
-Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
----
- drivers/pinctrl/bcm/pinctrl-bcm63268.c | 71 +++++++++++++++++++++++++-
- 1 file changed, 70 insertions(+), 1 deletion(-)
-
---- a/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-+++ b/drivers/pinctrl/bcm/pinctrl-bcm63268.c
-@@ -34,6 +34,7 @@
- #define  BCM63268_BASEMODE_VDSL_PHY_3	BIT(9) /* GPIOs 26/27 */
- 
- enum bcm63268_pinctrl_reg {
-+	BCM63268_NONE,
- 	BCM63268_LEDCTRL,
- 	BCM63268_MODE,
- 	BCM63268_CTRL,
-@@ -242,6 +243,61 @@ static struct pingroup bcm63268_groups[]
- 	BCM_PIN_GROUP(vdsl_phy3_grp),
- };
- 
-+static const char * const gpio_groups[] = {
-+	"gpio0",
-+	"gpio1",
-+	"gpio2",
-+	"gpio3",
-+	"gpio4",
-+	"gpio5",
-+	"gpio6",
-+	"gpio7",
-+	"gpio8",
-+	"gpio9",
-+	"gpio10",
-+	"gpio11",
-+	"gpio12",
-+	"gpio13",
-+	"gpio14",
-+	"gpio15",
-+	"gpio16",
-+	"gpio17",
-+	"gpio18",
-+	"gpio19",
-+	"gpio20",
-+	"gpio21",
-+	"gpio22",
-+	"gpio23",
-+	"gpio24",
-+	"gpio25",
-+	"gpio26",
-+	"gpio27",
-+	"gpio28",
-+	"gpio29",
-+	"gpio30",
-+	"gpio31",
-+	"gpio32",
-+	"gpio33",
-+	"gpio34",
-+	"gpio35",
-+	"gpio36",
-+	"gpio37",
-+	"gpio38",
-+	"gpio39",
-+	"gpio40",
-+	"gpio41",
-+	"gpio42",
-+	"gpio43",
-+	"gpio44",
-+	"gpio45",
-+	"gpio46",
-+	"gpio47",
-+	"gpio48",
-+	"gpio49",
-+	"gpio50",
-+	"gpio51",
-+};
-+
- static const char * const led_groups[] = {
- 	"gpio0",
- 	"gpio1",
-@@ -394,6 +450,14 @@ static const char * const vdsl_phy_overr
- 	"vdsl_phy_override_3_grp",
- };
- 
-+#define BCM63268_GPIO_FUN(n)				\
-+	{						\
-+		.name = #n,				\
-+		.groups = n##_groups,			\
-+		.num_groups = ARRAY_SIZE(n##_groups),	\
-+		.reg = BCM63268_NONE,			\
-+	}
-+
- #define BCM63268_LED_FUN(n)				\
- 	{						\
- 		.name = #n,				\
-@@ -428,6 +492,7 @@ static const char * const vdsl_phy_overr
- 	}
- 
- static const struct bcm63268_function bcm63268_funcs[] = {
-+	BCM63268_GPIO_FUN(gpio),
- 	BCM63268_LED_FUN(led),
- 	BCM63268_MODE_FUN(serial_led_clk),
- 	BCM63268_MODE_FUN(serial_led_data),
-@@ -542,6 +607,9 @@ static int bcm63268_pinctrl_set_mux(stru
- 		bcm63268_set_gpio(pc, pg->pins[i]);
- 
- 	switch (f->reg) {
-+	case BCM63268_NONE:
-+		reg = 0;
-+		break;
- 	case BCM63268_LEDCTRL:
- 		reg = BCM63268_LED_REG;
- 		mask = BIT(pg->pins[0]);
-@@ -567,7 +635,8 @@ static int bcm63268_pinctrl_set_mux(stru
- 		return -EINVAL;
- 	}
- 
--	regmap_update_bits(pc->regs, reg, mask, val);
-+	if (reg)
-+		regmap_update_bits(pc->regs, reg, mask, val);
- 
- 	return 0;
- }
diff --git a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..344a5b1c5a
--- /dev/null
+++ b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,131 @@
+From patchwork Tue Jan  7 20:16:20 2025
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+	6eDOblXxt859JECDowM0NjF87XJqjgph22+A1WUV4iaePO4GIWo9DQ3KhP/Pyg==
+From: Sander Vanheule <sander at svanheule.net>
+To: Michael Walle <mwalle at kernel.org>,
+	Linus Walleij <linus.walleij at linaro.org>,
+	Bartosz Golaszewski <brgl at bgdev.pl>,
+	linux-gpio at vger.kernel.org,
+	linux-kernel at vger.kernel.org
+Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
+ jonas.gorski at gmail.com, kylehendrydev at gmail.com,
+ florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+Date: Tue,  7 Jan 2025 21:16:20 +0100
+Message-ID: <20250107201621.12467-1-sander at svanheule.net>
+X-Mailer: git-send-email 2.47.1
+Precedence: bulk
+X-Mailing-List: linux-gpio at vger.kernel.org
+List-Id: <linux-gpio.vger.kernel.org>
+List-Subscribe: <mailto:linux-gpio+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:linux-gpio+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+---
+?lvaro has submitted a similar patch today. My implementation's impact
+is more limited, but I hadn't gotten around to submitting it yet.
+
+For the original (short) discussion, see:
+https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
+
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	chip->label = config->label ?: dev_name(config->parent);
+ 	chip->can_sleep = regmap_might_sleep(config->regmap);
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Wed Jan  8 22:46:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 09 Jan 2025 01:46:56 -0500
Subject: [openwrt/openwrt]  generic: add gpio-regmap request/free ops patch
In-Reply-To: <173640521665.1672738.7927012368803817167@git-01.infra.openwrt.org>
References: <173640521665.1672738.7927012368803817167@git-01.infra.openwrt.org>
Message-ID: <mailman.34900.1736405220.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/55af6e1af0b8a259dc60bc14d14ac87dc0e0bd93

commit 55af6e1af0b8a259dc60bc14d14ac87dc0e0bd93
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 8 17:56:16 2025 +0100

    generic: add gpio-regmap request/free ops patch
    
    This patch is needed on bmips since it fixes issues with GPIOs not being
    properly configured due to gpio_request_enable not being called on bcm63xx
    devices. Therefore we can now drop the bcm63268 gpio function patch.
    
    Backported from f5b1d340be9488af71e6522c3f10f1ebd1a35446 with the exception of
    the realtek and bmips patches removal.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit f5b1d340be9488af71e6522c3f10f1ebd1a35446)
---
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 +++++++++++++++++++++
 1 file changed, 131 insertions(+)

diff --git a/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..35c85f97e5
--- /dev/null
+++ b/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,131 @@
+From patchwork Tue Jan  7 20:16:20 2025
+Content-Type: text/plain; charset="utf-8"
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+X-Patchwork-Submitter: Sander Vanheule <sander at svanheule.net>
+X-Patchwork-Id: 2031059
+Return-Path: 
+ <linux-gpio+bounces-14582-incoming=patchwork.ozlabs.org at vger.kernel.org>
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+	6eDOblXxt859JECDowM0NjF87XJqjgph22+A1WUV4iaePO4GIWo9DQ3KhP/Pyg==
+From: Sander Vanheule <sander at svanheule.net>
+To: Michael Walle <mwalle at kernel.org>,
+	Linus Walleij <linus.walleij at linaro.org>,
+	Bartosz Golaszewski <brgl at bgdev.pl>,
+	linux-gpio at vger.kernel.org,
+	linux-kernel at vger.kernel.org
+Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
+ jonas.gorski at gmail.com, kylehendrydev at gmail.com,
+ florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+Date: Tue,  7 Jan 2025 21:16:20 +0100
+Message-ID: <20250107201621.12467-1-sander at svanheule.net>
+X-Mailer: git-send-email 2.47.1
+Precedence: bulk
+X-Mailing-List: linux-gpio at vger.kernel.org
+List-Id: <linux-gpio.vger.kernel.org>
+List-Subscribe: <mailto:linux-gpio+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:linux-gpio+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+---
+?lvaro has submitted a similar patch today. My implementation's impact
+is more limited, but I hadn't gotten around to submitting it yet.
+
+For the original (short) discussion, see:
+https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
+
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -263,6 +263,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	 */
+ 	chip->can_sleep = true;
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Thu Jan  9 02:10:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 09 Jan 2025 05:10:46 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix label MAC address for Linksys WHW03
 v2
In-Reply-To: <173641744689.2089176.3991717939328164508@git-01.infra.openwrt.org>
References: <173641744689.2089176.3991717939328164508@git-01.infra.openwrt.org>
Message-ID: <mailman.35009.1736417450.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c113982706989c76c69e94e15abce0d316e97f6b

commit c113982706989c76c69e94e15abce0d316e97f6b
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Thu Jan 9 00:46:18 2025 +0100

    ipq40xx: fix label MAC address for Linksys WHW03 v2
    
    The label MAC address is written inside the case of the whw03 v2 at the bottom.
    
    Similar fix as to the 4040 in b22d382ae4eaa1af42930115d91855f402314cac
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17535
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
index cb12381022..6c9eaadd77 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
@@ -8,12 +8,12 @@
 
 / {
 	aliases {
-		// TODO: Verify if the ethernet0 alias is needed
 		ethernet0 = &gmac;
 		led-boot = &led_blue;
 		led-failsafe = &led_red;
 		led-running = &led_blue;
 		led-upgrade = &led_red;
+		label-mac-device = &gmac;
 	};
 
 	soc {



From lede-commits at lists.infradead.org  Thu Jan  9 02:11:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 09 Jan 2025 05:11:47 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix label MAC address for Linksys WHW03
 v2
In-Reply-To: <173641750656.2092132.11588086896037978576@git-01.infra.openwrt.org>
References: <173641750656.2092132.11588086896037978576@git-01.infra.openwrt.org>
Message-ID: <mailman.35010.1736417509.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/38d79aca0eb22218b5dcc2ada98cde4bb734bc9c

commit 38d79aca0eb22218b5dcc2ada98cde4bb734bc9c
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Thu Jan 9 00:46:18 2025 +0100

    ipq40xx: fix label MAC address for Linksys WHW03 v2
    
    The label MAC address is written inside the case of the whw03 v2 at the bottom.
    
    Similar fix as to the 4040 in b22d382ae4eaa1af42930115d91855f402314cac
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17535
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit c113982706989c76c69e94e15abce0d316e97f6b)
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
index cb12381022..6c9eaadd77 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
@@ -8,12 +8,12 @@
 
 / {
 	aliases {
-		// TODO: Verify if the ethernet0 alias is needed
 		ethernet0 = &gmac;
 		led-boot = &led_blue;
 		led-failsafe = &led_red;
 		led-running = &led_blue;
 		led-upgrade = &led_red;
+		label-mac-device = &gmac;
 	};
 
 	soc {



From lede-commits at lists.infradead.org  Thu Jan  9 02:11:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 09 Jan 2025 05:11:46 -0500
Subject: [openwrt/openwrt]  ipq40xx: dts: add ethernet0 alias for all devices
In-Reply-To: <173641750656.2092132.11588086896037978576@git-01.infra.openwrt.org>
References: <173641750656.2092132.11588086896037978576@git-01.infra.openwrt.org>
Message-ID: <mailman.35011.1736417511.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/66229e2093f3247adaf2d7b62bf90df8254f8959

commit 66229e2093f3247adaf2d7b62bf90df8254f8959
Author: Matthias Schiffer <mschiffer at universe-factory.net>
AuthorDate: Tue Dec 31 12:23:53 2024 +0100

    ipq40xx: dts: add ethernet0 alias for all devices
    
    Updating the driver patches for ipq40xx (correctly) removed the
    ethernet0 alias from qcom-ipq4019.dtsi; however, on some devices this
    alias is needed for the bootloader to set MAC addresses in the FDT.
    
    As it is unknown which devices actually need the alias, simply add it to
    all devices trees for now that enable the &gmac now to avoid regressions
    from previous OpenWrt releases. The additional alias should not cause any
    issues even when it is not needed.
    
    A TODO comment is added to the same Device Trees to document that the
    alias may not be needed (hopefully preventing it from being copied
    unnecessarily to newly added devices in the future). The following
    devices are known to need the alias for correct MAC address assignment,
    so no TODO comment is added:
    
    - FRITZ!Box 4040
    - FRITZ!Box 7530
    
    Fixes: cd9c7211241e ("ipq40xx: 6.1: use latest DSA and ethernet patches")
    Signed-off-by: Matthias Schiffer <mschiffer at universe-factory.net>
    Link: https://github.com/openwrt/openwrt/pull/17442
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit d09dd75fbd1314ec5f3571511195da4012d7a51a)
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts  | 1 +
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi      | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts        | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts       | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts  | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts   | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts    | 5 +++++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts     | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts     | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts  | 1 +
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts       | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts   | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts         | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts      | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts  | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts       | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi        | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts        | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts     | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts   | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts    | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi        | 5 +++++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts        | 2 ++
 .../arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi      | 5 +++++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts       | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts     | 2 ++
 .../files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts      | 2 ++
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts | 5 +++++
 61 files changed, 141 insertions(+)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
index c117a90538..6d1babf00e 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
index f2e2ed3f7f..83b4addb79 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts
@@ -15,6 +15,8 @@
 		led-failsafe = &status;
 		led-running = &status;
 		led-upgrade = &status;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
index b061428bb3..f2690a095d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
index 8d09bfd0b7..469a6ca757 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts
@@ -11,6 +11,8 @@
 	compatible = "ezviz,cs-w3-wd1200g-eup";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
index df5d9331a1..69164540cd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts
@@ -11,6 +11,8 @@
 	compatible = "dlink,dap-2610";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_red;
 		led-failsafe = &led_red;
 		led-running = &led_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
index e80a540244..6cace3b88f 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts
@@ -11,6 +11,8 @@
 	compatible = "linksys,ea6350v3";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
index 52a96eae98..5bd5180efd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts
@@ -41,6 +41,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
index ca064837c8..a13fc71987 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi
@@ -46,6 +46,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_amber;
 		led-failsafe = &power_amber;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
index b3617eb45e..6aef86ad26 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts
@@ -11,6 +11,7 @@
 	compatible = "avm,fritzbox-4040";
 
 	aliases {
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &flash;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
index d8b4300a52..4293191b07 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts
@@ -11,6 +11,8 @@
 	compatible = "glinet,gl-a1300", "qcom,ipq4019";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_run;
 		led-failsafe = &led_run;
 		led-running = &led_run;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
index bb197c2742..4ed8a82af6 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts
@@ -11,6 +11,8 @@
 	compatible = "glinet,gl-ap1300";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
index 07ad4d3d52..d91725dfb7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
index 9828b4b34e..fcacb98cb9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi
@@ -8,6 +8,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
index 293bf3d20a..5deb9ba3de 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts
@@ -9,6 +9,11 @@
 	model = "devolo Magic 2 WiFi next";
 	compatible = "devolo,magic-2-wifi-next";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
index bf2fc0e37e..c19262497d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi
@@ -11,6 +11,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
index 957ccb306c..2b79169c0d 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
index a353c7f9f3..8040bb494b 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_purple;
 		led-failsafe = &led_status_yellow;
 		led-running = &led_status_cyan;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
index e58b3378d5..946b3b3038 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts
@@ -16,6 +16,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
index ea2102f7d6..56d920a6dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
@@ -7,6 +7,8 @@
 	compatible = "teltonika,rutx50";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_rssi0;
 		led-failsafe = &led_rssi0;
 		led-running = &led_rssi0;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
index 23e9457f02..d434145278 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
index 8515f3c034..982ceef044 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts
@@ -16,6 +16,8 @@
 		led-failsafe = &led_power_amber;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_amber;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport5;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
index 2b357a1f03..f8b458f9f7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi
@@ -18,6 +18,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_user;
 		led-failsafe = &led_user;
 		led-running = &led_user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
index 1f26db5869..fe6e8626ea 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts
@@ -10,6 +10,8 @@
 	compatible = "linksys,whw01";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		serial0 = &blsp1_uart1;
 		led-boot = &led_system_blue;
 		led-running = &led_system_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
index dd56cb215e..990eb70daa 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts
@@ -11,6 +11,8 @@
 	compatible = "pakedge,wr-1";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
index fc5a7a94aa..7c8e81de33 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts
@@ -9,6 +9,11 @@
 	model = "Luma Home WRTQ-329ACN";
 	compatible = "luma,wrtq-329acn";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	i2c-gpio {
 		compatible = "i2c-gpio";
 		sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
index d8249236f0..79242a42e4 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts
@@ -52,6 +52,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_green;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
index 3569d6e53a..3346fc8098 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts
@@ -11,6 +11,8 @@
 	compatible = "mobipromo,cm520-79f";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_sys;
 		led-failsafe = &led_sys;
 		led-running = &led_sys;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
index 243d19fb03..00fc918ccf 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts
@@ -11,6 +11,11 @@
 / {
 	model = "Qxwlan E2600AC c1";
 	compatible = "qxwlan,e2600ac-c1";
+
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
 };
 
 &blsp1_spi1 {
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
index e065ef0168..c2c602114f 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts
@@ -11,6 +11,11 @@
 / {
 	model = "Qxwlan E2600AC c2";
 	compatible = "qxwlan,e2600ac-c2";
+
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
 };
 
 &blsp1_spi1 {
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 4f6cafb885..39905d4342 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -15,6 +15,7 @@
 	};
 
 	aliases {
+		ethernet0 = &gmac;
 		led-boot = &power_green;
 		led-failsafe = &info_red;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
index 106c8031e3..e60cd42778 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts
@@ -11,6 +11,8 @@
 	compatible = "avm,fritzrepeater-1200";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_green;
 		led-failsafe = &power_red;
 		led-running = &power_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
index e8daef63f1..f720be6d03 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts
@@ -11,6 +11,8 @@
 	compatible = "avm,fritzrepeater-3000";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power_led;
 		led-failsafe = &power_led;
 		led-running = &power_led;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
index 89ba523e57..33400170c8 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts
@@ -20,6 +20,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport4;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
index 94be4d976e..d792599f1a 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts
@@ -12,6 +12,8 @@
 	compatible = "8dev,habanero-dvk";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
index b1a04012fb..881abc23db 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_blue;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
index 4a3a323b5f..bd7f1b5cb9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts
@@ -21,6 +21,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status_blue;
 		led-failsafe = &led_status_red;
 		led-running = &led_status_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
index 4e5497cbc3..09d9a8f3dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts
@@ -15,6 +15,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_backlight_white;
 		led-failsafe = &led_status_green;
 		led-running = &led_status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
index a5b55ff421..b042329bc7 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts
@@ -35,6 +35,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &user;
 		led-failsafe = &user;
 		led-running = &user;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
index 7ec3c6a9ae..e3a5ad7be5 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts
@@ -15,6 +15,8 @@
 		led-failsafe = &led_red0;
 		led-running = &led_blue0;
 		led-upgrade = &led_red0;
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		ethernet1 = &swport4;
 	};
 
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
index 7c0260ec3c..3eaa75b520 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts
@@ -14,6 +14,8 @@
 	compatible = "zte,mf18a";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
index a4606dd21c..80a729e963 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts
@@ -13,6 +13,8 @@
 	compatible = "zte,mf282plus";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_internal;
 		led-failsafe = &led_internal;
 		led-running = &led_internal;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
index 06d65b8944..91cf49b1b0 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts
@@ -12,6 +12,8 @@
 	compatible = "zte,mf286d";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_internal;
 		led-failsafe = &led_internal;
 		led-running = &led_internal;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
index f5a985b6d1..f03717be33 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts
@@ -13,6 +13,8 @@
 	compatible = "zte,mf289f";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_status;
 		led-failsafe = &led_status;
 		led-running = &led_status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
index e115c211aa..4bef499499 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts
@@ -12,6 +12,8 @@
 	compatible = "sony,ncp-hg100-cellular";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_cloud_green;
 		led-failsafe = &led_cloud_red;
 		led-running = &led_cloud_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
index f87ab07416..f4c64d6b06 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts
@@ -44,6 +44,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_orange;
 		led-failsafe = &led_status_blue;
 		led-running = &led_power_orange;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
index 0463c61236..5ebbaa90ad 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi
@@ -12,6 +12,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_sys;
 		led-failsafe = &led_sys;
 		led-running = &led_sys;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
index 3cd8997a92..48b2e43d18 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts
@@ -16,6 +16,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
index 7a13241b66..593b3959fc 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts
@@ -14,6 +14,8 @@
 	compatible = "cellc,rtl30vw";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_blue;
 		led-failsafe = &led_power_red;
 		led-running = &led_power_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
index 54e3cc7818..cb12381022 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi
@@ -8,6 +8,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_blue;
 		led-failsafe = &led_red;
 		led-running = &led_blue;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
index 644329419d..887762bd23 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
@@ -11,6 +11,8 @@
 	model = "SKSpruce WIA3300-20";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac;
 		led-boot = &led_status_red;
 		led-failsafe = &led_status_lime;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
index f2e39c87ae..c6113e7aab 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
@@ -14,6 +14,8 @@
 	compatible = "google,wifi", "google,gale-v2", "qcom,ipq4019";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		label-mac-device = &gmac0;
 		led-boot = &led0_blue;
 		led-failsafe = &led0_red;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
index ab985dfce1..c892bf0c5b 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts
@@ -29,6 +29,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_power_blue;
 		led-failsafe = &led_power_orange;
 		led-running = &led_power_white;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
index 0673dc0241..3bcc5c3cec 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi
@@ -26,6 +26,11 @@
 	};
 
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	soc {
 		tcsr at 1949000 {
 			compatible = "qcom,tcsr";
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
index 517d691d10..fd7878b47a 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts
@@ -73,6 +73,8 @@
 	};
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &status;
 		led-failsafe = &status;
 		led-upgrade = &status;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
index 6227027266..1cb1b9d5dd 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts
@@ -10,6 +10,8 @@
 	compatible = "aruba,ap-303h";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_red;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
index 7f8f9be795..520ccdfd1c 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi
@@ -6,6 +6,11 @@
 #include <dt-bindings/soc/qcom,tcsr.h>
 
 / {
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
index dfb639e2bb..2aea68d520 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts
@@ -25,6 +25,8 @@
 	compatible = "glinet,gl-b1300";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &power;
 		led-failsafe = &power;
 		led-running = &power;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
index 8286e1899f..9d2f7ce1bc 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi
@@ -20,6 +20,8 @@
 
 / {
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &status_green;
 		led-failsafe = &status_red;
 		led-running = &status_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
index 48e0bb903e..533ff388a9 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts
@@ -10,6 +10,8 @@
 	compatible = "extreme-networks,ws-ap3915i";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_amber;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
index 1eb6ea2eb8..1fe8f8536a 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts
@@ -10,6 +10,8 @@
 	compatible = "extreme-networks,ws-ap391x";
 
 	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
 		led-boot = &led_system_green;
 		led-failsafe = &led_system_red;
 		led-running = &led_system_green;
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
index 271a972092..177e38ad83 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts
@@ -9,6 +9,11 @@
 	model = "Wallystech DR40X9";
 	compatible = "wallys,dr40x9";
 
+	aliases {
+		// TODO: Verify if the ethernet0 alias is needed
+		ethernet0 = &gmac;
+	};
+
 	chosen {
 		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
 	};



From lede-commits at lists.infradead.org  Fri Jan 10 01:50:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:50:39 -0500
Subject: [openwrt/openwrt]  include/package-pack: remove leading whitespace
 from install scripts
In-Reply-To: <173650263986.525687.3775194051409664263@git-01.infra.openwrt.org>
References: <173650263986.525687.3775194051409664263@git-01.infra.openwrt.org>
Message-ID: <mailman.36029.1736502650.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b52e8972968ce25026447fea3de320fb395a2f3a

commit b52e8972968ce25026447fea3de320fb395a2f3a
Author: Eric Fahlgren <ericfahlgren at gmail.com>
AuthorDate: Mon Dec 30 15:54:55 2024 -0800

    include/package-pack: remove leading whitespace from install scripts
    
    Strip off initial leading blanks and tabs from scripts and script
    fragments that are supplied by the package's Makefile.  Specifically,
    the script included in the postrm must be left justified so that
    the shebang is in the first column.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17439
    Signed-off-by: Eric Fahlgren <ericfahlgren at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17440
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 include/package-pack.mk | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/package-pack.mk b/include/package-pack.mk
index a36d690901..411bae825a 100644
--- a/include/package-pack.mk
+++ b/include/package-pack.mk
@@ -302,7 +302,7 @@ else
 		echo 'export pkgname="$(1)"'; \
 		echo "add_group_and_user"; \
 		echo "default_postinst"; \
-		[ ! -f $$(ADIR_$(1))/postinst-pkg ] || cat "$$(ADIR_$(1))/postinst-pkg"; \
+		[ ! -f $$(ADIR_$(1))/postinst-pkg ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/postinst-pkg"; \
 	) > $$(ADIR_$(1))/post-install;
 
 	( \
@@ -312,9 +312,11 @@ else
 		echo 'export root="$$$${IPKG_INSTROOT}"'; \
 		echo 'export pkgname="$(1)"'; \
 		echo "default_prerm"; \
-		[ ! -f $$(ADIR_$(1))/prerm-pkg ] || cat "$$(ADIR_$(1))/prerm-pkg"; \
+		[ ! -f $$(ADIR_$(1))/prerm-pkg ] || sed -z 's/^\s*#!/#!/' "$$(ADIR_$(1))/prerm-pkg"; \
 	) > $$(ADIR_$(1))/pre-deinstall;
 
+	[ ! -f $$(ADIR_$(1))/postrm ] || sed -zi 's/^\s*#!/#!/' "$$(ADIR_$(1))/postrm";
+
 	if [ -n "$(USERID)" ]; then echo $(USERID) > $$(IDIR_$(1))/lib/apk/packages/$(1).rusers; fi;
 	if [ -n "$(ALTERNATIVES)" ]; then echo $(ALTERNATIVES) > $$(IDIR_$(1))/lib/apk/packages/$(1).alternatives; fi;
 	(cd $$(IDIR_$(1)) && find . -type f,l -printf "/%P\n" > $$(IDIR_$(1))/lib/apk/packages/$(1).list)



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:55 -0500
Subject: [openwrt/openwrt]  lantiq: use nvmem for tplink tdw89x0
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36032.1736502835.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/baa656193958bbb21ae0cf1decdc87c0f89a4f9b

commit baa656193958bbb21ae0cf1decdc87c0f89a4f9b
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 16 15:19:35 2024 -0800

    lantiq: use nvmem for tplink tdw89x0
    
    These two devices use different wifi chips and as a result, different
    calibration sizes. Move the differences out of dtsi.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16555
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../mips/boot/dts/lantiq/vr9_tplink_tdw8970.dts    | 12 +++++++++++
 .../mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts    | 12 +++++++++++
 .../mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi   | 10 +++-------
 .../etc/hotplug.d/firmware/12-ath9k-eeprom         | 23 ----------------------
 4 files changed, 27 insertions(+), 30 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8970.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8970.dts
index 1ac6440744..4bd70b528c 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8970.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8970.dts
@@ -4,3 +4,15 @@
 	compatible = "tplink,tdw8970", "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
 	model = "TP-LINK TD-W8970";
 };
+
+&boardconfig {
+	cal_boardconfig_21000: calibration at 21000 {
+		reg = <0x21000 0x440>;
+	};
+};
+
+&ath9k {
+	compatible = "pci168c,0030";
+	nvmem-cells = <&macaddr_ath9k_cal_f100 2>, <&cal_boardconfig_21000>;
+	nvmem-cell-names = "mac-address", "calibration";
+};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts
index 8221e0d5c5..a3fd642336 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw8980.dts
@@ -27,3 +27,15 @@
 
 	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 };
+
+&boardconfig {
+	cal_boardconfig_21000: calibration at 21000 {
+		reg = <0x21000 0x3d8>;
+	};
+};
+
+&ath9k {
+	compatible = "pci168c,002e";
+	nvmem-cells = <&macaddr_ath9k_cal_f100 2>, <&cal_boardconfig_21000>;
+	nvmem-cell-names = "mac-address", "calibration";
+};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
index c3e69f18fa..be9c8063b4 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
@@ -200,15 +200,11 @@
 		#address-cells = <3>;
 		device_type = "pci";
 
-		ath9k: wifi at 168c,002e {
-			compatible = "pci168c,002e";
+		ath9k: wifi at 0,0 {
 			reg = <0 0 0 0 0>;
 			#gpio-cells = <2>;
 			gpio-controller;
-			qca,no-eeprom;
 			ieee80211-freq-limit = <2402000 2482000>;
-			nvmem-cells = <&macaddr_ath9k_cal_f100 2>;
-			nvmem-cell-names = "mac-address";
 		};
 	};
 };
@@ -244,12 +240,12 @@
 				read-only;
 			};
 
-			ath9k_cal: partition at 7d0000 {
+			partition at 7d0000 {
 				reg = <0x7d0000 0x30000>;
 				label = "boardconfig";
 				read-only;
 
-				nvmem-layout {
+				boardconfig: nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
 					#size-cells = <1>;
diff --git a/target/linux/lantiq/xrx200_legacy/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xrx200_legacy/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
deleted file mode 100644
index c10065d5d5..0000000000
--- a/target/linux/lantiq/xrx200_legacy/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
+++ /dev/null
@@ -1,23 +0,0 @@
-#!/bin/sh
-
-[ -e /lib/firmware/$FIRMWARE ] && exit 0
-
-. /lib/functions/caldata.sh
-
-case "$FIRMWARE" in
-	"ath9k-eeprom-pci-0000:00:0e.0.bin" | \
-	"ath9k-eeprom-pci-0000:01:00.0.bin" | \
-	"ath9k-eeprom-pci-0000:02:00.0.bin")
-		board=$(board_name)
-
-		case "$board" in
-			tplink,tdw8970|\
-			tplink,tdw8980)
-				caldata_extract "boardconfig" 0x21000 0x1000
-				;;
-			*)
-				caldata_die "board $board is not supported yet"
-				;;
-		esac
-		;;
-esac



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:53 -0500
Subject: [openwrt/openwrt]  lantiq: use nvmem for fritz73x0
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36033.1736502836.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7111d847870870e8f297c4e3ccafa632f56c8acb

commit 7111d847870870e8f297c4e3ccafa632f56c8acb
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 16 15:07:50 2024 -0800

    lantiq: use nvmem for fritz73x0
    
    These units use AR9287, which has a calibration size of 3d8.
    
    Also fixed compatible string to the proper one to indicate AR9287.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17278
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts | 9 +++++++--
 .../lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts | 9 +++++++--
 .../xway/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom       | 3 ---
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts
index 9ea6c3929c..ba6c487048 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7312.dts
@@ -136,6 +136,10 @@
 					#address-cells = <1>;
 					#size-cells = <1>;
 
+					cal_ath9k_cal_985: calibration at 985 {
+						reg = <0x985 0x3d8>;
+					};
+
 					macaddr_ath9k_cal_a91: macaddr at a91 {
 						compatible = "mac-base";
 						reg = <0xa91 0x6>;
@@ -180,8 +184,9 @@
 	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi at 0,0 {
-		compatible = "pci0,0";
+		compatible = "pci168c,002d";
 		reg = <0x7000 0 0 0 0>;
-		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+		nvmem-cells = <&cal_ath9k_cal_985>;
+		nvmem-cell-names = "calibration";
 	};
 };
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts
index 953a8ccbf7..c09d3879b4 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_avm_fritz7320.dts
@@ -163,6 +163,10 @@
 					#address-cells = <1>;
 					#size-cells = <1>;
 
+					cal_ath9k_cal_985: calibration at 985 {
+						reg = <0x985 0x3d8>;
+					};
+
 					macaddr_ath9k_cal_a91: macaddr at a91 {
 						compatible = "mac-base";
 						reg = <0xa91 0x6>;
@@ -206,9 +210,10 @@
 	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
 
 	wifi at 0,0 {
-		compatible = "pci0,0";
+		compatible = "pci168c,002d";
 		reg = <0x7000 0 0 0 0>;
-		qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */
+		nvmem-cells = <&cal_ath9k_cal_985>;
+		nvmem-cell-names = "calibration";
 	};
 };
 
diff --git a/target/linux/lantiq/xway/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xway/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
index 98bb9af694..91eb3f1680 100644
--- a/target/linux/lantiq/xway/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
+++ b/target/linux/lantiq/xway/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
@@ -45,9 +45,6 @@ case "$FIRMWARE" in
 				caldata_extract "calibration" 0xf000 0x1000
 				ath9k_patch_mac_crc $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2) 0x20c
 				;;
-			avm,fritz7312|avm,fritz7320)
-				caldata_extract "urlader" 0x985 0x1000
-				;;
 			*)
 				caldata_die "board $board is not supported yet"
 				;;



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:57 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:57 -0500
Subject: [openwrt/openwrt]  lantiq: Remove legacy LED migration script
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36034.1736502837.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/44d6d062686fc8d63ed6b37d37e06075c109f385

commit 44d6d062686fc8d63ed6b37d37e06075c109f385
Author: Mustafa Can Elmac? <mustafacan at elmaci.net>
AuthorDate: Thu Dec 26 12:50:55 2024 +0300

    lantiq: Remove legacy LED migration script
    
    This script was rendered obsolete after xrx200 target switched to DSA and
    breaking config migration from old releases to 22.03.
    
    Signed-off-by: Mustafa Can Elmac? <mustafacan at elmaci.net>
    Link: https://github.com/openwrt/openwrt/pull/17383
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../base-files/etc/uci-defaults/01_led_migration   | 32 ----------------------
 .../base-files/etc/uci-defaults/01_led_migration   | 31 ---------------------
 2 files changed, 63 deletions(-)

diff --git a/target/linux/lantiq/xrx200/base-files/etc/uci-defaults/01_led_migration b/target/linux/lantiq/xrx200/base-files/etc/uci-defaults/01_led_migration
deleted file mode 100644
index e3f6a98149..0000000000
--- a/target/linux/lantiq/xrx200/base-files/etc/uci-defaults/01_led_migration
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# Copyright (C) 2013 OpenWrt.org
-#
-
-. /lib/functions/migrations.sh
-
-do_internet_led_rename()
-{
-	config_load system
-
-	[ -n $(config_get led_internet name) ] || return
-	[ -z $(config_get led_dsl name) ] || return
-
-	uci rename system.led_internet=led_dsl
-	uci set system.led_dsl.name=dsl
-
-	logger -t led-migration "internet led renamed to dsl"
-}
-
-case "$(board_name)" in
-arcadyan,arv7519rw22|\
-avm,fritz7360sl|\
-bt,homehub-v5a)
-	do_internet_led_rename
-	;;
-esac
-
-remove_devicename_leds
-
-migrations_apply system
-
-exit 0
diff --git a/target/linux/lantiq/xrx200_legacy/base-files/etc/uci-defaults/01_led_migration b/target/linux/lantiq/xrx200_legacy/base-files/etc/uci-defaults/01_led_migration
deleted file mode 100644
index f6f11bc569..0000000000
--- a/target/linux/lantiq/xrx200_legacy/base-files/etc/uci-defaults/01_led_migration
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# Copyright (C) 2013 OpenWrt.org
-#
-
-. /lib/functions/migrations.sh
-
-do_internet_led_rename()
-{
-	config_load system
-
-	[ -n $(config_get led_internet name) ] || return
-	[ -z $(config_get led_dsl name) ] || return
-
-	uci rename system.led_internet=led_dsl
-	uci set system.led_dsl.name=dsl
-
-	logger -t led-migration "internet led renamed to dsl"
-}
-
-case "$(board_name)" in
-alphanetworks,asl56026|\
-arcadyan,vg3503j)
-	do_internet_led_rename
-	;;
-esac
-
-remove_devicename_leds
-
-migrations_apply system
-
-exit 0



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:52 -0500
Subject: [openwrt/openwrt]  lantiq: use regulator for USB GPIO
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36035.1736502841.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/98bcdd191db406a2ca1c458c1252a6d4a0169d22

commit 98bcdd191db406a2ca1c458c1252a6d4a0169d22
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Tue Dec 3 13:29:37 2024 -0800

    lantiq: use regulator for USB GPIO
    
    One is already present. The other one can be implemented in terms of the
    PHY.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17250
    Signed-off-by: John Crispin <john at phrozen.org>
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../files/arch/mips/boot/dts/lantiq/ar9_zte_h201l.dts  | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_zte_h201l.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_zte_h201l.dts
index a0e3664b6d..3e8cbcf84b 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_zte_h201l.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/ar9_zte_h201l.dts
@@ -96,11 +96,6 @@
 			gpio-export,output = <1>;
 			gpios = <&gpio 38 GPIO_ACTIVE_HIGH>;
 		};
-		usb {
-			gpio-export,name = "usb";
-			gpio-export,output = <1>;
-			gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
-		};
 		wifi {
 			gpio-export,name = "wifi";
 			gpio-export,output = <1>;
@@ -108,6 +103,18 @@
 		};
 	};
 
+	usb_phy: regulator-usb-phy {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB_PHY";
+
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
 	usb_vbus: regulator-usb-vbus {
 		compatible = "regulator-fixed";
 
@@ -166,6 +173,7 @@
 
 &usb_phy0 {
 	status = "okay";
+	phy-supply = <&usb_phy>;
 };
 
 



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:54 -0500
Subject: [openwrt/openwrt]  lantiq: use nvmem for fritz 736x
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36038.1736502841.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/92ccaacb295693f8f03fe815b574f15a753a1d15

commit 92ccaacb295693f8f03fe815b574f15a753a1d15
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 16 15:42:19 2024 -0800

    lantiq: use nvmem for fritz 736x
    
    Two use AR9287 and one AR9381. Both have different calibration sizes.
    Move differences out of wifi node to make it clearer what's what.
    
    qca,no-eeprom needs to stay for 7362sl as there's no nvmem equivalent
    for caldata_extract_reverse
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17278
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts   |  4 ++--
 .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts    | 10 ++++++++++
 .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts    |  5 +++++
 .../files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi     |  4 +---
 .../xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom   |  3 ---
 5 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts
index cc15324b56..1b41405062 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts
@@ -49,7 +49,7 @@
 					#size-cells = <1>;
 
 					cal_urlader_985: cal at 985 {
-						reg = <0x985 0x440>;
+						reg = <0x985 0x3d8>;
 					};
 
 					macaddr_urlader_a91: macaddr at a91 {
@@ -94,7 +94,7 @@
 };
 
 &wifi {
-	/delete-property/ qca,no-eeprom;
+	compatible = "pci168c,002e";
 	nvmem-cells = <&cal_urlader_985>;
 	nvmem-cell-names = "calibration";
 };
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts
index cbe6c14c99..9301b049ca 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts
@@ -49,6 +49,10 @@
 					#address-cells = <1>;
 					#size-cells = <1>;
 
+					cal_urlader_985: cal at 985 {
+						reg = <0x985 0x3d8>;
+					};
+
 					macaddr_urlader_a91: macaddr at a91 {
 						compatible = "mac-base";
 						reg = <0xa91 0x6>;
@@ -89,3 +93,9 @@
 &phy1 {
 	reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 };
+
+&wifi {
+	compatible = "pci168c,002e";
+	nvmem-cells = <&cal_urlader_985>;
+	nvmem-cell-names = "calibration";
+};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts
index 7929bde6cf..e1334fa306 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts
@@ -127,3 +127,8 @@
 &phy1 {
 	reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 };
+
+&wifi {
+	compatible = "pci168c,0030";
+	qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
+};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
index e7fc9a4f55..cc0c97da89 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
@@ -155,10 +155,8 @@
 		#address-cells = <2>;
 		device_type = "pci";
 
-		wifi: wifi at 168c,002e {
-			compatible = "pci168c,002e";
+		wifi: wifi at 0,0 {
 			reg = <0 0 0 0 0>;
-			qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
 		};
 	};
 };
diff --git a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
index 164e2d39ca..936181c693 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
+++ b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
@@ -19,9 +19,6 @@ case "$FIRMWARE" in
 			avm,fritz3390)
 				caldata_extract_reverse "urlader" 0x2546 0x440
 				;;
-			avm,fritz7360sl)
-				caldata_extract "urlader" 0x985 0x1000
-				;;
 			avm,fritz7412|\
 			avm,fritz7430)
 				/usr/bin/fritz_cal_extract -i 1 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \



From lede-commits at lists.infradead.org  Fri Jan 10 01:53:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 04:53:56 -0500
Subject: [openwrt/openwrt]  lantiq: fritz7430: fix PCI ID
In-Reply-To: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
References: <173650283215.531362.4099511942060181900@git-01.infra.openwrt.org>
Message-ID: <mailman.36039.1736502842.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/165b9e439387e949561dd7b1f03e07615e252618

commit 165b9e439387e949561dd7b1f03e07615e252618
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Sep 30 16:38:22 2024 -0700

    lantiq: fritz7430: fix PCI ID
    
    This platform has a bogus PCI ID for the chip. Correct it in DTS.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16555
    Link: https://github.com/openwrt/openwrt/pull/17512
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts      | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
index a0af4dff32..7604248cb7 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
@@ -173,8 +173,8 @@
 		#address-cells = <3>;
 		device_type = "pci";
 
-		wifi at 168c,abcd {
-			compatible = "pci168c,abcd";
+		wifi at 0,0 {
+			compatible = "pci168c,0030";
 			reg = <0 0 0 0 0>;
 			qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
 		};



From lede-commits at lists.infradead.org  Fri Jan 10 02:50:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 05:50:51 -0500
Subject: [openwrt/openwrt]  ipq40xx: chromium: Support Chromium "crossystem"
 GPIO tooling
In-Reply-To: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
References: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
Message-ID: <mailman.36139.1736506298.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/992afd2caba654bd0934ff616ed0149cd035661e

commit 992afd2caba654bd0934ff616ed0149cd035661e
Author: Brian Norris <computersforpeace at gmail.com>
AuthorDate: Fri Aug 18 18:53:58 2023 -0700

    ipq40xx: chromium: Support Chromium "crossystem" GPIO tooling
    
    ChromiumOS's vboot_reference tooling [1] provides convenient access to
    various firmware and hardware details via its `crossystem` tool.
    crossystem currently:
    (1) relies on the v1 GPIO cdev API to read GPIOs; and
    (2) expects gpio-line-names properties.
    
    Enable the kernel config, and document a few pins for Google WiFi
    devices.
    
    I only go so far as to pull two relevant names out of the vendor device
    tree. Others could perhaps be backfilled if the info is available and
    useful.
    
    [1] https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/HEAD/README
    
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16014
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/ipq40xx/chromium/config-default       |  1 +
 .../arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts   | 61 ++++++++++++++++++++++
 2 files changed, 62 insertions(+)

diff --git a/target/linux/ipq40xx/chromium/config-default b/target/linux/ipq40xx/chromium/config-default
index d78ca0ab28..29214b6915 100644
--- a/target/linux/ipq40xx/chromium/config-default
+++ b/target/linux/ipq40xx/chromium/config-default
@@ -1,4 +1,5 @@
 CONFIG_BLK_DEV_SD=y
+CONFIG_GPIO_CDEV_V1=y
 CONFIG_SCSI=y
 CONFIG_SCSI_COMMON=y
 CONFIG_SG_POOL=y
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
index c6113e7aab..491a497af0 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts
@@ -74,6 +74,67 @@
 };
 
 &tlmm {
+	gpio-line-names = "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  /* AP_FLASH_WP_L is crossystem ABI. */
+			  "AP_FLASH_WP_L" /* 53 */,
+			  "",
+			  "",
+			  "",
+			  /* RECOVERY_SW_L is crossystem ABI. */
+			  "RECOVERY_SW_L" /* 57 */;
+
 	fw_pinmux: fw_pinmux {
 		wp {
 			pins = "gpio53";



From lede-commits at lists.infradead.org  Fri Jan 10 02:50:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 05:50:52 -0500
Subject: [openwrt/openwrt]  ipq806x: chromium: Support Chromium "crossystem"
 GPIO tooling
In-Reply-To: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
References: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
Message-ID: <mailman.36140.1736506299.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/219ee4d4d73b72490ad4f2bae0427bf35501b22e

commit 219ee4d4d73b72490ad4f2bae0427bf35501b22e
Author: Brian Norris <computersforpeace at gmail.com>
AuthorDate: Fri Aug 18 18:58:48 2023 -0700

    ipq806x: chromium: Support Chromium "crossystem" GPIO tooling
    
    ChromiumOS's vboot_reference tooling [1] provides convenient access to
    various firmware and hardware details via its `crossystem` tool.
    crossystem currently:
    (1) relies on the v1 GPIO cdev API to read GPIOs; and
    (2) expects gpio-line-names properties.
    
    Enable the kernel config, and document a few pins for OnHub devices.
    
    I only go so far as to pull two relevant names out of the vendor device
    tree. Others could perhaps be backfilled if the info is available and
    useful.
    
    [1] https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/HEAD/README
    
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16014
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/ipq806x/chromium/config-default        |  1 +
 .../arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/target/linux/ipq806x/chromium/config-default b/target/linux/ipq806x/chromium/config-default
index 927aba360f..644c6a6c69 100644
--- a/target/linux/ipq806x/chromium/config-default
+++ b/target/linux/ipq806x/chromium/config-default
@@ -1,5 +1,6 @@
 # CONFIG_ARM_QCOM_SPM_CPUIDLE is not set
 CONFIG_BLK_DEV_SD=y
+CONFIG_GPIO_CDEV_V1=y
 CONFIG_LEDS_LP5523=y
 CONFIG_LEDS_LP55XX_COMMON=y
 CONFIG_PHY_QCOM_IPQ806X_USB=y
diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts
index 6adc6be4ae..9fa0ff1858 100644
--- a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts
+++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts
@@ -14,6 +14,27 @@
 };
 
 &qcom_pinmux {
+	gpio-line-names = "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  /* RECOVERY_SW_L is crossystem ABI. */
+			  "RECOVERY_SW_L", /* 16 */
+			  /* AP_FLASH_WP_L is crossystem ABI. */
+			  "AP_FLASH_WP_L" /* 17 */;
+
 	i2c7_pins: i2c7_pinmux {
 		mux {
 			pins = "gpio8", "gpio9";



From lede-commits at lists.infradead.org  Fri Jan 10 02:50:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 05:50:50 -0500
Subject: [openwrt/openwrt]  ipq806x: mtd: spi-nor: micron-st: Add n25q064a WP
 support
In-Reply-To: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
References: <173650625000.618165.1045284103347164073@git-01.infra.openwrt.org>
Message-ID: <mailman.36141.1736506299.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/16373d80dff9fd7c0375018b748275c71b3ca4fc

commit 16373d80dff9fd7c0375018b748275c71b3ca4fc
Author: Brian Norris <computersforpeace at gmail.com>
AuthorDate: Thu Dec 15 01:49:20 2022 -0800

    ipq806x: mtd: spi-nor: micron-st: Add n25q064a WP support
    
    These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
    OnHub devices are write-protected by default (same as any other
    ChromeOS/Chromebook system).
    
    This patch has been submitted upstream, per the notes in the patch file.
    
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16014
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../patches-6.6/901-mtd-spi-nor-n25q064a-wp.patch  | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/target/linux/ipq806x/patches-6.6/901-mtd-spi-nor-n25q064a-wp.patch b/target/linux/ipq806x/patches-6.6/901-mtd-spi-nor-n25q064a-wp.patch
new file mode 100644
index 0000000000..93e15bec61
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.6/901-mtd-spi-nor-n25q064a-wp.patch
@@ -0,0 +1,29 @@
+From 1e019e728800d4033b4b3b1b5570f5da5ed309f2 Mon Sep 17 00:00:00 2001
+From: Brian Norris <computersforpeace at gmail.com>
+Date: Thu, 15 Dec 2022 01:49:20 -0800
+Subject: [PATCH] mtd: spi-nor: micron-st: Add n25q064a WP support
+
+These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
+OnHub devices are write-protected by default (same as any other
+ChromeOS/Chromebook system).
+
+Signed-off-by: Brian Norris <computersforpeace at gmail.com>
+---
+Submitted upstream at:
+  https://lore.kernel.org/linux-mtd/20240726185825.142733-1-computersforpeace at gmail.com/
+  https://patchwork.ozlabs.org/project/linux-mtd/patch/20240726185825.142733-1-computersforpeace at gmail.com/
+
+ drivers/mtd/spi-nor/micron-st.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/mtd/spi-nor/micron-st.c
++++ b/drivers/mtd/spi-nor/micron-st.c
+@@ -183,6 +183,8 @@ static const struct flash_info st_nor_pa
+ 	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128)
+ 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
+ 	{ "n25q064a",    INFO(0x20bb17, 0, 64 * 1024,  128)
++		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
++		      SPI_NOR_BP3_SR_BIT6)
+ 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
+ 	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256)
+ 		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |



From lede-commits at lists.infradead.org  Fri Jan 10 04:41:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 07:41:38 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.70
In-Reply-To: <173651289825.833779.8383141442082468310@git-01.infra.openwrt.org>
References: <173651289825.833779.8383141442082468310@git-01.infra.openwrt.org>
Message-ID: <mailman.36323.1736514817.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/efafd7d47f8fa26a9f99283605c9324a833ef852

commit efafd7d47f8fa26a9f99283605c9324a833ef852
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 9 08:54:54 2025 -0500

    kernel: bump 6.6 to 6.6.70
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.70
    
    Removed upstreamed:
            generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch[1]
            generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch[2]
    
    All other patches automatically rebased.
    
    1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.70&id=0c896816aa193e6459fc947747e5753c06b395b9
    2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.70&id=4f49349c1963e507aa37c1ec05178faeb0103959
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17545
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 include/kernel-6.6                                 |  4 +-
 ...-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch |  2 +-
 ...ck-extend-guard-with-spinlock_bh-variants.patch | 12 +--
 ...rt-xhci-add-quirk-for-host-controllers-th.patch |  4 +-
 ...-for-all-the-downstream-rpi-sound-card-dr.patch |  2 +-
 ...ent-xhci_fixup_endpoint-for-interval-adju.patch |  4 +-
 ...rkaround-for-bogus-SET_DEQ_PENDING-endpoi.patch |  2 +-
 ...op-and-add-the-endpoint-context-in-xhci_f.patch |  2 +-
 ...Use-more-event-ring-segment-table-entries.patch |  2 +-
 ...-xhci-quirks-add-link-TRB-quirk-for-VL805.patch |  4 +-
 ...84-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch |  2 +-
 ...0-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch |  8 +-
 ...usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  4 +-
 ...-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch |  4 +-
 ...vmscan-Maintain-TLB-coherency-in-LRU-code.patch |  2 +-
 ...re-add-support-for-setting-NAK-enhancemen.patch |  4 +-
 ...-xhci-prevent-a-theoretical-race-on-non-c.patch |  2 +-
 ...-add-support-for-performing-fake-doorbell.patch |  6 +-
 ...conditional-threaded-NAPI-wakeup-based-on.patch |  6 +-
 ...Allow-to-use-SMP-threads-for-backlog-NAPI.patch | 22 +++---
 ...e-backlog-NAPI-to-clean-up-the-defer_list.patch |  2 +-
 ...v6.10-net-Rename-rps_lock-to-backlog_lock.patch | 18 ++---
 ...v6.11-net-Make-USO-depend-on-CSUM-offload.patch |  6 +-
 ...stats64-if-device-if-driver-is-configured.patch |  2 +-
 ...0-net-create-a-dummy-net_device-allocator.patch |  6 +-
 ...70-net-introduce-napi_is_scheduled-helper.patch |  2 +-
 ....11-net-free_netdev-exit-earlier-if-dummy.patch |  2 +-
 .../902-net-llc-reset-skb-transport_header.patch   | 52 -------------
 .../generic/hack-6.6/901-debloat_sock_diag.patch   |  2 +-
 .../linux/generic/hack-6.6/902-debloat_proc.patch  |  2 +-
 ...ft_set_hash-unaligned-atomic-read-on-stru.patch | 87 ----------------------
 .../pending-6.6/630-packet_socket_type.patch       | 16 ++--
 ...NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch |  2 +-
 ...2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch |  2 +-
 .../810-uvc-add-iPassion-iP2970-support.patch      |  2 +-
 .../825-i2c-MIPS-adds-ralink-I2C-driver.patch      |  2 +-
 .../patches-6.6/310-add-i2c-rtl9300-support.patch  |  2 +-
 ...sb-dwc3-add-optional-PHY-interface-clocks.patch |  4 +-
 ...-improve-performance-usb-using-lowmem-for.patch | 16 ++--
 39 files changed, 93 insertions(+), 232 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 6cee9d1e8c..1cda04d0c5 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .69
-LINUX_KERNEL_HASH-6.6.69 = 9c6305567b75d99514cde6eb9de39973f3d5c857a75bd9dcdfca57041f8d4f34
+LINUX_VERSION-6.6 = .70
+LINUX_KERNEL_HASH-6.6.70 = 84d23ee07fb26febbcb6d1295ba15efdc67ac382b4137b2c8853146c10fd2f97
diff --git a/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch b/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
index 25eb475e21..46c376e343 100644
--- a/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
+++ b/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
@@ -16,7 +16,7 @@ Signed-off-by: Andi Shyti <andi.shyti at kernel.org>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -839,7 +839,7 @@ config I2C_MT65XX
+@@ -841,7 +841,7 @@ config I2C_MT65XX
  
  config I2C_MT7621
  	tristate "MT7621/MT7628 I2C Controller"
diff --git a/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch b/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
index e613b69f81..d4905d5fff 100644
--- a/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
+++ b/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
@@ -12,9 +12,9 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 
 --- a/include/linux/spinlock.h
 +++ b/include/linux/spinlock.h
-@@ -515,6 +515,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
- 		    raw_spin_lock_irq(_T->lock),
- 		    raw_spin_unlock_irq(_T->lock))
+@@ -519,6 +519,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
+ 
+ DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irq, _try, raw_spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(raw_spinlock_bh, raw_spinlock_t,
 +		    raw_spin_lock_bh(_T->lock),
@@ -23,9 +23,9 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t,
  		    raw_spin_lock_irqsave(_T->lock, _T->flags),
  		    raw_spin_unlock_irqrestore(_T->lock, _T->flags),
-@@ -528,6 +532,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
- 		    spin_lock_irq(_T->lock),
- 		    spin_unlock_irq(_T->lock))
+@@ -540,6 +544,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
+ DEFINE_LOCK_GUARD_1_COND(spinlock_irq, _try,
+ 			 spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(spinlock_bh, spinlock_t,
 +		    spin_lock_bh(_T->lock),
diff --git a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
index f8aa2fe5a7..7dc38f0611 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
@@ -28,7 +28,7 @@ We don't agree with upstream revert so undo it.
  		pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -633,8 +633,11 @@ static int xhci_move_dequeue_past_td(str
+@@ -634,8 +634,11 @@ static int xhci_move_dequeue_past_td(str
  	struct xhci_ring *ep_ring;
  	struct xhci_command *cmd;
  	struct xhci_segment *new_seg;
@@ -40,7 +40,7 @@ We don't agree with upstream revert so undo it.
  	dma_addr_t addr;
  	u64 hw_dequeue;
  	bool cycle_found = false;
-@@ -672,7 +675,27 @@ static int xhci_move_dequeue_past_td(str
+@@ -673,7 +676,27 @@ static int xhci_move_dequeue_past_td(str
  	hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
  	new_seg = ep_ring->deq_seg;
  	new_deq = ep_ring->dequeue;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
index ecb7bffa02..fe0e2275f1 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
@@ -17583,7 +17583,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
  	 * For devices with more than one control interface, we assume the
 --- a/sound/usb/quirks.c
 +++ b/sound/usb/quirks.c
-@@ -2247,6 +2247,8 @@ static const struct usb_audio_quirk_flag
+@@ -2249,6 +2249,8 @@ static const struct usb_audio_quirk_flag
  		   QUIRK_FLAG_ALIGN_TRANSFER),
  	DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
  		   QUIRK_FLAG_ALIGN_TRANSFER),
diff --git a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
index 942f47a0a3..157fedf270 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
@@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.org>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1497,6 +1497,109 @@ command_cleanup:
+@@ -1498,6 +1498,109 @@ command_cleanup:
  }
  
  /*
@@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.org>
   * non-error returns are a promise to giveback() the urb later
   * we drop ownership so next owner (or urb unlink) can get it
   */
-@@ -5347,6 +5450,7 @@ static const struct hc_driver xhci_hc_dr
+@@ -5360,6 +5463,7 @@ static const struct hc_driver xhci_hc_dr
  	.endpoint_reset =	xhci_endpoint_reset,
  	.check_bandwidth =	xhci_check_bandwidth,
  	.reset_bandwidth =	xhci_reset_bandwidth,
diff --git a/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch b/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
index 32681a1bc4..bae9286365 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
@@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -738,9 +738,9 @@ deq_found:
+@@ -739,9 +739,9 @@ deq_found:
  	}
  
  	if ((ep->ep_state & SET_DEQ_PENDING)) {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
index 1e5bb6059d..70401f6e7b 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1586,7 +1586,7 @@ static void xhci_fixup_endpoint(struct u
+@@ -1587,7 +1587,7 @@ static void xhci_fixup_endpoint(struct u
  		return;
  	}
  	ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index);
diff --git a/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch b/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
index ff8c9223b5..874725601c 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1425,8 +1425,9 @@ struct urb_priv {
+@@ -1426,8 +1426,9 @@ struct urb_priv {
   * Each segment table entry is 4*32bits long.  1K seems like an ok size:
   * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
   * meaning 64 ring segments.
diff --git a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
index 93e45b5442..5547943880 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
@@ -34,7 +34,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -728,6 +728,15 @@ static int xhci_move_dequeue_past_td(str
+@@ -729,6 +729,15 @@ static int xhci_move_dequeue_past_td(str
  	} while (!cycle_found || !td_last_trb_found);
  
  deq_found:
@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	addr = xhci_trb_virt_to_dma(new_seg, new_deq);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1663,6 +1663,9 @@ struct xhci_hcd {
+@@ -1664,6 +1664,9 @@ struct xhci_hcd {
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
index add65ee641..a1e8f9ed22 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
@@ -100,7 +100,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1665,6 +1665,7 @@ struct xhci_hcd {
+@@ -1666,6 +1666,7 @@ struct xhci_hcd {
  
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)
diff --git a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
index 9c45bd77e9..26abb99fe6 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
@@ -75,7 +75,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3674,6 +3674,48 @@ static int xhci_align_td(struct xhci_hcd
+@@ -3714,6 +3714,48 @@ static int xhci_align_td(struct xhci_hcd
  	return 1;
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* This is very similar to what ehci-q.c qtd_fill() does */
  int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
  		struct urb *urb, int slot_id, unsigned int ep_index)
-@@ -3830,6 +3872,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3870,6 +3912,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  	}
  
  	check_trb_math(urb, enqd_len);
@@ -133,7 +133,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
  			start_cycle, start_trb);
  	return 0;
-@@ -3979,6 +4023,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -4019,6 +4063,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
  			/* Event on completion */
  			field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
  
@@ -144,7 +144,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	return 0;
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1666,6 +1666,7 @@ struct xhci_hcd {
+@@ -1667,6 +1667,7 @@ struct xhci_hcd {
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)
  #define XHCI_VLI_SS_BULK_OUT_BUG	BIT_ULL(57)
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index 551bfccc75..2448bd942a 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -333,7 +333,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* Global Debug LSP MUX Select */
  #define DWC3_GDBGLSPMUX_ENDBC		BIT(15)	/* Host only */
  #define DWC3_GDBGLSPMUX_HOSTSELECT(n)	((n) & 0x3fff)
-@@ -1062,6 +1065,7 @@ struct dwc3_scratchpad_array {
+@@ -1066,6 +1069,7 @@ struct dwc3_scratchpad_array {
   * @tx_max_burst_prd: max periodic ESS transmit burst size
   * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
   * @clear_stall_protocol: endpoint number that requires a delayed status phase
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1299,6 +1303,7 @@ struct dwc3 {
+@@ -1303,6 +1307,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
index 706baccdc7..6eb5e5697f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
@@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST	BIT(10)
  
  /* Global Status Register */
-@@ -1117,10 +1118,12 @@ struct dwc3_scratchpad_array {
+@@ -1121,10 +1122,12 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1347,6 +1350,7 @@ struct dwc3 {
+@@ -1351,6 +1354,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch b/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
index 70ece97505..3c60865aa7 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
@@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/mm/vmscan.c
 +++ b/mm/vmscan.c
-@@ -4716,7 +4716,7 @@ void lru_gen_look_around(struct page_vma
+@@ -4723,7 +4723,7 @@ void lru_gen_look_around(struct page_vma
  		if (!folio)
  			continue;
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
index ed7dbb0e6c..cb4f6deb39 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS		BIT(17)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS		BIT(16)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS	BIT(15)
-@@ -1118,6 +1120,8 @@ struct dwc3_scratchpad_array {
+@@ -1122,6 +1124,8 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -66,7 +66,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
   *			Superspeed instances.
   * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1348,6 +1352,8 @@ struct dwc3 {
+@@ -1352,6 +1356,8 @@ struct dwc3 {
  	unsigned		dis_tx_ipgap_linecheck_quirk:1;
  	unsigned		resume_hs_terminations:1;
  	unsigned		ulpi_ext_vbus_drv:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch b/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
index d3ea1041c2..c2f37a0fc1 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
@@ -28,7 +28,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -505,6 +505,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
+@@ -506,6 +506,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
  
  	trace_xhci_ring_ep_doorbell(slot_id, DB_VALUE(ep_index, stream_id));
  
diff --git a/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
index 7ac12a290f..aef8435148 100644
--- a/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
+++ b/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
@@ -35,7 +35,7 @@ it on BCM4708 family.
  /* called during probe() after chip reset completes */
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -161,6 +161,49 @@ int xhci_start(struct xhci_hcd *xhci)
+@@ -162,6 +162,49 @@ int xhci_start(struct xhci_hcd *xhci)
  	return ret;
  }
  
@@ -85,7 +85,7 @@ it on BCM4708 family.
  /*
   * Reset a halted HC.
   *
-@@ -480,6 +523,15 @@ static int xhci_run_finished(struct xhci
+@@ -481,6 +524,15 @@ static int xhci_run_finished(struct xhci
  		return -ENODEV;
  	}
  
@@ -103,7 +103,7 @@ it on BCM4708 family.
  	if (xhci->quirks & XHCI_NEC_HOST)
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1661,6 +1661,7 @@ struct xhci_hcd {
+@@ -1662,6 +1662,7 @@ struct xhci_hcd {
  #define XHCI_WRITE_64_HI_LO	BIT_ULL(47)
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
diff --git a/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch b/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
index 6ee4716c5c..a6164c8238 100644
--- a/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
+++ b/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
@@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -4481,13 +4481,7 @@ static inline void ____napi_schedule(str
+@@ -4483,13 +4483,7 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -47,7 +47,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			wake_up_process(thread);
  			return;
  		}
-@@ -6643,8 +6637,6 @@ static int napi_poll(struct napi_struct
+@@ -6645,8 +6639,6 @@ static int napi_poll(struct napi_struct
  
  static int napi_thread_wait(struct napi_struct *napi)
  {
@@ -56,7 +56,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	set_current_state(TASK_INTERRUPTIBLE);
  
  	while (!kthread_should_stop()) {
-@@ -6653,15 +6645,13 @@ static int napi_thread_wait(struct napi_
+@@ -6655,15 +6647,13 @@ static int napi_thread_wait(struct napi_
  		 * Testing SCHED bit is not enough because SCHED bit might be
  		 * set by some other busy poll thread or by napi_disable().
  		 */
diff --git a/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch b/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
index 8c0b41f37b..b3729e8b6c 100644
--- a/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
+++ b/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
@@ -108,7 +108,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  static inline void rps_lock_irqsave(struct softnet_data *sd,
  				    unsigned long *flags)
  {
-@@ -4449,6 +4475,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
+@@ -4451,6 +4477,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
  /*************************************************************************
   *			Receiver routines
   *************************************************************************/
@@ -116,7 +116,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  int netdev_max_backlog __read_mostly = 1000;
  EXPORT_SYMBOL(netdev_max_backlog);
-@@ -4481,12 +4508,16 @@ static inline void ____napi_schedule(str
+@@ -4483,12 +4510,16 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -133,7 +133,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	list_add_tail(&napi->poll_list, &sd->poll_list);
  	WRITE_ONCE(napi->list_owner, smp_processor_id());
  	/* If not called from net_rx_action()
-@@ -4732,6 +4763,11 @@ static void napi_schedule_rps(struct sof
+@@ -4734,6 +4765,11 @@ static void napi_schedule_rps(struct sof
  
  #ifdef CONFIG_RPS
  	if (sd != mysd) {
@@ -145,7 +145,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		sd->rps_ipi_next = mysd->rps_ipi_list;
  		mysd->rps_ipi_list = sd;
  
-@@ -5955,7 +5991,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5957,7 +5993,7 @@ static void net_rps_action_and_irq_enabl
  #ifdef CONFIG_RPS
  	struct softnet_data *remsd = sd->rps_ipi_list;
  
@@ -154,7 +154,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		sd->rps_ipi_list = NULL;
  
  		local_irq_enable();
-@@ -5970,7 +6006,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5972,7 +6008,7 @@ static void net_rps_action_and_irq_enabl
  static bool sd_has_rps_ipi_waiting(struct softnet_data *sd)
  {
  #ifdef CONFIG_RPS
@@ -163,7 +163,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  #else
  	return false;
  #endif
-@@ -6014,7 +6050,7 @@ static int process_backlog(struct napi_s
+@@ -6016,7 +6052,7 @@ static int process_backlog(struct napi_s
  			 * We can use a plain write instead of clear_bit(),
  			 * and we dont need an smp_mb() memory barrier.
  			 */
@@ -172,7 +172,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			again = false;
  		} else {
  			skb_queue_splice_tail_init(&sd->input_pkt_queue,
-@@ -6680,43 +6716,48 @@ static void skb_defer_free_flush(struct
+@@ -6682,43 +6718,48 @@ static void skb_defer_free_flush(struct
  	}
  }
  
@@ -250,7 +250,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	return 0;
  }
  
-@@ -11297,7 +11338,7 @@ static int dev_cpu_dead(unsigned int old
+@@ -11299,7 +11340,7 @@ static int dev_cpu_dead(unsigned int old
  
  		list_del_init(&napi->poll_list);
  		if (napi->poll == process_backlog)
@@ -259,7 +259,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		else
  			____napi_schedule(sd, napi);
  	}
-@@ -11305,12 +11346,14 @@ static int dev_cpu_dead(unsigned int old
+@@ -11307,12 +11348,14 @@ static int dev_cpu_dead(unsigned int old
  	raise_softirq_irqoff(NET_TX_SOFTIRQ);
  	local_irq_enable();
  
@@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	/* Process offline CPU's input_pkt_queue */
  	while ((skb = __skb_dequeue(&oldsd->process_queue))) {
-@@ -11573,6 +11616,38 @@ static struct pernet_operations __net_in
+@@ -11575,6 +11618,38 @@ static struct pernet_operations __net_in
   *
   */
  
@@ -317,7 +317,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  /*
   *       This is called single threaded during boot, so no need
   *       to take the rtnl semaphore.
-@@ -11623,7 +11698,10 @@ static int __init net_dev_init(void)
+@@ -11625,7 +11700,10 @@ static int __init net_dev_init(void)
  		init_gro_hash(&sd->backlog);
  		sd->backlog.poll = process_backlog;
  		sd->backlog.weight = weight_p;
diff --git a/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch b/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
index 3fcc72e589..82b83552d3 100644
--- a/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
+++ b/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
@@ -82,7 +82,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		spin_unlock_irq(&sd->input_pkt_queue.lock);
  	else if (!IS_ENABLED(CONFIG_PREEMPT_RT))
  		local_irq_enable();
-@@ -4782,6 +4782,23 @@ static void napi_schedule_rps(struct sof
+@@ -4784,6 +4784,23 @@ static void napi_schedule_rps(struct sof
  	__napi_schedule_irqoff(&mysd->backlog);
  }
  
diff --git a/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch b/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
index 056bd5686e..a6199cd250 100644
--- a/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
+++ b/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
@@ -67,7 +67,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  {
  	if (IS_ENABLED(CONFIG_RPS) || use_backlog_threads())
  		spin_unlock_irq(&sd->input_pkt_queue.lock);
-@@ -4787,12 +4787,12 @@ void kick_defer_list_purge(struct softne
+@@ -4789,12 +4789,12 @@ void kick_defer_list_purge(struct softne
  	unsigned long flags;
  
  	if (use_backlog_threads()) {
@@ -82,7 +82,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	} else if (!cmpxchg(&sd->defer_ipi_scheduled, 0, 1)) {
  		smp_call_function_single_async(cpu, &sd->defer_csd);
-@@ -4854,7 +4854,7 @@ static int enqueue_to_backlog(struct sk_
+@@ -4856,7 +4856,7 @@ static int enqueue_to_backlog(struct sk_
  	reason = SKB_DROP_REASON_NOT_SPECIFIED;
  	sd = &per_cpu(softnet_data, cpu);
  
@@ -91,7 +91,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	if (!netif_running(skb->dev))
  		goto drop;
  	qlen = skb_queue_len(&sd->input_pkt_queue);
-@@ -4863,7 +4863,7 @@ static int enqueue_to_backlog(struct sk_
+@@ -4865,7 +4865,7 @@ static int enqueue_to_backlog(struct sk_
  enqueue:
  			__skb_queue_tail(&sd->input_pkt_queue, skb);
  			input_queue_tail_incr_save(sd, qtail);
@@ -100,7 +100,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			return NET_RX_SUCCESS;
  		}
  
-@@ -4878,7 +4878,7 @@ enqueue:
+@@ -4880,7 +4880,7 @@ enqueue:
  
  drop:
  	sd->dropped++;
@@ -109,7 +109,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	dev_core_stats_rx_dropped_inc(skb->dev);
  	kfree_skb_reason(skb, reason);
-@@ -5909,7 +5909,7 @@ static void flush_backlog(struct work_st
+@@ -5911,7 +5911,7 @@ static void flush_backlog(struct work_st
  	local_bh_disable();
  	sd = this_cpu_ptr(&softnet_data);
  
@@ -118,7 +118,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) {
  		if (skb->dev->reg_state == NETREG_UNREGISTERING) {
  			__skb_unlink(skb, &sd->input_pkt_queue);
-@@ -5917,7 +5917,7 @@ static void flush_backlog(struct work_st
+@@ -5919,7 +5919,7 @@ static void flush_backlog(struct work_st
  			input_queue_head_incr(sd);
  		}
  	}
@@ -127,7 +127,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	skb_queue_walk_safe(&sd->process_queue, skb, tmp) {
  		if (skb->dev->reg_state == NETREG_UNREGISTERING) {
-@@ -5935,14 +5935,14 @@ static bool flush_required(int cpu)
+@@ -5937,14 +5937,14 @@ static bool flush_required(int cpu)
  	struct softnet_data *sd = &per_cpu(softnet_data, cpu);
  	bool do_flush;
  
@@ -144,7 +144,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	return do_flush;
  #endif
-@@ -6057,7 +6057,7 @@ static int process_backlog(struct napi_s
+@@ -6059,7 +6059,7 @@ static int process_backlog(struct napi_s
  
  		}
  
@@ -153,7 +153,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		if (skb_queue_empty(&sd->input_pkt_queue)) {
  			/*
  			 * Inline a custom version of __napi_complete().
-@@ -6073,7 +6073,7 @@ static int process_backlog(struct napi_s
+@@ -6075,7 +6075,7 @@ static int process_backlog(struct napi_s
  			skb_queue_splice_tail_init(&sd->input_pkt_queue,
  						   &sd->process_queue);
  		}
diff --git a/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
index 42aff7f0af..6b5272d583 100644
--- a/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
+++ b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
@@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -9759,6 +9759,15 @@ static void netdev_sync_lower_features(s
+@@ -9761,6 +9761,15 @@ static void netdev_sync_lower_features(s
  	}
  }
  
@@ -36,7 +36,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static netdev_features_t netdev_fix_features(struct net_device *dev,
  	netdev_features_t features)
  {
-@@ -9840,15 +9849,9 @@ static netdev_features_t netdev_fix_feat
+@@ -9842,15 +9851,9 @@ static netdev_features_t netdev_fix_feat
  		features &= ~NETIF_F_LRO;
  	}
  
@@ -55,7 +55,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	}
  
  	if ((features & NETIF_F_HW_TLS_RX) && !(features & NETIF_F_RXCSUM)) {
-@@ -9856,6 +9859,11 @@ static netdev_features_t netdev_fix_feat
+@@ -9858,6 +9861,11 @@ static netdev_features_t netdev_fix_feat
  		features &= ~NETIF_F_HW_TLS_RX;
  	}
  
diff --git a/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch b/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
index d72882dbb6..8f2c26d654 100644
--- a/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
+++ b/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
@@ -18,7 +18,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10666,6 +10666,8 @@ struct rtnl_link_stats64 *dev_get_stats(
+@@ -10668,6 +10668,8 @@ struct rtnl_link_stats64 *dev_get_stats(
  		ops->ndo_get_stats64(dev, storage);
  	} else if (ops->ndo_get_stats) {
  		netdev_stats_to_stats64(storage, ops->ndo_get_stats(dev));
diff --git a/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch b/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
index 3f48a8c34a..c8b4ccc300 100644
--- a/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
+++ b/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
@@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  				    unsigned char name_assign_type,
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10353,25 +10353,12 @@ err_free_name:
+@@ -10355,25 +10355,12 @@ err_free_name:
  }
  EXPORT_SYMBOL(register_netdevice);
  
@@ -79,7 +79,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  	/* make sure we BUG if trying to hit standard
  	 * register/unregister code path
  	 */
-@@ -10391,12 +10378,32 @@ int init_dummy_netdev(struct net_device
+@@ -10393,12 +10380,32 @@ int init_dummy_netdev(struct net_device
  	 * because users of this 'device' dont need to change
  	 * its refcount.
  	 */
@@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  /**
   *	register_netdev	- register a network device
   *	@dev: device to register
-@@ -10990,6 +10997,19 @@ void free_netdev(struct net_device *dev)
+@@ -10992,6 +10999,19 @@ void free_netdev(struct net_device *dev)
  EXPORT_SYMBOL(free_netdev);
  
  /**
diff --git a/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch b/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
index d7b2b27506..2bf136e18a 100644
--- a/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
+++ b/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
@@ -85,7 +85,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  /**
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -6610,7 +6610,7 @@ static int __napi_poll(struct napi_struc
+@@ -6612,7 +6612,7 @@ static int __napi_poll(struct napi_struc
  	 * accidentally calling ->poll() when NAPI is not scheduled.
  	 */
  	work = 0;
diff --git a/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch b/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
index 21db87419e..5f7210812f 100644
--- a/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
+++ b/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
@@ -23,7 +23,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10983,7 +10983,8 @@ void free_netdev(struct net_device *dev)
+@@ -10985,7 +10985,8 @@ void free_netdev(struct net_device *dev)
  	dev->xdp_bulkq = NULL;
  
  	/*  Compatibility with error handling in drivers */
diff --git a/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch b/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch
deleted file mode 100644
index b1f0b8fce7..0000000000
--- a/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From a024e377efed31ecfb39210bed562932321345b3 Mon Sep 17 00:00:00 2001
-From: Antonio Pastor <antonio.pastor at gmail.com>
-Date: Tue, 24 Dec 2024 20:07:20 -0500
-Subject: [PATCH] net: llc: reset skb->transport_header
-
-802.2+LLC+SNAP frames received by napi_complete_done with GRO and DSA
-have skb->transport_header set two bytes short, or pointing 2 bytes
-before network_header & skb->data. As snap_rcv expects transport_header
-to point to SNAP header (OID:PID) after LLC processing advances offset
-over LLC header (llc_rcv & llc_fixup_skb), code doesn't find a match
-and packet is dropped.
-
-Between napi_complete_done and snap_rcv, transport_header is not used
-until __netif_receive_skb_core, where originally it was being reset.
-Commit fda55eca5a33 ("net: introduce skb_transport_header_was_set()")
-only does so if not set, on the assumption the value was set correctly
-by GRO (and also on assumption that "network stacks usually reset the
-transport header anyway"). Afterwards it is moved forward by
-llc_fixup_skb.
-
-Locally generated traffic shows up at __netif_receive_skb_core with no
-transport_header set and is processed without issue. On a setup with
-GRO but no DSA, transport_header and network_header are both set to
-point to skb->data which is also correct.
-
-As issue is LLC specific, to avoid impacting non-LLC traffic, and to
-follow up on original assumption made on previous code change,
-llc_fixup_skb to reset the offset after skb pull. llc_fixup_skb
-assumes the LLC header is at skb->data, and by definition SNAP header
-immediately follows.
-
-Fixes: fda55eca5a33 ("net: introduce skb_transport_header_was_set()")
-Signed-off-by: Antonio Pastor <antonio.pastor at gmail.com>
-Reviewed-by: Eric Dumazet <edumazet at google.com>
-Link: https://patch.msgid.link/20241225010723.2830290-1-antonio.pastor at gmail.com
-Signed-off-by: Jakub Kicinski <kuba at kernel.org>
----
- net/llc/llc_input.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/net/llc/llc_input.c
-+++ b/net/llc/llc_input.c
-@@ -124,8 +124,8 @@ static inline int llc_fixup_skb(struct s
- 	if (unlikely(!pskb_may_pull(skb, llc_len)))
- 		return 0;
- 
--	skb->transport_header += llc_len;
- 	skb_pull(skb, llc_len);
-+	skb_reset_transport_header(skb);
- 	if (skb->protocol == htons(ETH_P_802_2)) {
- 		__be16 pdulen;
- 		s32 data_size;
diff --git a/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch b/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
index 4b1ea3c5ad..c0ba6c008e 100644
--- a/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
+++ b/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
@@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  INDIRECT_CALLABLE_DECLARE(struct dst_entry *ip6_dst_check(struct dst_entry *,
  							  u32));
  INDIRECT_CALLABLE_DECLARE(struct dst_entry *ipv4_dst_check(struct dst_entry *,
-@@ -2239,9 +2256,11 @@ static void __sk_free(struct sock *sk)
+@@ -2242,9 +2259,11 @@ static void __sk_free(struct sock *sk)
  	if (likely(sk->sk_net_refcnt))
  		sock_inuse_add(sock_net(sk), -1);
  
diff --git a/target/linux/generic/hack-6.6/902-debloat_proc.patch b/target/linux/generic/hack-6.6/902-debloat_proc.patch
index 5498507007..8a2f3330ab 100644
--- a/target/linux/generic/hack-6.6/902-debloat_proc.patch
+++ b/target/linux/generic/hack-6.6/902-debloat_proc.patch
@@ -330,7 +330,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
 --- a/net/core/sock.c
 +++ b/net/core/sock.c
-@@ -4140,6 +4140,8 @@ static __net_initdata struct pernet_oper
+@@ -4143,6 +4143,8 @@ static __net_initdata struct pernet_oper
  
  static int __init proto_init(void)
  {
diff --git a/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch b/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch
deleted file mode 100644
index 61e163293e..0000000000
--- a/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 113fb8a8d1f27156f58b27ce0fc02af9b3705bf7 Mon Sep 17 00:00:00 2001
-From: Pablo Neira Ayuso <pablo at netfilter.org>
-Date: Sun, 22 Dec 2024 11:02:39 +0100
-Subject: [PATCH] netfilter: nft_set_hash: unaligned atomic read on struct
- nft_set_ext
-
-Access to genmask field in struct nft_set_ext results in unaligned
-atomic read:
-
-[   72.130109] Unable to handle kernel paging request at virtual address ffff0000c2bb708c
-[   72.131036] Mem abort info:
-[   72.131213]   ESR = 0x0000000096000021
-[   72.131446]   EC = 0x25: DABT (current EL), IL = 32 bits
-[   72.132209]   SET = 0, FnV = 0
-[   72.133216]   EA = 0, S1PTW = 0
-[   72.134080]   FSC = 0x21: alignment fault
-[   72.135593] Data abort info:
-[   72.137194]   ISV = 0, ISS = 0x00000021, ISS2 = 0x00000000
-[   72.142351]   CM = 0, WnR = 0, TnD = 0, TagAccess = 0
-[   72.145989]   GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
-[   72.150115] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000237d27000
-[   72.154893] [ffff0000c2bb708c] pgd=0000000000000000, p4d=180000023ffff403, pud=180000023f84b403, pmd=180000023f835403,
-+pte=0068000102bb7707
-[   72.163021] Internal error: Oops: 0000000096000021 [#1] SMP
-[...]
-[   72.170041] CPU: 7 UID: 0 PID: 54 Comm: kworker/7:0 Tainted: G            E      6.13.0-rc3+ #2
-[   72.170509] Tainted: [E]=UNSIGNED_MODULE
-[   72.170720] Hardware name: QEMU QEMU Virtual Machine, BIOS edk2-stable202302-for-qemu 03/01/2023
-[   72.171192] Workqueue: events_power_efficient nft_rhash_gc [nf_tables]
-[   72.171552] pstate: 21400005 (nzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
-[   72.171915] pc : nft_rhash_gc+0x200/0x2d8 [nf_tables]
-[   72.172166] lr : nft_rhash_gc+0x128/0x2d8 [nf_tables]
-[   72.172546] sp : ffff800081f2bce0
-[   72.172724] x29: ffff800081f2bd40 x28: ffff0000c2bb708c x27: 0000000000000038
-[   72.173078] x26: ffff0000c6780ef0 x25: ffff0000c643df00 x24: ffff0000c6778f78
-[   72.173431] x23: 000000000000001a x22: ffff0000c4b1f000 x21: ffff0000c6780f78
-[   72.173782] x20: ffff0000c2bb70dc x19: ffff0000c2bb7080 x18: 0000000000000000
-[   72.174135] x17: ffff0000c0a4e1c0 x16: 0000000000003000 x15: 0000ac26d173b978
-[   72.174485] x14: ffffffffffffffff x13: 0000000000000030 x12: ffff0000c6780ef0
-[   72.174841] x11: 0000000000000000 x10: ffff800081f2bcf8 x9 : ffff0000c3000000
-[   72.175193] x8 : 00000000000004be x7 : 0000000000000000 x6 : 0000000000000000
-[   72.175544] x5 : 0000000000000040 x4 : ffff0000c3000010 x3 : 0000000000000000
-[   72.175871] x2 : 0000000000003a98 x1 : ffff0000c2bb708c x0 : 0000000000000004
-[   72.176207] Call trace:
-[   72.176316]  nft_rhash_gc+0x200/0x2d8 [nf_tables] (P)
-[   72.176653]  process_one_work+0x178/0x3d0
-[   72.176831]  worker_thread+0x200/0x3f0
-[   72.176995]  kthread+0xe8/0xf8
-[   72.177130]  ret_from_fork+0x10/0x20
-[   72.177289] Code: 54fff984 d503201f d2800080 91003261 (f820303f)
-[   72.177557] ---[ end trace 0000000000000000 ]---
-
-Align struct nft_set_ext to word size to address this and
-documentation it.
-
-pahole reports that this increases the size of elements for rhash and
-pipapo in 8 bytes on x86_64.
-
-Fixes: 7ffc7481153b ("netfilter: nft_set_hash: skip duplicated elements pending gc run")
-Signed-off-by: Pablo Neira Ayuso <pablo at netfilter.org>
----
- include/net/netfilter/nf_tables.h | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/include/net/netfilter/nf_tables.h
-+++ b/include/net/netfilter/nf_tables.h
-@@ -721,15 +721,18 @@ struct nft_set_ext_tmpl {
- /**
-  *	struct nft_set_ext - set extensions
-  *
-- *	@genmask: generation mask
-+ *	@genmask: generation mask, but also flags (see NFT_SET_ELEM_DEAD_BIT)
-  *	@offset: offsets of individual extension types
-  *	@data: beginning of extension data
-+ *
-+ *	This structure must be aligned to word size, otherwise atomic bitops
-+ *	on genmask field can cause aligment failure on some archs.
-  */
- struct nft_set_ext {
- 	u8	genmask;
- 	u8	offset[NFT_SET_EXT_NUM];
- 	char	data[];
--};
-+} __aligned(BITS_PER_LONG / 8);
- 
- static inline void nft_set_ext_prepare(struct nft_set_ext_tmpl *tmpl)
- {
diff --git a/target/linux/generic/pending-6.6/630-packet_socket_type.patch b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
index 2b753efa67..f5c15756c5 100644
--- a/target/linux/generic/pending-6.6/630-packet_socket_type.patch
+++ b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #define PACKET_FANOUT_LB		1
 --- a/net/packet/af_packet.c
 +++ b/net/packet/af_packet.c
-@@ -1925,6 +1925,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1911,6 +1911,7 @@ static int packet_rcv_spkt(struct sk_buf
  {
  	struct sock *sk;
  	struct sockaddr_pkt *spkt;
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	/*
  	 *	When we registered the protocol we saved the socket in the data
-@@ -1932,6 +1933,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1918,6 +1919,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 */
  
  	sk = pt->af_packet_priv;
@@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	/*
  	 *	Yank back the headers [hope the device set this
-@@ -1944,7 +1946,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1930,7 +1932,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 *	so that this procedure is noop.
  	 */
  
@@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		goto out;
  
  	if (!net_eq(dev_net(dev), sock_net(sk)))
-@@ -2190,12 +2192,12 @@ static int packet_rcv(struct sk_buff *sk
+@@ -2176,12 +2178,12 @@ static int packet_rcv(struct sk_buff *sk
  	unsigned int snaplen, res;
  	bool is_drop_n_account = false;
  
@@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -2322,12 +2324,12 @@ static int tpacket_rcv(struct sk_buff *s
+@@ -2308,12 +2310,12 @@ static int tpacket_rcv(struct sk_buff *s
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
  
@@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -3451,6 +3453,7 @@ static int packet_create(struct net *net
+@@ -3437,6 +3439,7 @@ static int packet_create(struct net *net
  	mutex_init(&po->pg_vec_lock);
  	po->rollover = NULL;
  	po->prot_hook.func = packet_rcv;
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	if (sock->type == SOCK_PACKET)
  		po->prot_hook.func = packet_rcv_spkt;
-@@ -4118,6 +4121,16 @@ packet_setsockopt(struct socket *sock, i
+@@ -4104,6 +4107,16 @@ packet_setsockopt(struct socket *sock, i
  		packet_sock_flag_set(po, PACKET_SOCK_QDISC_BYPASS, val);
  		return 0;
  	}
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	default:
  		return -ENOPROTOOPT;
  	}
-@@ -4177,6 +4190,13 @@ static int packet_getsockopt(struct sock
+@@ -4163,6 +4176,13 @@ static int packet_getsockopt(struct sock
  	case PACKET_VNET_HDR_SZ:
  		val = READ_ONCE(po->vnet_hdr_sz);
  		break;
diff --git a/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
index 97e321bfec..58ccff247f 100644
--- a/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
+++ b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
@@ -96,7 +96,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	return features;
 --- a/net/core/sock.c
 +++ b/net/core/sock.c
-@@ -2441,7 +2441,7 @@ void sk_setup_caps(struct sock *sk, stru
+@@ -2444,7 +2444,7 @@ void sk_setup_caps(struct sock *sk, stru
  	if (sk_is_tcp(sk))
  		sk->sk_route_caps |= NETIF_F_GSO;
  	if (sk->sk_route_caps & NETIF_F_GSO)
diff --git a/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch b/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
index 1f2f5139d6..73eb59f166 100644
--- a/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
+++ b/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
@@ -18,7 +18,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -817,6 +817,16 @@ config I2C_MICROCHIP_CORE
+@@ -819,6 +819,16 @@ config I2C_MICROCHIP_CORE
  	  This driver can also be built as a module. If so, the module will be
  	  called i2c-microchip-core.
  
diff --git a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
index c98aaf9442..a01911b1f4 100644
--- a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
+++ b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 
 --- a/drivers/media/usb/uvc/uvc_driver.c
 +++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -3249,6 +3249,18 @@ static const struct usb_device_id uvc_id
+@@ -3271,6 +3271,18 @@ static const struct usb_device_id uvc_id
  	  .bInterfaceSubClass	= 1,
  	  .bInterfaceProtocol	= 0,
  	  .driver_info		= UVC_INFO_META(V4L2_META_FMT_D4XX) },
diff --git a/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
index c8cfb784ce..9755eeb777 100644
--- a/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
+++ b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
@@ -45,7 +45,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 +};
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -1021,6 +1021,11 @@ config I2C_RK3X
+@@ -1023,6 +1023,11 @@ config I2C_RK3X
  	  This driver can also be built as a module. If so, the module will
  	  be called i2c-rk3x.
  
diff --git a/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch b/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
index 71df91bdac..9eaed95d0d 100644
--- a/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
+++ b/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
@@ -17,7 +17,7 @@ Submitted-by: Birger Koblitz <git at birger-koblitz.de>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -1021,6 +1021,16 @@ config I2C_RK3X
+@@ -1023,6 +1023,16 @@ config I2C_RK3X
  	  This driver can also be built as a module. If so, the module will
  	  be called i2c-rk3x.
  
diff --git a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
index 00ca1d4013..d38d260ef1 100644
--- a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
+++ b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
@@ -71,7 +71,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
  
 --- a/drivers/usb/dwc3/core.h
 +++ b/drivers/usb/dwc3/core.h
-@@ -998,6 +998,8 @@ struct dwc3_scratchpad_array {
+@@ -1002,6 +1002,8 @@ struct dwc3_scratchpad_array {
   * @bus_clk: clock for accessing the registers
   * @ref_clk: reference clock
   * @susp_clk: clock used when the SS phy is in low power (S3) state
@@ -80,7 +80,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
   * @reset: reset control
   * @regs: base address for our registers
   * @regs_size: address space size
-@@ -1170,6 +1172,8 @@ struct dwc3 {
+@@ -1174,6 +1176,8 @@ struct dwc3 {
  	struct clk		*bus_clk;
  	struct clk		*ref_clk;
  	struct clk		*susp_clk;
diff --git a/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch b/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
index 847b8e20ff..4c1dfabd9e 100644
--- a/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
+++ b/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
@@ -160,7 +160,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  	}
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3667,7 +3667,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3707,7 +3707,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  
  	full_len = urb->transfer_buffer_length;
  	/* If we have scatter/gather list, we use it. */
@@ -172,7 +172,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  		addr = (u64) sg_dma_address(sg);
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -18,6 +18,8 @@
+@@ -19,6 +19,8 @@
  #include <linux/slab.h>
  #include <linux/dmi.h>
  #include <linux/dma-mapping.h>
@@ -181,7 +181,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  
  #include "xhci.h"
  #include "xhci-trace.h"
-@@ -1285,6 +1287,55 @@ static void xhci_unmap_temp_buf(struct u
+@@ -1286,6 +1288,55 @@ static void xhci_unmap_temp_buf(struct u
  	urb->transfer_buffer = NULL;
  }
  
@@ -237,7 +237,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /*
   * Bypass the DMA mapping if URB is suitable for Immediate Transfer (IDT),
   * we'll copy the actual data into the TRB address register. This is limited to
-@@ -1305,9 +1356,11 @@ static int xhci_map_urb_for_dma(struct u
+@@ -1306,9 +1357,11 @@ static int xhci_map_urb_for_dma(struct u
  		if (xhci_urb_temp_buffer_required(hcd, urb))
  			return xhci_map_temp_buffer(hcd, urb);
  	}
@@ -249,7 +249,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  static void xhci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  {
  	struct xhci_hcd *xhci;
-@@ -1320,8 +1373,10 @@ static void xhci_unmap_urb_for_dma(struc
+@@ -1321,8 +1374,10 @@ static void xhci_unmap_urb_for_dma(struc
  
  	if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf)
  		xhci_unmap_temp_buf(hcd, urb);
@@ -263,7 +263,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /**
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1508,6 +1508,13 @@ struct xhci_hub {
+@@ -1509,6 +1509,13 @@ struct xhci_hub {
  	u8			min_rev;
  };
  
@@ -277,7 +277,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /* There is one xhci_hcd structure per controller */
  struct xhci_hcd {
  	struct usb_hcd *main_hcd;
-@@ -1662,6 +1669,8 @@ struct xhci_hcd {
+@@ -1663,6 +1670,8 @@ struct xhci_hcd {
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
  
@@ -286,7 +286,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  	unsigned int		num_active_eps;
  	unsigned int		limit_active_eps;
  	struct xhci_port	*hw_ports;
-@@ -1691,6 +1700,8 @@ struct xhci_hcd {
+@@ -1692,6 +1701,8 @@ struct xhci_hcd {
  	struct list_head	regset_list;
  
  	void			*dbc;



From lede-commits at lists.infradead.org  Fri Jan 10 04:47:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 07:47:55 -0500
Subject: [openwrt/openwrt]  uboot-rockchip: Fix product name for Radxa ROCK Pi
 4
In-Reply-To: <173651327578.841146.2529035257110071982@git-01.infra.openwrt.org>
References: <173651327578.841146.2529035257110071982@git-01.infra.openwrt.org>
Message-ID: <mailman.36326.1736514829.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c23e177080960e18ea560be95edf09cad8eb51e5

commit c23e177080960e18ea560be95edf09cad8eb51e5
Author: FUKAUMI Naoki <naoki at radxa.com>
AuthorDate: Wed Jan 8 21:59:23 2025 +0000

    uboot-rockchip: Fix product name for Radxa ROCK Pi 4
    
    "ROCK" is the correct series name.
    
     https://radxa.com/products/rock4
    
    Signed-off-by: FUKAUMI Naoki <naoki at radxa.com>
    Link: https://github.com/openwrt/openwrt/pull/17532
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/boot/uboot-rockchip/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index 7070ca973d..02f750a297 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -138,7 +138,7 @@ endef
 
 define U-Boot/rock-pi-4-rk3399
   $(U-Boot/rk3399/Default)
-  NAME:=Rock Pi 4
+  NAME:=ROCK Pi 4
   BUILD_DEVICES:= \
     radxa_rock-pi-4a
 endef



From lede-commits at lists.infradead.org  Fri Jan 10 04:50:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 07:50:34 -0500
Subject: [openwrt/openwrt]  Revert "kernel: Fix alloc_node_mem_map with
 ARCH_PFN_OFFSET"
In-Reply-To: <173651343413.843500.1501360912200923263@git-01.infra.openwrt.org>
References: <173651343413.843500.1501360912200923263@git-01.infra.openwrt.org>
Message-ID: <mailman.36327.1736514829.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ead1b45c76b7ad6bb532ca65124a4e593366be08

commit ead1b45c76b7ad6bb532ca65124a4e593366be08
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Mon Jan 6 08:53:28 2025 +0800

    Revert "kernel: Fix alloc_node_mem_map with ARCH_PFN_OFFSET"
    
    The boot hang issue on ralink rt288x has been fixed in Linux upstream
    commit 7f028bff8a8e ("MIPS: ralink: rt288x: select MIPS_AUTO_PFN_OFFSET")
    Link: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=7f028bff8a8e55a783eeb12e50bb3f5f18804459
    
    This reverts commit b3c5db79eb72fb068809052a9b53ce7282583c0b.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17498
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...c_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch | 82 ----------------------
 1 file changed, 82 deletions(-)

diff --git a/target/linux/generic/pending-6.6/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-6.6/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
deleted file mode 100644
index 099b07ef7a..0000000000
--- a/target/linux/generic/pending-6.6/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From: Tobias Wolf <dev-NTEO at vplace.de>
-Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation
-
-An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any
-kernel beyond version 4.3 resulting in:
-
-BUG: Bad page state in process swapper  pfn:086ac
-
-bisect resulted in:
-
-a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit
-commit a1c34a3bf00af2cede839879502e12dc68491ad5
-Author: Laura Abbott <laura at labbott.name>
-Date:   Thu Nov 5 18:48:46 2015 -0800
-
-    mm: Don't offset memmap for flatmem
-
-    Srinivas Kandagatla reported bad page messages when trying to remove the
-    bottom 2MB on an ARM based IFC6410 board
-
-      BUG: Bad page state in process swapper  pfn:fffa8
-      page:ef7fb500 count:0 mapcount:0 mapping:  (null) index:0x0
-      flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked)
-      page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set
-      bad because of flags:
-      flags: 0x200041(locked|active|mlocked)
-      Modules linked in:
-      CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty
-#816
-      Hardware name: Qualcomm (Flattened Device Tree)
-        unwind_backtrace
-        show_stack
-        dump_stack
-        bad_page
-        free_pages_prepare
-        free_hot_cold_page
-        __free_pages
-        free_highmem_page
-        mem_init
-        start_kernel
-      Disabling lock debugging due to kernel taint
-    [...]
-:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4
-0a8156f848733dfa21e16c196dfb6c0a76290709 M      mm
-
-This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by
-page_to_pfn anymore.
-
-The following output was generated with two hacked in printk statements:
-
-printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map -
-(pgdat->node_start_pfn - ARCH_PFN_OFFSET));
-		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
-			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
-printk("after %p\n", mem_map);
-
-Output:
-
-[    0.000000] before 8861b280 vs. 8861b280 or 8851b280
-[    0.000000] after 8851b280
-
-As seen in the first line mem_map with subtraction of offset does not equal the
-mem_map after subtraction of ARCH_PFN_OFFSET.
-
-After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the
-previously calculated offset is zero for the named platform it is able to boot
-4.4 and 4.9-rc7 again.
-
-Signed-off-by: Tobias Wolf <dev-NTEO at vplace.de>
----
-
---- a/mm/mm_init.c
-+++ b/mm/mm_init.c
-@@ -1673,7 +1673,7 @@ static void __init alloc_node_mem_map(st
- 	if (pgdat == NODE_DATA(0)) {
- 		mem_map = NODE_DATA(0)->node_mem_map;
- 		if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
--			mem_map -= offset;
-+			mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
- 	}
- #endif
- }



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:13 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace BUS clock patch with
 upstream version
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36402.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/07b49ce87660a0448c0535b481b330e1bd333a8c

commit 07b49ce87660a0448c0535b481b330e1bd333a8c
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:15:31 2025 +0100

    airoha: an7581: replace BUS clock patch with upstream version
    
    Replace BUS clock patch with upstream version with related tag
    as it got approved and merged.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch} | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
similarity index 82%
rename from target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
index 01a5fd0c87..89b970f8bb 100644
--- a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
@@ -1,12 +1,12 @@
-From 6d74b9e6d3bb07f50b22b9ea047b84a83aba185c Mon Sep 17 00:00:00 2001
+From 2eb75f86d52565367211c51334d15fe672633085 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Thu, 17 Oct 2024 19:26:24 +0200
+Date: Sat, 16 Nov 2024 11:56:53 +0100
 Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581
 
 The Documentation for EN7581 had a typo and still referenced the EN7523
 BUS base source frequency. This was in conflict with a different page in
-the Documentration that state that the BUS runs at 300MHz (600MHz source with
-divisor set to 2) and the actual watchdog that tick at half the BUS
+the Documentration that state that the BUS runs at 300MHz (600MHz source
+with divisor set to 2) and the actual watchdog that tick at half the BUS
 clock (150MHz). This was verified with the watchdog by timing the
 seconds that the system takes to reboot (due too watchdog) and by
 operating on different values of the BUS divisor.
@@ -18,6 +18,9 @@ This was also confirmed by Airoha.
 Cc: stable at vger.kernel.org
 Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support")
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20241116105710.19748-1-ansuelsmth at gmail.com
+Acked-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:16 -0500
Subject: [openwrt/openwrt]  kernel: modules: Add ETS Qdisc scheduler to sched
 KernelPackage
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36403.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7e237f190225c0bcba0f5374632d0508f11398a8

commit 7e237f190225c0bcba0f5374632d0508f11398a8
Author: Lorenzo Bianconi <lorenzo at kernel.org>
AuthorDate: Sat Jan 4 15:46:57 2025 +0100

    kernel: modules: Add ETS Qdisc scheduler to sched KernelPackage
    
    Add ETS Qdisch scheduler to kernel package modules.
    
    Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
    [ add commit description ]
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 package/kernel/linux/modules/netsupport.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk
index 3551a89a9b..06ef823280 100644
--- a/package/kernel/linux/modules/netsupport.mk
+++ b/package/kernel/linux/modules/netsupport.mk
@@ -1026,7 +1026,7 @@ endef
 $(eval $(call KernelPackage,bpf-test))
 
 
-SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
+SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq sch_ets act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
 SCHED_FILES_EXTRA = $(foreach mod,$(SCHED_MODULES_EXTRA),$(LINUX_DIR)/net/sched/$(mod).ko)
 
 define KernelPackage/sched
@@ -1040,6 +1040,7 @@ define KernelPackage/sched
 	CONFIG_NET_SCH_SFQ \
 	CONFIG_NET_SCH_TEQL \
 	CONFIG_NET_SCH_FQ \
+	CONFIG_NET_SCH_ETS \
 	CONFIG_NET_ACT_PEDIT \
 	CONFIG_NET_ACT_SIMP \
 	CONFIG_NET_ACT_SKBMOD \



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:18 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending patch to fix PCI
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36404.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/77329b7d8d870897d85270a4e806ec0d04396685

commit 77329b7d8d870897d85270a4e806ec0d04396685
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:28:20 2025 +0100

    airoha: an7581: add pending patch to fix PCI
    
    Add pending patch to fix PCIe missing register.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...k-gen3-configure-PBUS_CSR-registers-for-E.patch | 83 ++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch b/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
new file mode 100644
index 0000000000..d896e1aee3
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
@@ -0,0 +1,83 @@
+From 2285d3b428c7d8f1c4fda2fb995e7e46a05350e0 Mon Sep 17 00:00:00 2001
+Message-ID: <2285d3b428c7d8f1c4fda2fb995e7e46a05350e0.1736324542.git.lorenzo at kernel.org>
+In-Reply-To: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+References: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 3 Sep 2024 23:14:02 +0200
+Subject: [PATCH 2/2] PCI: mediatek-gen3: configure PBUS_CSR registers for
+ EN7581 SoC
+
+Configure PBus base address and address mask in order to allow the hw
+detecting if a given address is on PCIE0, PCIE1 or PCIE2.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 29 ++++++++++++++++++++-
+ 1 file changed, 28 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -15,6 +15,7 @@
+ #include <linux/irqchip/chained_irq.h>
+ #include <linux/irqdomain.h>
+ #include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
+ #include <linux/module.h>
+ #include <linux/msi.h>
+ #include <linux/of_device.h>
+@@ -24,6 +25,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/regmap.h>
+ #include <linux/reset.h>
+ 
+ #include "../pci.h"
+@@ -120,6 +122,13 @@
+ 
+ #define MAX_NUM_PHY_RESETS		3
+ 
++#define PCIE_EN7581_PBUS_ADDR(_n)	(0x00 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_ADDR_MASK(_n)	(0x04 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_BASE_ADDR(_n)	\
++	((_n) == 2 ? 0x28000000 :	\
++	 (_n) == 1 ? 0x24000000 : 0x20000000)
++#define PCIE_EN7581_PBUS_BASE_ADDR_MASK	GENMASK(31, 26)
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -871,7 +880,8 @@ static int mtk_pcie_parse_port(struct mt
+ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+-	int err;
++	struct regmap *map;
++	int err, slot;
+ 	u32 val;
+ 
+ 	/*
+@@ -880,6 +890,23 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
++	map = syscon_regmap_lookup_by_compatible("airoha,en7581-pbus-csr");
++	if (IS_ERR(map))
++		return PTR_ERR(map);
++
++	/*
++	 * Configure PBus base address and address mask in order to allow the
++	 * hw detecting if a given address is on PCIE0, PCIE1 or PCIE2.
++	 */
++	slot = of_get_pci_domain_nr(dev->of_node);
++	if (slot < 0)
++		return slot;
++
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR(slot));
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR_MASK);
++
+ 	err = phy_init(pcie->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize PHY\n");



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:17 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add patch fixing support for MMC
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36407.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/be5a9ff24b9c3b7d1b5bf508b84a35be9f9b3ea9

commit be5a9ff24b9c3b7d1b5bf508b84a35be9f9b3ea9
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:27:07 2025 +0100

    airoha: an7581: add patch fixing support for MMC
    
    Add patch fixing support for MMC. Additional clock are needed for MMC to
    work and some small fixup to make the Mediatek MMC driver on Airoha SoC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...Rework-clock-handling-for-different-clock.patch |  82 ++++++++++++
 ...s-clock-drop-NUM_CLOCKS-define-for-EN7581.patch |  23 ++++
 ...bindings-clock-add-ID-for-eMMC-for-EN7581.patch |  23 ++++
 ...-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch |  39 ++++++
 ...mc-mtk-sd-add-support-for-AN7581-MMC-Host.patch | 138 +++++++++++++++++++++
 5 files changed, 305 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
new file mode 100644
index 0000000000..7333ebbdf2
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -0,0 +1,82 @@
+From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 18 Dec 2024 10:03:45 +0100
+Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
+ numbers
+
+Airoha EN7581 SoC have additional clock compared to EN7523 but current
+driver permits to only support up to EN7523 clock numbers.
+
+To handle this, rework the clock handling and permit to declare the
+clocks number in match_data and alloca clk_data based on the compatible
+match_data.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/clk/clk-en7523.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -75,6 +75,7 @@ struct en_rst_data {
+ };
+ 
+ struct en_clk_soc_data {
++	u32 num_clocks;
+ 	const struct clk_ops pcie_ops;
+ 	int (*hw_init)(struct platform_device *pdev,
+ 		       struct clk_hw_onecell_data *clk_data);
+@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+ 
+ 	hw = en7523_register_pcie_clk(dev, np_base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+ 
+ static int en7523_clk_hw_init(struct platform_device *pdev,
+@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
+ 
+ 	hw = en7523_register_pcie_clk(dev, base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+ 
+ static int en7523_reset_update(struct reset_controller_dev *rcdev,
+@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+ 	struct clk_hw_onecell_data *clk_data;
+ 	int r;
+ 
++	soc_data = device_get_match_data(&pdev->dev);
++
+ 	clk_data = devm_kzalloc(&pdev->dev,
+-				struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
++				struct_size(clk_data, hws, soc_data->num_clocks),
+ 				GFP_KERNEL);
+ 	if (!clk_data)
+ 		return -ENOMEM;
+ 
+-	soc_data = device_get_match_data(&pdev->dev);
+ 	r = soc_data->hw_init(pdev, clk_data);
+ 	if (r)
+ 		return r;
+ 
++	clk_data->num = soc_data->num_clocks;
+ 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+ }
+ 
+ static const struct en_clk_soc_data en7523_data = {
++	.num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7523_pci_is_enabled,
+ 		.prepare = en7523_pci_prepare,
+@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
+ };
+ 
+ static const struct en_clk_soc_data en7581_data = {
++	/* We increment num_clocks by 1 to account for additional PCIe clock */
++	.num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7581_pci_is_enabled,
+ 		.enable = en7581_pci_enable,
diff --git a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
new file mode 100644
index 0000000000..e858d8b77d
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
@@ -0,0 +1,23 @@
+From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Thu, 19 Dec 2024 13:13:37 +0100
+Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
+
+Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
+should not be placed here. Value is derived internally in the user
+driver.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,6 +12,4 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
+-#define EN7523_NUM_CLOCKS	8
+-
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
diff --git a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
new file mode 100644
index 0000000000..7bc987f420
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
@@ -0,0 +1,23 @@
+From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 12:22:37 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
+
+Add ID for eMMC for EN7581. This is to control clock selection of eMMC
+between 200MHz and 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Acked-by: Conor Dooley <conor.dooley at microchip.com>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,4 +12,6 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
++#define EN7581_CLK_EMMC		8
++
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
diff --git a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
new file mode 100644
index 0000000000..64d5339176
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
@@ -0,0 +1,39 @@
+From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 12:22:38 +0100
+Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
+
+Add clock for eMMC for EN7581. This is used to give info of the current
+eMMC source clock and to switch it from 200MHz or 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/clk/clk-en7523.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
+ static const u32 bus7581_base[] = { 600000000, 540000000 };
+ static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
+ static const u32 crypto_base[] = { 540000000, 480000000 };
++static const u32 emmc7581_base[] = { 200000000, 150000000 };
+ 
+ static const struct en_clk_desc en7523_base_clks[] = {
+ 	{
+@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
+ 		.base_shift = 0,
+ 		.base_values = crypto_base,
+ 		.n_base_values = ARRAY_SIZE(crypto_base),
++	}, {
++		.id = EN7581_CLK_EMMC,
++		.name = "emmc",
++
++		.base_reg = REG_CRYPTO_CLKSRC2,
++		.base_bits = 1,
++		.base_shift = 12,
++		.base_values = emmc7581_base,
++		.n_base_values = ARRAY_SIZE(emmc7581_base),
+ 	}
+ };
+ 
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
new file mode 100644
index 0000000000..24c4dbde78
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
@@ -0,0 +1,138 @@
+From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 11:27:10 +0100
+Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
+
+Add support for AN7581 MMC Host. The MMC Host controller is based on
+mt7622 with the difference of not having regulator supply and state_uhs
+pins and hclk clock.
+
+Some minor fixes are applied to check if the state_uhs pins are defined
+and make hclk optional for the new airoha compatible.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
+ 1 file changed, 46 insertions(+), 9 deletions(-)
+
+--- a/drivers/mmc/host/mtk-sd.c
++++ b/drivers/mmc/host/mtk-sd.c
+@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
+ 	.stop_clk_fix = true,
+ };
+ 
++static const struct mtk_mmc_compatible an7581_compat = {
++	.clk_div_bits = 12,
++	.recheck_sdio_irq = true,
++	.hs400_tune = false,
++	.pad_tune_reg = MSDC_PAD_TUNE0,
++	.async_fifo = true,
++	.data_tune = true,
++	.busy_check = true,
++	.stop_clk_fix = true,
++	.enhance_rx = true,
++	.support_64g = false,
++};
++
+ static const struct of_device_id msdc_of_ids[] = {
+ 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
+ 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
+@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
+ 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
+ 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
+ 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
+-
++	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, msdc_of_ids);
+@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
+ 	struct msdc_host *host = mmc_priv(mmc);
+ 	int ret;
+ 
++	/* Skip setting supply if not supported */
++	if (!mmc->supply.vqmmc)
++		return 0;
++
+ 	if (!IS_ERR(mmc->supply.vqmmc)) {
+ 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
+ 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
+@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
+ 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
+ 			}
+ 
+-			pinctrl_select_state(host->pinctrl, host->pins_uhs);
++			/* Skip setting uhs pins if not supported */
++			if (host->pins_uhs)
++				pinctrl_select_state(host->pinctrl, host->pins_uhs);
+ 		} else {
+ 			dev_pm_clear_wake_irq(host->dev);
+ 		}
+@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
+ 
+ 	msdc_set_buswidth(host, ios->bus_width);
+ 
++	/* Skip regulator if not supported */
++	if (!mmc->supply.vmmc)
++		goto skip_regulator;
++
+ 	/* Suspend/Resume will do power off/on */
+ 	switch (ios->power_mode) {
+ 	case MMC_POWER_UP:
+@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
+ 		break;
+ 	}
+ 
++skip_regulator:
+ 	if (host->mclk != ios->clock || host->timing != ios->timing)
+ 		msdc_set_mclk(host, ios->timing, ios->clock);
+ }
+@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
+ 	if (IS_ERR(host->src_clk))
+ 		return PTR_ERR(host->src_clk);
+ 
+-	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
+-	if (IS_ERR(host->h_clk))
+-		return PTR_ERR(host->h_clk);
++	/* AN7581 SoC doesn't have hclk */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
++		if (IS_ERR(host->h_clk))
++			return PTR_ERR(host->h_clk);
++	}
+ 
+ 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
+ 	if (IS_ERR(host->bus_clk))
+@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
+ 		goto host_free;
+ 	}
+ 
+-	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+-	if (IS_ERR(host->pins_uhs)) {
+-		ret = PTR_ERR(host->pins_uhs);
+-		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
+-		goto host_free;
++	/* AN7581 doesn't have state_uhs pins */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
++		if (IS_ERR(host->pins_uhs)) {
++			ret = PTR_ERR(host->pins_uhs);
++			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
++			goto host_free;
++		}
+ 	}
+ 
+ 	/* Support for SDIO eint irq ? */
+@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+ 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
+ 		goto release_mem;
+ 	}
++
++	/* AN7581 without regulator require tune to OCR values */
++	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
++	    !mmc->ocr_avail)
++		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
++
+ 	msdc_init_hw(host);
+ 
+ 	if (mmc->caps2 & MMC_CAP2_CQE) {



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:14 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport 2 fix for airoha ethernet
 driver
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36408.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b4ae5378d403aa263ba5ec26ccc333ab0de81cff

commit b4ae5378d403aa263ba5ec26ccc333ab0de81cff
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:16:46 2025 +0100

    airoha: an7581: backport 2 fix for airoha ethernet driver
    
    Backport 2 fix for airoha ethernet driver merged upstream.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch |  35 +++++++
 ...net-airoha-Fix-error-path-in-airoha_probe.patch | 102 +++++++++++++++++++++
 2 files changed, 137 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch b/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch
new file mode 100644
index 0000000000..a71197150f
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch
@@ -0,0 +1,35 @@
+From 30d9d8f6a2d7e44a9f91737dd409dbc87ac6f6b7 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 15 Oct 2024 09:58:09 +0200
+Subject: [PATCH] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration
+
+Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
+of REG_CDM2_FWD_CFG register.
+This bug is not introducing any user visible problem since Frame Engine
+CDM2 port is used just by the second QDMA block and we currently enable
+just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
+
+Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
+support for EN7581 SoC")
+
+Reported-by: ChihWei Cheng <chihwei.cheng at airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <20241015-airoha-eth-cdm2-fixes-v1-1-9dc6993286c3 at kernel.org>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1369,7 +1369,8 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
+ 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
+ 		      GDM2_CHN_VLD_MODE_MASK);
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
++	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
++		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
+ 
+ 	/* init fragment and assemble Force Port */
+ 	/* NPU Core-3, NPU Bridge Channel-3 */
diff --git a/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch b/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch
new file mode 100644
index 0000000000..9499c1541a
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch
@@ -0,0 +1,102 @@
+From 0c7469ee718e1dd929f52bfb142a7f6fb68f0765 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Mon, 16 Dec 2024 18:47:33 +0100
+Subject: [PATCH] net: airoha: Fix error path in airoha_probe()
+
+Do not run napi_disable() if airoha_hw_init() fails since Tx/Rx napi
+has not been started yet. In order to fix the issue, introduce
+airoha_qdma_stop_napi routine and remove napi_disable in
+airoha_hw_cleanup().
+
+Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC")
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Link: https://patch.msgid.link/20241216-airoha_probe-error-path-fix-v2-1-6b10e04e9a5c at kernel.org
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 33 ++++++++++++++++------
+ 1 file changed, 25 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2139,17 +2139,14 @@ static void airoha_hw_cleanup(struct air
+ 		if (!qdma->q_rx[i].ndesc)
+ 			continue;
+ 
+-		napi_disable(&qdma->q_rx[i].napi);
+ 		netif_napi_del(&qdma->q_rx[i].napi);
+ 		airoha_qdma_cleanup_rx_queue(&qdma->q_rx[i]);
+ 		if (qdma->q_rx[i].page_pool)
+ 			page_pool_destroy(qdma->q_rx[i].page_pool);
+ 	}
+ 
+-	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++) {
+-		napi_disable(&qdma->q_tx_irq[i].napi);
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
+ 		netif_napi_del(&qdma->q_tx_irq[i].napi);
+-	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
+ 		if (!qdma->q_tx[i].ndesc)
+@@ -2174,6 +2171,21 @@ static void airoha_qdma_start_napi(struc
+ 	}
+ }
+ 
++static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
++		napi_disable(&qdma->q_tx_irq[i].napi);
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
++		if (!qdma->q_rx[i].ndesc)
++			continue;
++
++		napi_disable(&qdma->q_rx[i].napi);
++	}
++}
++
+ static void airoha_update_hw_stats(struct airoha_gdm_port *port)
+ {
+ 	struct airoha_eth *eth = port->qdma->eth;
+@@ -2731,7 +2743,7 @@ static int airoha_probe(struct platform_
+ 
+ 	err = airoha_hw_init(pdev, eth);
+ 	if (err)
+-		goto error;
++		goto error_hw_cleanup;
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_qdma_start_napi(&eth->qdma[i]);
+@@ -2746,13 +2758,16 @@ static int airoha_probe(struct platform_
+ 		err = airoha_alloc_gdm_port(eth, np);
+ 		if (err) {
+ 			of_node_put(np);
+-			goto error;
++			goto error_napi_stop;
+ 		}
+ 	}
+ 
+ 	return 0;
+ 
+-error:
++error_napi_stop:
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++		airoha_qdma_stop_napi(&eth->qdma[i]);
++error_hw_cleanup:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_hw_cleanup(&eth->qdma[i]);
+ 
+@@ -2773,8 +2788,10 @@ static void airoha_remove(struct platfor
+ 	struct airoha_eth *eth = platform_get_drvdata(pdev);
+ 	int i;
+ 
+-	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) {
++		airoha_qdma_stop_napi(&eth->qdma[i]);
+ 		airoha_hw_cleanup(&eth->qdma[i]);
++	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
+ 		struct airoha_gdm_port *port = eth->ports[i];



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:12 -0500
Subject: [openwrt/openwrt]  airoha: an7581: enable MMC and PCI and refresh
 config
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36409.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/73d368868c9dd2facfdf3f58533ee6310b2a665c

commit 73d368868c9dd2facfdf3f58533ee6310b2a665c
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:14:45 2025 +0100

    airoha: an7581: enable MMC and PCI and refresh config
    
    Enable MMC and PCI config symbol and refresh config for Airoha AN7581.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/airoha/an7581/config-6.6 | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index b26cbeeb33..f80bf49f8c 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -131,6 +131,8 @@ CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_COREDUMP=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_CPUSETS=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
@@ -190,8 +192,6 @@ CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_DCACHE_WORD_ACCESS=y
 CONFIG_DEBUG_BUGVERBOSE=y
-# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set
-CONFIG_DEBUG_INFO_NONE=y
 CONFIG_DEBUG_MISC=y
 CONFIG_DEVMEM=y
 CONFIG_DMADEVICES=y
@@ -351,6 +351,10 @@ CONFIG_MDIO_DEVRES=y
 # CONFIG_MEMCG is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_CQHCI=y
+CONFIG_MMC_MTK=y
 CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_TREE_LOOKUP=y
 CONFIG_MODULES_USE_ELF_RELA=y
@@ -433,7 +437,8 @@ CONFIG_PCIEASPM_PERFORMANCE=y
 # CONFIG_PCIEASPM_POWERSAVE is not set
 # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
 CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIE_MEDIATEK is not set
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PCIE_MEDIATEK_GEN3=y
 CONFIG_PCIE_PME=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DOMAINS_GENERIC=y



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:19 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending patch for ETS qdisc on
 ethernet driver
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36412.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/53bc7633317a7da9bf7ef440ed3da39404cf146e

commit 53bc7633317a7da9bf7ef440ed3da39404cf146e
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:29:02 2025 +0100

    airoha: an7581: add pending patch for ETS qdisc on ethernet driver
    
    Add pending patch for ETS qdisc on Airoha ethernet driver.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...a-Fix-channel-configuration-for-ETS-Qdisc.patch | 104 +++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
new file mode 100644
index 0000000000..5bd7487b9f
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
@@ -0,0 +1,104 @@
+From patchwork Tue Jan  7 22:26:28 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
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+X-Patchwork-Submitter: Lorenzo Bianconi <lorenzo at kernel.org>
+X-Patchwork-Id: 13929634
+X-Patchwork-Delegate: kuba at kernel.org
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+	(No client certificate requested)
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+	 ADsdcP6QPwokg==
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 07 Jan 2025 23:26:28 +0100
+Subject: [PATCH net-next] net: airoha: Fix channel configuration for ETS
+ Qdisc
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Message-Id: <20250107-airoha-ets-fix-chan-v1-1-97f66ed3a068 at kernel.org>
+X-B4-Tracking: v=1; b=H4sIABOqfWcC/x2MSwqAMAwFryJZG6ifVvAq4qLUaLNRaUSE0rsbX
+ Q5v3mQQSkwCY5Uh0c3Cx67Q1BWE6PeNkBdlaE1rTWMG9JyO6JEuwZUf/CSkzobgw+AW14M+z0S
+ 6/dVpLuUFNrlCSGUAAAA=
+X-Change-ID: 20250107-airoha-ets-fix-chan-e35ccac76d64
+To: Felix Fietkau <nbd at nbd.name>, Sean Wang <sean.wang at mediatek.com>,
+ Mark Lee <Mark-MC.Lee at mediatek.com>, Andrew Lunn <andrew+netdev at lunn.ch>,
+ "David S. Miller" <davem at davemloft.net>, Eric Dumazet <edumazet at google.com>,
+ Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+ Matthias Brugger <matthias.bgg at gmail.com>,
+ AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Cc: linux-arm-kernel at lists.infradead.org,
+ linux-mediatek at lists.infradead.org, netdev at vger.kernel.org,
+ Lorenzo Bianconi <lorenzo at kernel.org>
+X-Mailer: b4 0.14.2
+X-Patchwork-Delegate: kuba at kernel.org
+
+Limit ETS QoS channel to AIROHA_NUM_QOS_CHANNELS in
+airoha_tc_setup_qdisc_ets() in order to align the configured channel to
+the value set in airoha_dev_select_queue().
+
+Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support")
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+
+---
+base-commit: a1942da8a38717ddd9b4c132f59e1657c85c1432
+change-id: 20250107-airoha-ets-fix-chan-e35ccac76d64
+
+Best regards,
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2833,11 +2833,14 @@ static int airoha_qdma_get_tx_ets_stats(
+ static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
+ 				     struct tc_ets_qopt_offload *opt)
+ {
+-	int channel = TC_H_MAJ(opt->handle) >> 16;
++	int channel;
+ 
+ 	if (opt->parent == TC_H_ROOT)
+ 		return -EINVAL;
+ 
++	channel = TC_H_MAJ(opt->handle) >> 16;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++
+ 	switch (opt->command) {
+ 	case TC_ETS_REPLACE:
+ 		return airoha_qdma_set_tx_ets_sched(port, channel, opt);



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:15 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport patch to support ETS and
 HTB sched
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36413.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3ec3ea5316ceebae260f4d170c6e1c3a19864438

commit 3ec3ea5316ceebae260f4d170c6e1c3a19864438
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:22:31 2025 +0100

    airoha: an7581: backport patch to support ETS and HTB sched
    
    Backport patch to support ETS and HTB scheduler for airoha ethernet
    driver.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...Enable-Tx-drop-capability-for-each-Tx-DMA.patch |  27 ++
 ...iroha-Introduce-ndo_select_queue-callback.patch |  86 +++++
 ...-net-airoha-Add-sched-ETS-offload-support.patch | 292 ++++++++++++++++
 ...-net-airoha-Add-sched-HTB-offload-support.patch | 371 +++++++++++++++++++++
 4 files changed, 776 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch b/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch
new file mode 100644
index 0000000000..c8681aace5
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch
@@ -0,0 +1,27 @@
+From 5f795590380476f1c9b7ed0ac945c9b0269dc23a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:02 +0100
+Subject: [PATCH 1/4] net: airoha: Enable Tx drop capability for each Tx DMA
+ ring
+
+This is a preliminary patch in order to enable hw Qdisc offloading.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1790,6 +1790,10 @@ static int airoha_qdma_init_tx_queue(str
+ 		WRITE_ONCE(q->desc[i].ctrl, cpu_to_le32(val));
+ 	}
+ 
++	/* xmit ring drop default setting */
++	airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(qid),
++			TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK);
++
+ 	airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);
+ 	airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,
+ 			FIELD_PREP(TX_RING_CPU_IDX_MASK, q->head));
diff --git a/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch b/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch
new file mode 100644
index 0000000000..75743bdd34
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch
@@ -0,0 +1,86 @@
+From 2b288b81560b94958cd68bbe54673e55a1730c95 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:03 +0100
+Subject: [PATCH 2/4] net: airoha: Introduce ndo_select_queue callback
+
+Airoha EN7581 SoC supports 32 Tx DMA rings used to feed packets to QoS
+channels. Each channels supports 8 QoS queues where the user can apply
+QoS scheduling policies. In a similar way, the user can configure hw
+rate shaping for each QoS channel.
+Introduce ndo_select_queue callback in order to select the tx queue
+based on QoS channel and QoS queue. In particular, for dsa device select
+QoS channel according to the dsa user port index, rely on port id
+otherwise. Select QoS queue based on the skb priority.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 30 ++++++++++++++++++++--
+ 1 file changed, 28 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -23,6 +23,8 @@
+ #define AIROHA_MAX_NUM_XSI_RSTS		5
+ #define AIROHA_MAX_MTU			2000
+ #define AIROHA_MAX_PACKET_SIZE		2048
++#define AIROHA_NUM_QOS_CHANNELS		4
++#define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+@@ -2422,21 +2424,44 @@ static void airoha_dev_get_stats64(struc
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static u16 airoha_dev_select_queue(struct net_device *dev, struct sk_buff *skb,
++				   struct net_device *sb_dev)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++	int queue, channel;
++
++	/* For dsa device select QoS channel according to the dsa user port
++	 * index, rely on port id otherwise. Select QoS queue based on the
++	 * skb priority.
++	 */
++	channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port->id;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++	queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */
++	queue = channel * AIROHA_NUM_QOS_QUEUES + queue;
++
++	return queue < dev->num_tx_queues ? queue : 0;
++}
++
+ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,
+ 				   struct net_device *dev)
+ {
+ 	struct skb_shared_info *sinfo = skb_shinfo(skb);
+ 	struct airoha_gdm_port *port = netdev_priv(dev);
+-	u32 msg0 = 0, msg1, len = skb_headlen(skb);
+-	int i, qid = skb_get_queue_mapping(skb);
++	u32 msg0, msg1, len = skb_headlen(skb);
+ 	struct airoha_qdma *qdma = port->qdma;
+ 	u32 nr_frags = 1 + sinfo->nr_frags;
+ 	struct netdev_queue *txq;
+ 	struct airoha_queue *q;
+ 	void *data = skb->data;
++	int i, qid;
+ 	u16 index;
+ 	u8 fport;
+ 
++	qid = skb_get_queue_mapping(skb) % ARRAY_SIZE(qdma->q_tx);
++	msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,
++			  qid / AIROHA_NUM_QOS_QUEUES) |
++	       FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,
++			  qid % AIROHA_NUM_QOS_QUEUES);
+ 	if (skb->ip_summed == CHECKSUM_PARTIAL)
+ 		msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |
+ 			FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |
+@@ -2610,6 +2635,7 @@ static const struct net_device_ops airoh
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+ 	.ndo_stop		= airoha_dev_stop,
++	.ndo_select_queue	= airoha_dev_select_queue,
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,
diff --git a/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch b/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch
new file mode 100644
index 0000000000..ad5e0e5c2a
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch
@@ -0,0 +1,292 @@
+From 20bf7d07c956e5c7a22d3076c599cbb7a6054917 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:04 +0100
+Subject: [PATCH 3/4] net: airoha: Add sched ETS offload support
+
+Introduce support for ETS Qdisc offload available on the Airoha EN7581
+ethernet controller. In order to be effective, ETS Qdisc must configured
+as leaf of a HTB Qdisc (HTB Qdisc offload will be added in the following
+patch). ETS Qdisc available on EN7581 ethernet controller supports at
+most 8 concurrent bands (QoS queues). We can enable an ETS Qdisc for
+each available QoS channel.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 196 ++++++++++++++++++++-
+ 1 file changed, 195 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -15,6 +15,7 @@
+ #include <linux/u64_stats_sync.h>
+ #include <net/dsa.h>
+ #include <net/page_pool/helpers.h>
++#include <net/pkt_cls.h>
+ #include <uapi/linux/ppp_defs.h>
+ 
+ #define AIROHA_MAX_NUM_GDM_PORTS	1
+@@ -543,9 +544,24 @@
+ #define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define REG_QUEUE_CLOSE_CFG(_n)		(0x00a0 + ((_n) & 0xfc))
++#define TXQ_DISABLE_CHAN_QUEUE_MASK(_n, _m)	BIT((_m) + (((_n) & 0x3) << 3))
++
+ #define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)
+ #define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) << 2)
+ 
++#define REG_CNTR_CFG(_n)		(0x0400 + ((_n) << 3))
++#define CNTR_EN_MASK			BIT(31)
++#define CNTR_ALL_CHAN_EN_MASK		BIT(30)
++#define CNTR_ALL_QUEUE_EN_MASK		BIT(29)
++#define CNTR_ALL_DSCP_RING_EN_MASK	BIT(28)
++#define CNTR_SRC_MASK			GENMASK(27, 24)
++#define CNTR_DSCP_RING_MASK		GENMASK(20, 16)
++#define CNTR_CHAN_MASK			GENMASK(7, 3)
++#define CNTR_QUEUE_MASK			GENMASK(2, 0)
++
++#define REG_CNTR_VAL(_n)		(0x0404 + ((_n) << 3))
++
+ #define REG_LMGR_INIT_CFG		0x1000
+ #define LMGR_INIT_START			BIT(31)
+ #define LMGR_SRAM_MODE_MASK		BIT(30)
+@@ -571,9 +587,19 @@
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+ 
++#define REG_TXWRR_WEIGHT_CFG		0x1024
++#define TWRR_RW_CMD_MASK		BIT(31)
++#define TWRR_RW_CMD_DONE		BIT(30)
++#define TWRR_CHAN_IDX_MASK		GENMASK(23, 19)
++#define TWRR_QUEUE_IDX_MASK		GENMASK(18, 16)
++#define TWRR_VALUE_MASK			GENMASK(15, 0)
++
+ #define REG_PSE_BUF_USAGE_CFG		0x1028
+ #define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)
+ 
++#define REG_CHAN_QOS_MODE(_n)		(0x1040 + ((_n) << 2))
++#define CHAN_QOS_MODE_MASK(_n)		GENMASK(2 + ((_n) << 2), (_n) << 2)
++
+ #define REG_GLB_TRTCM_CFG		0x1080
+ #define GLB_TRTCM_EN_MASK		BIT(31)
+ #define GLB_TRTCM_MODE_MASK		BIT(30)
+@@ -722,6 +748,17 @@ enum {
+ 	FE_PSE_PORT_DROP = 0xf,
+ };
+ 
++enum tx_sched_mode {
++	TC_SCH_WRR8,
++	TC_SCH_SP,
++	TC_SCH_WRR7,
++	TC_SCH_WRR6,
++	TC_SCH_WRR5,
++	TC_SCH_WRR4,
++	TC_SCH_WRR3,
++	TC_SCH_WRR2,
++};
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -812,6 +849,10 @@ struct airoha_gdm_port {
+ 	int id;
+ 
+ 	struct airoha_hw_stats stats;
++
++	/* qos stats counters */
++	u64 cpu_tx_packets;
++	u64 fwd_tx_packets;
+ };
+ 
+ struct airoha_eth {
+@@ -1962,6 +2003,27 @@ static void airoha_qdma_init_qos(struct
+ 			FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));
+ }
+ 
++static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_QOS_CHANNELS; i++) {
++		/* Tx-cpu transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL(i << 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++		/* Tx-fwd transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_SRC_MASK, 1) |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++	}
++}
++
+ static int airoha_qdma_hw_init(struct airoha_qdma *qdma)
+ {
+ 	int i;
+@@ -2012,6 +2074,7 @@ static int airoha_qdma_hw_init(struct ai
+ 
+ 	airoha_qdma_set(qdma, REG_TXQ_CNGST_CFG,
+ 			TXQ_CNGST_DROP_EN | TXQ_CNGST_DEI_DROP_EN);
++	airoha_qdma_init_qos_stats(qdma);
+ 
+ 	return 0;
+ }
+@@ -2631,6 +2694,135 @@ airoha_ethtool_get_rmon_stats(struct net
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static int airoha_qdma_set_chan_tx_sched(struct airoha_gdm_port *port,
++					 int channel, enum tx_sched_mode mode,
++					 const u16 *weights, u8 n_weights)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_TX_RING; i++)
++		airoha_qdma_clear(port->qdma, REG_QUEUE_CLOSE_CFG(channel),
++				  TXQ_DISABLE_CHAN_QUEUE_MASK(channel, i));
++
++	for (i = 0; i < n_weights; i++) {
++		u32 status;
++		int err;
++
++		airoha_qdma_wr(port->qdma, REG_TXWRR_WEIGHT_CFG,
++			       TWRR_RW_CMD_MASK |
++			       FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |
++			       FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |
++			       FIELD_PREP(TWRR_VALUE_MASK, weights[i]));
++		err = read_poll_timeout(airoha_qdma_rr, status,
++					status & TWRR_RW_CMD_DONE,
++					USEC_PER_MSEC, 10 * USEC_PER_MSEC,
++					true, port->qdma,
++					REG_TXWRR_WEIGHT_CFG);
++		if (err)
++			return err;
++	}
++
++	airoha_qdma_rmw(port->qdma, REG_CHAN_QOS_MODE(channel >> 3),
++			CHAN_QOS_MODE_MASK(channel),
++			mode << __ffs(CHAN_QOS_MODE_MASK(channel)));
++
++	return 0;
++}
++
++static int airoha_qdma_set_tx_prio_sched(struct airoha_gdm_port *port,
++					 int channel)
++{
++	static const u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, TC_SCH_SP, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_set_tx_ets_sched(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
++	enum tx_sched_mode mode = TC_SCH_SP;
++	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++	int i, nstrict = 0;
++
++	if (p->bands > AIROHA_NUM_QOS_QUEUES)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands; i++) {
++		if (!p->quanta[i])
++			nstrict++;
++	}
++
++	/* this configuration is not supported by the hw */
++	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands - nstrict; i++)
++		w[i] = p->weights[nstrict + i];
++
++	if (!nstrict)
++		mode = TC_SCH_WRR8;
++	else if (nstrict < AIROHA_NUM_QOS_QUEUES - 1)
++		mode = nstrict + 1;
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, mode, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_get_tx_ets_stats(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	u64 cpu_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL(channel << 1));
++	u64 fwd_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL((channel << 1) + 1));
++	u64 tx_packets = (cpu_tx_packets - port->cpu_tx_packets) +
++			 (fwd_tx_packets - port->fwd_tx_packets);
++	_bstats_update(opt->stats.bstats, 0, tx_packets);
++
++	port->cpu_tx_packets = cpu_tx_packets;
++	port->fwd_tx_packets = fwd_tx_packets;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
++				     struct tc_ets_qopt_offload *opt)
++{
++	int channel = TC_H_MAJ(opt->handle) >> 16;
++
++	if (opt->parent == TC_H_ROOT)
++		return -EINVAL;
++
++	switch (opt->command) {
++	case TC_ETS_REPLACE:
++		return airoha_qdma_set_tx_ets_sched(port, channel, opt);
++	case TC_ETS_DESTROY:
++		/* PRIO is default qdisc scheduler */
++		return airoha_qdma_set_tx_prio_sched(port, channel);
++	case TC_ETS_STATS:
++		return airoha_qdma_get_tx_ets_stats(port, channel, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
++static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
++			       void *type_data)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++
++	switch (type) {
++	case TC_SETUP_QDISC_ETS:
++		return airoha_tc_setup_qdisc_ets(port, type_data);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
+ static const struct net_device_ops airoha_netdev_ops = {
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+@@ -2639,6 +2831,7 @@ static const struct net_device_ops airoh
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,
++	.ndo_setup_tc		= airoha_dev_tc_setup,
+ };
+ 
+ static const struct ethtool_ops airoha_ethtool_ops = {
+@@ -2688,7 +2881,8 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->watchdog_timeo = 5 * HZ;
+ 	dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
+ 			   NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |
+-			   NETIF_F_SG | NETIF_F_TSO;
++			   NETIF_F_SG | NETIF_F_TSO |
++			   NETIF_F_HW_TC;
+ 	dev->features |= dev->hw_features;
+ 	dev->dev.of_node = np;
+ 	dev->irq = qdma->irq;
diff --git a/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch b/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch
new file mode 100644
index 0000000000..1239b174e5
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch
@@ -0,0 +1,371 @@
+From ef1ca9271313b4ea7b03de69576aacef1e78f381 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:05 +0100
+Subject: [PATCH 4/4] net: airoha: Add sched HTB offload support
+
+Introduce support for HTB Qdisc offload available in the Airoha EN7581
+ethernet controller. EN7581 can offload only one level of HTB leafs.
+Each HTB leaf represents a QoS channel supported by EN7581 SoC.
+The typical use-case is creating a HTB leaf for QoS channel to rate
+limit the egress traffic and attach an ETS Qdisc to each HTB leaf in
+order to enforce traffic prioritization.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 288 ++++++++++++++++++++-
+ 1 file changed, 287 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -28,6 +28,8 @@
+ #define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
++#define AIROHA_NUM_NETDEV_TX_RINGS	(AIROHA_NUM_TX_RING + \
++					 AIROHA_NUM_QOS_CHANNELS)
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+ #define AIROHA_FE_MC_MAX_VLAN_PORT	16
+ #define AIROHA_NUM_TX_IRQ		2
+@@ -43,6 +45,9 @@
+ #define PSE_RSV_PAGES			128
+ #define PSE_QUEUE_RSV_PAGES		64
+ 
++#define QDMA_METER_IDX(_n)		((_n) & 0xff)
++#define QDMA_METER_GROUP(_n)		(((_n) >> 8) & 0x3)
++
+ /* FE */
+ #define PSE_BASE			0x0100
+ #define CSR_IFC_BASE			0x0200
+@@ -583,6 +588,17 @@
+ #define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define TRTCM_PARAM_RW_MASK		BIT(31)
++#define TRTCM_PARAM_RW_DONE_MASK	BIT(30)
++#define TRTCM_PARAM_TYPE_MASK		GENMASK(29, 28)
++#define TRTCM_METER_GROUP_MASK		GENMASK(27, 26)
++#define TRTCM_PARAM_INDEX_MASK		GENMASK(23, 17)
++#define TRTCM_PARAM_RATE_TYPE_MASK	BIT(16)
++
++#define REG_TRTCM_CFG_PARAM(_n)		((_n) + 0x4)
++#define REG_TRTCM_DATA_LOW(_n)		((_n) + 0x8)
++#define REG_TRTCM_DATA_HIGH(_n)		((_n) + 0xc)
++
+ #define REG_TXWRR_MODE_CFG		0x1020
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+@@ -759,6 +775,29 @@ enum tx_sched_mode {
+ 	TC_SCH_WRR2,
+ };
+ 
++enum trtcm_param_type {
++	TRTCM_MISC_MODE, /* meter_en, pps_mode, tick_sel */
++	TRTCM_TOKEN_RATE_MODE,
++	TRTCM_BUCKETSIZE_SHIFT_MODE,
++	TRTCM_BUCKET_COUNTER_MODE,
++};
++
++enum trtcm_mode_type {
++	TRTCM_COMMIT_MODE,
++	TRTCM_PEAK_MODE,
++};
++
++enum trtcm_param {
++	TRTCM_TICK_SEL = BIT(0),
++	TRTCM_PKT_MODE = BIT(1),
++	TRTCM_METER_MODE = BIT(2),
++};
++
++#define MIN_TOKEN_SIZE				4096
++#define MAX_TOKEN_SIZE_OFFSET			17
++#define TRTCM_TOKEN_RATE_MASK			GENMASK(23, 6)
++#define TRTCM_TOKEN_RATE_FRACTION_MASK		GENMASK(5, 0)
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -850,6 +889,8 @@ struct airoha_gdm_port {
+ 
+ 	struct airoha_hw_stats stats;
+ 
++	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
++
+ 	/* qos stats counters */
+ 	u64 cpu_tx_packets;
+ 	u64 fwd_tx_packets;
+@@ -2810,6 +2851,243 @@ static int airoha_tc_setup_qdisc_ets(str
+ 	}
+ }
+ 
++static int airoha_qdma_get_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode,
++				       u32 *val_low, u32 *val_high)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++			  FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++			  FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++			  FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++	if (read_poll_timeout(airoha_qdma_rr, val,
++			      val & TRTCM_PARAM_RW_DONE_MASK,
++			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++			      qdma, REG_TRTCM_CFG_PARAM(addr)))
++		return -ETIMEDOUT;
++
++	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));
++	if (val_high)
++		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));
++
++	return 0;
++}
++
++static int airoha_qdma_set_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode, u32 val)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 config = TRTCM_PARAM_RW_MASK |
++		     FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++		     FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++		     FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++		     FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++
++	return read_poll_timeout(airoha_qdma_rr, val,
++				 val & TRTCM_PARAM_RW_DONE_MASK,
++				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++				 qdma, REG_TRTCM_CFG_PARAM(addr));
++}
++
++static int airoha_qdma_set_trtcm_config(struct airoha_qdma *qdma, int channel,
++					u32 addr, enum trtcm_mode_type mode,
++					bool enable, u32 enable_mask)
++{
++	u32 val;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &val, NULL))
++		return -EINVAL;
++
++	val = enable ? val | enable_mask : val & ~enable_mask;
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_trtcm_token_bucket(struct airoha_qdma *qdma,
++					      int channel, u32 addr,
++					      enum trtcm_mode_type mode,
++					      u32 rate_val, u32 bucket_size)
++{
++	u32 val, config, tick, unit, rate, rate_frac;
++	int err;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &config, NULL))
++		return -EINVAL;
++
++	val = airoha_qdma_rr(qdma, addr);
++	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);
++	if (config & TRTCM_TICK_SEL)
++		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);
++	if (!tick)
++		return -EINVAL;
++
++	unit = (config & TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;
++	if (!unit)
++		return -EINVAL;
++
++	rate = rate_val / unit;
++	rate_frac = rate_val % unit;
++	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;
++	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |
++	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);
++
++	err = airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					  TRTCM_TOKEN_RATE_MODE, mode, rate);
++	if (err)
++		return err;
++
++	val = max_t(u32, bucket_size, MIN_TOKEN_SIZE);
++	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					   TRTCM_BUCKETSIZE_SHIFT_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_tx_rate_limit(struct airoha_gdm_port *port,
++					 int channel, u32 rate,
++					 u32 bucket_size)
++{
++	int i, err;
++
++	for (i = 0; i <= TRTCM_PEAK_MODE; i++) {
++		err = airoha_qdma_set_trtcm_config(port->qdma, channel,
++						   REG_EGRESS_TRTCM_CFG, i,
++						   !!rate, TRTCM_METER_MODE);
++		if (err)
++			return err;
++
++		err = airoha_qdma_set_trtcm_token_bucket(port->qdma, channel,
++							 REG_EGRESS_TRTCM_CFG,
++							 i, rate, bucket_size);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int airoha_tc_htb_alloc_leaf_queue(struct airoha_gdm_port *port,
++					  struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++	u32 rate = div_u64(opt->rate, 1000) << 3; /* kbps */
++	struct net_device *dev = port->dev;
++	int num_tx_queues = dev->real_num_tx_queues;
++	int err;
++
++	if (opt->parent_classid != TC_HTB_CLASSID_ROOT) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid parent classid");
++		return -EINVAL;
++	}
++
++	err = airoha_qdma_set_tx_rate_limit(port, channel, rate, opt->quantum);
++	if (err) {
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed configuring htb offload");
++		return err;
++	}
++
++	if (opt->command == TC_HTB_NODE_MODIFY)
++		return 0;
++
++	err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);
++	if (err) {
++		airoha_qdma_set_tx_rate_limit(port, channel, 0, opt->quantum);
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed setting real_num_tx_queues");
++		return err;
++	}
++
++	set_bit(channel, port->qos_sq_bmap);
++	opt->qid = AIROHA_NUM_TX_RING + channel;
++
++	return 0;
++}
++
++static void airoha_tc_remove_htb_queue(struct airoha_gdm_port *port, int queue)
++{
++	struct net_device *dev = port->dev;
++
++	netif_set_real_num_tx_queues(dev, dev->real_num_tx_queues - 1);
++	airoha_qdma_set_tx_rate_limit(port, queue + 1, 0, 0);
++	clear_bit(queue, port->qos_sq_bmap);
++}
++
++static int airoha_tc_htb_delete_leaf_queue(struct airoha_gdm_port *port,
++					   struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	airoha_tc_remove_htb_queue(port, channel);
++
++	return 0;
++}
++
++static int airoha_tc_htb_destroy(struct airoha_gdm_port *port)
++{
++	int q;
++
++	for_each_set_bit(q, port->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)
++		airoha_tc_remove_htb_queue(port, q);
++
++	return 0;
++}
++
++static int airoha_tc_get_htb_get_leaf_queue(struct airoha_gdm_port *port,
++					    struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	opt->qid = channel;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_htb(struct airoha_gdm_port *port,
++				     struct tc_htb_qopt_offload *opt)
++{
++	switch (opt->command) {
++	case TC_HTB_CREATE:
++		break;
++	case TC_HTB_DESTROY:
++		return airoha_tc_htb_destroy(port);
++	case TC_HTB_NODE_MODIFY:
++	case TC_HTB_LEAF_ALLOC_QUEUE:
++		return airoha_tc_htb_alloc_leaf_queue(port, opt);
++	case TC_HTB_LEAF_DEL:
++	case TC_HTB_LEAF_DEL_LAST:
++	case TC_HTB_LEAF_DEL_LAST_FORCE:
++		return airoha_tc_htb_delete_leaf_queue(port, opt);
++	case TC_HTB_LEAF_QUERY_QUEUE:
++		return airoha_tc_get_htb_get_leaf_queue(port, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++
++	return 0;
++}
++
+ static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
+ 			       void *type_data)
+ {
+@@ -2818,6 +3096,8 @@ static int airoha_dev_tc_setup(struct ne
+ 	switch (type) {
+ 	case TC_SETUP_QDISC_ETS:
+ 		return airoha_tc_setup_qdisc_ets(port, type_data);
++	case TC_SETUP_QDISC_HTB:
++		return airoha_tc_setup_qdisc_htb(port, type_data);
+ 	default:
+ 		return -EOPNOTSUPP;
+ 	}
+@@ -2868,7 +3148,8 @@ static int airoha_alloc_gdm_port(struct
+ 	}
+ 
+ 	dev = devm_alloc_etherdev_mqs(eth->dev, sizeof(*port),
+-				      AIROHA_NUM_TX_RING, AIROHA_NUM_RX_RING);
++				      AIROHA_NUM_NETDEV_TX_RINGS,
++				      AIROHA_NUM_RX_RING);
+ 	if (!dev) {
+ 		dev_err(eth->dev, "alloc_etherdev failed\n");
+ 		return -ENOMEM;
+@@ -2888,6 +3169,11 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->irq = qdma->irq;
+ 	SET_NETDEV_DEV(dev, eth->dev);
+ 
++	/* reserve hw queues for HTB offloading */
++	err = netif_set_real_num_tx_queues(dev, AIROHA_NUM_TX_RING);
++	if (err)
++		return err;
++
+ 	err = of_get_ethdev_address(np, dev);
+ 	if (err) {
+ 		if (err == -EPROBE_DEFER)



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:20 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace cpufreq patch with new
 version
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36416.1736517661.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/506955735075241d3467d632cae7ed5f10e21c2f

commit 506955735075241d3467d632cae7ed5f10e21c2f
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:53:04 2025 +0100

    airoha: an7581: replace cpufreq patch with new version
    
    Replace cpufreq patch with new version requested upstream.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...n-airoha-Add-Airoha-CPU-PM-Domain-support.patch | 201 ++++++++++++++++
 ...eq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch | 253 +++++++++++++++++++++
 ...freq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch | 247 --------------------
 3 files changed, 454 insertions(+), 247 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch b/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
new file mode 100644
index 0000000000..52d3f40b36
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
@@ -0,0 +1,201 @@
+From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Sat, 4 Jan 2025 19:03:09 +0100
+Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
+
+Add Airoha CPU PM Domain support to control frequency and power of CPU
+present on Airoha EN7581 SoC.
+
+Frequency and power can be controlled with the use of the SMC command by
+passing the performance state. The driver also expose a read-only clock
+that expose the current CPU frequency with SMC command.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+Changes v9:
+- Fix compile error targetting wrong branch (remove_new change)
+Changes v8:
+- Add this patch
+- Use SMC invoke instead of 1.2
+
+ drivers/pmdomain/mediatek/Kconfig             |  11 ++
+ drivers/pmdomain/mediatek/Makefile            |   1 +
+ .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
+ 3 files changed, 156 insertions(+)
+ create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+
+--- a/drivers/soc/mediatek/Kconfig
++++ b/drivers/soc/mediatek/Kconfig
+@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
+ 	  Control Processor System (SCPSYS) has several power management related
+ 	  tasks in the system.
+ 
++config AIROHA_CPU_PM_DOMAIN
++	tristate "Airoha CPU power domain"
++	default ARCH_AIROHA
++	depends on PM
++	select PM_GENERIC_DOMAINS
++	help
++	  Say y here to enable CPU power domain support for Airoha SoC.
++
++	  CPU frequency and power is controlled by ATF with SMC command to
++	  set performance states.
++
+ config MTK_MMSYS
+ 	tristate "MediaTek MMSYS Support"
+ 	default ARCH_MEDIATEK
+--- a/drivers/pmdomain/mediatek/Makefile
++++ b/drivers/pmdomain/mediatek/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_MTK_SCPSYS)		+= mtk-scpsys.o
+ obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) 	+= mtk-pm-domains.o
++obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
+--- /dev/null
++++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+@@ -0,0 +1,145 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/arm-smccc.h>
++#include <linux/bitfield.h>
++#include <linux/clk-provider.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_domain.h>
++#include <linux/slab.h>
++
++#define AIROHA_SIP_AVS_HANDLE			0x82000301
++#define AIROHA_AVS_OP_BASE			0xddddddd0
++#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
++#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
++#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
++
++struct airoha_cpu_pmdomain_priv {
++	struct clk_hw hw;
++	struct generic_pm_domain pd;
++};
++
++static long airoha_cpu_pmdomain_clk_round(struct clk_hw *hw, unsigned long rate,
++					  unsigned long *parent_rate)
++{
++	return rate;
++}
++
++static unsigned long airoha_cpu_pmdomain_clk_get(struct clk_hw *hw,
++						 unsigned long parent_rate)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
++			     0, 0, 0, 0, 0, 0, &res);
++
++	/* SMCCC returns freq in MHz */
++	return (int)(res.a0 * 1000 * 1000);
++}
++
++/* Airoha CPU clk SMCC is always enabled */
++static int airoha_cpu_pmdomain_clk_is_enabled(struct clk_hw *hw)
++{
++	return true;
++}
++
++static const struct clk_ops airoha_cpu_pmdomain_clk_ops = {
++	.recalc_rate = airoha_cpu_pmdomain_clk_get,
++	.is_enabled = airoha_cpu_pmdomain_clk_is_enabled,
++	.round_rate = airoha_cpu_pmdomain_clk_round,
++};
++
++static int airoha_cpu_pmdomain_set_performance_state(struct generic_pm_domain *domain,
++						     unsigned int state)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_FREQ_DYN_ADJ,
++			     0, state, 0, 0, 0, 0, &res);
++
++	/* SMC signal correct apply by unsetting BIT 0 */
++	return res.a0 & BIT(0) ? -EINVAL : 0;
++}
++
++static int airoha_cpu_pmdomain_probe(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv;
++	struct device *dev = &pdev->dev;
++	struct clk_init_data init = { };
++	struct generic_pm_domain *pd;
++	struct clk_hw *hw;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	/* Init and register a get-only clk for Cpufreq */
++	init.name = "cpu";
++	init.ops = &airoha_cpu_pmdomain_clk_ops;
++	/* Clock with no set_rate, can't cache */
++	init.flags = CLK_GET_RATE_NOCACHE;
++
++	hw = &priv->hw;
++	hw->init = &init;
++	ret = devm_clk_hw_register(dev, hw);
++	if (ret)
++		return ret;
++
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
++	if (ret)
++		return ret;
++
++	/* Init and register a PD for CPU */
++	pd = &priv->pd;
++	pd->name = "cpu_pd";
++	pd->flags = GENPD_FLAG_ALWAYS_ON;
++	pd->set_performance_state = airoha_cpu_pmdomain_set_performance_state;
++
++	ret = pm_genpd_init(pd, NULL, false);
++	if (ret)
++		return ret;
++
++	ret = of_genpd_add_provider_simple(dev->of_node, pd);
++	if (ret)
++		goto err_add_provider;
++
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_add_provider:
++	pm_genpd_remove(pd);
++
++	return ret;
++}
++
++static void airoha_cpu_pmdomain_remove(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv = platform_get_drvdata(pdev);
++
++	of_genpd_del_provider(pdev->dev.of_node);
++	pm_genpd_remove(&priv->pd);
++}
++
++static const struct of_device_id airoha_cpu_pmdomain_of_match[] = {
++	{ .compatible = "airoha,en7581-cpufreq" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, airoha_cpu_pmdomain_of_match);
++
++static struct platform_driver airoha_cpu_pmdomain_driver = {
++	.probe = airoha_cpu_pmdomain_probe,
++	.remove_new = airoha_cpu_pmdomain_remove,
++	.driver = {
++		.name = "airoha-cpu-pmdomain",
++		.of_match_table = airoha_cpu_pmdomain_of_match,
++	},
++};
++module_platform_driver(airoha_cpu_pmdomain_driver);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
++MODULE_DESCRIPTION("CPU PM domain driver for Airoha SoCs");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch b/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
new file mode 100644
index 0000000000..6a2e54f4d1
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
@@ -0,0 +1,253 @@
+From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 16 Oct 2024 18:00:57 +0200
+Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+
+Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
+frequency scaling with SMC APIs and register a generic "cpufreq-dt"
+device.
+
+All CPU share the same frequency and can't be controlled independently.
+CPU frequency is controlled by the attached PM domain.
+
+Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
+driver is needed with OPP v2 nodes declared in DTS.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+Changes v9:
+- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
+Changes v8:
+- Split in dedicated PM domain driver
+Changes v7:
+- No changes
+Changes v6:
+- Improve Kconfig depends logic
+- Select PM (PM_GENERIC_DOMAINS depends on it)
+- Drop (int) cast for 
+Changes v5:
+- Rename cpu_pd to perf for power domain name
+- Use remove instead of remove_new
+Changes v4:
+- Rework to clk-only + PM set_performance_state implementation
+Changes v3:
+- Adapt to new cpufreq-dt APIs
+- Register cpufreq-dt instead of custom freq driver
+Changes v2:
+- Fix kernel bot error with missing slab.h and bitfield.h header
+- Limit COMPILE_TEST to ARM64 due to smcc 1.2
+
+ drivers/cpufreq/Kconfig.arm          |   8 ++
+ drivers/cpufreq/Makefile             |   1 +
+ drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
+ drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
+ 4 files changed, 163 insertions(+)
+ create mode 100644 drivers/cpufreq/airoha-cpufreq.c
+
+--- a/drivers/cpufreq/Kconfig.arm
++++ b/drivers/cpufreq/Kconfig.arm
+@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called sun50i-cpufreq-nvmem.
+ 
++config ARM_AIROHA_SOC_CPUFREQ
++	tristate "Airoha EN7581 SoC CPUFreq support"
++	depends on ARCH_AIROHA || COMPILE_TEST
++	select PM_OPP
++	default ARCH_AIROHA
++	help
++	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
++
+ config ARM_APPLE_SOC_CPUFREQ
+ 	tristate "Apple Silicon SoC CPUFreq support"
+ 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
+--- a/drivers/cpufreq/Makefile
++++ b/drivers/cpufreq/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
+ 
+ ##################################################################################
+ # ARM SoC drivers
++obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
+ obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
+--- /dev/null
++++ b/drivers/cpufreq/airoha-cpufreq.c
+@@ -0,0 +1,166 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/bitfield.h>
++#include <linux/cpufreq.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
++#include <linux/slab.h>
++
++#include "cpufreq-dt.h"
++
++struct airoha_cpufreq_priv {
++	int opp_token;
++	struct device **virt_devs;
++	struct platform_device *cpufreq_dt;
++};
++
++static struct platform_device *cpufreq_pdev;
++
++/* NOP function to disable OPP from setting clock */
++static int airoha_cpufreq_config_clks_nop(struct device *dev,
++					  struct opp_table *opp_table,
++					  struct dev_pm_opp *old_opp,
++					  struct dev_pm_opp *opp,
++					  void *data, bool scaling_down)
++{
++	return 0;
++}
++
++static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
++static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
++
++static int airoha_cpufreq_probe(struct platform_device *pdev)
++{
++	struct dev_pm_opp_config config = { };
++	struct platform_device *cpufreq_dt;
++	struct airoha_cpufreq_priv *priv;
++	struct device *dev = &pdev->dev;
++	struct device **virt_devs = NULL;
++	struct device *cpu_dev;
++	int ret;
++
++	/* CPUs refer to the same OPP table */
++	cpu_dev = get_cpu_device(0);
++	if (!cpu_dev)
++		return -ENODEV;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	config.clk_names = airoha_cpufreq_clk_names;
++	config.config_clks = airoha_cpufreq_config_clks_nop;
++	config.genpd_names = airoha_cpufreq_genpd_names;
++	config.virt_devs = &virt_devs;
++
++	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
++	if (priv->opp_token < 0)
++		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
++
++	/* Set Attached PM for OPP ACTIVE */
++	if (virt_devs) {
++		const char * const *name = airoha_cpufreq_genpd_names;
++		int i, j;
++
++		for (i = 0; *name; i++, name++) {
++			ret = pm_runtime_resume_and_get(virt_devs[i]);
++			if (ret) {
++				dev_err(cpu_dev, "failed to resume %s: %d\n",
++					*name, ret);
++
++				/* Rollback previous PM runtime calls */
++				name = config.genpd_names;
++				for (j = 0; *name && j < i; j++, name++)
++					pm_runtime_put(virt_devs[j]);
++
++				goto err_register_cpufreq;
++			}
++		}
++		priv->virt_devs = virt_devs;
++	}
++
++	cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
++	ret = PTR_ERR_OR_ZERO(cpufreq_dt);
++	if (ret) {
++		dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret);
++		goto err_register_cpufreq;
++	}
++
++	priv->cpufreq_dt = cpufreq_dt;
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_register_cpufreq:
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	return ret;
++}
++
++static void airoha_cpufreq_remove(struct platform_device *pdev)
++{
++	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
++	const char * const *name = airoha_cpufreq_genpd_names;
++	int i;
++
++	platform_device_unregister(priv->cpufreq_dt);
++
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	for (i = 0; *name; i++, name++)
++		pm_runtime_put(priv->virt_devs[i]);
++}
++
++static struct platform_driver airoha_cpufreq_driver = {
++	.probe = airoha_cpufreq_probe,
++	.remove_new = airoha_cpufreq_remove,
++	.driver = {
++		.name = "airoha-cpufreq",
++	},
++};
++
++static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
++	{ .compatible = "airoha,en7581" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
++
++static int __init airoha_cpufreq_init(void)
++{
++	struct device_node *np = of_find_node_by_path("/");
++	const struct of_device_id *match;
++	int ret;
++
++	if (!np)
++		return -ENODEV;
++
++	match = of_match_node(airoha_cpufreq_match_list, np);
++	of_node_put(np);
++	if (!match)
++		return -ENODEV;
++
++	ret = platform_driver_register(&airoha_cpufreq_driver);
++	if (unlikely(ret < 0))
++		return ret;
++
++	cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq",
++						     -1, match, sizeof(*match));
++	ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
++	if (ret)
++		platform_driver_unregister(&airoha_cpufreq_driver);
++
++	return ret;
++}
++module_init(airoha_cpufreq_init);
++
++static void __exit airoha_cpufreq_exit(void)
++{
++	platform_device_unregister(cpufreq_pdev);
++	platform_driver_unregister(&airoha_cpufreq_driver);
++}
++module_exit(airoha_cpufreq_exit);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
++MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
++MODULE_LICENSE("GPL");
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -103,6 +103,8 @@ static const struct of_device_id allowli
+  * platforms using "operating-points-v2" property.
+  */
+ static const struct of_device_id blocklist[] __initconst = {
++	{ .compatible = "airoha,en7581", },
++
+ 	{ .compatible = "allwinner,sun50i-h6", },
+ 
+ 	{ .compatible = "apple,arm-platform", },
diff --git a/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch b/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch
deleted file mode 100644
index 0276a4ee81..0000000000
--- a/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch
+++ /dev/null
@@ -1,247 +0,0 @@
-From 5296da64f77ef6c809b715cdecf308977a08acb9 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH] cpufreq: airoha: Add EN7581 Cpufreq SMC driver
-
-Add simple Cpufreq driver for Airoha EN7581 SoC that control CPU
-frequency scaling with SMC APIs.
-
-All CPU share the same frequency and can't be controlled independently.
-Current shared CPU frequency is returned by the related SMC command.
-
-Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
-driver is needed with OPP v2 nodes declared in DTS.
-
-Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
----
- drivers/cpufreq/Kconfig.arm          |   8 ++
- drivers/cpufreq/Makefile             |   1 +
- drivers/cpufreq/airoha-cpufreq.c     | 183 +++++++++++++++++++++++++++
- drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
- 4 files changed, 194 insertions(+)
- create mode 100644 drivers/cpufreq/airoha-cpufreq.c
-
---- a/drivers/cpufreq/Kconfig.arm
-+++ b/drivers/cpufreq/Kconfig.arm
-@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called sun50i-cpufreq-nvmem.
- 
-+config ARM_AIROHA_SOC_CPUFREQ
-+	tristate "Airoha EN7581 SoC CPUFreq support"
-+	depends on ARCH_AIROHA || COMPILE_TEST
-+	select PM_OPP
-+	default ARCH_AIROHA
-+	help
-+	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
-+
- config ARM_APPLE_SOC_CPUFREQ
- 	tristate "Apple Silicon SoC CPUFreq support"
- 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
---- a/drivers/cpufreq/Makefile
-+++ b/drivers/cpufreq/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
- 
- ##################################################################################
- # ARM SoC drivers
-+obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
- obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
---- /dev/null
-+++ b/drivers/cpufreq/airoha-cpufreq.c
-@@ -0,0 +1,183 @@
-+// SPDX-License-Identifier: GPL-2.0
-+
-+#include <linux/cpufreq.h>
-+#include <linux/module.h>
-+#include <linux/arm-smccc.h>
-+
-+#define AIROHA_SIP_AVS_HANDLE			0x82000301
-+#define AIROHA_AVS_OP_BASE			0xddddddd0
-+#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
-+#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
-+#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
-+
-+struct airoha_cpufreq_priv {
-+	struct list_head list;
-+
-+	cpumask_var_t cpus;
-+	struct device *cpu_dev;
-+	struct cpufreq_frequency_table *freq_table;
-+};
-+
-+static LIST_HEAD(priv_list);
-+
-+static unsigned int airoha_cpufreq_get(unsigned int cpu)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_GET_FREQ,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	return (int)(res.a0 * 1000);
-+}
-+
-+static int airoha_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int index)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_FREQ_DYN_ADJ,
-+		.a3 = index,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	/* SMC signal correct apply by unsetting BIT 0 */
-+	return res.a0 & BIT(0) ? -EINVAL : 0;
-+}
-+
-+static struct airoha_cpufreq_priv *airoha_cpufreq_find_data(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+
-+	list_for_each_entry(priv, &priv_list, list) {
-+		if (cpumask_test_cpu(cpu, priv->cpus))
-+			return priv;
-+	}
-+
-+	return NULL;
-+}
-+
-+static int airoha_cpufreq_init(struct cpufreq_policy *policy)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+
-+	priv = airoha_cpufreq_find_data(policy->cpu);
-+	if (!priv)
-+		return -ENODEV;
-+
-+	cpu_dev = priv->cpu_dev;
-+	cpumask_copy(policy->cpus, priv->cpus);
-+	policy->driver_data = priv;
-+	policy->freq_table = priv->freq_table;
-+
-+	return 0;
-+}
-+
-+static struct cpufreq_driver airoha_cpufreq_driver = {
-+	.flags		= CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-+			  CPUFREQ_IS_COOLING_DEV,
-+	.verify		= cpufreq_generic_frequency_table_verify,
-+	.target_index	= airoha_cpufreq_set_target,
-+	.get		= airoha_cpufreq_get,
-+	.init		= airoha_cpufreq_init,
-+	.attr		= cpufreq_generic_attr,
-+	.name		= "airoha-cpufreq",
-+};
-+
-+static int airoha_cpufreq_driver_init_cpu(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+	int ret;
-+
-+	cpu_dev = get_cpu_device(cpu);
-+	if (!cpu_dev)
-+		return -EPROBE_DEFER;
-+
-+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	if (!zalloc_cpumask_var(&priv->cpus, GFP_KERNEL))
-+		return -ENOMEM;
-+
-+	cpumask_set_cpu(cpu, priv->cpus);
-+	priv->cpu_dev = cpu_dev;
-+
-+	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_of_cpumask_add_table(priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &priv->freq_table);
-+	if (ret)
-+		goto err;
-+
-+	list_add(&priv->list, &priv_list);
-+
-+	return 0;
-+
-+err:
-+	dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+	free_cpumask_var(priv->cpus);
-+
-+	return ret;
-+}
-+
-+static void airoha_cpufreq_release(void)
-+{
-+	struct airoha_cpufreq_priv *priv, *tmp;
-+
-+	list_for_each_entry_safe(priv, tmp, &priv_list, list) {
-+		dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &priv->freq_table);
-+		dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+		free_cpumask_var(priv->cpus);
-+		list_del(&priv->list);
-+		kfree(priv);
-+	}
-+}
-+
-+static int __init airoha_cpufreq_driver_probe(void)
-+{
-+	int cpu, ret;
-+
-+	if (!of_machine_is_compatible("airoha,en7581"))
-+		return -ENODEV;
-+
-+	for_each_possible_cpu(cpu) {
-+		ret = airoha_cpufreq_driver_init_cpu(cpu);
-+		if (ret)
-+			goto err;
-+	}
-+
-+	ret = cpufreq_register_driver(&airoha_cpufreq_driver);
-+	if (ret)
-+		goto err;
-+
-+	return 0;
-+
-+err:
-+	airoha_cpufreq_release();
-+	return ret;
-+}
-+module_init(airoha_cpufreq_driver_probe);
-+
-+static void __exit airoha_cpufreq_driver_remove(void)
-+{
-+	cpufreq_unregister_driver(&airoha_cpufreq_driver);
-+	airoha_cpufreq_release();
-+}
-+module_exit(airoha_cpufreq_driver_remove);
-+
-+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
-+MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
-+MODULE_LICENSE("GPL");
---- a/drivers/cpufreq/cpufreq-dt-platdev.c
-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,8 @@ static const struct of_device_id allowli
-  * platforms using "operating-points-v2" property.
-  */
- static const struct of_device_id blocklist[] __initconst = {
-+	{ .compatible = "airoha,en7581", },
-+
- 	{ .compatible = "allwinner,sun50i-h6", },
- 
- 	{ .compatible = "apple,arm-platform", },



From lede-commits at lists.infradead.org  Fri Jan 10 05:55:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:55:21 -0500
Subject: [openwrt/openwrt]  airoha: an7581: refresh DTS with changes for
 cpufreq, MTD and MMC
In-Reply-To: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
References: <173651731224.950027.15170209424464185094@git-01.infra.openwrt.org>
Message-ID: <mailman.36417.1736517662.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/17b0d1379a3cd4a2e2dbefa7d0f9bc281269f97e

commit 17b0d1379a3cd4a2e2dbefa7d0f9bc281269f97e
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:53:49 2025 +0100

    airoha: an7581: refresh DTS with changes for cpufreq, MTD and MMC
    
    Refresh DTS with required changes for cpufreq, MTD and MMC. While at it
    also fix wrong speed for MAC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/airoha/dts/an7581-evb.dts |  31 +++++----
 target/linux/airoha/dts/an7581.dtsi    | 118 ++++++++++++++++++++++++++++++---
 2 files changed, 127 insertions(+), 22 deletions(-)

diff --git a/target/linux/airoha/dts/an7581-evb.dts b/target/linux/airoha/dts/an7581-evb.dts
index 3cf531a29c..9e88bc8a77 100644
--- a/target/linux/airoha/dts/an7581-evb.dts
+++ b/target/linux/airoha/dts/an7581-evb.dts
@@ -150,35 +150,40 @@
 
 &spi_nand {
 	partitions {
-		compatible = "airoha,fixed-partitions";
+		compatible = "fixed-partitions";
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		bootloader at 0 {
 			label = "bootloader";
 			reg = <0x00000000 0x00080000>;
+			read-only;
 		};
 
-		tclinux at 80000 {
+		art at 200000 {
+			label = "art";
+			reg = <0x00200000 0x00400000>;
+		};
+
+		tclinux at 600000 {
 			label = "tclinux";
-			compatible = "denx,fit";
-			reg = <0x00080000 0x02800000>;
+			reg = <0x00600000 0x03200000>;
 		};
 
-		tclinux_slave at 2880000 {
-			label = "tclinux_slave";
-			reg = <0x02880000 0x02800000>;
+		tclinux_slave at 3800000 {
+			label = "tclinux_alt";
+			reg = <0x03800000 0x03200000>;
 		};
 
-		rootfs_data at 5080000 {
+		rootfs_data at 6a00000 {
 			label = "rootfs_data";
-			reg = <0x5080000 0x00800000>;
+			reg = <0x06a00000 0x01400000>;
 		};
 
-		art at ffffffff {
-			compatible = "airoha,dynamic-art";
-			label = "art";
-			reg = <0xffffffff 0x00300000>;
+		reserved_bmt at 7e00000 {
+			label = "reserved_bmt";
+			reg = <0x07e00000 0x00200000>;
+			read-only;
 		};
 	};
 };
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 8abd736875..820ab0bfa8 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -78,7 +78,10 @@
 			reg = <0x0>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -89,7 +92,10 @@
 			reg = <0x1>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -100,7 +106,10 @@
 			reg = <0x2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -111,7 +120,10 @@
 			reg = <0x3>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -125,68 +137,156 @@
 		};
 	};
 
+	cpufreq: cpufreq {
+		compatible = "airoha,en7581-cpufreq";
+
+		operating-points-v2 = <&cpu_smcc_opp_table>;
+
+		#power-domain-cells = <0>;
+		#clock-cells = <0>;
+	};
+
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;
 
 		opp-500000000 {
 			opp-hz = /bits/ 64 <500000000>;
+			required-opps = <&smcc_opp0>;
 		};
 
 		opp-550000000 {
 			opp-hz = /bits/ 64 <550000000>;
+			required-opps = <&smcc_opp1>;
 		};
 
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
+			required-opps = <&smcc_opp2>;
 		};
 
 		opp-650000000 {
 			opp-hz = /bits/ 64 <650000000>;
+			required-opps = <&smcc_opp3>;
 		};
 
 		opp-7000000000 {
 			opp-hz = /bits/ 64 <700000000>;
+			required-opps = <&smcc_opp4>;
 		};
 
 		opp-7500000000 {
 			opp-hz = /bits/ 64 <750000000>;
+			required-opps = <&smcc_opp5>;
 		};
 
 		opp-8000000000 {
 			opp-hz = /bits/ 64 <800000000>;
+			required-opps = <&smcc_opp6>;
 		};
 
 		opp-8500000000 {
 			opp-hz = /bits/ 64 <850000000>;
+			required-opps = <&smcc_opp7>;
 		};
 
 		opp-9000000000 {
 			opp-hz = /bits/ 64 <900000000>;
+			required-opps = <&smcc_opp8>;
 		};
 
 		opp-9500000000 {
 			opp-hz = /bits/ 64 <950000000>;
+			required-opps = <&smcc_opp9>;
 		};
 
 		opp-10000000000 {
 			opp-hz = /bits/ 64 <1000000000>;
+			required-opps = <&smcc_opp10>;
 		};
 
 		opp-10500000000 {
 			opp-hz = /bits/ 64 <1050000000>;
+			required-opps = <&smcc_opp11>;
 		};
 
 		opp-11000000000 {
 			opp-hz = /bits/ 64 <1100000000>;
+			required-opps = <&smcc_opp12>;
 		};
 
 		opp-11500000000 {
 			opp-hz = /bits/ 64 <1150000000>;
+			required-opps = <&smcc_opp13>;
 		};
 
 		opp-12000000000 {
 			opp-hz = /bits/ 64 <1200000000>;
+			required-opps = <&smcc_opp14>;
+		};
+	};
+
+	cpu_smcc_opp_table: opp-table-cpu-smcc {
+		compatible = "operating-points-v2";
+
+		smcc_opp0: opp0 {
+			opp-level = <0>;
+		};
+
+		smcc_opp1: opp1 {
+			opp-level = <1>;
+		};
+
+		smcc_opp2: opp2 {
+			opp-level = <2>;
+		};
+
+		smcc_opp3: opp3 {
+			opp-level = <3>;
+		};
+
+		smcc_opp4: opp4 {
+			opp-level = <4>;
+		};
+
+		smcc_opp5: opp5 {
+			opp-level = <5>;
+		};
+
+		smcc_opp6: opp6 {
+			opp-level = <6>;
+		};
+
+		smcc_opp7: opp7 {
+			opp-level = <7>;
+		};
+
+		smcc_opp8: opp8 {
+			opp-level = <8>;
+		};
+
+		smcc_opp9: opp9 {
+			opp-level = <9>;
+		};
+
+		smcc_opp10: opp10 {
+			opp-level = <10>;
+		};
+
+		smcc_opp11: opp11 {
+			opp-level = <11>;
+		};
+
+		smcc_opp12: opp12 {
+			opp-level = <12>;
+		};
+
+		smcc_opp13: opp13 {
+			opp-level = <13>;
+		};
+
+		smcc_opp14: opp14 {
+			opp-level = <14>;
 		};
 	};
 
@@ -431,16 +531,16 @@
 				spi-max-frequency = <50000000>;
 				spi-tx-bus-width = <1>;
 				spi-rx-bus-width = <2>;
-				airoha,bmt;
 			};
 		};
 
 		mmc0: mmc at 1fa0e000 {
-			compatible = "mediatek,mt7622-mmc";
+			compatible = "airoha,an7581-mmc";
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-			bus-width = <4>;
+			clocks = <&scuclk EN7581_CLK_EMMC>;
+			clock-names = "source";			bus-width = <4>;
 			max-frequency = <52000000>;
 			disable-wp;
 			cap-mmc-highspeed;
@@ -587,7 +687,7 @@
 				status = "disabled";
 
 				fixed-link {
-					speed = <1000>;
+					speed = <10000>;
 					full-duplex;
 					pause;
 				};
@@ -648,7 +748,7 @@
 					phy-mode = "internal";
 
 					fixed-link {
-						speed = <1000>;
+						speed = <10000>;
 						full-duplex;
 						pause;
 					};



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:17 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending patch to fix PCI
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36428.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/99689859f0eb9ddf68bb41d6f4dec5aa42783e54

commit 99689859f0eb9ddf68bb41d6f4dec5aa42783e54
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:28:20 2025 +0100

    airoha: an7581: add pending patch to fix PCI
    
    Add pending patch to fix PCIe missing register.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 77329b7d8d870897d85270a4e806ec0d04396685)
---
 ...k-gen3-configure-PBUS_CSR-registers-for-E.patch | 83 ++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch b/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
new file mode 100644
index 0000000000..d896e1aee3
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
@@ -0,0 +1,83 @@
+From 2285d3b428c7d8f1c4fda2fb995e7e46a05350e0 Mon Sep 17 00:00:00 2001
+Message-ID: <2285d3b428c7d8f1c4fda2fb995e7e46a05350e0.1736324542.git.lorenzo at kernel.org>
+In-Reply-To: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+References: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 3 Sep 2024 23:14:02 +0200
+Subject: [PATCH 2/2] PCI: mediatek-gen3: configure PBUS_CSR registers for
+ EN7581 SoC
+
+Configure PBus base address and address mask in order to allow the hw
+detecting if a given address is on PCIE0, PCIE1 or PCIE2.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 29 ++++++++++++++++++++-
+ 1 file changed, 28 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -15,6 +15,7 @@
+ #include <linux/irqchip/chained_irq.h>
+ #include <linux/irqdomain.h>
+ #include <linux/kernel.h>
++#include <linux/mfd/syscon.h>
+ #include <linux/module.h>
+ #include <linux/msi.h>
+ #include <linux/of_device.h>
+@@ -24,6 +25,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/regmap.h>
+ #include <linux/reset.h>
+ 
+ #include "../pci.h"
+@@ -120,6 +122,13 @@
+ 
+ #define MAX_NUM_PHY_RESETS		3
+ 
++#define PCIE_EN7581_PBUS_ADDR(_n)	(0x00 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_ADDR_MASK(_n)	(0x04 + ((_n) << 3))
++#define PCIE_EN7581_PBUS_BASE_ADDR(_n)	\
++	((_n) == 2 ? 0x28000000 :	\
++	 (_n) == 1 ? 0x24000000 : 0x20000000)
++#define PCIE_EN7581_PBUS_BASE_ADDR_MASK	GENMASK(31, 26)
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -871,7 +880,8 @@ static int mtk_pcie_parse_port(struct mt
+ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
+ {
+ 	struct device *dev = pcie->dev;
+-	int err;
++	struct regmap *map;
++	int err, slot;
+ 	u32 val;
+ 
+ 	/*
+@@ -880,6 +890,23 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
++	map = syscon_regmap_lookup_by_compatible("airoha,en7581-pbus-csr");
++	if (IS_ERR(map))
++		return PTR_ERR(map);
++
++	/*
++	 * Configure PBus base address and address mask in order to allow the
++	 * hw detecting if a given address is on PCIE0, PCIE1 or PCIE2.
++	 */
++	slot = of_get_pci_domain_nr(dev->of_node);
++	if (slot < 0)
++		return slot;
++
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR(slot));
++	regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot),
++		     PCIE_EN7581_PBUS_BASE_ADDR_MASK);
++
+ 	err = phy_init(pcie->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize PHY\n");



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:13 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport 2 fix for airoha ethernet
 driver
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36429.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/ce926ee32feb4f0c172e6f0f5c04e4f12d419959

commit ce926ee32feb4f0c172e6f0f5c04e4f12d419959
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:16:46 2025 +0100

    airoha: an7581: backport 2 fix for airoha ethernet driver
    
    Backport 2 fix for airoha ethernet driver merged upstream.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit b4ae5378d403aa263ba5ec26ccc333ab0de81cff)
---
 ...Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch |  35 +++++++
 ...net-airoha-Fix-error-path-in-airoha_probe.patch | 102 +++++++++++++++++++++
 2 files changed, 137 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch b/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch
new file mode 100644
index 0000000000..a71197150f
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/036-v6.13-net-airoha-Fix-typo-in-REG_CDM2_FWD_CFG-configuratio.patch
@@ -0,0 +1,35 @@
+From 30d9d8f6a2d7e44a9f91737dd409dbc87ac6f6b7 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 15 Oct 2024 09:58:09 +0200
+Subject: [PATCH] net: airoha: Fix typo in REG_CDM2_FWD_CFG configuration
+
+Fix typo in airoha_fe_init routine configuring CDM2_OAM_QSEL_MASK field
+of REG_CDM2_FWD_CFG register.
+This bug is not introducing any user visible problem since Frame Engine
+CDM2 port is used just by the second QDMA block and we currently enable
+just QDMA1 block connected to the MT7530 dsa switch via CDM1 port.
+
+Introduced by commit 23020f049327 ("net: airoha: Introduce ethernet
+support for EN7581 SoC")
+
+Reported-by: ChihWei Cheng <chihwei.cheng at airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Message-ID: <20241015-airoha-eth-cdm2-fixes-v1-1-9dc6993286c3 at kernel.org>
+Signed-off-by: Andrew Lunn <andrew at lunn.ch>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1369,7 +1369,8 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
+ 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
+ 		      GDM2_CHN_VLD_MODE_MASK);
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, 15);
++	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
++		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
+ 
+ 	/* init fragment and assemble Force Port */
+ 	/* NPU Core-3, NPU Bridge Channel-3 */
diff --git a/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch b/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch
new file mode 100644
index 0000000000..9499c1541a
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/037-v6.14-net-airoha-Fix-error-path-in-airoha_probe.patch
@@ -0,0 +1,102 @@
+From 0c7469ee718e1dd929f52bfb142a7f6fb68f0765 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Mon, 16 Dec 2024 18:47:33 +0100
+Subject: [PATCH] net: airoha: Fix error path in airoha_probe()
+
+Do not run napi_disable() if airoha_hw_init() fails since Tx/Rx napi
+has not been started yet. In order to fix the issue, introduce
+airoha_qdma_stop_napi routine and remove napi_disable in
+airoha_hw_cleanup().
+
+Fixes: 23020f049327 ("net: airoha: Introduce ethernet support for EN7581 SoC")
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Link: https://patch.msgid.link/20241216-airoha_probe-error-path-fix-v2-1-6b10e04e9a5c at kernel.org
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 33 ++++++++++++++++------
+ 1 file changed, 25 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2139,17 +2139,14 @@ static void airoha_hw_cleanup(struct air
+ 		if (!qdma->q_rx[i].ndesc)
+ 			continue;
+ 
+-		napi_disable(&qdma->q_rx[i].napi);
+ 		netif_napi_del(&qdma->q_rx[i].napi);
+ 		airoha_qdma_cleanup_rx_queue(&qdma->q_rx[i]);
+ 		if (qdma->q_rx[i].page_pool)
+ 			page_pool_destroy(qdma->q_rx[i].page_pool);
+ 	}
+ 
+-	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++) {
+-		napi_disable(&qdma->q_tx_irq[i].napi);
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
+ 		netif_napi_del(&qdma->q_tx_irq[i].napi);
+-	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
+ 		if (!qdma->q_tx[i].ndesc)
+@@ -2174,6 +2171,21 @@ static void airoha_qdma_start_napi(struc
+ 	}
+ }
+ 
++static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_tx_irq); i++)
++		napi_disable(&qdma->q_tx_irq[i].napi);
++
++	for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
++		if (!qdma->q_rx[i].ndesc)
++			continue;
++
++		napi_disable(&qdma->q_rx[i].napi);
++	}
++}
++
+ static void airoha_update_hw_stats(struct airoha_gdm_port *port)
+ {
+ 	struct airoha_eth *eth = port->qdma->eth;
+@@ -2731,7 +2743,7 @@ static int airoha_probe(struct platform_
+ 
+ 	err = airoha_hw_init(pdev, eth);
+ 	if (err)
+-		goto error;
++		goto error_hw_cleanup;
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_qdma_start_napi(&eth->qdma[i]);
+@@ -2746,13 +2758,16 @@ static int airoha_probe(struct platform_
+ 		err = airoha_alloc_gdm_port(eth, np);
+ 		if (err) {
+ 			of_node_put(np);
+-			goto error;
++			goto error_napi_stop;
+ 		}
+ 	}
+ 
+ 	return 0;
+ 
+-error:
++error_napi_stop:
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++		airoha_qdma_stop_napi(&eth->qdma[i]);
++error_hw_cleanup:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_hw_cleanup(&eth->qdma[i]);
+ 
+@@ -2773,8 +2788,10 @@ static void airoha_remove(struct platfor
+ 	struct airoha_eth *eth = platform_get_drvdata(pdev);
+ 	int i;
+ 
+-	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
++	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) {
++		airoha_qdma_stop_napi(&eth->qdma[i]);
+ 		airoha_hw_cleanup(&eth->qdma[i]);
++	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
+ 		struct airoha_gdm_port *port = eth->ports[i];



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:18 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending patch for ETS qdisc on
 ethernet driver
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36430.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/9a18304344075383c2e5b406a0f2126909a516e3

commit 9a18304344075383c2e5b406a0f2126909a516e3
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:29:02 2025 +0100

    airoha: an7581: add pending patch for ETS qdisc on ethernet driver
    
    Add pending patch for ETS qdisc on Airoha ethernet driver.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 53bc7633317a7da9bf7ef440ed3da39404cf146e)
---
 ...a-Fix-channel-configuration-for-ETS-Qdisc.patch | 104 +++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
new file mode 100644
index 0000000000..5bd7487b9f
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
@@ -0,0 +1,104 @@
+From patchwork Tue Jan  7 22:26:28 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Lorenzo Bianconi <lorenzo at kernel.org>
+X-Patchwork-Id: 13929634
+X-Patchwork-Delegate: kuba at kernel.org
+Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org
+ [10.30.226.201])
+	(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))
+	(No client certificate requested)
+	by smtp.subspace.kernel.org (Postfix) with ESMTPS id A82271A3035
+	for <netdev at vger.kernel.org>; Tue,  7 Jan 2025 22:27:02 +0000 (UTC)
+Authentication-Results: smtp.subspace.kernel.org;
+ arc=none smtp.client-ip=10.30.226.201
+ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;
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+ b=XZhiaYPBxLiUvOxWeE7zfuFI3fOmu5SLoHdLPFXNXBtvmZWWIohKA8AeGI37v/l+0Du9JwGRKMkb19v/IxDJtMXkyTJXHHKYhXWaNFpj/pFRk9C4WsIa29OCqanfA+yXUQLJyGVopMLsxfcbzznozIANWbaO0NVBHyZZSH9eaYU=
+ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org;
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+	dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org
+ header.b="Gx3FMrdJ"
+Received: by smtp.kernel.org (Postfix) with ESMTPSA id E1A57C4CED6;
+	Tue,  7 Jan 2025 22:27:01 +0000 (UTC)
+DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;
+	s=k20201202; t=1736288822;
+	bh=/BuvRwLGk+7by7QeOu7n+QgJ5Sk03TO9WCsGbgTs3sE=;
+	h=From:Date:Subject:To:Cc:From;
+	b=Gx3FMrdJH+xaen2jSRnu523A40ZOBBFaj896IwBv1PeosUm+eiUCx+K3Qz9CAisX0
+	 Bj4ohheTiHZDQHZelhKF3ZFTfVQUyYiLiard4x5QdylW2YZA0cpwJe64TMf7CsHbrT
+	 NHCF7nrJPJUwOhDoS/YVdeTw/bb9DlM95aKGSfyH0cy7Kdmjz55No3Im9bCSKcgyaX
+	 Y/lcRZglFjbLyiC3LS06AtM0KOyhUxQKrH+ZWpx5E/sdOEj3SRTJ/I+K8o3m75Kzsn
+	 wKRft5pBwfhGEIrJXrFR4f73QwnxJ6eSUrfjYV8k4mFQpH3nB0hKLi2DpvYPim5dj/
+	 ADsdcP6QPwokg==
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Tue, 07 Jan 2025 23:26:28 +0100
+Subject: [PATCH net-next] net: airoha: Fix channel configuration for ETS
+ Qdisc
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Message-Id: <20250107-airoha-ets-fix-chan-v1-1-97f66ed3a068 at kernel.org>
+X-B4-Tracking: v=1; b=H4sIABOqfWcC/x2MSwqAMAwFryJZG6ifVvAq4qLUaLNRaUSE0rsbX
+ Q5v3mQQSkwCY5Uh0c3Cx67Q1BWE6PeNkBdlaE1rTWMG9JyO6JEuwZUf/CSkzobgw+AW14M+z0S
+ 6/dVpLuUFNrlCSGUAAAA=
+X-Change-ID: 20250107-airoha-ets-fix-chan-e35ccac76d64
+To: Felix Fietkau <nbd at nbd.name>, Sean Wang <sean.wang at mediatek.com>,
+ Mark Lee <Mark-MC.Lee at mediatek.com>, Andrew Lunn <andrew+netdev at lunn.ch>,
+ "David S. Miller" <davem at davemloft.net>, Eric Dumazet <edumazet at google.com>,
+ Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+ Matthias Brugger <matthias.bgg at gmail.com>,
+ AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Cc: linux-arm-kernel at lists.infradead.org,
+ linux-mediatek at lists.infradead.org, netdev at vger.kernel.org,
+ Lorenzo Bianconi <lorenzo at kernel.org>
+X-Mailer: b4 0.14.2
+X-Patchwork-Delegate: kuba at kernel.org
+
+Limit ETS QoS channel to AIROHA_NUM_QOS_CHANNELS in
+airoha_tc_setup_qdisc_ets() in order to align the configured channel to
+the value set in airoha_dev_select_queue().
+
+Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support")
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+
+---
+base-commit: a1942da8a38717ddd9b4c132f59e1657c85c1432
+change-id: 20250107-airoha-ets-fix-chan-e35ccac76d64
+
+Best regards,
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2833,11 +2833,14 @@ static int airoha_qdma_get_tx_ets_stats(
+ static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
+ 				     struct tc_ets_qopt_offload *opt)
+ {
+-	int channel = TC_H_MAJ(opt->handle) >> 16;
++	int channel;
+ 
+ 	if (opt->parent == TC_H_ROOT)
+ 		return -EINVAL;
+ 
++	channel = TC_H_MAJ(opt->handle) >> 16;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++
+ 	switch (opt->command) {
+ 	case TC_ETS_REPLACE:
+ 		return airoha_qdma_set_tx_ets_sched(port, channel, opt);



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:16 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add patch fixing support for MMC
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36431.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6b4fcc55a9b73fbbcbf68484dd35b1cb78873496

commit 6b4fcc55a9b73fbbcbf68484dd35b1cb78873496
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:27:07 2025 +0100

    airoha: an7581: add patch fixing support for MMC
    
    Add patch fixing support for MMC. Additional clock are needed for MMC to
    work and some small fixup to make the Mediatek MMC driver on Airoha SoC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit be5a9ff24b9c3b7d1b5bf508b84a35be9f9b3ea9)
---
 ...Rework-clock-handling-for-different-clock.patch |  82 ++++++++++++
 ...s-clock-drop-NUM_CLOCKS-define-for-EN7581.patch |  23 ++++
 ...bindings-clock-add-ID-for-eMMC-for-EN7581.patch |  23 ++++
 ...-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch |  39 ++++++
 ...mc-mtk-sd-add-support-for-AN7581-MMC-Host.patch | 138 +++++++++++++++++++++
 5 files changed, 305 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
new file mode 100644
index 0000000000..7333ebbdf2
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -0,0 +1,82 @@
+From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 18 Dec 2024 10:03:45 +0100
+Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
+ numbers
+
+Airoha EN7581 SoC have additional clock compared to EN7523 but current
+driver permits to only support up to EN7523 clock numbers.
+
+To handle this, rework the clock handling and permit to declare the
+clocks number in match_data and alloca clk_data based on the compatible
+match_data.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/clk/clk-en7523.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -75,6 +75,7 @@ struct en_rst_data {
+ };
+ 
+ struct en_clk_soc_data {
++	u32 num_clocks;
+ 	const struct clk_ops pcie_ops;
+ 	int (*hw_init)(struct platform_device *pdev,
+ 		       struct clk_hw_onecell_data *clk_data);
+@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+ 
+ 	hw = en7523_register_pcie_clk(dev, np_base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+ 
+ static int en7523_clk_hw_init(struct platform_device *pdev,
+@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
+ 
+ 	hw = en7523_register_pcie_clk(dev, base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+ 
+ static int en7523_reset_update(struct reset_controller_dev *rcdev,
+@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+ 	struct clk_hw_onecell_data *clk_data;
+ 	int r;
+ 
++	soc_data = device_get_match_data(&pdev->dev);
++
+ 	clk_data = devm_kzalloc(&pdev->dev,
+-				struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
++				struct_size(clk_data, hws, soc_data->num_clocks),
+ 				GFP_KERNEL);
+ 	if (!clk_data)
+ 		return -ENOMEM;
+ 
+-	soc_data = device_get_match_data(&pdev->dev);
+ 	r = soc_data->hw_init(pdev, clk_data);
+ 	if (r)
+ 		return r;
+ 
++	clk_data->num = soc_data->num_clocks;
+ 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+ }
+ 
+ static const struct en_clk_soc_data en7523_data = {
++	.num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7523_pci_is_enabled,
+ 		.prepare = en7523_pci_prepare,
+@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
+ };
+ 
+ static const struct en_clk_soc_data en7581_data = {
++	/* We increment num_clocks by 1 to account for additional PCIe clock */
++	.num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7581_pci_is_enabled,
+ 		.enable = en7581_pci_enable,
diff --git a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
new file mode 100644
index 0000000000..e858d8b77d
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
@@ -0,0 +1,23 @@
+From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Thu, 19 Dec 2024 13:13:37 +0100
+Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
+
+Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
+should not be placed here. Value is derived internally in the user
+driver.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,6 +12,4 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
+-#define EN7523_NUM_CLOCKS	8
+-
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
diff --git a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
new file mode 100644
index 0000000000..7bc987f420
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
@@ -0,0 +1,23 @@
+From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 12:22:37 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
+
+Add ID for eMMC for EN7581. This is to control clock selection of eMMC
+between 200MHz and 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Acked-by: Conor Dooley <conor.dooley at microchip.com>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,4 +12,6 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+ 
++#define EN7581_CLK_EMMC		8
++
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */
diff --git a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
new file mode 100644
index 0000000000..64d5339176
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
@@ -0,0 +1,39 @@
+From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 12:22:38 +0100
+Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
+
+Add clock for eMMC for EN7581. This is used to give info of the current
+eMMC source clock and to switch it from 200MHz or 150MHz.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/clk/clk-en7523.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
+ static const u32 bus7581_base[] = { 600000000, 540000000 };
+ static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
+ static const u32 crypto_base[] = { 540000000, 480000000 };
++static const u32 emmc7581_base[] = { 200000000, 150000000 };
+ 
+ static const struct en_clk_desc en7523_base_clks[] = {
+ 	{
+@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
+ 		.base_shift = 0,
+ 		.base_values = crypto_base,
+ 		.n_base_values = ARRAY_SIZE(crypto_base),
++	}, {
++		.id = EN7581_CLK_EMMC,
++		.name = "emmc",
++
++		.base_reg = REG_CRYPTO_CLKSRC2,
++		.base_bits = 1,
++		.base_shift = 12,
++		.base_values = emmc7581_base,
++		.n_base_values = ARRAY_SIZE(emmc7581_base),
+ 	}
+ };
+ 
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
new file mode 100644
index 0000000000..24c4dbde78
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
@@ -0,0 +1,138 @@
+From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 11 Dec 2024 11:27:10 +0100
+Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
+
+Add support for AN7581 MMC Host. The MMC Host controller is based on
+mt7622 with the difference of not having regulator supply and state_uhs
+pins and hclk clock.
+
+Some minor fixes are applied to check if the state_uhs pins are defined
+and make hclk optional for the new airoha compatible.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
+ 1 file changed, 46 insertions(+), 9 deletions(-)
+
+--- a/drivers/mmc/host/mtk-sd.c
++++ b/drivers/mmc/host/mtk-sd.c
+@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
+ 	.stop_clk_fix = true,
+ };
+ 
++static const struct mtk_mmc_compatible an7581_compat = {
++	.clk_div_bits = 12,
++	.recheck_sdio_irq = true,
++	.hs400_tune = false,
++	.pad_tune_reg = MSDC_PAD_TUNE0,
++	.async_fifo = true,
++	.data_tune = true,
++	.busy_check = true,
++	.stop_clk_fix = true,
++	.enhance_rx = true,
++	.support_64g = false,
++};
++
+ static const struct of_device_id msdc_of_ids[] = {
+ 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
+ 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
+@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
+ 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
+ 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
+ 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
+-
++	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, msdc_of_ids);
+@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
+ 	struct msdc_host *host = mmc_priv(mmc);
+ 	int ret;
+ 
++	/* Skip setting supply if not supported */
++	if (!mmc->supply.vqmmc)
++		return 0;
++
+ 	if (!IS_ERR(mmc->supply.vqmmc)) {
+ 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
+ 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
+@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
+ 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
+ 			}
+ 
+-			pinctrl_select_state(host->pinctrl, host->pins_uhs);
++			/* Skip setting uhs pins if not supported */
++			if (host->pins_uhs)
++				pinctrl_select_state(host->pinctrl, host->pins_uhs);
+ 		} else {
+ 			dev_pm_clear_wake_irq(host->dev);
+ 		}
+@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
+ 
+ 	msdc_set_buswidth(host, ios->bus_width);
+ 
++	/* Skip regulator if not supported */
++	if (!mmc->supply.vmmc)
++		goto skip_regulator;
++
+ 	/* Suspend/Resume will do power off/on */
+ 	switch (ios->power_mode) {
+ 	case MMC_POWER_UP:
+@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
+ 		break;
+ 	}
+ 
++skip_regulator:
+ 	if (host->mclk != ios->clock || host->timing != ios->timing)
+ 		msdc_set_mclk(host, ios->timing, ios->clock);
+ }
+@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
+ 	if (IS_ERR(host->src_clk))
+ 		return PTR_ERR(host->src_clk);
+ 
+-	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
+-	if (IS_ERR(host->h_clk))
+-		return PTR_ERR(host->h_clk);
++	/* AN7581 SoC doesn't have hclk */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
++		if (IS_ERR(host->h_clk))
++			return PTR_ERR(host->h_clk);
++	}
+ 
+ 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
+ 	if (IS_ERR(host->bus_clk))
+@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
+ 		goto host_free;
+ 	}
+ 
+-	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+-	if (IS_ERR(host->pins_uhs)) {
+-		ret = PTR_ERR(host->pins_uhs);
+-		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
+-		goto host_free;
++	/* AN7581 doesn't have state_uhs pins */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
++		if (IS_ERR(host->pins_uhs)) {
++			ret = PTR_ERR(host->pins_uhs);
++			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
++			goto host_free;
++		}
+ 	}
+ 
+ 	/* Support for SDIO eint irq ? */
+@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+ 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
+ 		goto release_mem;
+ 	}
++
++	/* AN7581 without regulator require tune to OCR values */
++	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
++	    !mmc->ocr_avail)
++		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
++
+ 	msdc_init_hw(host);
+ 
+ 	if (mmc->caps2 & MMC_CAP2_CQE) {



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:19 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace cpufreq patch with new
 version
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36434.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/90c29d2c04407f3269c299eaa239c3be283981c9

commit 90c29d2c04407f3269c299eaa239c3be283981c9
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:53:04 2025 +0100

    airoha: an7581: replace cpufreq patch with new version
    
    Replace cpufreq patch with new version requested upstream.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 506955735075241d3467d632cae7ed5f10e21c2f)
---
 ...n-airoha-Add-Airoha-CPU-PM-Domain-support.patch | 201 ++++++++++++++++
 ...eq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch | 253 +++++++++++++++++++++
 ...freq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch | 247 --------------------
 3 files changed, 454 insertions(+), 247 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch b/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
new file mode 100644
index 0000000000..52d3f40b36
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
@@ -0,0 +1,201 @@
+From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Sat, 4 Jan 2025 19:03:09 +0100
+Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
+
+Add Airoha CPU PM Domain support to control frequency and power of CPU
+present on Airoha EN7581 SoC.
+
+Frequency and power can be controlled with the use of the SMC command by
+passing the performance state. The driver also expose a read-only clock
+that expose the current CPU frequency with SMC command.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+Changes v9:
+- Fix compile error targetting wrong branch (remove_new change)
+Changes v8:
+- Add this patch
+- Use SMC invoke instead of 1.2
+
+ drivers/pmdomain/mediatek/Kconfig             |  11 ++
+ drivers/pmdomain/mediatek/Makefile            |   1 +
+ .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
+ 3 files changed, 156 insertions(+)
+ create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+
+--- a/drivers/soc/mediatek/Kconfig
++++ b/drivers/soc/mediatek/Kconfig
+@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
+ 	  Control Processor System (SCPSYS) has several power management related
+ 	  tasks in the system.
+ 
++config AIROHA_CPU_PM_DOMAIN
++	tristate "Airoha CPU power domain"
++	default ARCH_AIROHA
++	depends on PM
++	select PM_GENERIC_DOMAINS
++	help
++	  Say y here to enable CPU power domain support for Airoha SoC.
++
++	  CPU frequency and power is controlled by ATF with SMC command to
++	  set performance states.
++
+ config MTK_MMSYS
+ 	tristate "MediaTek MMSYS Support"
+ 	default ARCH_MEDIATEK
+--- a/drivers/pmdomain/mediatek/Makefile
++++ b/drivers/pmdomain/mediatek/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_MTK_SCPSYS)		+= mtk-scpsys.o
+ obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) 	+= mtk-pm-domains.o
++obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
+--- /dev/null
++++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
+@@ -0,0 +1,145 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/arm-smccc.h>
++#include <linux/bitfield.h>
++#include <linux/clk-provider.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_domain.h>
++#include <linux/slab.h>
++
++#define AIROHA_SIP_AVS_HANDLE			0x82000301
++#define AIROHA_AVS_OP_BASE			0xddddddd0
++#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
++#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
++#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
++						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
++
++struct airoha_cpu_pmdomain_priv {
++	struct clk_hw hw;
++	struct generic_pm_domain pd;
++};
++
++static long airoha_cpu_pmdomain_clk_round(struct clk_hw *hw, unsigned long rate,
++					  unsigned long *parent_rate)
++{
++	return rate;
++}
++
++static unsigned long airoha_cpu_pmdomain_clk_get(struct clk_hw *hw,
++						 unsigned long parent_rate)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
++			     0, 0, 0, 0, 0, 0, &res);
++
++	/* SMCCC returns freq in MHz */
++	return (int)(res.a0 * 1000 * 1000);
++}
++
++/* Airoha CPU clk SMCC is always enabled */
++static int airoha_cpu_pmdomain_clk_is_enabled(struct clk_hw *hw)
++{
++	return true;
++}
++
++static const struct clk_ops airoha_cpu_pmdomain_clk_ops = {
++	.recalc_rate = airoha_cpu_pmdomain_clk_get,
++	.is_enabled = airoha_cpu_pmdomain_clk_is_enabled,
++	.round_rate = airoha_cpu_pmdomain_clk_round,
++};
++
++static int airoha_cpu_pmdomain_set_performance_state(struct generic_pm_domain *domain,
++						     unsigned int state)
++{
++	struct arm_smccc_res res;
++
++	arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_FREQ_DYN_ADJ,
++			     0, state, 0, 0, 0, 0, &res);
++
++	/* SMC signal correct apply by unsetting BIT 0 */
++	return res.a0 & BIT(0) ? -EINVAL : 0;
++}
++
++static int airoha_cpu_pmdomain_probe(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv;
++	struct device *dev = &pdev->dev;
++	struct clk_init_data init = { };
++	struct generic_pm_domain *pd;
++	struct clk_hw *hw;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	/* Init and register a get-only clk for Cpufreq */
++	init.name = "cpu";
++	init.ops = &airoha_cpu_pmdomain_clk_ops;
++	/* Clock with no set_rate, can't cache */
++	init.flags = CLK_GET_RATE_NOCACHE;
++
++	hw = &priv->hw;
++	hw->init = &init;
++	ret = devm_clk_hw_register(dev, hw);
++	if (ret)
++		return ret;
++
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
++	if (ret)
++		return ret;
++
++	/* Init and register a PD for CPU */
++	pd = &priv->pd;
++	pd->name = "cpu_pd";
++	pd->flags = GENPD_FLAG_ALWAYS_ON;
++	pd->set_performance_state = airoha_cpu_pmdomain_set_performance_state;
++
++	ret = pm_genpd_init(pd, NULL, false);
++	if (ret)
++		return ret;
++
++	ret = of_genpd_add_provider_simple(dev->of_node, pd);
++	if (ret)
++		goto err_add_provider;
++
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_add_provider:
++	pm_genpd_remove(pd);
++
++	return ret;
++}
++
++static void airoha_cpu_pmdomain_remove(struct platform_device *pdev)
++{
++	struct airoha_cpu_pmdomain_priv *priv = platform_get_drvdata(pdev);
++
++	of_genpd_del_provider(pdev->dev.of_node);
++	pm_genpd_remove(&priv->pd);
++}
++
++static const struct of_device_id airoha_cpu_pmdomain_of_match[] = {
++	{ .compatible = "airoha,en7581-cpufreq" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, airoha_cpu_pmdomain_of_match);
++
++static struct platform_driver airoha_cpu_pmdomain_driver = {
++	.probe = airoha_cpu_pmdomain_probe,
++	.remove_new = airoha_cpu_pmdomain_remove,
++	.driver = {
++		.name = "airoha-cpu-pmdomain",
++		.of_match_table = airoha_cpu_pmdomain_of_match,
++	},
++};
++module_platform_driver(airoha_cpu_pmdomain_driver);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
++MODULE_DESCRIPTION("CPU PM domain driver for Airoha SoCs");
++MODULE_LICENSE("GPL");
diff --git a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch b/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
new file mode 100644
index 0000000000..6a2e54f4d1
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
@@ -0,0 +1,253 @@
+From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Wed, 16 Oct 2024 18:00:57 +0200
+Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+
+Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
+frequency scaling with SMC APIs and register a generic "cpufreq-dt"
+device.
+
+All CPU share the same frequency and can't be controlled independently.
+CPU frequency is controlled by the attached PM domain.
+
+Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
+driver is needed with OPP v2 nodes declared in DTS.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+Changes v9:
+- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
+Changes v8:
+- Split in dedicated PM domain driver
+Changes v7:
+- No changes
+Changes v6:
+- Improve Kconfig depends logic
+- Select PM (PM_GENERIC_DOMAINS depends on it)
+- Drop (int) cast for 
+Changes v5:
+- Rename cpu_pd to perf for power domain name
+- Use remove instead of remove_new
+Changes v4:
+- Rework to clk-only + PM set_performance_state implementation
+Changes v3:
+- Adapt to new cpufreq-dt APIs
+- Register cpufreq-dt instead of custom freq driver
+Changes v2:
+- Fix kernel bot error with missing slab.h and bitfield.h header
+- Limit COMPILE_TEST to ARM64 due to smcc 1.2
+
+ drivers/cpufreq/Kconfig.arm          |   8 ++
+ drivers/cpufreq/Makefile             |   1 +
+ drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
+ drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
+ 4 files changed, 163 insertions(+)
+ create mode 100644 drivers/cpufreq/airoha-cpufreq.c
+
+--- a/drivers/cpufreq/Kconfig.arm
++++ b/drivers/cpufreq/Kconfig.arm
+@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called sun50i-cpufreq-nvmem.
+ 
++config ARM_AIROHA_SOC_CPUFREQ
++	tristate "Airoha EN7581 SoC CPUFreq support"
++	depends on ARCH_AIROHA || COMPILE_TEST
++	select PM_OPP
++	default ARCH_AIROHA
++	help
++	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
++
+ config ARM_APPLE_SOC_CPUFREQ
+ 	tristate "Apple Silicon SoC CPUFreq support"
+ 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
+--- a/drivers/cpufreq/Makefile
++++ b/drivers/cpufreq/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
+ 
+ ##################################################################################
+ # ARM SoC drivers
++obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
+ obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
+ obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
+--- /dev/null
++++ b/drivers/cpufreq/airoha-cpufreq.c
+@@ -0,0 +1,166 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/bitfield.h>
++#include <linux/cpufreq.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
++#include <linux/slab.h>
++
++#include "cpufreq-dt.h"
++
++struct airoha_cpufreq_priv {
++	int opp_token;
++	struct device **virt_devs;
++	struct platform_device *cpufreq_dt;
++};
++
++static struct platform_device *cpufreq_pdev;
++
++/* NOP function to disable OPP from setting clock */
++static int airoha_cpufreq_config_clks_nop(struct device *dev,
++					  struct opp_table *opp_table,
++					  struct dev_pm_opp *old_opp,
++					  struct dev_pm_opp *opp,
++					  void *data, bool scaling_down)
++{
++	return 0;
++}
++
++static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
++static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
++
++static int airoha_cpufreq_probe(struct platform_device *pdev)
++{
++	struct dev_pm_opp_config config = { };
++	struct platform_device *cpufreq_dt;
++	struct airoha_cpufreq_priv *priv;
++	struct device *dev = &pdev->dev;
++	struct device **virt_devs = NULL;
++	struct device *cpu_dev;
++	int ret;
++
++	/* CPUs refer to the same OPP table */
++	cpu_dev = get_cpu_device(0);
++	if (!cpu_dev)
++		return -ENODEV;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	config.clk_names = airoha_cpufreq_clk_names;
++	config.config_clks = airoha_cpufreq_config_clks_nop;
++	config.genpd_names = airoha_cpufreq_genpd_names;
++	config.virt_devs = &virt_devs;
++
++	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
++	if (priv->opp_token < 0)
++		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
++
++	/* Set Attached PM for OPP ACTIVE */
++	if (virt_devs) {
++		const char * const *name = airoha_cpufreq_genpd_names;
++		int i, j;
++
++		for (i = 0; *name; i++, name++) {
++			ret = pm_runtime_resume_and_get(virt_devs[i]);
++			if (ret) {
++				dev_err(cpu_dev, "failed to resume %s: %d\n",
++					*name, ret);
++
++				/* Rollback previous PM runtime calls */
++				name = config.genpd_names;
++				for (j = 0; *name && j < i; j++, name++)
++					pm_runtime_put(virt_devs[j]);
++
++				goto err_register_cpufreq;
++			}
++		}
++		priv->virt_devs = virt_devs;
++	}
++
++	cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
++	ret = PTR_ERR_OR_ZERO(cpufreq_dt);
++	if (ret) {
++		dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret);
++		goto err_register_cpufreq;
++	}
++
++	priv->cpufreq_dt = cpufreq_dt;
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++
++err_register_cpufreq:
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	return ret;
++}
++
++static void airoha_cpufreq_remove(struct platform_device *pdev)
++{
++	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
++	const char * const *name = airoha_cpufreq_genpd_names;
++	int i;
++
++	platform_device_unregister(priv->cpufreq_dt);
++
++	dev_pm_opp_clear_config(priv->opp_token);
++
++	for (i = 0; *name; i++, name++)
++		pm_runtime_put(priv->virt_devs[i]);
++}
++
++static struct platform_driver airoha_cpufreq_driver = {
++	.probe = airoha_cpufreq_probe,
++	.remove_new = airoha_cpufreq_remove,
++	.driver = {
++		.name = "airoha-cpufreq",
++	},
++};
++
++static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
++	{ .compatible = "airoha,en7581" },
++	{},
++};
++MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
++
++static int __init airoha_cpufreq_init(void)
++{
++	struct device_node *np = of_find_node_by_path("/");
++	const struct of_device_id *match;
++	int ret;
++
++	if (!np)
++		return -ENODEV;
++
++	match = of_match_node(airoha_cpufreq_match_list, np);
++	of_node_put(np);
++	if (!match)
++		return -ENODEV;
++
++	ret = platform_driver_register(&airoha_cpufreq_driver);
++	if (unlikely(ret < 0))
++		return ret;
++
++	cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq",
++						     -1, match, sizeof(*match));
++	ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
++	if (ret)
++		platform_driver_unregister(&airoha_cpufreq_driver);
++
++	return ret;
++}
++module_init(airoha_cpufreq_init);
++
++static void __exit airoha_cpufreq_exit(void)
++{
++	platform_device_unregister(cpufreq_pdev);
++	platform_driver_unregister(&airoha_cpufreq_driver);
++}
++module_exit(airoha_cpufreq_exit);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
++MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
++MODULE_LICENSE("GPL");
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -103,6 +103,8 @@ static const struct of_device_id allowli
+  * platforms using "operating-points-v2" property.
+  */
+ static const struct of_device_id blocklist[] __initconst = {
++	{ .compatible = "airoha,en7581", },
++
+ 	{ .compatible = "allwinner,sun50i-h6", },
+ 
+ 	{ .compatible = "apple,arm-platform", },
diff --git a/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch b/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch
deleted file mode 100644
index 0276a4ee81..0000000000
--- a/target/linux/airoha/patches-6.6/100-cpufreq-airoha-Add-EN7581-Cpufreq-SMC-driver.patch
+++ /dev/null
@@ -1,247 +0,0 @@
-From 5296da64f77ef6c809b715cdecf308977a08acb9 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH] cpufreq: airoha: Add EN7581 Cpufreq SMC driver
-
-Add simple Cpufreq driver for Airoha EN7581 SoC that control CPU
-frequency scaling with SMC APIs.
-
-All CPU share the same frequency and can't be controlled independently.
-Current shared CPU frequency is returned by the related SMC command.
-
-Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
-driver is needed with OPP v2 nodes declared in DTS.
-
-Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
----
- drivers/cpufreq/Kconfig.arm          |   8 ++
- drivers/cpufreq/Makefile             |   1 +
- drivers/cpufreq/airoha-cpufreq.c     | 183 +++++++++++++++++++++++++++
- drivers/cpufreq/cpufreq-dt-platdev.c |   2 +
- 4 files changed, 194 insertions(+)
- create mode 100644 drivers/cpufreq/airoha-cpufreq.c
-
---- a/drivers/cpufreq/Kconfig.arm
-+++ b/drivers/cpufreq/Kconfig.arm
-@@ -41,6 +41,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVME
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called sun50i-cpufreq-nvmem.
- 
-+config ARM_AIROHA_SOC_CPUFREQ
-+	tristate "Airoha EN7581 SoC CPUFreq support"
-+	depends on ARCH_AIROHA || COMPILE_TEST
-+	select PM_OPP
-+	default ARCH_AIROHA
-+	help
-+	  This adds the CPUFreq driver for Airoha EN7581 SoCs.
-+
- config ARM_APPLE_SOC_CPUFREQ
- 	tristate "Apple Silicon SoC CPUFreq support"
- 	depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
---- a/drivers/cpufreq/Makefile
-+++ b/drivers/cpufreq/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY)	+
- 
- ##################################################################################
- # ARM SoC drivers
-+obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ)	+= airoha-cpufreq.o
- obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ)	+= apple-soc-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ)	+= armada-37xx-cpufreq.o
- obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ)	+= armada-8k-cpufreq.o
---- /dev/null
-+++ b/drivers/cpufreq/airoha-cpufreq.c
-@@ -0,0 +1,183 @@
-+// SPDX-License-Identifier: GPL-2.0
-+
-+#include <linux/cpufreq.h>
-+#include <linux/module.h>
-+#include <linux/arm-smccc.h>
-+
-+#define AIROHA_SIP_AVS_HANDLE			0x82000301
-+#define AIROHA_AVS_OP_BASE			0xddddddd0
-+#define AIROHA_AVS_OP_MASK			GENMASK(1, 0)
-+#define AIROHA_AVS_OP_FREQ_DYN_ADJ		(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
-+#define AIROHA_AVS_OP_GET_FREQ			(AIROHA_AVS_OP_BASE | \
-+						 FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
-+
-+struct airoha_cpufreq_priv {
-+	struct list_head list;
-+
-+	cpumask_var_t cpus;
-+	struct device *cpu_dev;
-+	struct cpufreq_frequency_table *freq_table;
-+};
-+
-+static LIST_HEAD(priv_list);
-+
-+static unsigned int airoha_cpufreq_get(unsigned int cpu)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_GET_FREQ,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	return (int)(res.a0 * 1000);
-+}
-+
-+static int airoha_cpufreq_set_target(struct cpufreq_policy *policy, unsigned int index)
-+{
-+	const struct arm_smccc_1_2_regs args = {
-+		.a0 = AIROHA_SIP_AVS_HANDLE,
-+		.a1 = AIROHA_AVS_OP_FREQ_DYN_ADJ,
-+		.a3 = index,
-+	};
-+	struct arm_smccc_1_2_regs res;
-+
-+	arm_smccc_1_2_smc(&args, &res);
-+
-+	/* SMC signal correct apply by unsetting BIT 0 */
-+	return res.a0 & BIT(0) ? -EINVAL : 0;
-+}
-+
-+static struct airoha_cpufreq_priv *airoha_cpufreq_find_data(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+
-+	list_for_each_entry(priv, &priv_list, list) {
-+		if (cpumask_test_cpu(cpu, priv->cpus))
-+			return priv;
-+	}
-+
-+	return NULL;
-+}
-+
-+static int airoha_cpufreq_init(struct cpufreq_policy *policy)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+
-+	priv = airoha_cpufreq_find_data(policy->cpu);
-+	if (!priv)
-+		return -ENODEV;
-+
-+	cpu_dev = priv->cpu_dev;
-+	cpumask_copy(policy->cpus, priv->cpus);
-+	policy->driver_data = priv;
-+	policy->freq_table = priv->freq_table;
-+
-+	return 0;
-+}
-+
-+static struct cpufreq_driver airoha_cpufreq_driver = {
-+	.flags		= CPUFREQ_NEED_INITIAL_FREQ_CHECK |
-+			  CPUFREQ_IS_COOLING_DEV,
-+	.verify		= cpufreq_generic_frequency_table_verify,
-+	.target_index	= airoha_cpufreq_set_target,
-+	.get		= airoha_cpufreq_get,
-+	.init		= airoha_cpufreq_init,
-+	.attr		= cpufreq_generic_attr,
-+	.name		= "airoha-cpufreq",
-+};
-+
-+static int airoha_cpufreq_driver_init_cpu(int cpu)
-+{
-+	struct airoha_cpufreq_priv *priv;
-+	struct device *cpu_dev;
-+	int ret;
-+
-+	cpu_dev = get_cpu_device(cpu);
-+	if (!cpu_dev)
-+		return -EPROBE_DEFER;
-+
-+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	if (!zalloc_cpumask_var(&priv->cpus, GFP_KERNEL))
-+		return -ENOMEM;
-+
-+	cpumask_set_cpu(cpu, priv->cpus);
-+	priv->cpu_dev = cpu_dev;
-+
-+	ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_of_cpumask_add_table(priv->cpus);
-+	if (ret)
-+		goto err;
-+
-+	ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &priv->freq_table);
-+	if (ret)
-+		goto err;
-+
-+	list_add(&priv->list, &priv_list);
-+
-+	return 0;
-+
-+err:
-+	dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+	free_cpumask_var(priv->cpus);
-+
-+	return ret;
-+}
-+
-+static void airoha_cpufreq_release(void)
-+{
-+	struct airoha_cpufreq_priv *priv, *tmp;
-+
-+	list_for_each_entry_safe(priv, tmp, &priv_list, list) {
-+		dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &priv->freq_table);
-+		dev_pm_opp_of_cpumask_remove_table(priv->cpus);
-+		free_cpumask_var(priv->cpus);
-+		list_del(&priv->list);
-+		kfree(priv);
-+	}
-+}
-+
-+static int __init airoha_cpufreq_driver_probe(void)
-+{
-+	int cpu, ret;
-+
-+	if (!of_machine_is_compatible("airoha,en7581"))
-+		return -ENODEV;
-+
-+	for_each_possible_cpu(cpu) {
-+		ret = airoha_cpufreq_driver_init_cpu(cpu);
-+		if (ret)
-+			goto err;
-+	}
-+
-+	ret = cpufreq_register_driver(&airoha_cpufreq_driver);
-+	if (ret)
-+		goto err;
-+
-+	return 0;
-+
-+err:
-+	airoha_cpufreq_release();
-+	return ret;
-+}
-+module_init(airoha_cpufreq_driver_probe);
-+
-+static void __exit airoha_cpufreq_driver_remove(void)
-+{
-+	cpufreq_unregister_driver(&airoha_cpufreq_driver);
-+	airoha_cpufreq_release();
-+}
-+module_exit(airoha_cpufreq_driver_remove);
-+
-+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
-+MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
-+MODULE_LICENSE("GPL");
---- a/drivers/cpufreq/cpufreq-dt-platdev.c
-+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,8 @@ static const struct of_device_id allowli
-  * platforms using "operating-points-v2" property.
-  */
- static const struct of_device_id blocklist[] __initconst = {
-+	{ .compatible = "airoha,en7581", },
-+
- 	{ .compatible = "allwinner,sun50i-h6", },
- 
- 	{ .compatible = "apple,arm-platform", },



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:14 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport patch to support ETS and
 HTB sched
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36435.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/5c679f56ebcf4692d62c35b46a20b6e4edc2e18f

commit 5c679f56ebcf4692d62c35b46a20b6e4edc2e18f
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:22:31 2025 +0100

    airoha: an7581: backport patch to support ETS and HTB sched
    
    Backport patch to support ETS and HTB scheduler for airoha ethernet
    driver.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 3ec3ea5316ceebae260f4d170c6e1c3a19864438)
---
 ...Enable-Tx-drop-capability-for-each-Tx-DMA.patch |  27 ++
 ...iroha-Introduce-ndo_select_queue-callback.patch |  86 +++++
 ...-net-airoha-Add-sched-ETS-offload-support.patch | 292 ++++++++++++++++
 ...-net-airoha-Add-sched-HTB-offload-support.patch | 371 +++++++++++++++++++++
 4 files changed, 776 insertions(+)

diff --git a/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch b/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch
new file mode 100644
index 0000000000..c8681aace5
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-01-v6.14-net-airoha-Enable-Tx-drop-capability-for-each-Tx-DMA.patch
@@ -0,0 +1,27 @@
+From 5f795590380476f1c9b7ed0ac945c9b0269dc23a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:02 +0100
+Subject: [PATCH 1/4] net: airoha: Enable Tx drop capability for each Tx DMA
+ ring
+
+This is a preliminary patch in order to enable hw Qdisc offloading.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -1790,6 +1790,10 @@ static int airoha_qdma_init_tx_queue(str
+ 		WRITE_ONCE(q->desc[i].ctrl, cpu_to_le32(val));
+ 	}
+ 
++	/* xmit ring drop default setting */
++	airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(qid),
++			TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK);
++
+ 	airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);
+ 	airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,
+ 			FIELD_PREP(TX_RING_CPU_IDX_MASK, q->head));
diff --git a/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch b/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch
new file mode 100644
index 0000000000..75743bdd34
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-02-v6.14-net-airoha-Introduce-ndo_select_queue-callback.patch
@@ -0,0 +1,86 @@
+From 2b288b81560b94958cd68bbe54673e55a1730c95 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:03 +0100
+Subject: [PATCH 2/4] net: airoha: Introduce ndo_select_queue callback
+
+Airoha EN7581 SoC supports 32 Tx DMA rings used to feed packets to QoS
+channels. Each channels supports 8 QoS queues where the user can apply
+QoS scheduling policies. In a similar way, the user can configure hw
+rate shaping for each QoS channel.
+Introduce ndo_select_queue callback in order to select the tx queue
+based on QoS channel and QoS queue. In particular, for dsa device select
+QoS channel according to the dsa user port index, rely on port id
+otherwise. Select QoS queue based on the skb priority.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 30 ++++++++++++++++++++--
+ 1 file changed, 28 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -23,6 +23,8 @@
+ #define AIROHA_MAX_NUM_XSI_RSTS		5
+ #define AIROHA_MAX_MTU			2000
+ #define AIROHA_MAX_PACKET_SIZE		2048
++#define AIROHA_NUM_QOS_CHANNELS		4
++#define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+@@ -2422,21 +2424,44 @@ static void airoha_dev_get_stats64(struc
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static u16 airoha_dev_select_queue(struct net_device *dev, struct sk_buff *skb,
++				   struct net_device *sb_dev)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++	int queue, channel;
++
++	/* For dsa device select QoS channel according to the dsa user port
++	 * index, rely on port id otherwise. Select QoS queue based on the
++	 * skb priority.
++	 */
++	channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port->id;
++	channel = channel % AIROHA_NUM_QOS_CHANNELS;
++	queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */
++	queue = channel * AIROHA_NUM_QOS_QUEUES + queue;
++
++	return queue < dev->num_tx_queues ? queue : 0;
++}
++
+ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,
+ 				   struct net_device *dev)
+ {
+ 	struct skb_shared_info *sinfo = skb_shinfo(skb);
+ 	struct airoha_gdm_port *port = netdev_priv(dev);
+-	u32 msg0 = 0, msg1, len = skb_headlen(skb);
+-	int i, qid = skb_get_queue_mapping(skb);
++	u32 msg0, msg1, len = skb_headlen(skb);
+ 	struct airoha_qdma *qdma = port->qdma;
+ 	u32 nr_frags = 1 + sinfo->nr_frags;
+ 	struct netdev_queue *txq;
+ 	struct airoha_queue *q;
+ 	void *data = skb->data;
++	int i, qid;
+ 	u16 index;
+ 	u8 fport;
+ 
++	qid = skb_get_queue_mapping(skb) % ARRAY_SIZE(qdma->q_tx);
++	msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,
++			  qid / AIROHA_NUM_QOS_QUEUES) |
++	       FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,
++			  qid % AIROHA_NUM_QOS_QUEUES);
+ 	if (skb->ip_summed == CHECKSUM_PARTIAL)
+ 		msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |
+ 			FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |
+@@ -2610,6 +2635,7 @@ static const struct net_device_ops airoh
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+ 	.ndo_stop		= airoha_dev_stop,
++	.ndo_select_queue	= airoha_dev_select_queue,
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,
diff --git a/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch b/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch
new file mode 100644
index 0000000000..ad5e0e5c2a
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-03-v6.14-net-airoha-Add-sched-ETS-offload-support.patch
@@ -0,0 +1,292 @@
+From 20bf7d07c956e5c7a22d3076c599cbb7a6054917 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:04 +0100
+Subject: [PATCH 3/4] net: airoha: Add sched ETS offload support
+
+Introduce support for ETS Qdisc offload available on the Airoha EN7581
+ethernet controller. In order to be effective, ETS Qdisc must configured
+as leaf of a HTB Qdisc (HTB Qdisc offload will be added in the following
+patch). ETS Qdisc available on EN7581 ethernet controller supports at
+most 8 concurrent bands (QoS queues). We can enable an ETS Qdisc for
+each available QoS channel.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 196 ++++++++++++++++++++-
+ 1 file changed, 195 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -15,6 +15,7 @@
+ #include <linux/u64_stats_sync.h>
+ #include <net/dsa.h>
+ #include <net/page_pool/helpers.h>
++#include <net/pkt_cls.h>
+ #include <uapi/linux/ppp_defs.h>
+ 
+ #define AIROHA_MAX_NUM_GDM_PORTS	1
+@@ -543,9 +544,24 @@
+ #define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define REG_QUEUE_CLOSE_CFG(_n)		(0x00a0 + ((_n) & 0xfc))
++#define TXQ_DISABLE_CHAN_QUEUE_MASK(_n, _m)	BIT((_m) + (((_n) & 0x3) << 3))
++
+ #define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)
+ #define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) << 2)
+ 
++#define REG_CNTR_CFG(_n)		(0x0400 + ((_n) << 3))
++#define CNTR_EN_MASK			BIT(31)
++#define CNTR_ALL_CHAN_EN_MASK		BIT(30)
++#define CNTR_ALL_QUEUE_EN_MASK		BIT(29)
++#define CNTR_ALL_DSCP_RING_EN_MASK	BIT(28)
++#define CNTR_SRC_MASK			GENMASK(27, 24)
++#define CNTR_DSCP_RING_MASK		GENMASK(20, 16)
++#define CNTR_CHAN_MASK			GENMASK(7, 3)
++#define CNTR_QUEUE_MASK			GENMASK(2, 0)
++
++#define REG_CNTR_VAL(_n)		(0x0404 + ((_n) << 3))
++
+ #define REG_LMGR_INIT_CFG		0x1000
+ #define LMGR_INIT_START			BIT(31)
+ #define LMGR_SRAM_MODE_MASK		BIT(30)
+@@ -571,9 +587,19 @@
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+ 
++#define REG_TXWRR_WEIGHT_CFG		0x1024
++#define TWRR_RW_CMD_MASK		BIT(31)
++#define TWRR_RW_CMD_DONE		BIT(30)
++#define TWRR_CHAN_IDX_MASK		GENMASK(23, 19)
++#define TWRR_QUEUE_IDX_MASK		GENMASK(18, 16)
++#define TWRR_VALUE_MASK			GENMASK(15, 0)
++
+ #define REG_PSE_BUF_USAGE_CFG		0x1028
+ #define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)
+ 
++#define REG_CHAN_QOS_MODE(_n)		(0x1040 + ((_n) << 2))
++#define CHAN_QOS_MODE_MASK(_n)		GENMASK(2 + ((_n) << 2), (_n) << 2)
++
+ #define REG_GLB_TRTCM_CFG		0x1080
+ #define GLB_TRTCM_EN_MASK		BIT(31)
+ #define GLB_TRTCM_MODE_MASK		BIT(30)
+@@ -722,6 +748,17 @@ enum {
+ 	FE_PSE_PORT_DROP = 0xf,
+ };
+ 
++enum tx_sched_mode {
++	TC_SCH_WRR8,
++	TC_SCH_SP,
++	TC_SCH_WRR7,
++	TC_SCH_WRR6,
++	TC_SCH_WRR5,
++	TC_SCH_WRR4,
++	TC_SCH_WRR3,
++	TC_SCH_WRR2,
++};
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -812,6 +849,10 @@ struct airoha_gdm_port {
+ 	int id;
+ 
+ 	struct airoha_hw_stats stats;
++
++	/* qos stats counters */
++	u64 cpu_tx_packets;
++	u64 fwd_tx_packets;
+ };
+ 
+ struct airoha_eth {
+@@ -1962,6 +2003,27 @@ static void airoha_qdma_init_qos(struct
+ 			FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));
+ }
+ 
++static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_QOS_CHANNELS; i++) {
++		/* Tx-cpu transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL(i << 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++		/* Tx-fwd transferred count */
++		airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
++		airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
++			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
++			       CNTR_ALL_DSCP_RING_EN_MASK |
++			       FIELD_PREP(CNTR_SRC_MASK, 1) |
++			       FIELD_PREP(CNTR_CHAN_MASK, i));
++	}
++}
++
+ static int airoha_qdma_hw_init(struct airoha_qdma *qdma)
+ {
+ 	int i;
+@@ -2012,6 +2074,7 @@ static int airoha_qdma_hw_init(struct ai
+ 
+ 	airoha_qdma_set(qdma, REG_TXQ_CNGST_CFG,
+ 			TXQ_CNGST_DROP_EN | TXQ_CNGST_DEI_DROP_EN);
++	airoha_qdma_init_qos_stats(qdma);
+ 
+ 	return 0;
+ }
+@@ -2631,6 +2694,135 @@ airoha_ethtool_get_rmon_stats(struct net
+ 	} while (u64_stats_fetch_retry(&port->stats.syncp, start));
+ }
+ 
++static int airoha_qdma_set_chan_tx_sched(struct airoha_gdm_port *port,
++					 int channel, enum tx_sched_mode mode,
++					 const u16 *weights, u8 n_weights)
++{
++	int i;
++
++	for (i = 0; i < AIROHA_NUM_TX_RING; i++)
++		airoha_qdma_clear(port->qdma, REG_QUEUE_CLOSE_CFG(channel),
++				  TXQ_DISABLE_CHAN_QUEUE_MASK(channel, i));
++
++	for (i = 0; i < n_weights; i++) {
++		u32 status;
++		int err;
++
++		airoha_qdma_wr(port->qdma, REG_TXWRR_WEIGHT_CFG,
++			       TWRR_RW_CMD_MASK |
++			       FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |
++			       FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |
++			       FIELD_PREP(TWRR_VALUE_MASK, weights[i]));
++		err = read_poll_timeout(airoha_qdma_rr, status,
++					status & TWRR_RW_CMD_DONE,
++					USEC_PER_MSEC, 10 * USEC_PER_MSEC,
++					true, port->qdma,
++					REG_TXWRR_WEIGHT_CFG);
++		if (err)
++			return err;
++	}
++
++	airoha_qdma_rmw(port->qdma, REG_CHAN_QOS_MODE(channel >> 3),
++			CHAN_QOS_MODE_MASK(channel),
++			mode << __ffs(CHAN_QOS_MODE_MASK(channel)));
++
++	return 0;
++}
++
++static int airoha_qdma_set_tx_prio_sched(struct airoha_gdm_port *port,
++					 int channel)
++{
++	static const u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, TC_SCH_SP, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_set_tx_ets_sched(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
++	enum tx_sched_mode mode = TC_SCH_SP;
++	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
++	int i, nstrict = 0;
++
++	if (p->bands > AIROHA_NUM_QOS_QUEUES)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands; i++) {
++		if (!p->quanta[i])
++			nstrict++;
++	}
++
++	/* this configuration is not supported by the hw */
++	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
++		return -EINVAL;
++
++	for (i = 0; i < p->bands - nstrict; i++)
++		w[i] = p->weights[nstrict + i];
++
++	if (!nstrict)
++		mode = TC_SCH_WRR8;
++	else if (nstrict < AIROHA_NUM_QOS_QUEUES - 1)
++		mode = nstrict + 1;
++
++	return airoha_qdma_set_chan_tx_sched(port, channel, mode, w,
++					     ARRAY_SIZE(w));
++}
++
++static int airoha_qdma_get_tx_ets_stats(struct airoha_gdm_port *port,
++					int channel,
++					struct tc_ets_qopt_offload *opt)
++{
++	u64 cpu_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL(channel << 1));
++	u64 fwd_tx_packets = airoha_qdma_rr(port->qdma,
++					    REG_CNTR_VAL((channel << 1) + 1));
++	u64 tx_packets = (cpu_tx_packets - port->cpu_tx_packets) +
++			 (fwd_tx_packets - port->fwd_tx_packets);
++	_bstats_update(opt->stats.bstats, 0, tx_packets);
++
++	port->cpu_tx_packets = cpu_tx_packets;
++	port->fwd_tx_packets = fwd_tx_packets;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
++				     struct tc_ets_qopt_offload *opt)
++{
++	int channel = TC_H_MAJ(opt->handle) >> 16;
++
++	if (opt->parent == TC_H_ROOT)
++		return -EINVAL;
++
++	switch (opt->command) {
++	case TC_ETS_REPLACE:
++		return airoha_qdma_set_tx_ets_sched(port, channel, opt);
++	case TC_ETS_DESTROY:
++		/* PRIO is default qdisc scheduler */
++		return airoha_qdma_set_tx_prio_sched(port, channel);
++	case TC_ETS_STATS:
++		return airoha_qdma_get_tx_ets_stats(port, channel, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
++static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
++			       void *type_data)
++{
++	struct airoha_gdm_port *port = netdev_priv(dev);
++
++	switch (type) {
++	case TC_SETUP_QDISC_ETS:
++		return airoha_tc_setup_qdisc_ets(port, type_data);
++	default:
++		return -EOPNOTSUPP;
++	}
++}
++
+ static const struct net_device_ops airoha_netdev_ops = {
+ 	.ndo_init		= airoha_dev_init,
+ 	.ndo_open		= airoha_dev_open,
+@@ -2639,6 +2831,7 @@ static const struct net_device_ops airoh
+ 	.ndo_start_xmit		= airoha_dev_xmit,
+ 	.ndo_get_stats64        = airoha_dev_get_stats64,
+ 	.ndo_set_mac_address	= airoha_dev_set_macaddr,
++	.ndo_setup_tc		= airoha_dev_tc_setup,
+ };
+ 
+ static const struct ethtool_ops airoha_ethtool_ops = {
+@@ -2688,7 +2881,8 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->watchdog_timeo = 5 * HZ;
+ 	dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
+ 			   NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |
+-			   NETIF_F_SG | NETIF_F_TSO;
++			   NETIF_F_SG | NETIF_F_TSO |
++			   NETIF_F_HW_TC;
+ 	dev->features |= dev->hw_features;
+ 	dev->dev.of_node = np;
+ 	dev->irq = qdma->irq;
diff --git a/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch b/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch
new file mode 100644
index 0000000000..1239b174e5
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/038-04-v6.14-net-airoha-Add-sched-HTB-offload-support.patch
@@ -0,0 +1,371 @@
+From ef1ca9271313b4ea7b03de69576aacef1e78f381 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Fri, 3 Jan 2025 13:17:05 +0100
+Subject: [PATCH 4/4] net: airoha: Add sched HTB offload support
+
+Introduce support for HTB Qdisc offload available in the Airoha EN7581
+ethernet controller. EN7581 can offload only one level of HTB leafs.
+Each HTB leaf represents a QoS channel supported by EN7581 SoC.
+The typical use-case is creating a HTB leaf for QoS channel to rate
+limit the egress traffic and attach an ETS Qdisc to each HTB leaf in
+order to enforce traffic prioritization.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 288 ++++++++++++++++++++-
+ 1 file changed, 287 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -28,6 +28,8 @@
+ #define AIROHA_NUM_QOS_QUEUES		8
+ #define AIROHA_NUM_TX_RING		32
+ #define AIROHA_NUM_RX_RING		32
++#define AIROHA_NUM_NETDEV_TX_RINGS	(AIROHA_NUM_TX_RING + \
++					 AIROHA_NUM_QOS_CHANNELS)
+ #define AIROHA_FE_MC_MAX_VLAN_TABLE	64
+ #define AIROHA_FE_MC_MAX_VLAN_PORT	16
+ #define AIROHA_NUM_TX_IRQ		2
+@@ -43,6 +45,9 @@
+ #define PSE_RSV_PAGES			128
+ #define PSE_QUEUE_RSV_PAGES		64
+ 
++#define QDMA_METER_IDX(_n)		((_n) & 0xff)
++#define QDMA_METER_GROUP(_n)		(((_n) >> 8) & 0x3)
++
+ /* FE */
+ #define PSE_BASE			0x0100
+ #define CSR_IFC_BASE			0x0200
+@@ -583,6 +588,17 @@
+ #define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)
+ #define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)
+ 
++#define TRTCM_PARAM_RW_MASK		BIT(31)
++#define TRTCM_PARAM_RW_DONE_MASK	BIT(30)
++#define TRTCM_PARAM_TYPE_MASK		GENMASK(29, 28)
++#define TRTCM_METER_GROUP_MASK		GENMASK(27, 26)
++#define TRTCM_PARAM_INDEX_MASK		GENMASK(23, 17)
++#define TRTCM_PARAM_RATE_TYPE_MASK	BIT(16)
++
++#define REG_TRTCM_CFG_PARAM(_n)		((_n) + 0x4)
++#define REG_TRTCM_DATA_LOW(_n)		((_n) + 0x8)
++#define REG_TRTCM_DATA_HIGH(_n)		((_n) + 0xc)
++
+ #define REG_TXWRR_MODE_CFG		0x1020
+ #define TWRR_WEIGHT_SCALE_MASK		BIT(31)
+ #define TWRR_WEIGHT_BASE_MASK		BIT(3)
+@@ -759,6 +775,29 @@ enum tx_sched_mode {
+ 	TC_SCH_WRR2,
+ };
+ 
++enum trtcm_param_type {
++	TRTCM_MISC_MODE, /* meter_en, pps_mode, tick_sel */
++	TRTCM_TOKEN_RATE_MODE,
++	TRTCM_BUCKETSIZE_SHIFT_MODE,
++	TRTCM_BUCKET_COUNTER_MODE,
++};
++
++enum trtcm_mode_type {
++	TRTCM_COMMIT_MODE,
++	TRTCM_PEAK_MODE,
++};
++
++enum trtcm_param {
++	TRTCM_TICK_SEL = BIT(0),
++	TRTCM_PKT_MODE = BIT(1),
++	TRTCM_METER_MODE = BIT(2),
++};
++
++#define MIN_TOKEN_SIZE				4096
++#define MAX_TOKEN_SIZE_OFFSET			17
++#define TRTCM_TOKEN_RATE_MASK			GENMASK(23, 6)
++#define TRTCM_TOKEN_RATE_FRACTION_MASK		GENMASK(5, 0)
++
+ struct airoha_queue_entry {
+ 	union {
+ 		void *buf;
+@@ -850,6 +889,8 @@ struct airoha_gdm_port {
+ 
+ 	struct airoha_hw_stats stats;
+ 
++	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
++
+ 	/* qos stats counters */
+ 	u64 cpu_tx_packets;
+ 	u64 fwd_tx_packets;
+@@ -2810,6 +2851,243 @@ static int airoha_tc_setup_qdisc_ets(str
+ 	}
+ }
+ 
++static int airoha_qdma_get_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode,
++				       u32 *val_low, u32 *val_high)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++			  FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++			  FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++			  FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++	if (read_poll_timeout(airoha_qdma_rr, val,
++			      val & TRTCM_PARAM_RW_DONE_MASK,
++			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++			      qdma, REG_TRTCM_CFG_PARAM(addr)))
++		return -ETIMEDOUT;
++
++	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));
++	if (val_high)
++		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));
++
++	return 0;
++}
++
++static int airoha_qdma_set_trtcm_param(struct airoha_qdma *qdma, int channel,
++				       u32 addr, enum trtcm_param_type param,
++				       enum trtcm_mode_type mode, u32 val)
++{
++	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);
++	u32 config = TRTCM_PARAM_RW_MASK |
++		     FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |
++		     FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |
++		     FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |
++		     FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);
++
++	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);
++	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);
++
++	return read_poll_timeout(airoha_qdma_rr, val,
++				 val & TRTCM_PARAM_RW_DONE_MASK,
++				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,
++				 qdma, REG_TRTCM_CFG_PARAM(addr));
++}
++
++static int airoha_qdma_set_trtcm_config(struct airoha_qdma *qdma, int channel,
++					u32 addr, enum trtcm_mode_type mode,
++					bool enable, u32 enable_mask)
++{
++	u32 val;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &val, NULL))
++		return -EINVAL;
++
++	val = enable ? val | enable_mask : val & ~enable_mask;
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_trtcm_token_bucket(struct airoha_qdma *qdma,
++					      int channel, u32 addr,
++					      enum trtcm_mode_type mode,
++					      u32 rate_val, u32 bucket_size)
++{
++	u32 val, config, tick, unit, rate, rate_frac;
++	int err;
++
++	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,
++					mode, &config, NULL))
++		return -EINVAL;
++
++	val = airoha_qdma_rr(qdma, addr);
++	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);
++	if (config & TRTCM_TICK_SEL)
++		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);
++	if (!tick)
++		return -EINVAL;
++
++	unit = (config & TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;
++	if (!unit)
++		return -EINVAL;
++
++	rate = rate_val / unit;
++	rate_frac = rate_val % unit;
++	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;
++	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |
++	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);
++
++	err = airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					  TRTCM_TOKEN_RATE_MODE, mode, rate);
++	if (err)
++		return err;
++
++	val = max_t(u32, bucket_size, MIN_TOKEN_SIZE);
++	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);
++
++	return airoha_qdma_set_trtcm_param(qdma, channel, addr,
++					   TRTCM_BUCKETSIZE_SHIFT_MODE,
++					   mode, val);
++}
++
++static int airoha_qdma_set_tx_rate_limit(struct airoha_gdm_port *port,
++					 int channel, u32 rate,
++					 u32 bucket_size)
++{
++	int i, err;
++
++	for (i = 0; i <= TRTCM_PEAK_MODE; i++) {
++		err = airoha_qdma_set_trtcm_config(port->qdma, channel,
++						   REG_EGRESS_TRTCM_CFG, i,
++						   !!rate, TRTCM_METER_MODE);
++		if (err)
++			return err;
++
++		err = airoha_qdma_set_trtcm_token_bucket(port->qdma, channel,
++							 REG_EGRESS_TRTCM_CFG,
++							 i, rate, bucket_size);
++		if (err)
++			return err;
++	}
++
++	return 0;
++}
++
++static int airoha_tc_htb_alloc_leaf_queue(struct airoha_gdm_port *port,
++					  struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++	u32 rate = div_u64(opt->rate, 1000) << 3; /* kbps */
++	struct net_device *dev = port->dev;
++	int num_tx_queues = dev->real_num_tx_queues;
++	int err;
++
++	if (opt->parent_classid != TC_HTB_CLASSID_ROOT) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid parent classid");
++		return -EINVAL;
++	}
++
++	err = airoha_qdma_set_tx_rate_limit(port, channel, rate, opt->quantum);
++	if (err) {
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed configuring htb offload");
++		return err;
++	}
++
++	if (opt->command == TC_HTB_NODE_MODIFY)
++		return 0;
++
++	err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);
++	if (err) {
++		airoha_qdma_set_tx_rate_limit(port, channel, 0, opt->quantum);
++		NL_SET_ERR_MSG_MOD(opt->extack,
++				   "failed setting real_num_tx_queues");
++		return err;
++	}
++
++	set_bit(channel, port->qos_sq_bmap);
++	opt->qid = AIROHA_NUM_TX_RING + channel;
++
++	return 0;
++}
++
++static void airoha_tc_remove_htb_queue(struct airoha_gdm_port *port, int queue)
++{
++	struct net_device *dev = port->dev;
++
++	netif_set_real_num_tx_queues(dev, dev->real_num_tx_queues - 1);
++	airoha_qdma_set_tx_rate_limit(port, queue + 1, 0, 0);
++	clear_bit(queue, port->qos_sq_bmap);
++}
++
++static int airoha_tc_htb_delete_leaf_queue(struct airoha_gdm_port *port,
++					   struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	airoha_tc_remove_htb_queue(port, channel);
++
++	return 0;
++}
++
++static int airoha_tc_htb_destroy(struct airoha_gdm_port *port)
++{
++	int q;
++
++	for_each_set_bit(q, port->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)
++		airoha_tc_remove_htb_queue(port, q);
++
++	return 0;
++}
++
++static int airoha_tc_get_htb_get_leaf_queue(struct airoha_gdm_port *port,
++					    struct tc_htb_qopt_offload *opt)
++{
++	u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
++
++	if (!test_bit(channel, port->qos_sq_bmap)) {
++		NL_SET_ERR_MSG_MOD(opt->extack, "invalid queue id");
++		return -EINVAL;
++	}
++
++	opt->qid = channel;
++
++	return 0;
++}
++
++static int airoha_tc_setup_qdisc_htb(struct airoha_gdm_port *port,
++				     struct tc_htb_qopt_offload *opt)
++{
++	switch (opt->command) {
++	case TC_HTB_CREATE:
++		break;
++	case TC_HTB_DESTROY:
++		return airoha_tc_htb_destroy(port);
++	case TC_HTB_NODE_MODIFY:
++	case TC_HTB_LEAF_ALLOC_QUEUE:
++		return airoha_tc_htb_alloc_leaf_queue(port, opt);
++	case TC_HTB_LEAF_DEL:
++	case TC_HTB_LEAF_DEL_LAST:
++	case TC_HTB_LEAF_DEL_LAST_FORCE:
++		return airoha_tc_htb_delete_leaf_queue(port, opt);
++	case TC_HTB_LEAF_QUERY_QUEUE:
++		return airoha_tc_get_htb_get_leaf_queue(port, opt);
++	default:
++		return -EOPNOTSUPP;
++	}
++
++	return 0;
++}
++
+ static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,
+ 			       void *type_data)
+ {
+@@ -2818,6 +3096,8 @@ static int airoha_dev_tc_setup(struct ne
+ 	switch (type) {
+ 	case TC_SETUP_QDISC_ETS:
+ 		return airoha_tc_setup_qdisc_ets(port, type_data);
++	case TC_SETUP_QDISC_HTB:
++		return airoha_tc_setup_qdisc_htb(port, type_data);
+ 	default:
+ 		return -EOPNOTSUPP;
+ 	}
+@@ -2868,7 +3148,8 @@ static int airoha_alloc_gdm_port(struct
+ 	}
+ 
+ 	dev = devm_alloc_etherdev_mqs(eth->dev, sizeof(*port),
+-				      AIROHA_NUM_TX_RING, AIROHA_NUM_RX_RING);
++				      AIROHA_NUM_NETDEV_TX_RINGS,
++				      AIROHA_NUM_RX_RING);
+ 	if (!dev) {
+ 		dev_err(eth->dev, "alloc_etherdev failed\n");
+ 		return -ENOMEM;
+@@ -2888,6 +3169,11 @@ static int airoha_alloc_gdm_port(struct
+ 	dev->irq = qdma->irq;
+ 	SET_NETDEV_DEV(dev, eth->dev);
+ 
++	/* reserve hw queues for HTB offloading */
++	err = netif_set_real_num_tx_queues(dev, AIROHA_NUM_TX_RING);
++	if (err)
++		return err;
++
+ 	err = of_get_ethdev_address(np, dev);
+ 	if (err) {
+ 		if (err == -EPROBE_DEFER)



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:15 -0500
Subject: [openwrt/openwrt]  kernel: modules: Add ETS Qdisc scheduler to sched
 KernelPackage
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36438.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/74b8a296cbe8e6fa373bedea005ebfb3befeafb9

commit 74b8a296cbe8e6fa373bedea005ebfb3befeafb9
Author: Lorenzo Bianconi <lorenzo at kernel.org>
AuthorDate: Sat Jan 4 15:46:57 2025 +0100

    kernel: modules: Add ETS Qdisc scheduler to sched KernelPackage
    
    Add ETS Qdisch scheduler to kernel package modules.
    
    Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
    [ add commit description ]
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 7e237f190225c0bcba0f5374632d0508f11398a8)
---
 package/kernel/linux/modules/netsupport.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk
index 3551a89a9b..06ef823280 100644
--- a/package/kernel/linux/modules/netsupport.mk
+++ b/package/kernel/linux/modules/netsupport.mk
@@ -1026,7 +1026,7 @@ endef
 $(eval $(call KernelPackage,bpf-test))
 
 
-SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
+SCHED_MODULES_EXTRA = sch_codel sch_gred sch_multiq sch_sfq sch_teql sch_fq sch_ets act_pedit act_simple act_skbmod act_csum em_cmp em_nbyte em_meta em_text
 SCHED_FILES_EXTRA = $(foreach mod,$(SCHED_MODULES_EXTRA),$(LINUX_DIR)/net/sched/$(mod).ko)
 
 define KernelPackage/sched
@@ -1040,6 +1040,7 @@ define KernelPackage/sched
 	CONFIG_NET_SCH_SFQ \
 	CONFIG_NET_SCH_TEQL \
 	CONFIG_NET_SCH_FQ \
+	CONFIG_NET_SCH_ETS \
 	CONFIG_NET_ACT_PEDIT \
 	CONFIG_NET_ACT_SIMP \
 	CONFIG_NET_ACT_SKBMOD \



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:20 -0500
Subject: [openwrt/openwrt]  airoha: an7581: refresh DTS with changes for
 cpufreq, MTD and MMC
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36439.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e620694876d4ced3214522d9d959362d07cea9a8

commit e620694876d4ced3214522d9d959362d07cea9a8
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:53:49 2025 +0100

    airoha: an7581: refresh DTS with changes for cpufreq, MTD and MMC
    
    Refresh DTS with required changes for cpufreq, MTD and MMC. While at it
    also fix wrong speed for MAC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 17b0d1379a3cd4a2e2dbefa7d0f9bc281269f97e)
---
 target/linux/airoha/dts/an7581-evb.dts |  31 +++++----
 target/linux/airoha/dts/an7581.dtsi    | 118 ++++++++++++++++++++++++++++++---
 2 files changed, 127 insertions(+), 22 deletions(-)

diff --git a/target/linux/airoha/dts/an7581-evb.dts b/target/linux/airoha/dts/an7581-evb.dts
index 3cf531a29c..9e88bc8a77 100644
--- a/target/linux/airoha/dts/an7581-evb.dts
+++ b/target/linux/airoha/dts/an7581-evb.dts
@@ -150,35 +150,40 @@
 
 &spi_nand {
 	partitions {
-		compatible = "airoha,fixed-partitions";
+		compatible = "fixed-partitions";
 		#address-cells = <1>;
 		#size-cells = <1>;
 
 		bootloader at 0 {
 			label = "bootloader";
 			reg = <0x00000000 0x00080000>;
+			read-only;
 		};
 
-		tclinux at 80000 {
+		art at 200000 {
+			label = "art";
+			reg = <0x00200000 0x00400000>;
+		};
+
+		tclinux at 600000 {
 			label = "tclinux";
-			compatible = "denx,fit";
-			reg = <0x00080000 0x02800000>;
+			reg = <0x00600000 0x03200000>;
 		};
 
-		tclinux_slave at 2880000 {
-			label = "tclinux_slave";
-			reg = <0x02880000 0x02800000>;
+		tclinux_slave at 3800000 {
+			label = "tclinux_alt";
+			reg = <0x03800000 0x03200000>;
 		};
 
-		rootfs_data at 5080000 {
+		rootfs_data at 6a00000 {
 			label = "rootfs_data";
-			reg = <0x5080000 0x00800000>;
+			reg = <0x06a00000 0x01400000>;
 		};
 
-		art at ffffffff {
-			compatible = "airoha,dynamic-art";
-			label = "art";
-			reg = <0xffffffff 0x00300000>;
+		reserved_bmt at 7e00000 {
+			label = "reserved_bmt";
+			reg = <0x07e00000 0x00200000>;
+			read-only;
 		};
 	};
 };
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 8abd736875..820ab0bfa8 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -78,7 +78,10 @@
 			reg = <0x0>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -89,7 +92,10 @@
 			reg = <0x1>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -100,7 +106,10 @@
 			reg = <0x2>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -111,7 +120,10 @@
 			reg = <0x3>;
 			operating-points-v2 = <&cpu_opp_table>;
 			enable-method = "psci";
-			clock-frequency = <80000000>;
+			clocks = <&cpufreq>;
+			clock-names = "cpu";
+			power-domains = <&cpufreq>;
+			power-domain-names = "cpu_pd";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -125,68 +137,156 @@
 		};
 	};
 
+	cpufreq: cpufreq {
+		compatible = "airoha,en7581-cpufreq";
+
+		operating-points-v2 = <&cpu_smcc_opp_table>;
+
+		#power-domain-cells = <0>;
+		#clock-cells = <0>;
+	};
+
 	cpu_opp_table: opp-table {
 		compatible = "operating-points-v2";
 		opp-shared;
 
 		opp-500000000 {
 			opp-hz = /bits/ 64 <500000000>;
+			required-opps = <&smcc_opp0>;
 		};
 
 		opp-550000000 {
 			opp-hz = /bits/ 64 <550000000>;
+			required-opps = <&smcc_opp1>;
 		};
 
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
+			required-opps = <&smcc_opp2>;
 		};
 
 		opp-650000000 {
 			opp-hz = /bits/ 64 <650000000>;
+			required-opps = <&smcc_opp3>;
 		};
 
 		opp-7000000000 {
 			opp-hz = /bits/ 64 <700000000>;
+			required-opps = <&smcc_opp4>;
 		};
 
 		opp-7500000000 {
 			opp-hz = /bits/ 64 <750000000>;
+			required-opps = <&smcc_opp5>;
 		};
 
 		opp-8000000000 {
 			opp-hz = /bits/ 64 <800000000>;
+			required-opps = <&smcc_opp6>;
 		};
 
 		opp-8500000000 {
 			opp-hz = /bits/ 64 <850000000>;
+			required-opps = <&smcc_opp7>;
 		};
 
 		opp-9000000000 {
 			opp-hz = /bits/ 64 <900000000>;
+			required-opps = <&smcc_opp8>;
 		};
 
 		opp-9500000000 {
 			opp-hz = /bits/ 64 <950000000>;
+			required-opps = <&smcc_opp9>;
 		};
 
 		opp-10000000000 {
 			opp-hz = /bits/ 64 <1000000000>;
+			required-opps = <&smcc_opp10>;
 		};
 
 		opp-10500000000 {
 			opp-hz = /bits/ 64 <1050000000>;
+			required-opps = <&smcc_opp11>;
 		};
 
 		opp-11000000000 {
 			opp-hz = /bits/ 64 <1100000000>;
+			required-opps = <&smcc_opp12>;
 		};
 
 		opp-11500000000 {
 			opp-hz = /bits/ 64 <1150000000>;
+			required-opps = <&smcc_opp13>;
 		};
 
 		opp-12000000000 {
 			opp-hz = /bits/ 64 <1200000000>;
+			required-opps = <&smcc_opp14>;
+		};
+	};
+
+	cpu_smcc_opp_table: opp-table-cpu-smcc {
+		compatible = "operating-points-v2";
+
+		smcc_opp0: opp0 {
+			opp-level = <0>;
+		};
+
+		smcc_opp1: opp1 {
+			opp-level = <1>;
+		};
+
+		smcc_opp2: opp2 {
+			opp-level = <2>;
+		};
+
+		smcc_opp3: opp3 {
+			opp-level = <3>;
+		};
+
+		smcc_opp4: opp4 {
+			opp-level = <4>;
+		};
+
+		smcc_opp5: opp5 {
+			opp-level = <5>;
+		};
+
+		smcc_opp6: opp6 {
+			opp-level = <6>;
+		};
+
+		smcc_opp7: opp7 {
+			opp-level = <7>;
+		};
+
+		smcc_opp8: opp8 {
+			opp-level = <8>;
+		};
+
+		smcc_opp9: opp9 {
+			opp-level = <9>;
+		};
+
+		smcc_opp10: opp10 {
+			opp-level = <10>;
+		};
+
+		smcc_opp11: opp11 {
+			opp-level = <11>;
+		};
+
+		smcc_opp12: opp12 {
+			opp-level = <12>;
+		};
+
+		smcc_opp13: opp13 {
+			opp-level = <13>;
+		};
+
+		smcc_opp14: opp14 {
+			opp-level = <14>;
 		};
 	};
 
@@ -431,16 +531,16 @@
 				spi-max-frequency = <50000000>;
 				spi-tx-bus-width = <1>;
 				spi-rx-bus-width = <2>;
-				airoha,bmt;
 			};
 		};
 
 		mmc0: mmc at 1fa0e000 {
-			compatible = "mediatek,mt7622-mmc";
+			compatible = "airoha,an7581-mmc";
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-			bus-width = <4>;
+			clocks = <&scuclk EN7581_CLK_EMMC>;
+			clock-names = "source";			bus-width = <4>;
 			max-frequency = <52000000>;
 			disable-wp;
 			cap-mmc-highspeed;
@@ -587,7 +687,7 @@
 				status = "disabled";
 
 				fixed-link {
-					speed = <1000>;
+					speed = <10000>;
 					full-duplex;
 					pause;
 				};
@@ -648,7 +748,7 @@
 					phy-mode = "internal";
 
 					fixed-link {
-						speed = <1000>;
+						speed = <10000>;
 						full-duplex;
 						pause;
 					};



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:11 -0500
Subject: [openwrt/openwrt]  airoha: an7581: enable MMC and PCI and refresh
 config
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36440.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3ee8355f2f09281395fd667c5134ad13e21391a0

commit 3ee8355f2f09281395fd667c5134ad13e21391a0
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:14:45 2025 +0100

    airoha: an7581: enable MMC and PCI and refresh config
    
    Enable MMC and PCI config symbol and refresh config for Airoha AN7581.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 73d368868c9dd2facfdf3f58533ee6310b2a665c)
---
 target/linux/airoha/an7581/config-6.6 | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index b26cbeeb33..f80bf49f8c 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -131,6 +131,8 @@ CONFIG_COMPAT_32BIT_TIME=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
 CONFIG_COREDUMP=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
 CONFIG_CPUSETS=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
@@ -190,8 +192,6 @@ CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_DCACHE_WORD_ACCESS=y
 CONFIG_DEBUG_BUGVERBOSE=y
-# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set
-CONFIG_DEBUG_INFO_NONE=y
 CONFIG_DEBUG_MISC=y
 CONFIG_DEVMEM=y
 CONFIG_DMADEVICES=y
@@ -351,6 +351,10 @@ CONFIG_MDIO_DEVRES=y
 # CONFIG_MEMCG is not set
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_CQHCI=y
+CONFIG_MMC_MTK=y
 CONFIG_MMU_LAZY_TLB_REFCOUNT=y
 CONFIG_MODULES_TREE_LOOKUP=y
 CONFIG_MODULES_USE_ELF_RELA=y
@@ -433,7 +437,8 @@ CONFIG_PCIEASPM_PERFORMANCE=y
 # CONFIG_PCIEASPM_POWERSAVE is not set
 # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
 CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIE_MEDIATEK is not set
+CONFIG_PCIE_MEDIATEK=y
+CONFIG_PCIE_MEDIATEK_GEN3=y
 CONFIG_PCIE_PME=y
 CONFIG_PCI_DOMAINS=y
 CONFIG_PCI_DOMAINS_GENERIC=y



From lede-commits at lists.infradead.org  Fri Jan 10 05:58:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 10 Jan 2025 08:58:12 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace BUS clock patch with
 upstream version
In-Reply-To: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
References: <173651749156.954782.1395255959004701795@git-01.infra.openwrt.org>
Message-ID: <mailman.36441.1736517884.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b315f4ebfebf7d163a769320c18a83adff65ed84

commit b315f4ebfebf7d163a769320c18a83adff65ed84
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 10 14:15:31 2025 +0100

    airoha: an7581: replace BUS clock patch with upstream version
    
    Replace BUS clock patch with upstream version with related tag
    as it got approved and merged.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 07b49ce87660a0448c0535b481b330e1bd333a8c)
---
 ...035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch} | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
similarity index 82%
rename from target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
index 01a5fd0c87..89b970f8bb 100644
--- a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch
@@ -1,12 +1,12 @@
-From 6d74b9e6d3bb07f50b22b9ea047b84a83aba185c Mon Sep 17 00:00:00 2001
+From 2eb75f86d52565367211c51334d15fe672633085 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Thu, 17 Oct 2024 19:26:24 +0200
+Date: Sat, 16 Nov 2024 11:56:53 +0100
 Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581
 
 The Documentation for EN7581 had a typo and still referenced the EN7523
 BUS base source frequency. This was in conflict with a different page in
-the Documentration that state that the BUS runs at 300MHz (600MHz source with
-divisor set to 2) and the actual watchdog that tick at half the BUS
+the Documentration that state that the BUS runs at 300MHz (600MHz source
+with divisor set to 2) and the actual watchdog that tick at half the BUS
 clock (150MHz). This was verified with the watchdog by timing the
 seconds that the system takes to reboot (due too watchdog) and by
 operating on different values of the BUS divisor.
@@ -18,6 +18,9 @@ This was also confirmed by Airoha.
 Cc: stable at vger.kernel.org
 Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support")
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20241116105710.19748-1-ansuelsmth at gmail.com
+Acked-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)



From lede-commits at lists.infradead.org  Sat Jan 11 13:23:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 11 Jan 2025 16:23:10 -0500
Subject: [openwrt/openwrt]  ramips: Add support for TP-Link Archer MR200 v6
In-Reply-To: <173663059059.3624711.5694077807545810240@git-01.infra.openwrt.org>
References: <173663059059.3624711.5694077807545810240@git-01.infra.openwrt.org>
Message-ID: <mailman.37396.1736630595.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9c8ac97e70fdad528387d203571176b9328f94ef

commit 9c8ac97e70fdad528387d203571176b9328f94ef
Author: Damien Zammit <damien at zamaudio.com>
AuthorDate: Sun May 26 16:40:51 2024 +1000

    ramips: Add support for TP-Link Archer MR200 v6
    
    This adds a new port for the above device.
    Currently, there is no easy installation method except
    opening the device up and soldering a UART header on and
    getting u-boot shell access.  You boot the initramfs version
    first using tftpboot, then once booted, you sysupgrade.
    
    Shell access to root on vendor firmware:
    admin:1234
    
    To get U-Boot console, spam '4' into the serial console at boot.
    
    with LEDs on the left, serial pinout is:
    
    o - tx
    o - rx
    o - gnd
    x - 3v3
    
    server ip for tftpboot
    192.168.0.225
    
    The initramfs-kernel version boots without touching onboard flash with:
    
    MT7628# tftpboot 0x80000000 openwrt-ramips-mt76x8-tplink_archer-mr200-v6-initramfs-kernel.bin
    MT7628# bootm 0x80000000
    
    Then when it boots off RAM, you copy
    openwrt-ramips-mt76x8-tplink_archer-mr200-v6-squashfs-sysupgrade.bin
    to /tmp/sysupgrade.bin of the device and run:
    
    root at OpenWrt:/tmp# sysupgrade -n sysupgrade.bin
    
    - [x] LEDs working
    - [x] Buttons working
    - [x] wlan detected
    - [x] wwan detected
    - [x] initramfs image working
    - [x] sysupgrade working
    
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
    Link: https://github.com/openwrt/openwrt/pull/15610
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../ramips/dts/mt7628an_tplink_archer-mr200-v6.dts | 192 +++++++++++++++++++++
 target/linux/ramips/image/mt76x8.mk                |  16 ++
 .../ramips/mt76x8/base-files/etc/board.d/01_leds   |   3 +-
 .../mt76x8/base-files/etc/board.d/02_network       |   3 +-
 4 files changed, 212 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v6.dts b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v6.dts
new file mode 100644
index 0000000000..c33b885c7e
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_tplink_archer-mr200-v6.dts
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "tplink,archer-mr200-v6", "mediatek,mt7628an-soc";
+	model = "TP-Link Archer MR200 v6";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		lan {
+			function = LED_FUNCTION_LAN;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+		};
+
+		wan {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power: power {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+
+		signal1 {
+			label = "white:signal1";
+			gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
+		};
+
+		signal2 {
+			label = "white:signal2";
+			gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+		};
+
+		signal3 {
+			label = "white:signal3";
+			gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan {
+			function = LED_FUNCTION_WLAN;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RFKILL>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			firmware at 20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0xfa0000>;
+			};
+
+			partition at fc0000 {
+				label = "config";
+				reg = <0xfc0000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_config_f100: macaddr at f100 {
+						compatible = "mac-base";
+						reg = <0xf100 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+
+			partition at fd0000 {
+				label = "romfile";
+				reg = <0xfd0000 0x10000>;
+				read-only;
+			};
+
+			partition at fe0000 {
+				label = "radio";
+				reg = <0xfe0000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_radio_0: eeprom at 0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_radio_8000: eeprom at 8000 {
+						reg = <0x8000 0x4da8>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "uart1", "wdt";
+		function = "gpio";
+	};
+};
+
+&wmac {
+	nvmem-cells = <&eeprom_radio_0>, <&macaddr_config_f100 0>;
+	nvmem-cell-names = "eeprom", "mac-address";
+	status = "okay";
+};
+
+&esw {
+	mediatek,portdisable = <0x30>;
+};
+
+&ethernet {
+	nvmem-cells = <&macaddr_config_f100 0>;
+	nvmem-cell-names = "mac-address";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		nvmem-cells = <&eeprom_radio_8000>, <&macaddr_config_f100 (-1)>;
+		nvmem-cell-names = "eeprom", "mac-address";
+	};
+};
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index dbad26a140..76b1951588 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -675,6 +675,22 @@ define Device/tplink_archer-mr200-v5
 endef
 TARGET_DEVICES += tplink_archer-mr200-v5
 
+define Device/tplink_archer-mr200-v6
+  $(Device/tplink-v2)
+  IMAGE_SIZE := 15936k
+  DEVICE_MODEL := Archer MR200
+  DEVICE_VARIANT := v6
+  TPLINK_FLASHLAYOUT := 16Mmtk
+  TPLINK_HWID := 0x20000006
+  TPLINK_HWREV := 0x6
+  TPLINK_HWREVADD := 0x6
+  DEVICE_PACKAGES := kmod-mt76x0e uqmi kmod-usb2 kmod-usb-serial-option
+  KERNEL := kernel-bin | append-dtb | lzma -d22
+  KERNEL_INITRAMFS := kernel-bin | append-dtb
+  IMAGES := sysupgrade.bin
+endef
+TARGET_DEVICES += tplink_archer-mr200-v6
+
 define Device/tplink_re200-v2
   $(Device/tplink-safeloader)
   IMAGE_SIZE := 7808k
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
index fda4fa3bdf..e13c5db50e 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
@@ -89,7 +89,8 @@ tplink,archer-c50-v6)
 	ucidef_set_led_wlan "wlan2g" "wlan2g" "green:wlan2g" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "wlan5g" "green:wlan5g" "phy1tpt"
 	;;
-tplink,archer-mr200-v5)
+tplink,archer-mr200-v5|\
+tplink,archer-mr200-v6)
 	ucidef_set_led_netdev "lan" "lan" "white:lan" "eth0"
 	ucidef_set_led_netdev "wan" "wan" "white:wan" "wwan0"
 	;;
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
index 10e0e84dde..994ed0009b 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
@@ -166,7 +166,8 @@ ramips_setup_interfaces()
 		ucidef_add_switch "switch0" \
 			"0:wan" "1:lan" "2:lan" "3:lan" "4:lan" "6t at eth0"
 		;;
-	tplink,archer-mr200-v5)
+	tplink,archer-mr200-v5|\
+	tplink,archer-mr200-v6)
 		ucidef_add_switch "switch0" \
 			"0:lan" "1:lan" "2:lan" "3:lan" "6t at eth0"
 		ucidef_set_interface "wan" device "/dev/cdc-wdm0" protocol "qmi"



From lede-commits at lists.infradead.org  Sat Jan 11 13:25:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 11 Jan 2025 16:25:08 -0500
Subject: [openwrt/openwrt]  e2fsprogs: update to 1.47.2
In-Reply-To: <173663070823.3627623.8399108702469895162@git-01.infra.openwrt.org>
References: <173663070823.3627623.8399108702469895162@git-01.infra.openwrt.org>
Message-ID: <mailman.37397.1736630711.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7a888afa40714fba18329c3c679cda111bd993ae

commit 7a888afa40714fba18329c3c679cda111bd993ae
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Mon Jan 6 05:40:38 2025 -0500

    e2fsprogs: update to 1.47.2
    
    Release information (not yet published):
    https://e2fsprogs.sourceforge.net/e2fsprogs-release.html#1.47.2
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17499
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/utils/e2fsprogs/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/utils/e2fsprogs/Makefile b/package/utils/e2fsprogs/Makefile
index 16b47748e3..bebfc8dab2 100644
--- a/package/utils/e2fsprogs/Makefile
+++ b/package/utils/e2fsprogs/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=e2fsprogs
-PKG_VERSION:=1.47.0
-PKG_RELEASE:=2
+PKG_VERSION:=1.47.2
+PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/
-PKG_HASH:=144af53f2bbd921cef6f8bea88bb9faddca865da3fbc657cc9b4d2001097d5db
+PKG_HASH:=08242e64ca0e8194d9c1caad49762b19209a06318199b63ce74ae4ef2d74e63c
 
 PKG_LICENSE:=GPL-2.0
 PKG_LICENSE_FILES:=NOTICE



From lede-commits at lists.infradead.org  Sat Jan 11 13:25:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 11 Jan 2025 16:25:09 -0500
Subject: [openwrt/openwrt]  tools/e2fsprogs: update to 1.47.2
In-Reply-To: <173663070823.3627623.8399108702469895162@git-01.infra.openwrt.org>
References: <173663070823.3627623.8399108702469895162@git-01.infra.openwrt.org>
Message-ID: <mailman.37398.1736630716.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/40e2710dfad800e3dd81882bf1ddd429b2ce7180

commit 40e2710dfad800e3dd81882bf1ddd429b2ce7180
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Fri Jan 10 15:26:29 2025 -0500

    tools/e2fsprogs: update to 1.47.2
    
    Release information (not yet published):
    https://e2fsprogs.sourceforge.net/e2fsprogs-release.html#1.47.2
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17499
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 tools/e2fsprogs/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile
index 50c3888b64..5deee08160 100644
--- a/tools/e2fsprogs/Makefile
+++ b/tools/e2fsprogs/Makefile
@@ -9,10 +9,10 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=e2fsprogs
 PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs
-PKG_VERSION:=1.47.0
-PKG_HASH:=0b4fe723d779b0927fb83c9ae709bc7b40f66d7df36433bef143e41c54257084
+PKG_VERSION:=1.47.2
+PKG_HASH:=08242e64ca0e8194d9c1caad49762b19209a06318199b63ce74ae4ef2d74e63c
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/
 
 HOST_BUILD_PARALLEL:=1



From lede-commits at lists.infradead.org  Sun Jan 12 01:21:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 04:21:35 -0500
Subject: [openwrt/openwrt]  apm821xx: fixes WNDAP620 + WNDAP660 sysupgrade
 failures
In-Reply-To: <173667369534.329501.11801661344544586640@git-01.infra.openwrt.org>
References: <173667369534.329501.11801661344544586640@git-01.infra.openwrt.org>
Message-ID: <mailman.37485.1736673702.1089.lede-commits@lists.infradead.org>

chunkeey pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e9415be4ad3cacbbd6e65fee5213baf3eaf9e07a

commit e9415be4ad3cacbbd6e65fee5213baf3eaf9e07a
Author: Christian Lamparter <chunkeey at gmail.com>
AuthorDate: Sat Jan 4 19:51:48 2025 +0100

    apm821xx: fixes WNDAP620 + WNDAP660 sysupgrade failures
    
    OpenWRT on the WNDAP6x0 refuses to sysupgrade to itself
    due to a compat_version imbalance. The Image is generated
    with version 2.0, but the uci-defaults says that it needs
    to be at 3.0 for the device.
    
    Fix this by downgrading WNDAP6x0 05_fix-compat-version's
    values back to 2.0 so it matches what we use.
    
    Fixes: 5815884c3a2a ("apm821xx: migrate to DSA")
    Signed-off-by: Christian Lamparter <chunkeey at gmail.com>
---
 .../apm821xx/base-files/etc/uci-defaults/05_fix-compat-version     | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
index 00d3954e5f..11af63c9e7 100644
--- a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
+++ b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
@@ -2,12 +2,15 @@
 
 case "$(board_name)" in
 meraki,mx60|\
-netgear,wndap620|\
-netgear,wndap660|\
 netgear,wndr4700)
 	uci set system. at system[0].compat_version="3.0"
 	uci commit system
 	;;
+netgear,wndap620|\
+netgear,wndap660)
+	uci set system. at system[0].compat_version="2.0"
+	uci commit system
+	;;
 esac
 
 exit 0



From lede-commits at lists.infradead.org  Sun Jan 12 04:22:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 07:22:14 -0500
Subject: [openwrt/openwrt]  rockchip: disable kernel preemption
In-Reply-To: <173668453442.601885.17535864203401432337@git-01.infra.openwrt.org>
References: <173668453442.601885.17535864203401432337@git-01.infra.openwrt.org>
Message-ID: <mailman.37506.1736684538.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/1c178f364454c5b73eb453fa0b101ae2f6454d4c

commit 1c178f364454c5b73eb453fa0b101ae2f6454d4c
Author: Kien Truong <duckientruong at gmail.com>
AuthorDate: Sat Jan 11 12:20:12 2025 +0700

    rockchip: disable kernel preemption
    
    This setting is more suitable for device running OpenWRT.
    Most OpenWRT targets are already default to this configuration,
    and it has shown better performance in VPN (wireguard).
    
    Fix: #17454
    
    Signed-off-by: Kien Truong <duckientruong at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17575
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/rockchip/armv8/config-6.6 | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/target/linux/rockchip/armv8/config-6.6 b/target/linux/rockchip/armv8/config-6.6
index 56fb2f96a1..68eed3e5f9 100644
--- a/target/linux/rockchip/armv8/config-6.6
+++ b/target/linux/rockchip/armv8/config-6.6
@@ -530,12 +530,7 @@ CONFIG_POWER_RESET=y
 CONFIG_POWER_SUPPLY=y
 CONFIG_POWER_SUPPLY_HWMON=y
 CONFIG_PPS=y
-CONFIG_PREEMPT=y
-CONFIG_PREEMPTION=y
-CONFIG_PREEMPT_BUILD=y
-CONFIG_PREEMPT_COUNT=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_RCU=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PRINTK_TIME=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_PROC_VMCORE=y



From lede-commits at lists.infradead.org  Sun Jan 12 04:34:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 07:34:30 -0500
Subject: [openwrt/openwrt]  rockchip: disable kernel preemption
In-Reply-To: <173668527093.615036.16705225141396474384@git-01.infra.openwrt.org>
References: <173668527093.615036.16705225141396474384@git-01.infra.openwrt.org>
Message-ID: <mailman.37515.1736685330.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e9d80cdb6c8d6e56d11e6946e90d9f1dfe364672

commit e9d80cdb6c8d6e56d11e6946e90d9f1dfe364672
Author: Kien Truong <duckientruong at gmail.com>
AuthorDate: Sat Jan 11 12:20:12 2025 +0700

    rockchip: disable kernel preemption
    
    This setting is more suitable for device running OpenWRT.
    Most OpenWRT targets are already default to this configuration,
    and it has shown better performance in VPN (wireguard).
    
    Fix: #17454
    
    Signed-off-by: Kien Truong <duckientruong at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17575
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 1c178f364454c5b73eb453fa0b101ae2f6454d4c)
---
 target/linux/rockchip/armv8/config-6.6 | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/target/linux/rockchip/armv8/config-6.6 b/target/linux/rockchip/armv8/config-6.6
index 56fb2f96a1..68eed3e5f9 100644
--- a/target/linux/rockchip/armv8/config-6.6
+++ b/target/linux/rockchip/armv8/config-6.6
@@ -530,12 +530,7 @@ CONFIG_POWER_RESET=y
 CONFIG_POWER_SUPPLY=y
 CONFIG_POWER_SUPPLY_HWMON=y
 CONFIG_PPS=y
-CONFIG_PREEMPT=y
-CONFIG_PREEMPTION=y
-CONFIG_PREEMPT_BUILD=y
-CONFIG_PREEMPT_COUNT=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_RCU=y
+CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PRINTK_TIME=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_PROC_VMCORE=y



From lede-commits at lists.infradead.org  Sun Jan 12 04:44:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 07:44:51 -0500
Subject: [openwrt/openwrt]  tools/cmake: update to 3.31.4
In-Reply-To: <173668589147.630531.12654810206042922126@git-01.infra.openwrt.org>
References: <173668589147.630531.12654810206042922126@git-01.infra.openwrt.org>
Message-ID: <mailman.37524.1736685962.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5f54e17bae54f79541524b83fd72da102196fab8

commit 5f54e17bae54f79541524b83fd72da102196fab8
Author: Jack Sun <sunjiazheng321521 at gmail.com>
AuthorDate: Sun Jan 12 14:14:16 2025 +0800

    tools/cmake: update to 3.31.4
    
    Release notes: https://cmake.org/cmake/help/latest/release/3.31.html
    No need refresh patch
    
    Signed-off-by: Jack Sun <sunjiazheng321521 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17587
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 tools/cmake/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/cmake/Makefile b/tools/cmake/Makefile
index c204c7522e..da6eb516b7 100644
--- a/tools/cmake/Makefile
+++ b/tools/cmake/Makefile
@@ -7,7 +7,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=cmake
-PKG_VERSION:=3.31.3
+PKG_VERSION:=3.31.4
 PKG_VERSION_MAJOR:=$(word 1,$(subst ., ,$(PKG_VERSION))).$(word 2,$(subst ., ,$(PKG_VERSION)))
 PKG_RELEASE:=1
 PKG_CPE_ID:=cpe:/a:kitware:cmake
@@ -15,7 +15,7 @@ PKG_CPE_ID:=cpe:/a:kitware:cmake
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \
 		https://cmake.org/files/v$(PKG_VERSION_MAJOR)/
-PKG_HASH:=fac45bc6d410b49b3113ab866074888d6c9e9dc81a141874446eb239ac38cb87
+PKG_HASH:=a6130bfe75f5ba5c73e672e34359f7c0a1931521957e8393a5c2922c8b0f7f25
 
 HOST_BUILD_PARALLEL:=1
 HOST_CONFIGURE_PARALLEL:=1



From lede-commits at lists.infradead.org  Sun Jan 12 05:49:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 08:49:27 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.71
In-Reply-To: <173668976726.701441.13407473525345660937@git-01.infra.openwrt.org>
References: <173668976726.701441.13407473525345660937@git-01.infra.openwrt.org>
Message-ID: <mailman.37555.1736689787.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3f87c5ac4221deb37d4c3e730e692eef8f9c9ffe

commit 3f87c5ac4221deb37d4c3e730e692eef8f9c9ffe
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Fri Jan 10 16:01:56 2025 -0500

    kernel: bump 6.6 to 6.6.71
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.71
    
    Manually rebased:
            airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
            airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
    
    All other patches automatically rebased.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712
    Run-tested: bcm27xx/bcm2712
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    [ fix manually rebased patch ]
    Link: https://github.com/openwrt/openwrt/pull/17568
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 include/kernel-6.6                                         |  4 ++--
 ...-en7523-Rework-clock-handling-for-different-clock.patch | 14 +++++++-------
 .../111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch   | 14 ++++++--------
 3 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 1cda04d0c5..f034d0754c 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .70
-LINUX_KERNEL_HASH-6.6.70 = 84d23ee07fb26febbcb6d1295ba15efdc67ac382b4137b2c8853146c10fd2f97
+LINUX_VERSION-6.6 = .71
+LINUX_KERNEL_HASH-6.6.71 = 219715ba2dcfa6539fba09ad3f9212772f3507189eb60d77f8e89b06c32e724e
diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
index 7333ebbdf2..187715a5cc 100644
--- a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
+++ b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -26,15 +26,15 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	const struct clk_ops pcie_ops;
  	int (*hw_init)(struct platform_device *pdev,
  		       struct clk_hw_onecell_data *clk_data);
-@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
+ 	u32 rate;
+ 	int i;
  
- 	hw = en7523_register_pcie_clk(dev, np_base);
- 	clk_data->hws[EN7523_CLK_PCIE] = hw;
--
 -	clk_data->num = EN7523_NUM_CLOCKS;
- }
- 
- static int en7523_clk_hw_init(struct platform_device *pdev,
+-
+ 	for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
+ 		const struct en_clk_desc *desc = &en7523_base_clks[i];
+ 		u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
 @@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
  
  	hw = en7523_register_pcie_clk(dev, base);
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
index 24c4dbde78..d116bb9ee0 100644
--- a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
+++ b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
@@ -103,29 +103,27 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
  	if (IS_ERR(host->bus_clk))
-@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
- 		goto host_free;
+@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
+ 		return PTR_ERR(host->pins_default);
  	}
  
 -	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
 -	if (IS_ERR(host->pins_uhs)) {
--		ret = PTR_ERR(host->pins_uhs);
 -		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
--		goto host_free;
+-		return PTR_ERR(host->pins_uhs);
 +	/* AN7581 doesn't have state_uhs pins */
 +	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
 +		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
 +		if (IS_ERR(host->pins_uhs)) {
-+			ret = PTR_ERR(host->pins_uhs);
 +			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+			goto host_free;
++			return PTR_ERR(host->pins_uhs);
 +		}
  	}
  
  	/* Support for SDIO eint irq ? */
-@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
  		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- 		goto release_mem;
+ 		goto release_clk;
  	}
 +
 +	/* AN7581 without regulator require tune to OCR values */



From lede-commits at lists.infradead.org  Sun Jan 12 07:54:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 10:54:54 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq60xx: add TP-Link EAP610-Outdoor
 support
In-Reply-To: <173669729483.862932.15170918757708978322@git-01.infra.openwrt.org>
References: <173669729483.862932.15170918757708978322@git-01.infra.openwrt.org>
Message-ID: <mailman.37578.1736697300.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a00ff9f6d13f6ff5eae57be70a270ccd668d5240

commit a00ff9f6d13f6ff5eae57be70a270ccd668d5240
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
AuthorDate: Sun Aug 7 10:15:35 2022 -0500

    qualcommax: ipq60xx: add TP-Link EAP610-Outdoor support
    
    TP-Link EAP610-Outdoor is a 802.11ax AP claiming AX1800 support. It is
    wall or pole mountable, and rated for outdoor use. It can only be
    powered via PoE.
    
    Specifications:
    ---------------
    * CPU: Qualcomm IPQ6018 Quad core Cortex-A53
    * RAM: 512 MB
    * Storage: ESMT PSR1GA30DT 128MB NAND
    * Ethernet:
      * Gigabit RJ45 port with PoE input
    * WLAN:
      * 2.4GHz/5GHz
    * LEDs:
      * Multi-color System LED (Green/Amber)
    * Buttons:
      * 1x Reset
    * UART: 4-pin unpopulated header
      * 1.8 V level, Pinout 1 - TX, 2 - RX, 3 - GND, 4 - 1.8V
    
    Installation:
    =============
    
    Web UI method
    -------------
    
    Set up the device using the vendor's web UI. After that go to
    Management->SSH and enable the "SSH Login" checkbox. Select "Save".
    The connect to the machine via SSH:
    
        ssh -o hostkeyalgorithms=ssh-rsa <ip_of_device>
    
    Disable signature verification:
    
        cliclientd stopcs
    
    Rename the "-web-ui-factory" image to something less than 63
    characters, maintaining the ".bin" suffix.
     * Go to System -> Firmware Update.
     * Under "New Firmware File", click "Browse" and select the image
     * Select "Update" and confirm by clicking "OK".
    
    If the update fails, the web UI should show an error message.
    Otherwise, the device should reboot into OpenWRT.
    
    TFTP method
    -----------
    
    To flash via tftp, first place the initramfs image on the TFTP server.
    
        setenv serverip <ip of tftp server>
        setenv ipaddr <ip in same subnet as tftp server>
        tftpboot tplink_eap610-outdoor-initramfs-uImage.itb
        bootm
    
    This should boot OpenWRT. Once booted, flash the sysupgrade.bin image
    using either luci or the commandline.
    
    The tplink2022 image format
    ============================
    
    The vendor images of this device are packaged in a format that does
    not match any previous tplink formats. In order for flashing to work
    from the vendor's web UI, firmware updates need to be packaged in
    this format. The `tplink-mkimage-2022.py` is provided for this
    purpose.
    
    This script can also analyze vendor images, and extract the required
    "support" string. This string is checked by the vendor firmware, and
    images with a missing or incorrect string are rejected.
    
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/14922
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 include/image-commands.mk                          |   8 +
 .../boot/uboot-envtools/files/qualcommax_ipq60xx   |   4 +
 package/firmware/ipq-wifi/Makefile                 |   2 +
 scripts/tplink-mkimage-2022.py                     | 198 +++++++++++++++++++++
 .../arm64/boot/dts/qcom/ipq6018-eap610-outdoor.dts | 151 ++++++++++++++++
 target/linux/qualcommax/image/ipq60xx.mk           |  18 ++
 .../ipq60xx/base-files/etc/board.d/02_network      |   7 +
 .../etc/hotplug.d/firmware/11-ath11k-caldata       |   7 +
 .../base-files/lib/preinit/09_mount_factory_data   |  19 ++
 .../ipq60xx/base-files/lib/upgrade/platform.sh     |  76 ++++++++
 10 files changed, 490 insertions(+)

diff --git a/include/image-commands.mk b/include/image-commands.mk
index 2e129e0347..aa48e19399 100644
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@@ -626,6 +626,14 @@ define Build/sysupgrade-tar
 		$@
 endef
 
+define Build/tplink-image-2022
+	$(TOPDIR)/scripts/tplink-mkimage-2022.py  \
+		--create $@.new \
+		--rootfs $@ \
+		--support "$(TPLINK_SUPPORT_STRING)"
+	@mv $@.new $@
+endef
+
 define Build/tplink-safeloader
 	-$(STAGING_DIR_HOST)/bin/tplink-safeloader \
 		-B $(TPLINK_BOARD_ID) \
diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq60xx b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
index eec99ce8f9..77c96da24a 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq60xx
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
@@ -25,6 +25,10 @@ netgear,wax214)
 	[ -n "$idx" ] && \
 		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
 	;;
+tplink,eap610-outdoor)
+	idx="$(find_mtd_index 0:appsblenv)"
+	[ -n "$idx" ] && \
+		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
 yuncore,fap650)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \
diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
index 679a144211..9821e39a85 100644
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@@ -55,6 +55,7 @@ ALLWIFIBOARDS:= \
 	redmi_ax6 \
 	skspruce_wia3300-20 \
 	spectrum_sax1v1k \
+	tplink_eap610-outdoor \
 	tplink_eap620hd-v1 \
 	tplink_eap660hd-v1 \
 	wallys_dr40x9 \
@@ -185,6 +186,7 @@ $(eval $(call generate-ipq-wifi-package,prpl_haze,prpl Haze))
 $(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6))
 $(eval $(call generate-ipq-wifi-package,skspruce_wia3300-20,SKSpruce WIA3300-20))
 $(eval $(call generate-ipq-wifi-package,spectrum_sax1v1k,Spectrum SAX1V1K))
+$(eval $(call generate-ipq-wifi-package,tplink_eap610-outdoor,TPLink EAP610-Outdoor))
 $(eval $(call generate-ipq-wifi-package,tplink_eap620hd-v1,TP-Link EAP620 HD v1))
 $(eval $(call generate-ipq-wifi-package,tplink_eap660hd-v1,TP-Link EAP660 HD v1))
 $(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
diff --git a/scripts/tplink-mkimage-2022.py b/scripts/tplink-mkimage-2022.py
new file mode 100755
index 0000000000..4db69409c9
--- /dev/null
+++ b/scripts/tplink-mkimage-2022.py
@@ -0,0 +1,198 @@
+#!/usr/bin/env python3
+
+'''A program for manipulating tplink2022 images.
+
+A tplink2022 is an image format encountered on TP-Link devices around the year
+2022. This was seen at least on the EAP610-Outdoor. The format is a container
+for a rootfs, and has optional fields for the "software" version. It also
+ requires a "support" string that describes the list of compatible devices.
+
+This module is intended for creating such images with an OpenWRT UBI image, but
+also supports analysis and extraction of vendor images. Altough tplink2022
+images can be signed, this program does not support signing image.
+
+To get an explanation of the commandline arguments, run this program with the
+"--help" argument.
+'''
+
+import argparse
+import hashlib
+import os
+import pprint
+import struct
+
+def decode_header(datafile):
+    '''Read the tplink2022 image header anbd decode it into a dictionary'''
+    header = {}
+    fmt = '>2I'
+
+    datafile.seek(0x1014)
+    raw_header = datafile.read(8)
+    fields = struct.unpack(fmt, raw_header)
+
+    header['rootfs_size'] = fields[0]
+    header['num_items'] = fields[1]
+    header['items'] = []
+
+    rootfs = {}
+    rootfs['name'] = 'rootfs.ubi'
+    rootfs['offset'] = 0
+    rootfs['size'] = header['rootfs_size']
+    header['items'].append(rootfs)
+
+    for _ in range(header['num_items']):
+        entry = datafile.read(0x2c)
+        fmt = '>I32s2I'
+        fields = struct.unpack(fmt, entry)
+
+        section = {}
+        section['name'] = fields[1].decode("utf-8").rstrip('\0')
+        section['type'] = fields[0]
+        section['offset'] = fields[2]
+        section['size'] = fields[3]
+        header['items'].append(section)
+    return header
+
+def extract(datafile):
+    '''Extract the sections of the tplink2022 image to separate files'''
+    header = decode_header(datafile)
+
+    pretty = pprint.PrettyPrinter(indent=4, sort_dicts=False)
+    pretty.pprint(header)
+
+    for section in header['items']:
+        datafile.seek(0x1814 + section['offset'])
+        section_contents = datafile.read(section['size'])
+
+        with open(f"{section['name']}.bin", 'wb') as section_file:
+            section_file.write(section_contents)
+
+    with open('leftover.bin', 'wb') as extras_file:
+        extras_file.write(datafile.read())
+
+def get_section_contents(section):
+    '''I don't remember what this does. It's been a year since I wrote this'''
+    if section.get('data'):
+        data = section['data']
+    elif section.get('file'):
+        with open(section['file'], 'rb') as section_file:
+            data = section_file.read()
+    else:
+        data = bytes()
+
+    if section['size'] != len(data):
+        raise ValueError("Wrong section size", len(data))
+
+    return data
+
+def write_image(output_image, header):
+    '''Write a tplink2022 image with the contents in the "header" dictionary'''
+    with open(output_image, 'w+b') as out_file:
+        # header MD5
+        salt = [ 0x7a, 0x2b, 0x15, 0xed,
+             0x9b, 0x98, 0x59, 0x6d,
+             0xe5, 0x04, 0xab, 0x44,
+             0xac, 0x2a, 0x9f, 0x4e
+        ]
+
+        out_file.seek(4)
+        out_file.write(bytes(salt))
+
+        # unknown section
+        out_file.write(bytes([0xff] * 0x1000))
+
+        # Table of contents
+        raw_header = struct.pack('>2I', header['rootfs_size'],
+                        header['num_items'])
+        out_file.write(raw_header)
+
+        for section in header['items']:
+            if section['name'] == 'rootfs.ubi':
+                continue
+
+            hdr = struct.pack('>I32s2I',
+                section.get('type', 0),
+                section['name'].encode('utf-8'),
+                section['offset'],
+                section['size']
+            )
+
+            out_file.write(hdr)
+
+        for section in header['items']:
+            out_file.seek(0x1814 + section['offset'])
+            out_file.write(get_section_contents(section))
+
+        size = out_file.tell()
+
+        out_file.seek(4)
+        md5_sum = hashlib.md5(out_file.read())
+
+        out_file.seek(0)
+        out_file.write(struct.pack('>I16s', size, md5_sum.digest()))
+
+def encode_soft_verson():
+    '''Not sure of the meaning of version. Also doesn't appear to be needed.'''
+    return struct.pack('>4B1I2I', 0xff, 1, 0 ,0, 0x2020202, 30000, 1)
+
+def create_image(output_image, root, support):
+    '''Create an image with a ubi "root" and a "support" string.'''
+    header = {}
+
+    header['rootfs_size'] = os.path.getsize(root)
+    header['items'] = []
+
+    rootfs = {}
+    rootfs['name'] = 'rootfs.ubi'
+    rootfs['file'] = root
+    rootfs['offset'] = 0
+    rootfs['size'] = header['rootfs_size']
+    header['items'].append(rootfs)
+
+    support_list = {}
+    support_list['name'] = 'support-list'
+    support_list['data'] = support.replace(" ", "\r\n").encode('utf-8')
+    support_list['offset'] = header['rootfs_size']
+    support_list['size'] = len(support_list['data'])
+    header['items'].append(support_list)
+
+    sw_version = {}
+    sw_version['name'] = 'soft-version'
+    sw_version['type'] = 1
+    sw_version['data'] = encode_soft_verson()
+    sw_version['offset'] = support_list['offset'] + support_list['size']
+    sw_version['size'] = len(sw_version['data'])
+    header['items'].append(sw_version)
+
+    header['num_items'] = len(header['items']) - 1
+    write_image(output_image, header)
+
+def main(args):
+    '''We support image analysis,extraction, and creation'''
+    if args.extract:
+        with open(args.image, 'rb') as image:
+            extract(image)
+    elif args.create:
+        if not args.rootfs or not args.support:
+            raise ValueError('To create an image, specify rootfs and support list')
+        create_image(args.image, args.rootfs, args.support)
+    else:
+        with open(args.image, 'rb') as image:
+            header = decode_header(image)
+
+            pretty = pprint.PrettyPrinter(indent=4, sort_dicts=False)
+            pretty.pprint(header)
+
+if __name__ == "__main__":
+    parser = argparse.ArgumentParser(description='EAP extractor')
+    parser.add_argument('--info', action='store_true')
+    parser.add_argument('--extract', action='store_true')
+    parser.add_argument('--create', action='store_true')
+    parser.add_argument('image', type=str,
+                    help='Name of image to create or decode')
+    parser.add_argument('--rootfs', type=str,
+                    help='When creating an EAP image, UBI image with rootfs and kernel')
+    parser.add_argument('--support', type=str,
+                    help='String for the "support-list" section')
+
+    main(parser.parse_args())
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-eap610-outdoor.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-eap610-outdoor.dts
new file mode 100644
index 0000000000..165fc3ef1b
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-eap610-outdoor.dts
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "ipq6018.dtsi"
+#include "ipq6018-cp-cpu.dtsi"
+#include "ipq6018-ess.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "TP-Link EAP610-Outdoor";
+	compatible = "tplink,eap610-outdoor", "qcom,ipq6018";
+
+	aliases {
+		serial0 = &blsp1_uart3;
+		led-boot = &led_sys_green;
+		led-failsafe = &led_sys_amber;
+		led-running = &led_sys_green;
+		led-upgrade = &led_sys_amber;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs-append = " ubi.block=0,rootfs root=/dev/ubiblock0_1";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys_amber: led-0 {
+			function = "system";
+			color = <LED_COLOR_ID_AMBER>;
+			gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_sys_green: led-1 {
+			function = "system";
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	gpio-restart {
+		compatible = "gpio-restart";
+		gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
+		open-source;
+	};
+};
+
+&blsp1_uart3 {
+	pinctrl-0 = <&serial_3_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&tlmm {
+	mdio_pins: mdio-pins {
+		mdc {
+			pins = "gpio64";
+			function = "mdc";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		mdio {
+			pins = "gpio65";
+			function = "mdio";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
+	led_enable {
+		gpio-hog;
+		output-high;
+		gpios = <36 GPIO_ACTIVE_HIGH>;
+		line-name = "enable-leds";
+	};
+};
+
+&dp5 {
+	phy-handle = <&rtl8211f_4>;
+	phy-mode = "sgmii";
+	label = "lan";
+	status = "okay";
+};
+
+&edma {
+	status = "okay";
+};
+
+&mdio {
+	pinctrl-0 = <&mdio_pins>;
+	pinctrl-names = "default";
+	reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <10000>;
+	reset-post-delay-us = <50000>;
+	status = "okay";
+
+	rtl8211f_4: ethernet-phy at 4 {
+		reg = <4>;
+	};
+};
+
+&switch {
+	switch_lan_bmp = <ESS_PORT5>;
+	switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>;
+	status = "okay";
+
+	qcom,port_phyinfo {
+		port at 4 {
+			port_id = <5>;
+			phy_address = <4>;
+		};
+	};
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&qpic_nand {
+	status = "okay";
+
+	nand at 0 {
+		reg = <0>;
+
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+		nand-bus-width = <8>;
+	};
+};
+
+&wifi {
+	ieee80211-freq-limit = <2402000 5835000>;
+	qcom,ath11k-calibration-variant = "TP-Link-EAP610-Outdoor";
+	status = "okay";
+};
diff --git a/target/linux/qualcommax/image/ipq60xx.mk b/target/linux/qualcommax/image/ipq60xx.mk
index 0b7cd413c3..c7e0be1181 100644
--- a/target/linux/qualcommax/image/ipq60xx.mk
+++ b/target/linux/qualcommax/image/ipq60xx.mk
@@ -68,6 +68,24 @@ define Device/qihoo_360v6
 endef
 TARGET_DEVICES += qihoo_360v6
 
+define Device/tplink_eap610-outdoor
+	$(call Device/FitImage)
+	$(call Device/UbiFit)
+	DEVICE_VENDOR := TP-Link
+	DEVICE_MODEL := EAP610-Outdoor
+	BLOCKSIZE := 128k
+	PAGESIZE := 2048
+	SOC := ipq6018
+	DEVICE_PACKAGES := ipq-wifi-tplink_eap610-outdoor
+	IMAGES += web-ui-factory.bin
+	IMAGE/web-ui-factory.bin := append-ubi | tplink-image-2022
+	TPLINK_SUPPORT_STRING := SupportList: \
+		EAP610-Outdoor(TP-Link|UN|AX1800-D):1.0 \
+		EAP610-Outdoor(TP-Link|JP|AX1800-D):1.0 \
+		EAP610-Outdoor(TP-Link|CA|AX1800-D):1.0
+endef
+TARGET_DEVICES += tplink_eap610-outdoor
+
 define Device/yuncore_fap650
 	$(call Device/FitImage)
 	$(call Device/UbiFit)
diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
index ecc9e57117..44c0ba7049 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
+++ b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network
@@ -23,6 +23,9 @@ ipq60xx_setup_interfaces()
 	qihoo,360v6)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
 		;;
+	tplink,eap610-outdoor)
+		ucidef_set_interface_lan "lan" "dhcp"
+		;;
 	linksys,mr7350|\
 	yuncore,fap650)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
@@ -51,6 +54,10 @@ ipq60xx_setup_macs()
 		wan_mac=$(macaddr_add "$lan_mac" 1)
 		label_mac=$lan_mac
 		;;
+	tplink,eap610-outdoor)
+		label_mac=$(get_mac_binary /tmp/factory_data/default-mac 0)
+		lan_mac=$label_mac
+		;;
 	esac
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
index 3380cc8653..cf3e400586 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+++ b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
@@ -32,6 +32,13 @@ case "$FIRMWARE" in
 		ath11k_patch_mac $(macaddr_add $label_mac 2) 1
 		ath11k_set_macflag
 		;;
+	tplink,eap610-outdoor)
+		caldata_from_file "/tmp/factory_data/radio" 0 0x10000
+		label_mac=$(get_mac_binary /tmp/factory_data/default-mac 0)
+		ath11k_patch_mac $label_mac 1
+		ath11k_patch_mac $(macaddr_add $label_mac 1) 0
+		ath11k_set_macflag
+		;;
 	yuncore,fap650)
 		caldata_extract "0:art" 0x1000 0x20000
 		;;
diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/09_mount_factory_data b/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/09_mount_factory_data
new file mode 100644
index 0000000000..97608db55d
--- /dev/null
+++ b/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/09_mount_factory_data
@@ -0,0 +1,19 @@
+#!/bin/sh
+
+preinit_mount_factory_data() {
+	local mtd_path
+
+	. /lib/functions.sh
+	. /lib/functions/system.sh
+
+	case $(board_name) in
+	tplink,eap610-outdoor)
+		mtd_path=$(find_mtd_chardev "factory_data")
+		ubiattach --dev-path="$mtd_path" --devn=1
+		mkdir /tmp/factory_data
+		mount -o ro,noatime -t ubifs ubi1:ubi_factory_data /tmp/factory_data
+		;;
+	esac
+}
+
+boot_hook_add preinit_main preinit_mount_factory_data
diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
index 411570715c..f9d446ff1f 100644
--- a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh
@@ -4,6 +4,79 @@ REQUIRE_IMAGE_METADATA=1
 RAMFS_COPY_BIN='fw_printenv fw_setenv head'
 RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
 
+remove_oem_ubi_volume() {
+	local oem_volume_name="$1"
+	local oem_ubivol
+	local mtdnum
+	local ubidev
+
+	mtdnum=$(find_mtd_index "$CI_UBIPART")
+	if [ ! "$mtdnum" ]; then
+		return
+	fi
+
+	ubidev=$(nand_find_ubi "$CI_UBIPART")
+	if [ ! "$ubidev" ]; then
+		ubiattach --mtdn="$mtdnum"
+		ubidev=$(nand_find_ubi "$CI_UBIPART")
+	fi
+
+	if [ "$ubidev" ]; then
+		oem_ubivol=$(nand_find_volume "$ubidev" "$oem_volume_name")
+		[ "$oem_ubivol" ] && ubirmvol "/dev/$ubidev" --name="$oem_volume_name"
+	fi
+}
+
+tplink_get_boot_part() {
+	local cur_boot_part
+	local args
+
+	# Try to find rootfs from kernel arguments
+	read -r args < /proc/cmdline
+	for arg in $args; do
+		local ubi_mtd_arg=${arg#ubi.mtd=}
+		case "$ubi_mtd_arg" in
+		rootfs|rootfs_1)
+			echo "$ubi_mtd_arg"
+			return
+		;;
+		esac
+	done
+
+	# Fallback to u-boot env (e.g. when running initramfs)
+	cur_boot_part="$(/usr/sbin/fw_printenv -n tp_boot_idx)"
+	case $cur_boot_part in
+	1)
+		echo rootfs_1
+		;;
+	0|*)
+		echo rootfs
+		;;
+	esac
+}
+
+tplink_do_upgrade() {
+	local new_boot_part
+
+	case $(tplink_get_boot_part) in
+	rootfs)
+		CI_UBIPART="rootfs_1"
+		new_boot_part=1
+	;;
+	rootfs_1)
+		CI_UBIPART="rootfs"
+		new_boot_part=0
+	;;
+	esac
+
+	fw_setenv -s - <<-EOF
+		tp_boot_idx $new_boot_part
+	EOF
+
+	remove_oem_ubi_volume ubi_rootfs
+	nand_do_upgrade "$1"
+}
+
 platform_check_image() {
 	return 0;
 }
@@ -55,6 +128,9 @@ platform_do_upgrade() {
 	qihoo,360v6)
 		nand_do_upgrade "$1"
 		;;
+	tplink,eap610-outdoor)
+		tplink_do_upgrade "$1"
+		;;
 	yuncore,fap650)
 		[ "$(fw_printenv -n owrt_env_ver 2>/dev/null)" != "7" ] && yuncore_fap650_env_setup
 		local active="$(fw_printenv -n owrt_slotactive 2>/dev/null)"



From lede-commits at lists.infradead.org  Sun Jan 12 08:09:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:09:25 -0500
Subject: [openwrt/openwrt]  mediatek: filogic: Add support for cudy wr3000h
In-Reply-To: <173669816579.878569.3525878895701515659@git-01.infra.openwrt.org>
References: <173669816579.878569.3525878895701515659@git-01.infra.openwrt.org>
Message-ID: <mailman.37581.1736698175.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9d66b8b312fb6a4087244ee3ee10e1ba1623df81

commit 9d66b8b312fb6a4087244ee3ee10e1ba1623df81
Author: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
AuthorDate: Sat Dec 7 14:20:31 2024 +0100

    mediatek: filogic: Add support for cudy wr3000h
    
    The manufacturer Cudy usually releases signed openwrt firmware, to
    facilitate the migration from the proprietary version to the official
    versions of openwrt. In contact with the manufacturer tells me that only
    releases the firmware of the WR3000H if and only if
    there is an official version. With this proposal I pretend to have an
    initial operative version so that they do their part, and facilitate to
    the users the possibility of using openwrt. In the present state, it is
    only possible to use this firmware by uploading and installing it with
    UART connection.
    
    AX3000 2.5G Dual Band Wi-Fi 6 Mesh Router (WR3000H)
    
    Hardware
    --------
    MediaTek MT7981 WiSoC
    256MB DDR3 RAM
    128MB SPI-NAND (XMC XM25QH128C)
    MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
    4 LAN MediaTek MT7531 PHY
    1 WAN RTL8221B-VB-CG 2.5Gbps PHY (C22)
    2 Radios MT7976CN
    UART: 115200 8N1 3.3V
    
    MAC:
    LAN MAC: label mac
    WAN MAC: label mac + 1
    2.4G MAC: label mac
    5G MAC: label mac + 1 with LA bit set
    
    Installation
    ------------
    
    1. Connect to the serial port as described in the "Hardware" section.
    
    2. Power on the device + press reset pin. Keep pressing reset pin to
       enter the U-Boot shell (The recovery.bin image load process must fail).
    
    3. Download the OpenWrt initramfs image. Place it on an TFTP server
       connected to the Cudy LAN ports. Make sure the server is reachable at
       192.168.1.88. Rename the image to "cudy3000h.bin"
    
    4. Download and boot the OpenWrt initramfs image.
    
       $ tftpboot 0x46000000 cudy3000h.bin; bootm 0x46000000
    
    5. IMPORTANT: Make backup from original firmware. System -> Backup
       /Flash Firmware -> Save mtdblock contents. All mtdblock one by one,
    keep unaltered (BL2, u-boot-env, Factory, bdinfo, FIP, and ubi).
    
    6. Transfer the OpenWrt sysupgrade image to the device using scp.
       Install with sysupgrade.
    
    Warning for BL2 and U-BOOT developers
    -------------------------------------
    The nand partition layout from vendor is slightly diferent from "standard".
    The FIP partition starts at 0x3c0000 be carefull with BL2 to BL31.
    The UBI partition start at 0x5c0000 be carefull.
    DO NOT OVERWRITE bdinfo partition it contains hardware MAC definition
    Layout is start-end (not start size)
      - 0x000000000000-0x000007800000 : "nmbm0"
              - 0x000000000000-0x000000100000 : "bl2"
              - 0x000000100000-0x000000180000 : "u-boot-env"
              - 0x000000180000-0x000000380000 : "factory"
              - 0x000000380000-0x0000003c0000 : "bdinfo"
              - 0x0000003c0000-0x0000005c0000 : "fip"
              - 0x0000005c0000-0x0000045c0000 : "ubi"
    ALLWAYS for U-BOOT operations check this
    setenv mtdids nmbm0=nmbm0
    setenv mtdparts nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),256k(bdinfo),2048k(fip),65536k(ubi)
    
    Signed-off-by: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17458
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts | 337 +++++++++++++++++++++
 .../filogic/base-files/etc/board.d/01_leds         |   8 +
 .../etc/hotplug.d/ieee80211/11_fix_wifi_mac        |   1 +
 .../filogic/base-files/lib/upgrade/platform.sh     |   4 +
 target/linux/mediatek/image/filogic.mk             |  17 ++
 5 files changed, 367 insertions(+)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
new file mode 100644
index 0000000000..0808eb9557
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
@@ -0,0 +1,337 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "mt7981.dtsi"
+
+/ {
+	model = "Cudy WR3000H v1";
+	compatible = "cudy,wr3000h-v1", "mediatek,mt7981-spim-snand-rfb";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		phyreset {
+			gpio-export,name = "phyreset";
+			gpio-export,output = <1>;
+			gpios = <&pio 3 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status: led at 0 {
+			function = LED_FUNCTION_STATUS;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 5 GPIO_ACTIVE_LOW>;
+		};
+
+
+		led_internet {
+			function = LED_FUNCTION_WAN_ONLINE;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wps {
+			function = LED_FUNCTION_WPS;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wlan2g {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led_wlan5g {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led_lan1 {
+			function = LED_FUNCTION_LAN;
+			function-enumerator = <1>;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_lan2 {
+			function = LED_FUNCTION_LAN;
+			function-enumerator = <2>;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+		};
+
+		led_lan3 {
+			function = LED_FUNCTION_LAN;
+			function-enumerator = <3>;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+		};
+
+		led_lan4 {
+			function = LED_FUNCTION_LAN;
+			function-enumerator = <4>;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wan {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+
+	status = "okay";
+
+	gmac0: mac at 0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+		nvmem-cell-names = "mac-address";
+		nvmem-cells = <&macaddr_bdinfo_de00 0>;
+		label = "lan";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	gmac1: mac at 1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "2500base-x";
+		phy-handle = <&phy6>;
+		nvmem-cell-names = "mac-address";
+		nvmem-cells = <&macaddr_bdinfo_de00 1>;
+		label = "wan";
+	};
+
+};
+
+&mdio_bus {
+	switch: switch at 1f {
+		compatible = "mediatek,mt7531";
+		reg = <31>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		interrupt-parent = <&pio>;
+		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+	};
+	phy6: ethernet-phy at 6 {
+		compatible = "ethernet-phy-ieee802.3-c22"; // [RTL8221B-VB-CG 2.5Gbps PHY (C22)]
+		reg = <6>;
+		phy-mode = "2500base-x";
+	};
+
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "okay";
+
+	spi_nand: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		reg = <0>;
+		spi-max-frequency = <52000000>;
+
+		spi-cal-enable;
+		spi-cal-mode = "read-data";
+		spi-cal-datalen = <7>;
+		spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+		spi-cal-addrlen = <5>;
+		spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "BL2";
+				reg = <0x00000 0x0100000>;
+				read-only;
+			};
+
+			partition at 100000 {
+				label = "u-boot-env";
+				reg = <0x0100000 0x0080000>;
+				read-only;
+			};
+
+			factory: partition at 180000 {
+				label = "Factory";
+				reg = <0x180000 0x0200000>;
+				read-only;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom at 0 {
+						reg = <0x0 0x1000>;
+					};
+				};
+			};
+
+			partition at 380000 {
+				label = "bdinfo";
+				reg = <0x380000 0x0040000>;
+				read-only;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_bdinfo_de00: macaddr at de00 {
+						compatible = "mac-base";
+						reg = <0xde00 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+
+			partition at 3C0000 {
+				label = "FIP";
+				reg = <0x3C0000 0x0200000>;
+				read-only;
+			};
+
+			partition at 580000 {
+				label = "ubi";
+				reg = <0x5C0000 0x4000000>;
+				compatible = "linux,ubi";
+			};
+		};
+	};
+};
+
+&pio {
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+		conf-pu {
+			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+		};
+
+		conf-pd {
+			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+			drive-strength = <MTK_DRIVE_8mA>;
+			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+		};
+	};
+};
+
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port at 0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port at 1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port at 2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port at 3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port at 6 {
+			reg = <6>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+			phy-mode = "2500base-x";
+
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+	};
+};
+
+&wifi {
+	status = "okay";
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index ca4961c655..a6bb9b0ca8 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -38,6 +38,14 @@ cudy,re3000-v1)
 cudy,wr3000-v1)
 	ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan"
 	;;
+cudy,wr3000h-v1)
+	ucidef_set_led_netdev "lan1" "lan1" "white:lan-1" "lan1" "link tx rx"
+	ucidef_set_led_netdev "lan2" "lan2" "white:lan-2" "lan2" "link tx rx"
+	ucidef_set_led_netdev "lan3" "lan3" "white:lan-3" "lan3" "link tx rx"
+	ucidef_set_led_netdev "lan4" "lan4" "white:lan-4" "lan4" "link tx rx"
+	ucidef_set_led_netdev "wan" "wan" "white:wan" "wan" "link tx rx"
+	ucidef_set_led_netdev "internet" "internet" "white:wan-online" "wan" "link"
+	;;
 glinet,gl-x3000|\
 glinet,gl-xe3000)
 	ucidef_set_led_default "power" "POWER" "green:power" "1"
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index 3188fe71d5..4ae2c70658 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -79,6 +79,7 @@ case "$board" in
 	cudy,re3000-v1|\
 	cudy,tr3000-v1|\
 	cudy,wr3000s-v1|\
+	cudy,wr3000h-v1|\
 	cudy,wr3000-v1)
 		addr=$(mtd_get_mac_binary bdinfo 0xde00)
 		# Originally, phy0 is phy1 mac with LA bit set. However, this would conflict
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 7556be52bd..1d89640a4e 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -118,6 +118,10 @@ platform_do_upgrade() {
 		CI_KERNPART="linux"
 		nand_do_upgrade "$1"
 		;;
+	cudy,wr3000h-v1)
+		CI_UBIPART="ubi"
+		nand_do_upgrade "$1"
+		;;
 	cudy,re3000-v1|\
 	cudy,wr3000-v1|\
 	yuncore,ax835)
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 22c9151ff3..afa5224b19 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -705,6 +705,23 @@ define Device/cudy_wr3000s-v1
 endef
 TARGET_DEVICES += cudy_wr3000s-v1
 
+define Device/cudy_wr3000h-v1
+  DEVICE_VENDOR := Cudy
+  DEVICE_MODEL := WR3000H
+  DEVICE_VARIANT := v1
+  DEVICE_DTS := mt7981b-cudy-wr3000h-v1
+  DEVICE_DTS_DIR := ../dts
+  SUPPORTED_DEVICES += R59
+  UBINIZE_OPTS := -E 5
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE_SIZE := 65536k
+  KERNEL_IN_UBI := 1
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+  DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
+endef
+TARGET_DEVICES += cudy_wr3000h-v1
+
 define Device/dlink_aquila-pro-ai-m30-a1
   DEVICE_VENDOR := D-Link
   DEVICE_MODEL := AQUILA PRO AI M30



From lede-commits at lists.infradead.org  Sun Jan 12 08:33:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:33:06 -0500
Subject: [openwrt/openwrt]  realtek: switch RTL8231 driver for HPE 1920-16/24G
In-Reply-To: <173669958562.903403.16567452338053328113@git-01.infra.openwrt.org>
References: <173669958562.903403.16567452338053328113@git-01.infra.openwrt.org>
Message-ID: <mailman.37584.1736699589.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/96850585e52dfff2c25d8b20b0b5cd192981ed4d

commit 96850585e52dfff2c25d8b20b0b5cd192981ed4d
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Tue Jan 7 14:59:20 2025 +0100

    realtek: switch RTL8231 driver for HPE 1920-16/24G
    
    Update the base DTS file for the 16 and 24 port HPE 1920 devices
    (JG923A, JG924A, JG925A, JG926A), causing the new RTL8231 MFD driver to
    be loaded at start-up.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8382_hpe_1920.dtsi | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
index af168067d4..20d8693a3b 100644
--- a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi
@@ -4,12 +4,6 @@
 #include "rtl83xx_hpe_1920.dtsi"
 
 / {
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
-	};
 
 	i2c0: i2c-gpio-0 {
 		compatible = "i2c-gpio";
@@ -84,6 +78,24 @@
 	};
 };
 
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
+
 &ethernet0 {
 	mdio: mdio-bus {
 		compatible = "realtek,rtl838x-mdio";



From lede-commits at lists.infradead.org  Sun Jan 12 08:33:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:33:05 -0500
Subject: [openwrt/openwrt]  realtek: switch RTL8231 driver for HPE 1920-8G
In-Reply-To: <173669958562.903403.16567452338053328113@git-01.infra.openwrt.org>
References: <173669958562.903403.16567452338053328113@git-01.infra.openwrt.org>
Message-ID: <mailman.37585.1736699590.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e5d1a501cbd0fdda47d9169e9f669c7fb4813f2a

commit e5d1a501cbd0fdda47d9169e9f669c7fb4813f2a
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Tue Jan 7 14:55:24 2025 +0100

    realtek: switch RTL8231 driver for HPE 1920-8G
    
    Update the base DTS file for the 8 port HPE 1920 devices (JG920A,
    JG921A, JG922A), causing the new RTL8231 MFD driver to be loaded at
    start-up.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi | 25 ++++++++++++++++-------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
index 262dd83d21..ddd46c4cf6 100644
--- a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
+++ b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi
@@ -4,13 +4,6 @@
 #include "rtl83xx_hpe_1920.dtsi"
 
 / {
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
-	};
-
 	i2c0: i2c-gpio-0 {
 		compatible = "i2c-gpio";
 		sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -46,6 +39,24 @@
 	};
 };
 
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
+
 &ethernet0 {
 	mdio: mdio-bus {
 		compatible = "realtek,rtl838x-mdio";



From lede-commits at lists.infradead.org  Sun Jan 12 08:48:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:48:35 -0500
Subject: [openwrt/openwrt]  ramips: mt76x8: fixs for Keenetic Air (KN-1613)
 and Extra (KN-1713)
In-Reply-To: <173670051555.922434.292493444725574388@git-01.infra.openwrt.org>
References: <173670051555.922434.292493444725574388@git-01.infra.openwrt.org>
Message-ID: <mailman.37588.1736700529.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/191ed4e803bbd82e9023d73ed9ff3c1d5ea64892

commit 191ed4e803bbd82e9023d73ed9ff3c1d5ea64892
Author: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
AuthorDate: Wed Jan 8 01:14:10 2025 +0500

    ramips: mt76x8: fixs for Keenetic Air (KN-1613) and Extra (KN-1713)
    
    A new syntax for LEDs was used, and migration of the LEDs configuration was
    added. Used lower case hex characters for the addresses. Fixed a USB port
    power issue.
    
    Signed-off-by: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
    Link: https://github.com/openwrt/openwrt/pull/17521
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/ramips/dts/mt7628an_keenetic_kn-1613.dts |  9 ++++--
 .../linux/ramips/dts/mt7628an_keenetic_kn-1713.dts | 32 ++++++++++++----------
 .../mt76x8/base-files/etc/board.d/04_led_migration | 16 +++++++++++
 3 files changed, 39 insertions(+), 18 deletions(-)

diff --git a/target/linux/ramips/dts/mt7628an_keenetic_kn-1613.dts b/target/linux/ramips/dts/mt7628an_keenetic_kn-1613.dts
index 4b124c9295..af6292980b 100644
--- a/target/linux/ramips/dts/mt7628an_keenetic_kn-1613.dts
+++ b/target/linux/ramips/dts/mt7628an_keenetic_kn-1613.dts
@@ -30,18 +30,21 @@
 		};
 
 		internet {
-			label = "green:internet";
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 		};
 
 		wifi2 {
-			label = "green:wifi2";
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
 		wifi5 {
-			label = "green:wifi5";
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
diff --git a/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts b/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts
index 972c88eadd..84127a88e0 100644
--- a/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts
+++ b/target/linux/ramips/dts/mt7628an_keenetic_kn-1713.dts
@@ -27,6 +27,7 @@
 		regulator-max-microvolt = <5000000>;
 		gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
+		regulator-always-on;
 	};
 
 	leds {
@@ -44,17 +45,18 @@
 			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 		};
 
-		fn {
-			function = LED_FUNCTION_USB;
+		wifi2 {
+			function = LED_FUNCTION_WLAN_2GHZ;
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
 		};
 
-		wifi {
-			function = LED_FUNCTION_WLAN;
+		wifi5 {
+			function = LED_FUNCTION_WLAN_5GHZ;
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt","phy1tpt";
+			linux,default-trigger = "phy1tpt";
 		};
 	};
 
@@ -93,7 +95,7 @@
 			partition at 0 {
 				compatible = "denx,uimage";
 				label = "firmware";
-				reg = <0x0 0x1CC0000>;
+				reg = <0x0 0x1cc0000>;
 			};
 		};
 	};
@@ -160,21 +162,21 @@
 				reg = <0x50000 0xe60000>;
 			};
 
-			partition at EB0000 {
+			partition at eb0000 {
 				label = "config_1";
-				reg = <0xEB0000 0x40000>;
+				reg = <0xeb0000 0x40000>;
 				read-only;
 			};
 
-			partition at EF0000 {
+			partition at ef0000 {
 				label = "storage";
-				reg = <0xEF0000 0x100000>;
+				reg = <0xef0000 0x100000>;
 				read-only;
 			};
 
-			partition at FF0000 {
+			partition at ff0000 {
 				label = "dump";
-				reg = <0xFF0000 0x10000>;
+				reg = <0xff0000 0x10000>;
 				read-only;
 			};
 
@@ -198,12 +200,12 @@
 
 			firmware2: partition at 1050000 {
 				label = "firmware_2";
-				reg = <0x1050000 0xE60000>;
+				reg = <0x1050000 0xe60000>;
 			};
 			
-			partition at 1EB0000 {
+			partition at 1eb0000 {
 				label = "Config_2";
-				reg = <0x1EB0000 0x40000>;
+				reg = <0x1eb0000 0x40000>;
 				read-only;
 			};
 		};
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/04_led_migration b/target/linux/ramips/mt76x8/base-files/etc/board.d/04_led_migration
new file mode 100644
index 0000000000..c845fadd73
--- /dev/null
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/04_led_migration
@@ -0,0 +1,16 @@
+. /lib/functions.sh
+. /lib/functions/migrations.sh
+
+board=$(board_name)
+
+case "$board" in
+keenetic,kn-1613)
+	migrate_leds 'green:internet=green:wan'
+	;;
+esac
+
+remove_devicename_leds
+
+migrations_apply system
+
+exit 0



From lede-commits at lists.infradead.org  Sun Jan 12 08:53:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:53:30 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: add alternative names for Plusnet
 Hub One and BT Business Hub 5A
In-Reply-To: <173670080987.927917.1942929913855575082@git-01.infra.openwrt.org>
References: <173670080987.927917.1942929913855575082@git-01.infra.openwrt.org>
Message-ID: <mailman.37597.1736700867.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/1b045a7c13aeb141e0c069aaf5fc38989eee11cf

commit 1b045a7c13aeb141e0c069aaf5fc38989eee11cf
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 17:10:42 2025 +0100

    lantiq: xrx200: add alternative names for Plusnet Hub One and BT Business Hub 5A
    
    The Plusnet Hub One and BT Business Hub 5A have the same hardware as
    the BT Home Hub 5A. This commit adds alternative names so that both
    devices can be easily found in the firmware selector.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17583
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/lantiq/image/vr9.mk | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/linux/lantiq/image/vr9.mk b/target/linux/lantiq/image/vr9.mk
index 48a372f476..05999e408d 100644
--- a/target/linux/lantiq/image/vr9.mk
+++ b/target/linux/lantiq/image/vr9.mk
@@ -292,6 +292,11 @@ define Device/bt_homehub-v5a
   DEVICE_VENDOR := British Telecom (BT)
   DEVICE_MODEL := Home Hub 5
   DEVICE_VARIANT := Type A
+  DEVICE_ALT0_VENDOR := British Telecom (BT)
+  DEVICE_ALT0_MODEL := Business Hub 5
+  DEVICE_ALT0_VARIANT := Type A
+  DEVICE_ALT1_VENDOR := Plusnet
+  DEVICE_ALT1_MODEL := Hub One
   BOARD_NAME := BTHOMEHUBV5A
   DEVICE_PACKAGES := kmod-ath9k kmod-owl-loader \
 	kmod-ath10k-ct ath10k-firmware-qca988x-ct wpad-basic-mbedtls kmod-usb-dwc2



From lede-commits at lists.infradead.org  Sun Jan 12 08:53:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:53:29 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200_legacy: add alternative names for
 TP-Link TD-W9980(B)
In-Reply-To: <173670080987.927917.1942929913855575082@git-01.infra.openwrt.org>
References: <173670080987.927917.1942929913855575082@git-01.infra.openwrt.org>
Message-ID: <mailman.37598.1736700867.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b2b4ce15322c75bda0cae6fb2160a74270185831

commit b2b4ce15322c75bda0cae6fb2160a74270185831
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 17:04:33 2025 +0100

    lantiq: xrx200_legacy: add alternative names for TP-Link TD-W9980(B)
    
    The TP-Link TD-W9980(B) shares the same hardware with the TP-Link TD-W8980.
    The only difference is that the TD-W8980 does not support VDSL. This is a
    software limitation and once the software is changed, both work equally
    supporting VDSL. This commit adds alternative names for devices so they
    can be easily found in the firmware selector.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17583
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/lantiq/image/tp-link_legacy.mk | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/linux/lantiq/image/tp-link_legacy.mk b/target/linux/lantiq/image/tp-link_legacy.mk
index d9bcd35d10..19a81bd827 100644
--- a/target/linux/lantiq/image/tp-link_legacy.mk
+++ b/target/linux/lantiq/image/tp-link_legacy.mk
@@ -36,6 +36,12 @@ define Device/tplink_tdw8980
   $(Device/lantiqTpLink)
   DEVICE_MODEL := TD-W8980
   DEVICE_VARIANT := v1
+  DEVICE_ALT0_VENDOR := TP-LINK
+  DEVICE_ALT0_MODEL := TD-W9980
+  DEVICE_ALT0_VARIANT := v1
+  DEVICE_ALT1_VENDOR := TP-LINK
+  DEVICE_ALT1_MODEL := TD-W9980B
+  DEVICE_ALT1_VARIANT := v1
   TPLINK_FLASHLAYOUT := 8Mltq
   TPLINK_HWID := 0x89800001
   TPLINK_HWREV := 14



From lede-commits at lists.infradead.org  Sun Jan 12 08:55:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:55:21 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200_legacy: disable unused phy drivers
In-Reply-To: <173670092069.929973.18088671399947781923@git-01.infra.openwrt.org>
References: <173670092069.929973.18088671399947781923@git-01.infra.openwrt.org>
Message-ID: <mailman.37601.1736700924.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/517b9c1cdcd357fd84c7f27bd2886f235f3ec946

commit 517b9c1cdcd357fd84c7f27bd2886f235f3ec946
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 16:37:47 2025 +0100

    lantiq: xrx200_legacy: disable unused phy drivers
    
    Subtarget xrx200_legacy supports only a few devices. They all use
    the integrated Lantiq GSWIP switch and lantiq xway PHYs. The atheros
    and icplus PHYs can be safely disabled.
    
    Switches used by individual devices are listed below.
    
    Device                          Switch                  PHY
    Alpha ASL56026                  Lantiq GSWIP            int. switch
    Arcadyan VG3503J                Lantiq GSWIP            int. switch
    Netgear DM200                   Lantiq GSWIP            int. switch
    TP-LINK TD-W8970                Lantiq GSWIP            Lantiq PEF7071V
    TP-Link TD-W8980                Lantiq GSWIP            Lantiq PEF7071V
    
    Reduces uncompressed kernel size by 16 kB.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17581
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/lantiq/xrx200_legacy/config-6.6 | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/target/linux/lantiq/xrx200_legacy/config-6.6 b/target/linux/lantiq/xrx200_legacy/config-6.6
index 166a2cde06..9bb65cff07 100644
--- a/target/linux/lantiq/xrx200_legacy/config-6.6
+++ b/target/linux/lantiq/xrx200_legacy/config-6.6
@@ -1,4 +1,3 @@
-CONFIG_AT803X_PHY=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
@@ -16,7 +15,6 @@ CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GRO_CELLS=y
 CONFIG_HWMON=y
 CONFIG_HW_RANDOM=y
-CONFIG_ICPLUS_PHY=y
 CONFIG_IFX_VPE_EXT=y
 CONFIG_INPUT=y
 CONFIG_INPUT_EVDEV=y
@@ -57,7 +55,6 @@ CONFIG_PHY_LANTIQ_VRX200_PCIE=y
 CONFIG_POWER_RESET_GPIO=y
 CONFIG_POWER_SUPPLY=y
 CONFIG_POWER_SUPPLY_HWMON=y
-CONFIG_QCOM_NET_PHYLIB=y
 CONFIG_QUEUED_RWLOCKS=y
 CONFIG_QUEUED_SPINLOCKS=y
 CONFIG_REGULATOR=y



From lede-commits at lists.infradead.org  Sun Jan 12 08:55:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 11:55:20 -0500
Subject: [openwrt/openwrt]  lantiq: xway_legacy: refresh config
In-Reply-To: <173670092069.929973.18088671399947781923@git-01.infra.openwrt.org>
References: <173670092069.929973.18088671399947781923@git-01.infra.openwrt.org>
Message-ID: <mailman.37602.1736700924.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/524e22b4c71366be86493ca3ee7a16ff92d52288

commit 524e22b4c71366be86493ca3ee7a16ff92d52288
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 16:34:46 2025 +0100

    lantiq: xway_legacy: refresh config
    
    This was done by executing these command:
    $ make kernel_oldconfig CONFIG_TARGET=subtarget
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17581
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/lantiq/xrx200_legacy/config-6.6 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/lantiq/xrx200_legacy/config-6.6 b/target/linux/lantiq/xrx200_legacy/config-6.6
index c8650c4e87..166a2cde06 100644
--- a/target/linux/lantiq/xrx200_legacy/config-6.6
+++ b/target/linux/lantiq/xrx200_legacy/config-6.6
@@ -7,7 +7,6 @@ CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_RMAP=y
 CONFIG_CRC16=y
 CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_LZO=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin"
@@ -47,6 +46,7 @@ CONFIG_NET_SWITCHDEV=y
 CONFIG_NLS=y
 CONFIG_NR_CPUS=2
 CONFIG_PADATA=y
+CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCIE_LANTIQ=y



From lede-commits at lists.infradead.org  Sun Jan 12 09:02:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 12:02:20 -0500
Subject: [openwrt/openwrt]  ath79: pineapple-nano: use regulator for USB GPIO
In-Reply-To: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
References: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
Message-ID: <mailman.37605.1736701344.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5aa996b06d77d7c0935071de6f2217f13be3f253

commit 5aa996b06d77d7c0935071de6f2217f13be3f253
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 23 13:28:25 2024 -0800

    ath79: pineapple-nano: use regulator for USB GPIO
    
    The chipidea USB2 driver used on this platform supports controlling GPIO
    through regulators. This is the upstream friendly solution.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17356
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/ath79/dts/ar9331_hak5_wifi-pineapple-nano.dts  | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/target/linux/ath79/dts/ar9331_hak5_wifi-pineapple-nano.dts b/target/linux/ath79/dts/ar9331_hak5_wifi-pineapple-nano.dts
index a2b6edbd5e..4a4f455acf 100644
--- a/target/linux/ath79/dts/ar9331_hak5_wifi-pineapple-nano.dts
+++ b/target/linux/ath79/dts/ar9331_hak5_wifi-pineapple-nano.dts
@@ -29,12 +29,6 @@
 			gpio-export,name = "usb-alarm";
 			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
 		};
-
-		usb-power {
-			gpio-export,name = "usb-power";
-			gpio-export,output = <0>;
-			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
-		};
 	};
 
 	keys {
@@ -57,6 +51,14 @@
 			linux,default-trigger = "phy0tpt";
 		};
 	};
+
+	reg_power_usb: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "power_usb";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &eth0 {
@@ -123,6 +125,8 @@
 
 &usb {
 	status = "okay";
+
+	vbus-supply = <&reg_power_usb>;
 };
 
 &usb_phy {



From lede-commits at lists.infradead.org  Sun Jan 12 09:02:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 12:02:21 -0500
Subject: [openwrt/openwrt]  ath79: gl-ar150: fix USB GPIO usage
In-Reply-To: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
References: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
Message-ID: <mailman.37606.1736701344.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/90e86a871319e481322959e301b2603c258092a9

commit 90e86a871319e481322959e301b2603c258092a9
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 23 13:20:49 2024 -0800

    ath79: gl-ar150: fix USB GPIO usage
    
    Currently, an OpenWrt hack is used to turn the GPIO on in terms of the
    PHY driver when it should be the USB driver that controls it. The
    chipidea USB2 driver has support for a vbus-supply property. Use it
    instead of the local OpenWrt solution that just turns on the GPIO.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17356
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9330_glinet_gl-ar150.dts | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/target/linux/ath79/dts/ar9330_glinet_gl-ar150.dts b/target/linux/ath79/dts/ar9330_glinet_gl-ar150.dts
index fe1d3186cf..8e38c9f5fb 100644
--- a/target/linux/ath79/dts/ar9330_glinet_gl-ar150.dts
+++ b/target/linux/ath79/dts/ar9330_glinet_gl-ar150.dts
@@ -62,16 +62,26 @@
 			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
+
+	reg_power_usb: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "power_usb";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
 &usb {
-	dr_mode = "host";
 	status = "okay";
+
+	dr_mode = "host";
+	vbus-supply = <&reg_power_usb>;
 };
 
 &usb_phy {
 	status = "okay";
-	gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
 };
 
 &spi {



From lede-commits at lists.infradead.org  Sun Jan 12 09:02:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 12:02:22 -0500
Subject: [openwrt/openwrt]  ath79: phy: remove named gpio exports
In-Reply-To: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
References: <173670133999.937865.4289835939386998914@git-01.infra.openwrt.org>
Message-ID: <mailman.37609.1736701347.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6c1ad2830e8bc5591db0bfed22873da5a670d08e

commit 6c1ad2830e8bc5591db0bfed22873da5a670d08e
Author: Rosen Penev <rosenp at gmail.com>
AuthorDate: Mon Dec 23 13:35:01 2024 -0800

    ath79: phy: remove named gpio exports
    
    The only real user of this patch was removed and migrated to the
    upstream friendly regulator. Remove this hack.
    
    Signed-off-by: Rosen Penev <rosenp at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17356
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../patches-6.6/700-phy-add-ath79-usb-phys.patch   | 23 ++--------------------
 1 file changed, 2 insertions(+), 21 deletions(-)

diff --git a/target/linux/ath79/patches-6.6/700-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-6.6/700-phy-add-ath79-usb-phys.patch
index b50e4b51a4..1c1b2f2ca1 100644
--- a/target/linux/ath79/patches-6.6/700-phy-add-ath79-usb-phys.patch
+++ b/target/linux/ath79/patches-6.6/700-phy-add-ath79-usb-phys.patch
@@ -51,7 +51,7 @@ Signed-off-by: John Crispin <john at phrozen.org>
  obj-$(CONFIG_PHY_LPC18XX_USB_OTG)	+= phy-lpc18xx-usb-otg.o
 --- /dev/null
 +++ b/drivers/phy/phy-ar7100-usb.c
-@@ -0,0 +1,127 @@
+@@ -0,0 +1,117 @@
 +/*
 + * Copyright (C) 2018 John Crispin <john at phrozen.org>
 + *
@@ -144,16 +144,6 @@ Signed-off-by: John Crispin <john at phrozen.org>
 +	if (IS_ERR(priv->phy))
 +		return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
 +
-+	priv->gpio = of_get_named_gpio(pdev->dev.of_node, "gpios", 0);
-+	if (gpio_is_valid(priv->gpio)) {
-+		int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
-+		if (ret)
-+			return dev_err_probe(&pdev->dev, ret, "failed to request gpio");
-+
-+		gpio_export_with_name(gpio_to_desc(priv->gpio), 0, dev_name(&pdev->dev));
-+		gpio_set_value(priv->gpio, 1);
-+	}
-+
 +	phy_set_drvdata(priv->phy, priv);
 +
 +	phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
@@ -181,7 +171,7 @@ Signed-off-by: John Crispin <john at phrozen.org>
 +MODULE_LICENSE("GPL");
 --- /dev/null
 +++ b/drivers/phy/phy-ar7200-usb.c
-@@ -0,0 +1,120 @@
+@@ -0,0 +1,111 @@
 +/*
 + * Copyright (C) 2015 Alban Bedel <albeu at free.fr>
 + *
@@ -268,15 +258,6 @@ Signed-off-by: John Crispin <john at phrozen.org>
 +	if (IS_ERR(priv->phy))
 +		return dev_err_probe(&pdev->dev, PTR_ERR(priv->phy), "failed to create PHY");
 +
-+	priv->gpio = of_get_named_gpio(pdev->dev.of_node, "gpios", 0);
-+	if (gpio_is_valid(priv->gpio)) {
-+		int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
-+		if (ret)
-+			return dev_err_probe(&pdev->dev, ret, "failed to request gpio");
-+		gpio_export_with_name(gpio_to_desc(priv->gpio), 0, dev_name(&pdev->dev));
-+		gpio_set_value(priv->gpio, 1);
-+	}
-+
 +	phy_set_drvdata(priv->phy, priv);
 +
 +	phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);



From lede-commits at lists.infradead.org  Sun Jan 12 10:53:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 13:53:14 -0500
Subject: [openwrt/openwrt]  mvebu: Add support for WD Cloud Mirror Gen2
In-Reply-To: <173670799469.1087920.8163516011100213921@git-01.infra.openwrt.org>
References: <173670799469.1087920.8163516011100213921@git-01.infra.openwrt.org>
Message-ID: <mailman.37682.1736707998.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8fb805aa1f25b69b7849c8b1ce787ed47b16d123

commit 8fb805aa1f25b69b7849c8b1ce787ed47b16d123
Author: Robert Senderek <robert.senderek at 10g.pl>
AuthorDate: Fri Nov 22 00:05:39 2024 +0100

    mvebu: Add support for WD Cloud Mirror Gen2
    
    Hardware
    --------
    Marvell Armada 385 (MV88F6820)
    512B RAM
    256MB NAND (Hynix H27U2G8F2CTR)
    1x 1Gbit
    2x USB 3.0
    2x SATA-III
    UART: 115200 8N1 3.3V
    RTC
    Weltrend MCU WT6703F connected via UART1 for Power LED / PWM Fan / hw reset / WoL
    
    Installation
    ------------
    Connect UART 3.3V adapter to JP2  pins: 1-RX / 2-GND / 5-TX
    
    Use USB2.0 FAT32 pendrive with openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin
     1. stop boot by pressing 1
     2. usb start
     3. fatload usb 0:1  0x02000000 openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin;bootm 0x02000000 -
     4. do backup mtd1 mtd3
     5. use sysupgrade
    
    Or tftp
     1. stop boot by pressing 1
     2. setenv ethact egiga2;setenv serverip 192.168.11.114;setenv ipaddr 192.168.11.113
     3. tftpboot 0x02000000 openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin; bootm 0x02000000 -
     4. do backup mtd1 mtd3
     5. use sysupgrade
    
    or Evgeny Kolesnikov <evgenyz at gmail.com> method from his failed PR 2040
    
    - Using original firmware's network settings obtain SSH access to the device.
    - Put *-image-cfs-factory.bin and *-uImage-factory.bin images into device's /tmp directory.
    - Write kernel (uImage) image 'flash_eraseall /dev/mtd1 && nandwrite --markbad -p /dev/mtd1 /tmp/*-uImage-factory.bin'.
    - Write rootfs (image-cfs) image 'ubiformat /dev/mtd3 -f /tmp/*-image.cfs-factory.bin -y'.
    - Reboot the device.
    
    Installation (upgrade):
    
    Use *-sysupgrade.bin in a usual way.
    Weltrend MCU control is done via uart1 19200
    
    stty -F /dev/ttyS1 raw speed 19200
    stty -F /dev/ttyS1 raw speed 19200
    
    PWM Fan Control
    off: 00
    echo -n -e '\xfa\x02\x00\x00\x00\x00\xfb' > /dev/ttyS1
    slow: 5F
    echo -n -e '\xfa\x02\x00\x5f\x00\x00\xfb' > /dev/ttyS1
    max: FF
    echo -n -e '\xfa\x02\x00\xff\x00\x00\xfb' > /dev/ttyS1
    
    Power LED Control
    Blue
    echo -n -e '\xfa\x26\x00\x11\x00\x01\xfb' > /dev/ttyS1
    Red
    echo -n -e '\xfa\x26\x00\x14\x00\x01\xfb' > /dev/ttyS1
    Orange
    echo -n -e '\xfa\x26\x00\x12\x00\x01\xfb' > /dev/ttyS1
    
    more here: https://github.com/c-MM/mcm-daemon/blob/master/mcm.h
    
    Signed-off-by: Robert Senderek <robert.senderek at 10g.pl>
    Link: https://github.com/openwrt/openwrt/pull/17046
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../cortexa9/base-files/etc/board.d/02_network     |   9 +-
 .../cortexa9/base-files/lib/upgrade/platform.sh    |   3 +-
 .../marvell/armada-385-wd_cloud-mirror-gen2.dts    | 368 +++++++++++++++++++++
 target/linux/mvebu/image/cortexa9.mk               |  17 +
 4 files changed, 395 insertions(+), 2 deletions(-)

diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
index 680af1ce67..8cf1c0e426 100644
--- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
@@ -13,7 +13,8 @@ mvebu_setup_interfaces()
 
 	case "$board" in
 	ctera,c200-v2|\
-	synology,ds213j)
+	synology,ds213j|\
+	wd,cloud-mirror-gen2)
 		ucidef_set_interface_lan "eth0" "dhcp"
 		;;
 	cznic,turris-omnia)
@@ -94,6 +95,12 @@ mvebu_setup_macs()
 		lan_mac=$label_mac
 		wan_mac=$label_mac
 		;;
+	wd,cloud-mirror-gen2)
+		# mac address is on ubi "config" or ubi "reserve2" in text file.
+		# ubi "reserve2" /dev/mtd7 is twice small and only contains basic OEM factory info
+		label_mac=$(macaddr_canonicalize $(strings /dev/mtd7|grep -E '([0-9A-F]{2}[:])'))
+		lan_mac=$label_mac
+		;;
 	esac
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
index 70678622d3..13d8e77c93 100755
--- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
@@ -31,7 +31,8 @@ platform_do_upgrade() {
 		CI_ROOT_UBIPART=ubi
 		nand_do_upgrade "$1"
 		;;
-	buffalo,ls421de)
+	buffalo,ls421de|\
+	wd,cloud-mirror-gen2)
 		nand_do_upgrade "$1"
 		;;
 	ctera,c200-v2)
diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
new file mode 100644
index 0000000000..50936e72ad
--- /dev/null
+++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Western Digital My Cloud Mirror Gen 2
+ * (BWVZ/Grand Teton)
+ *
+ * Copyright (C) 2020
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov <evgenyz at gmail.com>
+ * Copyright (C) 2016 Martin Mueller <mm at sig21.net>
+ * Copyright (C) 2013 Gregory CLEMENT <gregory.clement at free-electrons.com>
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include "armada-385.dtsi"
+
+/ {
+	model = "WD MyCloud Mirror Gen 2 (BWVZ/Grand Teton)";
+	compatible = "wd,cloud-mirror-gen2", "marvell,armada385", "marvell,armada380";
+
+	aliases {
+		led-boot = &led_boot;
+		led-failsafe = &led_boot;
+		led-upgrade = &led_boot;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		append-rootblock = "nullparameter="; /* override the bootloader args */
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+		          MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+		          MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+		          MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+		          MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+
+		internal-regs {
+			timer at c200 {
+				status = "okay";
+			};
+
+			i2c0: i2c at 11000 {
+				status = "okay";
+				clock-frequency = <100000>;
+			};
+
+			i2c1: i2c at 11100 {
+				status = "okay";
+				clock-frequency = <100000>;
+			};
+
+			serial at 12000 {
+				status = "okay";
+			};
+
+			/* Connected to Welltrend 6703F-OG240WT MCU
+			 * which controls power, fan and other things
+			 */
+			serial at 12100 {
+				status = "okay";
+			};
+
+			pinctrl at 18000 {
+				/* use only one pin for UART1, as mpp20 is used by sata0 */
+				uart1_pins: uart-pins-1 {
+					marvell,pins = "mpp19";
+					marvell,function = "ua1";
+				};
+
+				xhci0_vbus_pins: xhci0-vbus-pins {
+					marvell,pins = "mpp26";
+					marvell,function = "gpio";
+				};
+
+				xhci1_vbus_pins: xhci1-vbus-pins {
+					marvell,pins = "mpp27";
+					marvell,function = "gpio";
+				};
+
+				sata0_pins: sata-pins-0 {
+					marvell,pins = "mpp55";
+					marvell,function = "sata0";
+				};
+
+				sata1_pins: sata-pins-1 {
+					marvell,pins = "mpp56";
+					marvell,function = "sata1";
+				};
+
+				sata_leds: sata-leds {
+					marvell,pins = "mpp43", "mpp52", "mpp53", "mpp54";
+					marvell,function = "gpio";
+				};
+
+				btn_pins: btn-pins {
+					marvell,pins = "mpp50";
+					marvell,function = "gpio";
+				};
+			};
+
+			usb at 58000 {
+				status = "okay";
+			};
+
+			phy: mdio at 72004 {
+				phy0: ethernet-phy at 0 {
+					/* Init ETH LEDs */
+					marvell,reg-init = <3 16 0 0x101e>;
+					reg = <0>;
+				};
+			};
+
+			sata at a8000 {
+				status = "okay";
+			};
+
+			nand-controller at d0000 {
+				status = "okay";
+
+				nand: nand at 0 {
+					reg = <0>;
+					label = "pxa3xx_nand-0";
+					nand-rb = <0>;
+					marvell,nand-keep-config;
+					#marvell,nand-enable-arbiter; //optional
+					nand-on-flash-bbt;
+					nand-ecc-strength = <4>;
+					nand-ecc-step-size = <512>;
+
+					partitions {
+						compatible = "fixed-partitions";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						partition at 00000000 {
+							label = "U-Boot";
+							reg = <0x00000000 0x00500000>;    /*   5 MB */
+							read-only;
+						};
+
+						partition at 00500000 {
+							label = "kernel";
+							reg = <0x00500000 0x00500000>;    /*   5 MB */
+						};
+
+						partition at 00a00000 {
+							label = "uRamdisk";
+							reg = <0x00a00000 0x00500000>;    /*   5 MB */
+							read-only;
+						};
+
+						partition at 00f00000 {
+							label = "ubi";
+							reg = <0x00f00000 0x0b900000>;    /* 185 MB */
+						};
+
+						partition at c800000 {
+							label = "rescue fw";
+							reg = <0x0c800000 0x00f00000>;    /*  15 MB */
+							read-only;
+						};
+
+						partition at d70000 {
+							label = "config";
+							reg = <0x0d700000 0x01400000>;    /*  20 MB */
+							read-only;
+						};
+
+						partition at eb00000 {
+							label = "reserve1";
+							reg = <0x0eb00000 0x00a00000>;    /*  10 MB */
+							read-only;
+						};
+
+						partition at f500000 {
+							label = "reserve2";
+							reg = <0x0f500000 0x00a00000>;    /*  10 MB */
+							read-only;
+						};
+					};
+				};
+			};
+
+			usb3 at f0000 {
+				usb-phy = <&usb3_0_phy>;
+				status = "okay";
+			};
+
+			usb3 at f8000 {
+				usb-phy = <&usb3_1_phy>;
+				status = "okay";
+			};
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&sata_leds>;
+
+		led_boot: s1red {
+			label = "red:hdd1";
+			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+		};
+		s2red {
+			label = "red:hdd2";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		};
+		s1blue {
+			label = "blue:hdd1";
+			gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "ata1";
+		};
+		s2blue {
+			label = "blue:hdd2";
+			gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "ata2";
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&btn_pins>;
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;  // Restart=0x198, Power=0x116
+			gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			wakeup-source;
+		};
+	};
+
+	usb3_0_phy: usb3_0_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_0_vbus>;
+	};
+
+	usb3_1_phy: usb3_1_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_1_vbus>;
+	};
+
+	reg_usb3_0_vbus: usb3-vbus0 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus0";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci0_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_usb3_1_vbus: usb3-vbus1 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus1";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci1_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_sata0: pwr-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "pwr_en_sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		enable-active-high;
+		regulator-boot-on;
+		gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_5v_sata0: v5-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v5.0-sata0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sata0>;
+	};
+
+	reg_12v_sata0: v12-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v12.0-sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&reg_sata0>;
+	};
+
+	reg_sata1: pwr-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "pwr_en_sata1";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		enable-active-high;
+		regulator-boot-on;
+		gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_5v_sata1: v5-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "v5.0-sata1";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sata1>;
+	};
+
+	reg_12v_sata1: v12-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "v12.0-sata1";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&reg_sata1>;
+	};
+};
+
+&bm {
+	status = "okay";
+};
+
+&bm_bppi {
+	status = "okay";
+};
+
+&eth2 {
+	status = "okay";
+	phy = <&phy0>;
+	phy-mode = "sgmii";
+	buffer-manager = <&bm>;
+	bm,pool-long = <0>;
+	bm,pool-short = <1>;
+};
+
+&ahci0 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	sata-port at 0 {
+		reg = <0>;
+		target-supply = <&reg_sata0>;
+		#thermal-sensor-cells = <0>;
+	};
+
+	sata-port at 1 {
+		reg = <1>;
+		target-supply = <&reg_sata1>;
+		#thermal-sensor-cells = <1>;
+	};
+};
diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index 4a41f2c102..d572264866 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -448,3 +448,20 @@ define Device/synology_ds213j
     -ppp -kmod-nft-offload -dnsmasq -odhcpd-ipv6only
 endef
 TARGET_DEVICES += synology_ds213j
+
+define Device/wd_cloud-mirror-gen2
+  $(Device/NAND-128K)
+  DEVICE_VENDOR := Western Digital
+  DEVICE_MODEL := MyCloud Mirror Gen 2 (BWVZ/Grand Teton)
+  DEVICE_PACKAGES += -uboot-envtools coreutils-stty mkf2fs e2fsprogs \
+	partx-utils kmod-hwmon-drivetemp -ppp -kmod-nft-offload -dnsmasq \
+	-odhcpd-ipv6only 
+  DEVICE_DTS := armada-385-wd_cloud-mirror-gen2
+  KERNEL_SIZE := 5120k
+  KERNEL := kernel-bin | append-dtb | uImage none
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
+  IMAGES += image-cfs-factory.bin uImage-factory.bin
+  IMAGE/image-cfs-factory.bin := append-ubi
+  IMAGE/uImage-factory.bin := append-kernel
+endef
+TARGET_DEVICES += wd_cloud-mirror-gen2



From lede-commits at lists.infradead.org  Sun Jan 12 11:15:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 14:15:04 -0500
Subject: [openwrt/openwrt]  ramips: mt76x8: add support for Keenetic Extra
 (KN-1711)
In-Reply-To: <173670930437.1121059.17059105981368319088@git-01.infra.openwrt.org>
References: <173670930437.1121059.17059105981368319088@git-01.infra.openwrt.org>
Message-ID: <mailman.37688.1736709308.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8973c48515b758998c3870ceb94318cca1707896

commit 8973c48515b758998c3870ceb94318cca1707896
Author: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
AuthorDate: Tue Jan 7 20:38:09 2025 +0500

    ramips: mt76x8: add support for Keenetic Extra (KN-1711)
    
    Specification:
    SoC: MediaTek MT7628AN
    RAM: 128 MB, ESMT M14D1G1664A (DDR2)
    Flash: 32MB, Winbond 25Q256JVFQ (Dual Boot, SPI)
    Switch: MediaTek MT7628AN, 5 ports 100 Mbps
    WiFi: MediaTek MT7603 2T2R/2.4GHz 802.11n and MediaTek MT7613AEN 2T2R/5GHz 802.11ac
    USB: 1 port USB 2.0
    GPIO: 3 buttons (Wi-Fi, Reset, FN), 4 LEDs (Power, Internet, FN, Wi-Fi), USB port power controls
    
    Disassembly:
    At the bottom there are 4 screws hidden by rubber feet. After removing the screws, pry the gray plastic part around (it is secured with latches) and remove it.
    
    Serial Interface:
    The serial interface can be connected to the 4 pin dots to the left of the flash.
    Pins (from LEDs to LAN ports):
    3.3V (do not connect)
    TX
    RX
    GND
    Settings: 115200, 8N1
    
    Flashing via OEM recovery software:
    1. Download the OEM recovery software from the manufacturer's website
    2. Download the firmware image (for OpenWRT it is *-squashfs-factory.bin), rename it to KN-1711_recovery.bin
    3. Replace the file in the fw folder OEM recovery software with the file from step 2.
    4. Run the OEM recovery software and follow the instructions.
    
    Flashing via TFTP:
    1. Connect your PC and router to port 1-4, configure PC interface using IP 192.168.1.2, mask 255.255.255.252
    2. Serve the firmware image (for OpenWRT it is *-squashfs-factory.bin) renamed to KN-1711_recovery.bin via TFTP
    3. Power up the router while pressing Reset button on the back
    4. Release Restart button when Power LED starts blinking
    
    To revert back to OEM firmware:
    The return to the OEM firmware is carried out by using the methods described above with the help of the appropriate firmware image.
    
    When using OEM bootloader, the firmware image size cannot exceed the size of one OEM ?Firmware_x? partition or Kernel + rootFS size.
    
    Signed-off-by: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
    Link: https://github.com/openwrt/openwrt/pull/17519
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/ramips/dts/mt7628an_keenetic_kn-1711.dts | 243 +++++++++++++++++++++
 target/linux/ramips/image/mt76x8.mk                |  12 +
 .../ramips/mt76x8/base-files/etc/board.d/01_leds   |   3 +-
 .../mt76x8/base-files/etc/board.d/02_network       |   1 +
 4 files changed, 258 insertions(+), 1 deletion(-)

diff --git a/target/linux/ramips/dts/mt7628an_keenetic_kn-1711.dts b/target/linux/ramips/dts/mt7628an_keenetic_kn-1711.dts
new file mode 100644
index 0000000000..c0350eb494
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_keenetic_kn-1711.dts
@@ -0,0 +1,243 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "keenetic,kn-1711", "mediatek,mt7628an-soc";
+	model = "Keenetic KN-1711";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	regulator-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "USB-power";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+		};
+
+		internet {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+
+		wifi2 {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi5 {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+
+
+	keys {
+		compatible = "gpio-keys";
+
+		fn {
+			label = "fn";
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+
+		reset {
+			label = "restart";
+			gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&firmware1 &firmware2>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x0 0x1CC0000>;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2s", "i2c", "gpio", "refclk", "wdt", "wled_an";
+		function = "gpio";
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+
+		partitions: partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition at 30000 {
+				label = "u-config";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition at 40000 {
+				label = "rf-eeprom";
+				reg = <0x40000 0x10000>;
+				read-only;
+				
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom at 0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_factory_400: eeprom at 400 {
+						reg = <0x400 0x4da8>;
+					};
+
+					macaddr_factory_28: macaddr at 28 {
+						reg = <0x28 0x6>;
+					};
+				};
+			};
+
+			firmware1: partition at 50000 {
+				label = "firmware_1";
+				reg = <0x50000 0xe60000>;
+			};
+
+			partition at eb0000 {
+				label = "config_1";
+				reg = <0xeb0000 0x40000>;
+				read-only;
+			};
+
+			partition at ef0000 {
+				label = "storage";
+				reg = <0xef0000 0x100000>;
+				read-only;
+			};
+
+			partition at ff0000 {
+				label = "dump";
+				reg = <0xff0000 0x10000>;
+				read-only;
+			};
+
+			partition at 1000000 {
+				label = "u-state";
+				reg = <0x1000000 0x30000>;
+				read-only;
+			};
+
+			partition at 1030000 {
+				label = "u-config_res";
+				reg = <0x1030000 0x10000>;
+				read-only;
+			};
+			
+			partition at 1040000 {
+				label = "rf-eeprom_res";
+				reg = <0x1040000 0x10000>;
+				read-only;
+			};
+
+			firmware2: partition at 1050000 {
+				label = "firmware_2";
+				reg = <0x1050000 0xe60000>;
+			};
+			
+			partition at 1EB0000 {
+				label = "Config_2";
+				reg = <0x1eb0000 0x40000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	nvmem-cells = <&macaddr_factory_28>;
+	nvmem-cell-names = "mac-address";
+};
+
+&esw {
+	mediatek,portmap = <0x3e>;
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&eeprom_factory_0>;
+	nvmem-cell-names = "eeprom";
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_400>;
+		nvmem-cell-names = "eeprom";
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index 76b1951588..d63148cae4 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -366,6 +366,18 @@ define Device/keenetic_kn-1613
 endef
 TARGET_DEVICES += keenetic_kn-1613
 
+define Device/keenetic_kn-1711
+  BLOCKSIZE := 64k
+  IMAGE_SIZE := 13434880
+  DEVICE_VENDOR := Keenetic
+  DEVICE_MODEL := KN-1711
+  DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb2
+  IMAGES += factory.bin
+  IMAGE/factory.bin := $$(sysupgrade_bin) | pad-to $$$$(BLOCKSIZE) | \
+	check-size | zyimage -d 0x801711 -v "KN-1711"
+endef
+TARGET_DEVICES += keenetic_kn-1711
+
 define Device/keenetic_kn-1713
   BLOCKSIZE := 64k
   IMAGE_SIZE := 13434880
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
index e13c5db50e..b87062ae3c 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
@@ -59,8 +59,9 @@ hiwifi,hc5761a)
 	ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x10"
 	;;
 keenetic,kn-1613|\
+keenetic,kn-1711|\
 keenetic,kn-1713)
-	ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x01"
+	ucidef_set_led_switch "wan" "WAN" "green:wan" "switch0" "0x01"
 	;;
 mediatek,linkit-smart-7688)
 	ucidef_set_led_wlan "wifi" "wifi" "orange:wifi" "phy0tpt"
diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
index 994ed0009b..496bb809ef 100644
--- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
@@ -45,6 +45,7 @@ ramips_setup_interfaces()
 	hilink,hlk-7628n|\
 	hilink,hlk-7688a|\
 	hiwifi,hc5861b|\
+	keenetic,kn-1711|\
 	kroks,kndrt31r16|\
 	skylab,skw92a|\
 	tplink,archer-c20-v4|\



From lede-commits at lists.infradead.org  Sun Jan 12 11:16:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 14:16:41 -0500
Subject: [openwrt/openwrt]  uboot-envtools: update to v2025.01
In-Reply-To: <173670940148.1124861.6576946047354072262@git-01.infra.openwrt.org>
References: <173670940148.1124861.6576946047354072262@git-01.infra.openwrt.org>
Message-ID: <mailman.37691.1736709404.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/433be50c945a62c8ce9947166e86a8f122b174a8

commit 433be50c945a62c8ce9947166e86a8f122b174a8
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 8 22:57:10 2025 +0800

    uboot-envtools: update to v2025.01
    
    Update to latest version. There are no patches that need to be
    refreshed.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17538
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/boot/uboot-envtools/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/boot/uboot-envtools/Makefile b/package/boot/uboot-envtools/Makefile
index 61939be6de..5b52c3b395 100644
--- a/package/boot/uboot-envtools/Makefile
+++ b/package/boot/uboot-envtools/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=uboot-envtools
 PKG_DISTNAME:=u-boot
-PKG_VERSION:=2024.07
+PKG_VERSION:=2025.01
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_DISTNAME)-$(PKG_VERSION).tar.bz2
@@ -17,7 +17,7 @@ PKG_SOURCE_URL:= \
     https://ftp.denx.de/pub/u-boot \
     https://mirror.cyberbits.eu/u-boot \
     ftp://ftp.denx.de/pub/u-boot
-PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f
+PKG_HASH:=cdef7d507c93f1bbd9f015ea9bc21fa074268481405501945abc6f854d5b686f
 PKG_SOURCE_SUBDIR:=$(PKG_DISTNAME)-$(PKG_VERSION)
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_DISTNAME)-$(PKG_VERSION)
 



From lede-commits at lists.infradead.org  Sun Jan 12 11:17:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 14:17:29 -0500
Subject: [openwrt/openwrt]  mkimage: update to v2025.01
In-Reply-To: <173670944993.1127000.17699341656670642117@git-01.infra.openwrt.org>
References: <173670944993.1127000.17699341656670642117@git-01.infra.openwrt.org>
Message-ID: <mailman.37692.1736709453.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9a0f0611d2022fb21c400abfcf51c67493b5265a

commit 9a0f0611d2022fb21c400abfcf51c67493b5265a
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 8 22:57:36 2025 +0800

    mkimage: update to v2025.01
    
    Update to latest version. There are no patches that need to be
    refreshed.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17539
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 tools/mkimage/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/mkimage/Makefile b/tools/mkimage/Makefile
index 0a1712bc67..18d7ea2caa 100644
--- a/tools/mkimage/Makefile
+++ b/tools/mkimage/Makefile
@@ -7,14 +7,14 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=mkimage
-PKG_VERSION:=2024.07
+PKG_VERSION:=2025.01
 
 PKG_SOURCE:=u-boot-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:= \
 	https://mirror.cyberbits.eu/u-boot \
 	https://ftp.denx.de/pub/u-boot \
 	ftp://ftp.denx.de/pub/u-boot
-PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f
+PKG_HASH:=cdef7d507c93f1bbd9f015ea9bc21fa074268481405501945abc6f854d5b686f
 
 HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/u-boot-$(PKG_VERSION)
 



From lede-commits at lists.infradead.org  Sun Jan 12 11:22:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 14:22:24 -0500
Subject: [openwrt/openwrt]  mediatek: D-Link AQUILA PRO AI M60 A1: Fixed phy6
 DTS settings
In-Reply-To: <173670974421.1136608.16611569188693157586@git-01.infra.openwrt.org>
References: <173670974421.1136608.16611569188693157586@git-01.infra.openwrt.org>
Message-ID: <mailman.37693.1736709748.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0d1568246f6834e4b593b23d43524d4c16a29e82

commit 0d1568246f6834e4b593b23d43524d4c16a29e82
Author: Roland Reinl <reinlroland+github at gmail.com>
AuthorDate: Mon Jan 6 08:33:36 2025 +0100

    mediatek: D-Link AQUILA PRO AI M60 A1: Fixed phy6 DTS settings
    
    Settings for phy6 can be simplified in the DTS
    
    Signed-off-by: Roland Reinl <reinlroland+github at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17430
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
index e805554a13..81634c7c08 100644
--- a/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
+++ b/target/linux/mediatek/dts/mt7986a-dlink-aquila-pro-ai-m60-a1.dts
@@ -87,9 +87,8 @@
 		reset-post-delay-us = <1000000>;
 
 		phy6: phy at 6 {
-			compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
+			compatible = "ethernet-phy-ieee802.3-c45";
 			reg = <6>;
-			phy-mode = "2500base-x";
 		};
 
 		switch at 1f {



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:26 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:26 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: fix typo in
 "green:signal-strength4" LED
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37698.1736714251.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d04f41e092294789b5add6816bb3b3bd7570a30d

commit d04f41e092294789b5add6816bb3b3bd7570a30d
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sun Dec 8 04:08:38 2024 +0100

    ath79: teltonika-rut230: fix typo in "green:signal-strength4" LED
    
    It's missing a hyphen present in every other LED from the set. Set it to
    "green:signal-strength-4".
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index c2c54b4662..192a7d2a04 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -68,7 +68,7 @@
 		};
 
 		signal-strength-4 {
-			label = "green:signal-strength4";
+			label = "green:signal-strength-4";
 			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
 		};
 



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:31 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: include kmod-usb2 in
 image
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37699.1736714251.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f39115632c69ffae50b1c37937d80e934a27d26d

commit f39115632c69ffae50b1c37937d80e934a27d26d
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sun Dec 8 04:31:36 2024 +0100

    ath79: teltonika-rut230: include kmod-usb2 in image
    
    Otherwise USB PHY, controller and the built-in modem won't probe.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/generic.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index 74ef0d2da0..88915c650c 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -3063,8 +3063,8 @@ define Device/teltonika_rut230-v1
   DEVICE_VENDOR := Teltonika
   DEVICE_MODEL := RUT230
   DEVICE_VARIANT := v1
-  DEVICE_PACKAGES := kmod-usb-chipidea2 kmod-usb-acm kmod-usb-net-qmi-wwan \
-	uqmi -uboot-envtools
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-chipidea2 kmod-usb-acm \
+	kmod-usb-net-qmi-wwan uqmi -uboot-envtools
   IMAGE_SIZE := 15552k
   TPLINK_HWID := 0x32200002
   TPLINK_HWREV := 0x1



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:33 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: add RUT240 model alias
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37700.1736714252.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/62af69f9e4611182ca529ab4bf27a105a77df2a7

commit 62af69f9e4611182ca529ab4bf27a105a77df2a7
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sat Dec 7 04:36:52 2024 +0100

    ath79: teltonika-rut230: add RUT240 model alias
    
    Define RUT240 as alternative name, to explicitly show the device is
    supported using existing image.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/generic.mk | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index 3f813df253..b15b8b0efe 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -3063,6 +3063,9 @@ define Device/teltonika_rut230-v1
   DEVICE_VENDOR := Teltonika
   DEVICE_MODEL := RUT230
   DEVICE_VARIANT := v1
+  DEVICE_ALT0_VENDOR := Teltonika
+  DEVICE_ALT0_MODEL := RUT240
+  DEVICE_ALT0_VARIANT := v1
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-chipidea2 kmod-usb-acm \
 	kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi -uboot-envtools
   IMAGE_SIZE := 15552k



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:28 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: add 4G LED
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37701.1736714252.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f28010a79c653f0ac7183c3cf774ed70f8818935

commit f28010a79c653f0ac7183c3cf774ed70f8818935
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sat Dec 7 04:27:18 2024 +0100

    ath79: teltonika-rut230: add 4G LED
    
    Teltonika RUT240 has an extra 4G status LED on GPIO21. Otherwise the
    hardware is fully compatible with RUT230 line. Attach the LED inside
    device tree.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index 73a6cc52ca..aa8a220470 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -83,6 +83,11 @@
 			gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
 		};
 
+		4g {
+			label = "green:4g";
+			gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
+		};
+
 		lan {
 			function = LED_FUNCTION_LAN;
 			color = <LED_COLOR_ID_GREEN>;
@@ -96,8 +101,6 @@
 			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
 			/* GPIO 14 - ACTIVE HIGH for hwrev 0 */
 		};
-
-		/* 4G LED - GPIO21 ACTIVE_HIGH for RUT240 */
 	};
 
 	reg_usb_vbus: reg_usb_vbus {



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:29 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: drop reg_usb_vbus
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37702.1736714256.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/46a6f4968530f1f3b9d7ad0d3b1cac302ef45388

commit 46a6f4968530f1f3b9d7ad0d3b1cac302ef45388
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sat Jan 4 02:12:42 2025 +0100

    ath79: teltonika-rut230: drop reg_usb_vbus
    
    USB VBUS regulator was attached to GPIO19, which isn't in fact
    controlling the modem power itself, but rather modem power key - which
    has to be asserted high for at least 500ms, to start the modem. Keeping
    it high allows the modem to reboot upon shutdown - so it is desirable to
    control this line from userspace, for example - to allow clean modem
    shutdown down upon powering off the router part.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index aa8a220470..abac279775 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -102,15 +102,6 @@
 			/* GPIO 14 - ACTIVE HIGH for hwrev 0 */
 		};
 	};
-
-	reg_usb_vbus: reg_usb_vbus {
-		compatible = "regulator-fixed";
-		regulator-name = "usb_vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
 };
 
 &eth0 {
@@ -197,7 +188,6 @@
 
 &usb {
 	dr_mode = "host";
-	vbus-supply = <&reg_usb_vbus>;
 	status = "okay";
 };
 



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:32 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: include
 kmod-usb-serial-option in image
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37703.1736714256.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/11ad73f97d35518b3b4def26a62fa78ae1b3dfe1

commit 11ad73f97d35518b3b4def26a62fa78ae1b3dfe1
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sat Dec 7 04:39:13 2024 +0100

    ath79: teltonika-rut230: include kmod-usb-serial-option in image
    
    Newer modems used in RUT240 (Quectel EC25 and MeiG SLM750) use the
    "option" driver instead of CDC-ACM. Include it in the image too.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/generic.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index 88915c650c..3f813df253 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -3064,7 +3064,7 @@ define Device/teltonika_rut230-v1
   DEVICE_MODEL := RUT230
   DEVICE_VARIANT := v1
   DEVICE_PACKAGES := kmod-usb2 kmod-usb-chipidea2 kmod-usb-acm \
-	kmod-usb-net-qmi-wwan uqmi -uboot-envtools
+	kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi -uboot-envtools
   IMAGE_SIZE := 15552k
   TPLINK_HWID := 0x32200002
   TPLINK_HWREV := 0x1



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:30 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: fully support digital
 output lines
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37704.1736714258.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/852911a85dcaf69a8495153b2dabdf5f31efb5a6

commit 852911a85dcaf69a8495153b2dabdf5f31efb5a6
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sat Dec 7 04:34:00 2024 +0100

    ath79: teltonika-rut230: fully support digital output lines
    
    Remove GPIO hog for modem power, as well as define userspace GPIO
    switches for enabling and resetting the modem. While at that, define a
    switch for the external GPIO available on the power connector.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts            | 9 ---------
 .../linux/ath79/generic/base-files/etc/board.d/03_gpio_switches  | 5 +++++
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index abac279775..ee59cecabb 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -191,15 +191,6 @@
 	status = "okay";
 };
 
-&gpio {
-	modem-power {
-		gpio-hog;
-		output-low;
-		gpios = <18 GPIO_ACTIVE_HIGH>;
-		line-name = "modem-power";
-	};
-};
-
 &usb_phy {
 	status = "okay";
 };
diff --git a/target/linux/ath79/generic/base-files/etc/board.d/03_gpio_switches b/target/linux/ath79/generic/base-files/etc/board.d/03_gpio_switches
index d5b41dc0b8..fe71b7b3c4 100644
--- a/target/linux/ath79/generic/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/ath79/generic/base-files/etc/board.d/03_gpio_switches
@@ -48,6 +48,11 @@ dlink,dir-835-a1)
 librerouter,librerouter-v1)
 	ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "513" "0"
 	;;
+teltonika,rut230-v1)
+	ucidef_add_gpio_switch "DOUT" "DOUT" "524" "0"
+	ucidef_add_gpio_switch "modem_pwr" "Modem power" "531" "1"
+	ucidef_add_gpio_switch "modem_rst" "Modem reset" "530" "0"
+	;;
 teltonika,rut955)
 	ucidef_add_gpio_switch "sim_sel" "SIM select" "542" "1"
 	ucidef_add_gpio_switch "DOUT1" "DOUT1 (OC)" "543" "0"



From lede-commits at lists.infradead.org  Sun Jan 12 12:37:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:37:27 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: fix failsafe boot without
 SIM tray
In-Reply-To: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
References: <173671424698.1241455.2319886549945676313@git-01.infra.openwrt.org>
Message-ID: <mailman.37707.1736714259.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7b9ca01109827368deb68b7d8217643b78b87cb9

commit 7b9ca01109827368deb68b7d8217643b78b87cb9
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Mon Jan 6 17:31:44 2025 +0100

    ath79: teltonika-rut230: fix failsafe boot without SIM tray
    
    Due to "SIM present" input defaulting to "button" type, it is
    interpreted as such when booting, and causes the system to enter
    failsafe, if the tray is missing. Similarly to rfkill switch on
    TP-Link WDR4300 and Archer C7, make it EV_SW instead, to stop it from
    interfering with the boot process.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index 192a7d2a04..73a6cc52ca 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -36,6 +36,7 @@
 
 		sim-tray {
 			label = "sim-tray";
+			linux,input-type = <EV_SW>;
 			linux,code = <BTN_1>;
 			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:26 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:26 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.71
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37720.1736715149.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/ff529e81370420d0a709877df60c7b49f32f971d

commit ff529e81370420d0a709877df60c7b49f32f971d
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Fri Jan 10 16:01:56 2025 -0500

    kernel: bump 6.6 to 6.6.71
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.71
    
    Manually rebased:
            airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
            airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
    
    All other patches automatically rebased.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712
    Run-tested: bcm27xx/bcm2712
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    [ fix manually rebased patch ]
    Link: https://github.com/openwrt/openwrt/pull/17568
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 3f87c5ac4221deb37d4c3e730e692eef8f9c9ffe)
---
 include/kernel-6.6                                         |  4 ++--
 ...-en7523-Rework-clock-handling-for-different-clock.patch | 14 +++++++-------
 .../111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch   | 14 ++++++--------
 3 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 1cda04d0c5..f034d0754c 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .70
-LINUX_KERNEL_HASH-6.6.70 = 84d23ee07fb26febbcb6d1295ba15efdc67ac382b4137b2c8853146c10fd2f97
+LINUX_VERSION-6.6 = .71
+LINUX_KERNEL_HASH-6.6.71 = 219715ba2dcfa6539fba09ad3f9212772f3507189eb60d77f8e89b06c32e724e
diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
index 7333ebbdf2..187715a5cc 100644
--- a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
+++ b/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -26,15 +26,15 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	const struct clk_ops pcie_ops;
  	int (*hw_init)(struct platform_device *pdev,
  		       struct clk_hw_onecell_data *clk_data);
-@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
+ 	u32 rate;
+ 	int i;
  
- 	hw = en7523_register_pcie_clk(dev, np_base);
- 	clk_data->hws[EN7523_CLK_PCIE] = hw;
--
 -	clk_data->num = EN7523_NUM_CLOCKS;
- }
- 
- static int en7523_clk_hw_init(struct platform_device *pdev,
+-
+ 	for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
+ 		const struct en_clk_desc *desc = &en7523_base_clks[i];
+ 		u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
 @@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
  
  	hw = en7523_register_pcie_clk(dev, base);
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
index 24c4dbde78..d116bb9ee0 100644
--- a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
+++ b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
@@ -103,29 +103,27 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
  	if (IS_ERR(host->bus_clk))
-@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
- 		goto host_free;
+@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
+ 		return PTR_ERR(host->pins_default);
  	}
  
 -	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
 -	if (IS_ERR(host->pins_uhs)) {
--		ret = PTR_ERR(host->pins_uhs);
 -		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
--		goto host_free;
+-		return PTR_ERR(host->pins_uhs);
 +	/* AN7581 doesn't have state_uhs pins */
 +	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
 +		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
 +		if (IS_ERR(host->pins_uhs)) {
-+			ret = PTR_ERR(host->pins_uhs);
 +			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+			goto host_free;
++			return PTR_ERR(host->pins_uhs);
 +		}
  	}
  
  	/* Support for SDIO eint irq ? */
-@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
  		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- 		goto release_mem;
+ 		goto release_clk;
  	}
 +
 +	/* AN7581 without regulator require tune to OCR values */



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:27 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200_legacy: add alternative names for
 TP-Link TD-W9980(B)
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37721.1736715149.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6c0707a59dc3f3927d63ae2fc68d6a3e13b0eabd

commit 6c0707a59dc3f3927d63ae2fc68d6a3e13b0eabd
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 17:04:33 2025 +0100

    lantiq: xrx200_legacy: add alternative names for TP-Link TD-W9980(B)
    
    The TP-Link TD-W9980(B) shares the same hardware with the TP-Link TD-W8980.
    The only difference is that the TD-W8980 does not support VDSL. This is a
    software limitation and once the software is changed, both work equally
    supporting VDSL. This commit adds alternative names for devices so they
    can be easily found in the firmware selector.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17583
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit b2b4ce15322c75bda0cae6fb2160a74270185831)
---
 target/linux/lantiq/image/tp-link_legacy.mk | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/linux/lantiq/image/tp-link_legacy.mk b/target/linux/lantiq/image/tp-link_legacy.mk
index d9bcd35d10..19a81bd827 100644
--- a/target/linux/lantiq/image/tp-link_legacy.mk
+++ b/target/linux/lantiq/image/tp-link_legacy.mk
@@ -36,6 +36,12 @@ define Device/tplink_tdw8980
   $(Device/lantiqTpLink)
   DEVICE_MODEL := TD-W8980
   DEVICE_VARIANT := v1
+  DEVICE_ALT0_VENDOR := TP-LINK
+  DEVICE_ALT0_MODEL := TD-W9980
+  DEVICE_ALT0_VARIANT := v1
+  DEVICE_ALT1_VENDOR := TP-LINK
+  DEVICE_ALT1_MODEL := TD-W9980B
+  DEVICE_ALT1_VARIANT := v1
   TPLINK_FLASHLAYOUT := 8Mltq
   TPLINK_HWID := 0x89800001
   TPLINK_HWREV := 14



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:29 -0500
Subject: [openwrt/openwrt]  lantiq: xway_legacy: refresh config
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37722.1736715151.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/773bb31bab5f202e5d47f27e23fccbe0ff9bf012

commit 773bb31bab5f202e5d47f27e23fccbe0ff9bf012
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 16:34:46 2025 +0100

    lantiq: xway_legacy: refresh config
    
    This was done by executing these command:
    $ make kernel_oldconfig CONFIG_TARGET=subtarget
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17581
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 524e22b4c71366be86493ca3ee7a16ff92d52288)
---
 target/linux/lantiq/xrx200_legacy/config-6.6 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/lantiq/xrx200_legacy/config-6.6 b/target/linux/lantiq/xrx200_legacy/config-6.6
index c8650c4e87..166a2cde06 100644
--- a/target/linux/lantiq/xrx200_legacy/config-6.6
+++ b/target/linux/lantiq/xrx200_legacy/config-6.6
@@ -7,7 +7,6 @@ CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_RMAP=y
 CONFIG_CRC16=y
 CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_HASH_INFO=y
 CONFIG_CRYPTO_LZO=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin"
@@ -47,6 +46,7 @@ CONFIG_NET_SWITCHDEV=y
 CONFIG_NLS=y
 CONFIG_NR_CPUS=2
 CONFIG_PADATA=y
+CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCIE_LANTIQ=y



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:30 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200_legacy: disable unused phy drivers
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37723.1736715151.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3b4a84d05f2215b0cde7c434d45cfb7fb7206a2d

commit 3b4a84d05f2215b0cde7c434d45cfb7fb7206a2d
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 16:37:47 2025 +0100

    lantiq: xrx200_legacy: disable unused phy drivers
    
    Subtarget xrx200_legacy supports only a few devices. They all use
    the integrated Lantiq GSWIP switch and lantiq xway PHYs. The atheros
    and icplus PHYs can be safely disabled.
    
    Switches used by individual devices are listed below.
    
    Device                          Switch                  PHY
    Alpha ASL56026                  Lantiq GSWIP            int. switch
    Arcadyan VG3503J                Lantiq GSWIP            int. switch
    Netgear DM200                   Lantiq GSWIP            int. switch
    TP-LINK TD-W8970                Lantiq GSWIP            Lantiq PEF7071V
    TP-Link TD-W8980                Lantiq GSWIP            Lantiq PEF7071V
    
    Reduces uncompressed kernel size by 16 kB.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17581
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 517b9c1cdcd357fd84c7f27bd2886f235f3ec946)
---
 target/linux/lantiq/xrx200_legacy/config-6.6 | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/target/linux/lantiq/xrx200_legacy/config-6.6 b/target/linux/lantiq/xrx200_legacy/config-6.6
index 166a2cde06..9bb65cff07 100644
--- a/target/linux/lantiq/xrx200_legacy/config-6.6
+++ b/target/linux/lantiq/xrx200_legacy/config-6.6
@@ -1,4 +1,3 @@
-CONFIG_AT803X_PHY=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_CONTEXT_TRACKING=y
 CONFIG_CONTEXT_TRACKING_IDLE=y
@@ -16,7 +15,6 @@ CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
 CONFIG_GRO_CELLS=y
 CONFIG_HWMON=y
 CONFIG_HW_RANDOM=y
-CONFIG_ICPLUS_PHY=y
 CONFIG_IFX_VPE_EXT=y
 CONFIG_INPUT=y
 CONFIG_INPUT_EVDEV=y
@@ -57,7 +55,6 @@ CONFIG_PHY_LANTIQ_VRX200_PCIE=y
 CONFIG_POWER_RESET_GPIO=y
 CONFIG_POWER_SUPPLY=y
 CONFIG_POWER_SUPPLY_HWMON=y
-CONFIG_QCOM_NET_PHYLIB=y
 CONFIG_QUEUED_RWLOCKS=y
 CONFIG_QUEUED_SPINLOCKS=y
 CONFIG_REGULATOR=y



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:28 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: add alternative names for Plusnet
 Hub One and BT Business Hub 5A
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37724.1736715151.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/afbe72d293126312b12f1776855093eb8c5198dd

commit afbe72d293126312b12f1776855093eb8c5198dd
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Sat Jan 11 17:10:42 2025 +0100

    lantiq: xrx200: add alternative names for Plusnet Hub One and BT Business Hub 5A
    
    The Plusnet Hub One and BT Business Hub 5A have the same hardware as
    the BT Home Hub 5A. This commit adds alternative names so that both
    devices can be easily found in the firmware selector.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17583
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 1b045a7c13aeb141e0c069aaf5fc38989eee11cf)
---
 target/linux/lantiq/image/vr9.mk | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/linux/lantiq/image/vr9.mk b/target/linux/lantiq/image/vr9.mk
index 48a372f476..05999e408d 100644
--- a/target/linux/lantiq/image/vr9.mk
+++ b/target/linux/lantiq/image/vr9.mk
@@ -292,6 +292,11 @@ define Device/bt_homehub-v5a
   DEVICE_VENDOR := British Telecom (BT)
   DEVICE_MODEL := Home Hub 5
   DEVICE_VARIANT := Type A
+  DEVICE_ALT0_VENDOR := British Telecom (BT)
+  DEVICE_ALT0_MODEL := Business Hub 5
+  DEVICE_ALT0_VARIANT := Type A
+  DEVICE_ALT1_VENDOR := Plusnet
+  DEVICE_ALT1_MODEL := Hub One
   BOARD_NAME := BTHOMEHUBV5A
   DEVICE_PACKAGES := kmod-ath9k kmod-owl-loader \
 	kmod-ath10k-ct ath10k-firmware-qca988x-ct wpad-basic-mbedtls kmod-usb-dwc2



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:32 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: fix typo in
 "green:signal-strength4" LED
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37727.1736715151.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6e06e1c0b1cb5ac08167773131901259b889e722

commit 6e06e1c0b1cb5ac08167773131901259b889e722
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Sun Dec 8 04:08:38 2024 +0100

    ath79: teltonika-rut230: fix typo in "green:signal-strength4" LED
    
    It's missing a hyphen present in every other LED from the set. Set it to
    "green:signal-strength-4".
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit d04f41e092294789b5add6816bb3b3bd7570a30d)
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index c2c54b4662..192a7d2a04 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -68,7 +68,7 @@
 		};
 
 		signal-strength-4 {
-			label = "green:signal-strength4";
+			label = "green:signal-strength-4";
 			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
 		};
 



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:31 -0500
Subject: [openwrt/openwrt]  apm821xx: fixes WNDAP620 + WNDAP660 sysupgrade
 failures
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37728.1736715151.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/93bcec7b6c4a372b21790d21dfc29c562a25ff4f

commit 93bcec7b6c4a372b21790d21dfc29c562a25ff4f
Author: Christian Lamparter <chunkeey at gmail.com>
AuthorDate: Sat Jan 4 19:51:48 2025 +0100

    apm821xx: fixes WNDAP620 + WNDAP660 sysupgrade failures
    
    OpenWRT on the WNDAP6x0 refuses to sysupgrade to itself
    due to a compat_version imbalance. The Image is generated
    with version 2.0, but the uci-defaults says that it needs
    to be at 3.0 for the device.
    
    Fix this by downgrading WNDAP6x0 05_fix-compat-version's
    values back to 2.0 so it matches what we use.
    
    Fixes: 5815884c3a2a ("apm821xx: migrate to DSA")
    Signed-off-by: Christian Lamparter <chunkeey at gmail.com>
    (cherry picked from commit e9415be4ad3cacbbd6e65fee5213baf3eaf9e07a)
---
 .../apm821xx/base-files/etc/uci-defaults/05_fix-compat-version     | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
index 00d3954e5f..11af63c9e7 100644
--- a/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
+++ b/target/linux/apm821xx/base-files/etc/uci-defaults/05_fix-compat-version
@@ -2,12 +2,15 @@
 
 case "$(board_name)" in
 meraki,mx60|\
-netgear,wndap620|\
-netgear,wndap660|\
 netgear,wndr4700)
 	uci set system. at system[0].compat_version="3.0"
 	uci commit system
 	;;
+netgear,wndap620|\
+netgear,wndap660)
+	uci set system. at system[0].compat_version="2.0"
+	uci commit system
+	;;
 esac
 
 exit 0



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:33 -0500
Subject: [openwrt/openwrt]  ath79: teltonika-rut230: fix failsafe boot without
 SIM tray
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37729.1736715153.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7d597f87096e05f8e53e7cd90cc6c2da6abdf72e

commit 7d597f87096e05f8e53e7cd90cc6c2da6abdf72e
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Mon Jan 6 17:31:44 2025 +0100

    ath79: teltonika-rut230: fix failsafe boot without SIM tray
    
    Due to "SIM present" input defaulting to "button" type, it is
    interpreted as such when booting, and causes the system to enter
    failsafe, if the tray is missing. Similarly to rfkill switch on
    TP-Link WDR4300 and Archer C7, make it EV_SW instead, to stop it from
    interfering with the boot process.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17503
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 7b9ca01109827368deb68b7d8217643b78b87cb9)
---
 target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
index 192a7d2a04..73a6cc52ca 100644
--- a/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
+++ b/target/linux/ath79/dts/ar9331_teltonika_rut230-v1.dts
@@ -36,6 +36,7 @@
 
 		sim-tray {
 			label = "sim-tray";
+			linux,input-type = <EV_SW>;
 			linux,code = <BTN_1>;
 			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;



From lede-commits at lists.infradead.org  Sun Jan 12 12:52:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 12 Jan 2025 15:52:25 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.70
In-Reply-To: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
References: <173671514595.1255379.17697730195507098679@git-01.infra.openwrt.org>
Message-ID: <mailman.37730.1736715153.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/220860ef4c06b310baa427c8889f0a0fb33e4cbe

commit 220860ef4c06b310baa427c8889f0a0fb33e4cbe
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 9 08:54:54 2025 -0500

    kernel: bump 6.6 to 6.6.70
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.70
    
    Removed upstreamed:
            generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch[1]
            generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch[2]
    
    All other patches automatically rebased.
    
    1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.70&id=0c896816aa193e6459fc947747e5753c06b395b9
    2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.70&id=4f49349c1963e507aa37c1ec05178faeb0103959
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17545
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit efafd7d47f8fa26a9f99283605c9324a833ef852)
---
 include/kernel-6.6                                 |  4 +-
 ...-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch |  2 +-
 ...ck-extend-guard-with-spinlock_bh-variants.patch | 12 +--
 ...rt-xhci-add-quirk-for-host-controllers-th.patch |  4 +-
 ...-for-all-the-downstream-rpi-sound-card-dr.patch |  2 +-
 ...ent-xhci_fixup_endpoint-for-interval-adju.patch |  4 +-
 ...rkaround-for-bogus-SET_DEQ_PENDING-endpoi.patch |  2 +-
 ...op-and-add-the-endpoint-context-in-xhci_f.patch |  2 +-
 ...Use-more-event-ring-segment-table-entries.patch |  2 +-
 ...-xhci-quirks-add-link-TRB-quirk-for-VL805.patch |  4 +-
 ...84-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch |  2 +-
 ...0-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch |  8 +-
 ...usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  4 +-
 ...-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch |  4 +-
 ...vmscan-Maintain-TLB-coherency-in-LRU-code.patch |  2 +-
 ...re-add-support-for-setting-NAK-enhancemen.patch |  4 +-
 ...-xhci-prevent-a-theoretical-race-on-non-c.patch |  2 +-
 ...-add-support-for-performing-fake-doorbell.patch |  6 +-
 ...conditional-threaded-NAPI-wakeup-based-on.patch |  6 +-
 ...Allow-to-use-SMP-threads-for-backlog-NAPI.patch | 22 +++---
 ...e-backlog-NAPI-to-clean-up-the-defer_list.patch |  2 +-
 ...v6.10-net-Rename-rps_lock-to-backlog_lock.patch | 18 ++---
 ...v6.11-net-Make-USO-depend-on-CSUM-offload.patch |  6 +-
 ...stats64-if-device-if-driver-is-configured.patch |  2 +-
 ...0-net-create-a-dummy-net_device-allocator.patch |  6 +-
 ...70-net-introduce-napi_is_scheduled-helper.patch |  2 +-
 ....11-net-free_netdev-exit-earlier-if-dummy.patch |  2 +-
 .../902-net-llc-reset-skb-transport_header.patch   | 52 -------------
 .../generic/hack-6.6/901-debloat_sock_diag.patch   |  2 +-
 .../linux/generic/hack-6.6/902-debloat_proc.patch  |  2 +-
 ...ft_set_hash-unaligned-atomic-read-on-stru.patch | 87 ----------------------
 .../pending-6.6/630-packet_socket_type.patch       | 16 ++--
 ...NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch |  2 +-
 ...2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch |  2 +-
 .../810-uvc-add-iPassion-iP2970-support.patch      |  2 +-
 .../825-i2c-MIPS-adds-ralink-I2C-driver.patch      |  2 +-
 .../patches-6.6/310-add-i2c-rtl9300-support.patch  |  2 +-
 ...sb-dwc3-add-optional-PHY-interface-clocks.patch |  4 +-
 ...-improve-performance-usb-using-lowmem-for.patch | 16 ++--
 39 files changed, 93 insertions(+), 232 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 6cee9d1e8c..1cda04d0c5 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .69
-LINUX_KERNEL_HASH-6.6.69 = 9c6305567b75d99514cde6eb9de39973f3d5c857a75bd9dcdfca57041f8d4f34
+LINUX_VERSION-6.6 = .70
+LINUX_KERNEL_HASH-6.6.70 = 84d23ee07fb26febbcb6d1295ba15efdc67ac382b4137b2c8853146c10fd2f97
diff --git a/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch b/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
index 25eb475e21..46c376e343 100644
--- a/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
+++ b/target/linux/airoha/patches-6.6/002-v6.11-i2c-mt7621-Add-Airoha-EN7581-i2c-support.patch
@@ -16,7 +16,7 @@ Signed-off-by: Andi Shyti <andi.shyti at kernel.org>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -839,7 +839,7 @@ config I2C_MT65XX
+@@ -841,7 +841,7 @@ config I2C_MT65XX
  
  config I2C_MT7621
  	tristate "MT7621/MT7628 I2C Controller"
diff --git a/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch b/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
index e613b69f81..d4905d5fff 100644
--- a/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
+++ b/target/linux/airoha/patches-6.6/200-spinlock-extend-guard-with-spinlock_bh-variants.patch
@@ -12,9 +12,9 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 
 --- a/include/linux/spinlock.h
 +++ b/include/linux/spinlock.h
-@@ -515,6 +515,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
- 		    raw_spin_lock_irq(_T->lock),
- 		    raw_spin_unlock_irq(_T->lock))
+@@ -519,6 +519,10 @@ DEFINE_LOCK_GUARD_1(raw_spinlock_irq, ra
+ 
+ DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irq, _try, raw_spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(raw_spinlock_bh, raw_spinlock_t,
 +		    raw_spin_lock_bh(_T->lock),
@@ -23,9 +23,9 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t,
  		    raw_spin_lock_irqsave(_T->lock, _T->flags),
  		    raw_spin_unlock_irqrestore(_T->lock, _T->flags),
-@@ -528,6 +532,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
- 		    spin_lock_irq(_T->lock),
- 		    spin_unlock_irq(_T->lock))
+@@ -540,6 +544,10 @@ DEFINE_LOCK_GUARD_1(spinlock_irq, spinlo
+ DEFINE_LOCK_GUARD_1_COND(spinlock_irq, _try,
+ 			 spin_trylock_irq(_T->lock))
  
 +DEFINE_LOCK_GUARD_1(spinlock_bh, spinlock_t,
 +		    spin_lock_bh(_T->lock),
diff --git a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
index f8aa2fe5a7..7dc38f0611 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch
@@ -28,7 +28,7 @@ We don't agree with upstream revert so undo it.
  		pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) {
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -633,8 +633,11 @@ static int xhci_move_dequeue_past_td(str
+@@ -634,8 +634,11 @@ static int xhci_move_dequeue_past_td(str
  	struct xhci_ring *ep_ring;
  	struct xhci_command *cmd;
  	struct xhci_segment *new_seg;
@@ -40,7 +40,7 @@ We don't agree with upstream revert so undo it.
  	dma_addr_t addr;
  	u64 hw_dequeue;
  	bool cycle_found = false;
-@@ -672,7 +675,27 @@ static int xhci_move_dequeue_past_td(str
+@@ -673,7 +676,27 @@ static int xhci_move_dequeue_past_td(str
  	hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
  	new_seg = ep_ring->deq_seg;
  	new_deq = ep_ring->dequeue;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
index ecb7bffa02..fe0e2275f1 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0106-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch
@@ -17583,7 +17583,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
  	 * For devices with more than one control interface, we assume the
 --- a/sound/usb/quirks.c
 +++ b/sound/usb/quirks.c
-@@ -2247,6 +2247,8 @@ static const struct usb_audio_quirk_flag
+@@ -2249,6 +2249,8 @@ static const struct usb_audio_quirk_flag
  		   QUIRK_FLAG_ALIGN_TRANSFER),
  	DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
  		   QUIRK_FLAG_ALIGN_TRANSFER),
diff --git a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
index 942f47a0a3..157fedf270 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0161-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch
@@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.org>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1497,6 +1497,109 @@ command_cleanup:
+@@ -1498,6 +1498,109 @@ command_cleanup:
  }
  
  /*
@@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.org>
   * non-error returns are a promise to giveback() the urb later
   * we drop ownership so next owner (or urb unlink) can get it
   */
-@@ -5347,6 +5450,7 @@ static const struct hc_driver xhci_hc_dr
+@@ -5360,6 +5463,7 @@ static const struct hc_driver xhci_hc_dr
  	.endpoint_reset =	xhci_endpoint_reset,
  	.check_bandwidth =	xhci_check_bandwidth,
  	.reset_bandwidth =	xhci_reset_bandwidth,
diff --git a/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch b/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
index 32681a1bc4..bae9286365 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0162-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch
@@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -738,9 +738,9 @@ deq_found:
+@@ -739,9 +739,9 @@ deq_found:
  	}
  
  	if ((ep->ep_state & SET_DEQ_PENDING)) {
diff --git a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
index 1e5bb6059d..70401f6e7b 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0163-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -1586,7 +1586,7 @@ static void xhci_fixup_endpoint(struct u
+@@ -1587,7 +1587,7 @@ static void xhci_fixup_endpoint(struct u
  		return;
  	}
  	ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index);
diff --git a/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch b/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
index ff8c9223b5..874725601c 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0481-xhci-Use-more-event-ring-segment-table-entries.patch
@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1425,8 +1425,9 @@ struct urb_priv {
+@@ -1426,8 +1426,9 @@ struct urb_priv {
   * Each segment table entry is 4*32bits long.  1K seems like an ok size:
   * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
   * meaning 64 ring segments.
diff --git a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
index 93e45b5442..5547943880 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
@@ -34,7 +34,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -728,6 +728,15 @@ static int xhci_move_dequeue_past_td(str
+@@ -729,6 +729,15 @@ static int xhci_move_dequeue_past_td(str
  	} while (!cycle_found || !td_last_trb_found);
  
  deq_found:
@@ -52,7 +52,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	addr = xhci_trb_virt_to_dma(new_seg, new_deq);
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1663,6 +1663,9 @@ struct xhci_hcd {
+@@ -1664,6 +1664,9 @@ struct xhci_hcd {
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
index add65ee641..a1e8f9ed22 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch
@@ -100,7 +100,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1665,6 +1665,7 @@ struct xhci_hcd {
+@@ -1666,6 +1666,7 @@ struct xhci_hcd {
  
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)
diff --git a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
index 9c45bd77e9..26abb99fe6 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch
@@ -75,7 +75,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3674,6 +3674,48 @@ static int xhci_align_td(struct xhci_hcd
+@@ -3714,6 +3714,48 @@ static int xhci_align_td(struct xhci_hcd
  	return 1;
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* This is very similar to what ehci-q.c qtd_fill() does */
  int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
  		struct urb *urb, int slot_id, unsigned int ep_index)
-@@ -3830,6 +3872,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3870,6 +3912,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  	}
  
  	check_trb_math(urb, enqd_len);
@@ -133,7 +133,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
  			start_cycle, start_trb);
  	return 0;
-@@ -3979,6 +4023,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -4019,6 +4063,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
  			/* Event on completion */
  			field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
  
@@ -144,7 +144,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  	return 0;
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1666,6 +1666,7 @@ struct xhci_hcd {
+@@ -1667,6 +1667,7 @@ struct xhci_hcd {
  /* Downstream VLI fixes */
  #define XHCI_AVOID_DQ_ON_LINK	BIT_ULL(56)
  #define XHCI_VLI_SS_BULK_OUT_BUG	BIT_ULL(57)
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index 551bfccc75..2448bd942a 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -333,7 +333,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* Global Debug LSP MUX Select */
  #define DWC3_GDBGLSPMUX_ENDBC		BIT(15)	/* Host only */
  #define DWC3_GDBGLSPMUX_HOSTSELECT(n)	((n) & 0x3fff)
-@@ -1062,6 +1065,7 @@ struct dwc3_scratchpad_array {
+@@ -1066,6 +1069,7 @@ struct dwc3_scratchpad_array {
   * @tx_max_burst_prd: max periodic ESS transmit burst size
   * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
   * @clear_stall_protocol: endpoint number that requires a delayed status phase
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1299,6 +1303,7 @@ struct dwc3 {
+@@ -1303,6 +1307,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
index 706baccdc7..6eb5e5697f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
@@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST	BIT(10)
  
  /* Global Status Register */
-@@ -1117,10 +1118,12 @@ struct dwc3_scratchpad_array {
+@@ -1121,10 +1122,12 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1347,6 +1350,7 @@ struct dwc3 {
+@@ -1351,6 +1354,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch b/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
index 70ece97505..3c60865aa7 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1261-mm-vmscan-Maintain-TLB-coherency-in-LRU-code.patch
@@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/mm/vmscan.c
 +++ b/mm/vmscan.c
-@@ -4716,7 +4716,7 @@ void lru_gen_look_around(struct page_vma
+@@ -4723,7 +4723,7 @@ void lru_gen_look_around(struct page_vma
  		if (!folio)
  			continue;
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
index ed7dbb0e6c..cb4f6deb39 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS		BIT(17)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS		BIT(16)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS	BIT(15)
-@@ -1118,6 +1120,8 @@ struct dwc3_scratchpad_array {
+@@ -1122,6 +1124,8 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -66,7 +66,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
   *			Superspeed instances.
   * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1348,6 +1352,8 @@ struct dwc3 {
+@@ -1352,6 +1356,8 @@ struct dwc3 {
  	unsigned		dis_tx_ipgap_linecheck_quirk:1;
  	unsigned		resume_hs_terminations:1;
  	unsigned		ulpi_ext_vbus_drv:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch b/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
index d3ea1041c2..c2f37a0fc1 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1361-drivers-usb-xhci-prevent-a-theoretical-race-on-non-c.patch
@@ -28,7 +28,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
 
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -505,6 +505,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
+@@ -506,6 +506,19 @@ void xhci_ring_ep_doorbell(struct xhci_h
  
  	trace_xhci_ring_ep_doorbell(slot_id, DB_VALUE(ep_index, stream_id));
  
diff --git a/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
index 7ac12a290f..aef8435148 100644
--- a/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
+++ b/target/linux/bcm53xx/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
@@ -35,7 +35,7 @@ it on BCM4708 family.
  /* called during probe() after chip reset completes */
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -161,6 +161,49 @@ int xhci_start(struct xhci_hcd *xhci)
+@@ -162,6 +162,49 @@ int xhci_start(struct xhci_hcd *xhci)
  	return ret;
  }
  
@@ -85,7 +85,7 @@ it on BCM4708 family.
  /*
   * Reset a halted HC.
   *
-@@ -480,6 +523,15 @@ static int xhci_run_finished(struct xhci
+@@ -481,6 +524,15 @@ static int xhci_run_finished(struct xhci
  		return -ENODEV;
  	}
  
@@ -103,7 +103,7 @@ it on BCM4708 family.
  	if (xhci->quirks & XHCI_NEC_HOST)
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1661,6 +1661,7 @@ struct xhci_hcd {
+@@ -1662,6 +1662,7 @@ struct xhci_hcd {
  #define XHCI_WRITE_64_HI_LO	BIT_ULL(47)
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
diff --git a/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch b/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
index 6ee4716c5c..a6164c8238 100644
--- a/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
+++ b/target/linux/generic/backport-6.6/600-v6.10-net-Remove-conditional-threaded-NAPI-wakeup-based-on.patch
@@ -32,7 +32,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -4481,13 +4481,7 @@ static inline void ____napi_schedule(str
+@@ -4483,13 +4483,7 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -47,7 +47,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			wake_up_process(thread);
  			return;
  		}
-@@ -6643,8 +6637,6 @@ static int napi_poll(struct napi_struct
+@@ -6645,8 +6639,6 @@ static int napi_poll(struct napi_struct
  
  static int napi_thread_wait(struct napi_struct *napi)
  {
@@ -56,7 +56,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	set_current_state(TASK_INTERRUPTIBLE);
  
  	while (!kthread_should_stop()) {
-@@ -6653,15 +6645,13 @@ static int napi_thread_wait(struct napi_
+@@ -6655,15 +6647,13 @@ static int napi_thread_wait(struct napi_
  		 * Testing SCHED bit is not enough because SCHED bit might be
  		 * set by some other busy poll thread or by napi_disable().
  		 */
diff --git a/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch b/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
index 8c0b41f37b..b3729e8b6c 100644
--- a/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
+++ b/target/linux/generic/backport-6.6/601-v6.10-net-Allow-to-use-SMP-threads-for-backlog-NAPI.patch
@@ -108,7 +108,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  static inline void rps_lock_irqsave(struct softnet_data *sd,
  				    unsigned long *flags)
  {
-@@ -4449,6 +4475,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
+@@ -4451,6 +4477,7 @@ EXPORT_SYMBOL(__dev_direct_xmit);
  /*************************************************************************
   *			Receiver routines
   *************************************************************************/
@@ -116,7 +116,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  int netdev_max_backlog __read_mostly = 1000;
  EXPORT_SYMBOL(netdev_max_backlog);
-@@ -4481,12 +4508,16 @@ static inline void ____napi_schedule(str
+@@ -4483,12 +4510,16 @@ static inline void ____napi_schedule(str
  		 */
  		thread = READ_ONCE(napi->thread);
  		if (thread) {
@@ -133,7 +133,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	list_add_tail(&napi->poll_list, &sd->poll_list);
  	WRITE_ONCE(napi->list_owner, smp_processor_id());
  	/* If not called from net_rx_action()
-@@ -4732,6 +4763,11 @@ static void napi_schedule_rps(struct sof
+@@ -4734,6 +4765,11 @@ static void napi_schedule_rps(struct sof
  
  #ifdef CONFIG_RPS
  	if (sd != mysd) {
@@ -145,7 +145,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		sd->rps_ipi_next = mysd->rps_ipi_list;
  		mysd->rps_ipi_list = sd;
  
-@@ -5955,7 +5991,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5957,7 +5993,7 @@ static void net_rps_action_and_irq_enabl
  #ifdef CONFIG_RPS
  	struct softnet_data *remsd = sd->rps_ipi_list;
  
@@ -154,7 +154,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		sd->rps_ipi_list = NULL;
  
  		local_irq_enable();
-@@ -5970,7 +6006,7 @@ static void net_rps_action_and_irq_enabl
+@@ -5972,7 +6008,7 @@ static void net_rps_action_and_irq_enabl
  static bool sd_has_rps_ipi_waiting(struct softnet_data *sd)
  {
  #ifdef CONFIG_RPS
@@ -163,7 +163,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  #else
  	return false;
  #endif
-@@ -6014,7 +6050,7 @@ static int process_backlog(struct napi_s
+@@ -6016,7 +6052,7 @@ static int process_backlog(struct napi_s
  			 * We can use a plain write instead of clear_bit(),
  			 * and we dont need an smp_mb() memory barrier.
  			 */
@@ -172,7 +172,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			again = false;
  		} else {
  			skb_queue_splice_tail_init(&sd->input_pkt_queue,
-@@ -6680,43 +6716,48 @@ static void skb_defer_free_flush(struct
+@@ -6682,43 +6718,48 @@ static void skb_defer_free_flush(struct
  	}
  }
  
@@ -250,7 +250,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	return 0;
  }
  
-@@ -11297,7 +11338,7 @@ static int dev_cpu_dead(unsigned int old
+@@ -11299,7 +11340,7 @@ static int dev_cpu_dead(unsigned int old
  
  		list_del_init(&napi->poll_list);
  		if (napi->poll == process_backlog)
@@ -259,7 +259,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		else
  			____napi_schedule(sd, napi);
  	}
-@@ -11305,12 +11346,14 @@ static int dev_cpu_dead(unsigned int old
+@@ -11307,12 +11348,14 @@ static int dev_cpu_dead(unsigned int old
  	raise_softirq_irqoff(NET_TX_SOFTIRQ);
  	local_irq_enable();
  
@@ -278,7 +278,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	/* Process offline CPU's input_pkt_queue */
  	while ((skb = __skb_dequeue(&oldsd->process_queue))) {
-@@ -11573,6 +11616,38 @@ static struct pernet_operations __net_in
+@@ -11575,6 +11618,38 @@ static struct pernet_operations __net_in
   *
   */
  
@@ -317,7 +317,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  /*
   *       This is called single threaded during boot, so no need
   *       to take the rtnl semaphore.
-@@ -11623,7 +11698,10 @@ static int __init net_dev_init(void)
+@@ -11625,7 +11700,10 @@ static int __init net_dev_init(void)
  		init_gro_hash(&sd->backlog);
  		sd->backlog.poll = process_backlog;
  		sd->backlog.weight = weight_p;
diff --git a/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch b/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
index 3fcc72e589..82b83552d3 100644
--- a/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
+++ b/target/linux/generic/backport-6.6/602-v6.10-net-Use-backlog-NAPI-to-clean-up-the-defer_list.patch
@@ -82,7 +82,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		spin_unlock_irq(&sd->input_pkt_queue.lock);
  	else if (!IS_ENABLED(CONFIG_PREEMPT_RT))
  		local_irq_enable();
-@@ -4782,6 +4782,23 @@ static void napi_schedule_rps(struct sof
+@@ -4784,6 +4784,23 @@ static void napi_schedule_rps(struct sof
  	__napi_schedule_irqoff(&mysd->backlog);
  }
  
diff --git a/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch b/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
index 056bd5686e..a6199cd250 100644
--- a/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
+++ b/target/linux/generic/backport-6.6/603-v6.10-net-Rename-rps_lock-to-backlog_lock.patch
@@ -67,7 +67,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  {
  	if (IS_ENABLED(CONFIG_RPS) || use_backlog_threads())
  		spin_unlock_irq(&sd->input_pkt_queue.lock);
-@@ -4787,12 +4787,12 @@ void kick_defer_list_purge(struct softne
+@@ -4789,12 +4789,12 @@ void kick_defer_list_purge(struct softne
  	unsigned long flags;
  
  	if (use_backlog_threads()) {
@@ -82,7 +82,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	} else if (!cmpxchg(&sd->defer_ipi_scheduled, 0, 1)) {
  		smp_call_function_single_async(cpu, &sd->defer_csd);
-@@ -4854,7 +4854,7 @@ static int enqueue_to_backlog(struct sk_
+@@ -4856,7 +4856,7 @@ static int enqueue_to_backlog(struct sk_
  	reason = SKB_DROP_REASON_NOT_SPECIFIED;
  	sd = &per_cpu(softnet_data, cpu);
  
@@ -91,7 +91,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	if (!netif_running(skb->dev))
  		goto drop;
  	qlen = skb_queue_len(&sd->input_pkt_queue);
-@@ -4863,7 +4863,7 @@ static int enqueue_to_backlog(struct sk_
+@@ -4865,7 +4865,7 @@ static int enqueue_to_backlog(struct sk_
  enqueue:
  			__skb_queue_tail(&sd->input_pkt_queue, skb);
  			input_queue_tail_incr_save(sd, qtail);
@@ -100,7 +100,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  			return NET_RX_SUCCESS;
  		}
  
-@@ -4878,7 +4878,7 @@ enqueue:
+@@ -4880,7 +4880,7 @@ enqueue:
  
  drop:
  	sd->dropped++;
@@ -109,7 +109,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	dev_core_stats_rx_dropped_inc(skb->dev);
  	kfree_skb_reason(skb, reason);
-@@ -5909,7 +5909,7 @@ static void flush_backlog(struct work_st
+@@ -5911,7 +5911,7 @@ static void flush_backlog(struct work_st
  	local_bh_disable();
  	sd = this_cpu_ptr(&softnet_data);
  
@@ -118,7 +118,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  	skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) {
  		if (skb->dev->reg_state == NETREG_UNREGISTERING) {
  			__skb_unlink(skb, &sd->input_pkt_queue);
-@@ -5917,7 +5917,7 @@ static void flush_backlog(struct work_st
+@@ -5919,7 +5919,7 @@ static void flush_backlog(struct work_st
  			input_queue_head_incr(sd);
  		}
  	}
@@ -127,7 +127,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	skb_queue_walk_safe(&sd->process_queue, skb, tmp) {
  		if (skb->dev->reg_state == NETREG_UNREGISTERING) {
-@@ -5935,14 +5935,14 @@ static bool flush_required(int cpu)
+@@ -5937,14 +5937,14 @@ static bool flush_required(int cpu)
  	struct softnet_data *sd = &per_cpu(softnet_data, cpu);
  	bool do_flush;
  
@@ -144,7 +144,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  
  	return do_flush;
  #endif
-@@ -6057,7 +6057,7 @@ static int process_backlog(struct napi_s
+@@ -6059,7 +6059,7 @@ static int process_backlog(struct napi_s
  
  		}
  
@@ -153,7 +153,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  		if (skb_queue_empty(&sd->input_pkt_queue)) {
  			/*
  			 * Inline a custom version of __napi_complete().
-@@ -6073,7 +6073,7 @@ static int process_backlog(struct napi_s
+@@ -6075,7 +6075,7 @@ static int process_backlog(struct napi_s
  			skb_queue_splice_tail_init(&sd->input_pkt_queue,
  						   &sd->process_queue);
  		}
diff --git a/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
index 42aff7f0af..6b5272d583 100644
--- a/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
+++ b/target/linux/generic/backport-6.6/611-02-v6.11-net-Make-USO-depend-on-CSUM-offload.patch
@@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -9759,6 +9759,15 @@ static void netdev_sync_lower_features(s
+@@ -9761,6 +9761,15 @@ static void netdev_sync_lower_features(s
  	}
  }
  
@@ -36,7 +36,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static netdev_features_t netdev_fix_features(struct net_device *dev,
  	netdev_features_t features)
  {
-@@ -9840,15 +9849,9 @@ static netdev_features_t netdev_fix_feat
+@@ -9842,15 +9851,9 @@ static netdev_features_t netdev_fix_feat
  		features &= ~NETIF_F_LRO;
  	}
  
@@ -55,7 +55,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	}
  
  	if ((features & NETIF_F_HW_TLS_RX) && !(features & NETIF_F_RXCSUM)) {
-@@ -9856,6 +9859,11 @@ static netdev_features_t netdev_fix_feat
+@@ -9858,6 +9861,11 @@ static netdev_features_t netdev_fix_feat
  		features &= ~NETIF_F_HW_TLS_RX;
  	}
  
diff --git a/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch b/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
index d72882dbb6..8f2c26d654 100644
--- a/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
+++ b/target/linux/generic/backport-6.6/612-v6.9-net-get-stats64-if-device-if-driver-is-configured.patch
@@ -18,7 +18,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10666,6 +10666,8 @@ struct rtnl_link_stats64 *dev_get_stats(
+@@ -10668,6 +10668,8 @@ struct rtnl_link_stats64 *dev_get_stats(
  		ops->ndo_get_stats64(dev, storage);
  	} else if (ops->ndo_get_stats) {
  		netdev_stats_to_stats64(storage, ops->ndo_get_stats(dev));
diff --git a/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch b/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
index 3f48a8c34a..c8b4ccc300 100644
--- a/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
+++ b/target/linux/generic/backport-6.6/700-v6.10-net-create-a-dummy-net_device-allocator.patch
@@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  				    unsigned char name_assign_type,
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10353,25 +10353,12 @@ err_free_name:
+@@ -10355,25 +10355,12 @@ err_free_name:
  }
  EXPORT_SYMBOL(register_netdevice);
  
@@ -79,7 +79,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  	/* make sure we BUG if trying to hit standard
  	 * register/unregister code path
  	 */
-@@ -10391,12 +10378,32 @@ int init_dummy_netdev(struct net_device
+@@ -10393,12 +10380,32 @@ int init_dummy_netdev(struct net_device
  	 * because users of this 'device' dont need to change
  	 * its refcount.
  	 */
@@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  /**
   *	register_netdev	- register a network device
   *	@dev: device to register
-@@ -10990,6 +10997,19 @@ void free_netdev(struct net_device *dev)
+@@ -10992,6 +10999,19 @@ void free_netdev(struct net_device *dev)
  EXPORT_SYMBOL(free_netdev);
  
  /**
diff --git a/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch b/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
index d7b2b27506..2bf136e18a 100644
--- a/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
+++ b/target/linux/generic/backport-6.6/770-net-introduce-napi_is_scheduled-helper.patch
@@ -85,7 +85,7 @@ Signed-off-by: Paolo Abeni <pabeni at redhat.com>
  /**
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -6610,7 +6610,7 @@ static int __napi_poll(struct napi_struc
+@@ -6612,7 +6612,7 @@ static int __napi_poll(struct napi_struc
  	 * accidentally calling ->poll() when NAPI is not scheduled.
  	 */
  	work = 0;
diff --git a/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch b/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
index 21db87419e..5f7210812f 100644
--- a/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
+++ b/target/linux/generic/backport-6.6/900-v6.11-net-free_netdev-exit-earlier-if-dummy.patch
@@ -23,7 +23,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
 
 --- a/net/core/dev.c
 +++ b/net/core/dev.c
-@@ -10983,7 +10983,8 @@ void free_netdev(struct net_device *dev)
+@@ -10985,7 +10985,8 @@ void free_netdev(struct net_device *dev)
  	dev->xdp_bulkq = NULL;
  
  	/*  Compatibility with error handling in drivers */
diff --git a/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch b/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch
deleted file mode 100644
index b1f0b8fce7..0000000000
--- a/target/linux/generic/backport-6.6/902-net-llc-reset-skb-transport_header.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From a024e377efed31ecfb39210bed562932321345b3 Mon Sep 17 00:00:00 2001
-From: Antonio Pastor <antonio.pastor at gmail.com>
-Date: Tue, 24 Dec 2024 20:07:20 -0500
-Subject: [PATCH] net: llc: reset skb->transport_header
-
-802.2+LLC+SNAP frames received by napi_complete_done with GRO and DSA
-have skb->transport_header set two bytes short, or pointing 2 bytes
-before network_header & skb->data. As snap_rcv expects transport_header
-to point to SNAP header (OID:PID) after LLC processing advances offset
-over LLC header (llc_rcv & llc_fixup_skb), code doesn't find a match
-and packet is dropped.
-
-Between napi_complete_done and snap_rcv, transport_header is not used
-until __netif_receive_skb_core, where originally it was being reset.
-Commit fda55eca5a33 ("net: introduce skb_transport_header_was_set()")
-only does so if not set, on the assumption the value was set correctly
-by GRO (and also on assumption that "network stacks usually reset the
-transport header anyway"). Afterwards it is moved forward by
-llc_fixup_skb.
-
-Locally generated traffic shows up at __netif_receive_skb_core with no
-transport_header set and is processed without issue. On a setup with
-GRO but no DSA, transport_header and network_header are both set to
-point to skb->data which is also correct.
-
-As issue is LLC specific, to avoid impacting non-LLC traffic, and to
-follow up on original assumption made on previous code change,
-llc_fixup_skb to reset the offset after skb pull. llc_fixup_skb
-assumes the LLC header is at skb->data, and by definition SNAP header
-immediately follows.
-
-Fixes: fda55eca5a33 ("net: introduce skb_transport_header_was_set()")
-Signed-off-by: Antonio Pastor <antonio.pastor at gmail.com>
-Reviewed-by: Eric Dumazet <edumazet at google.com>
-Link: https://patch.msgid.link/20241225010723.2830290-1-antonio.pastor at gmail.com
-Signed-off-by: Jakub Kicinski <kuba at kernel.org>
----
- net/llc/llc_input.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/net/llc/llc_input.c
-+++ b/net/llc/llc_input.c
-@@ -124,8 +124,8 @@ static inline int llc_fixup_skb(struct s
- 	if (unlikely(!pskb_may_pull(skb, llc_len)))
- 		return 0;
- 
--	skb->transport_header += llc_len;
- 	skb_pull(skb, llc_len);
-+	skb_reset_transport_header(skb);
- 	if (skb->protocol == htons(ETH_P_802_2)) {
- 		__be16 pdulen;
- 		s32 data_size;
diff --git a/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch b/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
index 4b1ea3c5ad..c0ba6c008e 100644
--- a/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
+++ b/target/linux/generic/hack-6.6/901-debloat_sock_diag.patch
@@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  INDIRECT_CALLABLE_DECLARE(struct dst_entry *ip6_dst_check(struct dst_entry *,
  							  u32));
  INDIRECT_CALLABLE_DECLARE(struct dst_entry *ipv4_dst_check(struct dst_entry *,
-@@ -2239,9 +2256,11 @@ static void __sk_free(struct sock *sk)
+@@ -2242,9 +2259,11 @@ static void __sk_free(struct sock *sk)
  	if (likely(sk->sk_net_refcnt))
  		sock_inuse_add(sock_net(sk), -1);
  
diff --git a/target/linux/generic/hack-6.6/902-debloat_proc.patch b/target/linux/generic/hack-6.6/902-debloat_proc.patch
index 5498507007..8a2f3330ab 100644
--- a/target/linux/generic/hack-6.6/902-debloat_proc.patch
+++ b/target/linux/generic/hack-6.6/902-debloat_proc.patch
@@ -330,7 +330,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
 --- a/net/core/sock.c
 +++ b/net/core/sock.c
-@@ -4140,6 +4140,8 @@ static __net_initdata struct pernet_oper
+@@ -4143,6 +4143,8 @@ static __net_initdata struct pernet_oper
  
  static int __init proto_init(void)
  {
diff --git a/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch b/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch
deleted file mode 100644
index 61e163293e..0000000000
--- a/target/linux/generic/pending-6.6/605-netfilter-nft_set_hash-unaligned-atomic-read-on-stru.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 113fb8a8d1f27156f58b27ce0fc02af9b3705bf7 Mon Sep 17 00:00:00 2001
-From: Pablo Neira Ayuso <pablo at netfilter.org>
-Date: Sun, 22 Dec 2024 11:02:39 +0100
-Subject: [PATCH] netfilter: nft_set_hash: unaligned atomic read on struct
- nft_set_ext
-
-Access to genmask field in struct nft_set_ext results in unaligned
-atomic read:
-
-[   72.130109] Unable to handle kernel paging request at virtual address ffff0000c2bb708c
-[   72.131036] Mem abort info:
-[   72.131213]   ESR = 0x0000000096000021
-[   72.131446]   EC = 0x25: DABT (current EL), IL = 32 bits
-[   72.132209]   SET = 0, FnV = 0
-[   72.133216]   EA = 0, S1PTW = 0
-[   72.134080]   FSC = 0x21: alignment fault
-[   72.135593] Data abort info:
-[   72.137194]   ISV = 0, ISS = 0x00000021, ISS2 = 0x00000000
-[   72.142351]   CM = 0, WnR = 0, TnD = 0, TagAccess = 0
-[   72.145989]   GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
-[   72.150115] swapper pgtable: 4k pages, 48-bit VAs, pgdp=0000000237d27000
-[   72.154893] [ffff0000c2bb708c] pgd=0000000000000000, p4d=180000023ffff403, pud=180000023f84b403, pmd=180000023f835403,
-+pte=0068000102bb7707
-[   72.163021] Internal error: Oops: 0000000096000021 [#1] SMP
-[...]
-[   72.170041] CPU: 7 UID: 0 PID: 54 Comm: kworker/7:0 Tainted: G            E      6.13.0-rc3+ #2
-[   72.170509] Tainted: [E]=UNSIGNED_MODULE
-[   72.170720] Hardware name: QEMU QEMU Virtual Machine, BIOS edk2-stable202302-for-qemu 03/01/2023
-[   72.171192] Workqueue: events_power_efficient nft_rhash_gc [nf_tables]
-[   72.171552] pstate: 21400005 (nzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
-[   72.171915] pc : nft_rhash_gc+0x200/0x2d8 [nf_tables]
-[   72.172166] lr : nft_rhash_gc+0x128/0x2d8 [nf_tables]
-[   72.172546] sp : ffff800081f2bce0
-[   72.172724] x29: ffff800081f2bd40 x28: ffff0000c2bb708c x27: 0000000000000038
-[   72.173078] x26: ffff0000c6780ef0 x25: ffff0000c643df00 x24: ffff0000c6778f78
-[   72.173431] x23: 000000000000001a x22: ffff0000c4b1f000 x21: ffff0000c6780f78
-[   72.173782] x20: ffff0000c2bb70dc x19: ffff0000c2bb7080 x18: 0000000000000000
-[   72.174135] x17: ffff0000c0a4e1c0 x16: 0000000000003000 x15: 0000ac26d173b978
-[   72.174485] x14: ffffffffffffffff x13: 0000000000000030 x12: ffff0000c6780ef0
-[   72.174841] x11: 0000000000000000 x10: ffff800081f2bcf8 x9 : ffff0000c3000000
-[   72.175193] x8 : 00000000000004be x7 : 0000000000000000 x6 : 0000000000000000
-[   72.175544] x5 : 0000000000000040 x4 : ffff0000c3000010 x3 : 0000000000000000
-[   72.175871] x2 : 0000000000003a98 x1 : ffff0000c2bb708c x0 : 0000000000000004
-[   72.176207] Call trace:
-[   72.176316]  nft_rhash_gc+0x200/0x2d8 [nf_tables] (P)
-[   72.176653]  process_one_work+0x178/0x3d0
-[   72.176831]  worker_thread+0x200/0x3f0
-[   72.176995]  kthread+0xe8/0xf8
-[   72.177130]  ret_from_fork+0x10/0x20
-[   72.177289] Code: 54fff984 d503201f d2800080 91003261 (f820303f)
-[   72.177557] ---[ end trace 0000000000000000 ]---
-
-Align struct nft_set_ext to word size to address this and
-documentation it.
-
-pahole reports that this increases the size of elements for rhash and
-pipapo in 8 bytes on x86_64.
-
-Fixes: 7ffc7481153b ("netfilter: nft_set_hash: skip duplicated elements pending gc run")
-Signed-off-by: Pablo Neira Ayuso <pablo at netfilter.org>
----
- include/net/netfilter/nf_tables.h | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/include/net/netfilter/nf_tables.h
-+++ b/include/net/netfilter/nf_tables.h
-@@ -721,15 +721,18 @@ struct nft_set_ext_tmpl {
- /**
-  *	struct nft_set_ext - set extensions
-  *
-- *	@genmask: generation mask
-+ *	@genmask: generation mask, but also flags (see NFT_SET_ELEM_DEAD_BIT)
-  *	@offset: offsets of individual extension types
-  *	@data: beginning of extension data
-+ *
-+ *	This structure must be aligned to word size, otherwise atomic bitops
-+ *	on genmask field can cause aligment failure on some archs.
-  */
- struct nft_set_ext {
- 	u8	genmask;
- 	u8	offset[NFT_SET_EXT_NUM];
- 	char	data[];
--};
-+} __aligned(BITS_PER_LONG / 8);
- 
- static inline void nft_set_ext_prepare(struct nft_set_ext_tmpl *tmpl)
- {
diff --git a/target/linux/generic/pending-6.6/630-packet_socket_type.patch b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
index 2b753efa67..f5c15756c5 100644
--- a/target/linux/generic/pending-6.6/630-packet_socket_type.patch
+++ b/target/linux/generic/pending-6.6/630-packet_socket_type.patch
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  #define PACKET_FANOUT_LB		1
 --- a/net/packet/af_packet.c
 +++ b/net/packet/af_packet.c
-@@ -1925,6 +1925,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1911,6 +1911,7 @@ static int packet_rcv_spkt(struct sk_buf
  {
  	struct sock *sk;
  	struct sockaddr_pkt *spkt;
@@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	/*
  	 *	When we registered the protocol we saved the socket in the data
-@@ -1932,6 +1933,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1918,6 +1919,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 */
  
  	sk = pt->af_packet_priv;
@@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	/*
  	 *	Yank back the headers [hope the device set this
-@@ -1944,7 +1946,7 @@ static int packet_rcv_spkt(struct sk_buf
+@@ -1930,7 +1932,7 @@ static int packet_rcv_spkt(struct sk_buf
  	 *	so that this procedure is noop.
  	 */
  
@@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  		goto out;
  
  	if (!net_eq(dev_net(dev), sock_net(sk)))
-@@ -2190,12 +2192,12 @@ static int packet_rcv(struct sk_buff *sk
+@@ -2176,12 +2178,12 @@ static int packet_rcv(struct sk_buff *sk
  	unsigned int snaplen, res;
  	bool is_drop_n_account = false;
  
@@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -2322,12 +2324,12 @@ static int tpacket_rcv(struct sk_buff *s
+@@ -2308,12 +2310,12 @@ static int tpacket_rcv(struct sk_buff *s
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
  	BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
  
@@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	if (!net_eq(dev_net(dev), sock_net(sk)))
  		goto drop;
  
-@@ -3451,6 +3453,7 @@ static int packet_create(struct net *net
+@@ -3437,6 +3439,7 @@ static int packet_create(struct net *net
  	mutex_init(&po->pg_vec_lock);
  	po->rollover = NULL;
  	po->prot_hook.func = packet_rcv;
@@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  
  	if (sock->type == SOCK_PACKET)
  		po->prot_hook.func = packet_rcv_spkt;
-@@ -4118,6 +4121,16 @@ packet_setsockopt(struct socket *sock, i
+@@ -4104,6 +4107,16 @@ packet_setsockopt(struct socket *sock, i
  		packet_sock_flag_set(po, PACKET_SOCK_QDISC_BYPASS, val);
  		return 0;
  	}
@@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	default:
  		return -ENOPROTOOPT;
  	}
-@@ -4177,6 +4190,13 @@ static int packet_getsockopt(struct sock
+@@ -4163,6 +4176,13 @@ static int packet_getsockopt(struct sock
  	case PACKET_VNET_HDR_SZ:
  		val = READ_ONCE(po->vnet_hdr_sz);
  		break;
diff --git a/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
index 97e321bfec..58ccff247f 100644
--- a/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
+++ b/target/linux/generic/pending-6.6/681-net-remove-NETIF_F_GSO_FRAGLIST-from-NETIF_F_GSO_SOF.patch
@@ -96,7 +96,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
  	return features;
 --- a/net/core/sock.c
 +++ b/net/core/sock.c
-@@ -2441,7 +2441,7 @@ void sk_setup_caps(struct sock *sk, stru
+@@ -2444,7 +2444,7 @@ void sk_setup_caps(struct sock *sk, stru
  	if (sk_is_tcp(sk))
  		sk->sk_route_caps |= NETIF_F_GSO;
  	if (sk->sk_route_caps & NETIF_F_GSO)
diff --git a/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch b/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
index 1f2f5139d6..73eb59f166 100644
--- a/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
+++ b/target/linux/lantiq/patches-6.6/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch
@@ -18,7 +18,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -817,6 +817,16 @@ config I2C_MICROCHIP_CORE
+@@ -819,6 +819,16 @@ config I2C_MICROCHIP_CORE
  	  This driver can also be built as a module. If so, the module will be
  	  called i2c-microchip-core.
  
diff --git a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
index c98aaf9442..a01911b1f4 100644
--- a/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
+++ b/target/linux/ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch
@@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 
 --- a/drivers/media/usb/uvc/uvc_driver.c
 +++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -3249,6 +3249,18 @@ static const struct usb_device_id uvc_id
+@@ -3271,6 +3271,18 @@ static const struct usb_device_id uvc_id
  	  .bInterfaceSubClass	= 1,
  	  .bInterfaceProtocol	= 0,
  	  .driver_info		= UVC_INFO_META(V4L2_META_FMT_D4XX) },
diff --git a/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
index c8cfb784ce..9755eeb777 100644
--- a/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
+++ b/target/linux/ramips/patches-6.6/825-i2c-MIPS-adds-ralink-I2C-driver.patch
@@ -45,7 +45,7 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 +};
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -1021,6 +1021,11 @@ config I2C_RK3X
+@@ -1023,6 +1023,11 @@ config I2C_RK3X
  	  This driver can also be built as a module. If so, the module will
  	  be called i2c-rk3x.
  
diff --git a/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch b/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
index 71df91bdac..9eaed95d0d 100644
--- a/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
+++ b/target/linux/realtek/patches-6.6/310-add-i2c-rtl9300-support.patch
@@ -17,7 +17,7 @@ Submitted-by: Birger Koblitz <git at birger-koblitz.de>
 
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
-@@ -1021,6 +1021,16 @@ config I2C_RK3X
+@@ -1023,6 +1023,16 @@ config I2C_RK3X
  	  This driver can also be built as a module. If so, the module will
  	  be called i2c-rk3x.
  
diff --git a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
index 00ca1d4013..d38d260ef1 100644
--- a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
+++ b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
@@ -71,7 +71,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
  
 --- a/drivers/usb/dwc3/core.h
 +++ b/drivers/usb/dwc3/core.h
-@@ -998,6 +998,8 @@ struct dwc3_scratchpad_array {
+@@ -1002,6 +1002,8 @@ struct dwc3_scratchpad_array {
   * @bus_clk: clock for accessing the registers
   * @ref_clk: reference clock
   * @susp_clk: clock used when the SS phy is in low power (S3) state
@@ -80,7 +80,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
   * @reset: reset control
   * @regs: base address for our registers
   * @regs_size: address space size
-@@ -1170,6 +1172,8 @@ struct dwc3 {
+@@ -1174,6 +1176,8 @@ struct dwc3 {
  	struct clk		*bus_clk;
  	struct clk		*ref_clk;
  	struct clk		*susp_clk;
diff --git a/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch b/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
index 847b8e20ff..4c1dfabd9e 100644
--- a/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
+++ b/target/linux/starfive/patches-6.6/0109-usb-xhci-To-improve-performance-usb-using-lowmem-for.patch
@@ -160,7 +160,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  	}
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3667,7 +3667,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3707,7 +3707,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  
  	full_len = urb->transfer_buffer_length;
  	/* If we have scatter/gather list, we use it. */
@@ -172,7 +172,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  		addr = (u64) sg_dma_address(sg);
 --- a/drivers/usb/host/xhci.c
 +++ b/drivers/usb/host/xhci.c
-@@ -18,6 +18,8 @@
+@@ -19,6 +19,8 @@
  #include <linux/slab.h>
  #include <linux/dmi.h>
  #include <linux/dma-mapping.h>
@@ -181,7 +181,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  
  #include "xhci.h"
  #include "xhci-trace.h"
-@@ -1285,6 +1287,55 @@ static void xhci_unmap_temp_buf(struct u
+@@ -1286,6 +1288,55 @@ static void xhci_unmap_temp_buf(struct u
  	urb->transfer_buffer = NULL;
  }
  
@@ -237,7 +237,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /*
   * Bypass the DMA mapping if URB is suitable for Immediate Transfer (IDT),
   * we'll copy the actual data into the TRB address register. This is limited to
-@@ -1305,9 +1356,11 @@ static int xhci_map_urb_for_dma(struct u
+@@ -1306,9 +1357,11 @@ static int xhci_map_urb_for_dma(struct u
  		if (xhci_urb_temp_buffer_required(hcd, urb))
  			return xhci_map_temp_buffer(hcd, urb);
  	}
@@ -249,7 +249,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  static void xhci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  {
  	struct xhci_hcd *xhci;
-@@ -1320,8 +1373,10 @@ static void xhci_unmap_urb_for_dma(struc
+@@ -1321,8 +1374,10 @@ static void xhci_unmap_urb_for_dma(struc
  
  	if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf)
  		xhci_unmap_temp_buf(hcd, urb);
@@ -263,7 +263,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /**
 --- a/drivers/usb/host/xhci.h
 +++ b/drivers/usb/host/xhci.h
-@@ -1508,6 +1508,13 @@ struct xhci_hub {
+@@ -1509,6 +1509,13 @@ struct xhci_hub {
  	u8			min_rev;
  };
  
@@ -277,7 +277,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  /* There is one xhci_hcd structure per controller */
  struct xhci_hcd {
  	struct usb_hcd *main_hcd;
-@@ -1662,6 +1669,8 @@ struct xhci_hcd {
+@@ -1663,6 +1670,8 @@ struct xhci_hcd {
  #define XHCI_CDNS_SCTX_QUIRK	BIT_ULL(48)
  #define XHCI_ETRON_HOST	BIT_ULL(49)
  
@@ -286,7 +286,7 @@ Signed-off-by: minda.chen <minda.chen at starfivetech.com>
  	unsigned int		num_active_eps;
  	unsigned int		limit_active_eps;
  	struct xhci_port	*hw_ports;
-@@ -1691,6 +1700,8 @@ struct xhci_hcd {
+@@ -1692,6 +1701,8 @@ struct xhci_hcd {
  	struct list_head	regset_list;
  
  	void			*dbc;



From lede-commits at lists.infradead.org  Sun Jan 12 22:49:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 01:49:42 -0500
Subject: [openwrt/openwrt]  hostapd: backport upstream patch to fix setting
 BSS color
In-Reply-To: <173675098235.2106527.5899962988536206874@git-01.infra.openwrt.org>
References: <173675098235.2106527.5899962988536206874@git-01.infra.openwrt.org>
Message-ID: <mailman.37843.1736750988.1089.lede-commits@lists.infradead.org>

ynezz pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5ce1af9539da667f62dc3cb426f9ec36e53fb54e

commit 5ce1af9539da667f62dc3cb426f9ec36e53fb54e
Author: Rany Hany <rany_hany at riseup.net>
AuthorDate: Sun Jan 12 22:41:48 2025 +0000

    hostapd: backport upstream patch to fix setting BSS color
    
    Without this patch, we get the following error:
    
    Mon Dec 23 11:35:44 2024 daemon.err hostapd: nl80211: kernel reports: integer out of range
    
    As updating hostapd would be too complex and requires further testing,
    we backport this simple upstream fix instead.
    
    Fixes: https://github.com/openwrt/openwrt/issues/16680
    Signed-off-by: Rany Hany <rany_hany at riseup.net>
    Link: https://github.com/openwrt/openwrt/pull/17590
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
---
 package/network/services/hostapd/Makefile          |  2 +-
 .../hostapd/patches/763-radius-wispr.patch         |  2 +-
 .../patches/803-hostapd-fix-80211be-build.patch    |  2 +-
 ...Fix-clearing-up-settings-for-color-switch.patch | 28 ++++++++++++++++++++++
 4 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
index 44c73586ca..58c18a9088 100644
--- a/package/network/services/hostapd/Makefile
+++ b/package/network/services/hostapd/Makefile
@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 
 PKG_SOURCE_URL:=https://w1.fi/hostap.git
 PKG_SOURCE_PROTO:=git
diff --git a/package/network/services/hostapd/patches/763-radius-wispr.patch b/package/network/services/hostapd/patches/763-radius-wispr.patch
index da81a623e7..f5c4668e13 100644
--- a/package/network/services/hostapd/patches/763-radius-wispr.patch
+++ b/package/network/services/hostapd/patches/763-radius-wispr.patch
@@ -36,7 +36,7 @@
  		sm->eap_if->aaaFail = true;
 --- a/src/ap/sta_info.h
 +++ b/src/ap/sta_info.h
-@@ -95,6 +95,7 @@ struct sta_info {
+@@ -94,6 +94,7 @@ struct sta_info {
  	u8 supported_rates[WLAN_SUPP_RATES_MAX];
  	int supported_rates_len;
  	u8 qosinfo; /* Valid when WLAN_STA_WMM is set */
diff --git a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
index cbd6298d9d..f197b71bd7 100644
--- a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
+++ b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
@@ -25,7 +25,7 @@
 +
 --- a/src/ap/sta_info.h
 +++ b/src/ap/sta_info.h
-@@ -408,23 +408,8 @@ int ap_sta_re_add(struct hostapd_data *h
+@@ -409,23 +409,8 @@ int ap_sta_re_add(struct hostapd_data *h
  
  void ap_free_sta_pasn(struct hostapd_data *hapd, struct sta_info *sta);
  
diff --git a/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch b/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch
new file mode 100644
index 0000000000..87d68911c7
--- /dev/null
+++ b/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch
@@ -0,0 +1,28 @@
+From 161327f91d956771996c96ea1b6e4e1cb8dc074c Mon Sep 17 00:00:00 2001
+From: Stone Zhang <quic_stonez at quicinc.com>
+Date: Mon, 14 Oct 2024 18:47:32 +0800
+Subject: [PATCH] hostapd: Fix clearing up settings for color switch
+
+Settings for color switch (struct cca_settings settings)
+is used without zero clearing, which causes the member
+settings->ubpr->unsol_bcast_probe_resp_intervalettings
+to be a random value. It is againsts the NLA policy of
+NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_INT and causes
+BSS color switch failure.
+
+Fixes: 654d2395dddf ("BSS coloring: Handling of collision events and triggering CCA")
+Signed-off-by: Stone Zhang <quic_stonez at quicinc.com>
+---
+ src/ap/hostapd.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/src/ap/hostapd.c
++++ b/src/ap/hostapd.c
+@@ -4813,6 +4813,7 @@ static void hostapd_switch_color_timeout
+ 		struct cca_settings settings;
+ 		int ret;
+ 
++		os_memset(&settings, 0, sizeof(settings));
+ 		hostapd_cleanup_cca_params(bss);
+ 		bss->cca_color = r;
+ 		bss->cca_count = 10;



From lede-commits at lists.infradead.org  Mon Jan 13 06:46:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 09:46:03 -0500
Subject: [openwrt/openwrt]  ipq40xx: enable WiFi LED for Teltonika RUTX50
In-Reply-To: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
References: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
Message-ID: <mailman.38302.1736779654.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/54463f1e2e17d14a24d3504acea8107f45228f27

commit 54463f1e2e17d14a24d3504acea8107f45228f27
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Mon Jan 13 15:18:51 2025 +0100

    ipq40xx: enable WiFi LED for Teltonika RUTX50
    
    Enable activity on the WiFi LEDs of the Teltonika RUTX50
    like other boards in the ipq40xx target.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts    | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
index a297459795..ae244bd126 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
@@ -103,11 +103,13 @@
 			led-10 {
 				label = "green:wifi2g";
 				gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "phy0tpt";
 			};
 
 			led-11 {
 				label = "green:wifi5g";
 				gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "phy1tpt";
 			};
 		};
 



From lede-commits at lists.infradead.org  Mon Jan 13 06:46:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 09:46:02 -0500
Subject: [openwrt/openwrt]  ipq40xx: use correct wired MAC-addresses for
 RUTX50
In-Reply-To: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
References: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
Message-ID: <mailman.38303.1736779654.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/08c93512fe39ac25f78fb2ab0f32cb2a830c5b70

commit 08c93512fe39ac25f78fb2ab0f32cb2a830c5b70
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Mon Jan 13 15:18:31 2025 +0100

    ipq40xx: use correct wired MAC-addresses for RUTX50
    
    The Teltonika RUTX50 mac-addresses on its wired interfaces are currently
    random on every boot.
    
    Setting the mac-addresses from device-tree using nvmem does not work, as
    the vendor bootloader mangles the mtd partitions, removing the
    nvmem-cells property.
    
    To remedy the random mac-addresse, set the correct ones in preinit.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 .../base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh        | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
index 1ede544aac..092f9da440 100644
--- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
+++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
@@ -43,6 +43,17 @@ preinit_set_mac_address() {
 		ip link set dev sw-eth1 address "$base_mac"
 		ip link set dev sw-eth2 address $(macaddr_add "$base_mac" 1)
 		;;
+	teltonika,rutx50)
+		# Vendor Bootloader removes nvmem-cells from partition,
+		# so this needs to be done here.
+		base_mac="$(mtd_get_mac_binary 0:CONFIG 0x0)"
+		ip link set dev eth0 address "$base_mac"
+		ip link set dev lan1 address "$base_mac"
+		ip link set dev lan2 address "$base_mac"
+		ip link set dev lan3 address "$base_mac"
+		ip link set dev lan4 address "$base_mac"
+		ip link set dev wan address "$(macaddr_add "$base_mac" 1)"
+		;;
 	zyxel,nbg6617)
 		base_mac=$(cat /sys/class/net/eth0/address)
 		ip link set dev eth0 address $(macaddr_add "$base_mac" 2)



From lede-commits at lists.infradead.org  Mon Jan 13 06:46:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 09:46:01 -0500
Subject: [openwrt/openwrt]  ipq40xx: turn on Teltonika RUTX50 modem by default
In-Reply-To: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
References: <173677956128.2775410.2027064127656424682@git-01.infra.openwrt.org>
Message-ID: <mailman.38304.1736779654.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ac1ad1a7ad6bb3a528def4154e91dd398fda8db5

commit ac1ad1a7ad6bb3a528def4154e91dd398fda8db5
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Mon Jan 13 15:12:38 2025 +0100

    ipq40xx: turn on Teltonika RUTX50 modem by default
    
    Turn on the 5G modem of the RUTX50 on by default.
    
    This allows to make the modem detectable on a fresh
    installation OOTB without further intervention.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 .../ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
index 56d920a6dd..a297459795 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
@@ -29,7 +29,7 @@
 
 			gpio_modem_power {
 				gpio-export,name = "modem_power";
-				gpio-export,output = <0>;
+				gpio-export,output = <1>;
 				gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>;
 			};
 



From lede-commits at lists.infradead.org  Mon Jan 13 14:37:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 17:37:44 -0500
Subject: [openwrt/openwrt]  tools/meson: update to 1.6.1
In-Reply-To: <173680786463.3433622.10020776925545302207@git-01.infra.openwrt.org>
References: <173680786463.3433622.10020776925545302207@git-01.infra.openwrt.org>
Message-ID: <mailman.38899.1736807889.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/97681b4fbd2e6764ef96d21e9f7a0b67b9c5d1b9

commit 97681b4fbd2e6764ef96d21e9f7a0b67b9c5d1b9
Author: Jack Sun <sunjiazheng321521 at gmail.com>
AuthorDate: Fri Jan 10 18:30:12 2025 +0800

    tools/meson: update to 1.6.1
    
    Changelog: https://mesonbuild.com/Release-notes-for-1-6-0.html
    Signed-off-by: Jack Sun <sunjiazheng321521 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17556
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 tools/meson/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/meson/Makefile b/tools/meson/Makefile
index f967f33ecd..6593f41f53 100644
--- a/tools/meson/Makefile
+++ b/tools/meson/Makefile
@@ -1,11 +1,11 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=meson
-PKG_VERSION:=1.5.1
+PKG_VERSION:=1.6.1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/mesonbuild/meson/releases/download/$(PKG_VERSION)
-PKG_HASH:=567e533adf255de73a2de35049b99923caf872a455af9ce03e01077e0d384bed
+PKG_HASH:=1eca49eb6c26d58bbee67fd3337d8ef557c0804e30a6d16bfdf269db997464de
 
 PKG_MAINTAINER:=Andre Heider <a.heider at gmail.com>
 PKG_LICENSE:=Apache-2.0



From lede-commits at lists.infradead.org  Mon Jan 13 14:41:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 17:41:41 -0500
Subject: [openwrt/openwrt]  d1: Use correct module for devices with wifi
In-Reply-To: <173680810183.3445232.617539165361657353@git-01.infra.openwrt.org>
References: <173680810183.3445232.617539165361657353@git-01.infra.openwrt.org>
Message-ID: <mailman.38900.1736808105.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8a17bae722a62954269f29dc48025e88c919dc24

commit 8a17bae722a62954269f29dc48025e88c919dc24
Author: Raylynn Knight <rayknight at me.com>
AuthorDate: Sat Jan 11 00:19:59 2025 -0500

    d1: Use correct module for devices with wifi
    
    Devices with wifi (LicheePi RV and MangoPi MQ Pro) were using the
    wrong module.  Also wpad was missing to enable using the WiFi.
    
    Signed-off-by: Raylynn Knight <rayknight at me.com>
    Link: https://github.com/openwrt/openwrt/pull/17576
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/d1/base-files/etc/board.d/02_network | 4 ++++
 target/linux/d1/image/Makefile                    | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/target/linux/d1/base-files/etc/board.d/02_network b/target/linux/d1/base-files/etc/board.d/02_network
index df48b431af..dc61e4bde5 100644
--- a/target/linux/d1/base-files/etc/board.d/02_network
+++ b/target/linux/d1/base-files/etc/board.d/02_network
@@ -8,6 +8,10 @@
 board_config_update
 
 case "$(board_name)" in
+sipeed,lichee-rv-dock |\
+widora,mangopi-mq-pro)
+	ucidef_set_interface_lan "wlan0"
+	;;
 *)
 	ucidef_set_interface_lan 'eth0'
 	;;
diff --git a/target/linux/d1/image/Makefile b/target/linux/d1/image/Makefile
index 8dca2fb1cb..ea41e65c76 100644
--- a/target/linux/d1/image/Makefile
+++ b/target/linux/d1/image/Makefile
@@ -65,7 +65,7 @@ define Device/sipeed_lichee-rv-dock
   DEVICE_MODEL := LicheePi RV (dock)
   DEVICE_DTS := allwinner/sun20i-d1-lichee-rv-dock
   SUPPORTED_DEVICES += lichee_rv_dock
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := lichee_rv_dock
 endef
 TARGET_DEVICES += sipeed_lichee-rv-dock
@@ -76,7 +76,7 @@ define Device/widora_mangopi-mq-pro
   DEVICE_MODEL := MQ Pro
   DEVICE_DTS := allwinner/sun20i-d1-mangopi-mq-pro
   SUPPORTED_DEVICES += mangopi_mq_pro
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := mangopi_mq_pro
 endef
 TARGET_DEVICES += widora_mangopi-mq-pro



From lede-commits at lists.infradead.org  Mon Jan 13 14:44:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 17:44:58 -0500
Subject: [openwrt/openwrt]  ramips: mt7621: add support for Keenetic Viva
 (KN-1910)
In-Reply-To: <173680829851.3449840.13589943043334010648@git-01.infra.openwrt.org>
References: <173680829851.3449840.13589943043334010648@git-01.infra.openwrt.org>
Message-ID: <mailman.38901.1736808302.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f65b533e41c7b5893a3ed4aad33329622ef79e40

commit f65b533e41c7b5893a3ed4aad33329622ef79e40
Author: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
AuthorDate: Thu Dec 26 09:34:39 2024 +0500

    ramips: mt7621: add support for Keenetic Viva (KN-1910)
    
    Specification:
    SoC: MediaTek MT7621A
    RAM: 128M DDR3, Winbond W631GG6MB-12 (DDR3-1600) or Winbond W631GG6MB-11
    Flash: 128M, Macronix MX30LF1G18AC-TI (Dual Boot, Parallel-NAND)
    Switch: MT7530, 5 ports 1Gbps
    WiFi: MT7615DN, 2.4GHz 802.11n and 5GHz 802.11ac
    USB: 2 ports USB 2.0
    GPIO: 4 buttons (Wi-Fi, Reset, FN1, FN2), 4 LEDs (Power, Internet, FN, Wi-Fi), USB port power controls
    
    LAN: RF-EEPROM + 0x04
    WAN: RF-EEPROM + 0x28
    2.4 GHz: RF-EEPROM + 0x04
    5 GHz: 2.4GHz + 82:00:00:00:00:00
    
    Disassembly:
    There are 2 screws at the bottom. After removing the screws, pry the gray plastic part around (it is secured with latches) and remove it.
    
    Serial Interface:
    The serial interface can be connected to the 4 pin dots to the left of the radiator.
    Pins (from LAN ports to LEDs):
    3.3V (do not connect)
    TX
    RX
    GND
    Settings: 57600, 8N1
    
    Flashing via OEM recovery software:
    1. Download the OEM recovery software from the manufacturer's website
    2. Download the firmware image (for OpenWRT it is *-squashfs-factory.bin), rename it to KN-1910_recovery.bin
    3. Replace the file in the fw folder OEM recovery software with the file from step 2.
    4. Run the OEM recovery software and follow the instructions.
    
    Flashing via TFTP:
    1. Connect your PC and router to port 1-4, configure PC interface using IP 192.168.1.2, mask 255.255.255.252
    2. Serve the firmware image (for OpenWRT it is *-squashfs-factory.bin) renamed to KN-1910_recovery.bin via TFTP
    3. Power up the router while pressing Reset button on the back
    4. Release Restart button when Power LED starts blinking
    
    To revert back to OEM firmware:
    The return to the OEM firmware is carried out by using the methods described above with the help of the appropriate firmware image.
    
    Keenetic's bootloader supports booting a LZMA compressed kernel but seems to fail if the uncompressed data is larger than a fixed buffer therefore it is safer to use a uimage-lzma-loader. When using OEM bootloader, the firmware image size cannot exceed the size of one OEM ?Firmware_x? partition or Kernel + rootFS size.
    
    Signed-off-by: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
    Link: https://github.com/openwrt/openwrt/pull/17381
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../linux/ramips/dts/mt7621_keenetic_kn-1910.dts   | 280 +++++++++++++++++++++
 target/linux/ramips/image/mt7621.mk                |  16 ++
 .../ramips/mt7621/base-files/etc/board.d/01_leds   |   1 +
 3 files changed, 297 insertions(+)

diff --git a/target/linux/ramips/dts/mt7621_keenetic_kn-1910.dts b/target/linux/ramips/dts/mt7621_keenetic_kn-1910.dts
new file mode 100644
index 0000000000..97b7c95688
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_keenetic_kn-1910.dts
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "keenetic,kn-1910", "mediatek,mt7621-soc";
+	model = "Keenetic KN-1910";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &gmac0;
+	};
+
+	reg_usb_vbus: regulator-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		restart {
+			label = "restart";
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		fn1 {
+			label = "fn1";
+			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_1>;
+		};
+
+		fn2 {
+			label = "fn2";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_2>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		internet {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
+		};
+
+		fn {
+			function = LED_FUNCTION_WLAN_2GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi {
+			function = LED_FUNCTION_WLAN_5GHZ;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy1tpt";
+		};
+	};
+
+	virtual_flash {
+		compatible = "mtd-concat";
+		devices = <&firmware1 &firmware2 &storage_a &storage_b>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			partition at 400000 {
+				label = "ubi";
+				reg = <0x400000 0x7540000>;
+			};
+		};
+	};
+};
+
+&xhci {
+	vbus-supply = <&reg_usb_vbus>;
+	vusb33-supply = <&reg_3p3v>;
+};
+
+&nand {
+	status = "okay";
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition at 0 {
+			label = "U-Boot";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition at 80000 {
+			label = "U-Config";
+			reg = <0x80000 0x80000>;
+			read-only;
+		};
+
+		partition at 100000 {
+			label = "RF-EEPROM";
+			reg = <0x100000 0x80000>;
+			read-only;
+			
+			nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_factory_0: eeprom at 0 {
+						reg = <0x0 0x4da8>;
+					};
+
+					macaddr_factory_4: macaddr at 4 {
+						reg = <0x4 0x6>;
+					};
+
+					macaddr_factory_28: macaddr at 28 {
+						reg = <0x28 0x6>;
+					};
+			};
+		};
+
+		firmware1: partition at 180000 {
+			label = "Firmware_1";
+			reg = <0x180000 0x1bc0000>;
+		};
+
+		partition at 1d40000 {
+			label = "Config_1";
+			reg = <0x1d40000 0x80000>;
+			read-only;
+		};
+
+		partition at 1dc0000 {
+			label = "Storage_Legacy";
+			reg = <0x1dc0000 0x200000>;
+			read-only;
+		};
+
+		partition at 1fc0000 {
+			label = "Dump";
+			reg = <0x1fc0000 0x40000>;
+			read-only;
+		};
+
+		storage_a: partition at 2000000 {
+			label = "Storage_A";
+			reg = <0x2000000 0x1fc0000>;
+		};
+
+		partition at 3fc0000 {
+			label = "U-State";
+			reg = <0x3fc0000 0x80000>;
+			read-only;
+		};
+
+		partition at 4040000 {
+			label = "U-Config_res";
+			reg = <0x4040000 0x80000>;
+			read-only;
+		};
+
+		partition at 40c0000 {
+			label = "RF-EEPROM_res";
+			reg = <0x40c0000 0x80000>;
+			read-only;
+		};
+
+		firmware2: partition at 4140000 {
+			label = "Firmware_2";
+			reg = <0x4140000 0x1bc0000>;
+		};
+
+		partition at 5d00000 {
+			label = "Config_2";
+			reg = <0x5d00000 0x80000>;
+			read-only;
+		};
+
+		storage_b: partition at 5d80000 {
+			label = "Storage_B";
+			reg = <0x5d80000 0x2200000>;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		nvmem-cells = <&eeprom_factory_0>;
+		nvmem-cell-names = "eeprom";
+	};
+};
+
+&ethphy0 {
+	/delete-property/ interrupts;
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy0>;
+
+	nvmem-cells = <&macaddr_factory_28>;
+	nvmem-cell-names = "mac-address";
+};
+
+&switch0 {
+	ports {
+		port at 1 {
+			status = "okay";
+		};
+
+		port at 2 {
+			status = "okay";
+		};
+
+		port at 3 {
+			status = "okay";
+		};
+
+		port at 4 {
+			status = "okay";
+		};
+	};
+};
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index ed0da90528..aa38495224 100755
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -1787,6 +1787,22 @@ define Device/jdcloud_re-cp-02
 endef
 TARGET_DEVICES += jdcloud_re-cp-02
 
+define Device/keenetic_kn-1910
+  $(Device/nand)
+  $(Device/uimage-lzma-loader)
+  BLOCKSIZE := 128k
+  PAGESIZE := 2048
+  IMAGE_SIZE := 24903680
+  DEVICE_VENDOR := Keenetic
+  DEVICE_MODEL := KN-1910
+  DEVICE_PACKAGES := kmod-mt7615-firmware kmod-usb3 \
+	kmod-usb-ledtrig-usbport
+  IMAGES += factory.bin
+  IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | \
+	append-ubi | check-size | zyimage -d 0x801910 -v "KN-1910"
+endef
+TARGET_DEVICES += keenetic_kn-1910
+
 define Device/keenetic_kn-3010
   $(Device/dsa-migration)
   $(Device/uimage-lzma-loader)
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
index 9a77b1b1bc..ec452ccd94 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
@@ -125,6 +125,7 @@ gnubee,gb-pc2)
 huasifei,ws1208v2)
 	ucidef_set_led_netdev "wwan0" "wwan0" "green:cellular" "wwan0" "link tx rx"
 	;;
+keenetic,kn-1910|\
 keenetic,kn-3010)
 	ucidef_set_led_netdev "internet" "internet" "green:internet" "wan"
 	;;



From lede-commits at lists.infradead.org  Mon Jan 13 14:58:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 13 Jan 2025 17:58:58 -0500
Subject: [openwrt/openwrt]  mvebu: WD Cloud Mirror Gen2: Remove stty
 dependency
In-Reply-To: <173680913878.3469721.13610230783708700186@git-01.infra.openwrt.org>
References: <173680913878.3469721.13610230783708700186@git-01.infra.openwrt.org>
Message-ID: <mailman.38902.1736809142.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/717f62d256ccb52549a24c256615b28440ed1a86

commit 717f62d256ccb52549a24c256615b28440ed1a86
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 13 23:56:09 2025 +0100

    mvebu: WD Cloud Mirror Gen2: Remove stty dependency
    
    The package coreutils-stty is not part of the OpenWrt main packages. A
    board can not depend on it. Remove the dependency to fix a build problem
    seen in the build bots.
    
    Fixes: 8fb805aa1f25 ("mvebu: Add support for WD Cloud Mirror Gen2")
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mvebu/image/cortexa9.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index d572264866..b5f89aec20 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -453,7 +453,7 @@ define Device/wd_cloud-mirror-gen2
   $(Device/NAND-128K)
   DEVICE_VENDOR := Western Digital
   DEVICE_MODEL := MyCloud Mirror Gen 2 (BWVZ/Grand Teton)
-  DEVICE_PACKAGES += -uboot-envtools coreutils-stty mkf2fs e2fsprogs \
+  DEVICE_PACKAGES += -uboot-envtools mkf2fs e2fsprogs \
 	partx-utils kmod-hwmon-drivetemp -ppp -kmod-nft-offload -dnsmasq \
 	-odhcpd-ipv6only 
   DEVICE_DTS := armada-385-wd_cloud-mirror-gen2



From lede-commits at lists.infradead.org  Tue Jan 14 00:36:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 03:36:36 -0500
Subject: [openwrt/openwrt]  lldpd: bump version to 1.0.18
In-Reply-To: <173684379615.4174291.1725365197186993442@git-01.infra.openwrt.org>
References: <173684379615.4174291.1725365197186993442@git-01.infra.openwrt.org>
Message-ID: <mailman.39099.1736843822.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a18385041eaeaf6d98ab79a30ce5fba4e712b765

commit a18385041eaeaf6d98ab79a30ce5fba4e712b765
Author: Sebastian Pflieger <sebastian at pflieger.email>
AuthorDate: Thu Jan 9 18:16:04 2025 +0100

    lldpd: bump version to 1.0.18
    
    Changes (breaking):
    - Remove support for building 802.3bt TLVs (broken).
    
    Fix:
    - Fix memory leaks in EDP/FDP decoding when receiving some TLVs twice.
    - Do not set interface description continuously.
    - Use a different Netlink socket for changes and queries.
    
    Signed-off-by: Sebastian Pflieger <sebastian at pflieger.email>
    Link: https://github.com/openwrt/openwrt/pull/17570
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/network/services/lldpd/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index f34cd28faa..b21ca76c5e 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
-PKG_VERSION:=1.0.17
+PKG_VERSION:=1.0.18
 PKG_RELEASE:=5
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
-PKG_HASH:=89ae691a4917ac9e0ec3b8b2c1e634cc402d43b804f98850c73bd1c7df380882
+PKG_HASH:=38cd319aa02ab61d9a2ad130e22f906795ccca9ac73a0a0d9dac19ca99a8a870
 
 PKG_MAINTAINER:=Stijn Tintel <stijn at linux-ipv6.be>
 PKG_LICENSE:=ISC



From lede-commits at lists.infradead.org  Tue Jan 14 00:38:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 03:38:16 -0500
Subject: [openwrt/openwrt]  lldpd: reset PKG_RELEASE
In-Reply-To: <173684389622.4176918.17307753989953232065@git-01.infra.openwrt.org>
References: <173684389622.4176918.17307753989953232065@git-01.infra.openwrt.org>
Message-ID: <mailman.39104.1736843899.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/abbec429b40f149f9c5a99a64ee7bf4e804fbb7d

commit abbec429b40f149f9c5a99a64ee7bf4e804fbb7d
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Tue Jan 14 09:37:33 2025 +0100

    lldpd: reset PKG_RELEASE
    
    lldpd was updated, so reset PKG_RELEASE after the PKG_VERSION update.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/network/services/lldpd/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index b21ca76c5e..6be9723a9b 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
 PKG_VERSION:=1.0.18
-PKG_RELEASE:=5
+PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/



From lede-commits at lists.infradead.org  Tue Jan 14 00:41:59 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 03:41:59 -0500
Subject: [openwrt/openwrt]  hostapd: backport upstream patch to fix setting
 BSS color
In-Reply-To: <173684411949.4183362.16643911480193884649@git-01.infra.openwrt.org>
References: <173684411949.4183362.16643911480193884649@git-01.infra.openwrt.org>
Message-ID: <mailman.39109.1736844123.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/767339066e9fc3a2232e9d2881469797cbf7ba8b

commit 767339066e9fc3a2232e9d2881469797cbf7ba8b
Author: Rany Hany <rany_hany at riseup.net>
AuthorDate: Sun Jan 12 22:41:48 2025 +0000

    hostapd: backport upstream patch to fix setting BSS color
    
    Without this patch, we get the following error:
    
    Mon Dec 23 11:35:44 2024 daemon.err hostapd: nl80211: kernel reports: integer out of range
    
    As updating hostapd would be too complex and requires further testing,
    we backport this simple upstream fix instead.
    
    Fixes: https://github.com/openwrt/openwrt/issues/16680
    Signed-off-by: Rany Hany <rany_hany at riseup.net>
    Link: https://github.com/openwrt/openwrt/pull/17590
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
    (cherry picked from commit 5ce1af9539da667f62dc3cb426f9ec36e53fb54e)
    Link: https://github.com/openwrt/openwrt/pull/17591
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/network/services/hostapd/Makefile          |  2 +-
 .../patches/803-hostapd-fix-80211be-build.patch    |  2 +-
 ...Fix-clearing-up-settings-for-color-switch.patch | 28 ++++++++++++++++++++++
 3 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
index 16dfbff2b0..8753782012 100644
--- a/package/network/services/hostapd/Makefile
+++ b/package/network/services/hostapd/Makefile
@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE_URL:=https://w1.fi/hostap.git
 PKG_SOURCE_PROTO:=git
diff --git a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
index cbd6298d9d..f197b71bd7 100644
--- a/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
+++ b/package/network/services/hostapd/patches/803-hostapd-fix-80211be-build.patch
@@ -25,7 +25,7 @@
 +
 --- a/src/ap/sta_info.h
 +++ b/src/ap/sta_info.h
-@@ -408,23 +408,8 @@ int ap_sta_re_add(struct hostapd_data *h
+@@ -409,23 +409,8 @@ int ap_sta_re_add(struct hostapd_data *h
  
  void ap_free_sta_pasn(struct hostapd_data *hapd, struct sta_info *sta);
  
diff --git a/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch b/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch
new file mode 100644
index 0000000000..87d68911c7
--- /dev/null
+++ b/package/network/services/hostapd/patches/804-hostapd-Fix-clearing-up-settings-for-color-switch.patch
@@ -0,0 +1,28 @@
+From 161327f91d956771996c96ea1b6e4e1cb8dc074c Mon Sep 17 00:00:00 2001
+From: Stone Zhang <quic_stonez at quicinc.com>
+Date: Mon, 14 Oct 2024 18:47:32 +0800
+Subject: [PATCH] hostapd: Fix clearing up settings for color switch
+
+Settings for color switch (struct cca_settings settings)
+is used without zero clearing, which causes the member
+settings->ubpr->unsol_bcast_probe_resp_intervalettings
+to be a random value. It is againsts the NLA policy of
+NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_INT and causes
+BSS color switch failure.
+
+Fixes: 654d2395dddf ("BSS coloring: Handling of collision events and triggering CCA")
+Signed-off-by: Stone Zhang <quic_stonez at quicinc.com>
+---
+ src/ap/hostapd.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/src/ap/hostapd.c
++++ b/src/ap/hostapd.c
+@@ -4813,6 +4813,7 @@ static void hostapd_switch_color_timeout
+ 		struct cca_settings settings;
+ 		int ret;
+ 
++		os_memset(&settings, 0, sizeof(settings));
+ 		hostapd_cleanup_cca_params(bss);
+ 		bss->cca_color = r;
+ 		bss->cca_count = 10;



From lede-commits at lists.infradead.org  Tue Jan 14 01:10:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 04:10:13 -0500
Subject: [openwrt/openwrt]  realtek: debounce reset key for Zyxel GS1900
In-Reply-To: <173684581387.42845.7907468870610775347@git-01.infra.openwrt.org>
References: <173684581387.42845.7907468870610775347@git-01.infra.openwrt.org>
Message-ID: <mailman.39118.1736845817.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/68bf4844a1cbc9f404f6e93b70a2657e74f1dce9

commit 68bf4844a1cbc9f404f6e93b70a2657e74f1dce9
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 1 20:05:20 2025 +0100

    realtek: debounce reset key for Zyxel GS1900
    
    When the reset button is next to the SFP cages, I2C operations on the
    modules might cause interference on the button's GPIO line. Add a
    debounce-interval of 5 times the poll-interval to ensure the line is
    actually stable for some time and not just glitching.
    
    This squashes commit 4357f32d41eb ("realtek: debounce reset key for
    Zyxel GS1900") and commit 777c6106ed4e ("realtek: move debounce-interval
    to correct node").
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi   | 1 +
 target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index b985c4bc8e..3889fe8859 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -26,6 +26,7 @@
 			label = "reset";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
+			debounce-interval = <100>;
 		};
 	};
 
diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
index 9844dc2180..a1e0a6d06d 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
@@ -43,10 +43,11 @@
 		compatible = "gpio-keys-polled";
 		poll-interval = <20>;
 
-		mode {
+		reset {
 			label = "reset";
 			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
+			debounce-interval = <100>;
 		};
 	};
 



From lede-commits at lists.infradead.org  Tue Jan 14 04:51:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 07:51:36 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-14)
In-Reply-To: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
References: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
Message-ID: <mailman.39322.1736859098.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3963dab0302ae29cbf2acf28f26c1432e4ddf1a5

commit 3963dab0302ae29cbf2acf28f26c1432e4ddf1a5
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Jan 14 13:48:23 2025 +0100

    mt76: update to Git HEAD (2025-01-14)
    
    cf4e709e493a wifi: mt76: mt7996: fix crash in mt7996_set_radar_background
    4c786fa52bb2 wifi: mt76: mt7915: fix register mapping
    849923df3dde wifi: mt76: mt7996: fix register mapping
    6be1dc9a1c79 wifi: mt76: mt7925: fix the unfinished command of regd_notifier before suspend
    d33ea3cab72b wifi: mt76: mt7925: fix CLC command timeout when suspend/resume
    5aacd0d73c80 wifi: mt76: mt7925: add handler to hif suspend/resume event
    e86e97e45397 wifi: mt76: mt7925e: fix too long of wifi resume time
    e43df6bf4892 wifi: mt76: mt7996: fix thermal sparse warning
    02f453d8dfc8 wifi: mt76: fix survey regression
    7279e3f3c3e0 wifi: mt76: mt7925: fix unused-but-set warning
    49c0bd66da3b wifi: mt76: mt7996: fix unused-but-set variable
    2c068c96382e wifi: mt76: fix crash in mt76_switch_vif_chanctx
    731070da2c2a wifi: mt76: mt7996: add max mpdu len capability
    99d8ed164a96 wifi: mt76: mt7996: fix the capability of reception of EHT MU PPDU
    32ee924831ba wifi: mt76: mt7996: fix HE Phy capability
    9b588c7fb333 wifi: mt76: mt7996: fix incorrect indexing of MIB FW event
    46798905cf5a wifi: mt76: connac: adjust phy capabilities based on band constraints
    5c50f6f7dafe wifi: mt76: mt7996: fix definition of tx descriptor
    9cdb62dc084f wifi: mt76: mt7996: fix ldpc setting
    8c6cb2f97fe0 wifi: mt76: mt7996: fix beacon command during disabling
    8e4f72b682e9 wifi: mt76: mt7996: add implicit beamforming support for mt7992
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index 7bc030a9df..cd168f49bc 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-04
-PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
-PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
+PKG_SOURCE_DATE:=2025-01-14
+PKG_SOURCE_VERSION:=8e4f72b682e9070108536507c5e2720b18c3816d
+PKG_MIRROR_HASH:=fa8c5a2ece9e7287605910d9f906b601711c7863613addaadd666f9e3858a9e7
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Tue Jan 14 04:51:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 07:51:34 -0500
Subject: [openwrt/openwrt]  mac80211: fix issues with including
 linux/acpi_amd_wbrf.h on newer kernels
In-Reply-To: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
References: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
Message-ID: <mailman.39323.1736859098.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7bf3bc871ac1ae6b6f199ba1bd83eba9d017a0d5

commit 7bf3bc871ac1ae6b6f199ba1bd83eba9d017a0d5
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Jan 14 11:55:08 2025 +0100

    mac80211: fix issues with including linux/acpi_amd_wbrf.h on newer kernels
    
    Change the double-include guard to avoid conflict with the linux kernel header
    
    Reported-by: Tony Ambardar <itugrok at yahoo.com>
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...clude-fix-linux-acpi_amd_wbrf.h-inclusion.patch | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/package/kernel/mac80211/patches/build/110-backport-include-fix-linux-acpi_amd_wbrf.h-inclusion.patch b/package/kernel/mac80211/patches/build/110-backport-include-fix-linux-acpi_amd_wbrf.h-inclusion.patch
new file mode 100644
index 0000000000..d8d3783ed6
--- /dev/null
+++ b/package/kernel/mac80211/patches/build/110-backport-include-fix-linux-acpi_amd_wbrf.h-inclusion.patch
@@ -0,0 +1,32 @@
+From: Felix Fietkau <nbd at nbd.name>
+Date: Tue, 14 Jan 2025 11:42:25 +0100
+Subject: [PATCH] backport-include: fix linux/acpi_amd_wbrf.h inclusion
+
+Fix building for kernel >= 6.8 by adjusting incorrect guard usage,
+otherwise an #include_next header is masked and compilation will fail
+for net/mac80211/wbrf.c in the mac80211 kernel module.
+
+Fixes: 52cdcaab ("backport-include: backport linux/acpi_amd_wbrf.h")
+Reported-by: Tony Ambardar <itugrok at yahoo.com>
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/backport-include/linux/acpi_amd_wbrf.h
++++ b/backport-include/linux/acpi_amd_wbrf.h
+@@ -4,8 +4,8 @@
+  * Copyright (C) 2023 Advanced Micro Devices
+  */
+ 
+-#ifndef _ACPI_AMD_WBRF_H
+-#define _ACPI_AMD_WBRF_H
++#ifndef __BACKPORT_ACPI_AMD_WBRF_H
++#define __BACKPORT_ACPI_AMD_WBRF_H
+ 
+ #if LINUX_VERSION_IS_GEQ(6,8,0)
+ #include_next <linux/acpi_amd_wbrf.h>
+@@ -83,4 +83,4 @@ int amd_wbrf_unregister_notifier(struct
+ }
+ 
+ #endif /* >=6,8,0 */
+-#endif /* _ACPI_AMD_WBRF_H */
++#endif /* __BACKPORT_ACPI_AMD_WBRF_H */



From lede-commits at lists.infradead.org  Tue Jan 14 04:51:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 07:51:35 -0500
Subject: [openwrt/openwrt]  wifi-scripts: sync enable_background_radar in
 ucode with old version
In-Reply-To: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
References: <173685909435.447375.4039451893588561322@git-01.infra.openwrt.org>
Message-ID: <mailman.39324.1736859102.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e5168715156ef5b71791c1ce16a9aeec0f94cb30

commit e5168715156ef5b71791c1ce16a9aeec0f94cb30
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Jan 14 13:29:40 2025 +0100

    wifi-scripts: sync enable_background_radar in ucode with old version
    
    It needs to be opt-in instead of opt-out, since there is no reliable way to
    determine if the extra background radar chain has an antenna connected.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../config/wifi-scripts/files-ucode/usr/share/ucode/wifi/hostapd.uc     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/hostapd.uc b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/hostapd.uc
index adbfc1b978..0e3cfc5b90 100644
--- a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/hostapd.uc
+++ b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/hostapd.uc
@@ -493,7 +493,7 @@ function generate(config) {
 	if (!phy_features.radar_background || config.band != '5g')
 		delete config.enable_background_radar;
 	else
-		set_default(config, 'enable_background_radar', phy_features.radar_background);
+		set_default(config, 'enable_background_radar', false);
 
 	append_vars(config, [ 'acs_chan_bias', 'acs_exclude_dfs', 'enable_background_radar' ]);
 



From lede-commits at lists.infradead.org  Tue Jan 14 05:05:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 08:05:18 -0500
Subject: [openwrt/openwrt]  build: use lazy evaluation for NPROC to speed up
 metadata dump
In-Reply-To: <173685991844.468795.8537671006813946952@git-01.infra.openwrt.org>
References: <173685991844.468795.8537671006813946952@git-01.infra.openwrt.org>
Message-ID: <mailman.39333.1736859922.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/dac8021297a5541eac418fb295a9013109d39a61

commit dac8021297a5541eac418fb295a9013109d39a61
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Jan 14 14:02:16 2025 +0100

    build: use lazy evaluation for NPROC to speed up metadata dump
    
    Reduces package metadata dump time by ~10%
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 rules.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules.mk b/rules.mk
index 16d6020e1a..dbc448e1a4 100644
--- a/rules.mk
+++ b/rules.mk
@@ -96,7 +96,7 @@ TARGET_SUFFIX=$(call qstrip,$(CONFIG_TARGET_SUFFIX))
 BUILD_SUFFIX:=$(call qstrip,$(CONFIG_BUILD_SUFFIX))
 SUBDIR:=$(patsubst $(TOPDIR)/%,%,${CURDIR})
 BUILD_SUBDIR:=$(patsubst $(TOPDIR)/%,%,${CURDIR})
-NPROC:=$(shell sysctl -n hw.ncpu 2>/dev/null || nproc)
+NPROC=$(shell sysctl -n hw.ncpu 2>/dev/null || nproc)
 export SHELL:=/usr/bin/env bash
 
 IS_PACKAGE_BUILD := $(if $(filter package/%,$(BUILD_SUBDIR)),1)



From lede-commits at lists.infradead.org  Tue Jan 14 07:02:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 10:02:13 -0500
Subject: [openwrt/openwrt]  lldpd: fix config for build without LLDP-MED
In-Reply-To: <173686693381.663100.15750472935924788862@git-01.infra.openwrt.org>
References: <173686693381.663100.15750472935924788862@git-01.infra.openwrt.org>
Message-ID: <mailman.39432.1736866937.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2c22d7c3a4a7edcce1af656c8cddb1ab163e3d02

commit 2c22d7c3a4a7edcce1af656c8cddb1ab163e3d02
Author: Sebastian Pflieger <sebastian at pflieger.email>
AuthorDate: Thu Jan 9 18:10:38 2025 +0100

    lldpd: fix config for build without LLDP-MED
    
    The lldp_class and lldp_location config option are only valid when
    compiled with LLDP-MED support. If not they will cause lldpd not to
    start.
    
    Signed-off-by: Sebastian Pflieger <sebastian at pflieger.email>
    Link: https://github.com/openwrt/openwrt/pull/17571
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/network/services/lldpd/Makefile         | 4 +++-
 package/network/services/lldpd/files/lldpd.init | 4 ++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index 6be9723a9b..3fbd0bf4f9 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
 PKG_VERSION:=1.0.18
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
@@ -90,6 +90,8 @@ endif
 ifneq ($(CONFIG_LLDPD_WITH_LLDPMED),y)
 	sed -i -e 's/CONFIG_LLDPD_WITH_LLDPMED=y/CONFIG_LLDPD_WITH_LLDPMED=n/g' $(1)/etc/init.d/lldpd
 	sed -i -e '/agentxsocket/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_class/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_location/d' $(1)/etc/config/lldpd
 endif
 endef
 
diff --git a/package/network/services/lldpd/files/lldpd.init b/package/network/services/lldpd/files/lldpd.init
index 3922b676b5..6c1c184bfa 100644
--- a/package/network/services/lldpd/files/lldpd.init
+++ b/package/network/services/lldpd/files/lldpd.init
@@ -39,7 +39,6 @@ get_config_restart_hash() {
 
 	config_load 'lldpd'
 
-	config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then
 		config_get      v 'config' 'agentxsocket'; append _string "$v" ","
 	fi
@@ -49,6 +48,7 @@ get_config_restart_hash() {
 	config_get_bool v 'config' 'lldp_no_version'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool v 'config' 'lldpmed_no_inventory'; append _string "$v" ","
+		config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	fi
 	config_get_bool v 'config' 'enable_lldp' 1; append _string "$v" ","
 	config_get_bool v 'config' 'force_lldp'; append _string "$v" ","
@@ -243,10 +243,10 @@ start_service() {
 		config_get_bool enable_edp 'config' 'enable_edp' 0
 		config_get_bool force_edp 'config' 'force_edp' 0
 	fi
-	config_get lldp_class 'config' 'lldp_class'
 	config_get_bool lldp_no_version 'config' 'lldp_no_version' 0
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool lldpmed_no_inventory 'config' 'lldpmed_no_inventory' 0
+		config_get lldp_class 'config' 'lldp_class'
 	fi
 	config_get_bool readonly_mode 'config' 'readonly_mode' 0
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then



From lede-commits at lists.infradead.org  Tue Jan 14 14:36:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 17:36:03 -0500
Subject: [openwrt/openwrt]  ramips: mt7621: add support for Confiabits MT7621
 v1
In-Reply-To: <173689416372.1278389.14438456487946847210@git-01.infra.openwrt.org>
References: <173689416372.1278389.14438456487946847210@git-01.infra.openwrt.org>
Message-ID: <mailman.39857.1736894168.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/1c5ca24da6cd727f4fcb8edbe00fa66543a6c678

commit 1c5ca24da6cd727f4fcb8edbe00fa66543a6c678
Author: Luis Mita <luis at luismita.com>
AuthorDate: Wed Jan 8 18:10:04 2025 -0400

    ramips: mt7621: add support for Confiabits MT7621 v1
    
    Hardware:
     - SoC: MediaTek MT7621DAT
     - Flash: 16 MiB cFeon
     - RAM: 128 MiB MT7621DAT
     - WLAN: 2.4 GHz (MT7603EN), 5 GHz (MT7613BEN 802.11ac)
     - Ethernet: 1x 10/100/1000 Mbps WAN, 3x 10/100/1000 LAN (MT7621DAT)
     - Buttons: 1 Reset button, 1 WPS button
     - LEDs: 5x Green (POWER/WAN/2.4G/5G/WPS), 1x Red (WAN)
     - Serial console: unpopulated header, 57600 8n1
     - Power: 12 VDC, 1 A
    
    MAC:
    LAN MAC: label mac (eeprom at 4)
    WAN MAC: label mac (eeprom at 4)
    2.4G MAC: label mac (eeprom at 4)
    5G MAC: label mac + 1 (eeprom at 8004)
    
    Installation:
    The stock firmware is OpenWrt-based. If you can reach LuCI or SSH, just use the sysupgrade image
    with the 'Keep settings' option turned off.
    
    Signed-off-by: Luis Mita <luis at luismita.com>
    Link: https://github.com/openwrt/openwrt/pull/17534
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../ramips/dts/mt7621_confiabits_mt7621-v1.dts     | 215 +++++++++++++++++++++
 target/linux/ramips/image/mt7621.mk                |  12 ++
 .../ramips/mt7621/base-files/etc/board.d/01_leds   |   7 +-
 .../mt7621/base-files/etc/board.d/02_network       |   1 +
 4 files changed, 232 insertions(+), 3 deletions(-)

diff --git a/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts b/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts
new file mode 100644
index 0000000000..858747ecad
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "confiabits,mt7621-v1", "mediatek,mt7621-soc";
+	model = "Confiabits MT7621 v1";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		button-wps {
+			label = "wps";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		button-reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: led-power-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wan-red {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WAN;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wlan5 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led-wps {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WPS;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wlan24 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led-wan-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WAN;
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition at 30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition at 40000 {
+				label = "radio";
+				reg = <0x40000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_radio_0: eeprom at 0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_radio_8000: eeprom at 8000 {
+						reg = <0x8000 0x4da8>;
+					};
+
+					macaddr_radio_4: macaddr at 4 {
+						reg = <0x4 0x6>;
+					};
+
+					macaddr_radio_8004: macaddr at 8004 {
+						reg = <0x8004 0x6>;
+					};
+				};
+			};
+
+			partition at 50000 {
+				label = "firmware";
+				compatible = "denx,uimage";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_radio_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy4>;
+
+	nvmem-cells = <&macaddr_radio_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&ethphy4 {
+	/delete-property/ interrupts;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		nvmem-cells = <&eeprom_radio_0>;
+		nvmem-cell-names = "eeprom";
+	};
+};
+
+&pcie1 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		nvmem-cells = <&eeprom_radio_8000>;
+		nvmem-cell-names = "eeprom";
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port at 0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port at 1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port at 2 {
+			status = "okay";
+			label = "lan3";
+		};
+	};
+};
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index aa38495224..08b3dcc64f 100755
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -687,6 +687,18 @@ define Device/comfast_cf-ew72-v2
 endef
 TARGET_DEVICES += comfast_cf-ew72-v2
 
+define Device/confiabits_mt7621-v1
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Confiabits
+  DEVICE_MODEL := MT7621
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap \
+	-uboot-envtools
+endef
+TARGET_DEVICES += confiabits_mt7621-v1
+
 define Device/cudy_m1800
   $(Device/dsa-migration)
   DEVICE_VENDOR := Cudy
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
index ec452ccd94..1542eed8f6 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
@@ -58,6 +58,10 @@ wifire,s1500-nbn)
 belkin,rt1800)
 	ucidef_set_led_netdev "wan" "wan" "white:wan" "wan"
 	;;
+confiabits,mt7621-v1|\
+netis,n6)
+	ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx"
+	;;
 cudy,wr2100)
 	ucidef_set_led_netdev "lan1" "lan1" "green:lan1" "lan1"
 	ucidef_set_led_netdev "lan2" "lan2" "green:lan2" "lan2"
@@ -189,9 +193,6 @@ netgear,r7450)
 netgear,wax202)
 	ucidef_set_led_netdev "internet" "Internet" "green:net" "wan"
 	;;
-netis,n6)
-	ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx"
-	;;
 oraybox,x3a)
 	ucidef_set_led_netdev "wan" "wan link" "red:status" "wan"
 	ucidef_set_led_netdev "lan" "lan link" "green:status" "br-lan"
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
index c780443c1c..f40e9616d0 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
@@ -13,6 +13,7 @@ ramips_setup_interfaces()
 	asus,rt-ax53u|\
 	buffalo,wsr-2533dhpl2|\
 	buffalo,wsr-2533dhpls|\
+	confiabits,mt7621-v1|\
 	gehua,ghl-r-001|\
 	h3c,tx1800-plus|\
 	h3c,tx1801-plus|\



From lede-commits at lists.infradead.org  Tue Jan 14 17:52:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 14 Jan 2025 20:52:24 -0500
Subject: [openwrt/openwrt]  armsr: change image names to 'combined-efi'
In-Reply-To: <173690594411.1589119.6174992322790247507@git-01.infra.openwrt.org>
References: <173690594411.1589119.6174992322790247507@git-01.infra.openwrt.org>
Message-ID: <mailman.39998.1736905948.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c9ebd4fb30773ca55cc2da6b2c1962046a2e0fff

commit c9ebd4fb30773ca55cc2da6b2c1962046a2e0fff
Author: Mathew McBride <matt at traverse.com.au>
AuthorDate: Thu Jun 22 23:36:28 2023 +0000

    armsr: change image names to 'combined-efi'
    
    luci-app-attendedsysupgrade expects images to be named
    'combined-efi' when the system is using EFI images.
    
    This came about as x86 has 'combined' images for legacy
    (BIOS) boot and 'combined-efi' for EFI systems.
    
    armsr images were originally named 'combined' only
    as there was no 'legacy' image type.
    
    To avoid special handling in the attendedsysupgrade
    code, name EFI images consistent with other targets.
    
    Signed-off-by: Mathew McBride <matt at traverse.com.au>
    Link: https://github.com/openwrt/luci/pull/6430
    Link: https://github.com/openwrt/openwrt/pull/12963
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
---
 target/linux/armsr/README         |  4 ++--
 target/linux/armsr/image/Makefile | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/target/linux/armsr/README b/target/linux/armsr/README
index b4b9012826..04f01f8e30 100644
--- a/target/linux/armsr/README
+++ b/target/linux/armsr/README
@@ -49,7 +49,7 @@ With a EDKII or U-Boot binary for the QEMU ARM virtual machines, you can use the
 images in EFI mode:
 
 32-bit:
-gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined.img.gz > openwrt-arm-32.img
+gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined-efi.img.gz > openwrt-arm-32.img
 qemu-system-arm -nographic \
     -cpu cortex-a15 -machine virt \
     -bios bin/targets/armsr/armv7/u-boot-qemu_armv7/u-boot.bin \
@@ -60,7 +60,7 @@ qemu-system-arm -nographic \
     -netdev user,id=testwan -net nic,netdev=testwan
 
 64-bit:
-gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined.img.gz > openwrt-arm-64.img
+gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined-efi.img.gz > openwrt-arm-64.img
 qemu-system-aarch64 -nographic \
     -cpu cortex-a53 -machine virt \
     -bios bin/targets/armsr/armv8/u-boot-qemu_armv8/u-boot.bin \
diff --git a/target/linux/armsr/image/Makefile b/target/linux/armsr/image/Makefile
index 09c37beeec..b34c1f16e7 100644
--- a/target/linux/armsr/image/Makefile
+++ b/target/linux/armsr/image/Makefile
@@ -74,18 +74,18 @@ DEVICE_VARS += GRUB2_VARIANT UBOOT
 define Device/efi-default
   IMAGE/rootfs.img := append-rootfs | pad-to $(ROOTFS_PARTSIZE)
   IMAGE/rootfs.img.gz := append-rootfs | pad-to $(ROOTFS_PARTSIZE) | gzip
-  IMAGE/combined.img := grub-config efi | combined efi | grub-install efi | append-metadata
-  IMAGE/combined.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
-  IMAGE/combined.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
+  IMAGE/combined-efi.img := grub-config efi | combined efi | grub-install efi | append-metadata
+  IMAGE/combined-efi.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
+  IMAGE/combined-efi.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
  ifeq ($(CONFIG_TARGET_IMAGES_GZIP),y)
     IMAGES-y := rootfs.img.gz
-    IMAGES-y += combined.img.gz
+    IMAGES-y += combined-efi.img.gz
   else
     IMAGES-y := rootfs.img
-    IMAGES-y += combined.img
+    IMAGES-y += combined-efi.img
   endif
   ifeq ($(CONFIG_VMDK_IMAGES),y)
-    IMAGES-y += combined.vmdk
+    IMAGES-y += combined-efi.vmdk
   endif
   KERNEL := kernel-bin
   KERNEL_INSTALL := 1



From lede-commits at lists.infradead.org  Tue Jan 14 23:30:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 02:30:22 -0500
Subject: [openwrt/openwrt]  realtek: HPE 1920 8G PoE+ 180W move fans to hwmon
In-Reply-To: <173692622273.2055567.2079192702942676941@git-01.infra.openwrt.org>
References: <173692622273.2055567.2079192702942676941@git-01.infra.openwrt.org>
Message-ID: <mailman.40170.1736926227.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f64541db020ef5689186609e8b7b7a3bb9755160

commit f64541db020ef5689186609e8b7b7a3bb9755160
Author: Evan Jobling <evan at jobling.au>
AuthorDate: Tue Jan 14 12:13:21 2025 +0000

    realtek: HPE 1920 8G PoE+ 180W move fans to hwmon
    
    The GPIO numbering has changed and is not stable. As a result fan
    control via gpio_switch is broken, resulting in errors:
        "export_store: invalid GPIO 456"
    
    Move to using hwmon and gpio-fan. This is by adding gpio_fan_array to
    DTS and kmod-hwmon-gpiofan to DEVICE_PACKAGES.
    
    In combination with the new rtl8231 gpio driver the default fan
    behaviour will be maximum fan speed.
    
    Bump compat value to 1.1 due to existing config in /etc/config/system
    via gpio_switch. Also notify in device compat that fan is now going to
    be at bootloader setting (maximum in this case) by default unless turned
    down.
    
    Signed-off-by: Evan Jobling <evan at jobling.au>
    Link: https://github.com/openwrt/openwrt/pull/17605
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/base-files/etc/board.d/03_gpio_switches  |  1 -
 target/linux/realtek/base-files/etc/board.d/05_compat-version |  3 +++
 target/linux/realtek/dts/rtl8380_hpe_1920-8g-poe-180w.dts     | 11 +++++++++++
 target/linux/realtek/image/common.mk                          |  8 ++++++++
 target/linux/realtek/image/rtl838x.mk                         |  3 ++-
 5 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
index c869153e4c..c178bd4330 100644
--- a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
@@ -6,7 +6,6 @@ board_config_update
 board=$(board_name)
 
 case "$board" in
-hpe,1920-8g-poe-180w|\
 hpe,1920-24g-poe-180w|\
 hpe,1920-24g-poe-370w)
 	ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
diff --git a/target/linux/realtek/base-files/etc/board.d/05_compat-version b/target/linux/realtek/base-files/etc/board.d/05_compat-version
index 5c4ecb9aae..687cbb32a5 100644
--- a/target/linux/realtek/base-files/etc/board.d/05_compat-version
+++ b/target/linux/realtek/base-files/etc/board.d/05_compat-version
@@ -8,6 +8,9 @@
 board_config_update
 
 case "$(board_name)" in
+	hpe,1920-8g-poe-180w)
+		ucidef_set_compat_version "1.1"
+	;;
 	zyxel,gs1900-8 | \
 	zyxel,gs1900-8hp-v1 | \
 	zyxel,gs1900-8hp-v2 | \
diff --git a/target/linux/realtek/dts/rtl8380_hpe_1920-8g-poe-180w.dts b/target/linux/realtek/dts/rtl8380_hpe_1920-8g-poe-180w.dts
index 6398e6d034..f15498354e 100644
--- a/target/linux/realtek/dts/rtl8380_hpe_1920-8g-poe-180w.dts
+++ b/target/linux/realtek/dts/rtl8380_hpe_1920-8g-poe-180w.dts
@@ -5,6 +5,17 @@
 / {
 	compatible = "hpe,1920-8g-poe-180w", "realtek,rtl838x-soc";
 	model = "HPE 1920-8G-PoE+ 180W (JG922A)";
+
+	gpio_fan_array {
+		compatible = "gpio-fan";
+
+		gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map =    <5000 0>,
+					<8200 1>;
+
+		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+		#cooling-cells = <2>;
+	};
 };
 
 &uart1 {
diff --git a/target/linux/realtek/image/common.mk b/target/linux/realtek/image/common.mk
index d9647dbc07..e600b2347d 100644
--- a/target/linux/realtek/image/common.mk
+++ b/target/linux/realtek/image/common.mk
@@ -56,6 +56,14 @@ define Device/hpe_1920
 	append-metadata
 endef
 
+define Device/hwmon-fan-migration
+  DEVICE_COMPAT_VERSION := 1.1
+  DEVICE_COMPAT_MESSAGE := Fan control switched to hwmon. Your fans will retain \
+	bootloader speed unless another control scheme is in place. \
+	Config cannot be kept due to conflict in gpio_switch config 'fan_ctrl' under \
+	/etc/config/system.
+endef
+
 define Device/zyxel_gs1900
   DEVICE_COMPAT_VERSION := 2.0
   DEVICE_COMPAT_MESSAGE := Dual firmware paritition merged due to size constraints. \
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 866659ad14..27dbc6ce59 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -120,9 +120,10 @@ TARGET_DEVICES += hpe_1920-8g-poe-65w
 
 define Device/hpe_1920-8g-poe-180w
   $(Device/hpe_1920)
+  $(Device/hwmon-fan-migration)
   SOC := rtl8380
   DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
-  DEVICE_PACKAGES += realtek-poe
+  DEVICE_PACKAGES += realtek-poe kmod-hwmon-gpiofan
   H3C_DEVICE_ID := 0x00010025
   SUPPORTED_DEVICES += hpe_1920-8g-poe
 endef



From lede-commits at lists.infradead.org  Wed Jan 15 02:25:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 05:25:05 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq807x: add support for Linksys
 HomeWRK
In-Reply-To: <173693670591.2357573.18172362764743768211@git-01.infra.openwrt.org>
References: <173693670591.2357573.18172362764743768211@git-01.infra.openwrt.org>
Message-ID: <mailman.40355.1736936873.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/07f8319d2d9166a41c2fd94ec1422bcd80ada991

commit 07f8319d2d9166a41c2fd94ec1422bcd80ada991
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Sat Aug 17 16:59:58 2024 +0200

    qualcommax: ipq807x: add support for Linksys HomeWRK
    
    Hardware specification:
    ========
    SoC: Qualcomm IPQ8174
    Flash: 1GB (Micron MT29F8G08ABBCAH4 or AMD/Spansion S34MS08G2)
    RAM: 2GB (2x Kingston B5116ECMDXGJD or ESMT M15T2G16128A DDR3L)
    Ethernet: 4x 10/100/1000Mbps (Qualcomm QCA8075)
    WiFi1: 5GHz ax 2x2 (Qualcomm QCN5054 + Skyworks SKY85755-11) - channels 36-64 (low band)
    WiFi2: 2.4GHz ax 2x2 (Qualcomm QCN5024 + Skyworks SKY85340-11)
    WiFi3: 5GHz ax 4x4 (Qualcomm QCN5054 + Skyworks SKY85755-11) - channels 100-177 (high band)
    LED: 1x RGB status (NXP PCA9633)
    USB: 1x USB 3.0
    Button: WPS, Reset
    
    Flash instructions:
    ========
    1. Installation from initramfs image using USB drive:
    Put the initramfs image on the USB drive:
    - dd bs=1M if=openwrt-qualcommax-ipq807x-linksys_homewrk-initramfs-uImage.itb of=/dev/sdX
    Connect serial console (JST PH 6-pin connector):
    - 1 - GND, 2 - TX, 4 - RX (115200, 8N1, 3.3V)
    Stop u-boot and run:
    - usb start && usbboot 44000000 0 && bootm 44000000
    Write firmware to the flash from initramfs:
    - sysupgrade -n openwrt-qualcommax-ipq807x-linksys_homewrk-squashfs-sysupgrade.bin
    or
    - ubiformat /dev/mtd22 -y -f openwrt-qualcommax-ipq807x-linksys_homewrk-squashfs-factory.ubi
    
    2. USB recovery:
    Put the initramfs image on the USB:
    - dd bs=1M if=openwrt-qualcommax-ipq807x-linksys_homewrk-initramfs-uImage.itb of=/dev/sdX
    Set u-boot env:
    - fw_setenv bootusb 'usb start && usbboot 44000000 0 && bootm 44000000'
    - fw_setenv bootcmd 'run bootusb; bootipq'
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17463
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../boot/uboot-envtools/files/qualcommax_ipq807x   |  5 ++
 package/firmware/ipq-wifi/Makefile                 |  8 ++-
 .../arch/arm64/boot/dts/qcom/ipq8174-homewrk.dts   | 68 ++++++++++++++++++++++
 target/linux/qualcommax/image/ipq807x.mk           | 15 +++++
 .../ipq807x/base-files/etc/board.d/02_network      |  1 +
 .../etc/hotplug.d/firmware/11-ath11k-caldata       |  1 +
 .../ipq807x/base-files/lib/upgrade/platform.sh     |  5 ++
 7 files changed, 100 insertions(+), 3 deletions(-)

diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq807x b/package/boot/uboot-envtools/files/qualcommax_ipq807x
index 49754338a5..0fcd55b601 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq807x
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq807x
@@ -29,6 +29,11 @@ edimax,cax1800)
 	[ -n "$idx" ] && \
 		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
 	;;
+linksys,homewrk)
+	idx="$(find_mtd_index 0:appsblenv)"
+	[ -n "$idx" ] && \
+		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x40000"
+	;;
 linksys,mx4200v1|\
 linksys,mx4200v2|\
 linksys,mx5300|\
diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile
index 9821e39a85..da5fd5e23e 100644
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@@ -6,9 +6,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
-PKG_SOURCE_DATE:=2024-12-18
-PKG_SOURCE_VERSION:=4b849214b137b14a903112af3c2016ad9acf48c2
-PKG_MIRROR_HASH:=28162682fe7612460e42398ecc669e245fc0ece873361e3910c2dd8a56111f1c
+PKG_SOURCE_DATE:=2025-01-15
+PKG_SOURCE_VERSION:=6e1801a4992fe72a98a2219f2dcd038194785971
+PKG_MIRROR_HASH:=569cf6894e21712ed6a5553b4fad0bbdeed14e0cc4b9292f5f86343f7897fc7e
 PKG_FLAGS:=nonshared
 
 include $(INCLUDE_DIR)/package.mk
@@ -37,6 +37,7 @@ ALLWIFIBOARDS:= \
 	dynalink_dl-wrx36 \
 	edgecore_eap102 \
 	edimax_cax1800 \
+	linksys_homewrk \
 	linksys_mr7350 \
 	linksys_mx4200 \
 	linksys_mx5300 \
@@ -168,6 +169,7 @@ $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873))
 $(eval $(call generate-ipq-wifi-package,dynalink_dl-wrx36,Dynalink DL-WRX36))
 $(eval $(call generate-ipq-wifi-package,edgecore_eap102,Edgecore EAP102))
 $(eval $(call generate-ipq-wifi-package,edimax_cax1800,Edimax CAX1800))
+$(eval $(call generate-ipq-wifi-package,linksys_homewrk,Linksys HomeWRK))
 $(eval $(call generate-ipq-wifi-package,linksys_mr7350,Linksys MR7350))
 $(eval $(call generate-ipq-wifi-package,linksys_mx4200,Linksys MX4200))
 $(eval $(call generate-ipq-wifi-package,linksys_mx5300,Linksys MX5300))
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-homewrk.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-homewrk.dts
new file mode 100644
index 0000000000..0e184452e3
--- /dev/null
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8174-homewrk.dts
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "ipq8174-mx4x00.dtsi"
+
+/ {
+	model = "Linksys HomeWRK";
+	compatible = "linksys,homewrk", "qcom,ipq8074";
+
+	aliases {
+		ethernet3 = &dp4;
+		ethernet4 = &dp5;
+	};
+
+	chosen {
+		bootargs-append = " root=/dev/ubiblock0_1";
+	};
+};
+
+&qpic_nand {
+	status = "okay";
+
+	nand at 0 {
+		reg = <0>;
+		/*
+		 * Some devices use Micron NAND with with 8 bit ECC 
+		 * other AMD/Spansion NAND with 4 bit ECC
+		 *nand-ecc-strength = <4>;
+		 *nand-ecc-step-size = <512>;
+		 */
+		nand-bus-width = <8>;
+
+		partitions {
+			compatible = "qcom,smem-part";
+		};
+	};
+};
+
+&dp2 {
+	status = "okay";
+	phy-handle = <&qca8075_1>;
+	label = "wan";
+};
+
+&dp3 {
+	status = "okay";
+	phy-handle = <&qca8075_2>;
+	label = "lan3";
+};
+
+&dp4 {
+	status = "okay";
+	phy-handle = <&qca8075_3>;
+	label = "lan2";
+};
+
+&dp5 {
+	status = "okay";
+	phy-handle = <&qca8075_4>;
+	label = "lan1";
+};
+
+&wifi {
+	status = "okay";
+
+	qcom,ath11k-calibration-variant = "Linksys-HomeWRK";
+};
diff --git a/target/linux/qualcommax/image/ipq807x.mk b/target/linux/qualcommax/image/ipq807x.mk
index 260b358ce8..39fc63827c 100644
--- a/target/linux/qualcommax/image/ipq807x.mk
+++ b/target/linux/qualcommax/image/ipq807x.mk
@@ -156,6 +156,21 @@ define Device/edimax_cax1800
 endef
 TARGET_DEVICES += edimax_cax1800
 
+define Device/linksys_homewrk
+	$(call Device/FitImage)
+	$(call Device/UbiFit)
+	DEVICE_VENDOR := Linksys
+	DEVICE_MODEL := HomeWRK
+	DEVICE_DTS_CONFIG := config at oak03
+	BLOCKSIZE := 256k
+	PAGESIZE := 4096
+	IMAGE_SIZE := 475m
+	NAND_SIZE := 1024m
+	SOC := ipq8174
+	DEVICE_PACKAGES += kmod-leds-pca963x ipq-wifi-linksys_homewrk
+endef
+TARGET_DEVICES += linksys_homewrk
+
 define Device/linksys_mx
 	$(call Device/FitImage)
 	DEVICE_VENDOR := Linksys
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
index 5bacbd7dee..af1d2dfebb 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/02_network
@@ -27,6 +27,7 @@ ipq807x_setup_interfaces()
 		ucidef_set_interfaces_lan_wan "lan plc" "wan"
 		;;
 	compex,wpq873|\
+	linksys,homewrk|\
 	linksys,mx4200v1|\
 	linksys,mx4200v2|\
 	linksys,mx4300|\
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
index 65e064ea4d..ec772de8eb 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
@@ -30,6 +30,7 @@ case "$FIRMWARE" in
 	zte,mf269)
 		caldata_extract "0:art" 0x1000 0x20000
 		;;
+	linksys,homewrk|\
 	linksys,mx4200v1|\
 	linksys,mx8500)
 		caldata_extract "0:art" 0x1000 0x20000
diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index b53ec149fe..2d68ec62ed 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -166,6 +166,11 @@ platform_do_upgrade() {
 		fw_setenv upgrade_available 1
 		nand_do_upgrade "$1"
 		;;
+	linksys,homewrk)
+		CI_UBIPART="rootfs"
+		remove_oem_ubi_volume ubi_rootfs
+		nand_do_upgrade "$1"
+		;;
 	linksys,mx4200v1|\
 	linksys,mx4200v2|\
 	linksys,mx4300|\



From lede-commits at lists.infradead.org  Wed Jan 15 02:25:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 05:25:06 -0500
Subject: [openwrt/openwrt]  uboot-envtools: ipq807x: remove number of blocks
 and code simplification
In-Reply-To: <173693670591.2357573.18172362764743768211@git-01.infra.openwrt.org>
References: <173693670591.2357573.18172362764743768211@git-01.infra.openwrt.org>
Message-ID: <mailman.40358.1736936873.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9decfc82dcd0d9d90fbdbddebba053492c594ca4

commit 9decfc82dcd0d9d90fbdbddebba053492c594ca4
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Fri Jan 10 21:16:57 2025 +0100

    uboot-envtools: ipq807x: remove number of blocks and code simplification
    
    Envtools can automatically detect the number of blocks.
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17463
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../boot/uboot-envtools/files/qualcommax_ipq807x   | 76 ++++++++++------------
 1 file changed, 34 insertions(+), 42 deletions(-)

diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq807x b/package/boot/uboot-envtools/files/qualcommax_ipq807x
index 0fcd55b601..840e97fa10 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq807x
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq807x
@@ -7,79 +7,71 @@ touch /etc/config/ubootenv
 
 board=$(board_name)
 
+ubootenv_add_mtd() {
+	local idx="$(find_mtd_index "${1}")"
+	[ -n "$idx" ] && \
+		ubootenv_add_uci_config "/dev/mtd$idx" "${2}" "${3}" "${4}"
+}
+
+ubootenv_add_sys_mtd() {
+	local idx="$(find_mtd_index "${1}")"
+	[ -n "$idx" ] && \
+		ubootenv_add_uci_sys_config "/dev/mtd$idx" "${2}" "${3}" "${4}"
+}
+
+ubootenv_add_mmc() {
+	local mmcpart="$(find_mmc_part "${1}")"
+	[ -n "$mmcpart" ] && \
+		ubootenv_add_uci_config "$mmcpart" "${2}" "${3}" "${4}" "${5}"
+}
+
 case "$board" in
 dynalink,dl-wrx36|\
 netgear,rax120v2|\
+netgear,sxr80|\
+netgear,sxs80|\
 netgear,wax218|\
 netgear,wax620|\
-netgear,wax630)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2"
+netgear,wax630|\
+tplink,eap620hd-v1|\
+tplink,eap660hd-v1)
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x40000" "0x20000"
 	;;
 compex,wpq873|\
 edgecore,eap102|\
 zyxel,nbg7815)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000" "1"
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x10000" "0x10000"
 	;;
 edimax,cax1800)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x10000" "0x20000"
 	;;
 linksys,homewrk)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x40000"
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x40000" "0x40000"
 	;;
 linksys,mx4200v1|\
 linksys,mx4200v2|\
 linksys,mx5300|\
 linksys,mx8500)
-	idx="$(find_mtd_index u_env)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000" "2"
+	ubootenv_add_mtd "u_env" "0x0" "0x40000" "0x20000"
 	;;
 linksys,mx4300)
-	idx="$(find_mtd_index u_env)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x40000" "1"
-	;;
-netgear,sxr80|\
-netgear,sxs80|\
-tplink,eap620hd-v1|\
-tplink,eap660hd-v1)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
+	ubootenv_add_mtd "u_env" "0x0" "0x40000" "0x40000"
 	;;
 redmi,ax6|\
 xiaomi,ax3600|\
 xiaomi,ax9000)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
-	idx2="$(find_mtd_index bdata)"
-	[ -n "$idx2" ] && \
-		ubootenv_add_uci_sys_config "/dev/mtd$idx2" "0x0" "0x10000" "0x20000"
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x10000" "0x20000"
+	ubootenv_add_sys_mtd "bdata" "0x0" "0x10000" "0x20000"
 	;;
 prpl,haze)
-	mmcpart="$(find_mmc_part 0:APPSBLENV)"
-	[ -n "$mmcpart" ] && \
-		ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x400" "0x100"
+	ubootenv_add_mmc "0:APPSBLENV" "0x0" "0x40000" "0x400" "0x100"
 	;;
 asus,rt-ax89x|\
 qnap,301w)
-	idx="$(find_mtd_index 0:appsblenv)"
-	[ -n "$idx" ] && \
-		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x20000" "0x20000" "1"
+	ubootenv_add_mtd "0:appsblenv" "0x0" "0x20000" "0x20000"
 	;;
 spectrum,sax1v1k)
-	mmcpart="$(find_mmc_part 0:APPSBLENV)"
-	[ -n "$mmcpart" ] && \
-		ubootenv_add_uci_config "$mmcpart" "0x0" "0x40000" "0x40000" "1"
+	ubootenv_add_mmc "0:APPSBLENV" "0x0" "0x40000" "0x40000" "1"
 	;;
 esac
 



From lede-commits at lists.infradead.org  Wed Jan 15 12:49:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:49:46 -0500
Subject: [openwrt/openwrt]  netifd: fix napi process name matching in packet
 steering script
In-Reply-To: <173697418619.3347926.4210506606660763682@git-01.infra.openwrt.org>
References: <173697418619.3347926.4210506606660763682@git-01.infra.openwrt.org>
Message-ID: <mailman.40844.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/67a4aeef6c63e5836bd6b82faf6cc15934869efb

commit 67a4aeef6c63e5836bd6b82faf6cc15934869efb
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 15 21:46:53 2025 +0100

    netifd: fix napi process name matching in packet steering script
    
    Fixes CPU usage imbalance on some devices using threaded NAPI
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../network/config/netifd/files/usr/libexec/network/packet-steering.uc  | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
index a578e28879..b2229e5d79 100755
--- a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
+++ b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
@@ -87,7 +87,7 @@ function set_netdev_cpu(dev, cpu) {
 
 function task_device_match(name, device)
 {
-	let napi_match = match(name, /napi\/([^-+])-\d+/);
+	let napi_match = match(name, /napi\/([^-]*)-\d+/);
 	if (!napi_match)
 		napi_match = match(name, /mt76-tx (phy\d+)/);
 	if (napi_match &&



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:11 -0500
Subject: [openwrt/openwrt]  wifi-scripts: allow per-IF mesh basic rate
 selection
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40845.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/93cdb10411bb6aca61f78506bd90e93c16b85064

commit 93cdb10411bb6aca61f78506bd90e93c16b85064
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Tue Jan 7 11:43:36 2025 +0100

    wifi-scripts: allow per-IF mesh basic rate selection
    
    Bringing up a mesh interface using wpa_supplicant already supports a
    per-VIF basic rate selection. Add the same ability when creating a mesh
    VIF without wpa_supplicant.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
    (cherry picked from commit 3deeb7805f69f54b9ab20c0e12f8dd916fec4de1)
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh     | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 52c36a8c92..b4aa19bf52 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -844,13 +844,19 @@ mac80211_setup_adhoc() {
 
 mac80211_setup_mesh() {
 	json_get_vars ssid mesh_id mcast_rate
+	json_get_values iface_basic_rate_list basic_rate
 
 	mcval=
 	[ -n "$mcast_rate" ] && wpa_supplicant_add_rate mcval "$mcast_rate"
 	[ -n "$mesh_id" ] && ssid="$mesh_id"
 
+	br_list="$basic_rate_list"
+	if [ -n "$iface_basic_rate_list" ]; then
+		br_list="$iface_basic_rate_list"
+	fi
+
 	brstr=
-	for br in $basic_rate_list; do
+	for br in $br_list; do
 		wpa_supplicant_add_rate brstr "$br"
 	done
 



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:07 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:07 -0500
Subject: [openwrt/openwrt]  wifi-scripts: add option to set per-device ifname
 prefix
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40846.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/06340650c5d056dd542b6c8cbcfa87cb4f9d9b27

commit 06340650c5d056dd542b6c8cbcfa87cb4f9d9b27
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Dec 4 11:59:14 2024 +0100

    wifi-scripts: add option to set per-device ifname prefix
    
    Simplifies setting ifname to a different pattern for all affected
    interfaces.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit a9ff3ba24b9466d9c06b9a9e1c2e9672bdd9f6f9)
---
 .../wifi-scripts/files/lib/netifd/wireless/mac80211.sh     | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 368885246a..4bf452d2f6 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -29,6 +29,7 @@ drv_mac80211_init_device_config() {
 	config_add_string path phy 'macaddr:macaddr'
 	config_add_string tx_burst
 	config_add_string distance
+	config_add_string ifname_prefix
 	config_add_int radio beacon_int chanbw frag rts
 	config_add_int rxantenna txantenna txpower min_tx_power
 	config_add_int num_global_macaddr multiple_bssid
@@ -660,9 +661,9 @@ mac80211_check_ap() {
 }
 
 mac80211_set_ifname() {
-	local phy="$1"
-	local prefix="$2"
-	eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))"
+	local prefix="$1"
+	local type="$2"
+	eval "ifname=\"$prefix$type\${idx_$type:-0}\"; idx_$type=\$((\${idx_$type:-0 } + 1))"
 }
 
 mac80211_prepare_vif() {
@@ -679,7 +680,7 @@ mac80211_prepare_vif() {
 		monitor) prefix=mon;;
 		esac
 
-		mac80211_set_ifname "$phy$vif_phy_suffix" "$prefix"
+		mac80211_set_ifname "$ifname_prefix" "$prefix"
 	}
 
 	append active_ifnames "$ifname"
@@ -1116,7 +1117,8 @@ drv_mac80211_setup() {
 		txpower \
 		rxantenna txantenna \
 		frag rts beacon_int:100 htmode \
-		num_global_macaddr:1 multiple_bssid
+		num_global_macaddr:1 multiple_bssid \
+		ifname_prefix
 	json_get_values basic_rate_list basic_rate
 	json_get_values scan_list scan_list
 	json_select ..
@@ -1135,6 +1137,8 @@ drv_mac80211_setup() {
 		return 1
 	}
 
+	set_default ifname_prefix "$phy$vif_phy_suffix-"
+
 	local wdev
 	local cwdev
 	local found



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:06 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-14)
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40847.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f719c8552723f0525ce76ba44a75e45ecbe2e7a9

commit f719c8552723f0525ce76ba44a75e45ecbe2e7a9
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Jan 14 13:48:23 2025 +0100

    mt76: update to Git HEAD (2025-01-14)
    
    cf4e709e493a wifi: mt76: mt7996: fix crash in mt7996_set_radar_background
    4c786fa52bb2 wifi: mt76: mt7915: fix register mapping
    849923df3dde wifi: mt76: mt7996: fix register mapping
    6be1dc9a1c79 wifi: mt76: mt7925: fix the unfinished command of regd_notifier before suspend
    d33ea3cab72b wifi: mt76: mt7925: fix CLC command timeout when suspend/resume
    5aacd0d73c80 wifi: mt76: mt7925: add handler to hif suspend/resume event
    e86e97e45397 wifi: mt76: mt7925e: fix too long of wifi resume time
    e43df6bf4892 wifi: mt76: mt7996: fix thermal sparse warning
    02f453d8dfc8 wifi: mt76: fix survey regression
    7279e3f3c3e0 wifi: mt76: mt7925: fix unused-but-set warning
    49c0bd66da3b wifi: mt76: mt7996: fix unused-but-set variable
    2c068c96382e wifi: mt76: fix crash in mt76_switch_vif_chanctx
    731070da2c2a wifi: mt76: mt7996: add max mpdu len capability
    99d8ed164a96 wifi: mt76: mt7996: fix the capability of reception of EHT MU PPDU
    32ee924831ba wifi: mt76: mt7996: fix HE Phy capability
    9b588c7fb333 wifi: mt76: mt7996: fix incorrect indexing of MIB FW event
    46798905cf5a wifi: mt76: connac: adjust phy capabilities based on band constraints
    5c50f6f7dafe wifi: mt76: mt7996: fix definition of tx descriptor
    9cdb62dc084f wifi: mt76: mt7996: fix ldpc setting
    8c6cb2f97fe0 wifi: mt76: mt7996: fix beacon command during disabling
    8e4f72b682e9 wifi: mt76: mt7996: add implicit beamforming support for mt7992
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 3963dab0302ae29cbf2acf28f26c1432e4ddf1a5)
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index 7bc030a9df..cd168f49bc 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-04
-PKG_SOURCE_VERSION:=e354436db4402552bcb0cbe9abab2a46fb1ad31c
-PKG_MIRROR_HASH:=7e3894e1f2641e172f87be1ae0cc6adda318d989350ebd53500a7df02f0afd8f
+PKG_SOURCE_DATE:=2025-01-14
+PKG_SOURCE_VERSION:=8e4f72b682e9070108536507c5e2720b18c3816d
+PKG_MIRROR_HASH:=fa8c5a2ece9e7287605910d9f906b601711c7863613addaadd666f9e3858a9e7
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:12 -0500
Subject: [openwrt/openwrt]  netifd: fix napi process name matching in packet
 steering script
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40848.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e7cd87e72dae24d473b16b0748e83ebbd4ae76e6

commit e7cd87e72dae24d473b16b0748e83ebbd4ae76e6
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 15 21:46:53 2025 +0100

    netifd: fix napi process name matching in packet steering script
    
    Fixes CPU usage imbalance on some devices using threaded NAPI
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 67a4aeef6c63e5836bd6b82faf6cc15934869efb)
---
 .../network/config/netifd/files/usr/libexec/network/packet-steering.uc  | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
index a578e28879..b2229e5d79 100755
--- a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
+++ b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
@@ -87,7 +87,7 @@ function set_netdev_cpu(dev, cpu) {
 
 function task_device_match(name, device)
 {
-	let napi_match = match(name, /napi\/([^-+])-\d+/);
+	let napi_match = match(name, /napi\/([^-]*)-\d+/);
 	if (!napi_match)
 		napi_match = match(name, /mt76-tx (phy\d+)/);
 	if (napi_match &&



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:08 -0500
Subject: [openwrt/openwrt]  hostapd: fix processing mbssid config option
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40849.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e20047e5d4f369f1e25787d95996109b0f3933e4

commit e20047e5d4f369f1e25787d95996109b0f3933e4
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Dec 9 19:19:46 2024 +0100

    hostapd: fix processing mbssid config option
    
    Do not strip the first character from the field name
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 59dd9cddf9e72d1f9b4ff7e01ae32d2fa99259d9)
---
 package/network/services/hostapd/files/hostapd.uc | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/package/network/services/hostapd/files/hostapd.uc b/package/network/services/hostapd/files/hostapd.uc
index ee24112059..771108ace8 100644
--- a/package/network/services/hostapd/files/hostapd.uc
+++ b/package/network/services/hostapd/files/hostapd.uc
@@ -747,9 +747,10 @@ function iface_load_config(phy, radio, filename)
 			continue;
 		}
 
-		if (val[0] == "#num_global_macaddr" ||
-		    val[0] == "mbssid")
+		if (val[0] == "#num_global_macaddr")
 			config[substr(val[0], 1)] = int(val[1]);
+		else if (val[0] == "mbssid")
+			config[val[0]] = int(val[1]);
 
 		push(config.radio.data, line);
 	}



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:10 -0500
Subject: [openwrt/openwrt]  wifi-scripts: remove leftover legacy (non-netifd)
 wifi script support
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40852.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3d99cdd3773fa295e61bf50f181359f5a4ebfeff

commit 3d99cdd3773fa295e61bf50f181359f5a4ebfeff
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Nov 19 14:08:38 2024 +0100

    wifi-scripts: remove leftover legacy (non-netifd) wifi script support
    
    cfg80211 is the only supported wireless API
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit d1275392916522d664e710752c517246540cbf73)
---
 .../network/config/wifi-scripts/files/sbin/wifi    | 180 ---------------------
 1 file changed, 180 deletions(-)

diff --git a/package/network/config/wifi-scripts/files/sbin/wifi b/package/network/config/wifi-scripts/files/sbin/wifi
index f937dba7e6..c70723560b 100755
--- a/package/network/config/wifi-scripts/files/sbin/wifi
+++ b/package/network/config/wifi-scripts/files/sbin/wifi
@@ -37,135 +37,22 @@ wifi_isup() {
 	return 0
 }
 
-find_net_config() {(
-	local vif="$1"
-	local cfg
-	local ifname
-
-	config_get cfg "$vif" network
-
-	[ -z "$cfg" ] && {
-		include /lib/network
-		scan_interfaces
-
-		config_get ifname "$vif" ifname
-
-		cfg="$(find_config "$ifname")"
-	}
-	[ -z "$cfg" ] && return 0
-	echo "$cfg"
-)}
-
-
-bridge_interface() {(
-	local cfg="$1"
-	[ -z "$cfg" ] && return 0
-
-	include /lib/network
-	scan_interfaces
-
-	for cfg in $cfg; do
-		config_get iftype "$cfg" type
-		[ "$iftype" = bridge ] && config_get "$cfg" ifname
-		prepare_interface_bridge "$cfg"
-		return $?
-	done
-)}
-
-prepare_key_wep() {
-	local key="$1"
-	local hex=1
-
-	echo -n "$key" | grep -qE "[^a-fA-F0-9]" && hex=0
-	[ "${#key}" -eq 10 -a $hex -eq 1 ] || \
-	[ "${#key}" -eq 26 -a $hex -eq 1 ] || {
-		[ "${key:0:2}" = "s:" ] && key="${key#s:}"
-		key="$(echo -n "$key" | hexdump -ve '1/1 "%02x" ""')"
-	}
-	echo "$key"
-}
-
-wifi_fixup_hwmode() {
-	local device="$1"
-	local default="$2"
-	local hwmode hwmode_11n
-
-	config_get channel "$device" channel
-	config_get hwmode "$device" hwmode
-	case "$hwmode" in
-		11bg) hwmode=bg;;
-		11a) hwmode=a;;
-		11ad) hwmode=ad;;
-		11b) hwmode=b;;
-		11g) hwmode=g;;
-		11n*)
-			hwmode_11n="${hwmode##11n}"
-			case "$hwmode_11n" in
-				a|g) ;;
-				default) hwmode_11n="$default"
-			esac
-			config_set "$device" hwmode_11n "$hwmode_11n"
-		;;
-		*)
-			hwmode=
-			if [ "${channel:-0}" -gt 0 ]; then
-				if [ "${channel:-0}" -gt 14 ]; then
-					hwmode=a
-				else
-					hwmode=g
-				fi
-			else
-				hwmode="$default"
-			fi
-		;;
-	esac
-	config_set "$device" hwmode "$hwmode"
-}
-
-_wifi_updown() {
-	for device in ${2:-$DEVICES}; do (
-		config_get disabled "$device" disabled
-		[ "$disabled" = "1" ] && {
-			echo "'$device' is disabled"
-			set disable
-		}
-		config_get iftype "$device" type
-		if eval "type ${1}_$iftype" 2>/dev/null >/dev/null; then
-			eval "scan_$iftype '$device'"
-			eval "${1}_$iftype '$device'" || echo "$device($iftype): ${1} failed"
-		elif [ ! -f /lib/netifd/wireless/$iftype.sh ]; then
-			echo "$device($iftype): Interface type not supported"
-		fi
-	); done
-}
-
 wifi_updown() {
 	cmd=down
 	[ enable = "$1" ] && {
-		_wifi_updown disable "$2"
 		ubus_wifi_cmd "$cmd" "$2"
 		ubus call network reload
-		scan_wifi
 		cmd=up
 	}
 	[ reconf = "$1" ] && {
 		ubus call network reload
-		scan_wifi
 		cmd=reconf
 	}
 	ubus_wifi_cmd "$cmd" "$2"
-	_wifi_updown "$@"
-}
-
-wifi_reload_legacy() {
-	_wifi_updown "disable" "$1"
-	scan_wifi
-	_wifi_updown "enable" "$1"
 }
 
 wifi_reload() {
 	ubus call network reload
-	wifi_reload_legacy
 }
 
 wifi_detect_notice() {
@@ -189,75 +76,9 @@ wifi_config() {
 	); done
 }
 
-start_net() {(
-	local iface="$1"
-	local config="$2"
-	local vifmac="$3"
-
-	[ -f "/var/run/$iface.pid" ] && kill "$(cat /var/run/${iface}.pid)" 2>/dev/null
-	[ -z "$config" ] || {
-		include /lib/network
-		scan_interfaces
-		for config in $config; do
-			setup_interface "$iface" "$config" "" "$vifmac"
-		done
-	}
-)}
-
-set_wifi_up() {
-	local cfg="$1"
-	local ifname="$2"
-	uci_set_state wireless "$cfg" up 1
-	uci_set_state wireless "$cfg" ifname "$ifname"
-}
-
-set_wifi_down() {
-	local cfg="$1"
-	local vifs vif vifstr
-
-	[ -f "/var/run/wifi-${cfg}.pid" ] &&
-		kill "$(cat "/var/run/wifi-${cfg}.pid")" 2>/dev/null
-	uci_revert_state wireless "$cfg"
-	config_get vifs "$cfg" vifs
-	for vif in $vifs; do
-		uci_revert_state wireless "$vif"
-	done
-}
-
-scan_wifi() {
-	local cfgfile="$1"
-	DEVICES=
-	config_cb() {
-		local type="$1"
-		local section="$2"
-
-		# section start
-		case "$type" in
-			wifi-device)
-				append DEVICES "$section"
-				config_set "$section" vifs ""
-				config_set "$section" ht_capab ""
-			;;
-		esac
-
-		# section end
-		config_get TYPE "$CONFIG_SECTION" TYPE
-		case "$TYPE" in
-			wifi-iface)
-				config_get device "$CONFIG_SECTION" device
-				config_get vifs "$device" vifs
-				append vifs "$CONFIG_SECTION"
-				config_set "$device" vifs "$vifs"
-			;;
-		esac
-	}
-	config_load "${cfgfile:-wireless}"
-}
-
 DEVICES=
 DRIVERS=
 include /lib/wifi
-scan_wifi
 
 case "$1" in
 	down) wifi_updown "disable" "$2";;
@@ -266,7 +87,6 @@ case "$1" in
 	status) ubus_wifi_cmd "status" "$2";;
 	isup) wifi_isup "$2"; exit $?;;
 	reload) wifi_reload "$2";;
-	reload_legacy) wifi_reload_legacy "$2";;
 	--help|help) usage;;
 	reconf) wifi_updown "reconf" "$2";;
 	''|up) wifi_updown "enable" "$2";;



From lede-commits at lists.infradead.org  Wed Jan 15 12:56:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 15 Jan 2025 15:56:09 -0500
Subject: [openwrt/openwrt]  wifi-scripts: add macaddr_base wifi-device option
In-Reply-To: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
References: <173697456637.3359063.8008082601414505439@git-01.infra.openwrt.org>
Message-ID: <mailman.40853.1736974827.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/ea80aa938fc56a14b2fccecec41457aeee9e1647

commit ea80aa938fc56a14b2fccecec41457aeee9e1647
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Dec 9 20:09:15 2024 +0100

    wifi-scripts: add macaddr_base wifi-device option
    
    This can be used to configure the base mac address from which all
    interface mac addresses are derived
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 00860e485b2ef82c1fafc8e011f3a8965e317bca)
---
 .../config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh |  9 ++++++---
 .../config/wifi-scripts/files/usr/share/hostap/common.uc      |  4 +++-
 package/network/services/hostapd/files/hostapd.uc             |  3 +++
 package/network/services/hostapd/files/wpa_supplicant.uc      | 11 ++++++++---
 4 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
index 4bf452d2f6..52c36a8c92 100755
--- a/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
+++ b/package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
@@ -30,6 +30,7 @@ drv_mac80211_init_device_config() {
 	config_add_string tx_burst
 	config_add_string distance
 	config_add_string ifname_prefix
+	config_add_string macaddr_base
 	config_add_int radio beacon_int chanbw frag rts
 	config_add_int rxantenna txantenna txpower min_tx_power
 	config_add_int num_global_macaddr multiple_bssid
@@ -530,6 +531,7 @@ ${hostapd_noscan:+noscan=1}
 ${tx_burst:+tx_queue_data2_burst=$tx_burst}
 ${multiple_bssid:+mbssid=$multiple_bssid}
 #num_global_macaddr=$num_global_macaddr
+#macaddr_base=$macaddr_base
 $base_cfg
 
 EOF
@@ -577,7 +579,7 @@ mac80211_generate_mac() {
 	local phy="$1"
 	local id="${macidx:-0}"
 
-	wdev_tool "$phy$phy_suffix" get_macaddr id=$id num_global=$num_global_macaddr mbssid=${multiple_bssid:-0}
+	wdev_tool "$phy$phy_suffix" get_macaddr id=$id num_global=$num_global_macaddr mbssid=${multiple_bssid:-0} macaddr_base=${macaddr_base}
 }
 
 get_board_phy_name() (
@@ -945,6 +947,7 @@ wpa_supplicant_set_config() {
 	json_add_string phy "$phy"
 	json_add_int radio "$radio"
 	json_add_int num_global_macaddr "$num_global_macaddr"
+	json_add_string macaddr_base "$macaddr_base"
 	json_add_boolean defer 1
 	local data="$(json_dump)"
 
@@ -991,7 +994,7 @@ wpa_supplicant_start() {
 
 	[ -n "$wpa_supp_init" ] || return 0
 
-	ubus_call wpa_supplicant config_set '{ "phy": "'"$phy"'", "radio": '"$radio"', "num_global_macaddr": '"$num_global_macaddr"' }' > /dev/null
+	ubus_call wpa_supplicant config_set '{ "phy": "'"$phy"'", "radio": '"$radio"', "num_global_macaddr": '"$num_global_macaddr"', "macaddr_base": "'"$macaddr_base"'" }' > /dev/null
 }
 
 mac80211_setup_supplicant() {
@@ -1118,7 +1121,7 @@ drv_mac80211_setup() {
 		rxantenna txantenna \
 		frag rts beacon_int:100 htmode \
 		num_global_macaddr:1 multiple_bssid \
-		ifname_prefix
+		ifname_prefix macaddr_base
 	json_get_values basic_rate_list basic_rate
 	json_get_values scan_list scan_list
 	json_select ..
diff --git a/package/network/config/wifi-scripts/files/usr/share/hostap/common.uc b/package/network/config/wifi-scripts/files/usr/share/hostap/common.uc
index c6bfb62ef3..fd28b66472 100644
--- a/package/network/config/wifi-scripts/files/usr/share/hostap/common.uc
+++ b/package/network/config/wifi-scripts/files/usr/share/hostap/common.uc
@@ -213,7 +213,9 @@ const phy_proto = {
 		if (!base_mask)
 			return null;
 
-		if (base_mask == "00:00:00:00:00:00" &&
+		if (data.macaddr_base)
+			base_addr = data.macaddr_base;
+		else if (base_mask == "00:00:00:00:00:00" &&
 		    (radio_idx > 0 || idx >= num_global)) {
 			let addrs = split(phy_sysfs_file(phy, "addresses"), "\n");
 
diff --git a/package/network/services/hostapd/files/hostapd.uc b/package/network/services/hostapd/files/hostapd.uc
index 771108ace8..f4f479c0f6 100644
--- a/package/network/services/hostapd/files/hostapd.uc
+++ b/package/network/services/hostapd/files/hostapd.uc
@@ -279,6 +279,7 @@ function iface_macaddr_init(phydev, config, macaddr_list)
 {
 	let macaddr_data = {
 		num_global: config.num_global_macaddr ?? 1,
+		macaddr_base: config.macaddr_base,
 		mbssid: config.mbssid ?? 0,
 	};
 
@@ -749,6 +750,8 @@ function iface_load_config(phy, radio, filename)
 
 		if (val[0] == "#num_global_macaddr")
 			config[substr(val[0], 1)] = int(val[1]);
+		else if (val[0] == "#macaddr_base")
+			config[substr(val[0], 1)] = val[1];
 		else if (val[0] == "mbssid")
 			config[val[0]] = int(val[1]);
 
diff --git a/package/network/services/hostapd/files/wpa_supplicant.uc b/package/network/services/hostapd/files/wpa_supplicant.uc
index fbea27628e..f288121e9d 100644
--- a/package/network/services/hostapd/files/wpa_supplicant.uc
+++ b/package/network/services/hostapd/files/wpa_supplicant.uc
@@ -68,7 +68,7 @@ function prepare_config(config, radio)
 	return { config };
 }
 
-function set_config(config_name, phy_name, radio, num_global_macaddr, config_list)
+function set_config(config_name, phy_name, radio, num_global_macaddr, macaddr_base, config_list)
 {
 	let phy = wpas.data.config[config_name];
 
@@ -83,6 +83,7 @@ function set_config(config_name, phy_name, radio, num_global_macaddr, config_lis
 
 	phy.radio = radio;
 	phy.num_global_macaddr = num_global_macaddr;
+	phy.macaddr_base = macaddr_base;
 
 	let values = [];
 	for (let config in config_list)
@@ -106,7 +107,10 @@ function start_pending(phy_name)
 	}
 
 	let macaddr_list = wpas.data.macaddr_list[phy_name];
-	phydev.macaddr_init(macaddr_list, { num_global: phy.num_global_macaddr });
+	phydev.macaddr_init(macaddr_list, {
+		num_global: phy.num_global_macaddr,
+		macaddr_base: phy.macaddr_base,
+	});
 
 	for (let ifname in phy.data)
 		iface_start(phydev, phy.data[ifname]);
@@ -210,6 +214,7 @@ let main_obj = {
 			phy: "",
 			radio: 0,
 			num_global_macaddr: 0,
+			macaddr_base: "",
 			config: [],
 			defer: true,
 		},
@@ -221,7 +226,7 @@ let main_obj = {
 			wpas.printf(`Set new config for phy ${phy}`);
 			try {
 				if (req.args.config)
-					set_config(phy, req.args.phy, req.args.radio, req.args.num_global_macaddr, req.args.config);
+					set_config(phy, req.args.phy, req.args.radio, req.args.num_global_macaddr, req.args.macaddr_base, req.args.config);
 
 				if (!req.args.defer)
 					start_pending(phy);



From lede-commits at lists.infradead.org  Wed Jan 15 22:33:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 16 Jan 2025 01:33:47 -0500
Subject: [openwrt/openwrt]  realtek: HPE 1920 24G PoE+ 180W/370W move fans to
 hwmon
In-Reply-To: <173700922737.11793.16703429061488913173@git-01.infra.openwrt.org>
References: <173700922737.11793.16703429061488913173@git-01.infra.openwrt.org>
Message-ID: <mailman.41039.1737009232.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0a7c8ed9d94930ba062c71df79f63c06eeab4543

commit 0a7c8ed9d94930ba062c71df79f63c06eeab4543
Author: Fabian Groffen <grobian at gentoo.org>
AuthorDate: Wed Jan 15 20:12:02 2025 +0100

    realtek: HPE 1920 24G PoE+ 180W/370W move fans to hwmon
    
    Apply the equivalent of commit f64541db020e ("realtek: HPE 1920 8G PoE+
    180W move fans to hwmon") to the 24-ports variants of the HPE 1920 PoE+
    switches, with model numbers JG925A and JG926A.
    
    Copy from the original commit message:
    
      Move to using hwmon and gpio-fan. This is by adding gpio_fan_array to
      DTS and kmod-hwmon-gpiofan to DEVICE_PACKAGES.
    
      In combination with the new rtl8231 gpio driver the default fan
      behaviour will be maximum fan speed.
    
      Bump compat value to 1.1 due to existing config in /etc/config/system
      via gpio_switch. Also notify in device compat that fan is now going to
      be at bootloader setting (maximum in this case) by default unless turned
      down.
    
    As the init script 03_gpio_switches does not perform any action after
    removing these devices from it, the file can be dropped.
    
    Link: https://github.com/openwrt/openwrt/pull/17598
    Signed-off-by: Fabian Groffen <grobian at gentoo.org>
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/base-files/etc/board.d/03_gpio_switches     | 17 -----------------
 .../realtek/base-files/etc/board.d/05_compat-version    |  4 +++-
 .../linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts | 11 +++++++++++
 .../linux/realtek/dts/rtl8382_hpe_1920-24g-poe-370w.dts | 11 +++++++++++
 target/linux/realtek/image/rtl838x.mk                   |  6 ++++--
 5 files changed, 29 insertions(+), 20 deletions(-)

diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
deleted file mode 100644
index c178bd4330..0000000000
--- a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
+++ /dev/null
@@ -1,17 +0,0 @@
-
-. /lib/functions/uci-defaults.sh
-
-board_config_update
-
-board=$(board_name)
-
-case "$board" in
-hpe,1920-24g-poe-180w|\
-hpe,1920-24g-poe-370w)
-	ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
-	;;
-esac
-
-board_config_flush
-
-exit 0
diff --git a/target/linux/realtek/base-files/etc/board.d/05_compat-version b/target/linux/realtek/base-files/etc/board.d/05_compat-version
index 687cbb32a5..9c27314b24 100644
--- a/target/linux/realtek/base-files/etc/board.d/05_compat-version
+++ b/target/linux/realtek/base-files/etc/board.d/05_compat-version
@@ -8,7 +8,9 @@
 board_config_update
 
 case "$(board_name)" in
-	hpe,1920-8g-poe-180w)
+	hpe,1920-8g-poe-180w | \
+	hpe,1920-24g-poe-180w | \
+	hpe,1920-24g-poe-370w)
 		ucidef_set_compat_version "1.1"
 	;;
 	zyxel,gs1900-8 | \
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
index 4783cec15c..69e647c59a 100644
--- a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-180w.dts
@@ -5,6 +5,17 @@
 / {
 	compatible = "hpe,1920-24g-poe-180w", "realtek,rtl838x-soc";
 	model = "HPE 1920-24G-PoE+ 180W (JG925A)";
+
+	gpio_fan_array {
+		compatible = "gpio-fan";
+
+		gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map =    <5000 0>,
+					<8200 1>;
+
+		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+		#cooling-cells = <2>;
+	};
 };
 
 &uart1 {
diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-370w.dts b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-370w.dts
index ccdcf71d1b..532f23ab2f 100644
--- a/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-370w.dts
+++ b/target/linux/realtek/dts/rtl8382_hpe_1920-24g-poe-370w.dts
@@ -5,6 +5,17 @@
 / {
 	compatible = "hpe,1920-24g-poe-370w", "realtek,rtl838x-soc";
 	model = "HPE 1920-24G-PoE+ 370W (JG926A)";
+
+	gpio_fan_array {
+		compatible = "gpio-fan";
+
+		gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+		gpio-fan,speed-map =    <5000 0>,
+					<8200 1>;
+
+		alarm-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+		#cooling-cells = <2>;
+	};
 };
 
 &uart1 {
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 27dbc6ce59..34464316c7 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -147,18 +147,20 @@ TARGET_DEVICES += hpe_1920-24g
 
 define Device/hpe_1920-24g-poe-180w
   $(Device/hpe_1920)
+  $(Device/hwmon-fan-migration)
   SOC := rtl8382
   DEVICE_MODEL := 1920-24G-PoE+ 180W (JG925A)
-  DEVICE_PACKAGES += realtek-poe
+  DEVICE_PACKAGES += realtek-poe kmod-hwmon-gpiofan
   H3C_DEVICE_ID := 0x00010028
 endef
 TARGET_DEVICES += hpe_1920-24g-poe-180w
 
 define Device/hpe_1920-24g-poe-370w
   $(Device/hpe_1920)
+  $(Device/hwmon-fan-migration)
   SOC := rtl8382
   DEVICE_MODEL := 1920-24G-PoE+ 370W (JG926A)
-  DEVICE_PACKAGES += realtek-poe
+  DEVICE_PACKAGES += realtek-poe kmod-hwmon-gpiofan
   H3C_DEVICE_ID := 0x00010029
 endef
 TARGET_DEVICES += hpe_1920-24g-poe-370w



From lede-commits at lists.infradead.org  Thu Jan 16 06:01:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 16 Jan 2025 09:01:02 -0500
Subject: [openwrt/openwrt]  realtek: Use atomic poll for aux-mdio commands
In-Reply-To: <173703606249.999052.4350687565593304099@git-01.infra.openwrt.org>
References: <173703606249.999052.4350687565593304099@git-01.infra.openwrt.org>
Message-ID: <mailman.41295.1737036375.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/693c1ea81a314cfa37a60a293568d2e46282b717

commit 693c1ea81a314cfa37a60a293568d2e46282b717
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Jan 16 13:23:54 2025 +0100

    realtek: Use atomic poll for aux-mdio commands
    
    regmap_read_poll_timeout() relies on usleep_range() to time the polling
    loop. With the current, rather large, scheduling interval, a short
    usleep_range() may take a lot longer than expected, causing performance
    issues.
    
    Switch the driver over to using regmap_read_poll_timeout_atomic(), which
    uses udelay() to time the polling loop.
    
    For comparision, the 'ethtool -m <dev>' command is about 10 times faster
    with the atomic variant.
    Using 'perf -r10 ethtool -m lan25':
      - Driver using regmap_read_poll_timeout():
          2.0117 +- 0.0118 seconds time elapsed  ( +-  0.58% )
      - Driver using regmap_read_poll_timeout_atomic():
          0.1674 +- 0.0250 seconds time elapsed  ( +- 14.95% )
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch            | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
index 430f8f5c00..a58cc496ef 100644
--- a/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
+++ b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
@@ -103,7 +103,7 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +	if (err)
 +		return err;
 +
-+	err = regmap_read_poll_timeout(ctrl->map, ctrl->cmd_reg, run, (run != cmd), 3, 100);
++	err = regmap_read_poll_timeout_atomic(ctrl->map, ctrl->cmd_reg, run, (run != cmd), 3, 100);
 +
 +	if ((run & ~mask_volatile) != (cmd & ~mask_volatile)) {
 +		dev_err(ctrl->dev, "Command modified. Is offloading still active?");



From lede-commits at lists.infradead.org  Thu Jan 16 12:13:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 16 Jan 2025 15:13:03 -0500
Subject: [openwrt/openwrt]  armsr: change image names to 'combined-efi'
In-Reply-To: <173705838346.1664045.6330406076106571057@git-01.infra.openwrt.org>
References: <173705838346.1664045.6330406076106571057@git-01.infra.openwrt.org>
Message-ID: <mailman.41602.1737058388.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7555fb02ecfd341376db0adfedd2fded3450d7c8

commit 7555fb02ecfd341376db0adfedd2fded3450d7c8
Author: Mathew McBride <matt at traverse.com.au>
AuthorDate: Thu Jun 22 23:36:28 2023 +0000

    armsr: change image names to 'combined-efi'
    
    luci-app-attendedsysupgrade expects images to be named
    'combined-efi' when the system is using EFI images.
    
    This came about as x86 has 'combined' images for legacy
    (BIOS) boot and 'combined-efi' for EFI systems.
    
    armsr images were originally named 'combined' only
    as there was no 'legacy' image type.
    
    To avoid special handling in the attendedsysupgrade
    code, name EFI images consistent with other targets.
    
    Signed-off-by: Mathew McBride <matt at traverse.com.au>
    Link: https://github.com/openwrt/luci/pull/6430
    Link: https://github.com/openwrt/openwrt/pull/12963
    Signed-off-by: Petr ?tetiar <ynezz at true.cz>
    (cherry picked from commit c9ebd4fb30773ca55cc2da6b2c1962046a2e0fff)
---
 target/linux/armsr/README         |  4 ++--
 target/linux/armsr/image/Makefile | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/target/linux/armsr/README b/target/linux/armsr/README
index b4b9012826..04f01f8e30 100644
--- a/target/linux/armsr/README
+++ b/target/linux/armsr/README
@@ -49,7 +49,7 @@ With a EDKII or U-Boot binary for the QEMU ARM virtual machines, you can use the
 images in EFI mode:
 
 32-bit:
-gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined.img.gz > openwrt-arm-32.img
+gunzip -c bin/targets/armsr/armv7/openwrt-armsr-armv7-generic-ext4-combined-efi.img.gz > openwrt-arm-32.img
 qemu-system-arm -nographic \
     -cpu cortex-a15 -machine virt \
     -bios bin/targets/armsr/armv7/u-boot-qemu_armv7/u-boot.bin \
@@ -60,7 +60,7 @@ qemu-system-arm -nographic \
     -netdev user,id=testwan -net nic,netdev=testwan
 
 64-bit:
-gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined.img.gz > openwrt-arm-64.img
+gunzip -c bin/targets/armsr/armv8/openwrt-armsr-armv8-generic-ext4-combined-efi.img.gz > openwrt-arm-64.img
 qemu-system-aarch64 -nographic \
     -cpu cortex-a53 -machine virt \
     -bios bin/targets/armsr/armv8/u-boot-qemu_armv8/u-boot.bin \
diff --git a/target/linux/armsr/image/Makefile b/target/linux/armsr/image/Makefile
index 09c37beeec..b34c1f16e7 100644
--- a/target/linux/armsr/image/Makefile
+++ b/target/linux/armsr/image/Makefile
@@ -74,18 +74,18 @@ DEVICE_VARS += GRUB2_VARIANT UBOOT
 define Device/efi-default
   IMAGE/rootfs.img := append-rootfs | pad-to $(ROOTFS_PARTSIZE)
   IMAGE/rootfs.img.gz := append-rootfs | pad-to $(ROOTFS_PARTSIZE) | gzip
-  IMAGE/combined.img := grub-config efi | combined efi | grub-install efi | append-metadata
-  IMAGE/combined.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
-  IMAGE/combined.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
+  IMAGE/combined-efi.img := grub-config efi | combined efi | grub-install efi | append-metadata
+  IMAGE/combined-efi.img.gz := grub-config efi | combined efi | grub-install efi | gzip | append-metadata
+  IMAGE/combined-efi.vmdk := grub-config efi | combined efi | grub-install efi | qemu-image vmdk
  ifeq ($(CONFIG_TARGET_IMAGES_GZIP),y)
     IMAGES-y := rootfs.img.gz
-    IMAGES-y += combined.img.gz
+    IMAGES-y += combined-efi.img.gz
   else
     IMAGES-y := rootfs.img
-    IMAGES-y += combined.img
+    IMAGES-y += combined-efi.img
   endif
   ifeq ($(CONFIG_VMDK_IMAGES),y)
-    IMAGES-y += combined.vmdk
+    IMAGES-y += combined-efi.vmdk
   endif
   KERNEL := kernel-bin
   KERNEL_INSTALL := 1



From lede-commits at lists.infradead.org  Thu Jan 16 12:27:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 16 Jan 2025 15:27:29 -0500
Subject: [openwrt/openwrt]  mvebu: WD Cloud Mirror Gen2: Remove stty
 dependency
In-Reply-To: <173705924841.1691358.8796041804509427942@git-01.infra.openwrt.org>
References: <173705924841.1691358.8796041804509427942@git-01.infra.openwrt.org>
Message-ID: <mailman.41615.1737059251.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/99a855121c74974123558fd0ebad7888242c88af

commit 99a855121c74974123558fd0ebad7888242c88af
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 13 23:56:09 2025 +0100

    mvebu: WD Cloud Mirror Gen2: Remove stty dependency
    
    The package coreutils-stty is not part of the OpenWrt main packages. A
    board can not depend on it. Remove the dependency to fix a build problem
    seen in the build bots.
    
    Fixes: 8fb805aa1f25 ("mvebu: Add support for WD Cloud Mirror Gen2")
    (cherry picked from commit 717f62d256ccb52549a24c256615b28440ed1a86)
    Link: https://github.com/openwrt/openwrt/pull/17589
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mvebu/image/cortexa9.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index d572264866..b5f89aec20 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -453,7 +453,7 @@ define Device/wd_cloud-mirror-gen2
   $(Device/NAND-128K)
   DEVICE_VENDOR := Western Digital
   DEVICE_MODEL := MyCloud Mirror Gen 2 (BWVZ/Grand Teton)
-  DEVICE_PACKAGES += -uboot-envtools coreutils-stty mkf2fs e2fsprogs \
+  DEVICE_PACKAGES += -uboot-envtools mkf2fs e2fsprogs \
 	partx-utils kmod-hwmon-drivetemp -ppp -kmod-nft-offload -dnsmasq \
 	-odhcpd-ipv6only 
   DEVICE_DTS := armada-385-wd_cloud-mirror-gen2



From lede-commits at lists.infradead.org  Thu Jan 16 12:27:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 16 Jan 2025 15:27:28 -0500
Subject: [openwrt/openwrt]  mvebu: Add support for WD Cloud Mirror Gen2
In-Reply-To: <173705924841.1691358.8796041804509427942@git-01.infra.openwrt.org>
References: <173705924841.1691358.8796041804509427942@git-01.infra.openwrt.org>
Message-ID: <mailman.41616.1737059252.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6acf90758db5c7d3a6451c06192f7345acc30995

commit 6acf90758db5c7d3a6451c06192f7345acc30995
Author: Robert Senderek <robert.senderek at 10g.pl>
AuthorDate: Fri Nov 22 00:05:39 2024 +0100

    mvebu: Add support for WD Cloud Mirror Gen2
    
    Hardware
    --------
    Marvell Armada 385 (MV88F6820)
    512B RAM
    256MB NAND (Hynix H27U2G8F2CTR)
    1x 1Gbit
    2x USB 3.0
    2x SATA-III
    UART: 115200 8N1 3.3V
    RTC
    Weltrend MCU WT6703F connected via UART1 for Power LED / PWM Fan / hw reset / WoL
    
    Installation
    ------------
    Connect UART 3.3V adapter to JP2  pins: 1-RX / 2-GND / 5-TX
    
    Use USB2.0 FAT32 pendrive with openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin
     1. stop boot by pressing 1
     2. usb start
     3. fatload usb 0:1  0x02000000 openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin;bootm 0x02000000 -
     4. do backup mtd1 mtd3
     5. use sysupgrade
    
    Or tftp
     1. stop boot by pressing 1
     2. setenv ethact egiga2;setenv serverip 192.168.11.114;setenv ipaddr 192.168.11.113
     3. tftpboot 0x02000000 openwrt-mvebu-cortexa9-wd_cloud-mirror-gen2-initramfs-kernel.bin; bootm 0x02000000 -
     4. do backup mtd1 mtd3
     5. use sysupgrade
    
    or Evgeny Kolesnikov <evgenyz at gmail.com> method from his failed PR 2040
    
    - Using original firmware's network settings obtain SSH access to the device.
    - Put *-image-cfs-factory.bin and *-uImage-factory.bin images into device's /tmp directory.
    - Write kernel (uImage) image 'flash_eraseall /dev/mtd1 && nandwrite --markbad -p /dev/mtd1 /tmp/*-uImage-factory.bin'.
    - Write rootfs (image-cfs) image 'ubiformat /dev/mtd3 -f /tmp/*-image.cfs-factory.bin -y'.
    - Reboot the device.
    
    Installation (upgrade):
    
    Use *-sysupgrade.bin in a usual way.
    Weltrend MCU control is done via uart1 19200
    
    stty -F /dev/ttyS1 raw speed 19200
    stty -F /dev/ttyS1 raw speed 19200
    
    PWM Fan Control
    off: 00
    echo -n -e '\xfa\x02\x00\x00\x00\x00\xfb' > /dev/ttyS1
    slow: 5F
    echo -n -e '\xfa\x02\x00\x5f\x00\x00\xfb' > /dev/ttyS1
    max: FF
    echo -n -e '\xfa\x02\x00\xff\x00\x00\xfb' > /dev/ttyS1
    
    Power LED Control
    Blue
    echo -n -e '\xfa\x26\x00\x11\x00\x01\xfb' > /dev/ttyS1
    Red
    echo -n -e '\xfa\x26\x00\x14\x00\x01\xfb' > /dev/ttyS1
    Orange
    echo -n -e '\xfa\x26\x00\x12\x00\x01\xfb' > /dev/ttyS1
    
    more here: https://github.com/c-MM/mcm-daemon/blob/master/mcm.h
    
    Signed-off-by: Robert Senderek <robert.senderek at 10g.pl>
    Link: https://github.com/openwrt/openwrt/pull/17046
    (cherry picked from commit 8fb805aa1f25b69b7849c8b1ce787ed47b16d123)
    Link: https://github.com/openwrt/openwrt/pull/17589
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../cortexa9/base-files/etc/board.d/02_network     |   9 +-
 .../cortexa9/base-files/lib/upgrade/platform.sh    |   3 +-
 .../marvell/armada-385-wd_cloud-mirror-gen2.dts    | 368 +++++++++++++++++++++
 target/linux/mvebu/image/cortexa9.mk               |  17 +
 4 files changed, 395 insertions(+), 2 deletions(-)

diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
index 680af1ce67..8cf1c0e426 100644
--- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
@@ -13,7 +13,8 @@ mvebu_setup_interfaces()
 
 	case "$board" in
 	ctera,c200-v2|\
-	synology,ds213j)
+	synology,ds213j|\
+	wd,cloud-mirror-gen2)
 		ucidef_set_interface_lan "eth0" "dhcp"
 		;;
 	cznic,turris-omnia)
@@ -94,6 +95,12 @@ mvebu_setup_macs()
 		lan_mac=$label_mac
 		wan_mac=$label_mac
 		;;
+	wd,cloud-mirror-gen2)
+		# mac address is on ubi "config" or ubi "reserve2" in text file.
+		# ubi "reserve2" /dev/mtd7 is twice small and only contains basic OEM factory info
+		label_mac=$(macaddr_canonicalize $(strings /dev/mtd7|grep -E '([0-9A-F]{2}[:])'))
+		lan_mac=$label_mac
+		;;
 	esac
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
index 70678622d3..13d8e77c93 100755
--- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
@@ -31,7 +31,8 @@ platform_do_upgrade() {
 		CI_ROOT_UBIPART=ubi
 		nand_do_upgrade "$1"
 		;;
-	buffalo,ls421de)
+	buffalo,ls421de|\
+	wd,cloud-mirror-gen2)
 		nand_do_upgrade "$1"
 		;;
 	ctera,c200-v2)
diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
new file mode 100644
index 0000000000..50936e72ad
--- /dev/null
+++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Western Digital My Cloud Mirror Gen 2
+ * (BWVZ/Grand Teton)
+ *
+ * Copyright (C) 2020
+ *
+ * Based on the code from:
+ *
+ * Copyright (C) 2019 Evgeny Kolesnikov <evgenyz at gmail.com>
+ * Copyright (C) 2016 Martin Mueller <mm at sig21.net>
+ * Copyright (C) 2013 Gregory CLEMENT <gregory.clement at free-electrons.com>
+ * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include "armada-385.dtsi"
+
+/ {
+	model = "WD MyCloud Mirror Gen 2 (BWVZ/Grand Teton)";
+	compatible = "wd,cloud-mirror-gen2", "marvell,armada385", "marvell,armada380";
+
+	aliases {
+		led-boot = &led_boot;
+		led-failsafe = &led_boot;
+		led-upgrade = &led_boot;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		append-rootblock = "nullparameter="; /* override the bootloader args */
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x20000000>; /* 512 MB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+		          MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+		          MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+		          MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+		          MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+
+		internal-regs {
+			timer at c200 {
+				status = "okay";
+			};
+
+			i2c0: i2c at 11000 {
+				status = "okay";
+				clock-frequency = <100000>;
+			};
+
+			i2c1: i2c at 11100 {
+				status = "okay";
+				clock-frequency = <100000>;
+			};
+
+			serial at 12000 {
+				status = "okay";
+			};
+
+			/* Connected to Welltrend 6703F-OG240WT MCU
+			 * which controls power, fan and other things
+			 */
+			serial at 12100 {
+				status = "okay";
+			};
+
+			pinctrl at 18000 {
+				/* use only one pin for UART1, as mpp20 is used by sata0 */
+				uart1_pins: uart-pins-1 {
+					marvell,pins = "mpp19";
+					marvell,function = "ua1";
+				};
+
+				xhci0_vbus_pins: xhci0-vbus-pins {
+					marvell,pins = "mpp26";
+					marvell,function = "gpio";
+				};
+
+				xhci1_vbus_pins: xhci1-vbus-pins {
+					marvell,pins = "mpp27";
+					marvell,function = "gpio";
+				};
+
+				sata0_pins: sata-pins-0 {
+					marvell,pins = "mpp55";
+					marvell,function = "sata0";
+				};
+
+				sata1_pins: sata-pins-1 {
+					marvell,pins = "mpp56";
+					marvell,function = "sata1";
+				};
+
+				sata_leds: sata-leds {
+					marvell,pins = "mpp43", "mpp52", "mpp53", "mpp54";
+					marvell,function = "gpio";
+				};
+
+				btn_pins: btn-pins {
+					marvell,pins = "mpp50";
+					marvell,function = "gpio";
+				};
+			};
+
+			usb at 58000 {
+				status = "okay";
+			};
+
+			phy: mdio at 72004 {
+				phy0: ethernet-phy at 0 {
+					/* Init ETH LEDs */
+					marvell,reg-init = <3 16 0 0x101e>;
+					reg = <0>;
+				};
+			};
+
+			sata at a8000 {
+				status = "okay";
+			};
+
+			nand-controller at d0000 {
+				status = "okay";
+
+				nand: nand at 0 {
+					reg = <0>;
+					label = "pxa3xx_nand-0";
+					nand-rb = <0>;
+					marvell,nand-keep-config;
+					#marvell,nand-enable-arbiter; //optional
+					nand-on-flash-bbt;
+					nand-ecc-strength = <4>;
+					nand-ecc-step-size = <512>;
+
+					partitions {
+						compatible = "fixed-partitions";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						partition at 00000000 {
+							label = "U-Boot";
+							reg = <0x00000000 0x00500000>;    /*   5 MB */
+							read-only;
+						};
+
+						partition at 00500000 {
+							label = "kernel";
+							reg = <0x00500000 0x00500000>;    /*   5 MB */
+						};
+
+						partition at 00a00000 {
+							label = "uRamdisk";
+							reg = <0x00a00000 0x00500000>;    /*   5 MB */
+							read-only;
+						};
+
+						partition at 00f00000 {
+							label = "ubi";
+							reg = <0x00f00000 0x0b900000>;    /* 185 MB */
+						};
+
+						partition at c800000 {
+							label = "rescue fw";
+							reg = <0x0c800000 0x00f00000>;    /*  15 MB */
+							read-only;
+						};
+
+						partition at d70000 {
+							label = "config";
+							reg = <0x0d700000 0x01400000>;    /*  20 MB */
+							read-only;
+						};
+
+						partition at eb00000 {
+							label = "reserve1";
+							reg = <0x0eb00000 0x00a00000>;    /*  10 MB */
+							read-only;
+						};
+
+						partition at f500000 {
+							label = "reserve2";
+							reg = <0x0f500000 0x00a00000>;    /*  10 MB */
+							read-only;
+						};
+					};
+				};
+			};
+
+			usb3 at f0000 {
+				usb-phy = <&usb3_0_phy>;
+				status = "okay";
+			};
+
+			usb3 at f8000 {
+				usb-phy = <&usb3_1_phy>;
+				status = "okay";
+			};
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&sata_leds>;
+
+		led_boot: s1red {
+			label = "red:hdd1";
+			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+		};
+		s2red {
+			label = "red:hdd2";
+			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
+		};
+		s1blue {
+			label = "blue:hdd1";
+			gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "ata1";
+		};
+		s2blue {
+			label = "blue:hdd2";
+			gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "ata2";
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&btn_pins>;
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;  // Restart=0x198, Power=0x116
+			gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			wakeup-source;
+		};
+	};
+
+	usb3_0_phy: usb3_0_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_0_vbus>;
+	};
+
+	usb3_1_phy: usb3_1_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_1_vbus>;
+	};
+
+	reg_usb3_0_vbus: usb3-vbus0 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus0";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci0_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_usb3_1_vbus: usb3-vbus1 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus1";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci1_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		regulator-always-on;
+		gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_sata0: pwr-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "pwr_en_sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		enable-active-high;
+		regulator-boot-on;
+		gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_5v_sata0: v5-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v5.0-sata0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sata0>;
+	};
+
+	reg_12v_sata0: v12-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v12.0-sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&reg_sata0>;
+	};
+
+	reg_sata1: pwr-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "pwr_en_sata1";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		enable-active-high;
+		regulator-boot-on;
+		gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_5v_sata1: v5-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "v5.0-sata1";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sata1>;
+	};
+
+	reg_12v_sata1: v12-sata1 {
+		compatible = "regulator-fixed";
+		regulator-name = "v12.0-sata1";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&reg_sata1>;
+	};
+};
+
+&bm {
+	status = "okay";
+};
+
+&bm_bppi {
+	status = "okay";
+};
+
+&eth2 {
+	status = "okay";
+	phy = <&phy0>;
+	phy-mode = "sgmii";
+	buffer-manager = <&bm>;
+	bm,pool-long = <0>;
+	bm,pool-short = <1>;
+};
+
+&ahci0 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	sata-port at 0 {
+		reg = <0>;
+		target-supply = <&reg_sata0>;
+		#thermal-sensor-cells = <0>;
+	};
+
+	sata-port at 1 {
+		reg = <1>;
+		target-supply = <&reg_sata1>;
+		#thermal-sensor-cells = <1>;
+	};
+};
diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index 4a41f2c102..d572264866 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -448,3 +448,20 @@ define Device/synology_ds213j
     -ppp -kmod-nft-offload -dnsmasq -odhcpd-ipv6only
 endef
 TARGET_DEVICES += synology_ds213j
+
+define Device/wd_cloud-mirror-gen2
+  $(Device/NAND-128K)
+  DEVICE_VENDOR := Western Digital
+  DEVICE_MODEL := MyCloud Mirror Gen 2 (BWVZ/Grand Teton)
+  DEVICE_PACKAGES += -uboot-envtools coreutils-stty mkf2fs e2fsprogs \
+	partx-utils kmod-hwmon-drivetemp -ppp -kmod-nft-offload -dnsmasq \
+	-odhcpd-ipv6only 
+  DEVICE_DTS := armada-385-wd_cloud-mirror-gen2
+  KERNEL_SIZE := 5120k
+  KERNEL := kernel-bin | append-dtb | uImage none
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
+  IMAGES += image-cfs-factory.bin uImage-factory.bin
+  IMAGE/image-cfs-factory.bin := append-ubi
+  IMAGE/uImage-factory.bin := append-kernel
+endef
+TARGET_DEVICES += wd_cloud-mirror-gen2



From lede-commits at lists.infradead.org  Fri Jan 17 00:48:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 03:48:56 -0500
Subject: [openwrt/openwrt]  mediatek: remove obsolete base-files scripts
In-Reply-To: <173710373535.2583969.10104927999512015845@git-01.infra.openwrt.org>
References: <173710373535.2583969.10104927999512015845@git-01.infra.openwrt.org>
Message-ID: <mailman.41868.1737103739.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/48e1427ffa867bddc822a463af862b9dacc5bde8

commit 48e1427ffa867bddc822a463af862b9dacc5bde8
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 16 19:32:51 2025 +0100

    mediatek: remove obsolete base-files scripts
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro     | 14 --------------
 .../mediatek/base-files/lib/preinit/06_set_rps_sock_flow   |  6 ------
 2 files changed, 20 deletions(-)

diff --git a/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro b/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro
deleted file mode 100755
index 9a2ffaeed8..0000000000
--- a/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro
+++ /dev/null
@@ -1,14 +0,0 @@
-[ ifup = "$ACTION" ] && {
-	[ -n "$DEVICE" ] && {
-		if [ "$INTERFACE" == "lan" ]; then
-			if [ -f /usr/sbin/ethtool ]; then
-				ifname=eth0
-				lan_ip=`uci -q get network.lan.ipaddr`
-				ethdrv=`ethtool -i $ifname | grep mtk_soc_eth`
-				[ -n "$ethdrv" ] && {
-					ethtool -N $ifname flow-type tcp4 dst-ip $lan_ip loc 0
-				}
-			fi
-		fi
-	}
-}
diff --git a/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow b/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
deleted file mode 100644
index 49b1dd1ca6..0000000000
--- a/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
+++ /dev/null
@@ -1,6 +0,0 @@
-set_rps_sock_flow() {
-	echo 1024 > /proc/sys/net/core/rps_sock_flow_entries
-}
-
-boot_hook_add preinit_main set_rps_sock_flow
-



From lede-commits at lists.infradead.org  Fri Jan 17 00:48:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 03:48:55 -0500
Subject: [openwrt/openwrt]  netifd: improve packet steering on ipq40xx (and
 possibly others)
In-Reply-To: <173710373535.2583969.10104927999512015845@git-01.infra.openwrt.org>
References: <173710373535.2583969.10104927999512015845@git-01.infra.openwrt.org>
Message-ID: <mailman.41871.1737103741.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/acce25b789d40f2d88a2326a7d9921bd1743fe54

commit acce25b789d40f2d88a2326a7d9921bd1743fe54
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 16 12:35:47 2025 +0100

    netifd: improve packet steering on ipq40xx (and possibly others)
    
    Some platforms a single ethernet device for all ports with multiple rx rings
    and NAPI threading enabled. In this case, the steering script was limiting
    performance by keeping all NAPI threads assigned to the same CPU.
    Fix this by assigning each rx queue and the corresponding NAPI task separately.
    Additionally, if the number of rx queues is at least as big as the number of
    CPUs, skip weight based assignment and distribute the load across all CPUs
    directly.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17611
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../files/usr/libexec/network/packet-steering.uc   | 51 ++++++++++++++++++++--
 1 file changed, 47 insertions(+), 4 deletions(-)

diff --git a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
index b2229e5d79..34df46d18e 100755
--- a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
+++ b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
@@ -65,8 +65,9 @@ function cpu_mask(cpu)
 	return sprintf("%x", mask);
 }
 
-function set_netdev_cpu(dev, cpu) {
-	let queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`);
+function set_netdev_cpu(dev, cpu, rx_queue) {
+	rx_queue ??= "rx-*";
+	let queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_cpus`);
 	let val = cpu_mask(cpu);
 	if (disable)
 		val = 0;
@@ -76,7 +77,7 @@ function set_netdev_cpu(dev, cpu) {
 		if (!do_nothing)
 			writefile(queue, `${val}`);
 	}
-	queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_flow_cnt`);
+	queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_flow_cnt`);
 	for (let queue in queues) {
 		if (debug || do_nothing)
 			warn(`echo ${local_flows} > ${queue}\n`);
@@ -160,6 +161,9 @@ for (let dev in netdevs) {
 			netdev: [],
 			phy: [],
 			tasks: [],
+			rx_tasks: [],
+			rx_queues: map(glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`),
+			               (v) => basename(dirname(v))),
 		};
 	}
 
@@ -187,11 +191,51 @@ for (let path in glob("/proc/*/exe")) {
 			continue;
 
 		push(dev.tasks, pid);
+
+		let napi_match = match(name, /napi\/([^-]*)-(\d+)/);
+		if (napi_match && napi_match[2] > 0)
+			push(dev.rx_tasks, pid);
 		break;
 	}
 }
 
+function assign_dev_queues_cpu(dev) {
+	let num = length(dev.rx_queues);
+	if (num < length(dev.rx_tasks))
+		num = length(dev.rx_tasks);
+
+	for (let i = 0; i < num; i++) {
+		let cpu;
+
+		let task = dev.rx_tasks[i];
+		if (num >= length(cpus))
+			cpu = i % length(cpus);
+		else if (task)
+			cpu = get_next_cpu(napi_weight);
+		else
+			cpu = -1;
+		set_task_cpu(task, cpu);
+
+		let rxq = dev.rx_queues[i];
+		if (!rxq)
+			continue;
+
+		if (num >= length(cpus))
+			cpu = (i + 1) % length(cpus);
+		else if (all_cpus)
+			cpu = -1;
+		else
+			cpu = get_next_cpu(napi_weight, cpu);
+		for (let netdev in dev.netdev)
+			set_netdev_cpu(netdev, cpu, rxq);
+	}
+}
+
 function assign_dev_cpu(dev) {
+	if (length(dev.rx_queues) > 1 &&
+		length(dev.rx_tasks) > 1)
+		return assign_dev_queues_cpu(dev);
+
 	if (length(dev.tasks) > 0) {
 		let cpu = dev.napi_cpu = get_next_cpu(napi_weight);
 		for (let task in dev.tasks)
@@ -204,7 +248,6 @@ function assign_dev_cpu(dev) {
 			cpu = -1;
 		else
 			cpu = get_next_cpu(rx_weight, dev.napi_cpu);
-		dev.rx_cpu = cpu;
 		for (let netdev in dev.netdev)
 			set_netdev_cpu(netdev, cpu);
 	}



From lede-commits at lists.infradead.org  Fri Jan 17 00:49:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 03:49:23 -0500
Subject: [openwrt/openwrt]  netifd: improve packet steering on ipq40xx (and
 possibly others)
In-Reply-To: <173710376325.2584906.10734897355960885209@git-01.infra.openwrt.org>
References: <173710376325.2584906.10734897355960885209@git-01.infra.openwrt.org>
Message-ID: <mailman.41874.1737103821.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/27520027e10e9d247e822e5c52a8bb294267ecd9

commit 27520027e10e9d247e822e5c52a8bb294267ecd9
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 16 12:35:47 2025 +0100

    netifd: improve packet steering on ipq40xx (and possibly others)
    
    Some platforms a single ethernet device for all ports with multiple rx rings
    and NAPI threading enabled. In this case, the steering script was limiting
    performance by keeping all NAPI threads assigned to the same CPU.
    Fix this by assigning each rx queue and the corresponding NAPI task separately.
    Additionally, if the number of rx queues is at least as big as the number of
    CPUs, skip weight based assignment and distribute the load across all CPUs
    directly.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17611
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit acce25b789d40f2d88a2326a7d9921bd1743fe54)
---
 .../files/usr/libexec/network/packet-steering.uc   | 51 ++++++++++++++++++++--
 1 file changed, 47 insertions(+), 4 deletions(-)

diff --git a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
index b2229e5d79..34df46d18e 100755
--- a/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
+++ b/package/network/config/netifd/files/usr/libexec/network/packet-steering.uc
@@ -65,8 +65,9 @@ function cpu_mask(cpu)
 	return sprintf("%x", mask);
 }
 
-function set_netdev_cpu(dev, cpu) {
-	let queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`);
+function set_netdev_cpu(dev, cpu, rx_queue) {
+	rx_queue ??= "rx-*";
+	let queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_cpus`);
 	let val = cpu_mask(cpu);
 	if (disable)
 		val = 0;
@@ -76,7 +77,7 @@ function set_netdev_cpu(dev, cpu) {
 		if (!do_nothing)
 			writefile(queue, `${val}`);
 	}
-	queues = glob(`/sys/class/net/${dev}/queues/rx-*/rps_flow_cnt`);
+	queues = glob(`/sys/class/net/${dev}/queues/${rx_queue}/rps_flow_cnt`);
 	for (let queue in queues) {
 		if (debug || do_nothing)
 			warn(`echo ${local_flows} > ${queue}\n`);
@@ -160,6 +161,9 @@ for (let dev in netdevs) {
 			netdev: [],
 			phy: [],
 			tasks: [],
+			rx_tasks: [],
+			rx_queues: map(glob(`/sys/class/net/${dev}/queues/rx-*/rps_cpus`),
+			               (v) => basename(dirname(v))),
 		};
 	}
 
@@ -187,11 +191,51 @@ for (let path in glob("/proc/*/exe")) {
 			continue;
 
 		push(dev.tasks, pid);
+
+		let napi_match = match(name, /napi\/([^-]*)-(\d+)/);
+		if (napi_match && napi_match[2] > 0)
+			push(dev.rx_tasks, pid);
 		break;
 	}
 }
 
+function assign_dev_queues_cpu(dev) {
+	let num = length(dev.rx_queues);
+	if (num < length(dev.rx_tasks))
+		num = length(dev.rx_tasks);
+
+	for (let i = 0; i < num; i++) {
+		let cpu;
+
+		let task = dev.rx_tasks[i];
+		if (num >= length(cpus))
+			cpu = i % length(cpus);
+		else if (task)
+			cpu = get_next_cpu(napi_weight);
+		else
+			cpu = -1;
+		set_task_cpu(task, cpu);
+
+		let rxq = dev.rx_queues[i];
+		if (!rxq)
+			continue;
+
+		if (num >= length(cpus))
+			cpu = (i + 1) % length(cpus);
+		else if (all_cpus)
+			cpu = -1;
+		else
+			cpu = get_next_cpu(napi_weight, cpu);
+		for (let netdev in dev.netdev)
+			set_netdev_cpu(netdev, cpu, rxq);
+	}
+}
+
 function assign_dev_cpu(dev) {
+	if (length(dev.rx_queues) > 1 &&
+		length(dev.rx_tasks) > 1)
+		return assign_dev_queues_cpu(dev);
+
 	if (length(dev.tasks) > 0) {
 		let cpu = dev.napi_cpu = get_next_cpu(napi_weight);
 		for (let task in dev.tasks)
@@ -204,7 +248,6 @@ function assign_dev_cpu(dev) {
 			cpu = -1;
 		else
 			cpu = get_next_cpu(rx_weight, dev.napi_cpu);
-		dev.rx_cpu = cpu;
 		for (let netdev in dev.netdev)
 			set_netdev_cpu(netdev, cpu);
 	}



From lede-commits at lists.infradead.org  Fri Jan 17 00:49:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 03:49:24 -0500
Subject: [openwrt/openwrt]  mediatek: remove obsolete base-files scripts
In-Reply-To: <173710376325.2584906.10734897355960885209@git-01.infra.openwrt.org>
References: <173710376325.2584906.10734897355960885209@git-01.infra.openwrt.org>
Message-ID: <mailman.41875.1737103821.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e6cae783a4a8336e919c305e97e47ed1a58b43ca

commit e6cae783a4a8336e919c305e97e47ed1a58b43ca
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 16 19:32:51 2025 +0100

    mediatek: remove obsolete base-files scripts
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 48e1427ffa867bddc822a463af862b9dacc5bde8)
---
 .../mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro     | 14 --------------
 .../mediatek/base-files/lib/preinit/06_set_rps_sock_flow   |  6 ------
 2 files changed, 20 deletions(-)

diff --git a/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro b/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro
deleted file mode 100755
index 9a2ffaeed8..0000000000
--- a/target/linux/mediatek/base-files/etc/hotplug.d/iface/99-mtk-lro
+++ /dev/null
@@ -1,14 +0,0 @@
-[ ifup = "$ACTION" ] && {
-	[ -n "$DEVICE" ] && {
-		if [ "$INTERFACE" == "lan" ]; then
-			if [ -f /usr/sbin/ethtool ]; then
-				ifname=eth0
-				lan_ip=`uci -q get network.lan.ipaddr`
-				ethdrv=`ethtool -i $ifname | grep mtk_soc_eth`
-				[ -n "$ethdrv" ] && {
-					ethtool -N $ifname flow-type tcp4 dst-ip $lan_ip loc 0
-				}
-			fi
-		fi
-	}
-}
diff --git a/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow b/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
deleted file mode 100644
index 49b1dd1ca6..0000000000
--- a/target/linux/mediatek/base-files/lib/preinit/06_set_rps_sock_flow
+++ /dev/null
@@ -1,6 +0,0 @@
-set_rps_sock_flow() {
-	echo 1024 > /proc/sys/net/core/rps_sock_flow_entries
-}
-
-boot_hook_add preinit_main set_rps_sock_flow
-



From lede-commits at lists.infradead.org  Fri Jan 17 03:04:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 06:04:29 -0500
Subject: [openwrt/openwrt]  uci: update to Git HEAD (2025-01-17)
In-Reply-To: <173711186926.2794053.6119379159366546970@git-01.infra.openwrt.org>
References: <173711186926.2794053.6119379159366546970@git-01.infra.openwrt.org>
Message-ID: <mailman.41946.1737111873.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/44c877f1973b923a2032ce9d880f496a2b077ef6

commit 44c877f1973b923a2032ce9d880f496a2b077ef6
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 17 11:26:09 2025 +0100

    uci: update to Git HEAD (2025-01-17)
    
    fb3c2343b17b add support for an override config directory
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/system/uci/Makefile | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile
index 6b902a9c24..a253b43938 100644
--- a/package/system/uci/Makefile
+++ b/package/system/uci/Makefile
@@ -13,9 +13,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-11-26
-PKG_SOURCE_VERSION:=10f7996ec29449915640acca5d65b592365a4b14
-PKG_MIRROR_HASH:=8556add0dd77b85a5702faa94feb811606390c045d7f5004317a4ab3e07f773b
+PKG_SOURCE_DATE:=2025-01-17
+PKG_SOURCE_VERSION:=fb3c2343b17b759b175f11aec5b3fbb1cf48bbc3
+PKG_MIRROR_HASH:=c9302f4a1cb400134cb9fc0622fb6a04bbe8c55bcc83ec454caadb1e62f3257e
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
@@ -33,7 +33,7 @@ define Package/libuci
   CATEGORY:=Libraries
   TITLE:=C library for the Unified Configuration Interface (UCI)
   DEPENDS:=+libubox
-  ABI_VERSION:=20130104
+  ABI_VERSION:=20250117
 endef
 
 define Package/uci



From lede-commits at lists.infradead.org  Fri Jan 17 03:06:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 06:06:17 -0500
Subject: [openwrt/openwrt]  uci: update to Git HEAD (2025-01-17)
In-Reply-To: <173711197629.2798121.3424861048814312524@git-01.infra.openwrt.org>
References: <173711197629.2798121.3424861048814312524@git-01.infra.openwrt.org>
Message-ID: <mailman.41947.1737111981.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6d3fdebe3ceebf3a93263e2b2420e422e1f98ee0

commit 6d3fdebe3ceebf3a93263e2b2420e422e1f98ee0
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Jan 17 11:26:09 2025 +0100

    uci: update to Git HEAD (2025-01-17)
    
    fb3c2343b17b add support for an override config directory
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 44c877f1973b923a2032ce9d880f496a2b077ef6)
---
 package/system/uci/Makefile | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile
index 6b902a9c24..a253b43938 100644
--- a/package/system/uci/Makefile
+++ b/package/system/uci/Makefile
@@ -13,9 +13,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2024-11-26
-PKG_SOURCE_VERSION:=10f7996ec29449915640acca5d65b592365a4b14
-PKG_MIRROR_HASH:=8556add0dd77b85a5702faa94feb811606390c045d7f5004317a4ab3e07f773b
+PKG_SOURCE_DATE:=2025-01-17
+PKG_SOURCE_VERSION:=fb3c2343b17b759b175f11aec5b3fbb1cf48bbc3
+PKG_MIRROR_HASH:=c9302f4a1cb400134cb9fc0622fb6a04bbe8c55bcc83ec454caadb1e62f3257e
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
@@ -33,7 +33,7 @@ define Package/libuci
   CATEGORY:=Libraries
   TITLE:=C library for the Unified Configuration Interface (UCI)
   DEPENDS:=+libubox
-  ABI_VERSION:=20130104
+  ABI_VERSION:=20250117
 endef
 
 define Package/uci



From lede-commits at lists.infradead.org  Fri Jan 17 03:06:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 06:06:16 -0500
Subject: [openwrt/openwrt]  uci: update to Git HEAD (2024-11-26)
In-Reply-To: <173711197629.2798121.3424861048814312524@git-01.infra.openwrt.org>
References: <173711197629.2798121.3424861048814312524@git-01.infra.openwrt.org>
Message-ID: <mailman.41948.1737111986.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c7716f363e032c1c105a44c86805e6a7642150cc

commit c7716f363e032c1c105a44c86805e6a7642150cc
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Wed Nov 27 22:20:54 2024 +0100

    uci: update to Git HEAD (2024-11-26)
    
    10f7996ec294 file: Ignore config file with '.' in name
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 3929ef4c21844189d5db8d14e7e6dc6ba983d571)
---
 package/system/uci/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile
index c8f661c684..6b902a9c24 100644
--- a/package/system/uci/Makefile
+++ b/package/system/uci/Makefile
@@ -13,9 +13,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2023-08-10
-PKG_SOURCE_VERSION:=5781664d5087ccc4b5ab58505883231212dbedbc
-PKG_MIRROR_HASH:=0ca4a29c077e85a7cfe69916c3ceb2bee98662b6268befc3c02519939647f984
+PKG_SOURCE_DATE:=2024-11-26
+PKG_SOURCE_VERSION:=10f7996ec29449915640acca5d65b592365a4b14
+PKG_MIRROR_HASH:=8556add0dd77b85a5702faa94feb811606390c045d7f5004317a4ab3e07f773b
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=



From lede-commits at lists.infradead.org  Fri Jan 17 03:14:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 06:14:04 -0500
Subject: [openwrt/openwrt]  ucode-mod-pkgen: add ucode module for generating
 crypto keys/certificates
In-Reply-To: <173711244408.2812416.17310243338182683951@git-01.infra.openwrt.org>
References: <173711244408.2812416.17310243338182683951@git-01.infra.openwrt.org>
Message-ID: <mailman.41951.1737112448.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2c78e9d7bd153210d576806d40b17895d41ae93c

commit 2c78e9d7bd153210d576806d40b17895d41ae93c
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Mar 22 16:21:18 2024 +0100

    ucode-mod-pkgen: add ucode module for generating crypto keys/certificates
    
    This also includes a script to use the functionality from the
    command line
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/utils/ucode-mod-pkgen/Makefile           |  44 ++
 package/utils/ucode-mod-pkgen/files/pkgen        | 252 ++++++++++
 package/utils/ucode-mod-pkgen/src/CMakeLists.txt |  35 ++
 package/utils/ucode-mod-pkgen/src/pk.h           |  45 ++
 package/utils/ucode-mod-pkgen/src/pkcs12.c       | 612 +++++++++++++++++++++++
 package/utils/ucode-mod-pkgen/src/ucode.c        | 598 ++++++++++++++++++++++
 6 files changed, 1586 insertions(+)

diff --git a/package/utils/ucode-mod-pkgen/Makefile b/package/utils/ucode-mod-pkgen/Makefile
new file mode 100644
index 0000000000..918aa22a90
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/Makefile
@@ -0,0 +1,44 @@
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=ucode-mod-pkgen
+PKG_RELEASE:=1
+PKG_LICENSE:=GPL-2.0-or-later
+PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
+
+include $(INCLUDE_DIR)/package.mk
+include $(INCLUDE_DIR)/cmake.mk
+
+CMAKE_INSTALL := 1
+
+define Package/ucode-mod-pkgen
+  SECTION:=utils
+  CATEGORY:=Utilities
+  TITLE:=ucode module for generating public keys/certificates
+  DEPENDS:=+libucode +libmbedtls
+endef
+
+define Package/ucode-mod-pkgen/description
+The pkgen module provides functionality for generating cryptographic keys and
+(self-)signed certificates. It supports exporting PEM/DER format files, as
+well as PKCS#12 bundle for client cert/key pairs with CA.
+endef
+
+define Package/pkgen
+  SECTION:=utils
+  CATEGORY:=Utilities
+  TITLE:=ucode script for generating public keys/certificates
+  DEPENDS:=+ucode +ucode-mod-pkgen +ucode-mod-fs
+endef
+
+define Package/ucode-mod-pkgen/install
+	$(INSTALL_DIR) $(1)/usr/lib/ucode
+	$(CP) $(PKG_INSTALL_DIR)/usr/lib/ucode/pkgen.so $(1)/usr/lib/ucode/
+endef
+
+define Package/pkgen/install
+	$(INSTALL_DIR) $(1)/usr/bin
+	$(INSTALL_BIN) ./files/pkgen $(1)/usr/bin
+endef
+
+$(eval $(call BuildPackage,ucode-mod-pkgen))
+$(eval $(call BuildPackage,pkgen))
diff --git a/package/utils/ucode-mod-pkgen/files/pkgen b/package/utils/ucode-mod-pkgen/files/pkgen
new file mode 100755
index 0000000000..e37e5f5329
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/files/pkgen
@@ -0,0 +1,252 @@
+#!/usr/bin/env ucode
+'use strict';
+
+import { basename, readfile, writefile, stdin } from "fs";
+let pk = require("pkgen");
+let valid_from = "20240101000000";
+let valid_to = "21001231235959";
+let subject, password, password_stdin;
+let keytype = "ec";
+let keylen = 2048;
+let keyexp = 65537;
+let keycurve = "secp256r1";
+let no_ca;
+let legacy;
+
+const usage_message = `Usage: ${basename(sourcepath())} [<options>] <command> [<arguments>]
+
+Commands:
+  ca <ca.pem>:				Create a new CA.
+					(creates ca.pem, ca.key, ca.serial)
+
+  cert <ca.pem> <cert.pem>:		Create a new certificate/key using the CA
+					from ca.pem. (creates cert.pem and ca.key)
+
+  cert_p12 <ca.pem> <cert.p12>:		Create a new PKCS#12 certificate/key
+					using the CA from ca.pem. (creates ca.p12)
+
+  selfsigned <cert.pem>:		Create a self-signed certificate
+					(creates cert.pem)
+
+Options:
+  -C <curve>				Set EC curve type (default: ${keycurve})
+					Possible values: secp521r1, secp384r1, secp256r1,
+					secp256k1, secp224r1, secp224k1, secp192r1,
+					secp192k1
+  -E <exponent>				Set RSA key exponent (default: ${keyexp})
+  -L <len>				Set RSA key length (default: ${keylen})
+  -N					Omit CA certificate for PKCS#12 files
+  -p <password>				Set PKCS#12 password to <password>
+  -P					Read PKCS#12 password from stdin
+					(default: random password, printed to stdout)
+  -s <name>				Set subject for generated certificate to <name>.
+  -t rsa|ec				Set key type to rsa or ec (default: ec)
+  -V <from> <to>			Set validity for generated certificates.
+					(default: ${valid_from} ${valid_to})
+  -W					Use weaker PKCS#12 encryption for
+					compatibility with Windows and Apple systems
+
+`;
+
+function perror(msg) {
+	let err = pk.errno() == -1 ? "Invalid arguments" : pk.error();
+	warn(`${msg}: ${err}\n`);
+	exit(1);
+}
+
+function usage() {
+	warn(usage_message);
+	exit(1);
+}
+
+function check_pem_path(pem_file) {
+	if (substr(pem_file, -4) != ".pem") {
+		warn(`Path with .pem extension expected\n`);
+		exit(1);
+	}
+
+	return pem_file;
+}
+
+
+function gen_key() {
+	let key = pk.generate_key({
+		type: keytype,
+		curve: keycurve,
+		size: keylen,
+		exponent: keyexp,
+	});
+
+	if (!key)
+		perror("Failed to generate CA key");
+
+	return key;
+}
+
+function gen_cert(key, args) {
+	let cert = pk.generate_cert({
+		subject_name: subject,
+		subject_key: key,
+		validity: [ valid_from, valid_to ],
+		...args
+	});
+
+	if (!cert)
+		perror("Failed to generate certificate");
+
+	cert = cert.pem();
+	if (!cert)
+		perror("Failed to complete certificate");
+
+	return cert;
+}
+
+function gen_client_cert(ca_file, ca_data, key) {
+	let ca_base = substr(ca_file, 0, -4);
+	let ca_info = pk.cert_info(ca_data);
+	if (!length(ca_info))
+		perror("Failed to load CA certificate");
+
+	let ca_key = pk.load_key(readfile(ca_base + ".key"));
+	if (!ca_key)
+		perror("Failed to load CA key");
+	let ca_serial = +readfile(ca_base + ".serial");
+	if (!ca_serial)
+		perror("Failed to load CA serial");
+
+	let cert = gen_cert(key, {
+		serial: ++ca_serial,
+		issuer_name: ca_info[0].subject,
+		issuer_key: ca_key,
+	});
+	writefile(ca_base + ".serial", "" + ca_serial);
+
+	return cert;
+}
+
+let cmds = {
+	ca: function(args) {
+		let ca_file = check_pem_path(shift(args));
+		let ca_base = substr(ca_file, 0, -4);
+
+		let key = gen_key();
+		let ca_cert = gen_cert(key, {
+			ca: true,
+			serial: 1,
+			issuer_name: subject,
+			issuer_key: key,
+			key_usage: [ "key_cert_sign" ],
+		});
+
+		writefile(ca_file, ca_cert);
+		writefile(ca_base + ".key", key.pem());
+		writefile(ca_base + ".serial", "1");
+	},
+
+	cert: function (args) {
+		let ca_file = check_pem_path(shift(args));
+		let crt_file = check_pem_path(shift(args));
+		let crt_base = substr(crt_file, 0, -4);
+
+		let key = gen_key();
+		let ca_data = readfile(ca_file);
+		let cert = gen_client_cert(ca_file, ca_data, key);
+
+		writefile(crt_base + ".key", key.pem());
+		writefile(crt_file, cert);
+	},
+
+	cert_p12: function (args) {
+		let ca_file = check_pem_path(shift(args));
+		let p12_file = shift(args);
+		if (!p12_file)
+			usage();
+
+		let key = gen_key();
+		let ca_data = readfile(ca_file);
+		let cert = gen_client_cert(ca_file, ca_data, key);
+
+		if (password_stdin)
+			password = rtrim(stdin.read("line"));
+		else if (!password)
+			print((password = hexenc(readfile("/dev/urandom", 8))) + "\n");
+
+		let p12 = pk.generate_pkcs12({
+			password, cert, key, legacy,
+			extra: no_ca ? null : [ ca_data ],
+		});
+
+		writefile(p12_file, p12);
+	},
+
+	selfsigned: function(args) {
+		let crt_file = check_pem_path(shift(args));
+		let crt_base = substr(crt_file, 0, -4);
+
+		let key = gen_key();
+		let cert = gen_cert(key, {
+			serial: 1,
+			issuer_name: subject,
+			issuer_key: key,
+		});
+
+		writefile(crt_base + ".key", key.pem());
+		writefile(crt_file, cert);
+	},
+};
+
+while (substr(ARGV[0], 0, 1) == "-") {
+	let opt = substr(shift(ARGV), 1);
+	switch (opt) {
+	case 'C':
+		keycurve = shift(ARGV);
+		break;
+	case 'L':
+		keylen = +shift(ARGV);
+		break;
+	case 'N':
+		no_ca = true;
+		break;
+	case 'p':
+		password = shift(ARGV);
+		if (password_stdin)
+			usage();
+		break;
+	case 'P':
+		password_stdin = true;
+		if (password)
+			usage();
+		break;
+	case 's':
+		subject = shift(ARGV);
+		break;
+	case 't':
+		keytype = shift(ARGV);
+		if (keytype != "rsa" && keytype != "ec") {
+			warn(`Unsupported key type ${keytype}\n`);
+			exit(1);
+		}
+		break;
+	case 'V':
+		valid_from = shift(ARGV);
+		valid_to = shift(ARGV);
+		break;
+	case 'W':
+		legacy = true;
+		break;
+	default:
+		usage();
+		break;
+	}
+}
+
+let cmd = shift(ARGV);
+if (!cmd || !cmds[cmd])
+	usage();
+
+if (subject == null) {
+	warn(`Missing -s option\n`);
+	exit(1);
+}
+
+cmds[cmd](ARGV);
diff --git a/package/utils/ucode-mod-pkgen/src/CMakeLists.txt b/package/utils/ucode-mod-pkgen/src/CMakeLists.txt
new file mode 100644
index 0000000000..8794755160
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/src/CMakeLists.txt
@@ -0,0 +1,35 @@
+cmake_minimum_required(VERSION 3.13)
+
+PROJECT(ucode-pkgen C)
+ADD_DEFINITIONS(-Os -ggdb -Wall -Werror --std=gnu99 -ffunction-sections -fwrapv -D_GNU_SOURCE)
+
+IF(CMAKE_C_COMPILER_VERSION VERSION_GREATER 6)
+	ADD_DEFINITIONS(-Wextra -Werror=implicit-function-declaration)
+	ADD_DEFINITIONS(-Wformat -Werror=format-security -Werror=format-nonliteral)
+ENDIF()
+ADD_DEFINITIONS(-Wmissing-declarations -Wno-error=unused-variable -Wno-unused-parameter)
+
+IF(APPLE)
+  SET(UCODE_MODULE_LINK_OPTIONS "LINKER:-undefined,dynamic_lookup")
+ELSE()
+  SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "-Wl,--gc-sections")
+ENDIF()
+
+IF(DEBUG)
+  ADD_DEFINITIONS(-DDEBUG -g3 -O0)
+ELSE()
+  ADD_DEFINITIONS(-DNDEBUG)
+ENDIF()
+
+FIND_LIBRARY(mbedtls NAMES mbedtls)
+FIND_LIBRARY(ucode NAMES ucode)
+FIND_PATH(mbedtls_include_dir NAMES mbedtls/pk.h)
+FIND_PATH(ucode_include_dir NAMES ucode/module.h)
+INCLUDE_DIRECTORIES(${mbedtls_include_dir} ${ucode_include_dir})
+
+ADD_LIBRARY(pkgen_lib MODULE ucode.c pkcs12.c)
+SET_TARGET_PROPERTIES(pkgen_lib PROPERTIES OUTPUT_NAME pkgen PREFIX "")
+TARGET_LINK_OPTIONS(pkgen_lib PRIVATE ${UCODE_MODULE_LINK_OPTIONS})
+TARGET_LINK_LIBRARIES(pkgen_lib ${mbedtls})
+
+INSTALL(TARGETS pkgen_lib LIBRARY DESTINATION lib/ucode)
diff --git a/package/utils/ucode-mod-pkgen/src/pk.h b/package/utils/ucode-mod-pkgen/src/pk.h
new file mode 100644
index 0000000000..9e2b316b6d
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/src/pk.h
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2024 Felix Fietkau <nbd at nbd.name>
+ */
+#ifndef __UCODE_PK_H
+#define __UCODE_PK_H
+
+#include <ucode/lib.h>
+#include <ucode/vm.h>
+
+#include <mbedtls/bignum.h>
+#include <mbedtls/pk.h>
+#include <mbedtls/oid.h>
+#include <mbedtls/error.h>
+#include <mbedtls/version.h>
+
+#if MBEDTLS_VERSION_MAJOR < 3
+#define MBEDTLS_LEGACY
+#endif
+
+int random_cb(void *ctx, unsigned char *out, size_t len);
+uc_value_t *uc_generate_pkcs12(uc_vm_t *vm, size_t nargs);
+int64_t get_int_arg(uc_value_t *obj, const char *key, int64_t defval);
+extern int mbedtls_errno;
+extern char buf[32 * 1024];
+
+#define C(ret)						\
+	({						\
+		int __ret = (ret);			\
+		mbedtls_errno = __ret < 0 ? __ret : 0;	\
+		__ret;					\
+	})
+
+#define CHECK(ret) do {					\
+	if (C(ret) < 0)					\
+		return NULL;				\
+} while (0)
+#define CHECK_INT(ret) do {				\
+	if (C(ret) < 0)					\
+		return -1;				\
+} while (0)
+
+#define INVALID_ARG()	do { C(-1); return NULL; } while (0)
+
+#endif
diff --git a/package/utils/ucode-mod-pkgen/src/pkcs12.c b/package/utils/ucode-mod-pkgen/src/pkcs12.c
new file mode 100644
index 0000000000..7d23b9d35b
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/src/pkcs12.c
@@ -0,0 +1,612 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2024 Felix Fietkau <nbd at nbd.name>
+ */
+#include "pk.h"
+#include <mbedtls/x509_crt.h>
+#include <mbedtls/ecp.h>
+#include <mbedtls/rsa.h>
+#include <mbedtls/asn1write.h>
+#include <mbedtls/pkcs5.h>
+#include <mbedtls/pkcs12.h>
+#include <mbedtls/base64.h>
+#include <mbedtls/sha1.h>
+
+#define OID_TAG(n) MBEDTLS_OID_##n, MBEDTLS_OID_SIZE(MBEDTLS_OID_##n)
+
+#ifndef MBEDTLS_OID_AES_256_CBC
+#define MBEDTLS_OID_AES_256_CBC MBEDTLS_OID_AES "\x2a"
+#endif
+
+#define MBEDTLS_OID_PKCS9_LOCAL_KEY_ID		MBEDTLS_OID_PKCS9  "\x15"
+#define MBEDTLS_OID_PKCS9_CERT_TYPE		MBEDTLS_OID_PKCS9  "\x16"
+#define MBEDTLS_OID_PKCS9_CERT_TYPE_X509	MBEDTLS_OID_PKCS9_CERT_TYPE "\x01"
+
+#define MBEDTLS_OID_PKCS12_KEY_BAG		MBEDTLS_OID_PKCS12 "\x0a\x01\x01"
+#define MBEDTLS_OID_PKCS12_SHROUDED_KEY_BAG	MBEDTLS_OID_PKCS12 "\x0a\x01\x02"
+#define MBEDTLS_OID_PKCS12_CERT_BAG		MBEDTLS_OID_PKCS12 "\x0a\x01\x03"
+
+#ifndef MBEDTLS_OID_PKCS7
+#define MBEDTLS_OID_PKCS7			MBEDTLS_OID_PKCS "\x07"
+#define MBEDTLS_OID_PKCS7_DATA			MBEDTLS_OID_PKCS7 "\x01"
+#define MBEDTLS_OID_PKCS7_ENCRYPTED_DATA	MBEDTLS_OID_PKCS7 "\x06"
+#endif
+
+#define NUM_ITER 2048
+#define SALT_LEN 16
+#define IV_LEN 16
+#define IV_LEN_LEGACY 8
+#define KEY_LEN 32
+#define CERT_HASH_LEN 20
+
+#define CONTEXT_TAG(n) (MBEDTLS_ASN1_CONTEXT_SPECIFIC | MBEDTLS_ASN1_CONSTRUCTED | (n))
+#define SEQUENCE_TAG (MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE)
+#define SET_TAG (MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SET)
+
+#define CTX_ADD(ctx, n) \
+	do {						\
+		int __n = (n);				\
+		if ((ctx)->p - (ctx)->start <= __n)	\
+			return -1;			\
+		(ctx)->p -= __n;			\
+	} while (0)
+
+struct pkcs12_ctx {
+	uint8_t *p, *start;
+
+	uint8_t cert_hash[20];
+	uint8_t *key_cert_hash;
+
+	uint8_t salt[SALT_LEN];
+	uint8_t iv[IV_LEN];
+
+	const char *password;
+	uint8_t *pwd;
+	size_t pwd_len;
+
+	bool legacy;
+};
+
+#ifdef MBEDTLS_LEGACY
+static inline int
+mbedtls_pkcs5_pbkdf2_hmac_ext(mbedtls_md_type_t md_alg, const unsigned char *password,
+			      size_t plen, const unsigned char *salt, size_t slen,
+			      unsigned int iteration_count,
+			      uint32_t key_length, unsigned char *output)
+{
+	mbedtls_md_context_t md_ctx;
+	const mbedtls_md_info_t *md_info;
+	int ret;
+
+	md_info = mbedtls_md_info_from_type(md_alg);
+	if (!md_info)
+		return MBEDTLS_ERR_PKCS5_FEATURE_UNAVAILABLE;
+
+	mbedtls_md_init(&md_ctx);
+	ret = mbedtls_md_setup(&md_ctx, md_info, 1);
+	if (ret)
+		goto out;
+
+	ret = mbedtls_pkcs5_pbkdf2_hmac(&md_ctx, password, plen, salt, slen,
+					iteration_count, key_length, output);
+
+out:
+	mbedtls_md_free(&md_ctx);
+	return ret;
+}
+#endif
+
+static void
+uc_p12_add_tag(struct pkcs12_ctx *ctx, uint8_t *end, uint8_t tag)
+{
+	mbedtls_asn1_write_len(&ctx->p, ctx->start, end - ctx->p);
+	mbedtls_asn1_write_tag(&ctx->p, ctx->start, tag);
+}
+
+static void
+uc_p12_add_sequence(struct pkcs12_ctx *ctx, uint8_t *end)
+{
+	uc_p12_add_tag(ctx, end, SEQUENCE_TAG);
+}
+
+static void
+uc_p12_add_algo(struct pkcs12_ctx *ctx, const char *oid, size_t oid_len, size_t par_len)
+{
+	mbedtls_asn1_write_algorithm_identifier(&ctx->p, ctx->start, oid, oid_len, par_len);
+}
+
+static void
+uc_p12_add_attribute(struct pkcs12_ctx *ctx, uint8_t *end, const char *oid, size_t oid_len)
+{
+	uc_p12_add_tag(ctx, end, SET_TAG);
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, oid, oid_len);
+	uc_p12_add_sequence(ctx, end);
+}
+
+static void
+uc_p12_add_localkeyid(struct pkcs12_ctx *ctx, bool key)
+{
+	uint8_t *end = ctx->p;
+
+	ctx->p -= CERT_HASH_LEN;
+	if (key)
+		ctx->key_cert_hash = ctx->p;
+	else if (ctx->key_cert_hash)
+		memcpy(ctx->p, ctx->key_cert_hash, CERT_HASH_LEN);
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+	uc_p12_add_attribute(ctx, end, OID_TAG(PKCS9_LOCAL_KEY_ID));
+}
+
+static void
+uc_p12_add_bag(struct pkcs12_ctx *ctx, uint8_t *data_end, uint8_t *end, const char *oid, size_t oid_len)
+{
+	uc_p12_add_tag(ctx, data_end, CONTEXT_TAG(0));
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, oid, oid_len);
+	uc_p12_add_sequence(ctx, end);
+}
+
+static int
+uc_p12_enc_setup(struct pkcs12_ctx *ctx, mbedtls_cipher_context_t *cipher)
+{
+	const mbedtls_cipher_info_t *cipher_info;
+	uint8_t key[KEY_LEN];
+	int ret;
+
+	random_cb(NULL, ctx->iv, IV_LEN);
+	ret = mbedtls_pkcs5_pbkdf2_hmac_ext(MBEDTLS_MD_SHA256,
+					    (void *)ctx->password, strlen(ctx->password),
+					    ctx->salt, SALT_LEN, NUM_ITER,
+					    KEY_LEN, key);
+	if (ret < 0)
+		return ret;
+
+	cipher_info = mbedtls_cipher_info_from_type(MBEDTLS_CIPHER_AES_256_CBC);
+	ret = mbedtls_cipher_setup(cipher, cipher_info);
+	if (ret < 0)
+		return ret;
+
+	return mbedtls_cipher_setkey(cipher, key, 8 * KEY_LEN, MBEDTLS_ENCRYPT);
+}
+
+static int
+uc_p12_enc_legacy(struct pkcs12_ctx *ctx, mbedtls_cipher_context_t *cipher)
+{
+	const mbedtls_cipher_info_t *cipher_info;
+	uint8_t key[24];
+	int ret;
+
+	ret = mbedtls_pkcs12_derivation(key, sizeof(key), ctx->pwd, ctx->pwd_len,
+					ctx->salt, SALT_LEN, MBEDTLS_MD_SHA1,
+					MBEDTLS_PKCS12_DERIVE_KEY, NUM_ITER);
+	if (ret < 0)
+		return ret;
+
+	ret = mbedtls_pkcs12_derivation(ctx->iv, IV_LEN_LEGACY, ctx->pwd, ctx->pwd_len,
+					ctx->salt, SALT_LEN, MBEDTLS_MD_SHA1,
+					MBEDTLS_PKCS12_DERIVE_IV, NUM_ITER);
+	if (ret < 0)
+		return ret;
+
+	cipher_info = mbedtls_cipher_info_from_type(MBEDTLS_CIPHER_DES_EDE3_CBC);
+	ret = mbedtls_cipher_setup(cipher, cipher_info);
+	if (ret < 0)
+		return ret;
+
+	return mbedtls_cipher_setkey(cipher, key, 8 * sizeof(key), MBEDTLS_ENCRYPT);
+}
+
+static int
+uc_p12_encrypt(struct pkcs12_ctx *ctx, uint8_t *end)
+{
+	mbedtls_cipher_context_t cipher;
+	size_t iv_len = ctx->legacy ? IV_LEN_LEGACY : IV_LEN;
+	size_t out_len = 0;
+	int ret;
+
+	random_cb(NULL, ctx->salt, SALT_LEN);
+
+	if (ctx->legacy)
+		ret = uc_p12_enc_legacy(ctx, &cipher);
+	else
+		ret = uc_p12_enc_setup(ctx, &cipher);
+	if (ret < 0)
+		goto out;
+
+	ret = mbedtls_cipher_set_padding_mode(&cipher, MBEDTLS_PADDING_PKCS7);
+	if (ret < 0)
+		goto out;
+
+	ret = mbedtls_cipher_crypt(&cipher, ctx->iv, iv_len, ctx->p, end - ctx->p,
+				   (void *)buf, &out_len);
+
+	if (ret < 0)
+		goto out;
+
+	CTX_ADD(ctx, out_len - (end - ctx->p));
+	memcpy(ctx->p, buf, out_len);
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+
+out:
+	mbedtls_cipher_free(&cipher);
+
+	return ret;
+}
+
+static int
+uc_p12_add_enc_params(struct pkcs12_ctx *ctx)
+{
+	uint8_t *par_end = ctx->p;
+	uint8_t *kdf_end;
+
+	if (ctx->legacy) {
+		mbedtls_asn1_write_int(&ctx->p, ctx->start, NUM_ITER);
+
+		CTX_ADD(ctx, SALT_LEN);
+		memcpy(ctx->p, ctx->salt, SALT_LEN);
+		uc_p12_add_tag(ctx, ctx->p + SALT_LEN, MBEDTLS_ASN1_OCTET_STRING);
+
+		uc_p12_add_sequence(ctx, par_end);
+
+		uc_p12_add_algo(ctx, OID_TAG(PKCS12_PBE_SHA1_DES3_EDE_CBC), par_end - ctx->p);
+	} else {
+		CTX_ADD(ctx, IV_LEN);
+		memcpy(ctx->p, ctx->iv, IV_LEN);
+
+		uc_p12_add_tag(ctx, par_end, MBEDTLS_ASN1_OCTET_STRING);
+		uc_p12_add_algo(ctx, OID_TAG(AES_256_CBC), par_end - ctx->p);
+
+		kdf_end = ctx->p;
+		uc_p12_add_algo(ctx, OID_TAG(HMAC_SHA256), 0);
+		mbedtls_asn1_write_int(&ctx->p, ctx->start, NUM_ITER);
+		CTX_ADD(ctx, SALT_LEN);
+		memcpy(ctx->p, ctx->salt, SALT_LEN);
+		uc_p12_add_tag(ctx, ctx->p + SALT_LEN, MBEDTLS_ASN1_OCTET_STRING);
+		uc_p12_add_sequence(ctx, kdf_end);
+
+		uc_p12_add_algo(ctx, OID_TAG(PKCS5_PBKDF2), kdf_end - ctx->p);
+		uc_p12_add_sequence(ctx, par_end);
+
+		uc_p12_add_algo(ctx, OID_TAG(PKCS5_PBES2), par_end - ctx->p);
+	}
+
+	return 0;
+}
+
+static int
+uc_p12_add_cert(struct pkcs12_ctx *ctx, uc_value_t *arg, bool ca)
+{
+	const char *str = ucv_string_get(arg), *str_end;
+	uint8_t *bag_end, *end;
+	size_t len;
+	int ret;
+
+#define START_TAG	"-----BEGIN CERTIFICATE-----"
+#define END_TAG		"-----END CERTIFICATE-----"
+
+	if (!str)
+		return -1;
+
+	str = strstr(str, START_TAG);
+	if (!str)
+		return -1;
+
+	str += sizeof(START_TAG);
+	str_end = strstr(str, END_TAG);
+	if (!str_end)
+		return -1;
+
+	if ((size_t)(str_end - str) > sizeof(buf) / 2)
+		return -1;
+
+	ret = mbedtls_base64_decode((void *)buf, sizeof(buf) / 2, &len,
+				    (const void *)str, str_end - str);
+	if (ret)
+		return ret;
+
+	bag_end = ctx->p;
+	if (!ca && ctx->key_cert_hash) {
+		mbedtls_sha1((const void *)buf, len, ctx->key_cert_hash);
+		uc_p12_add_localkeyid(ctx, false);
+		uc_p12_add_tag(ctx, bag_end, SET_TAG);
+	}
+
+	end = ctx->p;
+	CTX_ADD(ctx, len);
+	memcpy(ctx->p, buf, len);
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+
+	/* CertBag */
+	uc_p12_add_tag(ctx, end, CONTEXT_TAG(0));
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, OID_TAG(PKCS9_CERT_TYPE_X509));
+	uc_p12_add_sequence(ctx, end);
+
+	uc_p12_add_bag(ctx, end, bag_end, OID_TAG(PKCS12_CERT_BAG));
+
+	return 0;
+}
+
+static int
+uc_p12_add_key(struct pkcs12_ctx *ctx, uc_value_t *arg)
+{
+	mbedtls_pk_context *pk = ucv_resource_data(arg, "mbedtls.pk");
+	uint8_t *bag_end, *end;
+	uint8_t *param = NULL;
+	size_t param_len = 0;
+	const char *oid;
+	size_t oid_len = 0;
+	int ret, len;
+
+	if (!pk)
+		return -1;
+
+	bag_end = ctx->p;
+	uc_p12_add_localkeyid(ctx, true);
+	uc_p12_add_tag(ctx, bag_end, SET_TAG);
+
+	end = ctx->p;
+	len = mbedtls_pk_write_key_der(pk, (void *)ctx->start, end - ctx->start);
+	if (len < 0)
+		return len;
+
+	ctx->p -= len;
+
+	/* Convert EC key contents to PKCS#8 style */
+	if (mbedtls_pk_get_type(pk) == MBEDTLS_PK_ECKEY) {
+		mbedtls_ecp_group_id grp_id;
+		mbedtls_asn1_buf tag_buf;
+		uint8_t *pkey_start, *pkey_end;
+		size_t seq_len, pkey_len, param_tag_len;
+		uint8_t *p = ctx->p;
+		uint8_t *_end = end;
+		uint8_t *_start;
+		int version;
+
+		ret = mbedtls_asn1_get_tag(&p, end, &seq_len, SEQUENCE_TAG);
+		if (ret < 0)
+			return ret;
+
+		_start = p;
+		_end = p + seq_len;
+		ret = mbedtls_asn1_get_int(&p, _end, &version);
+		if (ret < 0)
+			return ret;
+
+		/* private key */
+		ret = mbedtls_asn1_get_tag(&p, _end, &pkey_len, MBEDTLS_ASN1_OCTET_STRING);
+		if (ret < 0)
+			return ret;
+		pkey_start = p;
+		p += pkey_len;
+		pkey_end = p;
+
+		/* parameters */
+		ret = mbedtls_asn1_get_tag(&p, _end, &param_len, CONTEXT_TAG(0));
+		if (ret < 0)
+			return ret;
+
+		param = memcpy(buf, p, param_len);
+		p += param_len;
+
+		/* overwrite parameters */
+		param_tag_len = p - pkey_end;
+		ctx->p += param_tag_len;
+		_start += param_tag_len;
+		memmove(ctx->p, ctx->p - param_tag_len, p - ctx->p);
+
+		/* replace sequence tag */
+		ctx->p = _start;
+		uc_p12_add_sequence(ctx, end);
+
+		/* check for Curve25519 or Curve448 */
+		tag_buf = (mbedtls_asn1_buf){
+			.p = (uint8_t *)buf,
+			.len = param_len,
+		};
+		tag_buf.tag = *tag_buf.p;
+		ret = mbedtls_asn1_get_tag(&tag_buf.p, tag_buf.p + param_len, &tag_buf.len, tag_buf.tag);
+		if (ret < 0)
+			return ret;
+
+		oid = MBEDTLS_OID_EC_ALG_UNRESTRICTED;
+		oid_len = MBEDTLS_OID_SIZE(MBEDTLS_OID_EC_ALG_UNRESTRICTED);
+
+#ifdef MBEDTLS_LEGACY
+		(void)pkey_start;
+		(void)grp_id;
+#else
+		ret = mbedtls_oid_get_ec_grp_algid(&tag_buf, &grp_id);
+		if (!ret && (grp_id == MBEDTLS_ECP_DP_CURVE25519 ||
+		             grp_id == MBEDTLS_ECP_DP_CURVE448)) {
+			ctx->p = end - pkey_len;
+			memmove(ctx->p, pkey_start, pkey_len);
+			uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+		}
+#endif
+	} else {
+		mbedtls_oid_get_oid_by_pk_alg(mbedtls_pk_get_type(pk), &oid, &oid_len);
+	}
+
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+
+	/* KeyBag */
+	if (param_len) {
+		CTX_ADD(ctx, param_len);
+		memcpy(ctx->p, param, param_len);
+	}
+	uc_p12_add_algo(ctx, oid, oid_len, param_len);
+	mbedtls_asn1_write_int(&ctx->p, ctx->start, 0);
+	uc_p12_add_sequence(ctx, end);
+
+	ret = uc_p12_encrypt(ctx, end);
+	if (ret < 0)
+		return ret;
+
+	ret = uc_p12_add_enc_params(ctx);
+	if (ret < 0)
+		return ret;
+
+	uc_p12_add_sequence(ctx, end);
+
+	uc_p12_add_bag(ctx, end, bag_end, OID_TAG(PKCS12_SHROUDED_KEY_BAG));
+
+	return 0;
+}
+
+static int
+uc_p12_add_authsafe(struct pkcs12_ctx *ctx, uc_value_t *arg)
+{
+	uc_value_t *extra;
+	uint8_t *end = ctx->p;
+	size_t len;
+	int ret;
+
+	/* authSafe contents */
+	extra = ucv_object_get(arg, "extra", NULL);
+	if (extra) {
+		size_t len;
+
+		if (ucv_type(extra) != UC_ARRAY)
+			return -1;
+
+		len = ucv_array_length(extra);
+		for (size_t i = 0; i < len; i++) {
+			ret = uc_p12_add_cert(ctx, ucv_array_get(extra, i), true);
+			if (ret < 0)
+			    return ret;
+		}
+	}
+
+	ret = uc_p12_add_key(ctx, ucv_object_get(arg, "key", NULL));
+	if (ret < 0)
+	    return ret;
+
+	ret = uc_p12_add_cert(ctx, ucv_object_get(arg, "cert", NULL), false);
+	if (ret < 0)
+	    return ret;
+
+	/* encrypted */
+	uc_p12_add_sequence(ctx, end);
+
+	ret = uc_p12_encrypt(ctx, end);
+	if (ret < 0)
+		 return ret;
+
+	uc_p12_add_tag(ctx, end, CONTEXT_TAG(0));
+
+	ret = uc_p12_add_enc_params(ctx);
+	if (ret < 0)
+		return ret;
+
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, OID_TAG(PKCS7_DATA));
+	uc_p12_add_sequence(ctx, end);
+
+	mbedtls_asn1_write_int(&ctx->p, ctx->start, 0);
+	uc_p12_add_sequence(ctx, end);
+	uc_p12_add_tag(ctx, end, CONTEXT_TAG(0));
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, OID_TAG(PKCS7_ENCRYPTED_DATA));
+	uc_p12_add_sequence(ctx, end);
+
+	/* authSafe contents */
+	uc_p12_add_sequence(ctx, end);
+
+	/* authSafe header */
+	len = end - ctx->p;
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+	uc_p12_add_tag(ctx, end, CONTEXT_TAG(0));
+	mbedtls_asn1_write_oid(&ctx->p, ctx->start, OID_TAG(PKCS7_DATA));
+	uc_p12_add_sequence(ctx, end);
+
+	return len;
+}
+
+static void *
+uc_p12_add_mac_digest_info(struct pkcs12_ctx *ctx)
+{
+	uint8_t *end = ctx->p;
+	size_t len = 20;
+
+	ctx->p -= len;
+	uc_p12_add_tag(ctx, end, MBEDTLS_ASN1_OCTET_STRING);
+	uc_p12_add_algo(ctx, OID_TAG(DIGEST_ALG_SHA1), 0);
+	uc_p12_add_sequence(ctx, end);
+
+	return end - len;
+}
+
+uc_value_t *uc_generate_pkcs12(uc_vm_t *vm, size_t nargs)
+{
+	uc_value_t *arg = uc_fn_arg(0), *pwd_arg;
+	mbedtls_md_context_t hmac;
+	uint8_t *end = (uint8_t *)&buf[sizeof(buf)];
+	struct pkcs12_ctx ctx = {
+		.start = (uint8_t *)&buf[sizeof(buf) / 2],
+		.p = end,
+	};
+	uint8_t *hash, *data;
+	uint8_t key[20], *salt;
+	size_t salt_len = 8;
+	int data_len;
+	uc_value_t *ret = NULL;
+	const char *passwd;
+
+	if (ucv_type(arg) != UC_OBJECT)
+		INVALID_ARG();
+
+	ctx.legacy = ucv_is_truish(ucv_object_get(arg, "legacy", NULL));
+
+	mbedtls_md_init(&hmac);
+	pwd_arg = ucv_object_get(arg, "password", NULL);
+	passwd = ucv_string_get(pwd_arg);
+	if (!passwd)
+		INVALID_ARG();
+
+	/* password is expected to be a UTF-16 string */
+	ctx.password = passwd;
+	ctx.pwd_len = 2 * strlen(passwd) + 2;
+	ctx.pwd = malloc(ctx.pwd_len);
+	for (size_t i = 0; i < ctx.pwd_len; i += 2) {
+		ctx.pwd[i] = 0;
+		ctx.pwd[i + 1] = passwd[i / 2];
+	}
+
+	/* MacData */
+	mbedtls_asn1_write_int(&ctx.p, ctx.start, NUM_ITER);
+
+	ctx.p -= salt_len;
+	salt = ctx.p;
+	random_cb(NULL, salt, salt_len);
+	uc_p12_add_tag(&ctx, salt + salt_len, MBEDTLS_ASN1_OCTET_STRING);
+
+	hash = uc_p12_add_mac_digest_info(&ctx);
+	uc_p12_add_sequence(&ctx, end);
+
+	data = ctx.p;
+	data_len = uc_p12_add_authsafe(&ctx, arg);
+	if (C(data_len) < 0)
+	    goto out;
+	data -= data_len;
+
+	mbedtls_asn1_write_int(&ctx.p, ctx.start, 3);
+	uc_p12_add_sequence(&ctx, end);
+
+	if (C(mbedtls_pkcs12_derivation(key, sizeof(key), ctx.pwd, ctx.pwd_len,
+					salt, salt_len, MBEDTLS_MD_SHA1,
+					MBEDTLS_PKCS12_DERIVE_MAC_KEY, NUM_ITER)))
+		goto out;
+
+	if (C(mbedtls_md_setup(&hmac, mbedtls_md_info_from_type(MBEDTLS_MD_SHA1), 1)))
+		goto out;
+	if (C(mbedtls_md_hmac_starts(&hmac, key, sizeof(key))))
+		goto out;
+	if (C(mbedtls_md_hmac_update(&hmac, data, data_len)))
+		goto out;
+	if (C(mbedtls_md_hmac_finish(&hmac, hash)))
+		goto out;
+
+	ret = ucv_string_new_length((char *)ctx.p, end - ctx.p);
+
+out:
+	free(ctx.pwd);
+	mbedtls_md_free(&hmac);
+	return ret;
+}
diff --git a/package/utils/ucode-mod-pkgen/src/ucode.c b/package/utils/ucode-mod-pkgen/src/ucode.c
new file mode 100644
index 0000000000..cb5569b977
--- /dev/null
+++ b/package/utils/ucode-mod-pkgen/src/ucode.c
@@ -0,0 +1,598 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2024 Felix Fietkau <nbd at nbd.name>
+ */
+#include <sys/types.h>
+#include <sys/random.h>
+
+#include <stdint.h>
+#include <limits.h>
+#include <errno.h>
+
+#include <mbedtls/entropy.h>
+#include <mbedtls/x509_crt.h>
+#include <mbedtls/ecp.h>
+#include <mbedtls/rsa.h>
+
+#include <ucode/module.h>
+
+#include "pk.h"
+
+/* mbedtls < 3.x compat */
+#ifdef MBEDTLS_LEGACY
+#define mbedtls_pk_parse_key(pk, key, keylen, passwd, passwdlen, random, random_ctx) \
+	mbedtls_pk_parse_key(pk, key, keylen, passwd, passwdlen)
+#endif
+
+static uc_resource_type_t *uc_pk_type, *uc_crt_type;
+static uc_value_t *registry;
+char buf[32 * 1024];
+int mbedtls_errno;
+
+struct uc_cert_wr {
+	mbedtls_x509write_cert crt; /* must be first */
+	mbedtls_mpi mpi;
+	unsigned int reg;
+};
+
+static unsigned int uc_reg_add(uc_value_t *val)
+{
+	size_t i = 0;
+
+	while (ucv_array_get(registry, i))
+		i++;
+
+	ucv_array_set(registry, i, ucv_get(val));
+
+	return i;
+}
+
+int random_cb(void *ctx, unsigned char *out, size_t len)
+{
+#ifdef linux
+	if (getrandom(out, len, 0) != (ssize_t) len)
+		return MBEDTLS_ERR_ENTROPY_SOURCE_FAILED;
+#else
+	static FILE *f;
+
+	if (!f)
+		f = fopen("/dev/urandom", "r");
+	if (fread(out, len, 1, f) != 1)
+		return MBEDTLS_ERR_ENTROPY_SOURCE_FAILED;
+#endif
+
+	return 0;
+}
+
+int64_t get_int_arg(uc_value_t *obj, const char *key, int64_t defval)
+{
+	uc_value_t *uval = ucv_object_get(obj, key, NULL);
+	int64_t val;
+
+	if (!uval)
+		return defval;
+
+	val = ucv_int64_get(uval);
+	if (errno || val < 0 || val > INT_MAX)
+		return INT_MIN;
+
+	return val ? val : defval;
+}
+
+static int
+gen_rsa_key(mbedtls_pk_context *pk, uc_value_t *arg)
+{
+	int64_t key_size, exp;
+
+	key_size = get_int_arg(arg, "size", 2048);
+	exp = get_int_arg(arg, "exponent", 65537);
+	if (key_size < 0 || exp < 0)
+		return -1;
+
+	return mbedtls_rsa_gen_key(mbedtls_pk_rsa(*pk), random_cb, NULL, key_size, exp);
+}
+
+static int
+gen_ec_key(mbedtls_pk_context *pk, uc_value_t *arg)
+{
+	mbedtls_ecp_group_id curve;
+	const char *c_name;
+	uc_value_t *c_arg;
+
+	c_arg = ucv_object_get(arg, "curve", NULL);
+	if (c_arg && ucv_type(c_arg) != UC_STRING)
+		return -1;
+
+	c_name = ucv_string_get(c_arg);
+	if (!c_name)
+		curve = MBEDTLS_ECP_DP_SECP256R1;
+	else {
+		const mbedtls_ecp_curve_info *curve_info;
+		curve_info = mbedtls_ecp_curve_info_from_name(c_name);
+		if (!curve_info)
+			return MBEDTLS_ERR_PK_UNKNOWN_NAMED_CURVE;
+
+		curve = curve_info->grp_id;
+	}
+
+	return mbedtls_ecp_gen_key(curve, mbedtls_pk_ec(*pk), random_cb, NULL);
+}
+
+static void free_pk(void *pk)
+{
+	if (!pk)
+		return;
+
+	mbedtls_pk_free(pk);
+	free(pk);
+}
+
+static void free_crt(void *ptr)
+{
+	struct uc_cert_wr *crt = ptr;
+
+	if (!crt)
+		return;
+
+	mbedtls_x509write_crt_free(&crt->crt);
+	mbedtls_mpi_free(&crt->mpi);
+	ucv_array_set(registry, crt->reg, NULL);
+	free(crt);
+}
+
+static uc_value_t *
+uc_generate_key(uc_vm_t *vm, size_t nargs)
+{
+	uc_value_t *cur, *arg = uc_fn_arg(0);
+	mbedtls_pk_type_t pk_type;
+	mbedtls_pk_context *pk;
+	const char *type;
+	int ret;
+
+	if (ucv_type(arg) != UC_OBJECT)
+		INVALID_ARG();
+
+	cur = ucv_object_get(arg, "type", NULL);
+	type = ucv_string_get(cur);
+	if (!type)
+		INVALID_ARG();
+
+	if (!strcmp(type, "rsa"))
+		pk_type = MBEDTLS_PK_RSA;
+	else if (!strcmp(type, "ec"))
+		pk_type = MBEDTLS_PK_ECKEY;
+	else
+		INVALID_ARG();
+
+	pk = calloc(1, sizeof(*pk));
+	mbedtls_pk_init(pk);
+	mbedtls_pk_setup(pk, mbedtls_pk_info_from_type(pk_type));
+	switch (pk_type) {
+	case MBEDTLS_PK_RSA:
+		ret = C(gen_rsa_key(pk, arg));
+		break;
+	case MBEDTLS_PK_ECKEY:
+		ret = C(gen_ec_key(pk, arg));
+		break;
+	default:
+		ret = -1;
+	}
+
+	if (ret) {
+		free_pk(pk);
+		return NULL;
+	}
+
+	return uc_resource_new(uc_pk_type, pk);
+}
+
+static uc_value_t *
+uc_load_key(uc_vm_t *vm, size_t nargs)
+{
+	uc_value_t *keystr = uc_fn_arg(0);
+	uc_value_t *pub = uc_fn_arg(1);
+	uc_value_t *passwd = uc_fn_arg(2);
+	mbedtls_pk_context *pk;
+	int ret;
+
+	if (ucv_type(keystr) != UC_STRING ||
+	    (pub && ucv_type(pub) != UC_BOOLEAN) ||
+	    (passwd && ucv_type(passwd) != UC_STRING))
+		INVALID_ARG();
+
+	pk = calloc(1, sizeof(*pk));
+	mbedtls_pk_init(pk);
+	if (ucv_is_truish(pub))
+		ret = C(mbedtls_pk_parse_public_key(pk, (const uint8_t *)ucv_string_get(keystr),
+						    ucv_string_length(keystr) + 1));
+	else
+		ret = C(mbedtls_pk_parse_key(pk, (const uint8_t *)ucv_string_get(keystr),
+					     ucv_string_length(keystr) + 1,
+					     (const uint8_t *)ucv_string_get(passwd),
+					     ucv_string_length(passwd) + 1,
+					     random_cb, NULL));
+	if (ret) {
+		free_pk(pk);
+		return NULL;
+	}
+
+	return uc_resource_new(uc_pk_type, pk);
+}
+
+static void
+uc_cert_info_add(uc_value_t *info, const char *name, int len)
+{
+	uc_value_t *val;
+
+	if (len < 0)
+		return;
+
+	val = ucv_string_new_length(buf, len);
+	ucv_object_add(info, name, ucv_get(val));
+}
+
+static void
+uc_cert_info_add_name(uc_value_t *info, const char *name, mbedtls_x509_name *dn)
+{
+	int len;
+
+	len = mbedtls_x509_dn_gets(buf, sizeof(buf), dn);
+	uc_cert_info_add(info, name, len);
+}
+
+static void
+uc_cert_info_add_time(uc_value_t *info, const char *name, mbedtls_x509_time *t)
+{
+	int len;
+
+	len = snprintf(buf, sizeof(buf), "%04d%02d%02d%02d%02d%02d",
+		       t->year, t->mon, t->day, t->hour, t->min, t->sec);
+	uc_cert_info_add(info, name, len);
+}
+
+static uc_value_t *
+uc_cert_info(uc_vm_t *vm, size_t nargs)
+{
+	uc_value_t *arg = uc_fn_arg(0);
+	mbedtls_x509_crt crt, *cur;
+	uc_value_t *ret = NULL;
+
+	if (ucv_type(arg) != UC_STRING)
+		return NULL;
+
+	mbedtls_x509_crt_init(&crt);
+	if (C(mbedtls_x509_crt_parse(&crt, (const void *)ucv_string_get(arg), ucv_string_length(arg) + 1)) < 0)
+		goto out;
+
+	ret = ucv_array_new(vm);
+	for (cur = &crt; cur && cur->version != 0; cur = cur->next) {
+		uc_value_t *info = ucv_object_new(vm);
+		int len;
+
+		ucv_array_push(ret, ucv_get(info));
+		ucv_object_add(info, "version", ucv_int64_new(cur->version));
+
+		uc_cert_info_add_name(info, "issuer", &cur->issuer);
+		uc_cert_info_add_name(info, "subject", &cur->issuer);
+		uc_cert_info_add_time(info, "valid_from", &cur->valid_from);
+		uc_cert_info_add_time(info, "valid_to", &cur->valid_to);
+
+		len = mbedtls_x509_serial_gets(buf, sizeof(buf), &cur->serial);
+		uc_cert_info_add(info, "serial", len);
+	}
+
+out:
+	mbedtls_x509_crt_free(&crt);
+	return ret;
+}
+
+static uc_value_t *
+uc_pk_pem(uc_vm_t *vm, size_t nargs)
+{
+	mbedtls_pk_context *pk = uc_fn_thisval("mbedtls.pk");
+	uc_value_t *pub = uc_fn_arg(0);
+
+	if (!pk)
+		return NULL;
+
+	if (ucv_is_truish(pub))
+		CHECK(mbedtls_pk_write_pubkey_pem(pk, (void *)buf, sizeof(buf)));
+	else
+		CHECK(mbedtls_pk_write_key_pem(pk, (void *)buf, sizeof(buf)));
+
+	return ucv_string_new(buf);
+}
+
+static uc_value_t *
+uc_pk_der(uc_vm_t *vm, size_t nargs)
+{
+	mbedtls_pk_context *pk = uc_fn_thisval("mbedtls.pk");
+	uc_value_t *pub = uc_fn_arg(0);
+	int len;
+
+	if (!pk)
+		return NULL;
+
+	if (ucv_is_truish(pub))
+		len = mbedtls_pk_write_pubkey_der(pk, (void *)buf, sizeof(buf));
+	else
+		len = mbedtls_pk_write_key_der(pk, (void *)buf, sizeof(buf));
+	if (len < 0)
+		CHECK(len);
+
+	return ucv_string_new_length(buf + sizeof(buf) - len, len);
+}
+
+static uc_value_t *
+uc_crt_pem(uc_vm_t *vm, size_t nargs)
+{
+	mbedtls_x509write_cert *crt = uc_fn_thisval("mbedtls.crt");
+	if (!crt)
+		return NULL;
+
+	CHECK(mbedtls_x509write_crt_pem(crt, (void *)buf, sizeof(buf), random_cb, NULL));
+
+	return ucv_string_new(buf);
+}
+
+static uc_value_t *
+uc_crt_der(uc_vm_t *vm, size_t nargs)
+{
+	mbedtls_x509write_cert *crt = uc_fn_thisval("mbedtls.crt");
+	int len;
+
+	if (!crt)
+		return NULL;
+
+	len = mbedtls_x509write_crt_der(crt, (void *)buf, sizeof(buf), random_cb, NULL);
+	if (len < 0)
+		CHECK(len);
+
+	return ucv_string_new_length(buf, len);
+}
+
+static int
+uc_cert_set_validity(mbedtls_x509write_cert *crt, uc_value_t *arg)
+{
+	uc_value_t *from = ucv_array_get(arg, 0);
+	uc_value_t *to = ucv_array_get(arg, 1);
+
+	if (ucv_type(from) != UC_STRING || ucv_type(to) != UC_STRING)
+		return -1;
+
+	return mbedtls_x509write_crt_set_validity(crt, ucv_string_get(from), ucv_string_get(to));
+}
+
+static int
+uc_cert_init(mbedtls_x509write_cert *crt, mbedtls_mpi *mpi, uc_value_t *reg, uc_value_t *arg)
+{
+	uc_value_t *cur;
+	int64_t serial;
+	int path_len;
+	int version;
+	bool ca;
+
+	mbedtls_mpi_init(mpi);
+	mbedtls_x509write_crt_init(crt);
+	mbedtls_x509write_crt_set_md_alg(crt, MBEDTLS_MD_SHA256);
+
+	ca = ucv_is_truish(ucv_object_get(arg, "ca", NULL));
+	path_len = get_int_arg(arg, "max_pathlen", ca ? -1 : 0);
+	if (path_len < -1)
+		return -1;
+
+	version = get_int_arg(arg, "version", 3);
+	if (version < 0 || version > 3)
+		return -1;
+
+	serial = get_int_arg(arg, "serial", 1);
+	if (serial < 0)
+		return -1;
+
+	mbedtls_mpi_lset(mpi, serial);
+	mbedtls_x509write_crt_set_serial(crt, mpi);
+	mbedtls_x509write_crt_set_version(crt, version - 1);
+	CHECK_INT(mbedtls_x509write_crt_set_basic_constraints(crt, ca, path_len));
+
+	cur = ucv_object_get(arg, "subject_name", NULL);
+	if (ucv_type(cur) == UC_STRING)
+		CHECK_INT(mbedtls_x509write_crt_set_subject_name(crt, ucv_string_get(cur)));
+	else
+		return -1;
+	cur = ucv_object_get(arg, "subject_key", NULL);
+	if (cur) {
+		mbedtls_pk_context *key = ucv_resource_data(cur, "mbedtls.pk");
+		if (!key)
+			return -1;
+
+		ucv_array_set(reg, 0, ucv_get(cur));
+		mbedtls_x509write_crt_set_subject_key(crt, key);
+		mbedtls_x509write_crt_set_subject_key_identifier(crt);
+	} else
+		return -1;
+
+	cur = ucv_object_get(arg, "issuer_name", NULL);
+	if (ucv_type(cur) == UC_STRING)
+		CHECK_INT(mbedtls_x509write_crt_set_issuer_name(crt, ucv_string_get(cur)));
+	else
+		return -1;
+	cur = ucv_object_get(arg, "issuer_key", NULL);
+	if (cur) {
+		mbedtls_pk_context *key = ucv_resource_data(cur, "mbedtls.pk");
+		if (!key)
+			return -1;
+
+		ucv_array_set(reg, 1, ucv_get(cur));
+		mbedtls_x509write_crt_set_issuer_key(crt, key);
+		mbedtls_x509write_crt_set_authority_key_identifier(crt);
+	} else
+		return -1;
+
+	cur = ucv_object_get(arg, "validity", NULL);
+	if (ucv_type(cur) != UC_ARRAY || ucv_array_length(cur) != 2)
+		return -1;
+	if (uc_cert_set_validity(crt, cur))
+		return -1;
+
+	cur = ucv_object_get(arg, "key_usage", NULL);
+	if (ucv_type(cur) == UC_ARRAY) {
+		static const struct {
+			const char *name;
+			uint8_t val;
+		} key_flags[] = {
+			{ "digital_signature", MBEDTLS_X509_KU_DIGITAL_SIGNATURE },
+			{ "non_repudiation", MBEDTLS_X509_KU_NON_REPUDIATION },
+			{ "key_encipherment", MBEDTLS_X509_KU_KEY_ENCIPHERMENT },
+			{ "data_encipherment", MBEDTLS_X509_KU_DATA_ENCIPHERMENT },
+			{ "key_agreement", MBEDTLS_X509_KU_KEY_AGREEMENT },
+			{ "key_cert_sign", MBEDTLS_X509_KU_KEY_CERT_SIGN },
+			{ "crl_sign", MBEDTLS_X509_KU_CRL_SIGN },
+		};
+		uint8_t key_usage = 0;
+		size_t len = ucv_array_length(cur);
+
+		for (size_t i = 0; i < len; i++) {
+			uc_value_t *val = ucv_array_get(cur, i);
+			const char *str;
+			size_t k;
+
+			str = ucv_string_get(val);
+			if (!str)
+				return -1;
+
+			for (k = 0; k < ARRAY_SIZE(key_flags); k++)
+				if (!strcmp(str, key_flags[k].name))
+					break;
+			if (k == ARRAY_SIZE(key_flags))
+				return -1;
+
+			key_usage |= key_flags[k].val;
+		}
+		CHECK_INT(mbedtls_x509write_crt_set_key_usage(crt, key_usage));
+	} else if (cur)
+		return -1;
+
+#ifndef MBEDTLS_LEGACY
+	cur = ucv_object_get(arg, "ext_key_usage", NULL);
+	if (ucv_type(cur) == UC_ARRAY && ucv_array_length(cur)) {
+		static const struct {
+			const char *name;
+			struct mbedtls_asn1_buf val;
+		} key_flags[] = {
+#define __oid(name, val)					\
+	{							\
+		name,						\
+		{						\
+			.tag = MBEDTLS_ASN1_OID,		\
+			.len = sizeof(MBEDTLS_OID_##val),	\
+			.p = (uint8_t *)MBEDTLS_OID_##val,	\
+		}						\
+	}
+			__oid("server_auth", SERVER_AUTH),
+			__oid("client_auth", CLIENT_AUTH),
+			__oid("code_signing", CODE_SIGNING),
+			__oid("email_protection", EMAIL_PROTECTION),
+			__oid("time_stamping", TIME_STAMPING),
+			__oid("ocsp_signing", OCSP_SIGNING),
+			__oid("any", ANY_EXTENDED_KEY_USAGE)
+		};
+		struct mbedtls_asn1_sequence *elem;
+		size_t len = ucv_array_length(cur);
+
+		elem = calloc(len, sizeof(*elem));
+		for (size_t i = 0; i < len; i++) {
+			uc_value_t *val = ucv_array_get(cur, i);
+			const char *str;
+			size_t k;
+
+			str = ucv_string_get(val);
+			if (!str)
+				return -1;
+
+			for (k = 0; k < ARRAY_SIZE(key_flags); k++)
+				if (!strcmp(str, key_flags[k].name))
+					break;
+
+			if (k == ARRAY_SIZE(key_flags)) {
+				free(elem);
+				return -1;
+			}
+			elem[i].buf = key_flags[k].val;
+			if (i + 1 < len)
+				elem[i].next = &elem[i + 1];
+		}
+
+		CHECK_INT(mbedtls_x509write_crt_set_ext_key_usage(crt, elem));
+	} else if (cur)
+		return -1;
+#endif
+
+	return 0;
+}
+
+static uc_value_t *
+uc_generate_cert(uc_vm_t *vm, size_t nargs)
+{
+	struct uc_cert_wr *crt;
+	uc_value_t *arg = uc_fn_arg(0);
+	uc_value_t *reg;
+
+	if (ucv_type(arg) != UC_OBJECT)
+		return NULL;
+
+	reg = ucv_array_new(vm);
+	crt = calloc(1, sizeof(*crt));
+	if (C(uc_cert_init(&crt->crt, &crt->mpi, reg, arg))) {
+		free(crt);
+		return NULL;
+	}
+
+	crt->reg = uc_reg_add(reg);
+
+	return uc_resource_new(uc_crt_type, crt);
+}
+
+static uc_value_t *
+uc_mbedtls_error(uc_vm_t *vm, size_t nargs)
+{
+	mbedtls_strerror(mbedtls_errno, buf, sizeof(buf));
+
+	return ucv_string_new(buf);
+}
+
+static uc_value_t *
+uc_mbedtls_errno(uc_vm_t *vm, size_t nargs)
+{
+	return ucv_int64_new(mbedtls_errno);
+}
+
+
+static const uc_function_list_t pk_fns[] = {
+	{ "pem", uc_pk_pem },
+	{ "der", uc_pk_der },
+};
+
+static const uc_function_list_t crt_fns[] = {
+	{ "pem", uc_crt_pem },
+	{ "der", uc_crt_der },
+};
+
+static const uc_function_list_t global_fns[] = {
+	{ "load_key", uc_load_key },
+	{ "cert_info", uc_cert_info },
+	{ "generate_key", uc_generate_key },
+	{ "generate_cert", uc_generate_cert },
+	{ "generate_pkcs12", uc_generate_pkcs12 },
+	{ "errno", uc_mbedtls_errno },
+	{ "error", uc_mbedtls_error },
+};
+
+void uc_module_init(uc_vm_t *vm, uc_value_t *scope)
+{
+	uc_pk_type = uc_type_declare(vm, "mbedtls.pk", pk_fns, free_pk);
+	uc_crt_type = uc_type_declare(vm, "mbedtls.crt", crt_fns, free_crt);
+	uc_function_list_register(scope, global_fns);
+
+	registry = ucv_array_new(vm);
+	uc_vm_registry_set(vm, "pkgen.registry", registry);
+}



From lede-commits at lists.infradead.org  Fri Jan 17 04:22:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 07:22:12 -0500
Subject: [openwrt/openwrt]  generic: add pending patches for RealTek Ethernet
 PHYs
In-Reply-To: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
References: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
Message-ID: <mailman.41992.1737116534.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/41c164d32bedb6b27ad1fd022dec6d25338db6d6

commit 41c164d32bedb6b27ad1fd022dec6d25338db6d6
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 16 20:11:43 2025 +0000

    generic: add pending patches for RealTek Ethernet PHYs
    
    Import patches to fix several issues with status reporting of RealTek
    2.5G PHYs.
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
---
 ...ltek-clear-1000Base-T-lpa-bits-if-link-is.patch | 78 ++++++++++++++++++++++
 ...ltek-clear-master_slave_state-if-link-is-.patch | 61 +++++++++++++++++
 ...ltek-always-clear-10gbase-t-link-partner-.patch | 67 +++++++++++++++++++
 3 files changed, 206 insertions(+)

diff --git a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
new file mode 100644
index 0000000000..5bc77ed3b8
--- /dev/null
+++ b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
@@ -0,0 +1,78 @@
+From patchwork Wed Jan 15 14:43:35 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940510
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:43:35 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 1/3] net: phy: realtek: clear 1000Base-T lpa if link is
+ down
+Message-ID: 
+ <67e38eee4c46b921938fb33f5bc86c8979b9aa33.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+Only read 1000Base-T link partner advertisement if autonegotiation has
+completed and otherwise 1000Base-T link partner advertisement bits.
+
+This fixes bogus 1000Base-T link partner advertisement after link goes
+down (eg. by disconnecting the wire).
+Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 19 ++++++++-----------
+ 1 file changed, 8 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1068,23 +1068,20 @@ static int rtl822x_c45_read_status(struc
+ {
+ 	int ret, val;
+ 
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+ 	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
+ 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+ 				   RTL822X_VND2_GANLPAR);
+ 		if (val < 0)
+ 			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
+ 	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
+ 
+ 	if (!phydev->link)
+ 		return 0;
diff --git a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
new file mode 100644
index 0000000000..b7e5f8b58f
--- /dev/null
+++ b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
@@ -0,0 +1,61 @@
+From patchwork Wed Jan 15 14:43:43 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940511
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:43:43 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 2/3] net: phy: realtek: clear master_slave_state if link
+ is down
+Message-ID: 
+ <2155887c3a665e4132a034df1e9cfdeec0ae48c9.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+rtlgen_decode_physr() which sets master_slave_state isn't called in case
+the link is down and other than rtlgen_read_status(),
+rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
+
+Avoid stale master_slave_state by always setting it to
+MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
+is down.
+
+Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1083,8 +1083,10 @@ static int rtl822x_c45_read_status(struc
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	if (!phydev->link)
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+ 		return 0;
++	}
+ 
+ 	/* Read actual speed from vendor register. */
+ 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
new file mode 100644
index 0000000000..23947c2200
--- /dev/null
+++ b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
@@ -0,0 +1,67 @@
+From patchwork Wed Jan 15 14:45:00 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940519
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:45:00 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 3/3] net: phy: realtek: always clear NBase-T lpa
+Message-ID: 
+ <566d4771d68a1e18d2d48860e25891e468e26551.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+Clear NBase-T link partner advertisement before calling
+rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
+setting speed and duplex.
+
+This fixes bogus 2.5G/5G/10G link partner advertisement and thus
+speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
+NBase-T lpa.
+
+Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -997,15 +997,15 @@ static int rtl822x_read_status(struct ph
+ {
+ 	int lpadv, ret;
+ 
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
+ 	ret = rtlgen_read_status(phydev);
+ 	if (ret < 0)
+ 		return ret;
+ 
+ 	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
+ 		return 0;
+-	}
+ 
+ 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ 	if (lpadv < 0)



From lede-commits at lists.infradead.org  Fri Jan 17 04:22:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 07:22:10 -0500
Subject: [openwrt/openwrt]  generic: r8169: remove reverted temperature sensor
 patch
In-Reply-To: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
References: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
Message-ID: <mailman.41993.1737116535.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0de9999a7819acf74f6adeaa27be363cf72409ab

commit 0de9999a7819acf74f6adeaa27be363cf72409ab
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 09:38:30 2025 +0100

    generic: r8169: remove reverted temperature sensor patch
    
    The patch adding temperature sensor support for r8169 has been removed upstream
    and the functionality will be added to Realtek PHY instead:
    https://github.com/torvalds/linux/commit/1f691a1fc4bef1c5cf5f503e14e1a22fc37c97e3
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 package/kernel/linux/modules/netdevices.mk         |  2 +-
 ...upport-for-the-temperature-sensor-being-a.patch | 83 ----------------------
 ...e-original-workaround-for-RTL8125-broken-.patch |  2 +-
 ...e-SG-TSO-on-selected-chip-versions-per-de.patch |  4 +-
 ...69-implement-additional-ethtool-stats-ops.patch |  8 +--
 ...13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch |  6 +-
 ...-r8169-remove-rtl_dash_loop_wait_high-low.patch |  6 +-
 ...0-33-v6.13-r8169-add-support-for-RTL8125D.patch | 18 ++---
 ...nconsistent-indenting-in-rtl8169_get_eth_.patch |  2 +-
 ...ve-initialization-of-RSS-registers-on-RTL.patch |  4 +-
 ...move-leftover-locks-after-reverted-change.patch | 12 ++--
 ...-40-v6.13-r8169-improve-__rtl8169_set_wol.patch |  4 +-
 ...1-v6.13-r8169-improve-rtl_set_d3_pll_down.patch |  2 +-
 ...-WAKE_PHY-handling-with-r8125-r8126-vendo.patch |  2 +-
 ...elper-r8169_mod_reg8_cond-to-simplify-rtl.patch |  2 +-
 15 files changed, 37 insertions(+), 120 deletions(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index 2a6ecb7a2b..98ab7ea408 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -959,7 +959,7 @@ $(eval $(call KernelPackage,8139cp))
 define KernelPackage/r8169
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres +kmod-hwmon-core
+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres
   KCONFIG:= \
     CONFIG_R8169 \
     CONFIG_R8169_LEDS=y
diff --git a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
deleted file mode 100644
index 2403da5d55..0000000000
--- a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 1ffcc8d41306fd2e5f140b276820714a26a11cc4 Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1 at gmail.com>
-Date: Mon, 7 Oct 2024 20:34:12 +0200
-Subject: [PATCH] r8169: add support for the temperature sensor being available
- from RTL8125B
-
-This adds support for the temperature sensor being available from
-RTL8125B. Register information was taken from r8125 vendor driver.
-
-Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
-Reviewed-by: Simon Horman <horms at kernel.org>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/realtek/r8169_main.c | 44 +++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -16,6 +16,7 @@
- #include <linux/clk.h>
- #include <linux/delay.h>
- #include <linux/ethtool.h>
-+#include <linux/hwmon.h>
- #include <linux/phy.h>
- #include <linux/if_vlan.h>
- #include <linux/in.h>
-@@ -5373,6 +5374,43 @@ static bool rtl_aspm_is_safe(struct rtl8
- 	return false;
- }
- 
-+static umode_t r8169_hwmon_is_visible(const void *drvdata,
-+				      enum hwmon_sensor_types type,
-+				      u32 attr, int channel)
-+{
-+	return 0444;
-+}
-+
-+static int r8169_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
-+			    u32 attr, int channel, long *val)
-+{
-+	struct rtl8169_private *tp = dev_get_drvdata(dev);
-+	int val_raw;
-+
-+	val_raw = phy_read_paged(tp->phydev, 0xbd8, 0x12) & 0x3ff;
-+	if (val_raw >= 512)
-+		val_raw -= 1024;
-+
-+	*val = 1000 * val_raw / 2;
-+
-+	return 0;
-+}
-+
-+static const struct hwmon_ops r8169_hwmon_ops = {
-+	.is_visible =  r8169_hwmon_is_visible,
-+	.read = r8169_hwmon_read,
-+};
-+
-+static const struct hwmon_channel_info * const r8169_hwmon_info[] = {
-+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
-+	NULL
-+};
-+
-+static const struct hwmon_chip_info r8169_hwmon_chip_info = {
-+	.ops = &r8169_hwmon_ops,
-+	.info = r8169_hwmon_info,
-+};
-+
- static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
- {
- 	struct rtl8169_private *tp;
-@@ -5547,6 +5585,12 @@ static int rtl_init_one(struct pci_dev *
- 	if (rc)
- 		return rc;
- 
-+	/* The temperature sensor is available from RTl8125B */
-+	if (IS_REACHABLE(CONFIG_HWMON) && tp->mac_version >= RTL_GIGA_MAC_VER_63)
-+		/* ignore errors */
-+		devm_hwmon_device_register_with_info(&pdev->dev, "nic_temp", tp,
-+						     &r8169_hwmon_chip_info,
-+						     NULL);
- 	rc = register_netdev(dev);
- 	if (rc)
- 		return rc;
diff --git a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
index 8c6e6d8dc4..dbf66bb81e 100644
--- a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
+++ b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4779,11 +4779,7 @@ static void r8169_phylink_handler(struct
+@@ -4778,11 +4778,7 @@ static void r8169_phylink_handler(struct
  	if (netif_carrier_ok(ndev)) {
  		rtl_link_chg_patch(tp);
  		pm_request_resume(d);
diff --git a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
index dc05299628..4b00eba622 100644
--- a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
+++ b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
@@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5529,11 +5529,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5491,11 +5491,6 @@ static int rtl_init_one(struct pci_dev *
  
  	dev->features |= dev->hw_features;
  
@@ -32,7 +32,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  	if (rtl_chip_supports_csum_v2(tp)) {
  		dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
  		netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
-@@ -5544,6 +5539,17 @@ static int rtl_init_one(struct pci_dev *
+@@ -5506,6 +5501,17 @@ static int rtl_init_one(struct pci_dev *
  		netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
  	}
  
diff --git a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
index faab0df7f4..29c8527b1c 100644
--- a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
+++ b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2162,6 +2162,19 @@ static void rtl8169_get_ringparam(struct
+@@ -2161,6 +2161,19 @@ static void rtl8169_get_ringparam(struct
  	data->tx_pending = NUM_TX_DESC;
  }
  
@@ -36,7 +36,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static void rtl8169_get_pauseparam(struct net_device *dev,
  				   struct ethtool_pauseparam *data)
  {
-@@ -2188,6 +2201,69 @@ static int rtl8169_set_pauseparam(struct
+@@ -2187,6 +2200,69 @@ static int rtl8169_set_pauseparam(struct
  	return 0;
  }
  
@@ -106,7 +106,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static const struct ethtool_ops rtl8169_ethtool_ops = {
  	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
  				     ETHTOOL_COALESCE_MAX_FRAMES,
-@@ -2209,8 +2285,11 @@ static const struct ethtool_ops rtl8169_
+@@ -2208,8 +2284,11 @@ static const struct ethtool_ops rtl8169_
  	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
  	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
  	.get_ringparam		= rtl8169_get_ringparam,
@@ -118,7 +118,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  };
  
  static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
-@@ -3895,6 +3974,9 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3894,6 +3973,9 @@ static void rtl_hw_start_8125(struct rtl
  		break;
  	}
  
diff --git a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
index 38b5035441..3e495e19de 100644
--- a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
+++ b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
@@ -18,7 +18,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4802,10 +4802,8 @@ static void rtl_task(struct work_struct
+@@ -4801,10 +4801,8 @@ static void rtl_task(struct work_struct
  		container_of(work, struct rtl8169_private, wk.work);
  	int ret;
  
@@ -30,7 +30,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  
  	if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
  		/* if chip isn't accessible, reset bus to revive it */
-@@ -4814,7 +4812,7 @@ static void rtl_task(struct work_struct
+@@ -4813,7 +4811,7 @@ static void rtl_task(struct work_struct
  			if (ret < 0) {
  				netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
  				netif_device_detach(tp->dev);
@@ -39,7 +39,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  			}
  		}
  
-@@ -4833,8 +4831,6 @@ reset:
+@@ -4832,8 +4830,6 @@ reset:
  	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
  		rtl_reset_work(tp);
  	}
diff --git a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
index 4792e371b6..0c0e80c92d 100644
--- a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
+++ b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
@@ -15,7 +15,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1347,40 +1347,19 @@ static void rtl8168ep_stop_cmac(struct r
+@@ -1346,40 +1346,19 @@ static void rtl8168ep_stop_cmac(struct r
  	RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
  }
  
@@ -60,7 +60,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  }
  
  static void rtl8168_driver_start(struct rtl8169_private *tp)
-@@ -1394,7 +1373,8 @@ static void rtl8168_driver_start(struct
+@@ -1393,7 +1372,8 @@ static void rtl8168_driver_start(struct
  static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
  {
  	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
@@ -70,7 +70,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  }
  
  static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
-@@ -1402,7 +1382,8 @@ static void rtl8168ep_driver_stop(struct
+@@ -1401,7 +1381,8 @@ static void rtl8168ep_driver_stop(struct
  	rtl8168ep_stop_cmac(tp);
  	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
  	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
diff --git a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
index 81058e5e9f..687ed445da 100644
--- a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
+++ b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
@@ -29,7 +29,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	RTL_GIGA_MAC_NONE
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -56,6 +56,7 @@
+@@ -55,6 +55,7 @@
  #define FIRMWARE_8107E_2	"rtl_nic/rtl8107e-2.fw"
  #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"
  #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
@@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
  #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
  
-@@ -139,6 +140,7 @@ static const struct {
+@@ -138,6 +139,7 @@ static const struct {
  	[RTL_GIGA_MAC_VER_61] = {"RTL8125A",		FIRMWARE_8125A_3},
  	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
  	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
@@ -45,7 +45,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},
  	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},
  };
-@@ -708,6 +710,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+@@ -707,6 +709,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
  MODULE_FIRMWARE(FIRMWARE_8107E_2);
  MODULE_FIRMWARE(FIRMWARE_8125A_3);
  MODULE_FIRMWARE(FIRMWARE_8125B_2);
@@ -53,7 +53,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  MODULE_FIRMWARE(FIRMWARE_8126A_2);
  MODULE_FIRMWARE(FIRMWARE_8126A_3);
  
-@@ -2080,10 +2083,7 @@ static void rtl_set_eee_txidle_timer(str
+@@ -2079,10 +2082,7 @@ static void rtl_set_eee_txidle_timer(str
  		tp->tx_lpi_timer = timer_val;
  		r8168_mac_ocp_write(tp, 0xe048, timer_val);
  		break;
@@ -65,7 +65,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		tp->tx_lpi_timer = timer_val;
  		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
  		break;
-@@ -2295,6 +2295,9 @@ static enum mac_version rtl8169_get_mac_
+@@ -2294,6 +2294,9 @@ static enum mac_version rtl8169_get_mac_
  		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },
  		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
  
@@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		/* 8125B family. */
  		{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63 },
  
-@@ -2562,9 +2565,7 @@ static void rtl_init_rxcfg(struct rtl816
+@@ -2561,9 +2564,7 @@ static void rtl_init_rxcfg(struct rtl816
  	case RTL_GIGA_MAC_VER_61:
  		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
  		break;
@@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
  			RX_PAUSE_SLOT_ON);
  		break;
-@@ -3876,6 +3877,12 @@ static void rtl_hw_start_8125b(struct rt
+@@ -3875,6 +3876,12 @@ static void rtl_hw_start_8125b(struct rt
  	rtl_hw_start_8125_common(tp);
  }
  
@@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static void rtl_hw_start_8126a(struct rtl8169_private *tp)
  {
  	rtl_set_def_aspm_entry_latency(tp);
-@@ -3924,6 +3931,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3923,6 +3930,7 @@ static void rtl_hw_config(struct rtl8169
  		[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
  		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
  		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
@@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
  		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
  	};
-@@ -3941,6 +3949,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3940,6 +3948,7 @@ static void rtl_hw_start_8125(struct rtl
  	/* disable interrupt coalescing */
  	switch (tp->mac_version) {
  	case RTL_GIGA_MAC_VER_61:
diff --git a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
index 721e51ebf0..2f65f066af 100644
--- a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
+++ b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2227,7 +2227,7 @@ static void rtl8169_get_eth_mac_stats(st
+@@ -2226,7 +2226,7 @@ static void rtl8169_get_eth_mac_stats(st
  		le64_to_cpu(tp->counters->tx_broadcast64);
  	mac_stats->MulticastFramesReceivedOK =
  		le64_to_cpu(tp->counters->rx_multicast64);
diff --git a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
index 8cb79c82cf..c2f6d755a5 100644
--- a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
+++ b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -347,6 +347,8 @@ enum rtl8125_registers {
+@@ -346,6 +346,8 @@ enum rtl8125_registers {
  	TxPoll_8125		= 0x90,
  	LEDSEL3			= 0x96,
  	MAC0_BKP		= 0x19e0,
@@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	EEE_TXIDLE_TIMER_8125	= 0x6048,
  };
  
-@@ -3770,8 +3772,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3769,8 +3771,8 @@ static void rtl_hw_start_8125_common(str
  	rtl_pcie_state_l2l3_disable(tp);
  
  	RTL_W16(tp, 0x382, 0x221b);
diff --git a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
index 20c42955e3..c3e9398901 100644
--- a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
+++ b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
@@ -15,7 +15,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -663,13 +663,9 @@ struct rtl8169_private {
+@@ -662,13 +662,9 @@ struct rtl8169_private {
  		struct work_struct work;
  	} wk;
  
@@ -29,7 +29,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	unsigned supports_gmii:1;
  	unsigned aspm_manageable:1;
  	unsigned dash_enabled:1;
-@@ -723,22 +719,12 @@ static inline struct device *tp_to_dev(s
+@@ -722,22 +718,12 @@ static inline struct device *tp_to_dev(s
  
  static void rtl_lock_config_regs(struct rtl8169_private *tp)
  {
@@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  }
  
  static void rtl_pci_commit(struct rtl8169_private *tp)
-@@ -749,24 +735,18 @@ static void rtl_pci_commit(struct rtl816
+@@ -748,24 +734,18 @@ static void rtl_pci_commit(struct rtl816
  
  static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
  {
@@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  }
  
  static bool rtl_is_8125(struct rtl8169_private *tp)
-@@ -1572,7 +1552,6 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1571,7 +1551,6 @@ static void __rtl8169_set_wol(struct rtl
  		{ WAKE_MAGIC, Config3, MagicPacket }
  	};
  	unsigned int i, tmp = ARRAY_SIZE(cfg);
@@ -87,7 +87,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	u8 options;
  
  	rtl_unlock_config_regs(tp);
-@@ -1591,14 +1570,12 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1590,14 +1569,12 @@ static void __rtl8169_set_wol(struct rtl
  			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
  	}
  
@@ -102,7 +102,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  
  	switch (tp->mac_version) {
  	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-@@ -5498,8 +5475,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5460,8 +5437,6 @@ static int rtl_init_one(struct pci_dev *
  	tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
  	tp->ocp_base = OCP_STD_PHY_BASE;
  
diff --git a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
index 8c88c078f2..e468d637c9 100644
--- a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
+++ b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -749,6 +749,20 @@ static void rtl_mod_config5(struct rtl81
+@@ -748,6 +748,20 @@ static void rtl_mod_config5(struct rtl81
  	RTL_W8(tp, Config5, (val & ~clear) | set);
  }
  
@@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static bool rtl_is_8125(struct rtl8169_private *tp)
  {
  	return tp->mac_version >= RTL_GIGA_MAC_VER_61;
-@@ -1539,58 +1553,37 @@ static void rtl8169_get_wol(struct net_d
+@@ -1538,58 +1552,37 @@ static void rtl8169_get_wol(struct net_d
  
  static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
  {
diff --git a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
index e762617310..aeafebb214 100644
--- a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
+++ b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1432,19 +1432,11 @@ static enum rtl_dash_type rtl_get_dash_t
+@@ -1431,19 +1431,11 @@ static enum rtl_dash_type rtl_get_dash_t
  
  static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
  {
diff --git a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
index de86c2f6cd..26c362dd6c 100644
--- a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
+++ b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1563,6 +1563,9 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1562,6 +1562,9 @@ static void __rtl8169_set_wol(struct rtl
  	}
  
  	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
diff --git a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
index 5bcf06098a..bdeb46eeb8 100644
--- a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
+++ b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2547,86 +2547,31 @@ static void rtl8169_init_ring_indexes(st
+@@ -2546,86 +2546,31 @@ static void rtl8169_init_ring_indexes(st
  	tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
  }
  



From lede-commits at lists.infradead.org  Fri Jan 17 04:22:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 07:22:11 -0500
Subject: [openwrt/openwrt]  generic: backport Realtek PHY patches from
 upstream
In-Reply-To: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
References: <173711653078.2910938.8174984406300664962@git-01.infra.openwrt.org>
Message-ID: <mailman.41996.1737116536.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d7e82c78d7a2a84404198dab8faf8e142939eb05

commit d7e82c78d7a2a84404198dab8faf8e142939eb05
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 09:56:34 2025 +0100

    generic: backport Realtek PHY patches from upstream
    
    Adds patches for the temperature sensor on RTL822x.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 package/kernel/linux/modules/netdevices.mk         |    7 +-
 ...ltek-add-support-for-reading-MDIO_MMD_VEN.patch |   47 +
 ...e-realtek-PHY-driver-to-its-own-subdirect.patch | 3249 ++++++++++++++++++++
 ...ltek-add-hwmon-support-for-temp-sensor-on.patch |  180 ++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch |   22 +-
 ...ek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch |   10 +-
 ...ltek-make-sure-paged-read-is-protected-by.patch |    8 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch |   36 +-
 ...-realtek-detect-early-version-of-RTL8221B.patch |    6 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |   24 +-
 .../500-gsw-rtl8367s-mt7622-support.patch          |    4 +-
 .../patches-6.6/735-net-phy-realtek-rtl8261n.patch |    8 +-
 .../realtek/patches-6.6/720-add-rtl-phy.patch      |    8 +-
 13 files changed, 3543 insertions(+), 66 deletions(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index 98ab7ea408..24a41c6b3f 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -447,9 +447,10 @@ $(eval $(call KernelPackage,phy-micrel))
 define KernelPackage/phy-realtek
    SUBMENU:=$(NETWORK_DEVICES_MENU)
    TITLE:=Realtek Ethernet PHY driver
-   KCONFIG:=CONFIG_REALTEK_PHY
-   DEPENDS:=+kmod-libphy
-   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek.ko
+   KCONFIG:=CONFIG_REALTEK_PHY \
+    CONFIG_REALTEK_PHY_HWMON=y
+   DEPENDS:=+kmod-libphy +kmod-hwmon-core
+   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek/realtek.ko
    AUTOLOAD:=$(call AutoLoad,18,realtek,1)
 endef
 
diff --git a/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
new file mode 100644
index 0000000000..2add672f44
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
@@ -0,0 +1,47 @@
+From 3d483a10327f38595f714f9f9e9dde43a622cb0f Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:49:31 +0100
+Subject: [PATCH] net: phy: realtek: add support for reading MDIO_MMD_VEND2
+ regs on RTL8125/RTL8126
+
+RTL8125/RTL8126 don't support MMD access to the internal PHY, but
+provide a mechanism to access at least all MDIO_MMD_VEND2 registers.
+By exposing this mechanism standard MMD access functions can be used
+to access the MDIO_MMD_VEND2 registers.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/e821b302-5fe6-49ab-aabd-05da500581c0 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/realtek.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -736,7 +736,11 @@ static int rtlgen_read_mmd(struct phy_de
+ {
+ 	int ret;
+ 
+-	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+ 		rtl821x_write_page(phydev, 0xa5c);
+ 		ret = __phy_read(phydev, 0x12);
+ 		rtl821x_write_page(phydev, 0);
+@@ -760,7 +764,11 @@ static int rtlgen_write_mmd(struct phy_d
+ {
+ 	int ret;
+ 
+-	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+ 		rtl821x_write_page(phydev, 0xa5d);
+ 		ret = __phy_write(phydev, 0x10, val);
+ 		rtl821x_write_page(phydev, 0);
diff --git a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
new file mode 100644
index 0000000000..b410ab8a32
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
@@ -0,0 +1,3249 @@
+From 1416a9b2ba710d31954131c06d46f298e340aa2c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:50:19 +0100
+Subject: [PATCH] net: phy: move realtek PHY driver to its own subdirectory
+
+In preparation of adding a source file with hwmon support, move the
+Realtek PHY driver to its own subdirectory and rename realtek.c to
+realtek_main.c.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/c566551b-c915-4e34-9b33-129a6ddd6e4c at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/Kconfig                               | 5 +----
+ drivers/net/phy/Makefile                              | 2 +-
+ drivers/net/phy/realtek/Kconfig                       | 5 +++++
+ drivers/net/phy/realtek/Makefile                      | 3 +++
+ drivers/net/phy/{realtek.c => realtek/realtek_main.c} | 0
+ 5 files changed, 10 insertions(+), 5 deletions(-)
+ create mode 100644 drivers/net/phy/realtek/Kconfig
+ create mode 100644 drivers/net/phy/realtek/Makefile
+ rename drivers/net/phy/{realtek.c => realtek/realtek_main.c} (100%)
+
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -325,10 +325,7 @@ config QSEMI_PHY
+ 	help
+ 	  Currently supports the qs6612
+ 
+-config REALTEK_PHY
+-	tristate "Realtek PHYs"
+-	help
+-	  Supports the Realtek 821x PHY.
++source "drivers/net/phy/realtek/Kconfig"
+ 
+ config RENESAS_PHY
+ 	tristate "Renesas PHYs"
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -83,7 +83,7 @@ obj-$(CONFIG_NXP_CBTX_PHY)	+= nxp-cbtx.o
+ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja11xx.o
+ obj-y				+= qcom/
+ obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
+-obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
++obj-$(CONFIG_REALTEK_PHY)	+= realtek/
+ obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
+ obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
+ obj-$(CONFIG_SMSC_PHY)		+= smsc.o
+--- /dev/null
++++ b/drivers/net/phy/realtek/Kconfig
+@@ -0,0 +1,5 @@
++# SPDX-License-Identifier: GPL-2.0-only
++config REALTEK_PHY
++	tristate "Realtek PHYs"
++	help
++	  Currently supports RTL821x/RTL822x and fast ethernet PHYs
+--- /dev/null
++++ b/drivers/net/phy/realtek/Makefile
+@@ -0,0 +1,3 @@
++# SPDX-License-Identifier: GPL-2.0
++realtek-y			+= realtek_main.o
++obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+--- a/drivers/net/phy/realtek.c
++++ /dev/null
+@@ -1,1590 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0+
+-/* drivers/net/phy/realtek.c
+- *
+- * Driver for Realtek PHYs
+- *
+- * Author: Johnson Leung <r58129 at freescale.com>
+- *
+- * Copyright (c) 2004 Freescale Semiconductor, Inc.
+- */
+-#include <linux/bitops.h>
+-#include <linux/of.h>
+-#include <linux/phy.h>
+-#include <linux/module.h>
+-#include <linux/delay.h>
+-#include <linux/clk.h>
+-
+-#define RTL821x_PHYSR				0x11
+-#define RTL821x_PHYSR_DUPLEX			BIT(13)
+-#define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
+-
+-#define RTL821x_INER				0x12
+-#define RTL8211B_INER_INIT			0x6400
+-#define RTL8211E_INER_LINK_STATUS		BIT(10)
+-#define RTL8211F_INER_LINK_STATUS		BIT(4)
+-
+-#define RTL821x_INSR				0x13
+-
+-#define RTL821x_EXT_PAGE_SELECT			0x1e
+-#define RTL821x_PAGE_SELECT			0x1f
+-
+-#define RTL8211F_PHYCR1				0x18
+-#define RTL8211F_PHYCR2				0x19
+-#define RTL8211F_INSR				0x1d
+-
+-#define RTL8211F_LEDCR				0x10
+-#define RTL8211F_LEDCR_MODE			BIT(15)
+-#define RTL8211F_LEDCR_ACT_TXRX			BIT(4)
+-#define RTL8211F_LEDCR_LINK_1000		BIT(3)
+-#define RTL8211F_LEDCR_LINK_100			BIT(1)
+-#define RTL8211F_LEDCR_LINK_10			BIT(0)
+-#define RTL8211F_LEDCR_MASK			GENMASK(4, 0)
+-#define RTL8211F_LEDCR_SHIFT			5
+-
+-#define RTL8211F_TX_DELAY			BIT(8)
+-#define RTL8211F_RX_DELAY			BIT(3)
+-
+-#define RTL8211F_ALDPS_PLL_OFF			BIT(1)
+-#define RTL8211F_ALDPS_ENABLE			BIT(2)
+-#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)
+-
+-#define RTL8211E_CTRL_DELAY			BIT(13)
+-#define RTL8211E_TX_DELAY			BIT(12)
+-#define RTL8211E_RX_DELAY			BIT(11)
+-
+-#define RTL8211F_CLKOUT_EN			BIT(0)
+-
+-#define RTL8201F_ISR				0x1e
+-#define RTL8201F_ISR_ANERR			BIT(15)
+-#define RTL8201F_ISR_DUPLEX			BIT(13)
+-#define RTL8201F_ISR_LINK			BIT(11)
+-#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \
+-						 RTL8201F_ISR_DUPLEX | \
+-						 RTL8201F_ISR_LINK)
+-#define RTL8201F_IER				0x13
+-
+-#define RTL822X_VND1_SERDES_OPTION			0x697a
+-#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)
+-#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII		0
+-#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX		2
+-
+-#define RTL822X_VND1_SERDES_CTRL3			0x7580
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK		GENMASK(5, 0)
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
+-
+-/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
+- * is set, they cannot be accessed by C45-over-C22.
+- */
+-#define RTL822X_VND2_GBCR				0xa412
+-
+-#define RTL822X_VND2_GANLPAR				0xa414
+-
+-#define RTL8366RB_POWER_SAVE			0x15
+-#define RTL8366RB_POWER_SAVE_ON			BIT(12)
+-
+-#define RTL9000A_GINMR				0x14
+-#define RTL9000A_GINMR_LINK_STATUS		BIT(4)
+-
+-#define RTL_VND2_PHYSR				0xa434
+-#define RTL_VND2_PHYSR_DUPLEX			BIT(3)
+-#define RTL_VND2_PHYSR_SPEEDL			GENMASK(5, 4)
+-#define RTL_VND2_PHYSR_SPEEDH			GENMASK(10, 9)
+-#define RTL_VND2_PHYSR_MASTER			BIT(11)
+-#define RTL_VND2_PHYSR_SPEED_MASK		(RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+-
+-#define RTL_GENERIC_PHYID			0x001cc800
+-#define RTL_8211FVD_PHYID			0x001cc878
+-#define RTL_8221B				0x001cc840
+-#define RTL_8221B_VB_CG				0x001cc849
+-#define RTL_8221B_VN_CG				0x001cc84a
+-#define RTL_8251B				0x001cc862
+-
+-#define RTL8211F_LED_COUNT			3
+-
+-MODULE_DESCRIPTION("Realtek PHY driver");
+-MODULE_AUTHOR("Johnson Leung");
+-MODULE_LICENSE("GPL");
+-
+-struct rtl821x_priv {
+-	u16 phycr1;
+-	u16 phycr2;
+-	bool has_phycr2;
+-	struct clk *clk;
+-};
+-
+-static int rtl821x_read_page(struct phy_device *phydev)
+-{
+-	return __phy_read(phydev, RTL821x_PAGE_SELECT);
+-}
+-
+-static int rtl821x_write_page(struct phy_device *phydev, int page)
+-{
+-	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
+-}
+-
+-static int rtl821x_probe(struct phy_device *phydev)
+-{
+-	struct device *dev = &phydev->mdio.dev;
+-	struct rtl821x_priv *priv;
+-	u32 phy_id = phydev->drv->phy_id;
+-	int ret;
+-
+-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+-	if (!priv)
+-		return -ENOMEM;
+-
+-	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
+-	if (IS_ERR(priv->clk))
+-		return dev_err_probe(dev, PTR_ERR(priv->clk),
+-				     "failed to get phy clock\n");
+-
+-	ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
+-	if (ret < 0)
+-		return ret;
+-
+-	priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF);
+-	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
+-		priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF;
+-
+-	priv->has_phycr2 = !(phy_id == RTL_8211FVD_PHYID);
+-	if (priv->has_phycr2) {
+-		ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2);
+-		if (ret < 0)
+-			return ret;
+-
+-		priv->phycr2 = ret & RTL8211F_CLKOUT_EN;
+-		if (of_property_read_bool(dev->of_node, "realtek,clkout-disable"))
+-			priv->phycr2 &= ~RTL8211F_CLKOUT_EN;
+-	}
+-
+-	phydev->priv = priv;
+-
+-	return 0;
+-}
+-
+-static int rtl8201_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL8201F_ISR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl821x_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL821x_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl8211f_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl8201_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl8201_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = BIT(13) | BIT(12) | BIT(11);
+-		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
+-	} else {
+-		val = 0;
+-		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl8201_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211b_config_intr(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl821x_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		err = phy_write(phydev, RTL821x_INER,
+-				RTL8211B_INER_INIT);
+-	} else {
+-		err = phy_write(phydev, RTL821x_INER, 0);
+-		if (err)
+-			return err;
+-
+-		err = rtl821x_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211e_config_intr(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl821x_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		err = phy_write(phydev, RTL821x_INER,
+-				RTL8211E_INER_LINK_STATUS);
+-	} else {
+-		err = phy_write(phydev, RTL821x_INER, 0);
+-		if (err)
+-			return err;
+-
+-		err = rtl821x_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211f_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl8211f_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = RTL8211F_INER_LINK_STATUS;
+-		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
+-	} else {
+-		val = 0;
+-		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl8211f_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static irqreturn_t rtl8201_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read(phydev, RTL8201F_ISR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8201F_ISR_MASK))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t rtl821x_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status, irq_enabled;
+-
+-	irq_status = phy_read(phydev, RTL821x_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	irq_enabled = phy_read(phydev, RTL821x_INER);
+-	if (irq_enabled < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & irq_enabled))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t rtl8211f_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static int rtl8211_config_aneg(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = genphy_config_aneg(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	/* Quirk was copied from vendor driver. Unfortunately it includes no
+-	 * description of the magic numbers.
+-	 */
+-	if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
+-		phy_write(phydev, 0x17, 0x2138);
+-		phy_write(phydev, 0x0e, 0x0260);
+-	} else {
+-		phy_write(phydev, 0x17, 0x2108);
+-		phy_write(phydev, 0x0e, 0x0000);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl8211c_config_init(struct phy_device *phydev)
+-{
+-	/* RTL8211C has an issue when operating in Gigabit slave mode */
+-	return phy_set_bits(phydev, MII_CTRL1000,
+-			    CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
+-}
+-
+-static int rtl8211f_config_init(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	struct device *dev = &phydev->mdio.dev;
+-	u16 val_txdly, val_rxdly;
+-	int ret;
+-
+-	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
+-				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
+-				       priv->phycr1);
+-	if (ret < 0) {
+-		dev_err(dev, "aldps mode  configuration failed: %pe\n",
+-			ERR_PTR(ret));
+-		return ret;
+-	}
+-
+-	switch (phydev->interface) {
+-	case PHY_INTERFACE_MODE_RGMII:
+-		val_txdly = 0;
+-		val_rxdly = 0;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_RXID:
+-		val_txdly = 0;
+-		val_rxdly = RTL8211F_RX_DELAY;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_TXID:
+-		val_txdly = RTL8211F_TX_DELAY;
+-		val_rxdly = 0;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_ID:
+-		val_txdly = RTL8211F_TX_DELAY;
+-		val_rxdly = RTL8211F_RX_DELAY;
+-		break;
+-
+-	default: /* the rest of the modes imply leaving delay as is. */
+-		return 0;
+-	}
+-
+-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,
+-				       val_txdly);
+-	if (ret < 0) {
+-		dev_err(dev, "Failed to update the TX delay register\n");
+-		return ret;
+-	} else if (ret) {
+-		dev_dbg(dev,
+-			"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
+-			val_txdly ? "Enabling" : "Disabling");
+-	} else {
+-		dev_dbg(dev,
+-			"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
+-			val_txdly ? "enabled" : "disabled");
+-	}
+-
+-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
+-				       val_rxdly);
+-	if (ret < 0) {
+-		dev_err(dev, "Failed to update the RX delay register\n");
+-		return ret;
+-	} else if (ret) {
+-		dev_dbg(dev,
+-			"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
+-			val_rxdly ? "Enabling" : "Disabling");
+-	} else {
+-		dev_dbg(dev,
+-			"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
+-			val_rxdly ? "enabled" : "disabled");
+-	}
+-
+-	if (priv->has_phycr2) {
+-		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+-				       RTL8211F_CLKOUT_EN, priv->phycr2);
+-		if (ret < 0) {
+-			dev_err(dev, "clkout configuration failed: %pe\n",
+-				ERR_PTR(ret));
+-			return ret;
+-		}
+-
+-		return genphy_soft_reset(phydev);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl821x_suspend(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	int ret = 0;
+-
+-	if (!phydev->wol_enabled) {
+-		ret = genphy_suspend(phydev);
+-
+-		if (ret)
+-			return ret;
+-
+-		clk_disable_unprepare(priv->clk);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl821x_resume(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	int ret;
+-
+-	if (!phydev->wol_enabled)
+-		clk_prepare_enable(priv->clk);
+-
+-	ret = genphy_resume(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	msleep(20);
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,
+-					unsigned long rules)
+-{
+-	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |
+-				   BIT(TRIGGER_NETDEV_LINK_100) |
+-				   BIT(TRIGGER_NETDEV_LINK_1000) |
+-				   BIT(TRIGGER_NETDEV_RX) |
+-				   BIT(TRIGGER_NETDEV_TX);
+-
+-	/* The RTL8211F PHY supports these LED settings on up to three LEDs:
+-	 * - Link: Configurable subset of 10/100/1000 link rates
+-	 * - Active: Blink on activity, RX or TX is not differentiated
+-	 * The Active option has two modes, A and B:
+-	 * - A: Link and Active indication at configurable, but matching,
+-	 *      subset of 10/100/1000 link rates
+-	 * - B: Link indication at configurable subset of 10/100/1000 link
+-	 *      rates and Active indication always at all three 10+100+1000
+-	 *      link rates.
+-	 * This code currently uses mode B only.
+-	 */
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	/* Filter out any other unsupported triggers. */
+-	if (rules & ~mask)
+-		return -EOPNOTSUPP;
+-
+-	/* RX and TX are not differentiated, either both are set or not set. */
+-	if (!(rules & BIT(TRIGGER_NETDEV_RX)) ^ !(rules & BIT(TRIGGER_NETDEV_TX)))
+-		return -EOPNOTSUPP;
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,
+-				       unsigned long *rules)
+-{
+-	int val;
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
+-	if (val < 0)
+-		return val;
+-
+-	val >>= RTL8211F_LEDCR_SHIFT * index;
+-	val &= RTL8211F_LEDCR_MASK;
+-
+-	if (val & RTL8211F_LEDCR_LINK_10)
+-		set_bit(TRIGGER_NETDEV_LINK_10, rules);
+-
+-	if (val & RTL8211F_LEDCR_LINK_100)
+-		set_bit(TRIGGER_NETDEV_LINK_100, rules);
+-
+-	if (val & RTL8211F_LEDCR_LINK_1000)
+-		set_bit(TRIGGER_NETDEV_LINK_1000, rules);
+-
+-	if (val & RTL8211F_LEDCR_ACT_TXRX) {
+-		set_bit(TRIGGER_NETDEV_RX, rules);
+-		set_bit(TRIGGER_NETDEV_TX, rules);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,
+-				       unsigned long rules)
+-{
+-	const u16 mask = RTL8211F_LEDCR_MASK << (RTL8211F_LEDCR_SHIFT * index);
+-	u16 reg = 0;
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_10;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_100;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_1000;
+-
+-	if (test_bit(TRIGGER_NETDEV_RX, &rules) ||
+-	    test_bit(TRIGGER_NETDEV_TX, &rules)) {
+-		reg |= RTL8211F_LEDCR_ACT_TXRX;
+-	}
+-
+-	reg <<= RTL8211F_LEDCR_SHIFT * index;
+-	reg |= RTL8211F_LEDCR_MODE;	 /* Mode B */
+-
+-	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);
+-}
+-
+-static int rtl8211e_config_init(struct phy_device *phydev)
+-{
+-	int ret = 0, oldpage;
+-	u16 val;
+-
+-	/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
+-	switch (phydev->interface) {
+-	case PHY_INTERFACE_MODE_RGMII:
+-		val = RTL8211E_CTRL_DELAY | 0;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_ID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_RXID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_TXID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
+-		break;
+-	default: /* the rest of the modes imply leaving delays as is. */
+-		return 0;
+-	}
+-
+-	/* According to a sample driver there is a 0x1c config register on the
+-	 * 0xa4 extension page (0x7) layout. It can be used to disable/enable
+-	 * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
+-	 * The configuration register definition:
+-	 * 14 = reserved
+-	 * 13 = Force Tx RX Delay controlled by bit12 bit11,
+-	 * 12 = RX Delay, 11 = TX Delay
+-	 * 10:0 = Test && debug settings reserved by realtek
+-	 */
+-	oldpage = phy_select_page(phydev, 0x7);
+-	if (oldpage < 0)
+-		goto err_restore_page;
+-
+-	ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4);
+-	if (ret)
+-		goto err_restore_page;
+-
+-	ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
+-			   | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
+-			   val);
+-
+-err_restore_page:
+-	return phy_restore_page(phydev, oldpage, ret);
+-}
+-
+-static int rtl8211b_suspend(struct phy_device *phydev)
+-{
+-	phy_write(phydev, MII_MMD_DATA, BIT(9));
+-
+-	return genphy_suspend(phydev);
+-}
+-
+-static int rtl8211b_resume(struct phy_device *phydev)
+-{
+-	phy_write(phydev, MII_MMD_DATA, 0);
+-
+-	return genphy_resume(phydev);
+-}
+-
+-static int rtl8366rb_config_init(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
+-			   RTL8366RB_POWER_SAVE_ON);
+-	if (ret) {
+-		dev_err(&phydev->mdio.dev,
+-			"error enabling power management\n");
+-	}
+-
+-	return ret;
+-}
+-
+-/* get actual speed to cover the downshift case */
+-static void rtlgen_decode_physr(struct phy_device *phydev, int val)
+-{
+-	/* bit 3
+-	 * 0: Half Duplex
+-	 * 1: Full Duplex
+-	 */
+-	if (val & RTL_VND2_PHYSR_DUPLEX)
+-		phydev->duplex = DUPLEX_FULL;
+-	else
+-		phydev->duplex = DUPLEX_HALF;
+-
+-	switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
+-	case 0x0000:
+-		phydev->speed = SPEED_10;
+-		break;
+-	case 0x0010:
+-		phydev->speed = SPEED_100;
+-		break;
+-	case 0x0020:
+-		phydev->speed = SPEED_1000;
+-		break;
+-	case 0x0200:
+-		phydev->speed = SPEED_10000;
+-		break;
+-	case 0x0210:
+-		phydev->speed = SPEED_2500;
+-		break;
+-	case 0x0220:
+-		phydev->speed = SPEED_5000;
+-		break;
+-	default:
+-		break;
+-	}
+-
+-	/* bit 11
+-	 * 0: Slave Mode
+-	 * 1: Master Mode
+-	 */
+-	if (phydev->speed >= 1000) {
+-		if (val & RTL_VND2_PHYSR_MASTER)
+-			phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
+-		else
+-			phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
+-	} else {
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
+-	}
+-}
+-
+-static int rtlgen_read_status(struct phy_device *phydev)
+-{
+-	int ret, val;
+-
+-	ret = genphy_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (!phydev->link)
+-		return 0;
+-
+-	val = phy_read_paged(phydev, 0xa43, 0x12);
+-	if (val < 0)
+-		return val;
+-
+-	rtlgen_decode_physr(phydev, val);
+-
+-	return 0;
+-}
+-
+-static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+-{
+-	int ret;
+-
+-	if (devnum == MDIO_MMD_VEND2) {
+-		rtl821x_write_page(phydev, regnum >> 4);
+-		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+-		rtl821x_write_page(phydev, 0xa5c);
+-		ret = __phy_read(phydev, 0x12);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_read(phydev, 0x10);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_read(phydev, 0x11);
+-		rtl821x_write_page(phydev, 0);
+-	} else {
+-		ret = -EOPNOTSUPP;
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
+-			    u16 val)
+-{
+-	int ret;
+-
+-	if (devnum == MDIO_MMD_VEND2) {
+-		rtl821x_write_page(phydev, regnum >> 4);
+-		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_write(phydev, 0x10, val);
+-		rtl821x_write_page(phydev, 0);
+-	} else {
+-		ret = -EOPNOTSUPP;
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+-{
+-	int ret = rtlgen_read_mmd(phydev, devnum, regnum);
+-
+-	if (ret != -EOPNOTSUPP)
+-		return ret;
+-
+-	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
+-		rtl821x_write_page(phydev, 0xa6e);
+-		ret = __phy_read(phydev, 0x16);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_read(phydev, 0x12);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_read(phydev, 0x10);
+-		rtl821x_write_page(phydev, 0);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
+-			     u16 val)
+-{
+-	int ret = rtlgen_write_mmd(phydev, devnum, regnum, val);
+-
+-	if (ret != -EOPNOTSUPP)
+-		return ret;
+-
+-	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_write(phydev, 0x12, val);
+-		rtl821x_write_page(phydev, 0);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822xb_config_init(struct phy_device *phydev)
+-{
+-	bool has_2500, has_sgmii;
+-	u16 mode;
+-	int ret;
+-
+-	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
+-			    phydev->host_interfaces) ||
+-		   phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
+-
+-	has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
+-			     phydev->host_interfaces) ||
+-		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
+-
+-	/* fill in possible interfaces */
+-	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+-		     has_2500);
+-	__assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
+-		     has_sgmii);
+-
+-	if (!has_2500 && !has_sgmii)
+-		return 0;
+-
+-	/* determine SerDes option mode */
+-	if (has_2500 && !has_sgmii) {
+-		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
+-		phydev->rate_matching = RATE_MATCH_PAUSE;
+-	} else {
+-		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
+-		phydev->rate_matching = RATE_MATCH_NONE;
+-	}
+-
+-	/* the following sequence with magic numbers sets up the SerDes
+-	 * option mode
+-	 */
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
+-				     RTL822X_VND1_SERDES_OPTION,
+-				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,
+-				     mode);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
+-	if (ret < 0)
+-		return ret;
+-
+-	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+-}
+-
+-static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+-				      phy_interface_t iface)
+-{
+-	int val;
+-
+-	/* Only rate matching at 2500base-x */
+-	if (iface != PHY_INTERFACE_MODE_2500BASEX)
+-		return RATE_MATCH_NONE;
+-
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
+-	if (val < 0)
+-		return val;
+-
+-	if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
+-	    RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
+-		return RATE_MATCH_PAUSE;
+-
+-	/* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
+-	return RATE_MATCH_NONE;
+-}
+-
+-static int rtl822x_get_features(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	val = phy_read_paged(phydev, 0xa61, 0x13);
+-	if (val < 0)
+-		return val;
+-
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_PMA_SPEED_2_5G);
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_PMA_SPEED_5G);
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_SPEED_10G);
+-
+-	return genphy_read_abilities(phydev);
+-}
+-
+-static int rtl822x_config_aneg(struct phy_device *phydev)
+-{
+-	int ret = 0;
+-
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
+-
+-		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+-					       MDIO_AN_10GBT_CTRL_ADV2_5G |
+-					       MDIO_AN_10GBT_CTRL_ADV5G,
+-					       adv);
+-		if (ret < 0)
+-			return ret;
+-	}
+-
+-	return __genphy_config_aneg(phydev, ret);
+-}
+-
+-static void rtl822xb_update_interface(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	if (!phydev->link)
+-		return;
+-
+-	/* Change interface according to serdes mode */
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
+-	if (val < 0)
+-		return;
+-
+-	switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
+-	case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
+-		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+-		break;
+-	case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
+-		phydev->interface = PHY_INTERFACE_MODE_SGMII;
+-		break;
+-	}
+-}
+-
+-static int rtl822x_read_status(struct phy_device *phydev)
+-{
+-	int lpadv, ret;
+-
+-	ret = rtlgen_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-		return 0;
+-	}
+-
+-	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+-	if (lpadv < 0)
+-		return lpadv;
+-
+-	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
+-
+-	return 0;
+-}
+-
+-static int rtl822xb_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = rtl822x_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	rtl822xb_update_interface(phydev);
+-
+-	return 0;
+-}
+-
+-static int rtl822x_c45_get_features(struct phy_device *phydev)
+-{
+-	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+-			 phydev->supported);
+-
+-	return genphy_c45_pma_read_abilities(phydev);
+-}
+-
+-static int rtl822x_c45_config_aneg(struct phy_device *phydev)
+-{
+-	bool changed = false;
+-	int ret, val;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE)
+-		return genphy_c45_pma_setup_forced(phydev);
+-
+-	ret = genphy_c45_an_config_aneg(phydev);
+-	if (ret < 0)
+-		return ret;
+-	if (ret > 0)
+-		changed = true;
+-
+-	val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+-
+-	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
+-				     ADVERTISE_1000FULL, val);
+-	if (ret < 0)
+-		return ret;
+-	if (ret > 0)
+-		changed = true;
+-
+-	return genphy_c45_check_and_restart_aneg(phydev, changed);
+-}
+-
+-static int rtl822x_c45_read_status(struct phy_device *phydev)
+-{
+-	int ret, val;
+-
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+-	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+-				   RTL822X_VND2_GANLPAR);
+-		if (val < 0)
+-			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+-	}
+-
+-	if (!phydev->link)
+-		return 0;
+-
+-	/* Read actual speed from vendor register. */
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
+-	if (val < 0)
+-		return val;
+-
+-	rtlgen_decode_physr(phydev, val);
+-
+-	return 0;
+-}
+-
+-static int rtl822xb_c45_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = rtl822x_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	rtl822xb_update_interface(phydev);
+-
+-	return 0;
+-}
+-
+-static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	phy_write(phydev, RTL821x_PAGE_SELECT, 0xa61);
+-	val = phy_read(phydev, 0x13);
+-	phy_write(phydev, RTL821x_PAGE_SELECT, 0);
+-
+-	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
+-}
+-
+-/* On internal PHY's MMD reads over C22 always return 0.
+- * Check a MMD register which is known to be non-zero.
+- */
+-static bool rtlgen_supports_mmd(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	phy_lock_mdio_bus(phydev);
+-	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
+-	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
+-	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
+-	val = __phy_read(phydev, MII_MMD_DATA);
+-	phy_unlock_mdio_bus(phydev);
+-
+-	return val > 0;
+-}
+-
+-static int rtlgen_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       !rtlgen_supports_2_5gbps(phydev);
+-}
+-
+-static int rtl8226_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       rtlgen_supports_2_5gbps(phydev) &&
+-	       rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+-			       bool is_c45)
+-{
+-	if (phydev->is_c45)
+-		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
+-	else
+-		return !is_c45 && (id == phydev->phy_id);
+-}
+-
+-static int rtl8221b_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
+-}
+-
+-static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
+-}
+-
+-static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
+-}
+-
+-static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+-}
+-
+-static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
+-{
+-	if (phydev->is_c45)
+-		return false;
+-
+-	switch (phydev->phy_id) {
+-	case RTL_GENERIC_PHYID:
+-	case RTL_8221B:
+-	case RTL_8251B:
+-	case 0x001cc841:
+-		break;
+-	default:
+-		return false;
+-	}
+-
+-	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
+-}
+-
+-static int rtlgen_resume(struct phy_device *phydev)
+-{
+-	int ret = genphy_resume(phydev);
+-
+-	/* Internal PHY's from RTL8168h up may not be instantly ready */
+-	msleep(20);
+-
+-	return ret;
+-}
+-
+-static int rtlgen_c45_resume(struct phy_device *phydev)
+-{
+-	int ret = genphy_c45_pma_resume(phydev);
+-
+-	msleep(20);
+-
+-	return ret;
+-}
+-
+-static int rtl9000a_config_init(struct phy_device *phydev)
+-{
+-	phydev->autoneg = AUTONEG_DISABLE;
+-	phydev->speed = SPEED_100;
+-	phydev->duplex = DUPLEX_FULL;
+-
+-	return 0;
+-}
+-
+-static int rtl9000a_config_aneg(struct phy_device *phydev)
+-{
+-	int ret;
+-	u16 ctl = 0;
+-
+-	switch (phydev->master_slave_set) {
+-	case MASTER_SLAVE_CFG_MASTER_FORCE:
+-		ctl |= CTL1000_AS_MASTER;
+-		break;
+-	case MASTER_SLAVE_CFG_SLAVE_FORCE:
+-		break;
+-	case MASTER_SLAVE_CFG_UNKNOWN:
+-	case MASTER_SLAVE_CFG_UNSUPPORTED:
+-		return 0;
+-	default:
+-		phydev_warn(phydev, "Unsupported Master/Slave mode\n");
+-		return -EOPNOTSUPP;
+-	}
+-
+-	ret = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
+-	if (ret == 1)
+-		ret = genphy_soft_reset(phydev);
+-
+-	return ret;
+-}
+-
+-static int rtl9000a_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
+-	phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+-
+-	ret = genphy_update_link(phydev);
+-	if (ret)
+-		return ret;
+-
+-	ret = phy_read(phydev, MII_CTRL1000);
+-	if (ret < 0)
+-		return ret;
+-	if (ret & CTL1000_AS_MASTER)
+-		phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE;
+-	else
+-		phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE;
+-
+-	ret = phy_read(phydev, MII_STAT1000);
+-	if (ret < 0)
+-		return ret;
+-	if (ret & LPA_1000MSRES)
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
+-	else
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
+-
+-	return 0;
+-}
+-
+-static int rtl9000a_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL8211F_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl9000a_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl9000a_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = (u16)~RTL9000A_GINMR_LINK_STATUS;
+-		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-	} else {
+-		val = ~0;
+-		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl9000a_ack_interrupt(phydev);
+-	}
+-
+-	return phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-}
+-
+-static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read(phydev, RTL8211F_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static struct phy_driver realtek_drvs[] = {
+-	{
+-		PHY_ID_MATCH_EXACT(0x00008201),
+-		.name           = "RTL8201CP Ethernet",
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc816),
+-		.name		= "RTL8201F Fast Ethernet",
+-		.config_intr	= &rtl8201_config_intr,
+-		.handle_interrupt = rtl8201_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_MODEL(0x001cc880),
+-		.name		= "RTL8208 Fast Ethernet",
+-		.read_mmd	= genphy_read_mmd_unsupported,
+-		.write_mmd	= genphy_write_mmd_unsupported,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc910),
+-		.name		= "RTL8211 Gigabit Ethernet",
+-		.config_aneg	= rtl8211_config_aneg,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc912),
+-		.name		= "RTL8211B Gigabit Ethernet",
+-		.config_intr	= &rtl8211b_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.suspend	= rtl8211b_suspend,
+-		.resume		= rtl8211b_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc913),
+-		.name		= "RTL8211C Gigabit Ethernet",
+-		.config_init	= rtl8211c_config_init,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc914),
+-		.name		= "RTL8211DN Gigabit Ethernet",
+-		.config_intr	= rtl8211e_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc915),
+-		.name		= "RTL8211E Gigabit Ethernet",
+-		.config_init	= &rtl8211e_config_init,
+-		.config_intr	= &rtl8211e_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc916),
+-		.name		= "RTL8211F Gigabit Ethernet",
+-		.probe		= rtl821x_probe,
+-		.config_init	= &rtl8211f_config_init,
+-		.read_status	= rtlgen_read_status,
+-		.config_intr	= &rtl8211f_config_intr,
+-		.handle_interrupt = rtl8211f_handle_interrupt,
+-		.suspend	= rtl821x_suspend,
+-		.resume		= rtl821x_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.flags		= PHY_ALWAYS_CALL_SUSPEND,
+-		.led_hw_is_supported = rtl8211f_led_hw_is_supported,
+-		.led_hw_control_get = rtl8211f_led_hw_control_get,
+-		.led_hw_control_set = rtl8211f_led_hw_control_set,
+-	}, {
+-		PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID),
+-		.name		= "RTL8211F-VD Gigabit Ethernet",
+-		.probe		= rtl821x_probe,
+-		.config_init	= &rtl8211f_config_init,
+-		.read_status	= rtlgen_read_status,
+-		.config_intr	= &rtl8211f_config_intr,
+-		.handle_interrupt = rtl8211f_handle_interrupt,
+-		.suspend	= rtl821x_suspend,
+-		.resume		= rtl821x_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.flags		= PHY_ALWAYS_CALL_SUSPEND,
+-	}, {
+-		.name		= "Generic FE-GE Realtek PHY",
+-		.match_phy_device = rtlgen_match_phy_device,
+-		.read_status	= rtlgen_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtlgen_read_mmd,
+-		.write_mmd	= rtlgen_write_mmd,
+-	}, {
+-		.name		= "RTL8226 2.5Gbps PHY",
+-		.match_phy_device = rtl8226_match_phy_device,
+-		.get_features	= rtl822x_get_features,
+-		.config_aneg	= rtl822x_config_aneg,
+-		.read_status	= rtl822x_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_match_phy_device,
+-		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
+-		.get_features	= rtl822x_get_features,
+-		.config_aneg	= rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status	= rtl822xb_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc838),
+-		.name           = "RTL8226-CG 2.5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc848),
+-		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822xb_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+-		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+-		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822xb_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		.match_phy_device = rtl8251b_c45_match_phy_device,
+-		.name           = "RTL8251B 5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl_internal_nbaset_match_phy_device,
+-		.name           = "Realtek Internal NBASE-T PHY",
+-		.flags		= PHY_IS_INTERNAL,
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001ccad0),
+-		.name		= "RTL8224 2.5Gbps PHY",
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822x_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc961),
+-		.name		= "RTL8366RB Gigabit Ethernet",
+-		.config_init	= &rtl8366rb_config_init,
+-		/* These interrupts are handled by the irq controller
+-		 * embedded inside the RTL8366RB, they get unmasked when the
+-		 * irq is requested and ACKed by reading the status register,
+-		 * which is done by the irqchip code.
+-		 */
+-		.config_intr	= genphy_no_config_intr,
+-		.handle_interrupt = genphy_handle_interrupt_no_ack,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001ccb00),
+-		.name		= "RTL9000AA_RTL9000AN Ethernet",
+-		.features       = PHY_BASIC_T1_FEATURES,
+-		.config_init	= rtl9000a_config_init,
+-		.config_aneg	= rtl9000a_config_aneg,
+-		.read_status	= rtl9000a_read_status,
+-		.config_intr	= rtl9000a_config_intr,
+-		.handle_interrupt = rtl9000a_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc942),
+-		.name		= "RTL8365MB-VC Gigabit Ethernet",
+-		/* Interrupt handling analogous to RTL8366RB */
+-		.config_intr	= genphy_no_config_intr,
+-		.handle_interrupt = genphy_handle_interrupt_no_ack,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc960),
+-		.name		= "RTL8366S Gigabit Ethernet",
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_mmd	= genphy_read_mmd_unsupported,
+-		.write_mmd	= genphy_write_mmd_unsupported,
+-	},
+-};
+-
+-module_phy_driver(realtek_drvs);
+-
+-static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
+-	{ PHY_ID_MATCH_VENDOR(0x001cc800) },
+-	{ }
+-};
+-
+-MODULE_DEVICE_TABLE(mdio, realtek_tbl);
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -0,0 +1,1590 @@
++// SPDX-License-Identifier: GPL-2.0+
++/* drivers/net/phy/realtek.c
++ *
++ * Driver for Realtek PHYs
++ *
++ * Author: Johnson Leung <r58129 at freescale.com>
++ *
++ * Copyright (c) 2004 Freescale Semiconductor, Inc.
++ */
++#include <linux/bitops.h>
++#include <linux/of.h>
++#include <linux/phy.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/clk.h>
++
++#define RTL821x_PHYSR				0x11
++#define RTL821x_PHYSR_DUPLEX			BIT(13)
++#define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
++
++#define RTL821x_INER				0x12
++#define RTL8211B_INER_INIT			0x6400
++#define RTL8211E_INER_LINK_STATUS		BIT(10)
++#define RTL8211F_INER_LINK_STATUS		BIT(4)
++
++#define RTL821x_INSR				0x13
++
++#define RTL821x_EXT_PAGE_SELECT			0x1e
++#define RTL821x_PAGE_SELECT			0x1f
++
++#define RTL8211F_PHYCR1				0x18
++#define RTL8211F_PHYCR2				0x19
++#define RTL8211F_INSR				0x1d
++
++#define RTL8211F_LEDCR				0x10
++#define RTL8211F_LEDCR_MODE			BIT(15)
++#define RTL8211F_LEDCR_ACT_TXRX			BIT(4)
++#define RTL8211F_LEDCR_LINK_1000		BIT(3)
++#define RTL8211F_LEDCR_LINK_100			BIT(1)
++#define RTL8211F_LEDCR_LINK_10			BIT(0)
++#define RTL8211F_LEDCR_MASK			GENMASK(4, 0)
++#define RTL8211F_LEDCR_SHIFT			5
++
++#define RTL8211F_TX_DELAY			BIT(8)
++#define RTL8211F_RX_DELAY			BIT(3)
++
++#define RTL8211F_ALDPS_PLL_OFF			BIT(1)
++#define RTL8211F_ALDPS_ENABLE			BIT(2)
++#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)
++
++#define RTL8211E_CTRL_DELAY			BIT(13)
++#define RTL8211E_TX_DELAY			BIT(12)
++#define RTL8211E_RX_DELAY			BIT(11)
++
++#define RTL8211F_CLKOUT_EN			BIT(0)
++
++#define RTL8201F_ISR				0x1e
++#define RTL8201F_ISR_ANERR			BIT(15)
++#define RTL8201F_ISR_DUPLEX			BIT(13)
++#define RTL8201F_ISR_LINK			BIT(11)
++#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \
++						 RTL8201F_ISR_DUPLEX | \
++						 RTL8201F_ISR_LINK)
++#define RTL8201F_IER				0x13
++
++#define RTL822X_VND1_SERDES_OPTION			0x697a
++#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII		0
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX		2
++
++#define RTL822X_VND1_SERDES_CTRL3			0x7580
++#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
++#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
++
++/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
++ * is set, they cannot be accessed by C45-over-C22.
++ */
++#define RTL822X_VND2_GBCR				0xa412
++
++#define RTL822X_VND2_GANLPAR				0xa414
++
++#define RTL8366RB_POWER_SAVE			0x15
++#define RTL8366RB_POWER_SAVE_ON			BIT(12)
++
++#define RTL9000A_GINMR				0x14
++#define RTL9000A_GINMR_LINK_STATUS		BIT(4)
++
++#define RTL_VND2_PHYSR				0xa434
++#define RTL_VND2_PHYSR_DUPLEX			BIT(3)
++#define RTL_VND2_PHYSR_SPEEDL			GENMASK(5, 4)
++#define RTL_VND2_PHYSR_SPEEDH			GENMASK(10, 9)
++#define RTL_VND2_PHYSR_MASTER			BIT(11)
++#define RTL_VND2_PHYSR_SPEED_MASK		(RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
++
++#define RTL_GENERIC_PHYID			0x001cc800
++#define RTL_8211FVD_PHYID			0x001cc878
++#define RTL_8221B				0x001cc840
++#define RTL_8221B_VB_CG				0x001cc849
++#define RTL_8221B_VN_CG				0x001cc84a
++#define RTL_8251B				0x001cc862
++
++#define RTL8211F_LED_COUNT			3
++
++MODULE_DESCRIPTION("Realtek PHY driver");
++MODULE_AUTHOR("Johnson Leung");
++MODULE_LICENSE("GPL");
++
++struct rtl821x_priv {
++	u16 phycr1;
++	u16 phycr2;
++	bool has_phycr2;
++	struct clk *clk;
++};
++
++static int rtl821x_read_page(struct phy_device *phydev)
++{
++	return __phy_read(phydev, RTL821x_PAGE_SELECT);
++}
++
++static int rtl821x_write_page(struct phy_device *phydev, int page)
++{
++	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
++}
++
++static int rtl821x_probe(struct phy_device *phydev)
++{
++	struct device *dev = &phydev->mdio.dev;
++	struct rtl821x_priv *priv;
++	u32 phy_id = phydev->drv->phy_id;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
++	if (IS_ERR(priv->clk))
++		return dev_err_probe(dev, PTR_ERR(priv->clk),
++				     "failed to get phy clock\n");
++
++	ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
++	if (ret < 0)
++		return ret;
++
++	priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF);
++	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
++		priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF;
++
++	priv->has_phycr2 = !(phy_id == RTL_8211FVD_PHYID);
++	if (priv->has_phycr2) {
++		ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2);
++		if (ret < 0)
++			return ret;
++
++		priv->phycr2 = ret & RTL8211F_CLKOUT_EN;
++		if (of_property_read_bool(dev->of_node, "realtek,clkout-disable"))
++			priv->phycr2 &= ~RTL8211F_CLKOUT_EN;
++	}
++
++	phydev->priv = priv;
++
++	return 0;
++}
++
++static int rtl8201_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL8201F_ISR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl821x_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL821x_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl8211f_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl8201_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl8201_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = BIT(13) | BIT(12) | BIT(11);
++		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
++	} else {
++		val = 0;
++		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
++		if (err)
++			return err;
++
++		err = rtl8201_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211b_config_intr(struct phy_device *phydev)
++{
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl821x_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		err = phy_write(phydev, RTL821x_INER,
++				RTL8211B_INER_INIT);
++	} else {
++		err = phy_write(phydev, RTL821x_INER, 0);
++		if (err)
++			return err;
++
++		err = rtl821x_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211e_config_intr(struct phy_device *phydev)
++{
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl821x_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		err = phy_write(phydev, RTL821x_INER,
++				RTL8211E_INER_LINK_STATUS);
++	} else {
++		err = phy_write(phydev, RTL821x_INER, 0);
++		if (err)
++			return err;
++
++		err = rtl821x_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211f_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl8211f_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = RTL8211F_INER_LINK_STATUS;
++		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
++	} else {
++		val = 0;
++		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
++		if (err)
++			return err;
++
++		err = rtl8211f_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static irqreturn_t rtl8201_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read(phydev, RTL8201F_ISR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8201F_ISR_MASK))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t rtl821x_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status, irq_enabled;
++
++	irq_status = phy_read(phydev, RTL821x_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	irq_enabled = phy_read(phydev, RTL821x_INER);
++	if (irq_enabled < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & irq_enabled))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t rtl8211f_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static int rtl8211_config_aneg(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = genphy_config_aneg(phydev);
++	if (ret < 0)
++		return ret;
++
++	/* Quirk was copied from vendor driver. Unfortunately it includes no
++	 * description of the magic numbers.
++	 */
++	if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
++		phy_write(phydev, 0x17, 0x2138);
++		phy_write(phydev, 0x0e, 0x0260);
++	} else {
++		phy_write(phydev, 0x17, 0x2108);
++		phy_write(phydev, 0x0e, 0x0000);
++	}
++
++	return 0;
++}
++
++static int rtl8211c_config_init(struct phy_device *phydev)
++{
++	/* RTL8211C has an issue when operating in Gigabit slave mode */
++	return phy_set_bits(phydev, MII_CTRL1000,
++			    CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
++}
++
++static int rtl8211f_config_init(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	struct device *dev = &phydev->mdio.dev;
++	u16 val_txdly, val_rxdly;
++	int ret;
++
++	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
++				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
++				       priv->phycr1);
++	if (ret < 0) {
++		dev_err(dev, "aldps mode  configuration failed: %pe\n",
++			ERR_PTR(ret));
++		return ret;
++	}
++
++	switch (phydev->interface) {
++	case PHY_INTERFACE_MODE_RGMII:
++		val_txdly = 0;
++		val_rxdly = 0;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_RXID:
++		val_txdly = 0;
++		val_rxdly = RTL8211F_RX_DELAY;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_TXID:
++		val_txdly = RTL8211F_TX_DELAY;
++		val_rxdly = 0;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_ID:
++		val_txdly = RTL8211F_TX_DELAY;
++		val_rxdly = RTL8211F_RX_DELAY;
++		break;
++
++	default: /* the rest of the modes imply leaving delay as is. */
++		return 0;
++	}
++
++	ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,
++				       val_txdly);
++	if (ret < 0) {
++		dev_err(dev, "Failed to update the TX delay register\n");
++		return ret;
++	} else if (ret) {
++		dev_dbg(dev,
++			"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
++			val_txdly ? "Enabling" : "Disabling");
++	} else {
++		dev_dbg(dev,
++			"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
++			val_txdly ? "enabled" : "disabled");
++	}
++
++	ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
++				       val_rxdly);
++	if (ret < 0) {
++		dev_err(dev, "Failed to update the RX delay register\n");
++		return ret;
++	} else if (ret) {
++		dev_dbg(dev,
++			"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
++			val_rxdly ? "Enabling" : "Disabling");
++	} else {
++		dev_dbg(dev,
++			"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
++			val_rxdly ? "enabled" : "disabled");
++	}
++
++	if (priv->has_phycr2) {
++		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
++				       RTL8211F_CLKOUT_EN, priv->phycr2);
++		if (ret < 0) {
++			dev_err(dev, "clkout configuration failed: %pe\n",
++				ERR_PTR(ret));
++			return ret;
++		}
++
++		return genphy_soft_reset(phydev);
++	}
++
++	return 0;
++}
++
++static int rtl821x_suspend(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	int ret = 0;
++
++	if (!phydev->wol_enabled) {
++		ret = genphy_suspend(phydev);
++
++		if (ret)
++			return ret;
++
++		clk_disable_unprepare(priv->clk);
++	}
++
++	return ret;
++}
++
++static int rtl821x_resume(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	int ret;
++
++	if (!phydev->wol_enabled)
++		clk_prepare_enable(priv->clk);
++
++	ret = genphy_resume(phydev);
++	if (ret < 0)
++		return ret;
++
++	msleep(20);
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,
++					unsigned long rules)
++{
++	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |
++				   BIT(TRIGGER_NETDEV_LINK_100) |
++				   BIT(TRIGGER_NETDEV_LINK_1000) |
++				   BIT(TRIGGER_NETDEV_RX) |
++				   BIT(TRIGGER_NETDEV_TX);
++
++	/* The RTL8211F PHY supports these LED settings on up to three LEDs:
++	 * - Link: Configurable subset of 10/100/1000 link rates
++	 * - Active: Blink on activity, RX or TX is not differentiated
++	 * The Active option has two modes, A and B:
++	 * - A: Link and Active indication at configurable, but matching,
++	 *      subset of 10/100/1000 link rates
++	 * - B: Link indication at configurable subset of 10/100/1000 link
++	 *      rates and Active indication always at all three 10+100+1000
++	 *      link rates.
++	 * This code currently uses mode B only.
++	 */
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	/* Filter out any other unsupported triggers. */
++	if (rules & ~mask)
++		return -EOPNOTSUPP;
++
++	/* RX and TX are not differentiated, either both are set or not set. */
++	if (!(rules & BIT(TRIGGER_NETDEV_RX)) ^ !(rules & BIT(TRIGGER_NETDEV_TX)))
++		return -EOPNOTSUPP;
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,
++				       unsigned long *rules)
++{
++	int val;
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
++	if (val < 0)
++		return val;
++
++	val >>= RTL8211F_LEDCR_SHIFT * index;
++	val &= RTL8211F_LEDCR_MASK;
++
++	if (val & RTL8211F_LEDCR_LINK_10)
++		set_bit(TRIGGER_NETDEV_LINK_10, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_100)
++		set_bit(TRIGGER_NETDEV_LINK_100, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_1000)
++		set_bit(TRIGGER_NETDEV_LINK_1000, rules);
++
++	if (val & RTL8211F_LEDCR_ACT_TXRX) {
++		set_bit(TRIGGER_NETDEV_RX, rules);
++		set_bit(TRIGGER_NETDEV_TX, rules);
++	}
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,
++				       unsigned long rules)
++{
++	const u16 mask = RTL8211F_LEDCR_MASK << (RTL8211F_LEDCR_SHIFT * index);
++	u16 reg = 0;
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
++		reg |= RTL8211F_LEDCR_LINK_10;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
++		reg |= RTL8211F_LEDCR_LINK_100;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
++		reg |= RTL8211F_LEDCR_LINK_1000;
++
++	if (test_bit(TRIGGER_NETDEV_RX, &rules) ||
++	    test_bit(TRIGGER_NETDEV_TX, &rules)) {
++		reg |= RTL8211F_LEDCR_ACT_TXRX;
++	}
++
++	reg <<= RTL8211F_LEDCR_SHIFT * index;
++	reg |= RTL8211F_LEDCR_MODE;	 /* Mode B */
++
++	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);
++}
++
++static int rtl8211e_config_init(struct phy_device *phydev)
++{
++	int ret = 0, oldpage;
++	u16 val;
++
++	/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
++	switch (phydev->interface) {
++	case PHY_INTERFACE_MODE_RGMII:
++		val = RTL8211E_CTRL_DELAY | 0;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_ID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_RXID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_TXID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
++		break;
++	default: /* the rest of the modes imply leaving delays as is. */
++		return 0;
++	}
++
++	/* According to a sample driver there is a 0x1c config register on the
++	 * 0xa4 extension page (0x7) layout. It can be used to disable/enable
++	 * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
++	 * The configuration register definition:
++	 * 14 = reserved
++	 * 13 = Force Tx RX Delay controlled by bit12 bit11,
++	 * 12 = RX Delay, 11 = TX Delay
++	 * 10:0 = Test && debug settings reserved by realtek
++	 */
++	oldpage = phy_select_page(phydev, 0x7);
++	if (oldpage < 0)
++		goto err_restore_page;
++
++	ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4);
++	if (ret)
++		goto err_restore_page;
++
++	ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
++			   | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
++			   val);
++
++err_restore_page:
++	return phy_restore_page(phydev, oldpage, ret);
++}
++
++static int rtl8211b_suspend(struct phy_device *phydev)
++{
++	phy_write(phydev, MII_MMD_DATA, BIT(9));
++
++	return genphy_suspend(phydev);
++}
++
++static int rtl8211b_resume(struct phy_device *phydev)
++{
++	phy_write(phydev, MII_MMD_DATA, 0);
++
++	return genphy_resume(phydev);
++}
++
++static int rtl8366rb_config_init(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
++			   RTL8366RB_POWER_SAVE_ON);
++	if (ret) {
++		dev_err(&phydev->mdio.dev,
++			"error enabling power management\n");
++	}
++
++	return ret;
++}
++
++/* get actual speed to cover the downshift case */
++static void rtlgen_decode_physr(struct phy_device *phydev, int val)
++{
++	/* bit 3
++	 * 0: Half Duplex
++	 * 1: Full Duplex
++	 */
++	if (val & RTL_VND2_PHYSR_DUPLEX)
++		phydev->duplex = DUPLEX_FULL;
++	else
++		phydev->duplex = DUPLEX_HALF;
++
++	switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
++	case 0x0000:
++		phydev->speed = SPEED_10;
++		break;
++	case 0x0010:
++		phydev->speed = SPEED_100;
++		break;
++	case 0x0020:
++		phydev->speed = SPEED_1000;
++		break;
++	case 0x0200:
++		phydev->speed = SPEED_10000;
++		break;
++	case 0x0210:
++		phydev->speed = SPEED_2500;
++		break;
++	case 0x0220:
++		phydev->speed = SPEED_5000;
++		break;
++	default:
++		break;
++	}
++
++	/* bit 11
++	 * 0: Slave Mode
++	 * 1: Master Mode
++	 */
++	if (phydev->speed >= 1000) {
++		if (val & RTL_VND2_PHYSR_MASTER)
++			phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
++		else
++			phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
++	} else {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
++	}
++}
++
++static int rtlgen_read_status(struct phy_device *phydev)
++{
++	int ret, val;
++
++	ret = genphy_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (!phydev->link)
++		return 0;
++
++	val = phy_read_paged(phydev, 0xa43, 0x12);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_physr(phydev, val);
++
++	return 0;
++}
++
++static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
++{
++	int ret;
++
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
++		rtl821x_write_page(phydev, 0xa5c);
++		ret = __phy_read(phydev, 0x12);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_read(phydev, 0x10);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_read(phydev, 0x11);
++		rtl821x_write_page(phydev, 0);
++	} else {
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
++			    u16 val)
++{
++	int ret;
++
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_write(phydev, 0x10, val);
++		rtl821x_write_page(phydev, 0);
++	} else {
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
++{
++	int ret = rtlgen_read_mmd(phydev, devnum, regnum);
++
++	if (ret != -EOPNOTSUPP)
++		return ret;
++
++	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
++		rtl821x_write_page(phydev, 0xa6e);
++		ret = __phy_read(phydev, 0x16);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_read(phydev, 0x12);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_read(phydev, 0x10);
++		rtl821x_write_page(phydev, 0);
++	}
++
++	return ret;
++}
++
++static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
++			     u16 val)
++{
++	int ret = rtlgen_write_mmd(phydev, devnum, regnum, val);
++
++	if (ret != -EOPNOTSUPP)
++		return ret;
++
++	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_write(phydev, 0x12, val);
++		rtl821x_write_page(phydev, 0);
++	}
++
++	return ret;
++}
++
++static int rtl822xb_config_init(struct phy_device *phydev)
++{
++	bool has_2500, has_sgmii;
++	u16 mode;
++	int ret;
++
++	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
++			    phydev->host_interfaces) ||
++		   phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
++
++	has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
++			     phydev->host_interfaces) ||
++		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
++
++	/* fill in possible interfaces */
++	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
++		     has_2500);
++	__assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
++		     has_sgmii);
++
++	if (!has_2500 && !has_sgmii)
++		return 0;
++
++	/* determine SerDes option mode */
++	if (has_2500 && !has_sgmii) {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
++		phydev->rate_matching = RATE_MATCH_PAUSE;
++	} else {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
++		phydev->rate_matching = RATE_MATCH_NONE;
++	}
++
++	/* the following sequence with magic numbers sets up the SerDes
++	 * option mode
++	 */
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
++				     RTL822X_VND1_SERDES_OPTION,
++				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,
++				     mode);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
++	if (ret < 0)
++		return ret;
++
++	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
++}
++
++static int rtl822xb_get_rate_matching(struct phy_device *phydev,
++				      phy_interface_t iface)
++{
++	int val;
++
++	/* Only rate matching at 2500base-x */
++	if (iface != PHY_INTERFACE_MODE_2500BASEX)
++		return RATE_MATCH_NONE;
++
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
++	if (val < 0)
++		return val;
++
++	if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
++	    RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
++		return RATE_MATCH_PAUSE;
++
++	/* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
++	return RATE_MATCH_NONE;
++}
++
++static int rtl822x_get_features(struct phy_device *phydev)
++{
++	int val;
++
++	val = phy_read_paged(phydev, 0xa61, 0x13);
++	if (val < 0)
++		return val;
++
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
++			 phydev->supported, val & MDIO_PMA_SPEED_2_5G);
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
++			 phydev->supported, val & MDIO_PMA_SPEED_5G);
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
++			 phydev->supported, val & MDIO_SPEED_10G);
++
++	return genphy_read_abilities(phydev);
++}
++
++static int rtl822x_config_aneg(struct phy_device *phydev)
++{
++	int ret = 0;
++
++	if (phydev->autoneg == AUTONEG_ENABLE) {
++		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
++
++		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
++					       MDIO_AN_10GBT_CTRL_ADV2_5G |
++					       MDIO_AN_10GBT_CTRL_ADV5G,
++					       adv);
++		if (ret < 0)
++			return ret;
++	}
++
++	return __genphy_config_aneg(phydev, ret);
++}
++
++static void rtl822xb_update_interface(struct phy_device *phydev)
++{
++	int val;
++
++	if (!phydev->link)
++		return;
++
++	/* Change interface according to serdes mode */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
++	if (val < 0)
++		return;
++
++	switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
++	case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
++		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
++		break;
++	case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
++		phydev->interface = PHY_INTERFACE_MODE_SGMII;
++		break;
++	}
++}
++
++static int rtl822x_read_status(struct phy_device *phydev)
++{
++	int lpadv, ret;
++
++	ret = rtlgen_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (phydev->autoneg == AUTONEG_DISABLE ||
++	    !phydev->autoneg_complete) {
++		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++		return 0;
++	}
++
++	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
++	if (lpadv < 0)
++		return lpadv;
++
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
++
++	return 0;
++}
++
++static int rtl822xb_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
++static int rtl822x_c45_get_features(struct phy_device *phydev)
++{
++	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
++			 phydev->supported);
++
++	return genphy_c45_pma_read_abilities(phydev);
++}
++
++static int rtl822x_c45_config_aneg(struct phy_device *phydev)
++{
++	bool changed = false;
++	int ret, val;
++
++	if (phydev->autoneg == AUTONEG_DISABLE)
++		return genphy_c45_pma_setup_forced(phydev);
++
++	ret = genphy_c45_an_config_aneg(phydev);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
++				     ADVERTISE_1000FULL, val);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	return genphy_c45_check_and_restart_aneg(phydev, changed);
++}
++
++static int rtl822x_c45_read_status(struct phy_device *phydev)
++{
++	int ret, val;
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (phydev->autoneg == AUTONEG_DISABLE ||
++	    !genphy_c45_aneg_done(phydev))
++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	if (phydev->autoneg == AUTONEG_ENABLE) {
++		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
++				   RTL822X_VND2_GANLPAR);
++		if (val < 0)
++			return val;
++
++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	}
++
++	if (!phydev->link)
++		return 0;
++
++	/* Read actual speed from vendor register. */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_physr(phydev, val);
++
++	return 0;
++}
++
++static int rtl822xb_c45_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
++static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
++{
++	int val;
++
++	phy_write(phydev, RTL821x_PAGE_SELECT, 0xa61);
++	val = phy_read(phydev, 0x13);
++	phy_write(phydev, RTL821x_PAGE_SELECT, 0);
++
++	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
++}
++
++/* On internal PHY's MMD reads over C22 always return 0.
++ * Check a MMD register which is known to be non-zero.
++ */
++static bool rtlgen_supports_mmd(struct phy_device *phydev)
++{
++	int val;
++
++	phy_lock_mdio_bus(phydev);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
++	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
++	val = __phy_read(phydev, MII_MMD_DATA);
++	phy_unlock_mdio_bus(phydev);
++
++	return val > 0;
++}
++
++static int rtlgen_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_GENERIC_PHYID &&
++	       !rtlgen_supports_2_5gbps(phydev);
++}
++
++static int rtl8226_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_GENERIC_PHYID &&
++	       rtlgen_supports_2_5gbps(phydev) &&
++	       rtlgen_supports_mmd(phydev);
++}
++
++static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
++			       bool is_c45)
++{
++	if (phydev->is_c45)
++		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
++	else
++		return !is_c45 && (id == phydev->phy_id);
++}
++
++static int rtl8221b_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
++}
++
++static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
++}
++
++static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
++}
++
++static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
++}
++
++static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
++}
++
++static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
++{
++	if (phydev->is_c45)
++		return false;
++
++	switch (phydev->phy_id) {
++	case RTL_GENERIC_PHYID:
++	case RTL_8221B:
++	case RTL_8251B:
++	case 0x001cc841:
++		break;
++	default:
++		return false;
++	}
++
++	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
++}
++
++static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
++}
++
++static int rtlgen_resume(struct phy_device *phydev)
++{
++	int ret = genphy_resume(phydev);
++
++	/* Internal PHY's from RTL8168h up may not be instantly ready */
++	msleep(20);
++
++	return ret;
++}
++
++static int rtlgen_c45_resume(struct phy_device *phydev)
++{
++	int ret = genphy_c45_pma_resume(phydev);
++
++	msleep(20);
++
++	return ret;
++}
++
++static int rtl9000a_config_init(struct phy_device *phydev)
++{
++	phydev->autoneg = AUTONEG_DISABLE;
++	phydev->speed = SPEED_100;
++	phydev->duplex = DUPLEX_FULL;
++
++	return 0;
++}
++
++static int rtl9000a_config_aneg(struct phy_device *phydev)
++{
++	int ret;
++	u16 ctl = 0;
++
++	switch (phydev->master_slave_set) {
++	case MASTER_SLAVE_CFG_MASTER_FORCE:
++		ctl |= CTL1000_AS_MASTER;
++		break;
++	case MASTER_SLAVE_CFG_SLAVE_FORCE:
++		break;
++	case MASTER_SLAVE_CFG_UNKNOWN:
++	case MASTER_SLAVE_CFG_UNSUPPORTED:
++		return 0;
++	default:
++		phydev_warn(phydev, "Unsupported Master/Slave mode\n");
++		return -EOPNOTSUPP;
++	}
++
++	ret = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
++	if (ret == 1)
++		ret = genphy_soft_reset(phydev);
++
++	return ret;
++}
++
++static int rtl9000a_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
++	phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
++
++	ret = genphy_update_link(phydev);
++	if (ret)
++		return ret;
++
++	ret = phy_read(phydev, MII_CTRL1000);
++	if (ret < 0)
++		return ret;
++	if (ret & CTL1000_AS_MASTER)
++		phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE;
++	else
++		phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE;
++
++	ret = phy_read(phydev, MII_STAT1000);
++	if (ret < 0)
++		return ret;
++	if (ret & LPA_1000MSRES)
++		phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
++	else
++		phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
++
++	return 0;
++}
++
++static int rtl9000a_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL8211F_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl9000a_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl9000a_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = (u16)~RTL9000A_GINMR_LINK_STATUS;
++		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++	} else {
++		val = ~0;
++		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++		if (err)
++			return err;
++
++		err = rtl9000a_ack_interrupt(phydev);
++	}
++
++	return phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++}
++
++static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read(phydev, RTL8211F_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static struct phy_driver realtek_drvs[] = {
++	{
++		PHY_ID_MATCH_EXACT(0x00008201),
++		.name           = "RTL8201CP Ethernet",
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc816),
++		.name		= "RTL8201F Fast Ethernet",
++		.config_intr	= &rtl8201_config_intr,
++		.handle_interrupt = rtl8201_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_MODEL(0x001cc880),
++		.name		= "RTL8208 Fast Ethernet",
++		.read_mmd	= genphy_read_mmd_unsupported,
++		.write_mmd	= genphy_write_mmd_unsupported,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc910),
++		.name		= "RTL8211 Gigabit Ethernet",
++		.config_aneg	= rtl8211_config_aneg,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc912),
++		.name		= "RTL8211B Gigabit Ethernet",
++		.config_intr	= &rtl8211b_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.suspend	= rtl8211b_suspend,
++		.resume		= rtl8211b_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc913),
++		.name		= "RTL8211C Gigabit Ethernet",
++		.config_init	= rtl8211c_config_init,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc914),
++		.name		= "RTL8211DN Gigabit Ethernet",
++		.config_intr	= rtl8211e_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc915),
++		.name		= "RTL8211E Gigabit Ethernet",
++		.config_init	= &rtl8211e_config_init,
++		.config_intr	= &rtl8211e_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc916),
++		.name		= "RTL8211F Gigabit Ethernet",
++		.probe		= rtl821x_probe,
++		.config_init	= &rtl8211f_config_init,
++		.read_status	= rtlgen_read_status,
++		.config_intr	= &rtl8211f_config_intr,
++		.handle_interrupt = rtl8211f_handle_interrupt,
++		.suspend	= rtl821x_suspend,
++		.resume		= rtl821x_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.flags		= PHY_ALWAYS_CALL_SUSPEND,
++		.led_hw_is_supported = rtl8211f_led_hw_is_supported,
++		.led_hw_control_get = rtl8211f_led_hw_control_get,
++		.led_hw_control_set = rtl8211f_led_hw_control_set,
++	}, {
++		PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID),
++		.name		= "RTL8211F-VD Gigabit Ethernet",
++		.probe		= rtl821x_probe,
++		.config_init	= &rtl8211f_config_init,
++		.read_status	= rtlgen_read_status,
++		.config_intr	= &rtl8211f_config_intr,
++		.handle_interrupt = rtl8211f_handle_interrupt,
++		.suspend	= rtl821x_suspend,
++		.resume		= rtl821x_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.flags		= PHY_ALWAYS_CALL_SUSPEND,
++	}, {
++		.name		= "Generic FE-GE Realtek PHY",
++		.match_phy_device = rtlgen_match_phy_device,
++		.read_status	= rtlgen_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.read_mmd	= rtlgen_read_mmd,
++		.write_mmd	= rtlgen_write_mmd,
++	}, {
++		.name		= "RTL8226 2.5Gbps PHY",
++		.match_phy_device = rtl8226_match_phy_device,
++		.get_features	= rtl822x_get_features,
++		.config_aneg	= rtl822x_config_aneg,
++		.read_status	= rtl822x_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_match_phy_device,
++		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
++		.get_features	= rtl822x_get_features,
++		.config_aneg	= rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status	= rtl822xb_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc838),
++		.name           = "RTL8226-CG 2.5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc848),
++		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		.match_phy_device = rtl8251b_c45_match_phy_device,
++		.name           = "RTL8251B 5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl_internal_nbaset_match_phy_device,
++		.name           = "Realtek Internal NBASE-T PHY",
++		.flags		= PHY_IS_INTERNAL,
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++		.read_mmd	= rtl822x_read_mmd,
++		.write_mmd	= rtl822x_write_mmd,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001ccad0),
++		.name		= "RTL8224 2.5Gbps PHY",
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822x_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc961),
++		.name		= "RTL8366RB Gigabit Ethernet",
++		.config_init	= &rtl8366rb_config_init,
++		/* These interrupts are handled by the irq controller
++		 * embedded inside the RTL8366RB, they get unmasked when the
++		 * irq is requested and ACKed by reading the status register,
++		 * which is done by the irqchip code.
++		 */
++		.config_intr	= genphy_no_config_intr,
++		.handle_interrupt = genphy_handle_interrupt_no_ack,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001ccb00),
++		.name		= "RTL9000AA_RTL9000AN Ethernet",
++		.features       = PHY_BASIC_T1_FEATURES,
++		.config_init	= rtl9000a_config_init,
++		.config_aneg	= rtl9000a_config_aneg,
++		.read_status	= rtl9000a_read_status,
++		.config_intr	= rtl9000a_config_intr,
++		.handle_interrupt = rtl9000a_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc942),
++		.name		= "RTL8365MB-VC Gigabit Ethernet",
++		/* Interrupt handling analogous to RTL8366RB */
++		.config_intr	= genphy_no_config_intr,
++		.handle_interrupt = genphy_handle_interrupt_no_ack,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc960),
++		.name		= "RTL8366S Gigabit Ethernet",
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_mmd	= genphy_read_mmd_unsupported,
++		.write_mmd	= genphy_write_mmd_unsupported,
++	},
++};
++
++module_phy_driver(realtek_drvs);
++
++static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
++	{ PHY_ID_MATCH_VENDOR(0x001cc800) },
++	{ }
++};
++
++MODULE_DEVICE_TABLE(mdio, realtek_tbl);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
new file mode 100644
index 0000000000..4c1e2f0624
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
@@ -0,0 +1,180 @@
+From 33700ca45b7d2e1655d4cad95e25671e8a94e2f0 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:51:24 +0100
+Subject: [PATCH] net: phy: realtek: add hwmon support for temp sensor on
+ RTL822x
+
+This adds hwmon support for the temperature sensor on RTL822x.
+It's available on the standalone versions of the PHY's, and on
+the integrated PHY's in RTL8125B/RTL8125D/RTL8126.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/ad6bfe9f-6375-4a00-84b4-bfb38a21bd71 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/realtek/Kconfig         |  6 ++
+ drivers/net/phy/realtek/Makefile        |  1 +
+ drivers/net/phy/realtek/realtek.h       | 10 ++++
+ drivers/net/phy/realtek/realtek_hwmon.c | 79 +++++++++++++++++++++++++
+ drivers/net/phy/realtek/realtek_main.c  | 12 ++++
+ 5 files changed, 108 insertions(+)
+ create mode 100644 drivers/net/phy/realtek/realtek.h
+ create mode 100644 drivers/net/phy/realtek/realtek_hwmon.c
+
+--- a/drivers/net/phy/realtek/Kconfig
++++ b/drivers/net/phy/realtek/Kconfig
+@@ -3,3 +3,9 @@ config REALTEK_PHY
+ 	tristate "Realtek PHYs"
+ 	help
+ 	  Currently supports RTL821x/RTL822x and fast ethernet PHYs
++
++config REALTEK_PHY_HWMON
++	def_bool REALTEK_PHY && HWMON
++	depends on !(REALTEK_PHY=y && HWMON=m)
++	help
++	  Optional hwmon support for the temperature sensor
+--- a/drivers/net/phy/realtek/Makefile
++++ b/drivers/net/phy/realtek/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0
+ realtek-y			+= realtek_main.o
++realtek-$(CONFIG_REALTEK_PHY_HWMON) += realtek_hwmon.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek.h
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++
++#ifndef REALTEK_H
++#define REALTEK_H
++
++#include <linux/phy.h>
++
++int rtl822x_hwmon_init(struct phy_device *phydev);
++
++#endif /* REALTEK_H */
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek_hwmon.c
+@@ -0,0 +1,86 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * HWMON support for Realtek PHY's
++ *
++ * Author: Heiner Kallweit <hkallweit1 at gmail.com>
++ */
++
++#include <linux/hwmon.h>
++#include <linux/phy.h>
++
++#include "realtek.h"
++
++#define RTL822X_VND2_TSALRM				0xa662
++#define RTL822X_VND2_TSRR				0xbd84
++#define RTL822X_VND2_TSSR				0xb54c
++
++static umode_t rtl822x_hwmon_is_visible(const void *drvdata,
++				        enum hwmon_sensor_types type,
++				        u32 attr, int channel)
++{
++	return 0444;
++}
++
++static int rtl822x_hwmon_get_temp(int raw)
++{
++	if (raw >= 512)
++		raw -= 1024;
++
++	return 1000 * raw / 2;
++}
++
++static int rtl822x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
++			      u32 attr, int channel, long *val)
++{
++	struct phy_device *phydev = dev_get_drvdata(dev);
++	int raw;
++
++	switch (attr) {
++	case hwmon_temp_input:
++		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSRR) & 0x3ff;
++		*val = rtl822x_hwmon_get_temp(raw);
++		break;
++	case hwmon_temp_max:
++		/* Chip reduces speed to 1G if threshold is exceeded */
++		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSSR) >> 6;
++		*val = rtl822x_hwmon_get_temp(raw);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static const struct hwmon_ops rtl822x_hwmon_ops = {
++	.is_visible = rtl822x_hwmon_is_visible,
++	.read = rtl822x_hwmon_read,
++};
++
++static const struct hwmon_channel_info * const rtl822x_hwmon_info[] = {
++	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX),
++	NULL
++};
++
++static const struct hwmon_chip_info rtl822x_hwmon_chip_info = {
++	.ops = &rtl822x_hwmon_ops,
++	.info = rtl822x_hwmon_info,
++};
++
++int rtl822x_hwmon_init(struct phy_device *phydev)
++{
++	struct device *hwdev, *dev = &phydev->mdio.dev;
++	const char *name;
++
++	/* Ensure over-temp alarm is reset. */
++	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSALRM, 3);
++
++	name = devm_hwmon_sanitize_name(dev, dev_name(dev));
++	if (IS_ERR(name))
++		return PTR_ERR(name);
++
++	hwdev = devm_hwmon_device_register_with_info(dev, name, phydev,
++						     &rtl822x_hwmon_chip_info,
++						     NULL);
++	return PTR_ERR_OR_ZERO(hwdev);
++}
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -14,6 +14,8 @@
+ #include <linux/delay.h>
+ #include <linux/clk.h>
+ 
++#include "realtek.h"
++
+ #define RTL821x_PHYSR				0x11
+ #define RTL821x_PHYSR_DUPLEX			BIT(13)
+ #define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
+@@ -820,6 +822,15 @@ static int rtl822x_write_mmd(struct phy_
+ 	return ret;
+ }
+ 
++static int rtl822x_probe(struct phy_device *phydev)
++{
++	if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON) &&
++	    phydev->phy_id != RTL_GENERIC_PHYID)
++		return rtl822x_hwmon_init(phydev);
++
++	return 0;
++}
++
+ static int rtl822xb_config_init(struct phy_device *phydev)
+ {
+ 	bool has_2500, has_sgmii;
+@@ -1519,6 +1530,7 @@ static struct phy_driver realtek_drvs[]
+ 		.match_phy_device = rtl_internal_nbaset_match_phy_device,
+ 		.name           = "Realtek Internal NBASE-T PHY",
+ 		.flags		= PHY_IS_INTERNAL,
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 8de57707a2..52ffc7a0f9 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -10,12 +10,12 @@ the PHY.
 Reported-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 6 ++++++
+ drivers/net/phy/realtek/realtek_main.c | 6 ++++++
  1 file changed, 6 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1412,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1431,6 +1431,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1422,6 +1423,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1441,6 +1442,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1434,6 +1436,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1453,6 +1455,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1444,6 +1447,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1463,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1456,6 +1460,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1475,6 +1479,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1468,6 +1473,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1478,6 +1484,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1497,6 +1503,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1490,6 +1497,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1509,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
index 7e48c16515..edc03b5575 100644
--- a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
@@ -15,12 +15,12 @@ Reported-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Tested-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++--
+ drivers/net/phy/realtek/realtek_main.c | 27 +++++++++++++++++++++++++--
  1 file changed, 25 insertions(+), 2 deletions(-)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -815,8 +815,8 @@ static int rtl822x_write_mmd(struct phy_
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -834,8 +834,8 @@ static int rtl822x_probe(struct phy_devi
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
@@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
  			    phydev->host_interfaces) ||
-@@ -866,7 +866,29 @@ static int rtl822xb_config_init(struct p
+@@ -885,7 +885,29 @@ static int rtl822xb_config_init(struct p
  	if (ret < 0)
  		return ret;
  
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 722ec02cdc..3a3d052505 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -13,12 +13,12 @@ rtl821x_write_page instead of 3 individually locked MDIO bus operations.
 
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 8 +++++---
+ drivers/net/phy/realtek/realtek_main.c | 8 +++++---
  1 file changed, 5 insertions(+), 3 deletions(-)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1093,9 +1093,11 @@ static bool rtlgen_supports_2_5gbps(stru
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1112,9 +1112,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 1b9cdada6d..42873e7bdf 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -8,12 +8,12 @@ just like for RTL821x 1GE PHYs.
 
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 11 +++++++++++
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
  1 file changed, 11 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -80,6 +80,10 @@
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -82,6 +82,10 @@
  
  #define RTL822X_VND2_GANLPAR				0xa414
  
@@ -24,11 +24,11 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1189,6 +1193,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1208,6 +1212,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
-+static int rtl822x_probe(struct phy_device *phydev)
++static int rtl822x_aldps_probe(struct phy_device *phydev)
 +{
 +	struct device *dev = &phydev->mdio.dev;
 +	int val;
@@ -50,51 +50,51 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1460,6 +1483,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1479,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1471,6 +1495,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1490,6 +1514,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1484,6 +1509,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1503,6 +1528,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1497,6 +1523,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1516,6 +1542,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1508,6 +1535,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1527,6 +1554,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1521,6 +1549,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1540,6 +1568,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 63ffd0a0c9..39c1929b5f 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -12,9 +12,9 @@ over the implemented MMDs.
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 [forward-port by @namiltd]
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1139,10 +1139,32 @@ static int rtl8226_match_phy_device(stru
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1158,10 +1158,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index c9e15fb463..1ab2fe7618 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -7,12 +7,12 @@ This commit introduces interrupt support for RTL8221B.
 
 Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 ---
- drivers/net/phy/realtek.c | 47 +++++++++++++++++++++++++++++++++++++++
+ drivers/net/phy/realtek/realtek_main.c | 47 +++++++++++++++++++++++++++++++++++++++
  1 file changed, 47 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1369,6 +1369,51 @@ static irqreturn_t rtl9000a_handle_inter
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1388,6 +1388,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1531,6 +1576,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1550,6 +1595,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1545,6 +1592,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1564,6 +1611,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1557,6 +1606,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1576,6 +1625,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1571,6 +1622,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1590,6 +1641,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
diff --git a/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch b/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
index 73f735828f..bb7e7be6d2 100644
--- a/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
+++ b/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -419,6 +419,12 @@ config ROCKCHIP_PHY
+@@ -416,6 +416,12 @@ config ROCKCHIP_PHY
  	help
  	  Currently supports the integrated Ethernet PHY.
  
@@ -16,7 +16,7 @@
 --- a/drivers/net/phy/Makefile
 +++ b/drivers/net/phy/Makefile
 @@ -102,6 +102,7 @@ obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
 +obj-$(CONFIG_RTL8367S_GSW)	+= rtk/
diff --git a/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
index 40771202c5..676bd7c093 100644
--- a/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
+++ b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
@@ -1,8 +1,8 @@
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -399,6 +399,8 @@ config REALTEK_PHY
- 	help
- 	  Supports the Realtek 821x PHY.
+@@ -396,6 +396,8 @@ config QSEMI_PHY
+ 
+ source "drivers/net/phy/realtek/Kconfig"
  
 +source "drivers/net/phy/rtl8261n/Kconfig"
 +
@@ -14,7 +14,7 @@
 @@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja
  obj-y				+= qcom/
  obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
 +obj-y				+= rtl8261n/
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
diff --git a/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch b/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
index 43d4a7d4fc..4d6866db24 100644
--- a/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
+++ b/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
@@ -14,9 +14,9 @@ Submitted-by: Birger Koblitz <mail at birger-koblitz.de>
 
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -410,6 +410,12 @@ config REALTEK_PHY
- 	help
- 	  Supports the Realtek 821x PHY.
+@@ -407,6 +407,12 @@ config QSEMI_PHY
+ 
+ source "drivers/net/phy/realtek/Kconfig"
  
 +config REALTEK_SOC_PHY
 +	tristate "Realtek SoC PHYs"
@@ -32,7 +32,7 @@ Submitted-by: Birger Koblitz <mail at birger-koblitz.de>
 @@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja
  obj-y				+= qcom/
  obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
 +obj-$(CONFIG_REALTEK_SOC_PHY)   += rtl83xx-phy.o
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o



From lede-commits at lists.infradead.org  Fri Jan 17 08:40:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 11:40:28 -0500
Subject: [openwrt/openwrt]  generic: backport pending Realtek PHY patches
In-Reply-To: <173713202809.3259977.14739411583280447943@git-01.infra.openwrt.org>
References: <173713202809.3259977.14739411583280447943@git-01.infra.openwrt.org>
Message-ID: <mailman.42150.1737132033.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7924acdd63490aa436bf114d290cb56cd4eba008

commit 7924acdd63490aa436bf114d290cb56cd4eba008
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 13:45:11 2025 +0100

    generic: backport pending Realtek PHY patches
    
    These patches have been accepted, so we can move them from pending to
    backported.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...ltek-clear-1000Base-T-lpa-if-link-is-down.patch | 52 +++++++++++++++
 ...ltek-clear-master_slave_state-if-link-is-.patch | 35 ++++++++++
 ...-net-phy-realtek-always-clear-NBase-T-lpa.patch | 42 ++++++++++++
 ...tek-add-support-for-reading-MDIO_MMD_VEN.patch} |  0
 ...-realtek-PHY-driver-to-its-own-subdirect.patch} | 62 +++++++++--------
 ...tek-add-hwmon-support-for-temp-sensor-on.patch} |  2 +-
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch | 16 ++---
 ...ltek-make-sure-paged-read-is-protected-by.patch |  2 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch | 14 ++--
 ...-realtek-detect-early-version-of-RTL8221B.patch |  2 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch | 10 +--
 ...ltek-clear-1000Base-T-lpa-bits-if-link-is.patch | 78 ----------------------
 ...ltek-clear-master_slave_state-if-link-is-.patch | 61 -----------------
 ...ltek-always-clear-10gbase-t-link-partner-.patch | 67 -------------------
 14 files changed, 182 insertions(+), 261 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch b/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
new file mode 100644
index 0000000000..3e9631e4a3
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
@@ -0,0 +1,52 @@
+From 34d5a86ff7bbe225fba3ad91f9b4dc85fb408e18 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:43:35 +0000
+Subject: [PATCH] net: phy: realtek: clear 1000Base-T lpa if link is down
+
+Only read 1000Base-T link partner advertisement if autonegotiation has
+completed and otherwise 1000Base-T link partner advertisement bits.
+
+This fixes bogus 1000Base-T link partner advertisement after link goes
+down (eg. by disconnecting the wire).
+Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 19 ++++++++-----------
+ 1 file changed, 8 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1023,23 +1023,20 @@ static int rtl822x_c45_read_status(struc
+ {
+ 	int ret, val;
+ 
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+ 	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
+ 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+ 				   RTL822X_VND2_GANLPAR);
+ 		if (val < 0)
+ 			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
+ 	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
+ 
+ 	if (!phydev->link)
+ 		return 0;
diff --git a/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
new file mode 100644
index 0000000000..778602d3e5
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
@@ -0,0 +1,35 @@
+From ea8318cb33e593bbfc59d637eae45a69732c5387 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:43:43 +0000
+Subject: [PATCH] net: phy: realtek: clear master_slave_state if link is down
+
+rtlgen_decode_physr() which sets master_slave_state isn't called in case
+the link is down and other than rtlgen_read_status(),
+rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
+
+Avoid stale master_slave_state by always setting it to
+MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
+is down.
+
+Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1038,8 +1038,10 @@ static int rtl822x_c45_read_status(struc
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	if (!phydev->link)
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+ 		return 0;
++	}
+ 
+ 	/* Read actual speed from vendor register. */
+ 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch b/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
new file mode 100644
index 0000000000..d365ed0ad2
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
@@ -0,0 +1,42 @@
+From d3eb58549842c60ed46f37da7f4da969e3d6ecd3 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:45:00 +0000
+Subject: [PATCH] net: phy: realtek: always clear NBase-T lpa
+
+Clear NBase-T link partner advertisement before calling
+rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
+setting speed and duplex.
+
+This fixes bogus 2.5G/5G/10G link partner advertisement and thus
+speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
+NBase-T lpa.
+
+Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -952,15 +952,15 @@ static int rtl822x_read_status(struct ph
+ {
+ 	int lpadv, ret;
+ 
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
+ 	ret = rtlgen_read_status(phydev);
+ 	if (ret < 0)
+ 		return ret;
+ 
+ 	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
+ 		return 0;
+-	}
+ 
+ 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ 	if (lpadv < 0)
diff --git a/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch b/target/linux/generic/backport-6.6/781-23-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
rename to target/linux/generic/backport-6.6/781-23-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
diff --git a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch b/target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
similarity index 99%
rename from target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
rename to target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
index b410ab8a32..e66d724a98 100644
--- a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
+++ b/target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
@@ -63,7 +63,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
 --- a/drivers/net/phy/realtek.c
 +++ /dev/null
-@@ -1,1590 +0,0 @@
+@@ -1,1589 +0,0 @@
 -// SPDX-License-Identifier: GPL-2.0+
 -/* drivers/net/phy/realtek.c
 - *
@@ -1026,15 +1026,15 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -{
 -	int lpadv, ret;
 -
+-	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
 -	ret = rtlgen_read_status(phydev);
 -	if (ret < 0)
 -		return ret;
 -
 -	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !phydev->autoneg_complete) {
--		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-	    !phydev->autoneg_complete)
 -		return 0;
--	}
 -
 -	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
 -	if (lpadv < 0)
@@ -1097,26 +1097,25 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -{
 -	int ret, val;
 -
--	ret = genphy_c45_read_status(phydev);
--	if (ret < 0)
--		return ret;
--
--	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !genphy_c45_aneg_done(phydev))
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
--
 -	/* Vendor register as C45 has no standardized support for 1000BaseT */
--	if (phydev->autoneg == AUTONEG_ENABLE) {
+-	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
 -		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
 -				   RTL822X_VND2_GANLPAR);
 -		if (val < 0)
 -			return val;
--
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+-	} else {
+-		val = 0;
 -	}
+-	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
 -
--	if (!phydev->link)
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (!phydev->link) {
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
 -		return 0;
+-	}
 -
 -	/* Read actual speed from vendor register. */
 -	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
@@ -1656,7 +1655,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -MODULE_DEVICE_TABLE(mdio, realtek_tbl);
 --- /dev/null
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -0,0 +1,1590 @@
+@@ -0,0 +1,1589 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/* drivers/net/phy/realtek.c
 + *
@@ -2619,15 +2618,15 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +{
 +	int lpadv, ret;
 +
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
 +	ret = rtlgen_read_status(phydev);
 +	if (ret < 0)
 +		return ret;
 +
 +	if (phydev->autoneg == AUTONEG_DISABLE ||
-+	    !phydev->autoneg_complete) {
-+		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
 +		return 0;
-+	}
 +
 +	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
 +	if (lpadv < 0)
@@ -2690,26 +2689,25 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +{
 +	int ret, val;
 +
-+	ret = genphy_c45_read_status(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (phydev->autoneg == AUTONEG_DISABLE ||
-+	    !genphy_c45_aneg_done(phydev))
-+		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+
 +	/* Vendor register as C45 has no standardized support for 1000BaseT */
-+	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
 +		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
 +				   RTL822X_VND2_GANLPAR);
 +		if (val < 0)
 +			return val;
-+
-+		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
 +	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
 +
-+	if (!phydev->link)
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
 +		return 0;
++	}
 +
 +	/* Read actual speed from vendor register. */
 +	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch b/target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
similarity index 98%
rename from target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
rename to target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
index 4c1e2f0624..7c1fe54267 100644
--- a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
+++ b/target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
@@ -170,7 +170,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
-@@ -1519,6 +1530,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1518,6 +1529,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl_internal_nbaset_match_phy_device,
  		.name           = "Realtek Internal NBASE-T PHY",
  		.flags		= PHY_IS_INTERNAL,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 52ffc7a0f9..3f43412648 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1431,6 +1431,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1430,6 +1430,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1441,6 +1442,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1440,6 +1441,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1453,6 +1455,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1452,6 +1454,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1463,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1462,6 +1465,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1475,6 +1479,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1474,6 +1478,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1486,6 +1491,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1497,6 +1503,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1496,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1509,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1508,6 +1515,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 3a3d052505..d5f80d1c91 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1112,9 +1112,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1111,9 +1111,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 42873e7bdf..b73e6c6443 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1208,6 +1212,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
@@ -50,7 +50,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1479,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -58,7 +58,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1490,6 +1514,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -66,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1503,6 +1528,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1502,6 +1527,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1516,6 +1542,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1515,6 +1541,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1527,6 +1554,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1526,6 +1553,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -90,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1540,6 +1568,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1539,6 +1567,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 39c1929b5f..22c271c3eb 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1158,10 +1158,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index 1ab2fe7618..c855a211e8 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1388,6 +1388,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1550,6 +1595,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1564,6 +1611,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1576,6 +1625,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1590,6 +1641,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
deleted file mode 100644
index 5bc77ed3b8..0000000000
--- a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From patchwork Wed Jan 15 14:43:35 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940510
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:43:35 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 1/3] net: phy: realtek: clear 1000Base-T lpa if link is
- down
-Message-ID: 
- <67e38eee4c46b921938fb33f5bc86c8979b9aa33.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-Only read 1000Base-T link partner advertisement if autonegotiation has
-completed and otherwise 1000Base-T link partner advertisement bits.
-
-This fixes bogus 1000Base-T link partner advertisement after link goes
-down (eg. by disconnecting the wire).
-Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 19 ++++++++-----------
- 1 file changed, 8 insertions(+), 11 deletions(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1068,23 +1068,20 @@ static int rtl822x_c45_read_status(struc
- {
- 	int ret, val;
- 
--	ret = genphy_c45_read_status(phydev);
--	if (ret < 0)
--		return ret;
--
--	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !genphy_c45_aneg_done(phydev))
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
--
- 	/* Vendor register as C45 has no standardized support for 1000BaseT */
--	if (phydev->autoneg == AUTONEG_ENABLE) {
-+	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
- 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
- 				   RTL822X_VND2_GANLPAR);
- 		if (val < 0)
- 			return val;
--
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
-+	} else {
-+		val = 0;
- 	}
-+	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
-+
-+	ret = genphy_c45_read_status(phydev);
-+	if (ret < 0)
-+		return ret;
- 
- 	if (!phydev->link)
- 		return 0;
diff --git a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
deleted file mode 100644
index b7e5f8b58f..0000000000
--- a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From patchwork Wed Jan 15 14:43:43 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940511
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:43:43 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 2/3] net: phy: realtek: clear master_slave_state if link
- is down
-Message-ID: 
- <2155887c3a665e4132a034df1e9cfdeec0ae48c9.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-rtlgen_decode_physr() which sets master_slave_state isn't called in case
-the link is down and other than rtlgen_read_status(),
-rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
-
-Avoid stale master_slave_state by always setting it to
-MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
-is down.
-
-Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1083,8 +1083,10 @@ static int rtl822x_c45_read_status(struc
- 	if (ret < 0)
- 		return ret;
- 
--	if (!phydev->link)
-+	if (!phydev->link) {
-+		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
- 		return 0;
-+	}
- 
- 	/* Read actual speed from vendor register. */
- 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
deleted file mode 100644
index 23947c2200..0000000000
--- a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From patchwork Wed Jan 15 14:45:00 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940519
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:45:00 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 3/3] net: phy: realtek: always clear NBase-T lpa
-Message-ID: 
- <566d4771d68a1e18d2d48860e25891e468e26551.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-Clear NBase-T link partner advertisement before calling
-rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
-setting speed and duplex.
-
-This fixes bogus 2.5G/5G/10G link partner advertisement and thus
-speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
-NBase-T lpa.
-
-Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -997,15 +997,15 @@ static int rtl822x_read_status(struct ph
- {
- 	int lpadv, ret;
- 
-+	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+
- 	ret = rtlgen_read_status(phydev);
- 	if (ret < 0)
- 		return ret;
- 
- 	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !phydev->autoneg_complete) {
--		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+	    !phydev->autoneg_complete)
- 		return 0;
--	}
- 
- 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
- 	if (lpadv < 0)



From lede-commits at lists.infradead.org  Fri Jan 17 13:11:07 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 16:11:07 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport ETS patch for Airoha
 ethernet
In-Reply-To: <173714826790.3609416.8884787348349418183@git-01.infra.openwrt.org>
References: <173714826790.3609416.8884787348349418183@git-01.infra.openwrt.org>
Message-ID: <mailman.42360.1737148272.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/67635578fd19d0576c54bbe722a9664e8a6ab2a6

commit 67635578fd19d0576c54bbe722a9664e8a6ab2a6
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 17 22:04:19 2025 +0100

    airoha: an7581: backport ETS patch for Airoha ethernet
    
    Backport ETS patch for Airoha ethernet and refresh affected patches.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch | 53 ++++++++++++++++++++++
 ...a-Fix-channel-configuration-for-ETS-Qdisc.patch |  2 +-
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch b/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch
new file mode 100644
index 0000000000..2753972070
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch
@@ -0,0 +1,53 @@
+From b56e4d660a9688ff83f5cbdc6e3ea063352d0d79 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Sun, 12 Jan 2025 19:32:45 +0100
+Subject: [PATCH] net: airoha: Enforce ETS Qdisc priomap
+
+EN7581 SoC supports fixed QoS band priority where WRR queues have lowest
+priorities with respect to SP ones.
+E.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
+
+Enforce ETS Qdisc priomap according to the hw capabilities.
+
+Suggested-by: Davide Caratti <dcaratti at redhat.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Davide Caratti <dcaratti at redhat.com>
+Link: https://patch.msgid.link/20250112-airoha_ets_priomap-v1-1-fb616de159ba at kernel.org
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 17 +++++++++++++++--
+ 1 file changed, 15 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2786,7 +2786,7 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
+ 	enum tx_sched_mode mode = TC_SCH_SP;
+ 	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
+-	int i, nstrict = 0;
++	int i, nstrict = 0, nwrr, qidx;
+ 
+ 	if (p->bands > AIROHA_NUM_QOS_QUEUES)
+ 		return -EINVAL;
+@@ -2800,7 +2800,20 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
+ 		return -EINVAL;
+ 
+-	for (i = 0; i < p->bands - nstrict; i++)
++	/* EN7581 SoC supports fixed QoS band priority where WRR queues have
++	 * lowest priorities with respect to SP ones.
++	 * e.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
++	 */
++	nwrr = p->bands - nstrict;
++	qidx = nstrict && nwrr ? nstrict : 0;
++	for (i = 1; i <= p->bands; i++) {
++		if (p->priomap[i % AIROHA_NUM_QOS_QUEUES] != qidx)
++			return -EINVAL;
++
++		qidx = i == nwrr ? 0 : qidx + 1;
++	}
++
++	for (i = 0; i < nwrr; i++)
+ 		w[i] = p->weights[nstrict + i];
+ 
+ 	if (!nstrict)
diff --git a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
index 5bd7487b9f..e98fdad065 100644
--- a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
+++ b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
@@ -86,7 +86,7 @@ Best regards,
 
 --- a/drivers/net/ethernet/mediatek/airoha_eth.c
 +++ b/drivers/net/ethernet/mediatek/airoha_eth.c
-@@ -2833,11 +2833,14 @@ static int airoha_qdma_get_tx_ets_stats(
+@@ -2846,11 +2846,14 @@ static int airoha_qdma_get_tx_ets_stats(
  static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
  				     struct tc_ets_qopt_offload *opt)
  {



From lede-commits at lists.infradead.org  Fri Jan 17 13:11:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 16:11:08 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending PCI patch
In-Reply-To: <173714826790.3609416.8884787348349418183@git-01.infra.openwrt.org>
References: <173714826790.3609416.8884787348349418183@git-01.infra.openwrt.org>
Message-ID: <mailman.42361.1737148277.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f22febae1a6b7c654eaf09ed02c0d0017be6d73a

commit f22febae1a6b7c654eaf09ed02c0d0017be6d73a
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 17 22:09:05 2025 +0100

    airoha: an7581: add pending PCI patch
    
    Add pending PCI patch that should correctly fix mediatek driver with
    Airoha SoC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...k-gen3-Rely-on-clk_bulk_prepare_enable-in.patch |  58 +++++++++
 ...k-gen3-Move-reset-assert-callbacks-in-.po.patch |  89 ++++++++++++++
 ...k-gen3-Add-comment-about-initialization-o.patch |  38 ++++++
 ...k-gen3-Move-reset-delay-in-mtk_pcie_en758.patch |  62 ++++++++++
 ...k-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch |  44 +++++++
 ...k-gen3-Avoid-PCIe-resetting-via-PERST-for.patch | 131 +++++++++++++++++++++
 ...-gen3-Configure-PBUS_CSR-registers-for-E.patch} |  28 ++---
 ...k-gen3-Remove-mac_reset-assert-leftover-f.patch |  26 ++++
 8 files changed, 461 insertions(+), 15 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch b/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch
new file mode 100644
index 0000000000..e1ba4cbac2
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch
@@ -0,0 +1,58 @@
+From 0e7a622da17da0042294860cdb7a2fac091d25b1 Mon Sep 17 00:00:00 2001
+Message-ID: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:40 +0100
+Subject: [PATCH 1/6] PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Replace clk_bulk_prepare() and clk_bulk_enable() with
+clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-1-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++-----------
+ 1 file changed, 3 insertions(+), 11 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -907,12 +907,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);
+ 
+-	err = clk_bulk_prepare(pcie->num_clks, pcie->clks);
+-	if (err) {
+-		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_prepare;
+-	}
+-
+ 	val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) |
+@@ -925,17 +919,15 @@ static int mtk_pcie_en7581_power_up(stru
+ 	      FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf);
+ 	writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG);
+ 
+-	err = clk_bulk_enable(pcie->num_clks, pcie->clks);
++	err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks);
+ 	if (err) {
+ 		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_enable;
++		goto err_clk_prepare_enable;
+ 	}
+ 
+ 	return 0;
+ 
+-err_clk_enable:
+-	clk_bulk_unprepare(pcie->num_clks, pcie->clks);
+-err_clk_prepare:
++err_clk_prepare_enable:
+ 	pm_runtime_put_sync(dev);
+ 	pm_runtime_disable(dev);
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
diff --git a/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch b/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch
new file mode 100644
index 0000000000..de2b20195c
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch
@@ -0,0 +1,89 @@
+From e4c7dfd953f7618f0ccb70d87c1629634f306fab Mon Sep 17 00:00:00 2001
+Message-ID: <e4c7dfd953f7618f0ccb70d87c1629634f306fab.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:41 +0100
+Subject: [PATCH 2/6] PCI: mediatek-gen3: Move reset/assert callbacks in
+ .power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In order to make the code more readable, the reset_control_bulk_assert()
+function for PHY reset lines is moved to make it pair with
+reset_control_bulk_deassert() in mtk_pcie_power_up() and
+mtk_pcie_en7581_power_up(). The same change is done for
+reset_control_assert() used to assert MAC reset line.
+
+Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
+complete PCIe reset on MediaTek controller.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 28 +++++++++++++--------
+ 1 file changed, 18 insertions(+), 10 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -120,6 +120,8 @@
+ 
+ #define MAX_NUM_PHY_RESETS		3
+ 
++#define PCIE_MTK_RESET_TIME_US		10
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -875,9 +877,14 @@ static int mtk_pcie_en7581_power_up(stru
+ 	u32 val;
+ 
+ 	/*
+-	 * Wait for the time needed to complete the bulk assert in
+-	 * mtk_pcie_setup for EN7581 SoC.
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
+ 	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++
++	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	err = phy_init(pcie->phy);
+@@ -944,6 +951,15 @@ static int mtk_pcie_power_up(struct mtk_
+ 	struct device *dev = pcie->dev;
+ 	int err;
+ 
++	/*
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
++	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++	usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
++
+ 	/* PHY power on and enable pipe clock */
+ 	err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+ 	if (err) {
+@@ -1016,14 +1032,6 @@ static int mtk_pcie_setup(struct mtk_gen
+ 	 * counter since the bulk is shared.
+ 	 */
+ 	reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-	/*
+-	 * The controller may have been left out of reset by the bootloader
+-	 * so make sure that we get a clean start by asserting resets here.
+-	 */
+-	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-
+-	reset_control_assert(pcie->mac_reset);
+-	usleep_range(10, 20);
+ 
+ 	/* Don't touch the hardware registers before power up */
+ 	err = pcie->soc->power_up(pcie);
diff --git a/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch b/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch
new file mode 100644
index 0000000000..c8165ced63
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch
@@ -0,0 +1,38 @@
+From 0c9d2d2ef0d916b490a9222ed20ff4616fca876d Mon Sep 17 00:00:00 2001
+Message-ID: <0c9d2d2ef0d916b490a9222ed20ff4616fca876d.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:42 +0100
+Subject: [PATCH 3/6] PCI: mediatek-gen3: Add comment about initialization
+ order in mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add a comment in mtk_pcie_en7581_power_up() to clarify, unlike the other
+MediaTek Gen3 controllers, the Airoha EN7581 requires PHY initialization
+and power-on before PHY reset deassert.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-3-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -887,6 +887,10 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
++	/*
++	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
++	 * requires PHY initialization and power-on before PHY reset deassert.
++	 */
+ 	err = phy_init(pcie->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize PHY\n");
diff --git a/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch b/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch
new file mode 100644
index 0000000000..cf8e1f473b
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch
@@ -0,0 +1,62 @@
+From 90d4e466c9ea2010f33880a36317a8486ccbe082 Mon Sep 17 00:00:00 2001
+Message-ID: <90d4e466c9ea2010f33880a36317a8486ccbe082.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:43 +0100
+Subject: [PATCH 4/6] PCI: mediatek-gen3: Move reset delay in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
+causing occasional PCIe link down issues. In order to overcome the
+problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and
+REG_RESET_CONTROL (0x834) registers available in the clock module
+running clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up().
+
+In order to make the code more readable, move the wait for the time
+needed to complete the PCIe reset from en7581_pci_enable() to
+mtk_pcie_en7581_power_up().
+
+Reduce reset timeout from 250ms to the standard PCIE_T_PVPERL_MS value
+(100ms) since it has no impact on the driver behavior.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-4-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Acked-by: Stephen Boyd <sboyd at kernel.org>
+---
+ drivers/clk/clk-en7523.c                    | 1 -
+ drivers/pci/controller/pcie-mediatek-gen3.c | 7 +++++++
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -489,7 +489,6 @@ static int en7581_pci_enable(struct clk_
+ 	       REG_PCI_CONTROL_PERSTOUT;
+ 	val = readl(np_base + REG_PCI_CONTROL);
+ 	writel(val | mask, np_base + REG_PCI_CONTROL);
+-	msleep(250);
+ 
+ 	return 0;
+ }
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -936,6 +936,13 @@ static int mtk_pcie_en7581_power_up(stru
+ 		goto err_clk_prepare_enable;
+ 	}
+ 
++	/*
++	 * Airoha EN7581 performs PCIe reset via clk callbacks since it has a
++	 * hw issue with PCIE_PE_RSTB signal. Add wait for the time needed to
++	 * complete the PCIe reset.
++	 */
++	msleep(PCIE_T_PVPERL_MS);
++
+ 	return 0;
+ 
+ err_clk_prepare_enable:
diff --git a/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch b/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch
new file mode 100644
index 0000000000..cbd28e19f1
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch
@@ -0,0 +1,44 @@
+From c98bee18d0a094e37100c85effe5e161418f8644 Mon Sep 17 00:00:00 2001
+Message-ID: <c98bee18d0a094e37100c85effe5e161418f8644.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:44 +0100
+Subject: [PATCH 5/6] PCI: mediatek-gen3: Rely on msleep() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Since mtk_pcie_en7581_power_up() runs in non-atomic context, rely on
+msleep() routine instead of mdelay().
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-5-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -885,7 +885,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+@@ -913,7 +913,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 * Wait for the time needed to complete the bulk de-assert above.
+ 	 * This time is specific for EN7581 SoC.
+ 	 */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);
diff --git a/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch b/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch
new file mode 100644
index 0000000000..cdc6e353aa
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch
@@ -0,0 +1,131 @@
+From 491cb9c5084790aafa02e843349492c284373231 Mon Sep 17 00:00:00 2001
+Message-ID: <491cb9c5084790aafa02e843349492c284373231.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Thu, 9 Jan 2025 00:30:45 +0100
+Subject: [PATCH 6/6] PCI: mediatek-gen3: Avoid PCIe resetting via PERST# for
+ Airoha EN7581 SoC
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PERST# signal causing
+occasional PCIe link down issues. In order to overcome the problem,
+PERST# signal is not asserted/released during device probe or
+suspend/resume phase and the PCIe block is reset using
+en7523_reset_assert() and en7581_pci_enable().
+
+Introduce flags field in the mtk_gen3_pcie_pdata struct in order to
+specify per-SoC capabilities.
+
+Link: https://lore.kernel.org/r/20250109-pcie-en7581-rst-fix-v4-1-4a45c89fb143 at kernel.org
+Tested-by: Hui Ma <hui.ma at airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 59 ++++++++++++++-------
+ 1 file changed, 41 insertions(+), 18 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -127,10 +127,18 @@
+ 
+ struct mtk_gen3_pcie;
+ 
++enum mtk_gen3_pcie_flags {
++	SKIP_PCIE_RSTB	= BIT(0), /* Skip PERST# assertion during device
++				   * probing or suspend/resume phase to
++				   * avoid hw bugs/issues.
++				   */
++};
++
+ /**
+  * struct mtk_gen3_pcie_pdata - differentiate between host generations
+  * @power_up: pcie power_up callback
+  * @phy_resets: phy reset lines SoC data.
++ * @flags: pcie device flags.
+  */
+ struct mtk_gen3_pcie_pdata {
+ 	int (*power_up)(struct mtk_gen3_pcie *pcie);
+@@ -138,6 +146,7 @@ struct mtk_gen3_pcie_pdata {
+ 		const char *id[MAX_NUM_PHY_RESETS];
+ 		int num_resets;
+ 	} phy_resets;
++	u32 flags;
+ };
+ 
+ /**
+@@ -404,22 +413,33 @@ static int mtk_pcie_startup_port(struct
+ 	val |= PCIE_DISABLE_DVFSRC_VLT_REQ;
+ 	writel_relaxed(val, pcie->base + PCIE_MISC_CTRL_REG);
+ 
+-	/* Assert all reset signals */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
+-
+ 	/*
+-	 * Described in PCIe CEM specification sections 2.2 (PERST# Signal)
+-	 * and 2.2.1 (Initial Power-Up (G3 to S0)).
+-	 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
+-	 * for the power and clock to become stable.
++	 * Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
++	 * causing occasional PCIe link down. In order to overcome the issue,
++	 * PCIE_RSTB signals are not asserted/released at this stage and the
++	 * PCIe block is reset using en7523_reset_assert() and
++	 * en7581_pci_enable().
+ 	 */
+-	msleep(100);
+-
+-	/* De-assert reset signals */
+-	val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert all reset signals */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++		       PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++
++		/*
++		 * Described in PCIe CEM specification revision 6.0.
++		 *
++		 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
++		 * for the power and clock to become stable.
++		 */
++		msleep(PCIE_T_PVPERL_MS);
++
++		/* De-assert reset signals */
++		val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++			 PCIE_PE_RSTB);
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	/* Check if the link is up or not */
+ 	err = readl_poll_timeout(pcie->base + PCIE_LINK_STATUS_REG, val,
+@@ -1178,10 +1198,12 @@ static int mtk_pcie_suspend_noirq(struct
+ 		return err;
+ 	}
+ 
+-	/* Pull down the PERST# pin */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert the PERST# pin */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	dev_dbg(pcie->dev, "entered L2 states successfully");
+ 
+@@ -1232,6 +1254,7 @@ static const struct mtk_gen3_pcie_pdata
+ 		.id[2] = "phy-lane2",
+ 		.num_resets = 3,
+ 	},
++	.flags = SKIP_PCIE_RSTB,
+ };
+ 
+ static const struct of_device_id mtk_pcie_of_match[] = {
diff --git a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch b/target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
similarity index 74%
rename from target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
rename to target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
index d896e1aee3..49b8752dca 100644
--- a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
+++ b/target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
@@ -1,11 +1,9 @@
-From 2285d3b428c7d8f1c4fda2fb995e7e46a05350e0 Mon Sep 17 00:00:00 2001
-Message-ID: <2285d3b428c7d8f1c4fda2fb995e7e46a05350e0.1736324542.git.lorenzo at kernel.org>
-In-Reply-To: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
-References: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+From ca4217f3117dceb2d01e179d02031a8758404624 Mon Sep 17 00:00:00 2001
+Message-ID: <ca4217f3117dceb2d01e179d02031a8758404624.1736961235.git.lorenzo at kernel.org>
 From: Lorenzo Bianconi <lorenzo at kernel.org>
 Date: Tue, 3 Sep 2024 23:14:02 +0200
-Subject: [PATCH 2/2] PCI: mediatek-gen3: configure PBUS_CSR registers for
- EN7581 SoC
+Subject: [PATCH] PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581
+ SoC
 
 Configure PBus base address and address mask in order to allow the hw
 detecting if a given address is on PCIE0, PCIE1 or PCIE2.
@@ -33,9 +31,9 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  #include <linux/reset.h>
  
  #include "../pci.h"
-@@ -120,6 +122,13 @@
+@@ -122,6 +124,13 @@
  
- #define MAX_NUM_PHY_RESETS		3
+ #define PCIE_MTK_RESET_TIME_US		10
  
 +#define PCIE_EN7581_PBUS_ADDR(_n)	(0x00 + ((_n) << 3))
 +#define PCIE_EN7581_PBUS_ADDR_MASK(_n)	(0x04 + ((_n) << 3))
@@ -47,7 +45,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  /* Time in ms needed to complete PCIe reset on EN7581 SoC */
  #define PCIE_EN7581_RESET_TIME_MS	100
  
-@@ -871,7 +880,8 @@ static int mtk_pcie_parse_port(struct mt
+@@ -893,7 +902,8 @@ static int mtk_pcie_parse_port(struct mt
  static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
  {
  	struct device *dev = pcie->dev;
@@ -57,9 +55,9 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  	u32 val;
  
  	/*
-@@ -880,6 +890,23 @@ static int mtk_pcie_en7581_power_up(stru
- 	 */
- 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+@@ -907,6 +917,23 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);
  
 +	map = syscon_regmap_lookup_by_compatible("airoha,en7581-pbus-csr");
 +	if (IS_ERR(map))
@@ -78,6 +76,6 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
 +	regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot),
 +		     PCIE_EN7581_PBUS_BASE_ADDR_MASK);
 +
- 	err = phy_init(pcie->phy);
- 	if (err) {
- 		dev_err(dev, "failed to initialize PHY\n");
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+ 	 * requires PHY initialization and power-on before PHY reset deassert.
diff --git a/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch b/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch
new file mode 100644
index 0000000000..f1512a95cf
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch
@@ -0,0 +1,26 @@
+From c4defe43ce17a87e6341d126ba736d9f7ebdc541 Mon Sep 17 00:00:00 2001
+Message-ID: <c4defe43ce17a87e6341d126ba736d9f7ebdc541.1736962769.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 15 Jan 2025 18:36:26 +0100
+Subject: [PATCH] PCI: mediatek-gen3: Remove mac_reset assert leftover for
+ Airoha EN7581 SoC.
+
+Remove a leftover assert for mac_reset line in mtk_pcie_en7581_power_up().
+This is not armful since EN7581 does not requires mac_reset and
+mac_reset is not defined in EN7581 device tree.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -912,7 +912,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 */
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
+ 				  pcie->phy_resets);
+-	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);



From lede-commits at lists.infradead.org  Fri Jan 17 13:12:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 16:12:05 -0500
Subject: [openwrt/openwrt]  airoha: an7581: backport ETS patch for Airoha
 ethernet
In-Reply-To: <173714832536.3610314.10562175341196927126@git-01.infra.openwrt.org>
References: <173714832536.3610314.10562175341196927126@git-01.infra.openwrt.org>
Message-ID: <mailman.42364.1737148329.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/fedf53650a8bba747282f967f543e1cb7940c092

commit fedf53650a8bba747282f967f543e1cb7940c092
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 17 22:04:19 2025 +0100

    airoha: an7581: backport ETS patch for Airoha ethernet
    
    Backport ETS patch for Airoha ethernet and refresh affected patches.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 67635578fd19d0576c54bbe722a9664e8a6ab2a6)
---
 ...6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch | 53 ++++++++++++++++++++++
 ...a-Fix-channel-configuration-for-ETS-Qdisc.patch |  2 +-
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch b/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch
new file mode 100644
index 0000000000..2753972070
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/039-v6.14-net-airoha-Enforce-ETS-Qdisc-priomap.patch
@@ -0,0 +1,53 @@
+From b56e4d660a9688ff83f5cbdc6e3ea063352d0d79 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Sun, 12 Jan 2025 19:32:45 +0100
+Subject: [PATCH] net: airoha: Enforce ETS Qdisc priomap
+
+EN7581 SoC supports fixed QoS band priority where WRR queues have lowest
+priorities with respect to SP ones.
+E.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
+
+Enforce ETS Qdisc priomap according to the hw capabilities.
+
+Suggested-by: Davide Caratti <dcaratti at redhat.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Reviewed-by: Davide Caratti <dcaratti at redhat.com>
+Link: https://patch.msgid.link/20250112-airoha_ets_priomap-v1-1-fb616de159ba at kernel.org
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/mediatek/airoha_eth.c | 17 +++++++++++++++--
+ 1 file changed, 15 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/airoha_eth.c
++++ b/drivers/net/ethernet/mediatek/airoha_eth.c
+@@ -2786,7 +2786,7 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	struct tc_ets_qopt_offload_replace_params *p = &opt->replace_params;
+ 	enum tx_sched_mode mode = TC_SCH_SP;
+ 	u16 w[AIROHA_NUM_QOS_QUEUES] = {};
+-	int i, nstrict = 0;
++	int i, nstrict = 0, nwrr, qidx;
+ 
+ 	if (p->bands > AIROHA_NUM_QOS_QUEUES)
+ 		return -EINVAL;
+@@ -2800,7 +2800,20 @@ static int airoha_qdma_set_tx_ets_sched(
+ 	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)
+ 		return -EINVAL;
+ 
+-	for (i = 0; i < p->bands - nstrict; i++)
++	/* EN7581 SoC supports fixed QoS band priority where WRR queues have
++	 * lowest priorities with respect to SP ones.
++	 * e.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn
++	 */
++	nwrr = p->bands - nstrict;
++	qidx = nstrict && nwrr ? nstrict : 0;
++	for (i = 1; i <= p->bands; i++) {
++		if (p->priomap[i % AIROHA_NUM_QOS_QUEUES] != qidx)
++			return -EINVAL;
++
++		qidx = i == nwrr ? 0 : qidx + 1;
++	}
++
++	for (i = 0; i < nwrr; i++)
+ 		w[i] = p->weights[nstrict + i];
+ 
+ 	if (!nstrict)
diff --git a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
index 5bd7487b9f..e98fdad065 100644
--- a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
+++ b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch
@@ -86,7 +86,7 @@ Best regards,
 
 --- a/drivers/net/ethernet/mediatek/airoha_eth.c
 +++ b/drivers/net/ethernet/mediatek/airoha_eth.c
-@@ -2833,11 +2833,14 @@ static int airoha_qdma_get_tx_ets_stats(
+@@ -2846,11 +2846,14 @@ static int airoha_qdma_get_tx_ets_stats(
  static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,
  				     struct tc_ets_qopt_offload *opt)
  {



From lede-commits at lists.infradead.org  Fri Jan 17 13:12:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 16:12:06 -0500
Subject: [openwrt/openwrt]  airoha: an7581: add pending PCI patch
In-Reply-To: <173714832536.3610314.10562175341196927126@git-01.infra.openwrt.org>
References: <173714832536.3610314.10562175341196927126@git-01.infra.openwrt.org>
Message-ID: <mailman.42365.1737148329.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/0f45601ccd1b44ba4ed7873e15933ec00565b796

commit 0f45601ccd1b44ba4ed7873e15933ec00565b796
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Fri Jan 17 22:09:05 2025 +0100

    airoha: an7581: add pending PCI patch
    
    Add pending PCI patch that should correctly fix mediatek driver with
    Airoha SoC.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit f22febae1a6b7c654eaf09ed02c0d0017be6d73a)
---
 ...k-gen3-Rely-on-clk_bulk_prepare_enable-in.patch |  58 +++++++++
 ...k-gen3-Move-reset-assert-callbacks-in-.po.patch |  89 ++++++++++++++
 ...k-gen3-Add-comment-about-initialization-o.patch |  38 ++++++
 ...k-gen3-Move-reset-delay-in-mtk_pcie_en758.patch |  62 ++++++++++
 ...k-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch |  44 +++++++
 ...k-gen3-Avoid-PCIe-resetting-via-PERST-for.patch | 131 +++++++++++++++++++++
 ...-gen3-Configure-PBUS_CSR-registers-for-E.patch} |  28 ++---
 ...k-gen3-Remove-mac_reset-assert-leftover-f.patch |  26 ++++
 8 files changed, 461 insertions(+), 15 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch b/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch
new file mode 100644
index 0000000000..e1ba4cbac2
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/401-PCI-mediatek-gen3-Rely-on-clk_bulk_prepare_enable-in.patch
@@ -0,0 +1,58 @@
+From 0e7a622da17da0042294860cdb7a2fac091d25b1 Mon Sep 17 00:00:00 2001
+Message-ID: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:40 +0100
+Subject: [PATCH 1/6] PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Replace clk_bulk_prepare() and clk_bulk_enable() with
+clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-1-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++-----------
+ 1 file changed, 3 insertions(+), 11 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -907,12 +907,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);
+ 
+-	err = clk_bulk_prepare(pcie->num_clks, pcie->clks);
+-	if (err) {
+-		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_prepare;
+-	}
+-
+ 	val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) |
+ 	      FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) |
+@@ -925,17 +919,15 @@ static int mtk_pcie_en7581_power_up(stru
+ 	      FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf);
+ 	writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG);
+ 
+-	err = clk_bulk_enable(pcie->num_clks, pcie->clks);
++	err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks);
+ 	if (err) {
+ 		dev_err(dev, "failed to prepare clock\n");
+-		goto err_clk_enable;
++		goto err_clk_prepare_enable;
+ 	}
+ 
+ 	return 0;
+ 
+-err_clk_enable:
+-	clk_bulk_unprepare(pcie->num_clks, pcie->clks);
+-err_clk_prepare:
++err_clk_prepare_enable:
+ 	pm_runtime_put_sync(dev);
+ 	pm_runtime_disable(dev);
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
diff --git a/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch b/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch
new file mode 100644
index 0000000000..de2b20195c
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/402-PCI-mediatek-gen3-Move-reset-assert-callbacks-in-.po.patch
@@ -0,0 +1,89 @@
+From e4c7dfd953f7618f0ccb70d87c1629634f306fab Mon Sep 17 00:00:00 2001
+Message-ID: <e4c7dfd953f7618f0ccb70d87c1629634f306fab.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:41 +0100
+Subject: [PATCH 2/6] PCI: mediatek-gen3: Move reset/assert callbacks in
+ .power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In order to make the code more readable, the reset_control_bulk_assert()
+function for PHY reset lines is moved to make it pair with
+reset_control_bulk_deassert() in mtk_pcie_power_up() and
+mtk_pcie_en7581_power_up(). The same change is done for
+reset_control_assert() used to assert MAC reset line.
+
+Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to
+complete PCIe reset on MediaTek controller.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 28 +++++++++++++--------
+ 1 file changed, 18 insertions(+), 10 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -120,6 +120,8 @@
+ 
+ #define MAX_NUM_PHY_RESETS		3
+ 
++#define PCIE_MTK_RESET_TIME_US		10
++
+ /* Time in ms needed to complete PCIe reset on EN7581 SoC */
+ #define PCIE_EN7581_RESET_TIME_MS	100
+ 
+@@ -875,9 +877,14 @@ static int mtk_pcie_en7581_power_up(stru
+ 	u32 val;
+ 
+ 	/*
+-	 * Wait for the time needed to complete the bulk assert in
+-	 * mtk_pcie_setup for EN7581 SoC.
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
+ 	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++
++	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	err = phy_init(pcie->phy);
+@@ -944,6 +951,15 @@ static int mtk_pcie_power_up(struct mtk_
+ 	struct device *dev = pcie->dev;
+ 	int err;
+ 
++	/*
++	 * The controller may have been left out of reset by the bootloader
++	 * so make sure that we get a clean start by asserting resets here.
++	 */
++	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
++				  pcie->phy_resets);
++	reset_control_assert(pcie->mac_reset);
++	usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US);
++
+ 	/* PHY power on and enable pipe clock */
+ 	err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+ 	if (err) {
+@@ -1016,14 +1032,6 @@ static int mtk_pcie_setup(struct mtk_gen
+ 	 * counter since the bulk is shared.
+ 	 */
+ 	reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-	/*
+-	 * The controller may have been left out of reset by the bootloader
+-	 * so make sure that we get a clean start by asserting resets here.
+-	 */
+-	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);
+-
+-	reset_control_assert(pcie->mac_reset);
+-	usleep_range(10, 20);
+ 
+ 	/* Don't touch the hardware registers before power up */
+ 	err = pcie->soc->power_up(pcie);
diff --git a/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch b/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch
new file mode 100644
index 0000000000..c8165ced63
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/403-PCI-mediatek-gen3-Add-comment-about-initialization-o.patch
@@ -0,0 +1,38 @@
+From 0c9d2d2ef0d916b490a9222ed20ff4616fca876d Mon Sep 17 00:00:00 2001
+Message-ID: <0c9d2d2ef0d916b490a9222ed20ff4616fca876d.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:42 +0100
+Subject: [PATCH 3/6] PCI: mediatek-gen3: Add comment about initialization
+ order in mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add a comment in mtk_pcie_en7581_power_up() to clarify, unlike the other
+MediaTek Gen3 controllers, the Airoha EN7581 requires PHY initialization
+and power-on before PHY reset deassert.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-3-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -887,6 +887,10 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+ 
++	/*
++	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
++	 * requires PHY initialization and power-on before PHY reset deassert.
++	 */
+ 	err = phy_init(pcie->phy);
+ 	if (err) {
+ 		dev_err(dev, "failed to initialize PHY\n");
diff --git a/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch b/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch
new file mode 100644
index 0000000000..cf8e1f473b
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/404-PCI-mediatek-gen3-Move-reset-delay-in-mtk_pcie_en758.patch
@@ -0,0 +1,62 @@
+From 90d4e466c9ea2010f33880a36317a8486ccbe082 Mon Sep 17 00:00:00 2001
+Message-ID: <90d4e466c9ea2010f33880a36317a8486ccbe082.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:43 +0100
+Subject: [PATCH 4/6] PCI: mediatek-gen3: Move reset delay in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
+causing occasional PCIe link down issues. In order to overcome the
+problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and
+REG_RESET_CONTROL (0x834) registers available in the clock module
+running clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up().
+
+In order to make the code more readable, move the wait for the time
+needed to complete the PCIe reset from en7581_pci_enable() to
+mtk_pcie_en7581_power_up().
+
+Reduce reset timeout from 250ms to the standard PCIE_T_PVPERL_MS value
+(100ms) since it has no impact on the driver behavior.
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-4-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Acked-by: Stephen Boyd <sboyd at kernel.org>
+---
+ drivers/clk/clk-en7523.c                    | 1 -
+ drivers/pci/controller/pcie-mediatek-gen3.c | 7 +++++++
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -489,7 +489,6 @@ static int en7581_pci_enable(struct clk_
+ 	       REG_PCI_CONTROL_PERSTOUT;
+ 	val = readl(np_base + REG_PCI_CONTROL);
+ 	writel(val | mask, np_base + REG_PCI_CONTROL);
+-	msleep(250);
+ 
+ 	return 0;
+ }
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -936,6 +936,13 @@ static int mtk_pcie_en7581_power_up(stru
+ 		goto err_clk_prepare_enable;
+ 	}
+ 
++	/*
++	 * Airoha EN7581 performs PCIe reset via clk callbacks since it has a
++	 * hw issue with PCIE_PE_RSTB signal. Add wait for the time needed to
++	 * complete the PCIe reset.
++	 */
++	msleep(PCIE_T_PVPERL_MS);
++
+ 	return 0;
+ 
+ err_clk_prepare_enable:
diff --git a/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch b/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch
new file mode 100644
index 0000000000..cbd28e19f1
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/405-PCI-mediatek-gen3-Rely-on-msleep-in-mtk_pcie_en7581_.patch
@@ -0,0 +1,44 @@
+From c98bee18d0a094e37100c85effe5e161418f8644 Mon Sep 17 00:00:00 2001
+Message-ID: <c98bee18d0a094e37100c85effe5e161418f8644.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 8 Jan 2025 10:50:44 +0100
+Subject: [PATCH 5/6] PCI: mediatek-gen3: Rely on msleep() in
+ mtk_pcie_en7581_power_up()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Since mtk_pcie_en7581_power_up() runs in non-atomic context, rely on
+msleep() routine instead of mdelay().
+
+Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-5-21ac939a3b9b at kernel.org
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -885,7 +885,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+@@ -913,7 +913,7 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 * Wait for the time needed to complete the bulk de-assert above.
+ 	 * This time is specific for EN7581 SoC.
+ 	 */
+-	mdelay(PCIE_EN7581_RESET_TIME_MS);
++	msleep(PCIE_EN7581_RESET_TIME_MS);
+ 
+ 	pm_runtime_enable(dev);
+ 	pm_runtime_get_sync(dev);
diff --git a/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch b/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch
new file mode 100644
index 0000000000..cdc6e353aa
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/406-PCI-mediatek-gen3-Avoid-PCIe-resetting-via-PERST-for.patch
@@ -0,0 +1,131 @@
+From 491cb9c5084790aafa02e843349492c284373231 Mon Sep 17 00:00:00 2001
+Message-ID: <491cb9c5084790aafa02e843349492c284373231.1736960708.git.lorenzo at kernel.org>
+In-Reply-To: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+References: <0e7a622da17da0042294860cdb7a2fac091d25b1.1736960708.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Thu, 9 Jan 2025 00:30:45 +0100
+Subject: [PATCH 6/6] PCI: mediatek-gen3: Avoid PCIe resetting via PERST# for
+ Airoha EN7581 SoC
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Airoha EN7581 has a hw bug asserting/releasing PERST# signal causing
+occasional PCIe link down issues. In order to overcome the problem,
+PERST# signal is not asserted/released during device probe or
+suspend/resume phase and the PCIe block is reset using
+en7523_reset_assert() and en7581_pci_enable().
+
+Introduce flags field in the mtk_gen3_pcie_pdata struct in order to
+specify per-SoC capabilities.
+
+Link: https://lore.kernel.org/r/20250109-pcie-en7581-rst-fix-v4-1-4a45c89fb143 at kernel.org
+Tested-by: Hui Ma <hui.ma at airoha.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 59 ++++++++++++++-------
+ 1 file changed, 41 insertions(+), 18 deletions(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -127,10 +127,18 @@
+ 
+ struct mtk_gen3_pcie;
+ 
++enum mtk_gen3_pcie_flags {
++	SKIP_PCIE_RSTB	= BIT(0), /* Skip PERST# assertion during device
++				   * probing or suspend/resume phase to
++				   * avoid hw bugs/issues.
++				   */
++};
++
+ /**
+  * struct mtk_gen3_pcie_pdata - differentiate between host generations
+  * @power_up: pcie power_up callback
+  * @phy_resets: phy reset lines SoC data.
++ * @flags: pcie device flags.
+  */
+ struct mtk_gen3_pcie_pdata {
+ 	int (*power_up)(struct mtk_gen3_pcie *pcie);
+@@ -138,6 +146,7 @@ struct mtk_gen3_pcie_pdata {
+ 		const char *id[MAX_NUM_PHY_RESETS];
+ 		int num_resets;
+ 	} phy_resets;
++	u32 flags;
+ };
+ 
+ /**
+@@ -404,22 +413,33 @@ static int mtk_pcie_startup_port(struct
+ 	val |= PCIE_DISABLE_DVFSRC_VLT_REQ;
+ 	writel_relaxed(val, pcie->base + PCIE_MISC_CTRL_REG);
+ 
+-	/* Assert all reset signals */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
+-
+ 	/*
+-	 * Described in PCIe CEM specification sections 2.2 (PERST# Signal)
+-	 * and 2.2.1 (Initial Power-Up (G3 to S0)).
+-	 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
+-	 * for the power and clock to become stable.
++	 * Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal
++	 * causing occasional PCIe link down. In order to overcome the issue,
++	 * PCIE_RSTB signals are not asserted/released at this stage and the
++	 * PCIe block is reset using en7523_reset_assert() and
++	 * en7581_pci_enable().
+ 	 */
+-	msleep(100);
+-
+-	/* De-assert reset signals */
+-	val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert all reset signals */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++		       PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++
++		/*
++		 * Described in PCIe CEM specification revision 6.0.
++		 *
++		 * The deassertion of PERST# should be delayed 100ms (TPVPERL)
++		 * for the power and clock to become stable.
++		 */
++		msleep(PCIE_T_PVPERL_MS);
++
++		/* De-assert reset signals */
++		val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB |
++			 PCIE_PE_RSTB);
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	/* Check if the link is up or not */
+ 	err = readl_poll_timeout(pcie->base + PCIE_LINK_STATUS_REG, val,
+@@ -1178,10 +1198,12 @@ static int mtk_pcie_suspend_noirq(struct
+ 		return err;
+ 	}
+ 
+-	/* Pull down the PERST# pin */
+-	val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
+-	val |= PCIE_PE_RSTB;
+-	writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	if (!(pcie->soc->flags & SKIP_PCIE_RSTB)) {
++		/* Assert the PERST# pin */
++		val = readl_relaxed(pcie->base + PCIE_RST_CTRL_REG);
++		val |= PCIE_PE_RSTB;
++		writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
++	}
+ 
+ 	dev_dbg(pcie->dev, "entered L2 states successfully");
+ 
+@@ -1232,6 +1254,7 @@ static const struct mtk_gen3_pcie_pdata
+ 		.id[2] = "phy-lane2",
+ 		.num_resets = 3,
+ 	},
++	.flags = SKIP_PCIE_RSTB,
+ };
+ 
+ static const struct of_device_id mtk_pcie_of_match[] = {
diff --git a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch b/target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
similarity index 74%
rename from target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
rename to target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
index d896e1aee3..49b8752dca 100644
--- a/target/linux/airoha/patches-6.6/112-PCI-mediatek-gen3-configure-PBUS_CSR-registers-for-E.patch
+++ b/target/linux/airoha/patches-6.6/407-PCI-mediatek-gen3-Configure-PBUS_CSR-registers-for-E.patch
@@ -1,11 +1,9 @@
-From 2285d3b428c7d8f1c4fda2fb995e7e46a05350e0 Mon Sep 17 00:00:00 2001
-Message-ID: <2285d3b428c7d8f1c4fda2fb995e7e46a05350e0.1736324542.git.lorenzo at kernel.org>
-In-Reply-To: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
-References: <0c0ae72f5c84c5a29495337b254ac3cc2d5c16bb.1736324541.git.lorenzo at kernel.org>
+From ca4217f3117dceb2d01e179d02031a8758404624 Mon Sep 17 00:00:00 2001
+Message-ID: <ca4217f3117dceb2d01e179d02031a8758404624.1736961235.git.lorenzo at kernel.org>
 From: Lorenzo Bianconi <lorenzo at kernel.org>
 Date: Tue, 3 Sep 2024 23:14:02 +0200
-Subject: [PATCH 2/2] PCI: mediatek-gen3: configure PBUS_CSR registers for
- EN7581 SoC
+Subject: [PATCH] PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581
+ SoC
 
 Configure PBus base address and address mask in order to allow the hw
 detecting if a given address is on PCIE0, PCIE1 or PCIE2.
@@ -33,9 +31,9 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  #include <linux/reset.h>
  
  #include "../pci.h"
-@@ -120,6 +122,13 @@
+@@ -122,6 +124,13 @@
  
- #define MAX_NUM_PHY_RESETS		3
+ #define PCIE_MTK_RESET_TIME_US		10
  
 +#define PCIE_EN7581_PBUS_ADDR(_n)	(0x00 + ((_n) << 3))
 +#define PCIE_EN7581_PBUS_ADDR_MASK(_n)	(0x04 + ((_n) << 3))
@@ -47,7 +45,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  /* Time in ms needed to complete PCIe reset on EN7581 SoC */
  #define PCIE_EN7581_RESET_TIME_MS	100
  
-@@ -871,7 +880,8 @@ static int mtk_pcie_parse_port(struct mt
+@@ -893,7 +902,8 @@ static int mtk_pcie_parse_port(struct mt
  static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
  {
  	struct device *dev = pcie->dev;
@@ -57,9 +55,9 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
  	u32 val;
  
  	/*
-@@ -880,6 +890,23 @@ static int mtk_pcie_en7581_power_up(stru
- 	 */
- 	mdelay(PCIE_EN7581_RESET_TIME_MS);
+@@ -907,6 +917,23 @@ static int mtk_pcie_en7581_power_up(stru
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);
  
 +	map = syscon_regmap_lookup_by_compatible("airoha,en7581-pbus-csr");
 +	if (IS_ERR(map))
@@ -78,6 +76,6 @@ Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
 +	regmap_write(map, PCIE_EN7581_PBUS_ADDR_MASK(slot),
 +		     PCIE_EN7581_PBUS_BASE_ADDR_MASK);
 +
- 	err = phy_init(pcie->phy);
- 	if (err) {
- 		dev_err(dev, "failed to initialize PHY\n");
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+ 	 * requires PHY initialization and power-on before PHY reset deassert.
diff --git a/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch b/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch
new file mode 100644
index 0000000000..f1512a95cf
--- /dev/null
+++ b/target/linux/airoha/patches-6.6/408-PCI-mediatek-gen3-Remove-mac_reset-assert-leftover-f.patch
@@ -0,0 +1,26 @@
+From c4defe43ce17a87e6341d126ba736d9f7ebdc541 Mon Sep 17 00:00:00 2001
+Message-ID: <c4defe43ce17a87e6341d126ba736d9f7ebdc541.1736962769.git.lorenzo at kernel.org>
+From: Lorenzo Bianconi <lorenzo at kernel.org>
+Date: Wed, 15 Jan 2025 18:36:26 +0100
+Subject: [PATCH] PCI: mediatek-gen3: Remove mac_reset assert leftover for
+ Airoha EN7581 SoC.
+
+Remove a leftover assert for mac_reset line in mtk_pcie_en7581_power_up().
+This is not armful since EN7581 does not requires mac_reset and
+mac_reset is not defined in EN7581 device tree.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -912,7 +912,6 @@ static int mtk_pcie_en7581_power_up(stru
+ 	 */
+ 	reset_control_bulk_assert(pcie->soc->phy_resets.num_resets,
+ 				  pcie->phy_resets);
+-	reset_control_assert(pcie->mac_reset);
+ 
+ 	/* Wait for the time needed to complete the reset lines assert. */
+ 	msleep(PCIE_EN7581_RESET_TIME_MS);



From lede-commits at lists.infradead.org  Fri Jan 17 14:53:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 17:53:23 -0500
Subject: [openwrt/openwrt]  generic: add pending patches for RealTek Ethernet
 PHYs
In-Reply-To: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
References: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
Message-ID: <mailman.42382.1737154405.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/1019df4af919ad0c8ec8aa2b23830eb0fbdd7d62

commit 1019df4af919ad0c8ec8aa2b23830eb0fbdd7d62
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 16 20:11:43 2025 +0000

    generic: add pending patches for RealTek Ethernet PHYs
    
    Import patches to fix several issues with status reporting of RealTek
    2.5G PHYs.
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 41c164d32bedb6b27ad1fd022dec6d25338db6d6)
---
 ...ltek-clear-1000Base-T-lpa-bits-if-link-is.patch | 78 ++++++++++++++++++++++
 ...ltek-clear-master_slave_state-if-link-is-.patch | 61 +++++++++++++++++
 ...ltek-always-clear-10gbase-t-link-partner-.patch | 67 +++++++++++++++++++
 3 files changed, 206 insertions(+)

diff --git a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
new file mode 100644
index 0000000000..5bc77ed3b8
--- /dev/null
+++ b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
@@ -0,0 +1,78 @@
+From patchwork Wed Jan 15 14:43:35 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940510
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:43:35 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 1/3] net: phy: realtek: clear 1000Base-T lpa if link is
+ down
+Message-ID: 
+ <67e38eee4c46b921938fb33f5bc86c8979b9aa33.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+Only read 1000Base-T link partner advertisement if autonegotiation has
+completed and otherwise 1000Base-T link partner advertisement bits.
+
+This fixes bogus 1000Base-T link partner advertisement after link goes
+down (eg. by disconnecting the wire).
+Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 19 ++++++++-----------
+ 1 file changed, 8 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1068,23 +1068,20 @@ static int rtl822x_c45_read_status(struc
+ {
+ 	int ret, val;
+ 
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+ 	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
+ 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+ 				   RTL822X_VND2_GANLPAR);
+ 		if (val < 0)
+ 			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
+ 	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
+ 
+ 	if (!phydev->link)
+ 		return 0;
diff --git a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
new file mode 100644
index 0000000000..b7e5f8b58f
--- /dev/null
+++ b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
@@ -0,0 +1,61 @@
+From patchwork Wed Jan 15 14:43:43 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940511
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:43:43 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 2/3] net: phy: realtek: clear master_slave_state if link
+ is down
+Message-ID: 
+ <2155887c3a665e4132a034df1e9cfdeec0ae48c9.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+rtlgen_decode_physr() which sets master_slave_state isn't called in case
+the link is down and other than rtlgen_read_status(),
+rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
+
+Avoid stale master_slave_state by always setting it to
+MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
+is down.
+
+Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1083,8 +1083,10 @@ static int rtl822x_c45_read_status(struc
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	if (!phydev->link)
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+ 		return 0;
++	}
+ 
+ 	/* Read actual speed from vendor register. */
+ 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
new file mode 100644
index 0000000000..23947c2200
--- /dev/null
+++ b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
@@ -0,0 +1,67 @@
+From patchwork Wed Jan 15 14:45:00 2025
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
+X-Patchwork-Id: 13940519
+X-Patchwork-Delegate: kuba at kernel.org
+Date: Wed, 15 Jan 2025 14:45:00 +0000
+From: Daniel Golle <daniel at makrotopia.org>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"Russell King (Oracle)" <linux at armlinux.org.uk>,
+	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
+Subject: [PATCH net 3/3] net: phy: realtek: always clear NBase-T lpa
+Message-ID: 
+ <566d4771d68a1e18d2d48860e25891e468e26551.1736951652.git.daniel at makrotopia.org>
+References: <cover.1736951652.git.daniel at makrotopia.org>
+Precedence: bulk
+X-Mailing-List: netdev at vger.kernel.org
+List-Id: <netdev.vger.kernel.org>
+List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
+List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
+MIME-Version: 1.0
+Content-Disposition: inline
+In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
+X-Patchwork-Delegate: kuba at kernel.org
+
+Clear NBase-T link partner advertisement before calling
+rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
+setting speed and duplex.
+
+This fixes bogus 2.5G/5G/10G link partner advertisement and thus
+speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
+NBase-T lpa.
+
+Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -997,15 +997,15 @@ static int rtl822x_read_status(struct ph
+ {
+ 	int lpadv, ret;
+ 
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
+ 	ret = rtlgen_read_status(phydev);
+ 	if (ret < 0)
+ 		return ret;
+ 
+ 	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
+ 		return 0;
+-	}
+ 
+ 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ 	if (lpadv < 0)



From lede-commits at lists.infradead.org  Fri Jan 17 14:53:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 17:53:21 -0500
Subject: [openwrt/openwrt]  generic: r8169: remove reverted temperature sensor
 patch
In-Reply-To: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
References: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
Message-ID: <mailman.42383.1737154405.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3078b4e51b1f4cc74237234c5d613ff05be3f2cb

commit 3078b4e51b1f4cc74237234c5d613ff05be3f2cb
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 09:38:30 2025 +0100

    generic: r8169: remove reverted temperature sensor patch
    
    The patch adding temperature sensor support for r8169 has been removed upstream
    and the functionality will be added to Realtek PHY instead:
    https://github.com/torvalds/linux/commit/1f691a1fc4bef1c5cf5f503e14e1a22fc37c97e3
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 0de9999a7819acf74f6adeaa27be363cf72409ab)
---
 package/kernel/linux/modules/netdevices.mk         |  2 +-
 ...upport-for-the-temperature-sensor-being-a.patch | 83 ----------------------
 ...e-original-workaround-for-RTL8125-broken-.patch |  2 +-
 ...e-SG-TSO-on-selected-chip-versions-per-de.patch |  4 +-
 ...69-implement-additional-ethtool-stats-ops.patch |  8 +--
 ...13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch |  6 +-
 ...-r8169-remove-rtl_dash_loop_wait_high-low.patch |  6 +-
 ...0-33-v6.13-r8169-add-support-for-RTL8125D.patch | 18 ++---
 ...nconsistent-indenting-in-rtl8169_get_eth_.patch |  2 +-
 ...ve-initialization-of-RSS-registers-on-RTL.patch |  4 +-
 ...move-leftover-locks-after-reverted-change.patch | 12 ++--
 ...-40-v6.13-r8169-improve-__rtl8169_set_wol.patch |  4 +-
 ...1-v6.13-r8169-improve-rtl_set_d3_pll_down.patch |  2 +-
 ...-WAKE_PHY-handling-with-r8125-r8126-vendo.patch |  2 +-
 ...elper-r8169_mod_reg8_cond-to-simplify-rtl.patch |  2 +-
 15 files changed, 37 insertions(+), 120 deletions(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index 247f3782d5..a72ca1d89b 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -970,7 +970,7 @@ $(eval $(call KernelPackage,8139cp))
 define KernelPackage/r8169
   SUBMENU:=$(NETWORK_DEVICES_MENU)
   TITLE:=RealTek RTL-8169 PCI Gigabit Ethernet Adapter kernel support
-  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres +kmod-hwmon-core
+  DEPENDS:=@PCI_SUPPORT +kmod-mii +r8169-firmware +kmod-phy-realtek +kmod-mdio-devres
   KCONFIG:= \
     CONFIG_R8169 \
     CONFIG_R8169_LEDS=y
diff --git a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch b/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
deleted file mode 100644
index 2403da5d55..0000000000
--- a/target/linux/generic/backport-6.6/780-24-v6.13-r8169-add-support-for-the-temperature-sensor-being-a.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 1ffcc8d41306fd2e5f140b276820714a26a11cc4 Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1 at gmail.com>
-Date: Mon, 7 Oct 2024 20:34:12 +0200
-Subject: [PATCH] r8169: add support for the temperature sensor being available
- from RTL8125B
-
-This adds support for the temperature sensor being available from
-RTL8125B. Register information was taken from r8125 vendor driver.
-
-Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
-Reviewed-by: Simon Horman <horms at kernel.org>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/realtek/r8169_main.c | 44 +++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -16,6 +16,7 @@
- #include <linux/clk.h>
- #include <linux/delay.h>
- #include <linux/ethtool.h>
-+#include <linux/hwmon.h>
- #include <linux/phy.h>
- #include <linux/if_vlan.h>
- #include <linux/in.h>
-@@ -5373,6 +5374,43 @@ static bool rtl_aspm_is_safe(struct rtl8
- 	return false;
- }
- 
-+static umode_t r8169_hwmon_is_visible(const void *drvdata,
-+				      enum hwmon_sensor_types type,
-+				      u32 attr, int channel)
-+{
-+	return 0444;
-+}
-+
-+static int r8169_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
-+			    u32 attr, int channel, long *val)
-+{
-+	struct rtl8169_private *tp = dev_get_drvdata(dev);
-+	int val_raw;
-+
-+	val_raw = phy_read_paged(tp->phydev, 0xbd8, 0x12) & 0x3ff;
-+	if (val_raw >= 512)
-+		val_raw -= 1024;
-+
-+	*val = 1000 * val_raw / 2;
-+
-+	return 0;
-+}
-+
-+static const struct hwmon_ops r8169_hwmon_ops = {
-+	.is_visible =  r8169_hwmon_is_visible,
-+	.read = r8169_hwmon_read,
-+};
-+
-+static const struct hwmon_channel_info * const r8169_hwmon_info[] = {
-+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
-+	NULL
-+};
-+
-+static const struct hwmon_chip_info r8169_hwmon_chip_info = {
-+	.ops = &r8169_hwmon_ops,
-+	.info = r8169_hwmon_info,
-+};
-+
- static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
- {
- 	struct rtl8169_private *tp;
-@@ -5547,6 +5585,12 @@ static int rtl_init_one(struct pci_dev *
- 	if (rc)
- 		return rc;
- 
-+	/* The temperature sensor is available from RTl8125B */
-+	if (IS_REACHABLE(CONFIG_HWMON) && tp->mac_version >= RTL_GIGA_MAC_VER_63)
-+		/* ignore errors */
-+		devm_hwmon_device_register_with_info(&pdev->dev, "nic_temp", tp,
-+						     &r8169_hwmon_chip_info,
-+						     NULL);
- 	rc = register_netdev(dev);
- 	if (rc)
- 		return rc;
diff --git a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
index 8c6e6d8dc4..dbf66bb81e 100644
--- a/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
+++ b/target/linux/generic/backport-6.6/780-25-v6.13-r8169-remove-original-workaround-for-RTL8125-broken-.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4779,11 +4779,7 @@ static void r8169_phylink_handler(struct
+@@ -4778,11 +4778,7 @@ static void r8169_phylink_handler(struct
  	if (netif_carrier_ok(ndev)) {
  		rtl_link_chg_patch(tp);
  		pm_request_resume(d);
diff --git a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
index dc05299628..4b00eba622 100644
--- a/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
+++ b/target/linux/generic/backport-6.6/780-26-v6.13-r8169-enable-SG-TSO-on-selected-chip-versions-per-de.patch
@@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5529,11 +5529,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5491,11 +5491,6 @@ static int rtl_init_one(struct pci_dev *
  
  	dev->features |= dev->hw_features;
  
@@ -32,7 +32,7 @@ Signed-off-by: David S. Miller <davem at davemloft.net>
  	if (rtl_chip_supports_csum_v2(tp)) {
  		dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
  		netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
-@@ -5544,6 +5539,17 @@ static int rtl_init_one(struct pci_dev *
+@@ -5506,6 +5501,17 @@ static int rtl_init_one(struct pci_dev *
  		netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
  	}
  
diff --git a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
index faab0df7f4..29c8527b1c 100644
--- a/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
+++ b/target/linux/generic/backport-6.6/780-27-v6.13-r8169-implement-additional-ethtool-stats-ops.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2162,6 +2162,19 @@ static void rtl8169_get_ringparam(struct
+@@ -2161,6 +2161,19 @@ static void rtl8169_get_ringparam(struct
  	data->tx_pending = NUM_TX_DESC;
  }
  
@@ -36,7 +36,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static void rtl8169_get_pauseparam(struct net_device *dev,
  				   struct ethtool_pauseparam *data)
  {
-@@ -2188,6 +2201,69 @@ static int rtl8169_set_pauseparam(struct
+@@ -2187,6 +2200,69 @@ static int rtl8169_set_pauseparam(struct
  	return 0;
  }
  
@@ -106,7 +106,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static const struct ethtool_ops rtl8169_ethtool_ops = {
  	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
  				     ETHTOOL_COALESCE_MAX_FRAMES,
-@@ -2209,8 +2285,11 @@ static const struct ethtool_ops rtl8169_
+@@ -2208,8 +2284,11 @@ static const struct ethtool_ops rtl8169_
  	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
  	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
  	.get_ringparam		= rtl8169_get_ringparam,
@@ -118,7 +118,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  };
  
  static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
-@@ -3895,6 +3974,9 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3894,6 +3973,9 @@ static void rtl_hw_start_8125(struct rtl
  		break;
  	}
  
diff --git a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
index 38b5035441..3e495e19de 100644
--- a/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
+++ b/target/linux/generic/backport-6.6/780-28-v6.13-r8169-don-t-take-RTNL-lock-in-rtl_task.patch
@@ -18,7 +18,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4802,10 +4802,8 @@ static void rtl_task(struct work_struct
+@@ -4801,10 +4801,8 @@ static void rtl_task(struct work_struct
  		container_of(work, struct rtl8169_private, wk.work);
  	int ret;
  
@@ -30,7 +30,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  
  	if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
  		/* if chip isn't accessible, reset bus to revive it */
-@@ -4814,7 +4812,7 @@ static void rtl_task(struct work_struct
+@@ -4813,7 +4811,7 @@ static void rtl_task(struct work_struct
  			if (ret < 0) {
  				netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
  				netif_device_detach(tp->dev);
@@ -39,7 +39,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  			}
  		}
  
-@@ -4833,8 +4831,6 @@ reset:
+@@ -4832,8 +4830,6 @@ reset:
  	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
  		rtl_reset_work(tp);
  	}
diff --git a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
index 4792e371b6..0c0e80c92d 100644
--- a/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
+++ b/target/linux/generic/backport-6.6/780-31-v6.13-r8169-remove-rtl_dash_loop_wait_high-low.patch
@@ -15,7 +15,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1347,40 +1347,19 @@ static void rtl8168ep_stop_cmac(struct r
+@@ -1346,40 +1346,19 @@ static void rtl8168ep_stop_cmac(struct r
  	RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
  }
  
@@ -60,7 +60,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  }
  
  static void rtl8168_driver_start(struct rtl8169_private *tp)
-@@ -1394,7 +1373,8 @@ static void rtl8168_driver_start(struct
+@@ -1393,7 +1372,8 @@ static void rtl8168_driver_start(struct
  static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
  {
  	r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
@@ -70,7 +70,7 @@ Signed-off-by: Andrew Lunn <andrew at lunn.ch>
  }
  
  static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
-@@ -1402,7 +1382,8 @@ static void rtl8168ep_driver_stop(struct
+@@ -1401,7 +1381,8 @@ static void rtl8168ep_driver_stop(struct
  	rtl8168ep_stop_cmac(tp);
  	r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
  	r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
diff --git a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
index 81058e5e9f..687ed445da 100644
--- a/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
+++ b/target/linux/generic/backport-6.6/780-33-v6.13-r8169-add-support-for-RTL8125D.patch
@@ -29,7 +29,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	RTL_GIGA_MAC_NONE
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -56,6 +56,7 @@
+@@ -55,6 +55,7 @@
  #define FIRMWARE_8107E_2	"rtl_nic/rtl8107e-2.fw"
  #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"
  #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
@@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
  #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
  
-@@ -139,6 +140,7 @@ static const struct {
+@@ -138,6 +139,7 @@ static const struct {
  	[RTL_GIGA_MAC_VER_61] = {"RTL8125A",		FIRMWARE_8125A_3},
  	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
  	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
@@ -45,7 +45,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},
  	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},
  };
-@@ -708,6 +710,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+@@ -707,6 +709,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
  MODULE_FIRMWARE(FIRMWARE_8107E_2);
  MODULE_FIRMWARE(FIRMWARE_8125A_3);
  MODULE_FIRMWARE(FIRMWARE_8125B_2);
@@ -53,7 +53,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  MODULE_FIRMWARE(FIRMWARE_8126A_2);
  MODULE_FIRMWARE(FIRMWARE_8126A_3);
  
-@@ -2080,10 +2083,7 @@ static void rtl_set_eee_txidle_timer(str
+@@ -2079,10 +2082,7 @@ static void rtl_set_eee_txidle_timer(str
  		tp->tx_lpi_timer = timer_val;
  		r8168_mac_ocp_write(tp, 0xe048, timer_val);
  		break;
@@ -65,7 +65,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		tp->tx_lpi_timer = timer_val;
  		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
  		break;
-@@ -2295,6 +2295,9 @@ static enum mac_version rtl8169_get_mac_
+@@ -2294,6 +2294,9 @@ static enum mac_version rtl8169_get_mac_
  		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },
  		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
  
@@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		/* 8125B family. */
  		{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63 },
  
-@@ -2562,9 +2565,7 @@ static void rtl_init_rxcfg(struct rtl816
+@@ -2561,9 +2564,7 @@ static void rtl_init_rxcfg(struct rtl816
  	case RTL_GIGA_MAC_VER_61:
  		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
  		break;
@@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
  			RX_PAUSE_SLOT_ON);
  		break;
-@@ -3876,6 +3877,12 @@ static void rtl_hw_start_8125b(struct rt
+@@ -3875,6 +3876,12 @@ static void rtl_hw_start_8125b(struct rt
  	rtl_hw_start_8125_common(tp);
  }
  
@@ -99,7 +99,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static void rtl_hw_start_8126a(struct rtl8169_private *tp)
  {
  	rtl_set_def_aspm_entry_latency(tp);
-@@ -3924,6 +3931,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3923,6 +3930,7 @@ static void rtl_hw_config(struct rtl8169
  		[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
  		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
  		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
@@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
  		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
  	};
-@@ -3941,6 +3949,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3940,6 +3948,7 @@ static void rtl_hw_start_8125(struct rtl
  	/* disable interrupt coalescing */
  	switch (tp->mac_version) {
  	case RTL_GIGA_MAC_VER_61:
diff --git a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
index 721e51ebf0..2f65f066af 100644
--- a/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
+++ b/target/linux/generic/backport-6.6/780-34-v6.13-r8169-fix-inconsistent-indenting-in-rtl8169_get_eth_.patch
@@ -19,7 +19,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2227,7 +2227,7 @@ static void rtl8169_get_eth_mac_stats(st
+@@ -2226,7 +2226,7 @@ static void rtl8169_get_eth_mac_stats(st
  		le64_to_cpu(tp->counters->tx_broadcast64);
  	mac_stats->MulticastFramesReceivedOK =
  		le64_to_cpu(tp->counters->rx_multicast64);
diff --git a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
index 8cb79c82cf..c2f6d755a5 100644
--- a/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
+++ b/target/linux/generic/backport-6.6/780-38-v6.13-r8169-improve-initialization-of-RSS-registers-on-RTL.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -347,6 +347,8 @@ enum rtl8125_registers {
+@@ -346,6 +346,8 @@ enum rtl8125_registers {
  	TxPoll_8125		= 0x90,
  	LEDSEL3			= 0x96,
  	MAC0_BKP		= 0x19e0,
@@ -25,7 +25,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	EEE_TXIDLE_TIMER_8125	= 0x6048,
  };
  
-@@ -3770,8 +3772,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3769,8 +3771,8 @@ static void rtl_hw_start_8125_common(str
  	rtl_pcie_state_l2l3_disable(tp);
  
  	RTL_W16(tp, 0x382, 0x221b);
diff --git a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
index 20c42955e3..c3e9398901 100644
--- a/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
+++ b/target/linux/generic/backport-6.6/780-39-v6.13-r8169-remove-leftover-locks-after-reverted-change.patch
@@ -15,7 +15,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -663,13 +663,9 @@ struct rtl8169_private {
+@@ -662,13 +662,9 @@ struct rtl8169_private {
  		struct work_struct work;
  	} wk;
  
@@ -29,7 +29,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	unsigned supports_gmii:1;
  	unsigned aspm_manageable:1;
  	unsigned dash_enabled:1;
-@@ -723,22 +719,12 @@ static inline struct device *tp_to_dev(s
+@@ -722,22 +718,12 @@ static inline struct device *tp_to_dev(s
  
  static void rtl_lock_config_regs(struct rtl8169_private *tp)
  {
@@ -54,7 +54,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  }
  
  static void rtl_pci_commit(struct rtl8169_private *tp)
-@@ -749,24 +735,18 @@ static void rtl_pci_commit(struct rtl816
+@@ -748,24 +734,18 @@ static void rtl_pci_commit(struct rtl816
  
  static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
  {
@@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  }
  
  static bool rtl_is_8125(struct rtl8169_private *tp)
-@@ -1572,7 +1552,6 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1571,7 +1551,6 @@ static void __rtl8169_set_wol(struct rtl
  		{ WAKE_MAGIC, Config3, MagicPacket }
  	};
  	unsigned int i, tmp = ARRAY_SIZE(cfg);
@@ -87,7 +87,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  	u8 options;
  
  	rtl_unlock_config_regs(tp);
-@@ -1591,14 +1570,12 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1590,14 +1569,12 @@ static void __rtl8169_set_wol(struct rtl
  			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
  	}
  
@@ -102,7 +102,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  
  	switch (tp->mac_version) {
  	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-@@ -5498,8 +5475,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5460,8 +5437,6 @@ static int rtl_init_one(struct pci_dev *
  	tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
  	tp->ocp_base = OCP_STD_PHY_BASE;
  
diff --git a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
index 8c88c078f2..e468d637c9 100644
--- a/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
+++ b/target/linux/generic/backport-6.6/780-40-v6.13-r8169-improve-__rtl8169_set_wol.patch
@@ -16,7 +16,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -749,6 +749,20 @@ static void rtl_mod_config5(struct rtl81
+@@ -748,6 +748,20 @@ static void rtl_mod_config5(struct rtl81
  	RTL_W8(tp, Config5, (val & ~clear) | set);
  }
  
@@ -37,7 +37,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static bool rtl_is_8125(struct rtl8169_private *tp)
  {
  	return tp->mac_version >= RTL_GIGA_MAC_VER_61;
-@@ -1539,58 +1553,37 @@ static void rtl8169_get_wol(struct net_d
+@@ -1538,58 +1552,37 @@ static void rtl8169_get_wol(struct net_d
  
  static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
  {
diff --git a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
index e762617310..aeafebb214 100644
--- a/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
+++ b/target/linux/generic/backport-6.6/780-41-v6.13-r8169-improve-rtl_set_d3_pll_down.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1432,19 +1432,11 @@ static enum rtl_dash_type rtl_get_dash_t
+@@ -1431,19 +1431,11 @@ static enum rtl_dash_type rtl_get_dash_t
  
  static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
  {
diff --git a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
index de86c2f6cd..26c362dd6c 100644
--- a/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
+++ b/target/linux/generic/backport-6.6/780-42-v6.13-r8169-align-WAKE_PHY-handling-with-r8125-r8126-vendo.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1563,6 +1563,9 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1562,6 +1562,9 @@ static void __rtl8169_set_wol(struct rtl
  	}
  
  	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
diff --git a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
index 5bcf06098a..bdeb46eeb8 100644
--- a/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
+++ b/target/linux/generic/backport-6.6/780-43-v6.13-r8169-use-helper-r8169_mod_reg8_cond-to-simplify-rtl.patch
@@ -17,7 +17,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 
 --- a/drivers/net/ethernet/realtek/r8169_main.c
 +++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2547,86 +2547,31 @@ static void rtl8169_init_ring_indexes(st
+@@ -2546,86 +2546,31 @@ static void rtl8169_init_ring_indexes(st
  	tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
  }
  



From lede-commits at lists.infradead.org  Fri Jan 17 14:53:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 17:53:22 -0500
Subject: [openwrt/openwrt]  generic: backport Realtek PHY patches from
 upstream
In-Reply-To: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
References: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
Message-ID: <mailman.42386.1737154407.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7cace002baaf5dc91c9c716c99597fcd65b30b61

commit 7cace002baaf5dc91c9c716c99597fcd65b30b61
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 09:56:34 2025 +0100

    generic: backport Realtek PHY patches from upstream
    
    Adds patches for the temperature sensor on RTL822x.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit d7e82c78d7a2a84404198dab8faf8e142939eb05)
---
 package/kernel/linux/modules/netdevices.mk         |    7 +-
 ...ltek-add-support-for-reading-MDIO_MMD_VEN.patch |   47 +
 ...e-realtek-PHY-driver-to-its-own-subdirect.patch | 3249 ++++++++++++++++++++
 ...ltek-add-hwmon-support-for-temp-sensor-on.patch |  180 ++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch |   22 +-
 ...ek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch |   10 +-
 ...ltek-make-sure-paged-read-is-protected-by.patch |    8 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch |   36 +-
 ...-realtek-detect-early-version-of-RTL8221B.patch |    6 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |   24 +-
 .../500-gsw-rtl8367s-mt7622-support.patch          |    4 +-
 .../patches-6.6/735-net-phy-realtek-rtl8261n.patch |    8 +-
 .../realtek/patches-6.6/720-add-rtl-phy.patch      |    8 +-
 13 files changed, 3543 insertions(+), 66 deletions(-)

diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk
index a72ca1d89b..4cfda093ca 100644
--- a/package/kernel/linux/modules/netdevices.mk
+++ b/package/kernel/linux/modules/netdevices.mk
@@ -447,9 +447,10 @@ $(eval $(call KernelPackage,phy-micrel))
 define KernelPackage/phy-realtek
    SUBMENU:=$(NETWORK_DEVICES_MENU)
    TITLE:=Realtek Ethernet PHY driver
-   KCONFIG:=CONFIG_REALTEK_PHY
-   DEPENDS:=+kmod-libphy
-   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek.ko
+   KCONFIG:=CONFIG_REALTEK_PHY \
+    CONFIG_REALTEK_PHY_HWMON=y
+   DEPENDS:=+kmod-libphy +kmod-hwmon-core
+   FILES:=$(LINUX_DIR)/drivers/net/phy/realtek/realtek.ko
    AUTOLOAD:=$(call AutoLoad,18,realtek,1)
 endef
 
diff --git a/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
new file mode 100644
index 0000000000..2add672f44
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
@@ -0,0 +1,47 @@
+From 3d483a10327f38595f714f9f9e9dde43a622cb0f Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:49:31 +0100
+Subject: [PATCH] net: phy: realtek: add support for reading MDIO_MMD_VEND2
+ regs on RTL8125/RTL8126
+
+RTL8125/RTL8126 don't support MMD access to the internal PHY, but
+provide a mechanism to access at least all MDIO_MMD_VEND2 registers.
+By exposing this mechanism standard MMD access functions can be used
+to access the MDIO_MMD_VEND2 registers.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/e821b302-5fe6-49ab-aabd-05da500581c0 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/realtek.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -736,7 +736,11 @@ static int rtlgen_read_mmd(struct phy_de
+ {
+ 	int ret;
+ 
+-	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+ 		rtl821x_write_page(phydev, 0xa5c);
+ 		ret = __phy_read(phydev, 0x12);
+ 		rtl821x_write_page(phydev, 0);
+@@ -760,7 +764,11 @@ static int rtlgen_write_mmd(struct phy_d
+ {
+ 	int ret;
+ 
+-	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+ 		rtl821x_write_page(phydev, 0xa5d);
+ 		ret = __phy_write(phydev, 0x10, val);
+ 		rtl821x_write_page(phydev, 0);
diff --git a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
new file mode 100644
index 0000000000..b410ab8a32
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
@@ -0,0 +1,3249 @@
+From 1416a9b2ba710d31954131c06d46f298e340aa2c Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:50:19 +0100
+Subject: [PATCH] net: phy: move realtek PHY driver to its own subdirectory
+
+In preparation of adding a source file with hwmon support, move the
+Realtek PHY driver to its own subdirectory and rename realtek.c to
+realtek_main.c.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/c566551b-c915-4e34-9b33-129a6ddd6e4c at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/Kconfig                               | 5 +----
+ drivers/net/phy/Makefile                              | 2 +-
+ drivers/net/phy/realtek/Kconfig                       | 5 +++++
+ drivers/net/phy/realtek/Makefile                      | 3 +++
+ drivers/net/phy/{realtek.c => realtek/realtek_main.c} | 0
+ 5 files changed, 10 insertions(+), 5 deletions(-)
+ create mode 100644 drivers/net/phy/realtek/Kconfig
+ create mode 100644 drivers/net/phy/realtek/Makefile
+ rename drivers/net/phy/{realtek.c => realtek/realtek_main.c} (100%)
+
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -325,10 +325,7 @@ config QSEMI_PHY
+ 	help
+ 	  Currently supports the qs6612
+ 
+-config REALTEK_PHY
+-	tristate "Realtek PHYs"
+-	help
+-	  Supports the Realtek 821x PHY.
++source "drivers/net/phy/realtek/Kconfig"
+ 
+ config RENESAS_PHY
+ 	tristate "Renesas PHYs"
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -83,7 +83,7 @@ obj-$(CONFIG_NXP_CBTX_PHY)	+= nxp-cbtx.o
+ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja11xx.o
+ obj-y				+= qcom/
+ obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
+-obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
++obj-$(CONFIG_REALTEK_PHY)	+= realtek/
+ obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
+ obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
+ obj-$(CONFIG_SMSC_PHY)		+= smsc.o
+--- /dev/null
++++ b/drivers/net/phy/realtek/Kconfig
+@@ -0,0 +1,5 @@
++# SPDX-License-Identifier: GPL-2.0-only
++config REALTEK_PHY
++	tristate "Realtek PHYs"
++	help
++	  Currently supports RTL821x/RTL822x and fast ethernet PHYs
+--- /dev/null
++++ b/drivers/net/phy/realtek/Makefile
+@@ -0,0 +1,3 @@
++# SPDX-License-Identifier: GPL-2.0
++realtek-y			+= realtek_main.o
++obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+--- a/drivers/net/phy/realtek.c
++++ /dev/null
+@@ -1,1590 +0,0 @@
+-// SPDX-License-Identifier: GPL-2.0+
+-/* drivers/net/phy/realtek.c
+- *
+- * Driver for Realtek PHYs
+- *
+- * Author: Johnson Leung <r58129 at freescale.com>
+- *
+- * Copyright (c) 2004 Freescale Semiconductor, Inc.
+- */
+-#include <linux/bitops.h>
+-#include <linux/of.h>
+-#include <linux/phy.h>
+-#include <linux/module.h>
+-#include <linux/delay.h>
+-#include <linux/clk.h>
+-
+-#define RTL821x_PHYSR				0x11
+-#define RTL821x_PHYSR_DUPLEX			BIT(13)
+-#define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
+-
+-#define RTL821x_INER				0x12
+-#define RTL8211B_INER_INIT			0x6400
+-#define RTL8211E_INER_LINK_STATUS		BIT(10)
+-#define RTL8211F_INER_LINK_STATUS		BIT(4)
+-
+-#define RTL821x_INSR				0x13
+-
+-#define RTL821x_EXT_PAGE_SELECT			0x1e
+-#define RTL821x_PAGE_SELECT			0x1f
+-
+-#define RTL8211F_PHYCR1				0x18
+-#define RTL8211F_PHYCR2				0x19
+-#define RTL8211F_INSR				0x1d
+-
+-#define RTL8211F_LEDCR				0x10
+-#define RTL8211F_LEDCR_MODE			BIT(15)
+-#define RTL8211F_LEDCR_ACT_TXRX			BIT(4)
+-#define RTL8211F_LEDCR_LINK_1000		BIT(3)
+-#define RTL8211F_LEDCR_LINK_100			BIT(1)
+-#define RTL8211F_LEDCR_LINK_10			BIT(0)
+-#define RTL8211F_LEDCR_MASK			GENMASK(4, 0)
+-#define RTL8211F_LEDCR_SHIFT			5
+-
+-#define RTL8211F_TX_DELAY			BIT(8)
+-#define RTL8211F_RX_DELAY			BIT(3)
+-
+-#define RTL8211F_ALDPS_PLL_OFF			BIT(1)
+-#define RTL8211F_ALDPS_ENABLE			BIT(2)
+-#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)
+-
+-#define RTL8211E_CTRL_DELAY			BIT(13)
+-#define RTL8211E_TX_DELAY			BIT(12)
+-#define RTL8211E_RX_DELAY			BIT(11)
+-
+-#define RTL8211F_CLKOUT_EN			BIT(0)
+-
+-#define RTL8201F_ISR				0x1e
+-#define RTL8201F_ISR_ANERR			BIT(15)
+-#define RTL8201F_ISR_DUPLEX			BIT(13)
+-#define RTL8201F_ISR_LINK			BIT(11)
+-#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \
+-						 RTL8201F_ISR_DUPLEX | \
+-						 RTL8201F_ISR_LINK)
+-#define RTL8201F_IER				0x13
+-
+-#define RTL822X_VND1_SERDES_OPTION			0x697a
+-#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)
+-#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII		0
+-#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX		2
+-
+-#define RTL822X_VND1_SERDES_CTRL3			0x7580
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK		GENMASK(5, 0)
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
+-#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
+-
+-/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
+- * is set, they cannot be accessed by C45-over-C22.
+- */
+-#define RTL822X_VND2_GBCR				0xa412
+-
+-#define RTL822X_VND2_GANLPAR				0xa414
+-
+-#define RTL8366RB_POWER_SAVE			0x15
+-#define RTL8366RB_POWER_SAVE_ON			BIT(12)
+-
+-#define RTL9000A_GINMR				0x14
+-#define RTL9000A_GINMR_LINK_STATUS		BIT(4)
+-
+-#define RTL_VND2_PHYSR				0xa434
+-#define RTL_VND2_PHYSR_DUPLEX			BIT(3)
+-#define RTL_VND2_PHYSR_SPEEDL			GENMASK(5, 4)
+-#define RTL_VND2_PHYSR_SPEEDH			GENMASK(10, 9)
+-#define RTL_VND2_PHYSR_MASTER			BIT(11)
+-#define RTL_VND2_PHYSR_SPEED_MASK		(RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+-
+-#define RTL_GENERIC_PHYID			0x001cc800
+-#define RTL_8211FVD_PHYID			0x001cc878
+-#define RTL_8221B				0x001cc840
+-#define RTL_8221B_VB_CG				0x001cc849
+-#define RTL_8221B_VN_CG				0x001cc84a
+-#define RTL_8251B				0x001cc862
+-
+-#define RTL8211F_LED_COUNT			3
+-
+-MODULE_DESCRIPTION("Realtek PHY driver");
+-MODULE_AUTHOR("Johnson Leung");
+-MODULE_LICENSE("GPL");
+-
+-struct rtl821x_priv {
+-	u16 phycr1;
+-	u16 phycr2;
+-	bool has_phycr2;
+-	struct clk *clk;
+-};
+-
+-static int rtl821x_read_page(struct phy_device *phydev)
+-{
+-	return __phy_read(phydev, RTL821x_PAGE_SELECT);
+-}
+-
+-static int rtl821x_write_page(struct phy_device *phydev, int page)
+-{
+-	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
+-}
+-
+-static int rtl821x_probe(struct phy_device *phydev)
+-{
+-	struct device *dev = &phydev->mdio.dev;
+-	struct rtl821x_priv *priv;
+-	u32 phy_id = phydev->drv->phy_id;
+-	int ret;
+-
+-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+-	if (!priv)
+-		return -ENOMEM;
+-
+-	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
+-	if (IS_ERR(priv->clk))
+-		return dev_err_probe(dev, PTR_ERR(priv->clk),
+-				     "failed to get phy clock\n");
+-
+-	ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
+-	if (ret < 0)
+-		return ret;
+-
+-	priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF);
+-	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
+-		priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF;
+-
+-	priv->has_phycr2 = !(phy_id == RTL_8211FVD_PHYID);
+-	if (priv->has_phycr2) {
+-		ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2);
+-		if (ret < 0)
+-			return ret;
+-
+-		priv->phycr2 = ret & RTL8211F_CLKOUT_EN;
+-		if (of_property_read_bool(dev->of_node, "realtek,clkout-disable"))
+-			priv->phycr2 &= ~RTL8211F_CLKOUT_EN;
+-	}
+-
+-	phydev->priv = priv;
+-
+-	return 0;
+-}
+-
+-static int rtl8201_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL8201F_ISR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl821x_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL821x_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl8211f_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl8201_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl8201_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = BIT(13) | BIT(12) | BIT(11);
+-		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
+-	} else {
+-		val = 0;
+-		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl8201_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211b_config_intr(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl821x_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		err = phy_write(phydev, RTL821x_INER,
+-				RTL8211B_INER_INIT);
+-	} else {
+-		err = phy_write(phydev, RTL821x_INER, 0);
+-		if (err)
+-			return err;
+-
+-		err = rtl821x_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211e_config_intr(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl821x_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		err = phy_write(phydev, RTL821x_INER,
+-				RTL8211E_INER_LINK_STATUS);
+-	} else {
+-		err = phy_write(phydev, RTL821x_INER, 0);
+-		if (err)
+-			return err;
+-
+-		err = rtl821x_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static int rtl8211f_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl8211f_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = RTL8211F_INER_LINK_STATUS;
+-		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
+-	} else {
+-		val = 0;
+-		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl8211f_ack_interrupt(phydev);
+-	}
+-
+-	return err;
+-}
+-
+-static irqreturn_t rtl8201_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read(phydev, RTL8201F_ISR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8201F_ISR_MASK))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t rtl821x_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status, irq_enabled;
+-
+-	irq_status = phy_read(phydev, RTL821x_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	irq_enabled = phy_read(phydev, RTL821x_INER);
+-	if (irq_enabled < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & irq_enabled))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t rtl8211f_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static int rtl8211_config_aneg(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = genphy_config_aneg(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	/* Quirk was copied from vendor driver. Unfortunately it includes no
+-	 * description of the magic numbers.
+-	 */
+-	if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
+-		phy_write(phydev, 0x17, 0x2138);
+-		phy_write(phydev, 0x0e, 0x0260);
+-	} else {
+-		phy_write(phydev, 0x17, 0x2108);
+-		phy_write(phydev, 0x0e, 0x0000);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl8211c_config_init(struct phy_device *phydev)
+-{
+-	/* RTL8211C has an issue when operating in Gigabit slave mode */
+-	return phy_set_bits(phydev, MII_CTRL1000,
+-			    CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
+-}
+-
+-static int rtl8211f_config_init(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	struct device *dev = &phydev->mdio.dev;
+-	u16 val_txdly, val_rxdly;
+-	int ret;
+-
+-	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
+-				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
+-				       priv->phycr1);
+-	if (ret < 0) {
+-		dev_err(dev, "aldps mode  configuration failed: %pe\n",
+-			ERR_PTR(ret));
+-		return ret;
+-	}
+-
+-	switch (phydev->interface) {
+-	case PHY_INTERFACE_MODE_RGMII:
+-		val_txdly = 0;
+-		val_rxdly = 0;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_RXID:
+-		val_txdly = 0;
+-		val_rxdly = RTL8211F_RX_DELAY;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_TXID:
+-		val_txdly = RTL8211F_TX_DELAY;
+-		val_rxdly = 0;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_RGMII_ID:
+-		val_txdly = RTL8211F_TX_DELAY;
+-		val_rxdly = RTL8211F_RX_DELAY;
+-		break;
+-
+-	default: /* the rest of the modes imply leaving delay as is. */
+-		return 0;
+-	}
+-
+-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,
+-				       val_txdly);
+-	if (ret < 0) {
+-		dev_err(dev, "Failed to update the TX delay register\n");
+-		return ret;
+-	} else if (ret) {
+-		dev_dbg(dev,
+-			"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
+-			val_txdly ? "Enabling" : "Disabling");
+-	} else {
+-		dev_dbg(dev,
+-			"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
+-			val_txdly ? "enabled" : "disabled");
+-	}
+-
+-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
+-				       val_rxdly);
+-	if (ret < 0) {
+-		dev_err(dev, "Failed to update the RX delay register\n");
+-		return ret;
+-	} else if (ret) {
+-		dev_dbg(dev,
+-			"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
+-			val_rxdly ? "Enabling" : "Disabling");
+-	} else {
+-		dev_dbg(dev,
+-			"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
+-			val_rxdly ? "enabled" : "disabled");
+-	}
+-
+-	if (priv->has_phycr2) {
+-		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+-				       RTL8211F_CLKOUT_EN, priv->phycr2);
+-		if (ret < 0) {
+-			dev_err(dev, "clkout configuration failed: %pe\n",
+-				ERR_PTR(ret));
+-			return ret;
+-		}
+-
+-		return genphy_soft_reset(phydev);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl821x_suspend(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	int ret = 0;
+-
+-	if (!phydev->wol_enabled) {
+-		ret = genphy_suspend(phydev);
+-
+-		if (ret)
+-			return ret;
+-
+-		clk_disable_unprepare(priv->clk);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl821x_resume(struct phy_device *phydev)
+-{
+-	struct rtl821x_priv *priv = phydev->priv;
+-	int ret;
+-
+-	if (!phydev->wol_enabled)
+-		clk_prepare_enable(priv->clk);
+-
+-	ret = genphy_resume(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	msleep(20);
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,
+-					unsigned long rules)
+-{
+-	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |
+-				   BIT(TRIGGER_NETDEV_LINK_100) |
+-				   BIT(TRIGGER_NETDEV_LINK_1000) |
+-				   BIT(TRIGGER_NETDEV_RX) |
+-				   BIT(TRIGGER_NETDEV_TX);
+-
+-	/* The RTL8211F PHY supports these LED settings on up to three LEDs:
+-	 * - Link: Configurable subset of 10/100/1000 link rates
+-	 * - Active: Blink on activity, RX or TX is not differentiated
+-	 * The Active option has two modes, A and B:
+-	 * - A: Link and Active indication at configurable, but matching,
+-	 *      subset of 10/100/1000 link rates
+-	 * - B: Link indication at configurable subset of 10/100/1000 link
+-	 *      rates and Active indication always at all three 10+100+1000
+-	 *      link rates.
+-	 * This code currently uses mode B only.
+-	 */
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	/* Filter out any other unsupported triggers. */
+-	if (rules & ~mask)
+-		return -EOPNOTSUPP;
+-
+-	/* RX and TX are not differentiated, either both are set or not set. */
+-	if (!(rules & BIT(TRIGGER_NETDEV_RX)) ^ !(rules & BIT(TRIGGER_NETDEV_TX)))
+-		return -EOPNOTSUPP;
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,
+-				       unsigned long *rules)
+-{
+-	int val;
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
+-	if (val < 0)
+-		return val;
+-
+-	val >>= RTL8211F_LEDCR_SHIFT * index;
+-	val &= RTL8211F_LEDCR_MASK;
+-
+-	if (val & RTL8211F_LEDCR_LINK_10)
+-		set_bit(TRIGGER_NETDEV_LINK_10, rules);
+-
+-	if (val & RTL8211F_LEDCR_LINK_100)
+-		set_bit(TRIGGER_NETDEV_LINK_100, rules);
+-
+-	if (val & RTL8211F_LEDCR_LINK_1000)
+-		set_bit(TRIGGER_NETDEV_LINK_1000, rules);
+-
+-	if (val & RTL8211F_LEDCR_ACT_TXRX) {
+-		set_bit(TRIGGER_NETDEV_RX, rules);
+-		set_bit(TRIGGER_NETDEV_TX, rules);
+-	}
+-
+-	return 0;
+-}
+-
+-static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,
+-				       unsigned long rules)
+-{
+-	const u16 mask = RTL8211F_LEDCR_MASK << (RTL8211F_LEDCR_SHIFT * index);
+-	u16 reg = 0;
+-
+-	if (index >= RTL8211F_LED_COUNT)
+-		return -EINVAL;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_10;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_100;
+-
+-	if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
+-		reg |= RTL8211F_LEDCR_LINK_1000;
+-
+-	if (test_bit(TRIGGER_NETDEV_RX, &rules) ||
+-	    test_bit(TRIGGER_NETDEV_TX, &rules)) {
+-		reg |= RTL8211F_LEDCR_ACT_TXRX;
+-	}
+-
+-	reg <<= RTL8211F_LEDCR_SHIFT * index;
+-	reg |= RTL8211F_LEDCR_MODE;	 /* Mode B */
+-
+-	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);
+-}
+-
+-static int rtl8211e_config_init(struct phy_device *phydev)
+-{
+-	int ret = 0, oldpage;
+-	u16 val;
+-
+-	/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
+-	switch (phydev->interface) {
+-	case PHY_INTERFACE_MODE_RGMII:
+-		val = RTL8211E_CTRL_DELAY | 0;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_ID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_RXID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
+-		break;
+-	case PHY_INTERFACE_MODE_RGMII_TXID:
+-		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
+-		break;
+-	default: /* the rest of the modes imply leaving delays as is. */
+-		return 0;
+-	}
+-
+-	/* According to a sample driver there is a 0x1c config register on the
+-	 * 0xa4 extension page (0x7) layout. It can be used to disable/enable
+-	 * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
+-	 * The configuration register definition:
+-	 * 14 = reserved
+-	 * 13 = Force Tx RX Delay controlled by bit12 bit11,
+-	 * 12 = RX Delay, 11 = TX Delay
+-	 * 10:0 = Test && debug settings reserved by realtek
+-	 */
+-	oldpage = phy_select_page(phydev, 0x7);
+-	if (oldpage < 0)
+-		goto err_restore_page;
+-
+-	ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4);
+-	if (ret)
+-		goto err_restore_page;
+-
+-	ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
+-			   | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
+-			   val);
+-
+-err_restore_page:
+-	return phy_restore_page(phydev, oldpage, ret);
+-}
+-
+-static int rtl8211b_suspend(struct phy_device *phydev)
+-{
+-	phy_write(phydev, MII_MMD_DATA, BIT(9));
+-
+-	return genphy_suspend(phydev);
+-}
+-
+-static int rtl8211b_resume(struct phy_device *phydev)
+-{
+-	phy_write(phydev, MII_MMD_DATA, 0);
+-
+-	return genphy_resume(phydev);
+-}
+-
+-static int rtl8366rb_config_init(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
+-			   RTL8366RB_POWER_SAVE_ON);
+-	if (ret) {
+-		dev_err(&phydev->mdio.dev,
+-			"error enabling power management\n");
+-	}
+-
+-	return ret;
+-}
+-
+-/* get actual speed to cover the downshift case */
+-static void rtlgen_decode_physr(struct phy_device *phydev, int val)
+-{
+-	/* bit 3
+-	 * 0: Half Duplex
+-	 * 1: Full Duplex
+-	 */
+-	if (val & RTL_VND2_PHYSR_DUPLEX)
+-		phydev->duplex = DUPLEX_FULL;
+-	else
+-		phydev->duplex = DUPLEX_HALF;
+-
+-	switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
+-	case 0x0000:
+-		phydev->speed = SPEED_10;
+-		break;
+-	case 0x0010:
+-		phydev->speed = SPEED_100;
+-		break;
+-	case 0x0020:
+-		phydev->speed = SPEED_1000;
+-		break;
+-	case 0x0200:
+-		phydev->speed = SPEED_10000;
+-		break;
+-	case 0x0210:
+-		phydev->speed = SPEED_2500;
+-		break;
+-	case 0x0220:
+-		phydev->speed = SPEED_5000;
+-		break;
+-	default:
+-		break;
+-	}
+-
+-	/* bit 11
+-	 * 0: Slave Mode
+-	 * 1: Master Mode
+-	 */
+-	if (phydev->speed >= 1000) {
+-		if (val & RTL_VND2_PHYSR_MASTER)
+-			phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
+-		else
+-			phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
+-	} else {
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
+-	}
+-}
+-
+-static int rtlgen_read_status(struct phy_device *phydev)
+-{
+-	int ret, val;
+-
+-	ret = genphy_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (!phydev->link)
+-		return 0;
+-
+-	val = phy_read_paged(phydev, 0xa43, 0x12);
+-	if (val < 0)
+-		return val;
+-
+-	rtlgen_decode_physr(phydev, val);
+-
+-	return 0;
+-}
+-
+-static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+-{
+-	int ret;
+-
+-	if (devnum == MDIO_MMD_VEND2) {
+-		rtl821x_write_page(phydev, regnum >> 4);
+-		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+-		rtl821x_write_page(phydev, 0xa5c);
+-		ret = __phy_read(phydev, 0x12);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_read(phydev, 0x10);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_read(phydev, 0x11);
+-		rtl821x_write_page(phydev, 0);
+-	} else {
+-		ret = -EOPNOTSUPP;
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
+-			    u16 val)
+-{
+-	int ret;
+-
+-	if (devnum == MDIO_MMD_VEND2) {
+-		rtl821x_write_page(phydev, regnum >> 4);
+-		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+-		rtl821x_write_page(phydev, 0xa5d);
+-		ret = __phy_write(phydev, 0x10, val);
+-		rtl821x_write_page(phydev, 0);
+-	} else {
+-		ret = -EOPNOTSUPP;
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+-{
+-	int ret = rtlgen_read_mmd(phydev, devnum, regnum);
+-
+-	if (ret != -EOPNOTSUPP)
+-		return ret;
+-
+-	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
+-		rtl821x_write_page(phydev, 0xa6e);
+-		ret = __phy_read(phydev, 0x16);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_read(phydev, 0x12);
+-		rtl821x_write_page(phydev, 0);
+-	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_read(phydev, 0x10);
+-		rtl821x_write_page(phydev, 0);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
+-			     u16 val)
+-{
+-	int ret = rtlgen_write_mmd(phydev, devnum, regnum, val);
+-
+-	if (ret != -EOPNOTSUPP)
+-		return ret;
+-
+-	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+-		rtl821x_write_page(phydev, 0xa6d);
+-		ret = __phy_write(phydev, 0x12, val);
+-		rtl821x_write_page(phydev, 0);
+-	}
+-
+-	return ret;
+-}
+-
+-static int rtl822xb_config_init(struct phy_device *phydev)
+-{
+-	bool has_2500, has_sgmii;
+-	u16 mode;
+-	int ret;
+-
+-	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
+-			    phydev->host_interfaces) ||
+-		   phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
+-
+-	has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
+-			     phydev->host_interfaces) ||
+-		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
+-
+-	/* fill in possible interfaces */
+-	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+-		     has_2500);
+-	__assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
+-		     has_sgmii);
+-
+-	if (!has_2500 && !has_sgmii)
+-		return 0;
+-
+-	/* determine SerDes option mode */
+-	if (has_2500 && !has_sgmii) {
+-		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
+-		phydev->rate_matching = RATE_MATCH_PAUSE;
+-	} else {
+-		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
+-		phydev->rate_matching = RATE_MATCH_NONE;
+-	}
+-
+-	/* the following sequence with magic numbers sets up the SerDes
+-	 * option mode
+-	 */
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
+-				     RTL822X_VND1_SERDES_OPTION,
+-				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,
+-				     mode);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
+-	if (ret < 0)
+-		return ret;
+-
+-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
+-	if (ret < 0)
+-		return ret;
+-
+-	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
+-}
+-
+-static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+-				      phy_interface_t iface)
+-{
+-	int val;
+-
+-	/* Only rate matching at 2500base-x */
+-	if (iface != PHY_INTERFACE_MODE_2500BASEX)
+-		return RATE_MATCH_NONE;
+-
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
+-	if (val < 0)
+-		return val;
+-
+-	if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
+-	    RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
+-		return RATE_MATCH_PAUSE;
+-
+-	/* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
+-	return RATE_MATCH_NONE;
+-}
+-
+-static int rtl822x_get_features(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	val = phy_read_paged(phydev, 0xa61, 0x13);
+-	if (val < 0)
+-		return val;
+-
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_PMA_SPEED_2_5G);
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_PMA_SPEED_5G);
+-	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
+-			 phydev->supported, val & MDIO_SPEED_10G);
+-
+-	return genphy_read_abilities(phydev);
+-}
+-
+-static int rtl822x_config_aneg(struct phy_device *phydev)
+-{
+-	int ret = 0;
+-
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
+-
+-		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+-					       MDIO_AN_10GBT_CTRL_ADV2_5G |
+-					       MDIO_AN_10GBT_CTRL_ADV5G,
+-					       adv);
+-		if (ret < 0)
+-			return ret;
+-	}
+-
+-	return __genphy_config_aneg(phydev, ret);
+-}
+-
+-static void rtl822xb_update_interface(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	if (!phydev->link)
+-		return;
+-
+-	/* Change interface according to serdes mode */
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
+-	if (val < 0)
+-		return;
+-
+-	switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
+-	case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
+-		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+-		break;
+-	case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
+-		phydev->interface = PHY_INTERFACE_MODE_SGMII;
+-		break;
+-	}
+-}
+-
+-static int rtl822x_read_status(struct phy_device *phydev)
+-{
+-	int lpadv, ret;
+-
+-	ret = rtlgen_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-		return 0;
+-	}
+-
+-	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+-	if (lpadv < 0)
+-		return lpadv;
+-
+-	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
+-
+-	return 0;
+-}
+-
+-static int rtl822xb_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = rtl822x_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	rtl822xb_update_interface(phydev);
+-
+-	return 0;
+-}
+-
+-static int rtl822x_c45_get_features(struct phy_device *phydev)
+-{
+-	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+-			 phydev->supported);
+-
+-	return genphy_c45_pma_read_abilities(phydev);
+-}
+-
+-static int rtl822x_c45_config_aneg(struct phy_device *phydev)
+-{
+-	bool changed = false;
+-	int ret, val;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE)
+-		return genphy_c45_pma_setup_forced(phydev);
+-
+-	ret = genphy_c45_an_config_aneg(phydev);
+-	if (ret < 0)
+-		return ret;
+-	if (ret > 0)
+-		changed = true;
+-
+-	val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+-
+-	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
+-				     ADVERTISE_1000FULL, val);
+-	if (ret < 0)
+-		return ret;
+-	if (ret > 0)
+-		changed = true;
+-
+-	return genphy_c45_check_and_restart_aneg(phydev, changed);
+-}
+-
+-static int rtl822x_c45_read_status(struct phy_device *phydev)
+-{
+-	int ret, val;
+-
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+-	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+-				   RTL822X_VND2_GANLPAR);
+-		if (val < 0)
+-			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+-	}
+-
+-	if (!phydev->link)
+-		return 0;
+-
+-	/* Read actual speed from vendor register. */
+-	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
+-	if (val < 0)
+-		return val;
+-
+-	rtlgen_decode_physr(phydev, val);
+-
+-	return 0;
+-}
+-
+-static int rtl822xb_c45_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	ret = rtl822x_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	rtl822xb_update_interface(phydev);
+-
+-	return 0;
+-}
+-
+-static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	phy_write(phydev, RTL821x_PAGE_SELECT, 0xa61);
+-	val = phy_read(phydev, 0x13);
+-	phy_write(phydev, RTL821x_PAGE_SELECT, 0);
+-
+-	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
+-}
+-
+-/* On internal PHY's MMD reads over C22 always return 0.
+- * Check a MMD register which is known to be non-zero.
+- */
+-static bool rtlgen_supports_mmd(struct phy_device *phydev)
+-{
+-	int val;
+-
+-	phy_lock_mdio_bus(phydev);
+-	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
+-	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
+-	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
+-	val = __phy_read(phydev, MII_MMD_DATA);
+-	phy_unlock_mdio_bus(phydev);
+-
+-	return val > 0;
+-}
+-
+-static int rtlgen_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       !rtlgen_supports_2_5gbps(phydev);
+-}
+-
+-static int rtl8226_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_GENERIC_PHYID &&
+-	       rtlgen_supports_2_5gbps(phydev) &&
+-	       rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
+-			       bool is_c45)
+-{
+-	if (phydev->is_c45)
+-		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
+-	else
+-		return !is_c45 && (id == phydev->phy_id);
+-}
+-
+-static int rtl8221b_match_phy_device(struct phy_device *phydev)
+-{
+-	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
+-}
+-
+-static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
+-}
+-
+-static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
+-}
+-
+-static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
+-}
+-
+-static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
+-{
+-	if (phydev->is_c45)
+-		return false;
+-
+-	switch (phydev->phy_id) {
+-	case RTL_GENERIC_PHYID:
+-	case RTL_8221B:
+-	case RTL_8251B:
+-	case 0x001cc841:
+-		break;
+-	default:
+-		return false;
+-	}
+-
+-	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
+-}
+-
+-static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
+-{
+-	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
+-}
+-
+-static int rtlgen_resume(struct phy_device *phydev)
+-{
+-	int ret = genphy_resume(phydev);
+-
+-	/* Internal PHY's from RTL8168h up may not be instantly ready */
+-	msleep(20);
+-
+-	return ret;
+-}
+-
+-static int rtlgen_c45_resume(struct phy_device *phydev)
+-{
+-	int ret = genphy_c45_pma_resume(phydev);
+-
+-	msleep(20);
+-
+-	return ret;
+-}
+-
+-static int rtl9000a_config_init(struct phy_device *phydev)
+-{
+-	phydev->autoneg = AUTONEG_DISABLE;
+-	phydev->speed = SPEED_100;
+-	phydev->duplex = DUPLEX_FULL;
+-
+-	return 0;
+-}
+-
+-static int rtl9000a_config_aneg(struct phy_device *phydev)
+-{
+-	int ret;
+-	u16 ctl = 0;
+-
+-	switch (phydev->master_slave_set) {
+-	case MASTER_SLAVE_CFG_MASTER_FORCE:
+-		ctl |= CTL1000_AS_MASTER;
+-		break;
+-	case MASTER_SLAVE_CFG_SLAVE_FORCE:
+-		break;
+-	case MASTER_SLAVE_CFG_UNKNOWN:
+-	case MASTER_SLAVE_CFG_UNSUPPORTED:
+-		return 0;
+-	default:
+-		phydev_warn(phydev, "Unsupported Master/Slave mode\n");
+-		return -EOPNOTSUPP;
+-	}
+-
+-	ret = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
+-	if (ret == 1)
+-		ret = genphy_soft_reset(phydev);
+-
+-	return ret;
+-}
+-
+-static int rtl9000a_read_status(struct phy_device *phydev)
+-{
+-	int ret;
+-
+-	phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
+-	phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+-
+-	ret = genphy_update_link(phydev);
+-	if (ret)
+-		return ret;
+-
+-	ret = phy_read(phydev, MII_CTRL1000);
+-	if (ret < 0)
+-		return ret;
+-	if (ret & CTL1000_AS_MASTER)
+-		phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE;
+-	else
+-		phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE;
+-
+-	ret = phy_read(phydev, MII_STAT1000);
+-	if (ret < 0)
+-		return ret;
+-	if (ret & LPA_1000MSRES)
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
+-	else
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
+-
+-	return 0;
+-}
+-
+-static int rtl9000a_ack_interrupt(struct phy_device *phydev)
+-{
+-	int err;
+-
+-	err = phy_read(phydev, RTL8211F_INSR);
+-
+-	return (err < 0) ? err : 0;
+-}
+-
+-static int rtl9000a_config_intr(struct phy_device *phydev)
+-{
+-	u16 val;
+-	int err;
+-
+-	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+-		err = rtl9000a_ack_interrupt(phydev);
+-		if (err)
+-			return err;
+-
+-		val = (u16)~RTL9000A_GINMR_LINK_STATUS;
+-		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-	} else {
+-		val = ~0;
+-		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-		if (err)
+-			return err;
+-
+-		err = rtl9000a_ack_interrupt(phydev);
+-	}
+-
+-	return phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
+-}
+-
+-static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev)
+-{
+-	int irq_status;
+-
+-	irq_status = phy_read(phydev, RTL8211F_INSR);
+-	if (irq_status < 0) {
+-		phy_error(phydev);
+-		return IRQ_NONE;
+-	}
+-
+-	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
+-		return IRQ_NONE;
+-
+-	phy_trigger_machine(phydev);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-static struct phy_driver realtek_drvs[] = {
+-	{
+-		PHY_ID_MATCH_EXACT(0x00008201),
+-		.name           = "RTL8201CP Ethernet",
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc816),
+-		.name		= "RTL8201F Fast Ethernet",
+-		.config_intr	= &rtl8201_config_intr,
+-		.handle_interrupt = rtl8201_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_MODEL(0x001cc880),
+-		.name		= "RTL8208 Fast Ethernet",
+-		.read_mmd	= genphy_read_mmd_unsupported,
+-		.write_mmd	= genphy_write_mmd_unsupported,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc910),
+-		.name		= "RTL8211 Gigabit Ethernet",
+-		.config_aneg	= rtl8211_config_aneg,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc912),
+-		.name		= "RTL8211B Gigabit Ethernet",
+-		.config_intr	= &rtl8211b_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.suspend	= rtl8211b_suspend,
+-		.resume		= rtl8211b_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc913),
+-		.name		= "RTL8211C Gigabit Ethernet",
+-		.config_init	= rtl8211c_config_init,
+-		.read_mmd	= &genphy_read_mmd_unsupported,
+-		.write_mmd	= &genphy_write_mmd_unsupported,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc914),
+-		.name		= "RTL8211DN Gigabit Ethernet",
+-		.config_intr	= rtl8211e_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc915),
+-		.name		= "RTL8211E Gigabit Ethernet",
+-		.config_init	= &rtl8211e_config_init,
+-		.config_intr	= &rtl8211e_config_intr,
+-		.handle_interrupt = rtl821x_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc916),
+-		.name		= "RTL8211F Gigabit Ethernet",
+-		.probe		= rtl821x_probe,
+-		.config_init	= &rtl8211f_config_init,
+-		.read_status	= rtlgen_read_status,
+-		.config_intr	= &rtl8211f_config_intr,
+-		.handle_interrupt = rtl8211f_handle_interrupt,
+-		.suspend	= rtl821x_suspend,
+-		.resume		= rtl821x_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.flags		= PHY_ALWAYS_CALL_SUSPEND,
+-		.led_hw_is_supported = rtl8211f_led_hw_is_supported,
+-		.led_hw_control_get = rtl8211f_led_hw_control_get,
+-		.led_hw_control_set = rtl8211f_led_hw_control_set,
+-	}, {
+-		PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID),
+-		.name		= "RTL8211F-VD Gigabit Ethernet",
+-		.probe		= rtl821x_probe,
+-		.config_init	= &rtl8211f_config_init,
+-		.read_status	= rtlgen_read_status,
+-		.config_intr	= &rtl8211f_config_intr,
+-		.handle_interrupt = rtl8211f_handle_interrupt,
+-		.suspend	= rtl821x_suspend,
+-		.resume		= rtl821x_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.flags		= PHY_ALWAYS_CALL_SUSPEND,
+-	}, {
+-		.name		= "Generic FE-GE Realtek PHY",
+-		.match_phy_device = rtlgen_match_phy_device,
+-		.read_status	= rtlgen_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-		.read_mmd	= rtlgen_read_mmd,
+-		.write_mmd	= rtlgen_write_mmd,
+-	}, {
+-		.name		= "RTL8226 2.5Gbps PHY",
+-		.match_phy_device = rtl8226_match_phy_device,
+-		.get_features	= rtl822x_get_features,
+-		.config_aneg	= rtl822x_config_aneg,
+-		.read_status	= rtl822x_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_match_phy_device,
+-		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
+-		.get_features	= rtl822x_get_features,
+-		.config_aneg	= rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status	= rtl822xb_read_status,
+-		.suspend	= genphy_suspend,
+-		.resume		= rtlgen_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc838),
+-		.name           = "RTL8226-CG 2.5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc848),
+-		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+-		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822xb_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+-		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.read_status    = rtl822xb_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+-		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+-		.config_init    = rtl822xb_config_init,
+-		.get_rate_matching = rtl822xb_get_rate_matching,
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822xb_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		.match_phy_device = rtl8251b_c45_match_phy_device,
+-		.name           = "RTL8251B 5Gbps PHY",
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-	}, {
+-		.match_phy_device = rtl_internal_nbaset_match_phy_device,
+-		.name           = "Realtek Internal NBASE-T PHY",
+-		.flags		= PHY_IS_INTERNAL,
+-		.get_features   = rtl822x_get_features,
+-		.config_aneg    = rtl822x_config_aneg,
+-		.read_status    = rtl822x_read_status,
+-		.suspend        = genphy_suspend,
+-		.resume         = rtlgen_resume,
+-		.read_page      = rtl821x_read_page,
+-		.write_page     = rtl821x_write_page,
+-		.read_mmd	= rtl822x_read_mmd,
+-		.write_mmd	= rtl822x_write_mmd,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001ccad0),
+-		.name		= "RTL8224 2.5Gbps PHY",
+-		.get_features   = rtl822x_c45_get_features,
+-		.config_aneg    = rtl822x_c45_config_aneg,
+-		.read_status    = rtl822x_c45_read_status,
+-		.suspend        = genphy_c45_pma_suspend,
+-		.resume         = rtlgen_c45_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc961),
+-		.name		= "RTL8366RB Gigabit Ethernet",
+-		.config_init	= &rtl8366rb_config_init,
+-		/* These interrupts are handled by the irq controller
+-		 * embedded inside the RTL8366RB, they get unmasked when the
+-		 * irq is requested and ACKed by reading the status register,
+-		 * which is done by the irqchip code.
+-		 */
+-		.config_intr	= genphy_no_config_intr,
+-		.handle_interrupt = genphy_handle_interrupt_no_ack,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001ccb00),
+-		.name		= "RTL9000AA_RTL9000AN Ethernet",
+-		.features       = PHY_BASIC_T1_FEATURES,
+-		.config_init	= rtl9000a_config_init,
+-		.config_aneg	= rtl9000a_config_aneg,
+-		.read_status	= rtl9000a_read_status,
+-		.config_intr	= rtl9000a_config_intr,
+-		.handle_interrupt = rtl9000a_handle_interrupt,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_page	= rtl821x_read_page,
+-		.write_page	= rtl821x_write_page,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc942),
+-		.name		= "RTL8365MB-VC Gigabit Ethernet",
+-		/* Interrupt handling analogous to RTL8366RB */
+-		.config_intr	= genphy_no_config_intr,
+-		.handle_interrupt = genphy_handle_interrupt_no_ack,
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-	}, {
+-		PHY_ID_MATCH_EXACT(0x001cc960),
+-		.name		= "RTL8366S Gigabit Ethernet",
+-		.suspend	= genphy_suspend,
+-		.resume		= genphy_resume,
+-		.read_mmd	= genphy_read_mmd_unsupported,
+-		.write_mmd	= genphy_write_mmd_unsupported,
+-	},
+-};
+-
+-module_phy_driver(realtek_drvs);
+-
+-static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
+-	{ PHY_ID_MATCH_VENDOR(0x001cc800) },
+-	{ }
+-};
+-
+-MODULE_DEVICE_TABLE(mdio, realtek_tbl);
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -0,0 +1,1590 @@
++// SPDX-License-Identifier: GPL-2.0+
++/* drivers/net/phy/realtek.c
++ *
++ * Driver for Realtek PHYs
++ *
++ * Author: Johnson Leung <r58129 at freescale.com>
++ *
++ * Copyright (c) 2004 Freescale Semiconductor, Inc.
++ */
++#include <linux/bitops.h>
++#include <linux/of.h>
++#include <linux/phy.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/clk.h>
++
++#define RTL821x_PHYSR				0x11
++#define RTL821x_PHYSR_DUPLEX			BIT(13)
++#define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
++
++#define RTL821x_INER				0x12
++#define RTL8211B_INER_INIT			0x6400
++#define RTL8211E_INER_LINK_STATUS		BIT(10)
++#define RTL8211F_INER_LINK_STATUS		BIT(4)
++
++#define RTL821x_INSR				0x13
++
++#define RTL821x_EXT_PAGE_SELECT			0x1e
++#define RTL821x_PAGE_SELECT			0x1f
++
++#define RTL8211F_PHYCR1				0x18
++#define RTL8211F_PHYCR2				0x19
++#define RTL8211F_INSR				0x1d
++
++#define RTL8211F_LEDCR				0x10
++#define RTL8211F_LEDCR_MODE			BIT(15)
++#define RTL8211F_LEDCR_ACT_TXRX			BIT(4)
++#define RTL8211F_LEDCR_LINK_1000		BIT(3)
++#define RTL8211F_LEDCR_LINK_100			BIT(1)
++#define RTL8211F_LEDCR_LINK_10			BIT(0)
++#define RTL8211F_LEDCR_MASK			GENMASK(4, 0)
++#define RTL8211F_LEDCR_SHIFT			5
++
++#define RTL8211F_TX_DELAY			BIT(8)
++#define RTL8211F_RX_DELAY			BIT(3)
++
++#define RTL8211F_ALDPS_PLL_OFF			BIT(1)
++#define RTL8211F_ALDPS_ENABLE			BIT(2)
++#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)
++
++#define RTL8211E_CTRL_DELAY			BIT(13)
++#define RTL8211E_TX_DELAY			BIT(12)
++#define RTL8211E_RX_DELAY			BIT(11)
++
++#define RTL8211F_CLKOUT_EN			BIT(0)
++
++#define RTL8201F_ISR				0x1e
++#define RTL8201F_ISR_ANERR			BIT(15)
++#define RTL8201F_ISR_DUPLEX			BIT(13)
++#define RTL8201F_ISR_LINK			BIT(11)
++#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \
++						 RTL8201F_ISR_DUPLEX | \
++						 RTL8201F_ISR_LINK)
++#define RTL8201F_IER				0x13
++
++#define RTL822X_VND1_SERDES_OPTION			0x697a
++#define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII		0
++#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX		2
++
++#define RTL822X_VND1_SERDES_CTRL3			0x7580
++#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK		GENMASK(5, 0)
++#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII			0x02
++#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX		0x16
++
++/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
++ * is set, they cannot be accessed by C45-over-C22.
++ */
++#define RTL822X_VND2_GBCR				0xa412
++
++#define RTL822X_VND2_GANLPAR				0xa414
++
++#define RTL8366RB_POWER_SAVE			0x15
++#define RTL8366RB_POWER_SAVE_ON			BIT(12)
++
++#define RTL9000A_GINMR				0x14
++#define RTL9000A_GINMR_LINK_STATUS		BIT(4)
++
++#define RTL_VND2_PHYSR				0xa434
++#define RTL_VND2_PHYSR_DUPLEX			BIT(3)
++#define RTL_VND2_PHYSR_SPEEDL			GENMASK(5, 4)
++#define RTL_VND2_PHYSR_SPEEDH			GENMASK(10, 9)
++#define RTL_VND2_PHYSR_MASTER			BIT(11)
++#define RTL_VND2_PHYSR_SPEED_MASK		(RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
++
++#define RTL_GENERIC_PHYID			0x001cc800
++#define RTL_8211FVD_PHYID			0x001cc878
++#define RTL_8221B				0x001cc840
++#define RTL_8221B_VB_CG				0x001cc849
++#define RTL_8221B_VN_CG				0x001cc84a
++#define RTL_8251B				0x001cc862
++
++#define RTL8211F_LED_COUNT			3
++
++MODULE_DESCRIPTION("Realtek PHY driver");
++MODULE_AUTHOR("Johnson Leung");
++MODULE_LICENSE("GPL");
++
++struct rtl821x_priv {
++	u16 phycr1;
++	u16 phycr2;
++	bool has_phycr2;
++	struct clk *clk;
++};
++
++static int rtl821x_read_page(struct phy_device *phydev)
++{
++	return __phy_read(phydev, RTL821x_PAGE_SELECT);
++}
++
++static int rtl821x_write_page(struct phy_device *phydev, int page)
++{
++	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
++}
++
++static int rtl821x_probe(struct phy_device *phydev)
++{
++	struct device *dev = &phydev->mdio.dev;
++	struct rtl821x_priv *priv;
++	u32 phy_id = phydev->drv->phy_id;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
++	if (IS_ERR(priv->clk))
++		return dev_err_probe(dev, PTR_ERR(priv->clk),
++				     "failed to get phy clock\n");
++
++	ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
++	if (ret < 0)
++		return ret;
++
++	priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF);
++	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
++		priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF;
++
++	priv->has_phycr2 = !(phy_id == RTL_8211FVD_PHYID);
++	if (priv->has_phycr2) {
++		ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2);
++		if (ret < 0)
++			return ret;
++
++		priv->phycr2 = ret & RTL8211F_CLKOUT_EN;
++		if (of_property_read_bool(dev->of_node, "realtek,clkout-disable"))
++			priv->phycr2 &= ~RTL8211F_CLKOUT_EN;
++	}
++
++	phydev->priv = priv;
++
++	return 0;
++}
++
++static int rtl8201_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL8201F_ISR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl821x_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL821x_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl8211f_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl8201_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl8201_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = BIT(13) | BIT(12) | BIT(11);
++		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
++	} else {
++		val = 0;
++		err = phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
++		if (err)
++			return err;
++
++		err = rtl8201_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211b_config_intr(struct phy_device *phydev)
++{
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl821x_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		err = phy_write(phydev, RTL821x_INER,
++				RTL8211B_INER_INIT);
++	} else {
++		err = phy_write(phydev, RTL821x_INER, 0);
++		if (err)
++			return err;
++
++		err = rtl821x_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211e_config_intr(struct phy_device *phydev)
++{
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl821x_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		err = phy_write(phydev, RTL821x_INER,
++				RTL8211E_INER_LINK_STATUS);
++	} else {
++		err = phy_write(phydev, RTL821x_INER, 0);
++		if (err)
++			return err;
++
++		err = rtl821x_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static int rtl8211f_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl8211f_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = RTL8211F_INER_LINK_STATUS;
++		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
++	} else {
++		val = 0;
++		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
++		if (err)
++			return err;
++
++		err = rtl8211f_ack_interrupt(phydev);
++	}
++
++	return err;
++}
++
++static irqreturn_t rtl8201_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read(phydev, RTL8201F_ISR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8201F_ISR_MASK))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t rtl821x_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status, irq_enabled;
++
++	irq_status = phy_read(phydev, RTL821x_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	irq_enabled = phy_read(phydev, RTL821x_INER);
++	if (irq_enabled < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & irq_enabled))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t rtl8211f_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static int rtl8211_config_aneg(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = genphy_config_aneg(phydev);
++	if (ret < 0)
++		return ret;
++
++	/* Quirk was copied from vendor driver. Unfortunately it includes no
++	 * description of the magic numbers.
++	 */
++	if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
++		phy_write(phydev, 0x17, 0x2138);
++		phy_write(phydev, 0x0e, 0x0260);
++	} else {
++		phy_write(phydev, 0x17, 0x2108);
++		phy_write(phydev, 0x0e, 0x0000);
++	}
++
++	return 0;
++}
++
++static int rtl8211c_config_init(struct phy_device *phydev)
++{
++	/* RTL8211C has an issue when operating in Gigabit slave mode */
++	return phy_set_bits(phydev, MII_CTRL1000,
++			    CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
++}
++
++static int rtl8211f_config_init(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	struct device *dev = &phydev->mdio.dev;
++	u16 val_txdly, val_rxdly;
++	int ret;
++
++	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
++				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,
++				       priv->phycr1);
++	if (ret < 0) {
++		dev_err(dev, "aldps mode  configuration failed: %pe\n",
++			ERR_PTR(ret));
++		return ret;
++	}
++
++	switch (phydev->interface) {
++	case PHY_INTERFACE_MODE_RGMII:
++		val_txdly = 0;
++		val_rxdly = 0;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_RXID:
++		val_txdly = 0;
++		val_rxdly = RTL8211F_RX_DELAY;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_TXID:
++		val_txdly = RTL8211F_TX_DELAY;
++		val_rxdly = 0;
++		break;
++
++	case PHY_INTERFACE_MODE_RGMII_ID:
++		val_txdly = RTL8211F_TX_DELAY;
++		val_rxdly = RTL8211F_RX_DELAY;
++		break;
++
++	default: /* the rest of the modes imply leaving delay as is. */
++		return 0;
++	}
++
++	ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,
++				       val_txdly);
++	if (ret < 0) {
++		dev_err(dev, "Failed to update the TX delay register\n");
++		return ret;
++	} else if (ret) {
++		dev_dbg(dev,
++			"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
++			val_txdly ? "Enabling" : "Disabling");
++	} else {
++		dev_dbg(dev,
++			"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
++			val_txdly ? "enabled" : "disabled");
++	}
++
++	ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
++				       val_rxdly);
++	if (ret < 0) {
++		dev_err(dev, "Failed to update the RX delay register\n");
++		return ret;
++	} else if (ret) {
++		dev_dbg(dev,
++			"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
++			val_rxdly ? "Enabling" : "Disabling");
++	} else {
++		dev_dbg(dev,
++			"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
++			val_rxdly ? "enabled" : "disabled");
++	}
++
++	if (priv->has_phycr2) {
++		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
++				       RTL8211F_CLKOUT_EN, priv->phycr2);
++		if (ret < 0) {
++			dev_err(dev, "clkout configuration failed: %pe\n",
++				ERR_PTR(ret));
++			return ret;
++		}
++
++		return genphy_soft_reset(phydev);
++	}
++
++	return 0;
++}
++
++static int rtl821x_suspend(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	int ret = 0;
++
++	if (!phydev->wol_enabled) {
++		ret = genphy_suspend(phydev);
++
++		if (ret)
++			return ret;
++
++		clk_disable_unprepare(priv->clk);
++	}
++
++	return ret;
++}
++
++static int rtl821x_resume(struct phy_device *phydev)
++{
++	struct rtl821x_priv *priv = phydev->priv;
++	int ret;
++
++	if (!phydev->wol_enabled)
++		clk_prepare_enable(priv->clk);
++
++	ret = genphy_resume(phydev);
++	if (ret < 0)
++		return ret;
++
++	msleep(20);
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,
++					unsigned long rules)
++{
++	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |
++				   BIT(TRIGGER_NETDEV_LINK_100) |
++				   BIT(TRIGGER_NETDEV_LINK_1000) |
++				   BIT(TRIGGER_NETDEV_RX) |
++				   BIT(TRIGGER_NETDEV_TX);
++
++	/* The RTL8211F PHY supports these LED settings on up to three LEDs:
++	 * - Link: Configurable subset of 10/100/1000 link rates
++	 * - Active: Blink on activity, RX or TX is not differentiated
++	 * The Active option has two modes, A and B:
++	 * - A: Link and Active indication at configurable, but matching,
++	 *      subset of 10/100/1000 link rates
++	 * - B: Link indication at configurable subset of 10/100/1000 link
++	 *      rates and Active indication always at all three 10+100+1000
++	 *      link rates.
++	 * This code currently uses mode B only.
++	 */
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	/* Filter out any other unsupported triggers. */
++	if (rules & ~mask)
++		return -EOPNOTSUPP;
++
++	/* RX and TX are not differentiated, either both are set or not set. */
++	if (!(rules & BIT(TRIGGER_NETDEV_RX)) ^ !(rules & BIT(TRIGGER_NETDEV_TX)))
++		return -EOPNOTSUPP;
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,
++				       unsigned long *rules)
++{
++	int val;
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
++	if (val < 0)
++		return val;
++
++	val >>= RTL8211F_LEDCR_SHIFT * index;
++	val &= RTL8211F_LEDCR_MASK;
++
++	if (val & RTL8211F_LEDCR_LINK_10)
++		set_bit(TRIGGER_NETDEV_LINK_10, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_100)
++		set_bit(TRIGGER_NETDEV_LINK_100, rules);
++
++	if (val & RTL8211F_LEDCR_LINK_1000)
++		set_bit(TRIGGER_NETDEV_LINK_1000, rules);
++
++	if (val & RTL8211F_LEDCR_ACT_TXRX) {
++		set_bit(TRIGGER_NETDEV_RX, rules);
++		set_bit(TRIGGER_NETDEV_TX, rules);
++	}
++
++	return 0;
++}
++
++static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,
++				       unsigned long rules)
++{
++	const u16 mask = RTL8211F_LEDCR_MASK << (RTL8211F_LEDCR_SHIFT * index);
++	u16 reg = 0;
++
++	if (index >= RTL8211F_LED_COUNT)
++		return -EINVAL;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_10, &rules))
++		reg |= RTL8211F_LEDCR_LINK_10;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_100, &rules))
++		reg |= RTL8211F_LEDCR_LINK_100;
++
++	if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules))
++		reg |= RTL8211F_LEDCR_LINK_1000;
++
++	if (test_bit(TRIGGER_NETDEV_RX, &rules) ||
++	    test_bit(TRIGGER_NETDEV_TX, &rules)) {
++		reg |= RTL8211F_LEDCR_ACT_TXRX;
++	}
++
++	reg <<= RTL8211F_LEDCR_SHIFT * index;
++	reg |= RTL8211F_LEDCR_MODE;	 /* Mode B */
++
++	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);
++}
++
++static int rtl8211e_config_init(struct phy_device *phydev)
++{
++	int ret = 0, oldpage;
++	u16 val;
++
++	/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
++	switch (phydev->interface) {
++	case PHY_INTERFACE_MODE_RGMII:
++		val = RTL8211E_CTRL_DELAY | 0;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_ID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_RXID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
++		break;
++	case PHY_INTERFACE_MODE_RGMII_TXID:
++		val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
++		break;
++	default: /* the rest of the modes imply leaving delays as is. */
++		return 0;
++	}
++
++	/* According to a sample driver there is a 0x1c config register on the
++	 * 0xa4 extension page (0x7) layout. It can be used to disable/enable
++	 * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
++	 * The configuration register definition:
++	 * 14 = reserved
++	 * 13 = Force Tx RX Delay controlled by bit12 bit11,
++	 * 12 = RX Delay, 11 = TX Delay
++	 * 10:0 = Test && debug settings reserved by realtek
++	 */
++	oldpage = phy_select_page(phydev, 0x7);
++	if (oldpage < 0)
++		goto err_restore_page;
++
++	ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4);
++	if (ret)
++		goto err_restore_page;
++
++	ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
++			   | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
++			   val);
++
++err_restore_page:
++	return phy_restore_page(phydev, oldpage, ret);
++}
++
++static int rtl8211b_suspend(struct phy_device *phydev)
++{
++	phy_write(phydev, MII_MMD_DATA, BIT(9));
++
++	return genphy_suspend(phydev);
++}
++
++static int rtl8211b_resume(struct phy_device *phydev)
++{
++	phy_write(phydev, MII_MMD_DATA, 0);
++
++	return genphy_resume(phydev);
++}
++
++static int rtl8366rb_config_init(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
++			   RTL8366RB_POWER_SAVE_ON);
++	if (ret) {
++		dev_err(&phydev->mdio.dev,
++			"error enabling power management\n");
++	}
++
++	return ret;
++}
++
++/* get actual speed to cover the downshift case */
++static void rtlgen_decode_physr(struct phy_device *phydev, int val)
++{
++	/* bit 3
++	 * 0: Half Duplex
++	 * 1: Full Duplex
++	 */
++	if (val & RTL_VND2_PHYSR_DUPLEX)
++		phydev->duplex = DUPLEX_FULL;
++	else
++		phydev->duplex = DUPLEX_HALF;
++
++	switch (val & RTL_VND2_PHYSR_SPEED_MASK) {
++	case 0x0000:
++		phydev->speed = SPEED_10;
++		break;
++	case 0x0010:
++		phydev->speed = SPEED_100;
++		break;
++	case 0x0020:
++		phydev->speed = SPEED_1000;
++		break;
++	case 0x0200:
++		phydev->speed = SPEED_10000;
++		break;
++	case 0x0210:
++		phydev->speed = SPEED_2500;
++		break;
++	case 0x0220:
++		phydev->speed = SPEED_5000;
++		break;
++	default:
++		break;
++	}
++
++	/* bit 11
++	 * 0: Slave Mode
++	 * 1: Master Mode
++	 */
++	if (phydev->speed >= 1000) {
++		if (val & RTL_VND2_PHYSR_MASTER)
++			phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
++		else
++			phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
++	} else {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;
++	}
++}
++
++static int rtlgen_read_status(struct phy_device *phydev)
++{
++	int ret, val;
++
++	ret = genphy_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (!phydev->link)
++		return 0;
++
++	val = phy_read_paged(phydev, 0xa43, 0x12);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_physr(phydev, val);
++
++	return 0;
++}
++
++static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
++{
++	int ret;
++
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
++		rtl821x_write_page(phydev, 0xa5c);
++		ret = __phy_read(phydev, 0x12);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_read(phydev, 0x10);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_read(phydev, 0x11);
++		rtl821x_write_page(phydev, 0);
++	} else {
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
++			    u16 val)
++{
++	int ret;
++
++	if (devnum == MDIO_MMD_VEND2) {
++		rtl821x_write_page(phydev, regnum >> 4);
++		ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
++		rtl821x_write_page(phydev, 0xa5d);
++		ret = __phy_write(phydev, 0x10, val);
++		rtl821x_write_page(phydev, 0);
++	} else {
++		ret = -EOPNOTSUPP;
++	}
++
++	return ret;
++}
++
++static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
++{
++	int ret = rtlgen_read_mmd(phydev, devnum, regnum);
++
++	if (ret != -EOPNOTSUPP)
++		return ret;
++
++	if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
++		rtl821x_write_page(phydev, 0xa6e);
++		ret = __phy_read(phydev, 0x16);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_read(phydev, 0x12);
++		rtl821x_write_page(phydev, 0);
++	} else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_read(phydev, 0x10);
++		rtl821x_write_page(phydev, 0);
++	}
++
++	return ret;
++}
++
++static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,
++			     u16 val)
++{
++	int ret = rtlgen_write_mmd(phydev, devnum, regnum, val);
++
++	if (ret != -EOPNOTSUPP)
++		return ret;
++
++	if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
++		rtl821x_write_page(phydev, 0xa6d);
++		ret = __phy_write(phydev, 0x12, val);
++		rtl821x_write_page(phydev, 0);
++	}
++
++	return ret;
++}
++
++static int rtl822xb_config_init(struct phy_device *phydev)
++{
++	bool has_2500, has_sgmii;
++	u16 mode;
++	int ret;
++
++	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
++			    phydev->host_interfaces) ||
++		   phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
++
++	has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
++			     phydev->host_interfaces) ||
++		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
++
++	/* fill in possible interfaces */
++	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
++		     has_2500);
++	__assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
++		     has_sgmii);
++
++	if (!has_2500 && !has_sgmii)
++		return 0;
++
++	/* determine SerDes option mode */
++	if (has_2500 && !has_sgmii) {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
++		phydev->rate_matching = RATE_MATCH_PAUSE;
++	} else {
++		mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
++		phydev->rate_matching = RATE_MATCH_NONE;
++	}
++
++	/* the following sequence with magic numbers sets up the SerDes
++	 * option mode
++	 */
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
++				     RTL822X_VND1_SERDES_OPTION,
++				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,
++				     mode);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
++	if (ret < 0)
++		return ret;
++
++	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
++	if (ret < 0)
++		return ret;
++
++	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
++}
++
++static int rtl822xb_get_rate_matching(struct phy_device *phydev,
++				      phy_interface_t iface)
++{
++	int val;
++
++	/* Only rate matching at 2500base-x */
++	if (iface != PHY_INTERFACE_MODE_2500BASEX)
++		return RATE_MATCH_NONE;
++
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_OPTION);
++	if (val < 0)
++		return val;
++
++	if ((val & RTL822X_VND1_SERDES_OPTION_MODE_MASK) ==
++	    RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX)
++		return RATE_MATCH_PAUSE;
++
++	/* RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII */
++	return RATE_MATCH_NONE;
++}
++
++static int rtl822x_get_features(struct phy_device *phydev)
++{
++	int val;
++
++	val = phy_read_paged(phydev, 0xa61, 0x13);
++	if (val < 0)
++		return val;
++
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
++			 phydev->supported, val & MDIO_PMA_SPEED_2_5G);
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
++			 phydev->supported, val & MDIO_PMA_SPEED_5G);
++	linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
++			 phydev->supported, val & MDIO_SPEED_10G);
++
++	return genphy_read_abilities(phydev);
++}
++
++static int rtl822x_config_aneg(struct phy_device *phydev)
++{
++	int ret = 0;
++
++	if (phydev->autoneg == AUTONEG_ENABLE) {
++		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
++
++		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
++					       MDIO_AN_10GBT_CTRL_ADV2_5G |
++					       MDIO_AN_10GBT_CTRL_ADV5G,
++					       adv);
++		if (ret < 0)
++			return ret;
++	}
++
++	return __genphy_config_aneg(phydev, ret);
++}
++
++static void rtl822xb_update_interface(struct phy_device *phydev)
++{
++	int val;
++
++	if (!phydev->link)
++		return;
++
++	/* Change interface according to serdes mode */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
++	if (val < 0)
++		return;
++
++	switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
++	case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
++		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
++		break;
++	case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
++		phydev->interface = PHY_INTERFACE_MODE_SGMII;
++		break;
++	}
++}
++
++static int rtl822x_read_status(struct phy_device *phydev)
++{
++	int lpadv, ret;
++
++	ret = rtlgen_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (phydev->autoneg == AUTONEG_DISABLE ||
++	    !phydev->autoneg_complete) {
++		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++		return 0;
++	}
++
++	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
++	if (lpadv < 0)
++		return lpadv;
++
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv);
++
++	return 0;
++}
++
++static int rtl822xb_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
++static int rtl822x_c45_get_features(struct phy_device *phydev)
++{
++	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
++			 phydev->supported);
++
++	return genphy_c45_pma_read_abilities(phydev);
++}
++
++static int rtl822x_c45_config_aneg(struct phy_device *phydev)
++{
++	bool changed = false;
++	int ret, val;
++
++	if (phydev->autoneg == AUTONEG_DISABLE)
++		return genphy_c45_pma_setup_forced(phydev);
++
++	ret = genphy_c45_an_config_aneg(phydev);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
++				     ADVERTISE_1000FULL, val);
++	if (ret < 0)
++		return ret;
++	if (ret > 0)
++		changed = true;
++
++	return genphy_c45_check_and_restart_aneg(phydev, changed);
++}
++
++static int rtl822x_c45_read_status(struct phy_device *phydev)
++{
++	int ret, val;
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (phydev->autoneg == AUTONEG_DISABLE ||
++	    !genphy_c45_aneg_done(phydev))
++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
++	/* Vendor register as C45 has no standardized support for 1000BaseT */
++	if (phydev->autoneg == AUTONEG_ENABLE) {
++		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
++				   RTL822X_VND2_GANLPAR);
++		if (val < 0)
++			return val;
++
++		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	}
++
++	if (!phydev->link)
++		return 0;
++
++	/* Read actual speed from vendor register. */
++	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
++	if (val < 0)
++		return val;
++
++	rtlgen_decode_physr(phydev, val);
++
++	return 0;
++}
++
++static int rtl822xb_c45_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822x_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	rtl822xb_update_interface(phydev);
++
++	return 0;
++}
++
++static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
++{
++	int val;
++
++	phy_write(phydev, RTL821x_PAGE_SELECT, 0xa61);
++	val = phy_read(phydev, 0x13);
++	phy_write(phydev, RTL821x_PAGE_SELECT, 0);
++
++	return val >= 0 && val & MDIO_PMA_SPEED_2_5G;
++}
++
++/* On internal PHY's MMD reads over C22 always return 0.
++ * Check a MMD register which is known to be non-zero.
++ */
++static bool rtlgen_supports_mmd(struct phy_device *phydev)
++{
++	int val;
++
++	phy_lock_mdio_bus(phydev);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS);
++	__phy_write(phydev, MII_MMD_DATA, MDIO_PCS_EEE_ABLE);
++	__phy_write(phydev, MII_MMD_CTRL, MDIO_MMD_PCS | MII_MMD_CTRL_NOINCR);
++	val = __phy_read(phydev, MII_MMD_DATA);
++	phy_unlock_mdio_bus(phydev);
++
++	return val > 0;
++}
++
++static int rtlgen_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_GENERIC_PHYID &&
++	       !rtlgen_supports_2_5gbps(phydev);
++}
++
++static int rtl8226_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_GENERIC_PHYID &&
++	       rtlgen_supports_2_5gbps(phydev) &&
++	       rtlgen_supports_mmd(phydev);
++}
++
++static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
++			       bool is_c45)
++{
++	if (phydev->is_c45)
++		return is_c45 && (id == phydev->c45_ids.device_ids[1]);
++	else
++		return !is_c45 && (id == phydev->phy_id);
++}
++
++static int rtl8221b_match_phy_device(struct phy_device *phydev)
++{
++	return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
++}
++
++static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);
++}
++
++static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);
++}
++
++static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);
++}
++
++static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
++}
++
++static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)
++{
++	if (phydev->is_c45)
++		return false;
++
++	switch (phydev->phy_id) {
++	case RTL_GENERIC_PHYID:
++	case RTL_8221B:
++	case RTL_8251B:
++	case 0x001cc841:
++		break;
++	default:
++		return false;
++	}
++
++	return rtlgen_supports_2_5gbps(phydev) && !rtlgen_supports_mmd(phydev);
++}
++
++static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
++{
++	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
++}
++
++static int rtlgen_resume(struct phy_device *phydev)
++{
++	int ret = genphy_resume(phydev);
++
++	/* Internal PHY's from RTL8168h up may not be instantly ready */
++	msleep(20);
++
++	return ret;
++}
++
++static int rtlgen_c45_resume(struct phy_device *phydev)
++{
++	int ret = genphy_c45_pma_resume(phydev);
++
++	msleep(20);
++
++	return ret;
++}
++
++static int rtl9000a_config_init(struct phy_device *phydev)
++{
++	phydev->autoneg = AUTONEG_DISABLE;
++	phydev->speed = SPEED_100;
++	phydev->duplex = DUPLEX_FULL;
++
++	return 0;
++}
++
++static int rtl9000a_config_aneg(struct phy_device *phydev)
++{
++	int ret;
++	u16 ctl = 0;
++
++	switch (phydev->master_slave_set) {
++	case MASTER_SLAVE_CFG_MASTER_FORCE:
++		ctl |= CTL1000_AS_MASTER;
++		break;
++	case MASTER_SLAVE_CFG_SLAVE_FORCE:
++		break;
++	case MASTER_SLAVE_CFG_UNKNOWN:
++	case MASTER_SLAVE_CFG_UNSUPPORTED:
++		return 0;
++	default:
++		phydev_warn(phydev, "Unsupported Master/Slave mode\n");
++		return -EOPNOTSUPP;
++	}
++
++	ret = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl);
++	if (ret == 1)
++		ret = genphy_soft_reset(phydev);
++
++	return ret;
++}
++
++static int rtl9000a_read_status(struct phy_device *phydev)
++{
++	int ret;
++
++	phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN;
++	phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
++
++	ret = genphy_update_link(phydev);
++	if (ret)
++		return ret;
++
++	ret = phy_read(phydev, MII_CTRL1000);
++	if (ret < 0)
++		return ret;
++	if (ret & CTL1000_AS_MASTER)
++		phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE;
++	else
++		phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE;
++
++	ret = phy_read(phydev, MII_STAT1000);
++	if (ret < 0)
++		return ret;
++	if (ret & LPA_1000MSRES)
++		phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER;
++	else
++		phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE;
++
++	return 0;
++}
++
++static int rtl9000a_ack_interrupt(struct phy_device *phydev)
++{
++	int err;
++
++	err = phy_read(phydev, RTL8211F_INSR);
++
++	return (err < 0) ? err : 0;
++}
++
++static int rtl9000a_config_intr(struct phy_device *phydev)
++{
++	u16 val;
++	int err;
++
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
++		err = rtl9000a_ack_interrupt(phydev);
++		if (err)
++			return err;
++
++		val = (u16)~RTL9000A_GINMR_LINK_STATUS;
++		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++	} else {
++		val = ~0;
++		err = phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++		if (err)
++			return err;
++
++		err = rtl9000a_ack_interrupt(phydev);
++	}
++
++	return phy_write_paged(phydev, 0xa42, RTL9000A_GINMR, val);
++}
++
++static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev)
++{
++	int irq_status;
++
++	irq_status = phy_read(phydev, RTL8211F_INSR);
++	if (irq_status < 0) {
++		phy_error(phydev);
++		return IRQ_NONE;
++	}
++
++	if (!(irq_status & RTL8211F_INER_LINK_STATUS))
++		return IRQ_NONE;
++
++	phy_trigger_machine(phydev);
++
++	return IRQ_HANDLED;
++}
++
++static struct phy_driver realtek_drvs[] = {
++	{
++		PHY_ID_MATCH_EXACT(0x00008201),
++		.name           = "RTL8201CP Ethernet",
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc816),
++		.name		= "RTL8201F Fast Ethernet",
++		.config_intr	= &rtl8201_config_intr,
++		.handle_interrupt = rtl8201_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_MODEL(0x001cc880),
++		.name		= "RTL8208 Fast Ethernet",
++		.read_mmd	= genphy_read_mmd_unsupported,
++		.write_mmd	= genphy_write_mmd_unsupported,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc910),
++		.name		= "RTL8211 Gigabit Ethernet",
++		.config_aneg	= rtl8211_config_aneg,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc912),
++		.name		= "RTL8211B Gigabit Ethernet",
++		.config_intr	= &rtl8211b_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.suspend	= rtl8211b_suspend,
++		.resume		= rtl8211b_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc913),
++		.name		= "RTL8211C Gigabit Ethernet",
++		.config_init	= rtl8211c_config_init,
++		.read_mmd	= &genphy_read_mmd_unsupported,
++		.write_mmd	= &genphy_write_mmd_unsupported,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc914),
++		.name		= "RTL8211DN Gigabit Ethernet",
++		.config_intr	= rtl8211e_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc915),
++		.name		= "RTL8211E Gigabit Ethernet",
++		.config_init	= &rtl8211e_config_init,
++		.config_intr	= &rtl8211e_config_intr,
++		.handle_interrupt = rtl821x_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc916),
++		.name		= "RTL8211F Gigabit Ethernet",
++		.probe		= rtl821x_probe,
++		.config_init	= &rtl8211f_config_init,
++		.read_status	= rtlgen_read_status,
++		.config_intr	= &rtl8211f_config_intr,
++		.handle_interrupt = rtl8211f_handle_interrupt,
++		.suspend	= rtl821x_suspend,
++		.resume		= rtl821x_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.flags		= PHY_ALWAYS_CALL_SUSPEND,
++		.led_hw_is_supported = rtl8211f_led_hw_is_supported,
++		.led_hw_control_get = rtl8211f_led_hw_control_get,
++		.led_hw_control_set = rtl8211f_led_hw_control_set,
++	}, {
++		PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID),
++		.name		= "RTL8211F-VD Gigabit Ethernet",
++		.probe		= rtl821x_probe,
++		.config_init	= &rtl8211f_config_init,
++		.read_status	= rtlgen_read_status,
++		.config_intr	= &rtl8211f_config_intr,
++		.handle_interrupt = rtl8211f_handle_interrupt,
++		.suspend	= rtl821x_suspend,
++		.resume		= rtl821x_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.flags		= PHY_ALWAYS_CALL_SUSPEND,
++	}, {
++		.name		= "Generic FE-GE Realtek PHY",
++		.match_phy_device = rtlgen_match_phy_device,
++		.read_status	= rtlgen_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++		.read_mmd	= rtlgen_read_mmd,
++		.write_mmd	= rtlgen_write_mmd,
++	}, {
++		.name		= "RTL8226 2.5Gbps PHY",
++		.match_phy_device = rtl8226_match_phy_device,
++		.get_features	= rtl822x_get_features,
++		.config_aneg	= rtl822x_config_aneg,
++		.read_status	= rtl822x_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_match_phy_device,
++		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
++		.get_features	= rtl822x_get_features,
++		.config_aneg	= rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status	= rtl822xb_read_status,
++		.suspend	= genphy_suspend,
++		.resume		= rtlgen_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc838),
++		.name           = "RTL8226-CG 2.5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc848),
++		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
++		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.read_status    = rtl822xb_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
++		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.config_init    = rtl822xb_config_init,
++		.get_rate_matching = rtl822xb_get_rate_matching,
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822xb_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		.match_phy_device = rtl8251b_c45_match_phy_device,
++		.name           = "RTL8251B 5Gbps PHY",
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++	}, {
++		.match_phy_device = rtl_internal_nbaset_match_phy_device,
++		.name           = "Realtek Internal NBASE-T PHY",
++		.flags		= PHY_IS_INTERNAL,
++		.get_features   = rtl822x_get_features,
++		.config_aneg    = rtl822x_config_aneg,
++		.read_status    = rtl822x_read_status,
++		.suspend        = genphy_suspend,
++		.resume         = rtlgen_resume,
++		.read_page      = rtl821x_read_page,
++		.write_page     = rtl821x_write_page,
++		.read_mmd	= rtl822x_read_mmd,
++		.write_mmd	= rtl822x_write_mmd,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001ccad0),
++		.name		= "RTL8224 2.5Gbps PHY",
++		.get_features   = rtl822x_c45_get_features,
++		.config_aneg    = rtl822x_c45_config_aneg,
++		.read_status    = rtl822x_c45_read_status,
++		.suspend        = genphy_c45_pma_suspend,
++		.resume         = rtlgen_c45_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc961),
++		.name		= "RTL8366RB Gigabit Ethernet",
++		.config_init	= &rtl8366rb_config_init,
++		/* These interrupts are handled by the irq controller
++		 * embedded inside the RTL8366RB, they get unmasked when the
++		 * irq is requested and ACKed by reading the status register,
++		 * which is done by the irqchip code.
++		 */
++		.config_intr	= genphy_no_config_intr,
++		.handle_interrupt = genphy_handle_interrupt_no_ack,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001ccb00),
++		.name		= "RTL9000AA_RTL9000AN Ethernet",
++		.features       = PHY_BASIC_T1_FEATURES,
++		.config_init	= rtl9000a_config_init,
++		.config_aneg	= rtl9000a_config_aneg,
++		.read_status	= rtl9000a_read_status,
++		.config_intr	= rtl9000a_config_intr,
++		.handle_interrupt = rtl9000a_handle_interrupt,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_page	= rtl821x_read_page,
++		.write_page	= rtl821x_write_page,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc942),
++		.name		= "RTL8365MB-VC Gigabit Ethernet",
++		/* Interrupt handling analogous to RTL8366RB */
++		.config_intr	= genphy_no_config_intr,
++		.handle_interrupt = genphy_handle_interrupt_no_ack,
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++	}, {
++		PHY_ID_MATCH_EXACT(0x001cc960),
++		.name		= "RTL8366S Gigabit Ethernet",
++		.suspend	= genphy_suspend,
++		.resume		= genphy_resume,
++		.read_mmd	= genphy_read_mmd_unsupported,
++		.write_mmd	= genphy_write_mmd_unsupported,
++	},
++};
++
++module_phy_driver(realtek_drvs);
++
++static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
++	{ PHY_ID_MATCH_VENDOR(0x001cc800) },
++	{ }
++};
++
++MODULE_DEVICE_TABLE(mdio, realtek_tbl);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
new file mode 100644
index 0000000000..4c1e2f0624
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
@@ -0,0 +1,180 @@
+From 33700ca45b7d2e1655d4cad95e25671e8a94e2f0 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Sat, 11 Jan 2025 21:51:24 +0100
+Subject: [PATCH] net: phy: realtek: add hwmon support for temp sensor on
+ RTL822x
+
+This adds hwmon support for the temperature sensor on RTL822x.
+It's available on the standalone versions of the PHY's, and on
+the integrated PHY's in RTL8125B/RTL8125D/RTL8126.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Link: https://patch.msgid.link/ad6bfe9f-6375-4a00-84b4-bfb38a21bd71 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/phy/realtek/Kconfig         |  6 ++
+ drivers/net/phy/realtek/Makefile        |  1 +
+ drivers/net/phy/realtek/realtek.h       | 10 ++++
+ drivers/net/phy/realtek/realtek_hwmon.c | 79 +++++++++++++++++++++++++
+ drivers/net/phy/realtek/realtek_main.c  | 12 ++++
+ 5 files changed, 108 insertions(+)
+ create mode 100644 drivers/net/phy/realtek/realtek.h
+ create mode 100644 drivers/net/phy/realtek/realtek_hwmon.c
+
+--- a/drivers/net/phy/realtek/Kconfig
++++ b/drivers/net/phy/realtek/Kconfig
+@@ -3,3 +3,9 @@ config REALTEK_PHY
+ 	tristate "Realtek PHYs"
+ 	help
+ 	  Currently supports RTL821x/RTL822x and fast ethernet PHYs
++
++config REALTEK_PHY_HWMON
++	def_bool REALTEK_PHY && HWMON
++	depends on !(REALTEK_PHY=y && HWMON=m)
++	help
++	  Optional hwmon support for the temperature sensor
+--- a/drivers/net/phy/realtek/Makefile
++++ b/drivers/net/phy/realtek/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0
+ realtek-y			+= realtek_main.o
++realtek-$(CONFIG_REALTEK_PHY_HWMON) += realtek_hwmon.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek.h
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++
++#ifndef REALTEK_H
++#define REALTEK_H
++
++#include <linux/phy.h>
++
++int rtl822x_hwmon_init(struct phy_device *phydev);
++
++#endif /* REALTEK_H */
+--- /dev/null
++++ b/drivers/net/phy/realtek/realtek_hwmon.c
+@@ -0,0 +1,86 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * HWMON support for Realtek PHY's
++ *
++ * Author: Heiner Kallweit <hkallweit1 at gmail.com>
++ */
++
++#include <linux/hwmon.h>
++#include <linux/phy.h>
++
++#include "realtek.h"
++
++#define RTL822X_VND2_TSALRM				0xa662
++#define RTL822X_VND2_TSRR				0xbd84
++#define RTL822X_VND2_TSSR				0xb54c
++
++static umode_t rtl822x_hwmon_is_visible(const void *drvdata,
++				        enum hwmon_sensor_types type,
++				        u32 attr, int channel)
++{
++	return 0444;
++}
++
++static int rtl822x_hwmon_get_temp(int raw)
++{
++	if (raw >= 512)
++		raw -= 1024;
++
++	return 1000 * raw / 2;
++}
++
++static int rtl822x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
++			      u32 attr, int channel, long *val)
++{
++	struct phy_device *phydev = dev_get_drvdata(dev);
++	int raw;
++
++	switch (attr) {
++	case hwmon_temp_input:
++		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSRR) & 0x3ff;
++		*val = rtl822x_hwmon_get_temp(raw);
++		break;
++	case hwmon_temp_max:
++		/* Chip reduces speed to 1G if threshold is exceeded */
++		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSSR) >> 6;
++		*val = rtl822x_hwmon_get_temp(raw);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static const struct hwmon_ops rtl822x_hwmon_ops = {
++	.is_visible = rtl822x_hwmon_is_visible,
++	.read = rtl822x_hwmon_read,
++};
++
++static const struct hwmon_channel_info * const rtl822x_hwmon_info[] = {
++	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX),
++	NULL
++};
++
++static const struct hwmon_chip_info rtl822x_hwmon_chip_info = {
++	.ops = &rtl822x_hwmon_ops,
++	.info = rtl822x_hwmon_info,
++};
++
++int rtl822x_hwmon_init(struct phy_device *phydev)
++{
++	struct device *hwdev, *dev = &phydev->mdio.dev;
++	const char *name;
++
++	/* Ensure over-temp alarm is reset. */
++	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSALRM, 3);
++
++	name = devm_hwmon_sanitize_name(dev, dev_name(dev));
++	if (IS_ERR(name))
++		return PTR_ERR(name);
++
++	hwdev = devm_hwmon_device_register_with_info(dev, name, phydev,
++						     &rtl822x_hwmon_chip_info,
++						     NULL);
++	return PTR_ERR_OR_ZERO(hwdev);
++}
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -14,6 +14,8 @@
+ #include <linux/delay.h>
+ #include <linux/clk.h>
+ 
++#include "realtek.h"
++
+ #define RTL821x_PHYSR				0x11
+ #define RTL821x_PHYSR_DUPLEX			BIT(13)
+ #define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
+@@ -820,6 +822,15 @@ static int rtl822x_write_mmd(struct phy_
+ 	return ret;
+ }
+ 
++static int rtl822x_probe(struct phy_device *phydev)
++{
++	if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON) &&
++	    phydev->phy_id != RTL_GENERIC_PHYID)
++		return rtl822x_hwmon_init(phydev);
++
++	return 0;
++}
++
+ static int rtl822xb_config_init(struct phy_device *phydev)
+ {
+ 	bool has_2500, has_sgmii;
+@@ -1519,6 +1530,7 @@ static struct phy_driver realtek_drvs[]
+ 		.match_phy_device = rtl_internal_nbaset_match_phy_device,
+ 		.name           = "Realtek Internal NBASE-T PHY",
+ 		.flags		= PHY_IS_INTERNAL,
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 8de57707a2..52ffc7a0f9 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -10,12 +10,12 @@ the PHY.
 Reported-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 6 ++++++
+ drivers/net/phy/realtek/realtek_main.c | 6 ++++++
  1 file changed, 6 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1412,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1431,6 +1431,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1422,6 +1423,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1441,6 +1442,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1434,6 +1436,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1453,6 +1455,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1444,6 +1447,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1463,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1456,6 +1460,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1475,6 +1479,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1468,6 +1473,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1478,6 +1484,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1497,6 +1503,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1490,6 +1497,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1509,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
index 7e48c16515..edc03b5575 100644
--- a/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-02-net-phy-realtek-disable-SGMII-in-band-AN-for-2-5G-PHYs.patch
@@ -15,12 +15,12 @@ Reported-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Tested-by: Yevhen Kolomeiko <jarvis2709 at gmail.com>
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++--
+ drivers/net/phy/realtek/realtek_main.c | 27 +++++++++++++++++++++++++--
  1 file changed, 25 insertions(+), 2 deletions(-)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -815,8 +815,8 @@ static int rtl822x_write_mmd(struct phy_
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -834,8 +834,8 @@ static int rtl822x_probe(struct phy_devi
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
@@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  
  	has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
  			    phydev->host_interfaces) ||
-@@ -866,7 +866,29 @@ static int rtl822xb_config_init(struct p
+@@ -885,7 +885,29 @@ static int rtl822xb_config_init(struct p
  	if (ret < 0)
  		return ret;
  
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 722ec02cdc..3a3d052505 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -13,12 +13,12 @@ rtl821x_write_page instead of 3 individually locked MDIO bus operations.
 
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 8 +++++---
+ drivers/net/phy/realtek/realtek_main.c | 8 +++++---
  1 file changed, 5 insertions(+), 3 deletions(-)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1093,9 +1093,11 @@ static bool rtlgen_supports_2_5gbps(stru
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1112,9 +1112,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 1b9cdada6d..42873e7bdf 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -8,12 +8,12 @@ just like for RTL821x 1GE PHYs.
 
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 ---
- drivers/net/phy/realtek.c | 11 +++++++++++
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
  1 file changed, 11 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -80,6 +80,10 @@
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -82,6 +82,10 @@
  
  #define RTL822X_VND2_GANLPAR				0xa414
  
@@ -24,11 +24,11 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1189,6 +1193,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1208,6 +1212,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
-+static int rtl822x_probe(struct phy_device *phydev)
++static int rtl822x_aldps_probe(struct phy_device *phydev)
 +{
 +	struct device *dev = &phydev->mdio.dev;
 +	int val;
@@ -50,51 +50,51 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1460,6 +1483,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1479,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1471,6 +1495,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1490,6 +1514,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1484,6 +1509,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1503,6 +1528,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1497,6 +1523,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1516,6 +1542,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1508,6 +1535,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1527,6 +1554,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1521,6 +1549,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1540,6 +1568,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 63ffd0a0c9..39c1929b5f 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -12,9 +12,9 @@ over the implemented MMDs.
 Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 [forward-port by @namiltd]
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1139,10 +1139,32 @@ static int rtl8226_match_phy_device(stru
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1158,10 +1158,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index c9e15fb463..1ab2fe7618 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -7,12 +7,12 @@ This commit introduces interrupt support for RTL8221B.
 
 Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 ---
- drivers/net/phy/realtek.c | 47 +++++++++++++++++++++++++++++++++++++++
+ drivers/net/phy/realtek/realtek_main.c | 47 +++++++++++++++++++++++++++++++++++++++
  1 file changed, 47 insertions(+)
 
---- a/drivers/net/phy/realtek.c
-+++ b/drivers/net/phy/realtek.c
-@@ -1369,6 +1369,51 @@ static irqreturn_t rtl9000a_handle_inter
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1388,6 +1388,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1531,6 +1576,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1550,6 +1595,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1545,6 +1592,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1564,6 +1611,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1557,6 +1606,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1576,6 +1625,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1571,6 +1622,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1590,6 +1641,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_probe,
+ 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
diff --git a/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch b/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
index 73f735828f..bb7e7be6d2 100644
--- a/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
+++ b/target/linux/mediatek/patches-6.6/500-gsw-rtl8367s-mt7622-support.patch
@@ -1,6 +1,6 @@
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -419,6 +419,12 @@ config ROCKCHIP_PHY
+@@ -416,6 +416,12 @@ config ROCKCHIP_PHY
  	help
  	  Currently supports the integrated Ethernet PHY.
  
@@ -16,7 +16,7 @@
 --- a/drivers/net/phy/Makefile
 +++ b/drivers/net/phy/Makefile
 @@ -102,6 +102,7 @@ obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
 +obj-$(CONFIG_RTL8367S_GSW)	+= rtk/
diff --git a/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
index 40771202c5..676bd7c093 100644
--- a/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
+++ b/target/linux/mediatek/patches-6.6/735-net-phy-realtek-rtl8261n.patch
@@ -1,8 +1,8 @@
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -399,6 +399,8 @@ config REALTEK_PHY
- 	help
- 	  Supports the Realtek 821x PHY.
+@@ -396,6 +396,8 @@ config QSEMI_PHY
+ 
+ source "drivers/net/phy/realtek/Kconfig"
  
 +source "drivers/net/phy/rtl8261n/Kconfig"
 +
@@ -14,7 +14,7 @@
 @@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja
  obj-y				+= qcom/
  obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
 +obj-y				+= rtl8261n/
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o
diff --git a/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch b/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
index 43d4a7d4fc..4d6866db24 100644
--- a/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
+++ b/target/linux/realtek/patches-6.6/720-add-rtl-phy.patch
@@ -14,9 +14,9 @@ Submitted-by: Birger Koblitz <mail at birger-koblitz.de>
 
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
-@@ -410,6 +410,12 @@ config REALTEK_PHY
- 	help
- 	  Supports the Realtek 821x PHY.
+@@ -407,6 +407,12 @@ config QSEMI_PHY
+ 
+ source "drivers/net/phy/realtek/Kconfig"
  
 +config REALTEK_SOC_PHY
 +	tristate "Realtek SoC PHYs"
@@ -32,7 +32,7 @@ Submitted-by: Birger Koblitz <mail at birger-koblitz.de>
 @@ -100,6 +100,7 @@ obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja
  obj-y				+= qcom/
  obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o
- obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
+ obj-$(CONFIG_REALTEK_PHY)	+= realtek/
 +obj-$(CONFIG_REALTEK_SOC_PHY)   += rtl83xx-phy.o
  obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o
  obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o



From lede-commits at lists.infradead.org  Fri Jan 17 14:53:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 17 Jan 2025 17:53:24 -0500
Subject: [openwrt/openwrt]  generic: backport pending Realtek PHY patches
In-Reply-To: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
References: <173715440107.3759909.18022745650053272898@git-01.infra.openwrt.org>
Message-ID: <mailman.42389.1737154410.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/4daf540df3e74d19fc5c34e4e87376a1209e6af9

commit 4daf540df3e74d19fc5c34e4e87376a1209e6af9
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 17 13:45:11 2025 +0100

    generic: backport pending Realtek PHY patches
    
    These patches have been accepted, so we can move them from pending to
    backported.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 7924acdd63490aa436bf114d290cb56cd4eba008)
---
 ...ltek-clear-1000Base-T-lpa-if-link-is-down.patch | 52 +++++++++++++++
 ...ltek-clear-master_slave_state-if-link-is-.patch | 35 ++++++++++
 ...-net-phy-realtek-always-clear-NBase-T-lpa.patch | 42 ++++++++++++
 ...tek-add-support-for-reading-MDIO_MMD_VEN.patch} |  0
 ...-realtek-PHY-driver-to-its-own-subdirect.patch} | 62 +++++++++--------
 ...tek-add-hwmon-support-for-temp-sensor-on.patch} |  2 +-
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch | 16 ++---
 ...ltek-make-sure-paged-read-is-protected-by.patch |  2 +-
 ...4-net-phy-realtek-introduce-rtl822x_probe.patch | 14 ++--
 ...-realtek-detect-early-version-of-RTL8221B.patch |  2 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch | 10 +--
 ...ltek-clear-1000Base-T-lpa-bits-if-link-is.patch | 78 ----------------------
 ...ltek-clear-master_slave_state-if-link-is-.patch | 61 -----------------
 ...ltek-always-clear-10gbase-t-link-partner-.patch | 67 -------------------
 14 files changed, 182 insertions(+), 261 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch b/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
new file mode 100644
index 0000000000..3e9631e4a3
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
@@ -0,0 +1,52 @@
+From 34d5a86ff7bbe225fba3ad91f9b4dc85fb408e18 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:43:35 +0000
+Subject: [PATCH] net: phy: realtek: clear 1000Base-T lpa if link is down
+
+Only read 1000Base-T link partner advertisement if autonegotiation has
+completed and otherwise 1000Base-T link partner advertisement bits.
+
+This fixes bogus 1000Base-T link partner advertisement after link goes
+down (eg. by disconnecting the wire).
+Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 19 ++++++++-----------
+ 1 file changed, 8 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1023,23 +1023,20 @@ static int rtl822x_c45_read_status(struc
+ {
+ 	int ret, val;
+ 
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !genphy_c45_aneg_done(phydev))
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
+ 	/* Vendor register as C45 has no standardized support for 1000BaseT */
+-	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
+ 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+ 				   RTL822X_VND2_GANLPAR);
+ 		if (val < 0)
+ 			return val;
+-
+-		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
+ 	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
+ 
+ 	if (!phydev->link)
+ 		return 0;
diff --git a/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
new file mode 100644
index 0000000000..778602d3e5
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
@@ -0,0 +1,35 @@
+From ea8318cb33e593bbfc59d637eae45a69732c5387 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:43:43 +0000
+Subject: [PATCH] net: phy: realtek: clear master_slave_state if link is down
+
+rtlgen_decode_physr() which sets master_slave_state isn't called in case
+the link is down and other than rtlgen_read_status(),
+rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
+
+Avoid stale master_slave_state by always setting it to
+MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
+is down.
+
+Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -1038,8 +1038,10 @@ static int rtl822x_c45_read_status(struc
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	if (!phydev->link)
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
+ 		return 0;
++	}
+ 
+ 	/* Read actual speed from vendor register. */
+ 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch b/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
new file mode 100644
index 0000000000..d365ed0ad2
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
@@ -0,0 +1,42 @@
+From d3eb58549842c60ed46f37da7f4da969e3d6ecd3 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Wed, 15 Jan 2025 14:45:00 +0000
+Subject: [PATCH] net: phy: realtek: always clear NBase-T lpa
+
+Clear NBase-T link partner advertisement before calling
+rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
+setting speed and duplex.
+
+This fixes bogus 2.5G/5G/10G link partner advertisement and thus
+speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
+NBase-T lpa.
+
+Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/phy/realtek.c
++++ b/drivers/net/phy/realtek.c
+@@ -952,15 +952,15 @@ static int rtl822x_read_status(struct ph
+ {
+ 	int lpadv, ret;
+ 
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
+ 	ret = rtlgen_read_status(phydev);
+ 	if (ret < 0)
+ 		return ret;
+ 
+ 	if (phydev->autoneg == AUTONEG_DISABLE ||
+-	    !phydev->autoneg_complete) {
+-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
+ 		return 0;
+-	}
+ 
+ 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ 	if (lpadv < 0)
diff --git a/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch b/target/linux/generic/backport-6.6/781-23-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
rename to target/linux/generic/backport-6.6/781-23-v6.14-net-phy-realtek-add-support-for-reading-MDIO_MMD_VEN.patch
diff --git a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch b/target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
similarity index 99%
rename from target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
rename to target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
index b410ab8a32..e66d724a98 100644
--- a/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
+++ b/target/linux/generic/backport-6.6/781-24-v6.14-net-phy-move-realtek-PHY-driver-to-its-own-subdirect.patch
@@ -63,7 +63,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +obj-$(CONFIG_REALTEK_PHY)	+= realtek.o
 --- a/drivers/net/phy/realtek.c
 +++ /dev/null
-@@ -1,1590 +0,0 @@
+@@ -1,1589 +0,0 @@
 -// SPDX-License-Identifier: GPL-2.0+
 -/* drivers/net/phy/realtek.c
 - *
@@ -1026,15 +1026,15 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -{
 -	int lpadv, ret;
 -
+-	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-
 -	ret = rtlgen_read_status(phydev);
 -	if (ret < 0)
 -		return ret;
 -
 -	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !phydev->autoneg_complete) {
--		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+-	    !phydev->autoneg_complete)
 -		return 0;
--	}
 -
 -	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
 -	if (lpadv < 0)
@@ -1097,26 +1097,25 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -{
 -	int ret, val;
 -
--	ret = genphy_c45_read_status(phydev);
--	if (ret < 0)
--		return ret;
--
--	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !genphy_c45_aneg_done(phydev))
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
--
 -	/* Vendor register as C45 has no standardized support for 1000BaseT */
--	if (phydev->autoneg == AUTONEG_ENABLE) {
+-	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
 -		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
 -				   RTL822X_VND2_GANLPAR);
 -		if (val < 0)
 -			return val;
--
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+-	} else {
+-		val = 0;
 -	}
+-	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
 -
--	if (!phydev->link)
+-	ret = genphy_c45_read_status(phydev);
+-	if (ret < 0)
+-		return ret;
+-
+-	if (!phydev->link) {
+-		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
 -		return 0;
+-	}
 -
 -	/* Read actual speed from vendor register. */
 -	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
@@ -1656,7 +1655,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 -MODULE_DEVICE_TABLE(mdio, realtek_tbl);
 --- /dev/null
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -0,0 +1,1590 @@
+@@ -0,0 +1,1589 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +/* drivers/net/phy/realtek.c
 + *
@@ -2619,15 +2618,15 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +{
 +	int lpadv, ret;
 +
++	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++
 +	ret = rtlgen_read_status(phydev);
 +	if (ret < 0)
 +		return ret;
 +
 +	if (phydev->autoneg == AUTONEG_DISABLE ||
-+	    !phydev->autoneg_complete) {
-+		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++	    !phydev->autoneg_complete)
 +		return 0;
-+	}
 +
 +	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
 +	if (lpadv < 0)
@@ -2690,26 +2689,25 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
 +{
 +	int ret, val;
 +
-+	ret = genphy_c45_read_status(phydev);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (phydev->autoneg == AUTONEG_DISABLE ||
-+	    !genphy_c45_aneg_done(phydev))
-+		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+
 +	/* Vendor register as C45 has no standardized support for 1000BaseT */
-+	if (phydev->autoneg == AUTONEG_ENABLE) {
++	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
 +		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
 +				   RTL822X_VND2_GANLPAR);
 +		if (val < 0)
 +			return val;
-+
-+		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
++	} else {
++		val = 0;
 +	}
++	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
 +
-+	if (!phydev->link)
++	ret = genphy_c45_read_status(phydev);
++	if (ret < 0)
++		return ret;
++
++	if (!phydev->link) {
++		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
 +		return 0;
++	}
 +
 +	/* Read actual speed from vendor register. */
 +	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch b/target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
similarity index 98%
rename from target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
rename to target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
index 4c1e2f0624..7c1fe54267 100644
--- a/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
+++ b/target/linux/generic/backport-6.6/781-25-v6.14-net-phy-realtek-add-hwmon-support-for-temp-sensor-on.patch
@@ -170,7 +170,7 @@ Signed-off-by: Jakub Kicinski <kuba at kernel.org>
  static int rtl822xb_config_init(struct phy_device *phydev)
  {
  	bool has_2500, has_sgmii;
-@@ -1519,6 +1530,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1518,6 +1529,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl_internal_nbaset_match_phy_device,
  		.name           = "Realtek Internal NBASE-T PHY",
  		.flags		= PHY_IS_INTERNAL,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 52ffc7a0f9..3f43412648 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1431,6 +1431,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1430,6 +1430,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.name		= "RTL8226 2.5Gbps PHY",
  		.match_phy_device = rtl8226_match_phy_device,
@@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.read_status	= rtl822x_read_status,
-@@ -1441,6 +1442,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1440,6 +1441,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_match_phy_device,
  		.name		= "RTL8226B_RTL8221B 2.5Gbps PHY",
@@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features	= rtl822x_get_features,
  		.config_aneg	= rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1453,6 +1455,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1452,6 +1454,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.read_status    = rtl822x_read_status,
-@@ -1463,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1462,6 +1465,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1475,6 +1479,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1474,6 +1478,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1486,6 +1491,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
  		.get_features   = rtl822x_c45_get_features,
-@@ -1497,6 +1503,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1496,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
  		.config_init    = rtl822xb_config_init,
-@@ -1509,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1508,6 +1515,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
index 3a3d052505..d5f80d1c91 100644
--- a/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
+++ b/target/linux/generic/pending-6.6/720-03-net-phy-realtek-make-sure-paged-read-is-protected-by.patch
@@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1112,9 +1112,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1111,9 +1111,11 @@ static bool rtlgen_supports_2_5gbps(stru
  {
  	int val;
  
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
index 42873e7bdf..b73e6c6443 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
@@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  #define RTL8366RB_POWER_SAVE			0x15
  #define RTL8366RB_POWER_SAVE_ON			BIT(12)
  
-@@ -1208,6 +1212,25 @@ static int rtl8251b_c45_match_phy_device
+@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
  	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
  }
  
@@ -50,7 +50,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  static int rtlgen_resume(struct phy_device *phydev)
  {
  	int ret = genphy_resume(phydev);
-@@ -1479,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc838),
  		.name           = "RTL8226-CG 2.5Gbps PHY",
@@ -58,7 +58,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1490,6 +1514,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		PHY_ID_MATCH_EXACT(0x001cc848),
  		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@@ -66,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1503,6 +1528,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1502,6 +1527,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1516,6 +1542,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1515,6 +1541,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1527,6 +1554,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1526,6 +1553,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -90,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1540,6 +1568,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1539,6 +1567,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 39c1929b5f..22c271c3eb 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1158,10 +1158,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index 1ab2fe7618..c855a211e8 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1388,6 +1388,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1550,6 +1595,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1564,6 +1611,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.config_init    = rtl822xb_config_init,
-@@ -1576,6 +1625,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
-@@ -1590,6 +1641,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
diff --git a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch b/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
deleted file mode 100644
index 5bc77ed3b8..0000000000
--- a/target/linux/generic/pending-6.6/721-net-phy-realtek-clear-1000Base-T-lpa-bits-if-link-is.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From patchwork Wed Jan 15 14:43:35 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940510
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:43:35 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 1/3] net: phy: realtek: clear 1000Base-T lpa if link is
- down
-Message-ID: 
- <67e38eee4c46b921938fb33f5bc86c8979b9aa33.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-Only read 1000Base-T link partner advertisement if autonegotiation has
-completed and otherwise 1000Base-T link partner advertisement bits.
-
-This fixes bogus 1000Base-T link partner advertisement after link goes
-down (eg. by disconnecting the wire).
-Fixes: 5cb409b3960e ("net: phy: realtek: clear 1000Base-T link partner advertisement")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 19 ++++++++-----------
- 1 file changed, 8 insertions(+), 11 deletions(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1068,23 +1068,20 @@ static int rtl822x_c45_read_status(struc
- {
- 	int ret, val;
- 
--	ret = genphy_c45_read_status(phydev);
--	if (ret < 0)
--		return ret;
--
--	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !genphy_c45_aneg_done(phydev))
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
--
- 	/* Vendor register as C45 has no standardized support for 1000BaseT */
--	if (phydev->autoneg == AUTONEG_ENABLE) {
-+	if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
- 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
- 				   RTL822X_VND2_GANLPAR);
- 		if (val < 0)
- 			return val;
--
--		mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
-+	} else {
-+		val = 0;
- 	}
-+	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
-+
-+	ret = genphy_c45_read_status(phydev);
-+	if (ret < 0)
-+		return ret;
- 
- 	if (!phydev->link)
- 		return 0;
diff --git a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
deleted file mode 100644
index b7e5f8b58f..0000000000
--- a/target/linux/generic/pending-6.6/722-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From patchwork Wed Jan 15 14:43:43 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940511
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:43:43 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 2/3] net: phy: realtek: clear master_slave_state if link
- is down
-Message-ID: 
- <2155887c3a665e4132a034df1e9cfdeec0ae48c9.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-rtlgen_decode_physr() which sets master_slave_state isn't called in case
-the link is down and other than rtlgen_read_status(),
-rtl822x_c45_read_status() doesn't implicitely clear master_slave_state.
-
-Avoid stale master_slave_state by always setting it to
-MASTER_SLAVE_STATE_UNKNOWN in rtl822x_c45_read_status() in case the link
-is down.
-
-Fixes: 081c9c0265c9 ("net: phy: realtek: read duplex and gbit master from PHYSR register")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1083,8 +1083,10 @@ static int rtl822x_c45_read_status(struc
- 	if (ret < 0)
- 		return ret;
- 
--	if (!phydev->link)
-+	if (!phydev->link) {
-+		phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;
- 		return 0;
-+	}
- 
- 	/* Read actual speed from vendor register. */
- 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);
diff --git a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch b/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
deleted file mode 100644
index 23947c2200..0000000000
--- a/target/linux/generic/pending-6.6/723-net-phy-realtek-always-clear-10gbase-t-link-partner-.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From patchwork Wed Jan 15 14:45:00 2025
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13940519
-X-Patchwork-Delegate: kuba at kernel.org
-Date: Wed, 15 Jan 2025 14:45:00 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>,
-	Russell King <linux at armlinux.org.uk>,
-	"David S. Miller" <davem at davemloft.net>,
-	Eric Dumazet <edumazet at google.com>,
-	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
-	Daniel Golle <daniel at makrotopia.org>,
-	"Russell King (Oracle)" <linux at armlinux.org.uk>,
-	netdev at vger.kernel.org, linux-kernel at vger.kernel.org
-Subject: [PATCH net 3/3] net: phy: realtek: always clear NBase-T lpa
-Message-ID: 
- <566d4771d68a1e18d2d48860e25891e468e26551.1736951652.git.daniel at makrotopia.org>
-References: <cover.1736951652.git.daniel at makrotopia.org>
-Precedence: bulk
-X-Mailing-List: netdev at vger.kernel.org
-List-Id: <netdev.vger.kernel.org>
-List-Subscribe: <mailto:netdev+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:netdev+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-In-Reply-To: <cover.1736951652.git.daniel at makrotopia.org>
-X-Patchwork-Delegate: kuba at kernel.org
-
-Clear NBase-T link partner advertisement before calling
-rtlgen_read_status() to avoid phy_resolve_aneg_linkmode() wrongly
-setting speed and duplex.
-
-This fixes bogus 2.5G/5G/10G link partner advertisement and thus
-speed and duplex being set by phy_resolve_aneg_linkmode() due to stale
-NBase-T lpa.
-
-Fixes: 68d5cd09e891 ("net: phy: realtek: change order of calls in C22 read_status()")
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
-Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
----
- drivers/net/phy/realtek/realtek_main.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -997,15 +997,15 @@ static int rtl822x_read_status(struct ph
- {
- 	int lpadv, ret;
- 
-+	mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+
- 	ret = rtlgen_read_status(phydev);
- 	if (ret < 0)
- 		return ret;
- 
- 	if (phydev->autoneg == AUTONEG_DISABLE ||
--	    !phydev->autoneg_complete) {
--		mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
-+	    !phydev->autoneg_complete)
- 		return 0;
--	}
- 
- 	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
- 	if (lpadv < 0)



From lede-commits at lists.infradead.org  Sat Jan 18 01:36:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 04:36:41 -0500
Subject: [openwrt/openwrt]  wifi-scripts: add a few missing auth_type checks
 in ucode
In-Reply-To: <173719300188.401429.17974972307059267306@git-01.infra.openwrt.org>
References: <173719300188.401429.17974972307059267306@git-01.infra.openwrt.org>
Message-ID: <mailman.42455.1737193011.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7482296ebf73d3c9b7f40e2f37670d337137598f

commit 7482296ebf73d3c9b7f40e2f37670d337137598f
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sat Jan 18 10:06:44 2025 +0100

    wifi-scripts: add a few missing auth_type checks in ucode
    
    Add some missing documented or commonly used values
    
    Fixes: https://github.com/openwrt/openwrt/issues/17431
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../wifi-scripts/files-ucode/usr/share/ucode/wifi/iface.uc     | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/iface.uc b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/iface.uc
index ed9b2625bb..710ded10e5 100644
--- a/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/iface.uc
+++ b/package/network/config/wifi-scripts/files-ucode/usr/share/ucode/wifi/iface.uc
@@ -71,12 +71,22 @@ export function parse_encryption(config) {
 		config.auth_type = 'eap2';
 		break;
 
+	case 'psk-mixed':
+		config.auth_type = "psk";
+		break;
+
+	case 'psk3':
+		config.auth_type = 'sae';
+		break;
+
+	case 'psk3-mixed':
 	case 'sae-mixed':
 		config.auth_type = 'psk-sae';
 		break;
 
 	case 'wpa':
 	case 'wpa2':
+	case 'wpa-mixed':
 		config.auth_type = 'eap';
 		break;
 	}



From lede-commits at lists.infradead.org  Sat Jan 18 06:23:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 09:23:42 -0500
Subject: [openwrt/openwrt]  realtek: rtl839x: Enable AUX MDIO controller
In-Reply-To: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
References: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
Message-ID: <mailman.42574.1737210243.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/cddcc69ddf9c6284d6c9a6399c4ea48d7a044719

commit cddcc69ddf9c6284d6c9a6399c4ea48d7a044719
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 13:45:55 2025 +0100

    realtek: rtl839x: Enable AUX MDIO controller
    
    Enable the driver for the Realtek Otto auxiliary MDIO driver so RTL839x
    devices can use it. The related node is added to the base devicetree for
    rtl839x-based devices, so they can enabled and use it when required.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl839x.dtsi   | 21 +++++++++++++++++++++
 target/linux/realtek/rtl839x/config-6.6 |  2 +-
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/target/linux/realtek/dts/rtl839x.dtsi b/target/linux/realtek/dts/rtl839x.dtsi
index 3f87f5622e..7fc5aea70c 100644
--- a/target/linux/realtek/dts/rtl839x.dtsi
+++ b/target/linux/realtek/dts/rtl839x.dtsi
@@ -258,6 +258,22 @@
 
 	};
 
+	switchcore at 1b000000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x1b000000 0x20000>;
+
+		mdio_aux: mdio-aux {
+			compatible = "realtek,rtl8390-aux-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&mdio_aux_mdx>;
+		};
+	};
+
 	pinmux at 1b000004 {
 		compatible = "pinctrl-single";
 		reg = <0x1b000004 0x4>;
@@ -290,6 +306,11 @@
 		pinmux_disable_sys_led: disable_sys_led {
 			pinctrl-single,bits = <0x0 0x0 0x4000>;
 		};
+
+		/* enable AUX MDC/MDIO */
+		mdio_aux_mdx: aux-mdx-pins {
+			pinctrl-single,bits = <0x0 0x100000 0x1c0000>;
+		};
 	};
 
 	ethernet0: ethernet at 1b00a300 {
diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6
index 2616286a17..dac7646925 100644
--- a/target/linux/realtek/rtl839x/config-6.6
+++ b/target/linux/realtek/rtl839x/config-6.6
@@ -130,7 +130,7 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
-# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
+CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
 # CONFIG_MFD_RTL8231 is not set
 CONFIG_MFD_SYSCON=y



From lede-commits at lists.infradead.org  Sat Jan 18 06:23:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 09:23:41 -0500
Subject: [openwrt/openwrt]  realtek: Update aux-mdio driver
In-Reply-To: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
References: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
Message-ID: <mailman.42575.1737210243.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/52ffef647152578ba89d2e4c1f9f2f869a3fc8a8

commit 52ffef647152578ba89d2e4c1f9f2f869a3fc8a8
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 13:28:44 2025 +0100

    realtek: Update aux-mdio driver
    
    For RTL839x, the driver was producing frequent timeouts on bus accesses.
    Increasing the timeout to the one from a recent Realtek SDK resolves
    these timeouts. To minimize overhead on different SoCs, each controller
    can specify their own timeout.
    
    This also add support for the register format as used on RTL93xx.
    Support is added for the RTL930x "ext gpio" controller.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 ...dio-Add-Realtek-Otto-auxiliary-controller.patch | 130 +++++++++++++--------
 1 file changed, 82 insertions(+), 48 deletions(-)

diff --git a/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
index a58cc496ef..7315899b3f 100644
--- a/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
+++ b/target/linux/realtek/patches-6.6/723-net-mdio-Add-Realtek-Otto-auxiliary-controller.patch
@@ -1,21 +1,21 @@
-From c7ddb74c981c1a29bad82d555d08724aca93b687 Mon Sep 17 00:00:00 2001
+From ffb7da9aa25765b2115e7ff3ee4f6dafa60f5421 Mon Sep 17 00:00:00 2001
 From: Sander Vanheule <sander at svanheule.net>
 Date: Fri, 27 Dec 2024 14:55:31 +0100
 Subject: [PATCH] net: mdio: Add Realtek Otto auxiliary controller
 
-SoCs in Realtek's Otto platform such as the RTL8380 and RTL8391 have a
-simple auxiliary MDIO controller that is commonly used to manage RTL8231
-GPIO expanders on switch devices.
+SoCs in Realtek's Otto platform such as the RTL8380, RTL8391, and
+RTL9302 have a simple auxiliary MDIO controller that is commonly used to
+manage RTL8231 GPIO expanders on switch devices.
 
-Add a new MDIO controller driver supporting the RTL838x (maple) and
-RTL839x (cypress) SoCs.
+Add a new MDIO controller driver supporting the RTL838x (maple), RTL839x
+(cypress), and RTL930x (longan) SoCs.
 
 Signed-off-by: Sander Vanheule <sander at svanheule.net>
 ---
  drivers/net/mdio/Kconfig                 |  10 ++
  drivers/net/mdio/Makefile                |   1 +
- drivers/net/mdio/mdio-realtek-otto-aux.c | 129 +++++++++++++++++++++++
- 3 files changed, 140 insertions(+)
+ drivers/net/mdio/mdio-realtek-otto-aux.c | 175 +++++++++++++++++++++++
+ 3 files changed, 186 insertions(+)
  create mode 100644 drivers/net/mdio/mdio-realtek-otto-aux.c
 
 --- a/drivers/net/mdio/Kconfig
@@ -49,7 +49,7 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
  obj-$(CONFIG_MDIO_THUNDER)		+= mdio-thunder.o
 --- /dev/null
 +++ b/drivers/net/mdio/mdio-realtek-otto-aux.c
-@@ -0,0 +1,141 @@
+@@ -0,0 +1,175 @@
 +// SPDX-License-Identifier: GPL-2.0-or-later
 +
 +#include <linux/mfd/core.h>
@@ -64,65 +64,95 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +
 +#define RTL8380_EXT_GPIO_INDIRECT_ACCESS	0xA09C
 +#define RTL8390_EXT_GPIO_INDIRECT_ACCESS	0x0224
++#define RTL9300_EXT_GPIO_INDIRECT_ACCESS	0xC620
 +
-+#define RTL83XX_AUX_MDIO_DATA			GENMASK(31, 16)
-+#define RTL83XX_AUX_MDIO_REG			GENMASK(11, 7)
-+#define RTL83XX_AUX_MDIO_PHY_ADDR		GENMASK(6, 2)
-+#define RTL83XX_AUX_MDIO_WRITE			BIT(1)
-+#define RTL83XX_AUX_MDIO_READ			0
-+#define RTL83XX_AUX_MDIO_EXEC			BIT(0)
++#define RTL83XX_AUX_MDIO_DATA_OFFSET		16
++#define RTL83XX_AUX_MDIO_RCMD_FAIL		0
++
++#define RTL93XX_AUX_MDIO_DATA_OFFSET		12
++#define RTL93XX_AUX_MDIO_RCMD_FAIL		BIT(28)
++
++#define REALTEK_AUX_MDIO_REG			GENMASK(11, 7)
++#define REALTEK_AUX_MDIO_PHY_ADDR		GENMASK(6, 2)
++#define REALTEK_AUX_MDIO_WRITE			BIT(1)
++#define REALTEK_AUX_MDIO_READ			0
++#define REALTEK_AUX_MDIO_EXEC			BIT(0)
++
++struct realtek_aux_mdio_info {
++	unsigned int cmd_reg;
++	unsigned int data_offset;
++	unsigned int rcmd_fail_mask;
++	unsigned int timeout_us;
++};
++
++static const struct realtek_aux_mdio_info info_rtl838x = {
++	.cmd_reg = RTL8380_EXT_GPIO_INDIRECT_ACCESS,
++	.data_offset = RTL83XX_AUX_MDIO_DATA_OFFSET,
++	.rcmd_fail_mask = RTL83XX_AUX_MDIO_RCMD_FAIL,
++	.timeout_us = 1700,
++};
++
++static const struct realtek_aux_mdio_info info_rtl839x = {
++	.cmd_reg = RTL8390_EXT_GPIO_INDIRECT_ACCESS,
++	.data_offset = RTL83XX_AUX_MDIO_DATA_OFFSET,
++	.rcmd_fail_mask = RTL83XX_AUX_MDIO_RCMD_FAIL,
++	.timeout_us = 4120,
++};
++
++static const struct realtek_aux_mdio_info info_rtl930x = {
++	.cmd_reg = RTL9300_EXT_GPIO_INDIRECT_ACCESS,
++	.data_offset = RTL93XX_AUX_MDIO_DATA_OFFSET,
++	.rcmd_fail_mask = RTL93XX_AUX_MDIO_RCMD_FAIL,
++	.timeout_us = 19000,
++};
 +
 +struct realtek_aux_mdio_ctrl {
 +	struct device *dev;
 +	struct regmap *map;
-+	unsigned int cmd_reg;
++	const struct realtek_aux_mdio_info *info;
 +};
 +
 +#define mii_bus_to_ctrl(bus)	((struct realtek_aux_mdio_ctrl *) bus->priv)
 +
-+static int rtl83xx_aux_mdio_cmd(struct realtek_aux_mdio_ctrl *ctrl, int addr, int regnum,
++static int realtek_aux_mdio_cmd(struct realtek_aux_mdio_ctrl *ctrl, int addr, int regnum,
 +		u32 rw_bit, u16 *data)
 +{
-+	unsigned int mask_volatile;
 +	unsigned int cmd;
-+	unsigned int run;
 +	int err;
 +
-+	cmd = rw_bit | RTL83XX_AUX_MDIO_EXEC;
-+	cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_PHY_ADDR, addr);
-+	cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_REG, regnum);
++	cmd = rw_bit | REALTEK_AUX_MDIO_EXEC;
++	cmd |= FIELD_PREP(REALTEK_AUX_MDIO_PHY_ADDR, addr);
++	cmd |= FIELD_PREP(REALTEK_AUX_MDIO_REG, regnum);
 +
-+	mask_volatile = RTL83XX_AUX_MDIO_EXEC;
++	if (rw_bit == REALTEK_AUX_MDIO_WRITE)
++		cmd |= *data << ctrl->info->data_offset;
 +
-+	if (rw_bit == RTL83XX_AUX_MDIO_WRITE)
-+		cmd |= FIELD_PREP(RTL83XX_AUX_MDIO_DATA, *data);
-+	else
-+		mask_volatile |= RTL83XX_AUX_MDIO_DATA;
++	err = regmap_write(ctrl->map, ctrl->info->cmd_reg, cmd);
++	if (err)
++		return err;
 +
-+	err = regmap_write(ctrl->map, ctrl->cmd_reg, cmd);
++	err = regmap_read_poll_timeout_atomic(ctrl->map, ctrl->info->cmd_reg, cmd,
++			!(cmd & REALTEK_AUX_MDIO_EXEC), 3, ctrl->info->timeout_us);
 +	if (err)
 +		return err;
 +
-+	err = regmap_read_poll_timeout_atomic(ctrl->map, ctrl->cmd_reg, run, (run != cmd), 3, 100);
++	if (rw_bit == REALTEK_AUX_MDIO_READ) {
++		if (cmd & ctrl->info->rcmd_fail_mask)
++			return -EIO;
 +
-+	if ((run & ~mask_volatile) != (cmd & ~mask_volatile)) {
-+		dev_err(ctrl->dev, "Command modified. Is offloading still active?");
-+		return -EIO;
++		*data = (cmd >> ctrl->info->data_offset) & GENMASK(15, 0);
 +	}
 +
-+	if (!err && (rw_bit == RTL83XX_AUX_MDIO_READ))
-+		*data = FIELD_GET(RTL83XX_AUX_MDIO_DATA, run);
-+
-+	return err;
++	return 0;
 +}
 +
-+static int rtl83xx_aux_mdio_read(struct mii_bus *bus, int addr, int regnum)
++static int realtek_aux_mdio_read(struct mii_bus *bus, int addr, int regnum)
 +{
 +	struct realtek_aux_mdio_ctrl *ctrl = mii_bus_to_ctrl(bus);
 +	u16 data;
 +	int err;
 +
-+	err = rtl83xx_aux_mdio_cmd(ctrl, addr, regnum, RTL83XX_AUX_MDIO_READ, &data);
++	err = realtek_aux_mdio_cmd(ctrl, addr, regnum, REALTEK_AUX_MDIO_READ, &data);
 +
 +	if (err)
 +		return err;
@@ -130,11 +160,11 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +		return data;
 +}
 +
-+static int rtl83xx_aux_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
++static int realtek_aux_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
 +{
 +	struct realtek_aux_mdio_ctrl *ctrl = mii_bus_to_ctrl(bus);
 +
-+	return rtl83xx_aux_mdio_cmd(ctrl, addr, regnum, RTL83XX_AUX_MDIO_WRITE, &val);
++	return realtek_aux_mdio_cmd(ctrl, addr, regnum, REALTEK_AUX_MDIO_WRITE, &val);
 +}
 +
 +static int realtek_aux_mdio_probe(struct platform_device *pdev)
@@ -149,16 +179,16 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +
 +	ctrl = bus->priv;
 +	ctrl->dev = &pdev->dev;
-+	ctrl->cmd_reg = (unsigned int) device_get_match_data(ctrl->dev);
++	ctrl->info = (const struct realtek_aux_mdio_info *) device_get_match_data(ctrl->dev);
 +	ctrl->map = syscon_node_to_regmap(np->parent);
 +	if (IS_ERR(ctrl->map))
 +		return PTR_ERR(ctrl->map);
 +
-+	bus->name = "RTL83xx auxiliary MDIO bus";
-+	snprintf(bus->id, MII_BUS_ID_SIZE, "rtl83xx-aux-mdio") ;
++	bus->name = "Realtek auxiliary MDIO bus";
++	snprintf(bus->id, MII_BUS_ID_SIZE, "realtek-aux-mdio") ;
 +	bus->parent = ctrl->dev;
-+	bus->read = rtl83xx_aux_mdio_read;
-+	bus->write = rtl83xx_aux_mdio_write;
++	bus->read = realtek_aux_mdio_read;
++	bus->write = realtek_aux_mdio_write;
 +	/* Don't have interrupts */
 +	for (unsigned int i = 0; i < PHY_MAX_ADDR; i++)
 +		bus->irq[i] = PHY_POLL;
@@ -169,11 +199,15 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +static const struct of_device_id realtek_aux_mdio_of_match[] = {
 +	{
 +		.compatible = "realtek,rtl8380-aux-mdio",
-+		.data = (void *) RTL8380_EXT_GPIO_INDIRECT_ACCESS,
++		.data = &info_rtl838x,
 +	},
 +	{
 +		.compatible = "realtek,rtl8390-aux-mdio",
-+		.data = (void *) RTL8390_EXT_GPIO_INDIRECT_ACCESS,
++		.data = &info_rtl839x,
++	},
++	{
++		.compatible = "realtek,rtl9300-aux-mdio",
++		.data = &info_rtl930x,
 +	},
 +	{ /* sentinel */ }
 +};
@@ -189,5 +223,5 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
 +module_platform_driver(realtek_aux_mdio_driver);
 +
 +MODULE_AUTHOR("Sander Vanheule <sander at svanheule.net>");
-+MODULE_DESCRIPTION("Realtek RTL83xx auxiliary MDIO bus");
++MODULE_DESCRIPTION("Realtek otto auxiliary MDIO bus");
 +MODULE_LICENSE("GPL v2");



From lede-commits at lists.infradead.org  Sat Jan 18 06:23:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 09:23:44 -0500
Subject: [openwrt/openwrt]  realtek: Switch RTL8231 driver on Zyxel GS1900-48
In-Reply-To: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
References: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
Message-ID: <mailman.42576.1737210243.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/45aafe67f385a2b6cf65894b2f46ee8e33d87f92

commit 45aafe67f385a2b6cf65894b2f46ee8e33d87f92
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 13:39:01 2025 +0100

    realtek: Switch RTL8231 driver on Zyxel GS1900-48
    
    Switch the Zyxel GS1900-48 over to the new MDIO-based driver for the
    RTL8231 GPIO expander.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts  | 25 ++++++++++++++++------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
index a1e0a6d06d..6bb99b6137 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48.dts
@@ -32,13 +32,6 @@
 		};
 	};
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		indirect-access-bus-id = <3>;
-		gpio-controller;
-	};
-
 	keys {
 		compatible = "gpio-keys-polled";
 		poll-interval = <20>;
@@ -90,6 +83,24 @@
 	};
 };
 
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 3 {
+		compatible = "realtek,rtl8231";
+		reg = <3>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
+
 &spi0 {
 	status = "okay";
 	flash at 0 {



From lede-commits at lists.infradead.org  Sat Jan 18 06:23:43 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 09:23:43 -0500
Subject: [openwrt/openwrt]  realtek: rtl839x: Enable RTL8231 MFD driver
In-Reply-To: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
References: <173721022107.760240.4584871316636367148@git-01.infra.openwrt.org>
Message-ID: <mailman.42577.1737210243.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/fd5797b7ce6856539ec0f88b25a766fc2ce00c19

commit fd5797b7ce6856539ec0f88b25a766fc2ce00c19
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 13:48:17 2025 +0100

    realtek: rtl839x: Enable RTL8231 MFD driver
    
    Enable the RTL8231 MFD core driver, as well as the pinctrl/gpio driver
    to allow RTL839x devices to use it.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl839x/config-6.6 | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6
index dac7646925..b64c46b613 100644
--- a/target/linux/realtek/rtl839x/config-6.6
+++ b/target/linux/realtek/rtl839x/config-6.6
@@ -96,6 +96,7 @@ CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
 CONFIG_GPIO_REALTEK_OTTO=y
+CONFIG_GPIO_REGMAP=y
 CONFIG_GPIO_RTL8231=y
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
@@ -122,6 +123,7 @@ CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_JFFS2_ZLIB=y
 CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_RTL8231 is not set
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MACH_REALTEK_RTL=y
@@ -132,7 +134,8 @@ CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
-# CONFIG_MFD_RTL8231 is not set
+CONFIG_MFD_CORE=y
+CONFIG_MFD_RTL8231=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -201,6 +204,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_RTL8231=y
 CONFIG_PM_OPP=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
@@ -217,6 +221,7 @@ CONFIG_REALTEK_PHY=y
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MDIO=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y



From lede-commits at lists.infradead.org  Sat Jan 18 07:09:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 10:09:36 -0500
Subject: [openwrt/openwrt]  qualcommax: dl-wrx36: fix 2.5G port LED-s
In-Reply-To: <173721297636.806958.8823337708171106572@git-01.infra.openwrt.org>
References: <173721297636.806958.8823337708171106572@git-01.infra.openwrt.org>
Message-ID: <mailman.42590.1737212980.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2d077913cd53cad33123c8a9bf6da8a1c5576c69

commit 2d077913cd53cad33123c8a9bf6da8a1c5576c69
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Sat Jan 18 12:25:01 2025 +0100

    qualcommax: dl-wrx36: fix 2.5G port LED-s
    
    Currently, 2.5G port LED-s on Dynalink are incorrectly configured and thus
    they will light up all of the time.
    
    So, lets fix this by:
    1. Current green LED is actually yellow, change the color
    2. Fix its polarity as its actually active-low
    3. The yellow LED that was registered as being connected to LED_1 pin on
    the PHY is not actually connected at all, so remove it.
    4. The actual green LED is connected to LED_2 on the PHY so add it.
    
    Fixes: 75ad5c24142a ("qualcommax: switch to qca8081 upstream PHY driver")
    Fixes: #14502
    Link: https://github.com/openwrt/openwrt/pull/17656
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts          | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
index c5c089c00f..d25bc90153 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
@@ -178,14 +178,15 @@
 
 			led at 0 {
 				reg = <0>;
-				color = <LED_COLOR_ID_GREEN>;
+				color = <LED_COLOR_ID_YELLOW>;
 				function = LED_FUNCTION_WAN;
 				default-state = "keep";
+				active-low;
 			};
 
-			led at 1 {
-				reg = <1>;
-				color = <LED_COLOR_ID_YELLOW>;
+			led at 2 {
+				reg = <2>;
+				color = <LED_COLOR_ID_GREEN>;
 				function = LED_FUNCTION_WAN;
 				default-state = "keep";
 			};



From lede-commits at lists.infradead.org  Sat Jan 18 07:10:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 10:10:05 -0500
Subject: [openwrt/openwrt]  qualcommax: dl-wrx36: fix 2.5G port LED-s
In-Reply-To: <173721300502.807697.14054930058259084614@git-01.infra.openwrt.org>
References: <173721300502.807697.14054930058259084614@git-01.infra.openwrt.org>
Message-ID: <mailman.42591.1737213008.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a1c781675a16d26eebb70fc3410ef6b8728c109c

commit a1c781675a16d26eebb70fc3410ef6b8728c109c
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Sat Jan 18 12:25:01 2025 +0100

    qualcommax: dl-wrx36: fix 2.5G port LED-s
    
    Currently, 2.5G port LED-s on Dynalink are incorrectly configured and thus
    they will light up all of the time.
    
    So, lets fix this by:
    1. Current green LED is actually yellow, change the color
    2. Fix its polarity as its actually active-low
    3. The yellow LED that was registered as being connected to LED_1 pin on
    the PHY is not actually connected at all, so remove it.
    4. The actual green LED is connected to LED_2 on the PHY so add it.
    
    Fixes: 75ad5c24142a ("qualcommax: switch to qca8081 upstream PHY driver")
    Fixes: #14502
    Link: https://github.com/openwrt/openwrt/pull/17656
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 2d077913cd53cad33123c8a9bf6da8a1c5576c69)
---
 .../files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts          | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
index c5c089c00f..d25bc90153 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts
@@ -178,14 +178,15 @@
 
 			led at 0 {
 				reg = <0>;
-				color = <LED_COLOR_ID_GREEN>;
+				color = <LED_COLOR_ID_YELLOW>;
 				function = LED_FUNCTION_WAN;
 				default-state = "keep";
+				active-low;
 			};
 
-			led at 1 {
-				reg = <1>;
-				color = <LED_COLOR_ID_YELLOW>;
+			led at 2 {
+				reg = <2>;
+				color = <LED_COLOR_ID_GREEN>;
 				function = LED_FUNCTION_WAN;
 				default-state = "keep";
 			};



From lede-commits at lists.infradead.org  Sat Jan 18 07:41:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 10:41:12 -0500
Subject: [openwrt/openwrt]  Revert "ath79: reset ETH switch for AR9344"
In-Reply-To: <173721487248.845892.14729457103507060734@git-01.infra.openwrt.org>
References: <173721487248.845892.14729457103507060734@git-01.infra.openwrt.org>
Message-ID: <mailman.42592.1737214876.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/937b5a3e0017f4f39c0f7727a910d2df78fc4ce9

commit 937b5a3e0017f4f39c0f7727a910d2df78fc4ce9
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 17 20:51:38 2025 +0100

    Revert "ath79: reset ETH switch for AR9344"
    
    This reverts commit 916af73fc388d638b1a717a2411792e0680dd8e6.
    
    It was reported this change did not fix the reboot issues on AR9344.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 104 ---------------------
 1 file changed, 104 deletions(-)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
deleted file mode 100644
index dcac5be58b..0000000000
--- a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From: David Bauer <mail at david-bauer.net>
-Date: Tue, 2 Jan 2025 19:22:40 +0100
-Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
-
-According to datasheet, on AR9344 the switch and switch analog need to
-be reset first before initiating a full reset.
-
-Resetting these systems fixes spurious reset hangs on Atheros AR9344
-SoCs.
-
-Link: https://github.com/freifunk-gluon/gluon/issues/2904
-
-Signed-off-by: David Bauer <mail at david-bauer.net>
-
---- a/drivers/reset/reset-ath79.c
-+++ b/drivers/reset/reset-ath79.c
-@@ -12,8 +12,11 @@
- #include <linux/platform_device.h>
- #include <linux/reset-controller.h>
- #include <linux/reboot.h>
-+#include <linux/delay.h>
-+#include <linux/of.h>
- 
- struct ath79_reset {
-+	struct platform_device *pdev;
- 	struct reset_controller_dev rcdev;
- 	struct notifier_block restart_nb;
- 	void __iomem *base;
-@@ -21,16 +24,13 @@ struct ath79_reset {
- };
- 
- #define FULL_CHIP_RESET 24
-+#define ETH_SWITCH_RESET 8
-+#define ETH_SWITCH_ARESET 12
- 
--static int ath79_reset_update(struct reset_controller_dev *rcdev,
-+static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
- 			unsigned long id, bool assert)
- {
--	struct ath79_reset *ath79_reset =
--		container_of(rcdev, struct ath79_reset, rcdev);
--	unsigned long flags;
- 	u32 val;
--
--	spin_lock_irqsave(&ath79_reset->lock, flags);
- 	val = readl(ath79_reset->base);
- 	if (assert)
- 		val |= BIT(id);
-@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
- 	writel(val, ath79_reset->base);
- 	/* Flush cache */
- 	readl(ath79_reset->base);
-+}
-+
-+static int ath79_reset_update(struct reset_controller_dev *rcdev,
-+			unsigned long id, bool assert)
-+{
-+	struct ath79_reset *ath79_reset =
-+		container_of(rcdev, struct ath79_reset, rcdev);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&ath79_reset->lock, flags);
-+	__ath79_reset_update_unlocked(ath79_reset, id, assert);
- 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
- 
- 	return 0;
-@@ -79,8 +90,27 @@ static int ath79_reset_restart_handler(s
- {
- 	struct ath79_reset *ath79_reset =
- 		container_of(nb, struct ath79_reset, restart_nb);
-+	unsigned long flags;
- 
--	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
-+	spin_lock_irqsave(&ath79_reset->lock, flags);
-+
-+	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
-+		/**
-+		 * AR9344 has been observed to hang on reboot in rare cases.
-+		 *
-+		 * Datasheet states to reset the ETH switch systems before asserting
-+		 * full chip reset. See page 111 of the AR9344 datasheet.
-+		 */
-+		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
-+		mdelay(10);
-+		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
-+		mdelay(10);
-+	}
-+
-+	__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
-+	mdelay(10);
-+
-+	spin_unlock_irqrestore(&ath79_reset->lock, flags);
- 
- 	return NOTIFY_DONE;
- }
-@@ -95,6 +125,8 @@ static int ath79_reset_probe(struct plat
- 	if (!ath79_reset)
- 		return -ENOMEM;
- 
-+	ath79_reset->pdev = pdev;
-+
- 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
- 	if (IS_ERR(ath79_reset->base))
- 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sat Jan 18 07:41:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 10:41:13 -0500
Subject: [openwrt/openwrt]  ath79: add extended AR9344 reset sequence
In-Reply-To: <173721487248.845892.14729457103507060734@git-01.infra.openwrt.org>
References: <173721487248.845892.14729457103507060734@git-01.infra.openwrt.org>
Message-ID: <mailman.42593.1737214877.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/144af32b47be6181f01815762159dff863f4616b

commit 144af32b47be6181f01815762159dff863f4616b
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 3 21:46:13 2025 +0100

    ath79: add extended AR9344 reset sequence
    
    According to datasheet, on AR9344 the switch and switch analog need to
    be reset first before initiating a full reset.
    
    Resetting these systems fixes spurious reset hangs on Atheros AR9344
    SoCs.
    
    Link: https://github.com/freifunk-gluon/gluon/issues/2904
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 105 +++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
new file mode 100644
index 0000000000..5d9daf1c1c
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
@@ -0,0 +1,105 @@
+From: David Bauer <mail at david-bauer.net>
+Date: Tue, 2 Jan 2025 19:22:40 +0100
+Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
+
+According to datasheet, on AR9344 the switch and switch analog need to
+be reset first before initiating a full reset.
+
+Resetting these systems fixes spurious reset hangs on Atheros AR9344
+SoCs.
+
+Link: https://github.com/freifunk-gluon/gluon/issues/2904
+
+Signed-off-by: David Bauer <mail at david-bauer.net>
+
+--- a/drivers/reset/reset-ath79.c
++++ b/drivers/reset/reset-ath79.c
+@@ -12,8 +12,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/reset-controller.h>
+ #include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/of.h>
+ 
+ struct ath79_reset {
++	struct platform_device *pdev;
+ 	struct reset_controller_dev rcdev;
+ 	struct notifier_block restart_nb;
+ 	void __iomem *base;
+@@ -21,16 +24,13 @@ struct ath79_reset {
+ };
+ 
+ #define FULL_CHIP_RESET 24
++#define ETH_SWITCH_RESET 8
++#define ETH_SWITCH_ARESET 12
+ 
+-static int ath79_reset_update(struct reset_controller_dev *rcdev,
++static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
+ 			unsigned long id, bool assert)
+ {
+-	struct ath79_reset *ath79_reset =
+-		container_of(rcdev, struct ath79_reset, rcdev);
+-	unsigned long flags;
+ 	u32 val;
+-
+-	spin_lock_irqsave(&ath79_reset->lock, flags);
+ 	val = readl(ath79_reset->base);
+ 	if (assert)
+ 		val |= BIT(id);
+@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
+ 	writel(val, ath79_reset->base);
+ 	/* Flush cache */
+ 	readl(ath79_reset->base);
++}
++
++static int ath79_reset_update(struct reset_controller_dev *rcdev,
++			unsigned long id, bool assert)
++{
++	struct ath79_reset *ath79_reset =
++		container_of(rcdev, struct ath79_reset, rcdev);
++	unsigned long flags;
++
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++	__ath79_reset_update_unlocked(ath79_reset, id, assert);
+ 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return 0;
+@@ -79,8 +90,28 @@ static int ath79_reset_restart_handler(s
+ {
+ 	struct ath79_reset *ath79_reset =
+ 		container_of(nb, struct ath79_reset, restart_nb);
++	unsigned long flags;
+ 
+-	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++
++	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
++		/**
++		 * AR9344 has been observed to hang on reboot in rare cases.
++		 *
++		 * Datasheet states to reset the ETH switch systems before asserting
++		 * full chip reset. See page 111 of the AR9344 datasheet.
++		 */
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++		mdelay(10);
++	} else {
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++	}
++
++	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return NOTIFY_DONE;
+ }
+@@ -95,6 +126,8 @@ static int ath79_reset_probe(struct plat
+ 	if (!ath79_reset)
+ 		return -ENOMEM;
+ 
++	ath79_reset->pdev = pdev;
++
+ 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ 	if (IS_ERR(ath79_reset->base))
+ 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sat Jan 18 09:50:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 12:50:58 -0500
Subject: [openwrt/openwrt]  ipq4019: patch initialization of Lantiq DSL on
 FritzBox 7530.
In-Reply-To: <173722265828.998158.17074163522487559395@git-01.infra.openwrt.org>
References: <173722265828.998158.17074163522487559395@git-01.infra.openwrt.org>
Message-ID: <mailman.42648.1737222664.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/676dcb1b2cf84142a61d51a15e7a8e1bdc937c23

commit 676dcb1b2cf84142a61d51a15e7a8e1bdc937c23
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Tue May 7 20:44:27 2024 +0200

    ipq4019: patch initialization of Lantiq DSL on FritzBox 7530.
    
    Some VRX518 modems fail to initialize properly with the error message
    "dc_ep_clk_on failed". As a result, the DSL data path doesn't work.
    
    This hack, which is based on code from the FRITZ!Box 7530 GPL archive,
    fixes the issue. It changes the PCIe vendor/device ID to values matching
    a Lantiq SoC. It also appears to emulate a Lantiq CPU ID register for
    connected PCIe devices, by remapping the matching address area to a
    specially crafted buffer using the address translation unit.
    
    A dedicated compatible is created to activate this in
    the device tree, so this shouldn't affect any devices other than
    FRITZ!Box 7530/7520.
    
    Original investigation was done in https://github.com/janh/openwrt/commit/59f52125178146a9dc44290c11c63e5e029e8044 which used the "avm,host_magic" property to enabled the patch.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17622
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ....7-01-PCI-dwc-Add-host_post_init-callback.patch |  42 ++++++
 ...able-ASPM-for-platforms-supporting-1.9.0-.patch | 102 +++++++++++++
 .../boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts   |   1 +
 ...dd-hack-compatible-for-ipq4019-Lantiq-DSL.patch | 166 +++++++++++++++++++++
 4 files changed, 311 insertions(+)

diff --git a/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch b/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch
new file mode 100644
index 0000000000..d70c65225e
--- /dev/null
+++ b/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch
@@ -0,0 +1,42 @@
+From a78794562fcb2659c976388b1285eddda97e9954 Mon Sep 17 00:00:00 2001
+From: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Date: Tue, 10 Oct 2023 21:29:13 +0530
+Subject: [PATCH] PCI: dwc: Add host_post_init() callback
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This callback can be used by the platform drivers to do configuration
+once all the devices are scanned. Like changing LNKCTL of all downstream
+devices to enable ASPM etc...
+
+Link: https://lore.kernel.org/linux-pci/20231010155914.9516-2-manivannan.sadhasivam at linaro.org
+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++
+ drivers/pci/controller/dwc/pcie-designware.h      | 1 +
+ 2 files changed, 4 insertions(+)
+
+--- a/drivers/pci/controller/dwc/pcie-designware-host.c
++++ b/drivers/pci/controller/dwc/pcie-designware-host.c
+@@ -502,6 +502,9 @@ int dw_pcie_host_init(struct dw_pcie_rp
+ 	if (ret)
+ 		goto err_stop_link;
+ 
++	if (pp->ops->host_post_init)
++		pp->ops->host_post_init(pp);
++
+ 	return 0;
+ 
+ err_stop_link:
+--- a/drivers/pci/controller/dwc/pcie-designware.h
++++ b/drivers/pci/controller/dwc/pcie-designware.h
+@@ -301,6 +301,7 @@ enum dw_pcie_ltssm {
+ struct dw_pcie_host_ops {
+ 	int (*host_init)(struct dw_pcie_rp *pp);
+ 	void (*host_deinit)(struct dw_pcie_rp *pp);
++	void (*host_post_init)(struct dw_pcie_rp *pp);
+ 	int (*msi_host_init)(struct dw_pcie_rp *pp);
+ 	void (*pme_turn_off)(struct dw_pcie_rp *pp);
+ };
diff --git a/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch b/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch
new file mode 100644
index 0000000000..7fdede52f4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch
@@ -0,0 +1,102 @@
+From 9f4f3dfad8cf08208fbb78b1b9cbf957c12618b9 Mon Sep 17 00:00:00 2001
+From: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Date: Tue, 10 Oct 2023 21:29:14 +0530
+Subject: [PATCH] PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+ASPM is supported by Qcom host controllers/bridges on most of the recent
+platforms and so the devices tested so far. But for enabling ASPM by
+default (without using Kconfig, kernel command-line or sysfs), BIOS has
+to enable ASPM on both host bridge and downstream devices during boot.
+
+Unfortunately, none of the BIOS available on Qcom platforms enables
+ASPM. Due to this, the platforms making use of Qcom SoCs draw high power
+during runtime.
+
+To fix this power draw issue, users have to enable ASPM using Kconfig,
+kernel command-line, sysfs or the BIOS has to start enabling ASPM.
+
+The latter may happen in the future, but that won't address the issue on
+current platforms. Also, asking users to enable a feature to get the power
+management right would provide an unpleasant out-of-the-box experience.
+
+So the apt solution is to enable ASPM in the controller driver itself. And
+this is being accomplished by calling pci_enable_link_state() in the newly
+introduced host_post_init() callback for all the devices connected to the
+bus. This function enables all supported link low power states for both
+host bridge and the downstream devices.
+
+Due to limited testing, ASPM is only enabled for platforms making use of
+ops_1_9_0 callbacks.
+
+[kwilczynski: commit log]
+Link: https://lore.kernel.org/linux-pci/20231010155914.9516-3-manivannan.sadhasivam at linaro.org
+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/dwc/pcie-qcom.c | 28 ++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+--- a/drivers/pci/controller/dwc/pcie-qcom.c
++++ b/drivers/pci/controller/dwc/pcie-qcom.c
+@@ -222,6 +222,7 @@ struct qcom_pcie_ops {
+ 	int (*get_resources)(struct qcom_pcie *pcie);
+ 	int (*init)(struct qcom_pcie *pcie);
+ 	int (*post_init)(struct qcom_pcie *pcie);
++	void (*host_post_init)(struct qcom_pcie *pcie);
+ 	void (*deinit)(struct qcom_pcie *pcie);
+ 	void (*ltssm_enable)(struct qcom_pcie *pcie);
+ 	int (*config_sid)(struct qcom_pcie *pcie);
+@@ -966,6 +967,22 @@ static int qcom_pcie_post_init_2_7_0(str
+ 	return 0;
+ }
+ 
++static int qcom_pcie_enable_aspm(struct pci_dev *pdev, void *userdata)
++{
++	/* Downstream devices need to be in D0 state before enabling PCI PM substates */
++	pci_set_power_state(pdev, PCI_D0);
++	pci_enable_link_state(pdev, PCIE_LINK_STATE_ALL);
++
++	return 0;
++}
++
++static void qcom_pcie_host_post_init_2_7_0(struct qcom_pcie *pcie)
++{
++	struct dw_pcie_rp *pp = &pcie->pci->pp;
++
++	pci_walk_bus(pp->bridge->bus, qcom_pcie_enable_aspm, NULL);
++}
++
+ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
+@@ -1224,9 +1241,19 @@ static void qcom_pcie_host_deinit(struct
+ 	pcie->cfg->ops->deinit(pcie);
+ }
+ 
++static void qcom_pcie_host_post_init(struct dw_pcie_rp *pp)
++{
++	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
++	struct qcom_pcie *pcie = to_qcom_pcie(pci);
++
++	if (pcie->cfg->ops->host_post_init)
++		pcie->cfg->ops->host_post_init(pcie);
++}
++
+ static const struct dw_pcie_host_ops qcom_pcie_dw_ops = {
+ 	.host_init	= qcom_pcie_host_init,
+ 	.host_deinit	= qcom_pcie_host_deinit,
++	.host_post_init	= qcom_pcie_host_post_init,
+ };
+ 
+ /* Qcom IP rev.: 2.1.0	Synopsys IP rev.: 4.01a */
+@@ -1288,6 +1315,7 @@ static const struct qcom_pcie_ops ops_1_
+ 	.get_resources = qcom_pcie_get_resources_2_7_0,
+ 	.init = qcom_pcie_init_2_7_0,
+ 	.post_init = qcom_pcie_post_init_2_7_0,
++	.host_post_init = qcom_pcie_host_post_init_2_7_0,
+ 	.deinit = qcom_pcie_deinit_2_7_0,
+ 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+ 	.config_sid = qcom_pcie_config_sid_1_9_0,
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 39905d4342..8566c7c337 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -307,6 +307,7 @@
 };
 
 &pcie0 {
+	compatible = "qcom,pcie-ipq4019-lantiq-hack";
 	status = "okay";
 
 	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
diff --git a/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch b/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch
new file mode 100644
index 0000000000..af10fd5704
--- /dev/null
+++ b/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch
@@ -0,0 +1,166 @@
+From f4f03dca92b45616ef0325051fdc7627c16fdd62 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Tue, 7 May 2024 20:21:17 +0200
+Subject: [PATCH] PCI: qcom: add hack compatible for ipq4019 Lantiq DSL
+
+Add hack compatible for ipq4019 Lantiq DSL
+
+This change the PCIe vendor/device ID to the values from Lantiq
+GRX500 SoCs. We also program the ATU to fake the CPU ID as a Lantiq CPU
+by providing to the Lantiq firmware custom crafted value in the address
+the firmware would expect the CPU ID to be readable.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Signed-off-by: Florian Maurer <f.maurer at outlook.com>
+---
+ drivers/pci/controller/dwc/pcie-qcom.c | 94 +++++++++++++++++++++++++-
+ 1 file changed, 93 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/controller/dwc/pcie-qcom.c
++++ b/drivers/pci/controller/dwc/pcie-qcom.c
+@@ -184,11 +184,24 @@ struct qcom_pcie_resources_2_3_3 {
+ 
+ #define QCOM_PCIE_2_4_0_MAX_CLOCKS		4
+ #define QCOM_PCIE_2_4_0_MAX_RESETS		12
++/*
++ * This value is the manufacturer ID of Lantiq. The address where
++ * it will be visible for the PCIe device matches the location of
++ * CPU ID registers on Lantiq SocS (MPS base address is 0x1f107000).
++ */
++#define QCOM_PCIE_2_4_0_CPU_ID_BASE_REG		0x1f107000
++#define QCOM_PCIE_2_4_0_CPU_ID_REG		0x340
++#define QCOM_PCIE_2_4_0_CPU_ID_REG_OFFSET	(QCOM_PCIE_2_4_0_CPU_ID_REG / sizeof(u32))
++#define QCOM_PCIE_2_4_0_CPU_ID_REG_VAL		(0x389 << 5)
++#define QCOM_PCIE_2_4_0_GRX500_VENDOR_ID	0x1bef
++#define QCOM_PCIE_2_4_0_GRX500_DEVICE_ID	0x0030
+ struct qcom_pcie_resources_2_4_0 {
+ 	struct clk_bulk_data clks[QCOM_PCIE_2_4_0_MAX_CLOCKS];
+ 	int num_clks;
+ 	struct reset_control_bulk_data resets[QCOM_PCIE_2_4_0_MAX_RESETS];
+ 	int num_resets;
++	void *lantiq_hack_virt;
++	dma_addr_t lantiq_hack_phys;
+ };
+ 
+ #define QCOM_PCIE_2_7_0_MAX_CLOCKS		15
+@@ -629,12 +642,65 @@ static int qcom_pcie_post_init_2_3_2(str
+ 	return 0;
+ }
+ 
++static void qcom_pcie_host_post_init_2_3_2_lantiq_hack(struct qcom_pcie *pcie)
++{
++	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
++	struct dw_pcie *pci = pcie->pci;
++	struct dw_pcie_rp *pp = &pci->pp;
++	struct device *dev = pci->dev;
++	struct resource_entry *entry;
++	int ret, index = 0;
++	u64 addr, phys;
++	u32 *val;
++
++	res->lantiq_hack_virt = dma_alloc_coherent(dev, SZ_4K,
++						   &res->lantiq_hack_phys,
++						   GFP_ATOMIC);
++	if (!res->lantiq_hack_virt) {
++		dev_err(dev, "failed to allocate DMA for lantiq hack\n");
++		return;
++	}
++
++	/* Fake Lantiq CPU ID register */
++	val = (u32 *)res->lantiq_hack_virt;
++	val[QCOM_PCIE_2_4_0_CPU_ID_REG_OFFSET] = QCOM_PCIE_2_4_0_CPU_ID_REG_VAL;
++
++	/* Increment index based on used iATU */
++	resource_list_for_each_entry(entry, &pp->bridge->dma_ranges)
++		if (resource_type(entry->res) == IORESOURCE_MEM)
++			index++;
++
++	/* Check if there is space for an additional iATU */
++	if (index >= pci->num_ib_windows) {
++		dev_err(dev, "No inbound iATU window available for magic\n");
++		return;
++	}
++
++	addr = QCOM_PCIE_2_4_0_CPU_ID_BASE_REG;
++	phys = res->lantiq_hack_phys;
++
++	/* Make it visible to PCIe devices using address translation unit */
++	ret = dw_pcie_prog_inbound_atu(pci, index, PCIE_ATU_TYPE_MEM,
++				       phys, addr, SZ_4K);
++	if (ret) {
++		dev_err(dev, "timeout waiting for IATU for lantiq hack: %d\n", ret);
++		return;
++	}
++
++	/* Set vendor/device ID of GRX500 PCIe host */
++	dw_pcie_dbi_ro_wr_en(pci);
++	dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, QCOM_PCIE_2_4_0_GRX500_VENDOR_ID);
++	dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, QCOM_PCIE_2_4_0_GRX500_DEVICE_ID);
++	dw_pcie_dbi_ro_wr_dis(pci);
++}
++
+ static int qcom_pcie_get_resources_2_4_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
+ 	struct dw_pcie *pci = pcie->pci;
+ 	struct device *dev = pci->dev;
+-	bool is_ipq = of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019");
++	bool is_ipq = of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019") || 
++		      of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019-lantiq-hack");
+ 	int ret;
+ 
+ 	res->clks[0].id = "aux";
+@@ -679,6 +745,17 @@ static void qcom_pcie_deinit_2_4_0(struc
+ 	clk_bulk_disable_unprepare(res->num_clks, res->clks);
+ }
+ 
++static void qcom_pcie_deinit_2_4_0_lantiq_hack(struct qcom_pcie *pcie)
++{
++	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
++	struct dw_pcie *pci = pcie->pci;
++	struct device *dev = pci->dev;
++
++	dma_free_coherent(dev, SZ_4K, res->lantiq_hack_virt, res->lantiq_hack_phys);
++
++	qcom_pcie_deinit_2_4_0(pcie);
++}
++
+ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
+@@ -1292,6 +1369,16 @@ static const struct qcom_pcie_ops ops_2_
+ 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+ };
+ 
++/* Qcom IP rev.: 2.4.0	Synopsys IP rev.: 4.20a Lantiq DSL Hack */
++static const struct qcom_pcie_ops ops_2_4_0_lantiq_hack = {
++	.get_resources = qcom_pcie_get_resources_2_4_0,
++	.init = qcom_pcie_init_2_4_0,
++	.post_init = qcom_pcie_post_init_2_3_2,
++	.host_post_init = qcom_pcie_host_post_init_2_3_2_lantiq_hack,
++	.deinit = qcom_pcie_deinit_2_4_0_lantiq_hack,
++	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
++};
++
+ /* Qcom IP rev.: 2.3.3	Synopsys IP rev.: 4.30a */
+ static const struct qcom_pcie_ops ops_2_3_3 = {
+ 	.get_resources = qcom_pcie_get_resources_2_3_3,
+@@ -1354,6 +1441,10 @@ static const struct qcom_pcie_cfg cfg_2_
+ 	.ops = &ops_2_4_0,
+ };
+ 
++static const struct qcom_pcie_cfg cfg_2_4_0_lantiq_hack = {
++	.ops = &ops_2_4_0_lantiq_hack,
++};
++
+ static const struct qcom_pcie_cfg cfg_2_7_0 = {
+ 	.ops = &ops_2_7_0,
+ };
+@@ -1641,6 +1732,7 @@ static const struct of_device_id qcom_pc
+ 	{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
+ 	{ .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 },
+ 	{ .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 },
++	{ .compatible = "qcom,pcie-ipq4019-lantiq-hack", .data = &cfg_2_4_0_lantiq_hack },
+ 	{ .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 },
+ 	{ .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 },
+ 	{ .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },



From lede-commits at lists.infradead.org  Sat Jan 18 10:15:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 13:15:39 -0500
Subject: [openwrt/openwrt]  mediatek: filogic: Cudy WR3000H: Fix
 SUPPORTED_DEVICES
In-Reply-To: <173722413921.1021851.7442841767766313744@git-01.infra.openwrt.org>
References: <173722413921.1021851.7442841767766313744@git-01.infra.openwrt.org>
Message-ID: <mailman.42653.1737224147.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0f8a5a5fd6929a3795a67ad4f98a7bc7358d22d9

commit 0f8a5a5fd6929a3795a67ad4f98a7bc7358d22d9
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Fri Jan 17 23:23:10 2025 +0100

    mediatek: filogic: Cudy WR3000H: Fix SUPPORTED_DEVICES
    
    Fix the name used for the transition image from Cudy.
    This should make it possible to use the cudy transition image.
    
    Fixes: 9d66b8b312fb ("mediatek: filogic: Add support for cudy wr3000h")
    Link: https://github.com/openwrt/openwrt/pull/17652
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/image/filogic.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index afa5224b19..01d827c029 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -711,7 +711,7 @@ define Device/cudy_wr3000h-v1
   DEVICE_VARIANT := v1
   DEVICE_DTS := mt7981b-cudy-wr3000h-v1
   DEVICE_DTS_DIR := ../dts
-  SUPPORTED_DEVICES += R59
+  SUPPORTED_DEVICES += R63
   UBINIZE_OPTS := -E 5
   BLOCKSIZE := 128k
   PAGESIZE := 2048



From lede-commits at lists.infradead.org  Sat Jan 18 10:25:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 13:25:01 -0500
Subject: [openwrt/openwrt]  ramips: mt7621: add support for Confiabits MT7621
 v1
In-Reply-To: <173722470154.1030499.13017098816199177918@git-01.infra.openwrt.org>
References: <173722470154.1030499.13017098816199177918@git-01.infra.openwrt.org>
Message-ID: <mailman.42656.1737224705.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3207fe66369c11349243cc5a5575ec769f799698

commit 3207fe66369c11349243cc5a5575ec769f799698
Author: Luis Mita <luis at luismita.com>
AuthorDate: Wed Jan 8 18:10:04 2025 -0400

    ramips: mt7621: add support for Confiabits MT7621 v1
    
    Hardware:
     - SoC: MediaTek MT7621DAT
     - Flash: 16 MiB cFeon
     - RAM: 128 MiB MT7621DAT
     - WLAN: 2.4 GHz (MT7603EN), 5 GHz (MT7613BEN 802.11ac)
     - Ethernet: 1x 10/100/1000 Mbps WAN, 3x 10/100/1000 LAN (MT7621DAT)
     - Buttons: 1 Reset button, 1 WPS button
     - LEDs: 5x Green (POWER/WAN/2.4G/5G/WPS), 1x Red (WAN)
     - Serial console: unpopulated header, 57600 8n1
     - Power: 12 VDC, 1 A
    
    MAC:
    LAN MAC: label mac (eeprom at 4)
    WAN MAC: label mac (eeprom at 4)
    2.4G MAC: label mac (eeprom at 4)
    5G MAC: label mac + 1 (eeprom at 8004)
    
    Installation:
    The stock firmware is OpenWrt-based. If you can reach LuCI or SSH, just use the sysupgrade image
    with the 'Keep settings' option turned off.
    
    Signed-off-by: Luis Mita <luis at luismita.com>
    Link: https://github.com/openwrt/openwrt/pull/17534
    (cherry picked from commit 1c5ca24da6cd727f4fcb8edbe00fa66543a6c678)
    Link: https://github.com/openwrt/openwrt/pull/17653
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../ramips/dts/mt7621_confiabits_mt7621-v1.dts     | 215 +++++++++++++++++++++
 target/linux/ramips/image/mt7621.mk                |  12 ++
 .../ramips/mt7621/base-files/etc/board.d/01_leds   |   7 +-
 .../mt7621/base-files/etc/board.d/02_network       |   1 +
 4 files changed, 232 insertions(+), 3 deletions(-)

diff --git a/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts b/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts
new file mode 100644
index 0000000000..858747ecad
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_confiabits_mt7621-v1.dts
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "confiabits,mt7621-v1", "mediatek,mt7621-soc";
+	model = "Confiabits MT7621 v1";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		button-wps {
+			label = "wps";
+			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		button-reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: led-power-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_POWER;
+			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wan-red {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_WAN;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wlan5 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led-wps {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WPS;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		led-wlan24 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led-wan-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WAN;
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition at 30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			partition at 40000 {
+				label = "radio";
+				reg = <0x40000 0x10000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					eeprom_radio_0: eeprom at 0 {
+						reg = <0x0 0x400>;
+					};
+
+					eeprom_radio_8000: eeprom at 8000 {
+						reg = <0x8000 0x4da8>;
+					};
+
+					macaddr_radio_4: macaddr at 4 {
+						reg = <0x4 0x6>;
+					};
+
+					macaddr_radio_8004: macaddr at 8004 {
+						reg = <0x8004 0x6>;
+					};
+				};
+			};
+
+			partition at 50000 {
+				label = "firmware";
+				compatible = "denx,uimage";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_radio_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy4>;
+
+	nvmem-cells = <&macaddr_radio_4>;
+	nvmem-cell-names = "mac-address";
+};
+
+&ethphy4 {
+	/delete-property/ interrupts;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <2400000 2500000>;
+
+		nvmem-cells = <&eeprom_radio_0>;
+		nvmem-cell-names = "eeprom";
+	};
+};
+
+&pcie1 {
+	wifi at 0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		ieee80211-freq-limit = <5000000 6000000>;
+
+		nvmem-cells = <&eeprom_radio_8000>;
+		nvmem-cell-names = "eeprom";
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "i2c", "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&switch0 {
+	ports {
+		port at 0 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port at 1 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port at 2 {
+			status = "okay";
+			label = "lan3";
+		};
+	};
+};
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 9c6efb8f1c..68fc03d998 100644
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -673,6 +673,18 @@ define Device/comfast_cf-ew72-v2
 endef
 TARGET_DEVICES += comfast_cf-ew72-v2
 
+define Device/confiabits_mt7621-v1
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := Confiabits
+  DEVICE_MODEL := MT7621
+  DEVICE_VARIANT := v1
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap \
+	-uboot-envtools
+endef
+TARGET_DEVICES += confiabits_mt7621-v1
+
 define Device/cudy_m1800
   $(Device/dsa-migration)
   DEVICE_VENDOR := Cudy
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
index 9a77b1b1bc..d9ac110fbe 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds
@@ -58,6 +58,10 @@ wifire,s1500-nbn)
 belkin,rt1800)
 	ucidef_set_led_netdev "wan" "wan" "white:wan" "wan"
 	;;
+confiabits,mt7621-v1|\
+netis,n6)
+	ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx"
+	;;
 cudy,wr2100)
 	ucidef_set_led_netdev "lan1" "lan1" "green:lan1" "lan1"
 	ucidef_set_led_netdev "lan2" "lan2" "green:lan2" "lan2"
@@ -188,9 +192,6 @@ netgear,r7450)
 netgear,wax202)
 	ucidef_set_led_netdev "internet" "Internet" "green:net" "wan"
 	;;
-netis,n6)
-	ucidef_set_led_netdev "wan" "wan" "green:wan" "wan" "link tx rx"
-	;;
 oraybox,x3a)
 	ucidef_set_led_netdev "wan" "wan link" "red:status" "wan"
 	ucidef_set_led_netdev "lan" "lan link" "green:status" "br-lan"
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
index c780443c1c..f40e9616d0 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
@@ -13,6 +13,7 @@ ramips_setup_interfaces()
 	asus,rt-ax53u|\
 	buffalo,wsr-2533dhpl2|\
 	buffalo,wsr-2533dhpls|\
+	confiabits,mt7621-v1|\
 	gehua,ghl-r-001|\
 	h3c,tx1800-plus|\
 	h3c,tx1801-plus|\



From lede-commits at lists.infradead.org  Sat Jan 18 12:40:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 18 Jan 2025 15:40:09 -0500
Subject: [openwrt/openwrt]  mediatek-filogic: fix wax220 wifi leds
In-Reply-To: <173723280963.1178070.22860458448958337@git-01.infra.openwrt.org>
References: <173723280963.1178070.22860458448958337@git-01.infra.openwrt.org>
Message-ID: <mailman.42670.1737232813.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/99431e315039d7f9689b21a8aa220adadf52a886

commit 99431e315039d7f9689b21a8aa220adadf52a886
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Thu Jan 16 09:29:55 2025 +0100

    mediatek-filogic: fix wax220 wifi leds
    
    The WAX220 does have a 2.4GHz and 5GHz wifi led, which was set to trigger on netdev before.
    This commit changes this to trigger on activity of the respective radio
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17627
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/dts/mt7986b-netgear-wax220.dts         | 2 ++
 target/linux/mediatek/filogic/base-files/etc/board.d/01_leds | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts b/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
index 6e51d88470..9537afba89 100644
--- a/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
+++ b/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
@@ -67,6 +67,7 @@
 		wlan2g_blue {
 			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
 			label = "blue:wlan2g";
+			linux,default-trigger = "phy0tpt";
 		};
 
 		lan_green {
@@ -84,6 +85,7 @@
 		wlan5g_blue {
 			gpios = <&pio 2 GPIO_ACTIVE_LOW>;
 			label = "blue:wlan5g";
+			linux,default-trigger = "phy1tpt";
 		};
 	};
 };
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index a6bb9b0ca8..fded01a73e 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -66,8 +66,6 @@ mercusys,mr90x-v1-ubi)
 	;;
 netgear,wax220)
 	ucidef_set_led_netdev "eth0" "LAN" "green:lan" "eth0"
-	ucidef_set_led_netdev "wlan2g" "WLAN2G" "blue:wlan2g" "phy0-ap0"
-	ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan5g" "phy1-ap0"
 	;;
 nokia,ea0326gmp)
 	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1" "link"



From lede-commits at lists.infradead.org  Sun Jan 19 02:01:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:01:39 -0500
Subject: [openwrt/openwrt]  ipq4019: patch initialization of Lantiq DSL on
 FritzBox 7530.
In-Reply-To: <173728089924.1914397.4332088283725304979@git-01.infra.openwrt.org>
References: <173728089924.1914397.4332088283725304979@git-01.infra.openwrt.org>
Message-ID: <mailman.42742.1737280904.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f31ab2abef2f4ef36d5c4ee38b97adfbec43a2b9

commit f31ab2abef2f4ef36d5c4ee38b97adfbec43a2b9
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Tue May 7 20:44:27 2024 +0200

    ipq4019: patch initialization of Lantiq DSL on FritzBox 7530.
    
    Some VRX518 modems fail to initialize properly with the error message
    "dc_ep_clk_on failed". As a result, the DSL data path doesn't work.
    
    This hack, which is based on code from the FRITZ!Box 7530 GPL archive,
    fixes the issue. It changes the PCIe vendor/device ID to values matching
    a Lantiq SoC. It also appears to emulate a Lantiq CPU ID register for
    connected PCIe devices, by remapping the matching address area to a
    specially crafted buffer using the address translation unit.
    
    A dedicated compatible is created to activate this in
    the device tree, so this shouldn't affect any devices other than
    FRITZ!Box 7530/7520.
    
    Original investigation was done in https://github.com/janh/openwrt/commit/59f52125178146a9dc44290c11c63e5e029e8044 which used the "avm,host_magic" property to enabled the patch.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17622
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 676dcb1b2cf84142a61d51a15e7a8e1bdc937c23)
---
 ....7-01-PCI-dwc-Add-host_post_init-callback.patch |  42 ++++++
 ...able-ASPM-for-platforms-supporting-1.9.0-.patch | 102 +++++++++++++
 .../boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts   |   1 +
 ...dd-hack-compatible-for-ipq4019-Lantiq-DSL.patch | 166 +++++++++++++++++++++
 4 files changed, 311 insertions(+)

diff --git a/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch b/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch
new file mode 100644
index 0000000000..d70c65225e
--- /dev/null
+++ b/target/linux/generic/backport-6.6/870-v6.7-01-PCI-dwc-Add-host_post_init-callback.patch
@@ -0,0 +1,42 @@
+From a78794562fcb2659c976388b1285eddda97e9954 Mon Sep 17 00:00:00 2001
+From: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Date: Tue, 10 Oct 2023 21:29:13 +0530
+Subject: [PATCH] PCI: dwc: Add host_post_init() callback
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This callback can be used by the platform drivers to do configuration
+once all the devices are scanned. Like changing LNKCTL of all downstream
+devices to enable ASPM etc...
+
+Link: https://lore.kernel.org/linux-pci/20231010155914.9516-2-manivannan.sadhasivam at linaro.org
+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++
+ drivers/pci/controller/dwc/pcie-designware.h      | 1 +
+ 2 files changed, 4 insertions(+)
+
+--- a/drivers/pci/controller/dwc/pcie-designware-host.c
++++ b/drivers/pci/controller/dwc/pcie-designware-host.c
+@@ -502,6 +502,9 @@ int dw_pcie_host_init(struct dw_pcie_rp
+ 	if (ret)
+ 		goto err_stop_link;
+ 
++	if (pp->ops->host_post_init)
++		pp->ops->host_post_init(pp);
++
+ 	return 0;
+ 
+ err_stop_link:
+--- a/drivers/pci/controller/dwc/pcie-designware.h
++++ b/drivers/pci/controller/dwc/pcie-designware.h
+@@ -301,6 +301,7 @@ enum dw_pcie_ltssm {
+ struct dw_pcie_host_ops {
+ 	int (*host_init)(struct dw_pcie_rp *pp);
+ 	void (*host_deinit)(struct dw_pcie_rp *pp);
++	void (*host_post_init)(struct dw_pcie_rp *pp);
+ 	int (*msi_host_init)(struct dw_pcie_rp *pp);
+ 	void (*pme_turn_off)(struct dw_pcie_rp *pp);
+ };
diff --git a/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch b/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch
new file mode 100644
index 0000000000..7fdede52f4
--- /dev/null
+++ b/target/linux/generic/backport-6.6/870-v6.7-02-PCI-qcom-Enable-ASPM-for-platforms-supporting-1.9.0-.patch
@@ -0,0 +1,102 @@
+From 9f4f3dfad8cf08208fbb78b1b9cbf957c12618b9 Mon Sep 17 00:00:00 2001
+From: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Date: Tue, 10 Oct 2023 21:29:14 +0530
+Subject: [PATCH] PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+ASPM is supported by Qcom host controllers/bridges on most of the recent
+platforms and so the devices tested so far. But for enabling ASPM by
+default (without using Kconfig, kernel command-line or sysfs), BIOS has
+to enable ASPM on both host bridge and downstream devices during boot.
+
+Unfortunately, none of the BIOS available on Qcom platforms enables
+ASPM. Due to this, the platforms making use of Qcom SoCs draw high power
+during runtime.
+
+To fix this power draw issue, users have to enable ASPM using Kconfig,
+kernel command-line, sysfs or the BIOS has to start enabling ASPM.
+
+The latter may happen in the future, but that won't address the issue on
+current platforms. Also, asking users to enable a feature to get the power
+management right would provide an unpleasant out-of-the-box experience.
+
+So the apt solution is to enable ASPM in the controller driver itself. And
+this is being accomplished by calling pci_enable_link_state() in the newly
+introduced host_post_init() callback for all the devices connected to the
+bus. This function enables all supported link low power states for both
+host bridge and the downstream devices.
+
+Due to limited testing, ASPM is only enabled for platforms making use of
+ops_1_9_0 callbacks.
+
+[kwilczynski: commit log]
+Link: https://lore.kernel.org/linux-pci/20231010155914.9516-3-manivannan.sadhasivam at linaro.org
+Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
+Signed-off-by: Krzysztof Wilczy?ski <kwilczynski at kernel.org>
+---
+ drivers/pci/controller/dwc/pcie-qcom.c | 28 ++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+--- a/drivers/pci/controller/dwc/pcie-qcom.c
++++ b/drivers/pci/controller/dwc/pcie-qcom.c
+@@ -222,6 +222,7 @@ struct qcom_pcie_ops {
+ 	int (*get_resources)(struct qcom_pcie *pcie);
+ 	int (*init)(struct qcom_pcie *pcie);
+ 	int (*post_init)(struct qcom_pcie *pcie);
++	void (*host_post_init)(struct qcom_pcie *pcie);
+ 	void (*deinit)(struct qcom_pcie *pcie);
+ 	void (*ltssm_enable)(struct qcom_pcie *pcie);
+ 	int (*config_sid)(struct qcom_pcie *pcie);
+@@ -966,6 +967,22 @@ static int qcom_pcie_post_init_2_7_0(str
+ 	return 0;
+ }
+ 
++static int qcom_pcie_enable_aspm(struct pci_dev *pdev, void *userdata)
++{
++	/* Downstream devices need to be in D0 state before enabling PCI PM substates */
++	pci_set_power_state(pdev, PCI_D0);
++	pci_enable_link_state(pdev, PCIE_LINK_STATE_ALL);
++
++	return 0;
++}
++
++static void qcom_pcie_host_post_init_2_7_0(struct qcom_pcie *pcie)
++{
++	struct dw_pcie_rp *pp = &pcie->pci->pp;
++
++	pci_walk_bus(pp->bridge->bus, qcom_pcie_enable_aspm, NULL);
++}
++
+ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
+@@ -1224,9 +1241,19 @@ static void qcom_pcie_host_deinit(struct
+ 	pcie->cfg->ops->deinit(pcie);
+ }
+ 
++static void qcom_pcie_host_post_init(struct dw_pcie_rp *pp)
++{
++	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
++	struct qcom_pcie *pcie = to_qcom_pcie(pci);
++
++	if (pcie->cfg->ops->host_post_init)
++		pcie->cfg->ops->host_post_init(pcie);
++}
++
+ static const struct dw_pcie_host_ops qcom_pcie_dw_ops = {
+ 	.host_init	= qcom_pcie_host_init,
+ 	.host_deinit	= qcom_pcie_host_deinit,
++	.host_post_init	= qcom_pcie_host_post_init,
+ };
+ 
+ /* Qcom IP rev.: 2.1.0	Synopsys IP rev.: 4.01a */
+@@ -1288,6 +1315,7 @@ static const struct qcom_pcie_ops ops_1_
+ 	.get_resources = qcom_pcie_get_resources_2_7_0,
+ 	.init = qcom_pcie_init_2_7_0,
+ 	.post_init = qcom_pcie_post_init_2_7_0,
++	.host_post_init = qcom_pcie_host_post_init_2_7_0,
+ 	.deinit = qcom_pcie_deinit_2_7_0,
+ 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+ 	.config_sid = qcom_pcie_config_sid_1_9_0,
diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
index 39905d4342..8566c7c337 100644
--- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts
@@ -307,6 +307,7 @@
 };
 
 &pcie0 {
+	compatible = "qcom,pcie-ipq4019-lantiq-hack";
 	status = "okay";
 
 	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
diff --git a/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch b/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch
new file mode 100644
index 0000000000..af10fd5704
--- /dev/null
+++ b/target/linux/ipq40xx/patches-6.6/900-PCI-qcom-add-hack-compatible-for-ipq4019-Lantiq-DSL.patch
@@ -0,0 +1,166 @@
+From f4f03dca92b45616ef0325051fdc7627c16fdd62 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Tue, 7 May 2024 20:21:17 +0200
+Subject: [PATCH] PCI: qcom: add hack compatible for ipq4019 Lantiq DSL
+
+Add hack compatible for ipq4019 Lantiq DSL
+
+This change the PCIe vendor/device ID to the values from Lantiq
+GRX500 SoCs. We also program the ATU to fake the CPU ID as a Lantiq CPU
+by providing to the Lantiq firmware custom crafted value in the address
+the firmware would expect the CPU ID to be readable.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Signed-off-by: Florian Maurer <f.maurer at outlook.com>
+---
+ drivers/pci/controller/dwc/pcie-qcom.c | 94 +++++++++++++++++++++++++-
+ 1 file changed, 93 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/controller/dwc/pcie-qcom.c
++++ b/drivers/pci/controller/dwc/pcie-qcom.c
+@@ -184,11 +184,24 @@ struct qcom_pcie_resources_2_3_3 {
+ 
+ #define QCOM_PCIE_2_4_0_MAX_CLOCKS		4
+ #define QCOM_PCIE_2_4_0_MAX_RESETS		12
++/*
++ * This value is the manufacturer ID of Lantiq. The address where
++ * it will be visible for the PCIe device matches the location of
++ * CPU ID registers on Lantiq SocS (MPS base address is 0x1f107000).
++ */
++#define QCOM_PCIE_2_4_0_CPU_ID_BASE_REG		0x1f107000
++#define QCOM_PCIE_2_4_0_CPU_ID_REG		0x340
++#define QCOM_PCIE_2_4_0_CPU_ID_REG_OFFSET	(QCOM_PCIE_2_4_0_CPU_ID_REG / sizeof(u32))
++#define QCOM_PCIE_2_4_0_CPU_ID_REG_VAL		(0x389 << 5)
++#define QCOM_PCIE_2_4_0_GRX500_VENDOR_ID	0x1bef
++#define QCOM_PCIE_2_4_0_GRX500_DEVICE_ID	0x0030
+ struct qcom_pcie_resources_2_4_0 {
+ 	struct clk_bulk_data clks[QCOM_PCIE_2_4_0_MAX_CLOCKS];
+ 	int num_clks;
+ 	struct reset_control_bulk_data resets[QCOM_PCIE_2_4_0_MAX_RESETS];
+ 	int num_resets;
++	void *lantiq_hack_virt;
++	dma_addr_t lantiq_hack_phys;
+ };
+ 
+ #define QCOM_PCIE_2_7_0_MAX_CLOCKS		15
+@@ -629,12 +642,65 @@ static int qcom_pcie_post_init_2_3_2(str
+ 	return 0;
+ }
+ 
++static void qcom_pcie_host_post_init_2_3_2_lantiq_hack(struct qcom_pcie *pcie)
++{
++	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
++	struct dw_pcie *pci = pcie->pci;
++	struct dw_pcie_rp *pp = &pci->pp;
++	struct device *dev = pci->dev;
++	struct resource_entry *entry;
++	int ret, index = 0;
++	u64 addr, phys;
++	u32 *val;
++
++	res->lantiq_hack_virt = dma_alloc_coherent(dev, SZ_4K,
++						   &res->lantiq_hack_phys,
++						   GFP_ATOMIC);
++	if (!res->lantiq_hack_virt) {
++		dev_err(dev, "failed to allocate DMA for lantiq hack\n");
++		return;
++	}
++
++	/* Fake Lantiq CPU ID register */
++	val = (u32 *)res->lantiq_hack_virt;
++	val[QCOM_PCIE_2_4_0_CPU_ID_REG_OFFSET] = QCOM_PCIE_2_4_0_CPU_ID_REG_VAL;
++
++	/* Increment index based on used iATU */
++	resource_list_for_each_entry(entry, &pp->bridge->dma_ranges)
++		if (resource_type(entry->res) == IORESOURCE_MEM)
++			index++;
++
++	/* Check if there is space for an additional iATU */
++	if (index >= pci->num_ib_windows) {
++		dev_err(dev, "No inbound iATU window available for magic\n");
++		return;
++	}
++
++	addr = QCOM_PCIE_2_4_0_CPU_ID_BASE_REG;
++	phys = res->lantiq_hack_phys;
++
++	/* Make it visible to PCIe devices using address translation unit */
++	ret = dw_pcie_prog_inbound_atu(pci, index, PCIE_ATU_TYPE_MEM,
++				       phys, addr, SZ_4K);
++	if (ret) {
++		dev_err(dev, "timeout waiting for IATU for lantiq hack: %d\n", ret);
++		return;
++	}
++
++	/* Set vendor/device ID of GRX500 PCIe host */
++	dw_pcie_dbi_ro_wr_en(pci);
++	dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, QCOM_PCIE_2_4_0_GRX500_VENDOR_ID);
++	dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, QCOM_PCIE_2_4_0_GRX500_DEVICE_ID);
++	dw_pcie_dbi_ro_wr_dis(pci);
++}
++
+ static int qcom_pcie_get_resources_2_4_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
+ 	struct dw_pcie *pci = pcie->pci;
+ 	struct device *dev = pci->dev;
+-	bool is_ipq = of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019");
++	bool is_ipq = of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019") || 
++		      of_device_is_compatible(dev->of_node, "qcom,pcie-ipq4019-lantiq-hack");
+ 	int ret;
+ 
+ 	res->clks[0].id = "aux";
+@@ -679,6 +745,17 @@ static void qcom_pcie_deinit_2_4_0(struc
+ 	clk_bulk_disable_unprepare(res->num_clks, res->clks);
+ }
+ 
++static void qcom_pcie_deinit_2_4_0_lantiq_hack(struct qcom_pcie *pcie)
++{
++	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
++	struct dw_pcie *pci = pcie->pci;
++	struct device *dev = pci->dev;
++
++	dma_free_coherent(dev, SZ_4K, res->lantiq_hack_virt, res->lantiq_hack_phys);
++
++	qcom_pcie_deinit_2_4_0(pcie);
++}
++
+ static int qcom_pcie_init_2_4_0(struct qcom_pcie *pcie)
+ {
+ 	struct qcom_pcie_resources_2_4_0 *res = &pcie->res.v2_4_0;
+@@ -1292,6 +1369,16 @@ static const struct qcom_pcie_ops ops_2_
+ 	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+ };
+ 
++/* Qcom IP rev.: 2.4.0	Synopsys IP rev.: 4.20a Lantiq DSL Hack */
++static const struct qcom_pcie_ops ops_2_4_0_lantiq_hack = {
++	.get_resources = qcom_pcie_get_resources_2_4_0,
++	.init = qcom_pcie_init_2_4_0,
++	.post_init = qcom_pcie_post_init_2_3_2,
++	.host_post_init = qcom_pcie_host_post_init_2_3_2_lantiq_hack,
++	.deinit = qcom_pcie_deinit_2_4_0_lantiq_hack,
++	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
++};
++
+ /* Qcom IP rev.: 2.3.3	Synopsys IP rev.: 4.30a */
+ static const struct qcom_pcie_ops ops_2_3_3 = {
+ 	.get_resources = qcom_pcie_get_resources_2_3_3,
+@@ -1354,6 +1441,10 @@ static const struct qcom_pcie_cfg cfg_2_
+ 	.ops = &ops_2_4_0,
+ };
+ 
++static const struct qcom_pcie_cfg cfg_2_4_0_lantiq_hack = {
++	.ops = &ops_2_4_0_lantiq_hack,
++};
++
+ static const struct qcom_pcie_cfg cfg_2_7_0 = {
+ 	.ops = &ops_2_7_0,
+ };
+@@ -1641,6 +1732,7 @@ static const struct of_device_id qcom_pc
+ 	{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
+ 	{ .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 },
+ 	{ .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 },
++	{ .compatible = "qcom,pcie-ipq4019-lantiq-hack", .data = &cfg_2_4_0_lantiq_hack },
+ 	{ .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 },
+ 	{ .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 },
+ 	{ .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },



From lede-commits at lists.infradead.org  Sun Jan 19 02:07:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:07:08 -0500
Subject: [openwrt/openwrt]  generic: add leds_st1202 patch to fix NULL pointer
 access
In-Reply-To: <173728122836.1919902.834579715739386360@git-01.infra.openwrt.org>
References: <173728122836.1919902.834579715739386360@git-01.infra.openwrt.org>
Message-ID: <mailman.42743.1737281232.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ec8a128cbb2106132731fcb3528c9004859b86f2

commit ec8a128cbb2106132731fcb3528c9004859b86f2
Author: Manuel Fombuena <fombuena at outlook.com>
AuthorDate: Tue Jan 14 12:37:20 2025 +0000

    generic: add leds_st1202 patch to fix NULL pointer access
    
    As per @KanjiMonster comment: st1202_dt_init() calls devm_led_classdev_register_ext() before the internal data structures are properly setup, so the leds become visible to user space while being partially initialized, leading to a window where trying to access them causes a NULL pointer access.
    
    Move devm_led_classdev_register_ext() to the last thing to happen during initialization.
    
    Signed-off-by: Manuel Fombuena <fombuena at outlook.com>
    Link: https://github.com/openwrt/openwrt/pull/17543
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...leds_st1202-Fix-NULL-pointer-access-error.patch | 70 ++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/target/linux/generic/pending-6.6/893-leds_st1202-Fix-NULL-pointer-access-error.patch b/target/linux/generic/pending-6.6/893-leds_st1202-Fix-NULL-pointer-access-error.patch
new file mode 100644
index 0000000000..d763c5dfbd
--- /dev/null
+++ b/target/linux/generic/pending-6.6/893-leds_st1202-Fix-NULL-pointer-access-error.patch
@@ -0,0 +1,70 @@
+From e3da313ebcace17f1227566fe1b0d0c3883061f9 Mon Sep 17 00:00:00 2001
+From: Manuel Fombuena <fombuena at outlook.com>
+Date: Fri, 17 Jan 2025 12:31:49 +0000
+Subject: [PATCH 1/5] leds: leds-st1202: fix NULL pointer access on race
+ condition
+
+st1202_dt_init() calls devm_led_classdev_register_ext() before the
+internal data structures are properly setup, so the leds become visible
+to user space while being partially initialized, leading to a window
+where trying to access them causes a NULL pointer access.
+
+This change moves devm_led_classdev_register_ext() to the last thing to
+happen during initialization to eliminate it.
+
+Signed-off-by: Manuel Fombuena <fombuena at outlook.com>
+---
+ drivers/leds/leds-st1202.c | 21 ++++++++++-----------
+ 1 file changed, 10 insertions(+), 11 deletions(-)
+
+--- a/drivers/leds/leds-st1202.c
++++ b/drivers/leds/leds-st1202.c
+@@ -261,8 +261,6 @@ static int st1202_dt_init(struct st1202_
+ 	int err, reg;
+ 
+ 	for_each_available_child_of_node_scoped(dev_of_node(dev), child) {
+-		struct led_init_data init_data = {};
+-
+ 		err = of_property_read_u32(child, "reg", &reg);
+ 		if (err)
+ 			return dev_err_probe(dev, err, "Invalid register\n");
+@@ -276,15 +274,6 @@ static int st1202_dt_init(struct st1202_
+ 		led->led_cdev.pattern_set = st1202_led_pattern_set;
+ 		led->led_cdev.pattern_clear = st1202_led_pattern_clear;
+ 		led->led_cdev.default_trigger = "pattern";
+-
+-		init_data.fwnode = led->fwnode;
+-		init_data.devicename = "st1202";
+-		init_data.default_label = ":";
+-
+-		err = devm_led_classdev_register_ext(dev, &led->led_cdev, &init_data);
+-		if (err < 0)
+-			return dev_err_probe(dev, err, "Failed to register LED class device\n");
+-
+ 		led->led_cdev.brightness_set = st1202_brightness_set;
+ 		led->led_cdev.brightness_get = st1202_brightness_get;
+ 	}
+@@ -368,6 +357,7 @@ static int st1202_probe(struct i2c_clien
+ 		return ret;
+ 
+ 	for (int i = 0; i < ST1202_MAX_LEDS; i++) {
++		struct led_init_data init_data = {};
+ 		led = &chip->leds[i];
+ 		led->chip = chip;
+ 		led->led_num = i;
+@@ -384,6 +374,15 @@ static int st1202_probe(struct i2c_clien
+ 		if (ret < 0)
+ 			return dev_err_probe(&client->dev, ret,
+ 					"Failed to clear LED pattern\n");
++
++		init_data.fwnode = led->fwnode;
++		init_data.devicename = "st1202";
++		init_data.default_label = ":";
++
++		ret = devm_led_classdev_register_ext(&client->dev, &led->led_cdev, &init_data);
++		if (ret < 0)
++			return dev_err_probe(&client->dev, ret,
++					"Failed to register LED class device\n");
+ 	}
+ 
+ 	return 0;



From lede-commits at lists.infradead.org  Sun Jan 19 02:17:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:17:38 -0500
Subject: [openwrt/openwrt]  ath79: add extended AR9344 reset sequence
In-Reply-To: <173728185711.1930172.6565491714930731530@git-01.infra.openwrt.org>
References: <173728185711.1930172.6565491714930731530@git-01.infra.openwrt.org>
Message-ID: <mailman.42746.1737281860.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/1e079d790ab3eb2d82990c4d547d6ce2635a25f7

commit 1e079d790ab3eb2d82990c4d547d6ce2635a25f7
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 3 21:46:13 2025 +0100

    ath79: add extended AR9344 reset sequence
    
    According to datasheet, on AR9344 the switch and switch analog need to
    be reset first before initiating a full reset.
    
    Resetting these systems fixes spurious reset hangs on Atheros AR9344
    SoCs.
    
    Link: https://github.com/freifunk-gluon/gluon/issues/2904
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
    (cherry picked from commit 144af32b47be6181f01815762159dff863f4616b)
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 105 +++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
new file mode 100644
index 0000000000..5d9daf1c1c
--- /dev/null
+++ b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
@@ -0,0 +1,105 @@
+From: David Bauer <mail at david-bauer.net>
+Date: Tue, 2 Jan 2025 19:22:40 +0100
+Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
+
+According to datasheet, on AR9344 the switch and switch analog need to
+be reset first before initiating a full reset.
+
+Resetting these systems fixes spurious reset hangs on Atheros AR9344
+SoCs.
+
+Link: https://github.com/freifunk-gluon/gluon/issues/2904
+
+Signed-off-by: David Bauer <mail at david-bauer.net>
+
+--- a/drivers/reset/reset-ath79.c
++++ b/drivers/reset/reset-ath79.c
+@@ -12,8 +12,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/reset-controller.h>
+ #include <linux/reboot.h>
++#include <linux/delay.h>
++#include <linux/of.h>
+ 
+ struct ath79_reset {
++	struct platform_device *pdev;
+ 	struct reset_controller_dev rcdev;
+ 	struct notifier_block restart_nb;
+ 	void __iomem *base;
+@@ -21,16 +24,13 @@ struct ath79_reset {
+ };
+ 
+ #define FULL_CHIP_RESET 24
++#define ETH_SWITCH_RESET 8
++#define ETH_SWITCH_ARESET 12
+ 
+-static int ath79_reset_update(struct reset_controller_dev *rcdev,
++static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
+ 			unsigned long id, bool assert)
+ {
+-	struct ath79_reset *ath79_reset =
+-		container_of(rcdev, struct ath79_reset, rcdev);
+-	unsigned long flags;
+ 	u32 val;
+-
+-	spin_lock_irqsave(&ath79_reset->lock, flags);
+ 	val = readl(ath79_reset->base);
+ 	if (assert)
+ 		val |= BIT(id);
+@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
+ 	writel(val, ath79_reset->base);
+ 	/* Flush cache */
+ 	readl(ath79_reset->base);
++}
++
++static int ath79_reset_update(struct reset_controller_dev *rcdev,
++			unsigned long id, bool assert)
++{
++	struct ath79_reset *ath79_reset =
++		container_of(rcdev, struct ath79_reset, rcdev);
++	unsigned long flags;
++
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++	__ath79_reset_update_unlocked(ath79_reset, id, assert);
+ 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return 0;
+@@ -79,8 +90,28 @@ static int ath79_reset_restart_handler(s
+ {
+ 	struct ath79_reset *ath79_reset =
+ 		container_of(nb, struct ath79_reset, restart_nb);
++	unsigned long flags;
+ 
+-	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
++	spin_lock_irqsave(&ath79_reset->lock, flags);
++
++	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
++		/**
++		 * AR9344 has been observed to hang on reboot in rare cases.
++		 *
++		 * Datasheet states to reset the ETH switch systems before asserting
++		 * full chip reset. See page 111 of the AR9344 datasheet.
++		 */
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
++		mdelay(1);
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++		mdelay(10);
++	} else {
++		__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
++	}
++
++	spin_unlock_irqrestore(&ath79_reset->lock, flags);
+ 
+ 	return NOTIFY_DONE;
+ }
+@@ -95,6 +126,8 @@ static int ath79_reset_probe(struct plat
+ 	if (!ath79_reset)
+ 		return -ENOMEM;
+ 
++	ath79_reset->pdev = pdev;
++
+ 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ 	if (IS_ERR(ath79_reset->base))
+ 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sun Jan 19 02:17:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:17:37 -0500
Subject: [openwrt/openwrt]  Revert "ath79: reset ETH switch for AR9344"
In-Reply-To: <173728185711.1930172.6565491714930731530@git-01.infra.openwrt.org>
References: <173728185711.1930172.6565491714930731530@git-01.infra.openwrt.org>
Message-ID: <mailman.42747.1737281860.1089.lede-commits@lists.infradead.org>

blocktrron pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/0aaf4fe5a424928b62362e5101a6801968805c27

commit 0aaf4fe5a424928b62362e5101a6801968805c27
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Jan 17 20:51:38 2025 +0100

    Revert "ath79: reset ETH switch for AR9344"
    
    This reverts commit 916af73fc388d638b1a717a2411792e0680dd8e6.
    
    It was reported this change did not fix the reboot issues on AR9344.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
    (cherry picked from commit 937b5a3e0017f4f39c0f7727a910d2df78fc4ce9)
---
 ...1-reset-ath79-reset-ETH-switch-for-AR9344.patch | 104 ---------------------
 1 file changed, 104 deletions(-)

diff --git a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch b/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
deleted file mode 100644
index dcac5be58b..0000000000
--- a/target/linux/ath79/patches-6.6/101-reset-ath79-reset-ETH-switch-for-AR9344.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From: David Bauer <mail at david-bauer.net>
-Date: Tue, 2 Jan 2025 19:22:40 +0100
-Subject: [PATCH] reset: ath79: reset ETH switch for AR9344
-
-According to datasheet, on AR9344 the switch and switch analog need to
-be reset first before initiating a full reset.
-
-Resetting these systems fixes spurious reset hangs on Atheros AR9344
-SoCs.
-
-Link: https://github.com/freifunk-gluon/gluon/issues/2904
-
-Signed-off-by: David Bauer <mail at david-bauer.net>
-
---- a/drivers/reset/reset-ath79.c
-+++ b/drivers/reset/reset-ath79.c
-@@ -12,8 +12,11 @@
- #include <linux/platform_device.h>
- #include <linux/reset-controller.h>
- #include <linux/reboot.h>
-+#include <linux/delay.h>
-+#include <linux/of.h>
- 
- struct ath79_reset {
-+	struct platform_device *pdev;
- 	struct reset_controller_dev rcdev;
- 	struct notifier_block restart_nb;
- 	void __iomem *base;
-@@ -21,16 +24,13 @@ struct ath79_reset {
- };
- 
- #define FULL_CHIP_RESET 24
-+#define ETH_SWITCH_RESET 8
-+#define ETH_SWITCH_ARESET 12
- 
--static int ath79_reset_update(struct reset_controller_dev *rcdev,
-+static void __ath79_reset_update_unlocked(struct ath79_reset *ath79_reset,
- 			unsigned long id, bool assert)
- {
--	struct ath79_reset *ath79_reset =
--		container_of(rcdev, struct ath79_reset, rcdev);
--	unsigned long flags;
- 	u32 val;
--
--	spin_lock_irqsave(&ath79_reset->lock, flags);
- 	val = readl(ath79_reset->base);
- 	if (assert)
- 		val |= BIT(id);
-@@ -39,6 +39,17 @@ static int ath79_reset_update(struct res
- 	writel(val, ath79_reset->base);
- 	/* Flush cache */
- 	readl(ath79_reset->base);
-+}
-+
-+static int ath79_reset_update(struct reset_controller_dev *rcdev,
-+			unsigned long id, bool assert)
-+{
-+	struct ath79_reset *ath79_reset =
-+		container_of(rcdev, struct ath79_reset, rcdev);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&ath79_reset->lock, flags);
-+	__ath79_reset_update_unlocked(ath79_reset, id, assert);
- 	spin_unlock_irqrestore(&ath79_reset->lock, flags);
- 
- 	return 0;
-@@ -79,8 +90,27 @@ static int ath79_reset_restart_handler(s
- {
- 	struct ath79_reset *ath79_reset =
- 		container_of(nb, struct ath79_reset, restart_nb);
-+	unsigned long flags;
- 
--	ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
-+	spin_lock_irqsave(&ath79_reset->lock, flags);
-+
-+	if (of_device_is_compatible(ath79_reset->pdev->dev.of_node, "qca,ar9340-reset")) {
-+		/**
-+		 * AR9344 has been observed to hang on reboot in rare cases.
-+		 *
-+		 * Datasheet states to reset the ETH switch systems before asserting
-+		 * full chip reset. See page 111 of the AR9344 datasheet.
-+		 */
-+		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_RESET, true);
-+		mdelay(10);
-+		__ath79_reset_update_unlocked(ath79_reset, ETH_SWITCH_ARESET, true);
-+		mdelay(10);
-+	}
-+
-+	__ath79_reset_update_unlocked(ath79_reset, FULL_CHIP_RESET, true);
-+	mdelay(10);
-+
-+	spin_unlock_irqrestore(&ath79_reset->lock, flags);
- 
- 	return NOTIFY_DONE;
- }
-@@ -95,6 +125,8 @@ static int ath79_reset_probe(struct plat
- 	if (!ath79_reset)
- 		return -ENOMEM;
- 
-+	ath79_reset->pdev = pdev;
-+
- 	ath79_reset->base = devm_platform_ioremap_resource(pdev, 0);
- 	if (IS_ERR(ath79_reset->base))
- 		return PTR_ERR(ath79_reset->base);



From lede-commits at lists.infradead.org  Sun Jan 19 02:21:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:21:23 -0500
Subject: [openwrt/openwrt]  mac80211: Fix tracing backport
In-Reply-To: <173728208368.1933552.8352360556219927942@git-01.infra.openwrt.org>
References: <173728208368.1933552.8352360556219927942@git-01.infra.openwrt.org>
Message-ID: <mailman.42748.1737282088.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9096f996baf5555bae1c3175a9ddf7bbd3be9a9c

commit 9096f996baf5555bae1c3175a9ddf7bbd3be9a9c
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Wed Jan 1 04:48:56 2025 -0800

    mac80211: Fix tracing backport
    
    Update handling of macro __assign_str() to also support the one-argument
    variant when building against kernel 6.10 or later. This is needed for
    building the next LTS kernel 6.12.
    
    Fixes: 384d079fd8 ("mac80211: update to version 6.11")
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17456
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../patches/build/140-trace_backport.patch         | 419 ++++++++++++++-------
 1 file changed, 286 insertions(+), 133 deletions(-)

diff --git a/package/kernel/mac80211/patches/build/140-trace_backport.patch b/package/kernel/mac80211/patches/build/140-trace_backport.patch
index 8b77b7e83d..2d25f1c5c3 100644
--- a/package/kernel/mac80211/patches/build/140-trace_backport.patch
+++ b/package/kernel/mac80211/patches/build/140-trace_backport.patch
@@ -1,541 +1,694 @@
 --- a/drivers/bus/mhi/host/trace.h
 +++ b/drivers/bus/mhi/host/trace.h
-@@ -104,7 +104,7 @@ TRACE_EVENT(mhi_gen_tre,
+@@ -104,7 +104,11 @@ TRACE_EVENT(mhi_gen_tre,
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		__entry->ch_num = mhi_chan->chan;
  		__entry->wp = mhi_tre;
  		__entry->tre_ptr = le64_to_cpu(mhi_tre->ptr);
-@@ -132,7 +132,7 @@ TRACE_EVENT(mhi_intvec_states,
+@@ -132,7 +136,11 @@ TRACE_EVENT(mhi_intvec_states,
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		__entry->local_ee = mhi_cntrl->ee;
  		__entry->state = mhi_cntrl->dev_state;
  		__entry->dev_ee = dev_ee;
-@@ -159,7 +159,7 @@ TRACE_EVENT(mhi_tryset_pm_state,
+@@ -159,7 +167,11 @@ TRACE_EVENT(mhi_tryset_pm_state,
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		if (pm_state)
  			pm_state = __fls(pm_state);
  		__entry->pm_state = pm_state;
-@@ -185,7 +185,7 @@ DECLARE_EVENT_CLASS(mhi_process_event_ri
+@@ -185,7 +197,11 @@ DECLARE_EVENT_CLASS(mhi_process_event_ri
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		__entry->rp = rp;
  		__entry->ptr = le64_to_cpu(rp->ptr);
  		__entry->dword0 = le32_to_cpu(rp->dword[0]);
-@@ -227,7 +227,7 @@ DECLARE_EVENT_CLASS(mhi_update_channel_s
+@@ -227,7 +243,11 @@ DECLARE_EVENT_CLASS(mhi_update_channel_s
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		__entry->ch_num = mhi_chan->chan;
  		__entry->state = state;
  		__entry->reason = reason;
-@@ -266,7 +266,7 @@ TRACE_EVENT(mhi_pm_st_transition,
+@@ -266,7 +286,11 @@ TRACE_EVENT(mhi_pm_st_transition,
  	),
  
  	TP_fast_assign(
--		__assign_str(name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(name);
++#else
 +		__assign_str(name, mhi_cntrl->mhi_dev->name);
++#endif
  		__entry->state = state;
  	),
  
 --- a/drivers/net/wireless/ath/ath10k/trace.h
 +++ b/drivers/net/wireless/ath/ath10k/trace.h
-@@ -55,8 +55,8 @@ DECLARE_EVENT_CLASS(ath10k_log_event,
+@@ -55,8 +55,13 @@ DECLARE_EVENT_CLASS(ath10k_log_event,
  		__vstring(msg, vaf->fmt, vaf->va)
  	),
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk(
-@@ -92,8 +92,8 @@ TRACE_EVENT(ath10k_log_dbg,
+@@ -92,8 +97,13 @@ TRACE_EVENT(ath10k_log_dbg,
  		__vstring(msg, vaf->fmt, vaf->va)
  	),
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->level = level;
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
-@@ -121,10 +121,10 @@ TRACE_EVENT(ath10k_log_dbg_dump,
+@@ -121,10 +131,17 @@ TRACE_EVENT(ath10k_log_dbg_dump,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
--		__assign_str(msg);
--		__assign_str(prefix);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
+ 		__assign_str(msg);
+ 		__assign_str(prefix);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
 +		__assign_str(msg, msg);
 +		__assign_str(prefix, prefix);
++#endif
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
  	),
-@@ -152,8 +152,8 @@ TRACE_EVENT(ath10k_wmi_cmd,
+@@ -152,8 +169,13 @@ TRACE_EVENT(ath10k_wmi_cmd,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->id = id;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
-@@ -182,8 +182,8 @@ TRACE_EVENT(ath10k_wmi_event,
+@@ -182,8 +204,13 @@ TRACE_EVENT(ath10k_wmi_event,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->id = id;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
-@@ -211,8 +211,8 @@ TRACE_EVENT(ath10k_htt_stats,
+@@ -211,8 +238,13 @@ TRACE_EVENT(ath10k_htt_stats,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
  	),
-@@ -239,8 +239,8 @@ TRACE_EVENT(ath10k_wmi_dbglog,
+@@ -239,8 +271,13 @@ TRACE_EVENT(ath10k_wmi_dbglog,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->hw_type = ar->hw_rev;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
-@@ -269,8 +269,8 @@ TRACE_EVENT(ath10k_htt_pktlog,
+@@ -269,8 +306,13 @@ TRACE_EVENT(ath10k_htt_pktlog,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->hw_type = ar->hw_rev;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(pktlog), buf, buf_len);
-@@ -301,8 +301,8 @@ TRACE_EVENT(ath10k_htt_tx,
+@@ -301,8 +343,13 @@ TRACE_EVENT(ath10k_htt_tx,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->msdu_id = msdu_id;
  		__entry->msdu_len = msdu_len;
  		__entry->vdev_id = vdev_id;
-@@ -332,8 +332,8 @@ TRACE_EVENT(ath10k_txrx_tx_unref,
+@@ -332,8 +379,13 @@ TRACE_EVENT(ath10k_txrx_tx_unref,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->msdu_id = msdu_id;
  	),
  
-@@ -358,8 +358,8 @@ DECLARE_EVENT_CLASS(ath10k_hdr_event,
+@@ -358,8 +410,13 @@ DECLARE_EVENT_CLASS(ath10k_hdr_event,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->len = ath10k_frm_hdr_len(data, len);
  		memcpy(__get_dynamic_array(data), data, __entry->len);
  	),
-@@ -386,8 +386,8 @@ DECLARE_EVENT_CLASS(ath10k_payload_event
+@@ -386,8 +443,13 @@ DECLARE_EVENT_CLASS(ath10k_payload_event
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->len = len - ath10k_frm_hdr_len(data, len);
  		memcpy(__get_dynamic_array(payload),
  		       data + ath10k_frm_hdr_len(data, len), __entry->len);
-@@ -435,8 +435,8 @@ TRACE_EVENT(ath10k_htt_rx_desc,
+@@ -435,8 +497,13 @@ TRACE_EVENT(ath10k_htt_rx_desc,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->hw_type = ar->hw_rev;
  		__entry->len = len;
  		memcpy(__get_dynamic_array(rxdesc), data, len);
-@@ -472,8 +472,8 @@ TRACE_EVENT(ath10k_wmi_diag_container,
+@@ -472,8 +539,13 @@ TRACE_EVENT(ath10k_wmi_diag_container,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->type = type;
  		__entry->timestamp = timestamp;
  		__entry->code = code;
-@@ -505,8 +505,8 @@ TRACE_EVENT(ath10k_wmi_diag,
+@@ -505,8 +577,13 @@ TRACE_EVENT(ath10k_wmi_diag,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->dev));
 +		__assign_str(driver, dev_driver_string(ar->dev));
++#endif
  		__entry->len = len;
  		memcpy(__get_dynamic_array(data), data, len);
  	),
 --- a/drivers/net/wireless/ath/ath11k/trace.h
 +++ b/drivers/net/wireless/ath/ath11k/trace.h
-@@ -48,8 +48,8 @@ TRACE_EVENT(ath11k_htt_pktlog,
+@@ -48,8 +48,13 @@ TRACE_EVENT(ath11k_htt_pktlog,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->buf_len = buf_len;
  		__entry->pktlog_checksum = pktlog_checksum;
  		memcpy(__get_dynamic_array(pktlog), buf, buf_len);
-@@ -77,8 +77,8 @@ TRACE_EVENT(ath11k_htt_ppdu_stats,
+@@ -77,8 +82,13 @@ TRACE_EVENT(ath11k_htt_ppdu_stats,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->len = len;
  		memcpy(__get_dynamic_array(ppdu), data, len);
  	),
-@@ -105,8 +105,8 @@ TRACE_EVENT(ath11k_htt_rxdesc,
+@@ -105,8 +115,13 @@ TRACE_EVENT(ath11k_htt_rxdesc,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->len = len;
  		__entry->log_type = log_type;
  		memcpy(__get_dynamic_array(rxdesc), data, len);
-@@ -130,8 +130,8 @@ DECLARE_EVENT_CLASS(ath11k_log_event,
+@@ -130,8 +145,13 @@ DECLARE_EVENT_CLASS(ath11k_log_event,
  		__vstring(msg, vaf->fmt, vaf->va)
  	),
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk(
-@@ -171,8 +171,8 @@ TRACE_EVENT(ath11k_wmi_cmd,
+@@ -171,8 +191,13 @@ TRACE_EVENT(ath11k_wmi_cmd,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__entry->id = id;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
-@@ -201,8 +201,8 @@ TRACE_EVENT(ath11k_wmi_event,
+@@ -201,8 +226,13 @@ TRACE_EVENT(ath11k_wmi_event,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__entry->id = id;
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
-@@ -230,8 +230,8 @@ TRACE_EVENT(ath11k_log_dbg,
+@@ -230,8 +260,13 @@ TRACE_EVENT(ath11k_log_dbg,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__entry->level = level;
  		WARN_ON_ONCE(vsnprintf(__get_dynamic_array(msg),
  				       ATH11K_MSG_MAX, vaf->fmt,
-@@ -262,10 +262,10 @@ TRACE_EVENT(ath11k_log_dbg_dump,
+@@ -262,10 +297,17 @@ TRACE_EVENT(ath11k_log_dbg_dump,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
--		__assign_str(msg);
--		__assign_str(prefix);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
+ 		__assign_str(msg);
+ 		__assign_str(prefix);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
 +		__assign_str(msg, msg);
 +		__assign_str(prefix, prefix);
++#endif
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
  	),
-@@ -292,8 +292,8 @@ TRACE_EVENT(ath11k_wmi_diag,
+@@ -292,8 +334,13 @@ TRACE_EVENT(ath11k_wmi_diag,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__entry->len = len;
  		memcpy(__get_dynamic_array(data), data, len);
  	),
-@@ -318,8 +318,8 @@ TRACE_EVENT(ath11k_ps_timekeeper,
+@@ -318,8 +365,14 @@ TRACE_EVENT(ath11k_ps_timekeeper,
  			 __field(u32, peer_ps_timestamp)
  	),
  
 -	TP_fast_assign(__assign_str(device);
--		       __assign_str(driver);
-+	TP_fast_assign(__assign_str(device, dev_name(ar->ab->dev));
++	TP_fast_assign(
++#if LINUX_VERSION_IS_GEQ(6,10,0)
++		       __assign_str(device);
+ 		       __assign_str(driver);
++#else
++		       __assign_str(device, dev_name(ar->ab->dev));
 +		       __assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		       memcpy(__get_dynamic_array(peer_addr), peer_addr,
  			      ETH_ALEN);
  		       __entry->peer_ps_state = peer_ps_state;
 --- a/drivers/net/wireless/ath/ath12k/trace.h
 +++ b/drivers/net/wireless/ath/ath12k/trace.h
-@@ -36,8 +36,8 @@ TRACE_EVENT(ath12k_htt_pktlog,
+@@ -36,8 +36,13 @@ TRACE_EVENT(ath12k_htt_pktlog,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->buf_len = buf_len;
  		__entry->pktlog_checksum = pktlog_checksum;
  		memcpy(__get_dynamic_array(pktlog), buf, buf_len);
-@@ -73,8 +73,8 @@ TRACE_EVENT(ath12k_htt_ppdu_stats,
+@@ -73,8 +78,13 @@ TRACE_EVENT(ath12k_htt_ppdu_stats,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->len = len;
  		__entry->info = ar->pdev->timestamp.info;
  		__entry->sync_tstmp_lo_us = ar->pdev->timestamp.sync_timestamp_hi_us;
-@@ -117,8 +117,8 @@ TRACE_EVENT(ath12k_htt_rxdesc,
+@@ -117,8 +127,13 @@ TRACE_EVENT(ath12k_htt_rxdesc,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ar->ab->dev));
 +		__assign_str(driver, dev_driver_string(ar->ab->dev));
++#endif
  		__entry->len = len;
  		__entry->type = type;
  		__entry->info = ar->pdev->timestamp.info;
-@@ -153,8 +153,8 @@ TRACE_EVENT(ath12k_wmi_diag,
+@@ -153,8 +168,13 @@ TRACE_EVENT(ath12k_wmi_diag,
  	),
  
  	TP_fast_assign(
--		__assign_str(device);
--		__assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(device);
+ 		__assign_str(driver);
++#else
 +		__assign_str(device, dev_name(ab->dev));
 +		__assign_str(driver, dev_driver_string(ab->dev));
++#endif
  		__entry->len = len;
  		memcpy(__get_dynamic_array(data), data, len);
  	),
 --- a/drivers/net/wireless/ath/ath6kl/trace.h
 +++ b/drivers/net/wireless/ath/ath6kl/trace.h
-@@ -304,8 +304,8 @@ TRACE_EVENT(ath6kl_log_dbg_dump,
+@@ -304,8 +304,13 @@ TRACE_EVENT(ath6kl_log_dbg_dump,
  	),
  
  	TP_fast_assign(
--		__assign_str(msg);
--		__assign_str(prefix);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(msg);
+ 		__assign_str(prefix);
++#else
 +		__assign_str(msg, msg);
 +		__assign_str(prefix, prefix);
++#endif
  		__entry->buf_len = buf_len;
  		memcpy(__get_dynamic_array(buf), buf, buf_len);
  	),
 --- a/drivers/net/wireless/ath/trace.h
 +++ b/drivers/net/wireless/ath/trace.h
-@@ -44,8 +44,8 @@ TRACE_EVENT(ath_log,
+@@ -44,8 +44,13 @@ TRACE_EVENT(ath_log,
  	    ),
  
  	    TP_fast_assign(
--		    __assign_str(device);
--		    __assign_str(driver);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		    __assign_str(device);
+ 		    __assign_str(driver);
++#else
 +		    __assign_str(device, wiphy_name(wiphy));
 +		    __assign_str(driver, KBUILD_MODNAME);
++#endif
  		    __assign_vstr(msg, vaf->fmt, vaf->va);
  	    ),
  
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.h
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.h
-@@ -41,7 +41,7 @@ TRACE_EVENT(brcmf_err,
+@@ -41,7 +41,11 @@ TRACE_EVENT(brcmf_err,
  		__vstring(msg, vaf->fmt, vaf->va)
  	),
  	TP_fast_assign(
--		__assign_str(func);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(func);
++#else
 +		__assign_str(func, func);
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk("%s: %s", __get_str(func), __get_str(msg))
-@@ -57,7 +57,7 @@ TRACE_EVENT(brcmf_dbg,
+@@ -57,7 +61,11 @@ TRACE_EVENT(brcmf_dbg,
  	),
  	TP_fast_assign(
  		__entry->level = level;
--		__assign_str(func);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(func);
++#else
 +		__assign_str(func, func);
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk("%s: %s", __get_str(func), __get_str(msg))
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac.h
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac.h
-@@ -81,7 +81,7 @@ TRACE_EVENT(brcms_macintstatus,
+@@ -81,7 +81,11 @@ TRACE_EVENT(brcms_macintstatus,
  		__field(u32, mask)
  	),
  	TP_fast_assign(
--		__assign_str(dev);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(dev);
++#else
 +		__assign_str(dev, dev_name(dev));
++#endif
  		__entry->in_isr = in_isr;
  		__entry->macintstatus = macintstatus;
  		__entry->mask = mask;
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_msg.h
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_msg.h
-@@ -71,7 +71,7 @@ TRACE_EVENT(brcms_dbg,
+@@ -71,7 +71,11 @@ TRACE_EVENT(brcms_dbg,
  	),
  	TP_fast_assign(
  		__entry->level = level;
--		__assign_str(func);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(func);
++#else
 +		__assign_str(func, func);
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk("%s: %s", __get_str(func), __get_str(msg))
 --- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_tx.h
 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_tx.h
-@@ -31,7 +31,7 @@ TRACE_EVENT(brcms_txdesc,
+@@ -31,7 +31,11 @@ TRACE_EVENT(brcms_txdesc,
  		__dynamic_array(u8, txh, txh_len)
  	),
  	TP_fast_assign(
--		__assign_str(dev);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(dev);
++#else
 +		__assign_str(dev, dev_name(dev));
++#endif
  		memcpy(__get_dynamic_array(txh), txh, txh_len);
  	),
  	TP_printk("[%s] txdesc", __get_str(dev))
-@@ -54,7 +54,7 @@ TRACE_EVENT(brcms_txstatus,
+@@ -54,7 +58,11 @@ TRACE_EVENT(brcms_txstatus,
  		__field(u16, ackphyrxsh)
  	),
  	TP_fast_assign(
--		__assign_str(dev);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(dev);
++#else
 +		__assign_str(dev, dev_name(dev));
++#endif
  		__entry->framelen = framelen;
  		__entry->frameid = frameid;
  		__entry->status = status;
-@@ -85,7 +85,7 @@ TRACE_EVENT(brcms_ampdu_session,
+@@ -85,7 +93,11 @@ TRACE_EVENT(brcms_ampdu_session,
  		__field(u16, dma_len)
  	),
  	TP_fast_assign(
--		__assign_str(dev);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(dev);
++#else
 +		__assign_str(dev, dev_name(dev));
++#endif
  		__entry->max_ampdu_len = max_ampdu_len;
  		__entry->max_ampdu_frames = max_ampdu_frames;
  		__entry->ampdu_len = ampdu_len;
 --- a/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-msg.h
 +++ b/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-msg.h
-@@ -57,7 +57,7 @@ TRACE_EVENT(iwlwifi_dbg,
+@@ -57,7 +57,11 @@ TRACE_EVENT(iwlwifi_dbg,
  	),
  	TP_fast_assign(
  		__entry->level = level;
--		__assign_str(function);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(function);
++#else
 +		__assign_str(function, function);
++#endif
  		__assign_vstr(msg, vaf->fmt, vaf->va);
  	),
  	TP_printk("%s", __get_str(msg))
 --- a/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h
 +++ b/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h
-@@ -87,7 +87,7 @@ static inline void trace_ ## name(proto)
+@@ -87,7 +87,11 @@ static inline void trace_ ## name(proto)
  #endif
  
  #define DEV_ENTRY	__string(dev, dev_name(dev))
--#define DEV_ASSIGN	__assign_str(dev)
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ #define DEV_ASSIGN	__assign_str(dev)
++#else
 +#define DEV_ASSIGN	__assign_str(dev, dev_name(dev))
++#endif
  
  #include "iwl-devtrace-io.h"
  #include "iwl-devtrace-ucode.h"
 --- a/include/trace/events/qrtr.h
 +++ b/include/trace/events/qrtr.h
-@@ -102,7 +102,7 @@ TRACE_EVENT(qrtr_ns_message,
+@@ -102,7 +102,11 @@ TRACE_EVENT(qrtr_ns_message,
  	),
  
  	TP_fast_assign(
--		__assign_str(ctrl_pkt_str);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(ctrl_pkt_str);
++#else
 +		__assign_str(ctrl_pkt_str, ctrl_pkt_str);
++#endif
  		__entry->sq_node = sq_node;
  		__entry->sq_port = sq_port;
  	),
 --- a/net/mac80211/trace.h
 +++ b/net/mac80211/trace.h
-@@ -33,7 +33,7 @@
+@@ -31,9 +31,15 @@
+ #define VIF_ENTRY	__field(enum nl80211_iftype, vif_type) __field(void *, sdata)	\
+ 			__field(bool, p2p)						\
  			__string(vif_name, sdata->name)
++#if LINUX_VERSION_IS_GEQ(6,10,0)
  #define VIF_ASSIGN	__entry->vif_type = sdata->vif.type; __entry->sdata = sdata;	\
  			__entry->p2p = sdata->vif.p2p;					\
--			__assign_str(vif_name)
+ 			__assign_str(vif_name)
++#else
++#define VIF_ASSIGN	__entry->vif_type = sdata->vif.type; __entry->sdata = sdata;	\
++			__entry->p2p = sdata->vif.p2p;					\
 +			__assign_str(vif_name, sdata->name)
++#endif
  #define VIF_PR_FMT	" vif:%s(%d%s)"
  #define VIF_PR_ARG	__get_str(vif_name), __entry->vif_type, __entry->p2p ? "/p2p" : ""
  
 --- a/net/wireless/trace.h
 +++ b/net/wireless/trace.h
-@@ -446,7 +446,7 @@ TRACE_EVENT(rdev_add_virtual_intf,
+@@ -446,7 +446,11 @@ TRACE_EVENT(rdev_add_virtual_intf,
  	),
  	TP_fast_assign(
  		WIPHY_ASSIGN;
--		__assign_str(vir_intf_name);
++#if LINUX_VERSION_IS_GEQ(6,10,0)
+ 		__assign_str(vir_intf_name);
++#else
 +		__assign_str(vir_intf_name, name ? name : "<noname>");
++#endif
  		__entry->type = type;
  	),
  	TP_printk(WIPHY_PR_FMT ", virtual intf name: %s, type: %d",



From lede-commits at lists.infradead.org  Sun Jan 19 02:58:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 05:58:09 -0500
Subject: [openwrt/openwrt]  ethtool: update to 6.11
In-Reply-To: <173728428929.1977552.950433011763378026@git-01.infra.openwrt.org>
References: <173728428929.1977552.950433011763378026@git-01.infra.openwrt.org>
Message-ID: <mailman.42775.1737284293.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9454331b7fc896704a2c60b28767c282eb9ca0bd

commit 9454331b7fc896704a2c60b28767c282eb9ca0bd
Author: Andrea Pesaresi <andreapesaresi82 at gmail.com>
AuthorDate: Wed Jan 15 01:15:20 2025 +0100

    ethtool: update to 6.11
    
    Version 6.11 - October 8, 2024
            * Feature: cmis: print active and inactive firmware versions
            * Feature: flash transceiver module firmware (--flash-module-firmware)
            * Feature: add T1BRR 10Mb/s mode to link mode tables
            * Feature: support for disabling netlink from command line
            * Fix: fix lanes parameter format specifier
            * Fix: add missing clause 33 PSE manual description
            * Fix: qsf: Better handling of Page A2h netlink read failure
            * Fix: rss: retrieve ring count using ETHTOOL_GRXRINGS ioctl (-x)
            * Misc: man page formatting fix
    
    * changelog here: https://git.kernel.org/pub/scm/network/ethtool/ethtool.git/commit/NEWS?id=c0ea4b70c71334ef038f7a3416b228a50dada406
    
    Tested on gl.inet MT6000, retrieve ring count is now working
    
    Signed-off-by: Andrea Pesaresi <andreapesaresi82 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17607
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/network/utils/ethtool/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/network/utils/ethtool/Makefile b/package/network/utils/ethtool/Makefile
index cfb4cfaeb9..893fcc1eda 100644
--- a/package/network/utils/ethtool/Makefile
+++ b/package/network/utils/ethtool/Makefile
@@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=ethtool
-PKG_VERSION:=6.10
+PKG_VERSION:=6.11
 PKG_RELEASE:=1
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/software/network/ethtool
-PKG_HASH:=cc613fe8a2bcddee17a1e6e0d763c0f3ea33c7e930658d2d7f601aa65e426a1f
+PKG_HASH:=8d91f5c72ae3f25b7e88d4781279dcb320f71e30058914370b1c574c96b31202
 
 PKG_LICENSE:=GPL-2.0
 PKG_LICENSE_FILES:=COPYING



From lede-commits at lists.infradead.org  Sun Jan 19 08:44:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 11:44:53 -0500
Subject: [openwrt/openwrt]  ath79: lzma-loader: expose LZMA_TEXT_ADDRESS
 configuration again
In-Reply-To: <173730509341.2361116.9433844768465976887@git-01.infra.openwrt.org>
References: <173730509341.2361116.9433844768465976887@git-01.infra.openwrt.org>
Message-ID: <mailman.42844.1737305098.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6720958659d226e71dca49657202e0502bb059bd

commit 6720958659d226e71dca49657202e0502bb059bd
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Wed Nov 20 03:45:21 2024 +0100

    ath79: lzma-loader: expose LZMA_TEXT_ADDRESS configuration again
    
    initramfs for some devices grew so big, that it can't be loaded within
    the previous 32MB RAM limit. Make the LZMA_TEXT_ADDRESS configurable
    per-target once again, to fix it for bigger devices, while maintaining
    compatibility with previous ones.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17616
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/Makefile | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/linux/ath79/image/Makefile b/target/linux/ath79/image/Makefile
index 5647200b4b..1918a8a431 100644
--- a/target/linux/ath79/image/Makefile
+++ b/target/linux/ath79/image/Makefile
@@ -4,7 +4,7 @@ include $(INCLUDE_DIR)/image.mk
 KERNEL_LOADADDR = 0x80060000
 
 DEVICE_VARS += LOADER_FLASH_OFFS LOADER_TYPE
-DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC
+DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC LZMA_TEXT_START
 DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
 DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
 DEVICE_VARS += SEAMA_SIGNATURE SEAMA_MTDBLOCK
@@ -14,6 +14,7 @@ define Build/loader-common
 	$(MAKE) -C lzma-loader \
 		PKG_BUILD_DIR="$@.src" \
 		TARGET_DIR="$(dir $@)" LOADER_NAME="$(notdir $@)" \
+		LZMA_TEXT_START=$(LZMA_TEXT_START) \
 		$(1) compile loader.$(LOADER_TYPE)
 	mv "$@.$(LOADER_TYPE)" "$@"
 	rm -rf $@.src
@@ -74,6 +75,7 @@ define Device/Default
   LOADER_FLASH_MAX :=
   LOADER_FLASH_OFFS :=
   LOADER_TYPE :=
+  LZMA_TEXT_START := 0x81800000
   COMPILE :=
   IMAGES := sysupgrade.bin
   IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \



From lede-commits at lists.infradead.org  Sun Jan 19 08:44:54 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 11:44:54 -0500
Subject: [openwrt/openwrt]  ath79: zte-mf28x-common: fix initramfs execution
In-Reply-To: <173730509341.2361116.9433844768465976887@git-01.infra.openwrt.org>
References: <173730509341.2361116.9433844768465976887@git-01.infra.openwrt.org>
Message-ID: <mailman.42845.1737305102.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/32c6b9064ac7fc62cead37b1bc7d46ffba598c71

commit 32c6b9064ac7fc62cead37b1bc7d46ffba598c71
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Wed Nov 20 03:45:46 2024 +0100

    ath79: zte-mf28x-common: fix initramfs execution
    
    Now that LZMA_TEXT_START is configurable per-target once again,
    move the target above 32MB boundary for ZTE MF28* devices.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17616
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/image/nand.mk | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk
index d3c1120aa2..e8494da15d 100644
--- a/target/linux/ath79/image/nand.mk
+++ b/target/linux/ath79/image/nand.mk
@@ -442,6 +442,10 @@ define Device/zte_mf28x_common
   DEVICE_PACKAGES := kmod-usb2 kmod-ath10k-ct
   BLOCKSIZE := 128k
   PAGESIZE := 2048
+  LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+  KERNEL_INITRAMFS := $$(KERNEL)
   KERNEL_SIZE := 4096k
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef



From lede-commits at lists.infradead.org  Sun Jan 19 08:52:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 11:52:25 -0500
Subject: [openwrt/openwrt]  mediatek: EX5601-T0 add Zyxel EX5601-T1 and T-56
 alias
In-Reply-To: <173730554586.2370079.17433467210287729127@git-01.infra.openwrt.org>
References: <173730554586.2370079.17433467210287729127@git-01.infra.openwrt.org>
Message-ID: <mailman.42846.1737305549.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3d63a41ffab69cb6f49c14cff99c3c3a84899363

commit 3d63a41ffab69cb6f49c14cff99c3c3a84899363
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Wed Jan 15 19:21:24 2025 +0100

    mediatek: EX5601-T0 add Zyxel EX5601-T1 and T-56 alias
    
    Define EX5601-T1 and T-56 as alternative name, to explicitly show
    the device is supported using existing image. EX5601-T1 does not
    have the option to switch between WAN/SFP port. The switch port
    is hardwired to the WAN port. The Zyxel T-56 is the odido-branded
    version of the EX5601-T1.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17615
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/image/filogic.mk | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 01d827c029..b188add1bd 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -1721,6 +1721,10 @@ TARGET_DEVICES += zbtlink_zbt-z8103ax
 define Device/zyxel_ex5601-t0-stock
   DEVICE_VENDOR := Zyxel
   DEVICE_MODEL := EX5601-T0
+  DEVICE_ALT0_VENDOR := Zyxel
+  DEVICE_ALT0_MODEL := EX5601-T1
+  DEVICE_ALT1_VENDOR := Zyxel
+  DEVICE_ALT1_MODEL := T-56
   DEVICE_VARIANT := (stock layout)
   DEVICE_DTS := mt7986a-zyxel-ex5601-t0-stock
   DEVICE_DTS_DIR := ../dts
@@ -1744,6 +1748,10 @@ TARGET_DEVICES += zyxel_ex5601-t0-stock
 define Device/zyxel_ex5601-t0-ubootmod
   DEVICE_VENDOR := Zyxel
   DEVICE_MODEL := EX5601-T0
+  DEVICE_ALT0_VENDOR := Zyxel
+  DEVICE_ALT0_MODEL := EX5601-T1
+  DEVICE_ALT1_VENDOR := Zyxel
+  DEVICE_ALT1_MODEL := T-56
   DEVICE_VARIANT := (OpenWrt U-Boot layout)
   DEVICE_DTS := mt7986a-zyxel-ex5601-t0-ubootmod
   DEVICE_DTS_DIR := ../dts



From lede-commits at lists.infradead.org  Sun Jan 19 09:10:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 19 Jan 2025 12:10:29 -0500
Subject: [openwrt/openwrt]  ramips: fixes for Keenetic KN-1711,1713,1910
In-Reply-To: <173730662960.2388773.2985132374885784678@git-01.infra.openwrt.org>
References: <173730662960.2388773.2985132374885784678@git-01.infra.openwrt.org>
Message-ID: <mailman.42847.1737306632.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f80f52163a1f56ebf3ced76cb4d37906c4d25702

commit f80f52163a1f56ebf3ced76cb4d37906c4d25702
Author: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
AuthorDate: Thu Jan 16 21:05:38 2025 +0500

    ramips: fixes for Keenetic KN-1711,1713,1910
    
    The image size has been changed to prevent failures in routers and bootloop
    when flashing a large image using a stock bootloader. The LED trigger
    package has been removed for 1910, which is no longer in use.
    
    Signed-off-by: Anton Yu. Ivanusev <ivanusevanton at yandex.ru>
    Link: https://github.com/openwrt/openwrt/pull/17630
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/image/mt7621.mk | 5 ++---
 target/linux/ramips/image/mt76x8.mk | 4 ++--
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 08b3dcc64f..a77579e1cc 100755
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -1804,11 +1804,10 @@ define Device/keenetic_kn-1910
   $(Device/uimage-lzma-loader)
   BLOCKSIZE := 128k
   PAGESIZE := 2048
-  IMAGE_SIZE := 24903680
+  IMAGE_SIZE := 20368588
   DEVICE_VENDOR := Keenetic
   DEVICE_MODEL := KN-1910
-  DEVICE_PACKAGES := kmod-mt7615-firmware kmod-usb3 \
-	kmod-usb-ledtrig-usbport
+  DEVICE_PACKAGES := kmod-mt7615-firmware kmod-usb3
   IMAGES += factory.bin
   IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | \
 	append-ubi | check-size | zyimage -d 0x801910 -v "KN-1910"
diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk
index d63148cae4..a0dd48b8a6 100644
--- a/target/linux/ramips/image/mt76x8.mk
+++ b/target/linux/ramips/image/mt76x8.mk
@@ -368,7 +368,7 @@ TARGET_DEVICES += keenetic_kn-1613
 
 define Device/keenetic_kn-1711
   BLOCKSIZE := 64k
-  IMAGE_SIZE := 13434880
+  IMAGE_SIZE := 10551296
   DEVICE_VENDOR := Keenetic
   DEVICE_MODEL := KN-1711
   DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb2
@@ -380,7 +380,7 @@ TARGET_DEVICES += keenetic_kn-1711
 
 define Device/keenetic_kn-1713
   BLOCKSIZE := 64k
-  IMAGE_SIZE := 13434880
+  IMAGE_SIZE := 10551296
   DEVICE_VENDOR := Keenetic
   DEVICE_MODEL := KN-1713
   DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb2



From lede-commits at lists.infradead.org  Mon Jan 20 04:07:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 07:07:32 -0500
Subject: [openwrt/openwrt]  lantiq: fritz_cal_extract with reverse option for
 AVM FritzBox 7430
In-Reply-To: <173737485210.3762422.17238739815748689818@git-01.infra.openwrt.org>
References: <173737485210.3762422.17238739815748689818@git-01.infra.openwrt.org>
Message-ID: <mailman.43162.1737374858.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b2cac2a9785ada7c30388349f5d9a9bdcff2e730

commit b2cac2a9785ada7c30388349f5d9a9bdcff2e730
Author: Dustin Gathmann <dzsoftware at posteo.org>
AuthorDate: Wed Jan 15 15:55:29 2025 +0100

    lantiq: fritz_cal_extract with reverse option for AVM FritzBox 7430
    
    This implementation of fritz_cal_extract can also retrieve firmware
    data stored in reverse byte order, as found in the AVM 7430 device.
    
    This is done by intermediate storage in a buffer presumably large enough
    to hold the complete data set. Currently, this buffer size is 128kB + 1kB
    (some extra space for skipped data).
    
    In the usual case of "forward" data, this implementation should behave
    like the original implementation in all common cases. limit [-l] will
    determine the amount of data read and size of buffer allocated.
    
    However, if you are reading reversed data or didn't set a limit, the buffer
    may be too small to hold all data. In this case, you can choose a higher
    limit [-l] to enforce a sufficient buffer size.
    
    Signed-off-by: Dustin Gathmann <dzsoftware at posteo.org>
    Link: https://github.com/openwrt/openwrt/pull/15501
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/utils/fritz-tools/src/fritz_cal_extract.c  | 142 +++++++++++++++------
 .../etc/hotplug.d/firmware/12-ath9k-eeprom         |   7 +-
 2 files changed, 111 insertions(+), 38 deletions(-)

diff --git a/package/utils/fritz-tools/src/fritz_cal_extract.c b/package/utils/fritz-tools/src/fritz_cal_extract.c
index 9899cd53c3..c4547bc7e0 100644
--- a/package/utils/fritz-tools/src/fritz_cal_extract.c
+++ b/package/utils/fritz-tools/src/fritz_cal_extract.c
@@ -8,6 +8,9 @@
  * that is Not copyrighted -- provided to the public domain
  * Version 1.4  11 December 2005  Mark Adler
  *
+ * Modifications to also handle calibration data in reversed byte order
+ * (c) 2024 by <dzsoftware at posteo.org>.
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -28,31 +31,54 @@
 #include <assert.h>
 #include <unistd.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <endian.h>
 #include <errno.h>
 #include "zlib.h"
 
 #define CHUNK 1024
+#define DEFAULT_BUFFERSIZE (129 * 1024)
+
+#define MIN(a,b) (((a)<(b))?(a):(b))
 
-static inline size_t special_min(size_t a, size_t b)
+/* Reverse byte order in data buffer.
+ * 'top' is position of last valid data byte = (datasize - 1)
+ */
+static void buffer_reverse(unsigned char *data, unsigned int top)
 {
-	return a == 0 ? b : (a < b ? a : b);
+	register unsigned char swapbyte;
+	const unsigned int center = top / 2;
+
+	for (unsigned int bottom = 0; bottom < center; ++bottom, --top) {
+		swapbyte = data[bottom];
+		data[bottom] = data[top];
+		data[top] = swapbyte;
+	}
 }
 
-/* Decompress from file source to file dest until stream ends or EOF.
-   inf() returns Z_OK on success, Z_MEM_ERROR if memory could not be
-   allocated for processing, Z_DATA_ERROR if the deflate data is
-   invalid or incomplete, Z_VERSION_ERROR if the version of zlib.h and
-   the version of the library linked do not match, or Z_ERRNO if there
-   is an error reading or writing the files. */
-static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
+/* Decompress from file source to data buffer until stream ends
+ * or *limit bytes have been written to buffer.
+ *
+ * On call, 'limit' must reference a variable containing the intended
+ * number of bytes to retrieve (must be <= allocated buffer size).
+ *
+ * Return values (success):
+ * Z_END_STREAM if complete data was retrieved (*limit == size of complete data),
+ * or Z_OK if data was retrieved up to limit (*limit == original value).
+ *
+ * Return values (failure):
+ * Z_MEM_ERROR if memory could not be allocated for processing, 
+ * Z_DATA_ERROR if the deflate data is invalid or incomplete, 
+ * Z_VERSION_ERROR if the version of zlib.h and the version of the 
+ * library linked do not match, or 
+ * Z_ERRNO if there is an error reading or writing the files.
+ */
+static int inflate_to_buffer(FILE *source, unsigned char *buf, size_t *limit)
 {
 	int ret;
-	size_t have;
 	z_stream strm;
 	unsigned char in[CHUNK];
-	unsigned char out[CHUNK];
 
 	/* allocate inflate state */
 	strm.zalloc = Z_NULL;
@@ -64,6 +90,10 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 	if (ret != Z_OK)
 		return ret;
 
+	/* set data buffer as stream output */
+	strm.avail_out = *limit;
+	strm.next_out = buf;
+
 	/* decompress until deflate stream ends or end of file */
 	do {
 		strm.avail_in = fread(in, 1, CHUNK, source);
@@ -75,35 +105,28 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 			break;
 		strm.next_in = in;
 
-		/* run inflate() on input until output buffer not full */
-		do {
-			strm.avail_out = CHUNK;
-			strm.next_out = out;
-			ret = inflate(&strm, Z_NO_FLUSH);
-			assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
-			switch (ret) {
+		/* run inflate(), fill data buffer with all available output */
+		ret = inflate(&strm, Z_FINISH);
+		assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
+
+		switch (ret) {
 			case Z_NEED_DICT:
 				ret = Z_DATA_ERROR;     /* and fall through */
 			case Z_DATA_ERROR:
 			case Z_MEM_ERROR:
 				(void)inflateEnd(&strm);
 				return ret;
-			}
-			have = special_min(limit, CHUNK - strm.avail_out) - skip;
-			if (fwrite(&out[skip], have, 1, dest) != 1 || ferror(dest)) {
-				(void)inflateEnd(&strm);
-				return Z_ERRNO;
-			}
-		skip = 0;
-		limit -= have;
-		} while (strm.avail_out == 0 && limit > 0);
+		}
+		/* done when inflate() says it's done or limit reached */
+	} while (ret != Z_STREAM_END && strm.avail_out > 0);
 
-		/* done when inflate() says it's done */
-	} while (ret != Z_STREAM_END && limit > 0);
+	/* set limit to end of retrieved data */
+	assert(strm.total_out <= *limit);
+	*limit = strm.total_out;
 
 	/* clean up and return */
 	(void)inflateEnd(&strm);
-	return (limit == 0 ? Z_OK : (ret == Z_STREAM_END ? Z_OK : Z_DATA_ERROR));
+	return (ret == Z_STREAM_END ? Z_STREAM_END : (strm.avail_out == 0 ? Z_OK : Z_DATA_ERROR));
 }
 
 /* report a zlib or i/o error */
@@ -140,7 +163,8 @@ static unsigned int get_num(char *str)
 
 static void usage(void)
 {
-	fprintf(stderr, "Usage: fritz_cal_extract [-s seek offset] [-i skip] [-o output file] [-l limit] [infile] -e entry_id\n"
+	fprintf(stderr, "Usage: fritz_cal_extract -e entry_id [-s seek offset] [-l limit]\n"
+			"\t[-r reverse extracted data] [-i skip n bytes] [-o output file] [infile]\n"
 			"Finds and extracts zlib compressed calibration data in the EVA loader\n");
 	exit(EXIT_FAILURE);
 }
@@ -154,15 +178,18 @@ struct cal_entry {
 int main(int argc, char **argv)
 {
 	struct cal_entry cal = { .len = 0 };
+	unsigned char *buf = NULL;
 	FILE *in = stdin;
 	FILE *out = stdout;
+	size_t datasize = DEFAULT_BUFFERSIZE;
 	size_t limit = 0, skip = 0;
 	int initial_offset = 0;
 	int entry = -1;
+	bool reversed = false, limit_was_set = true;
 	int ret;
 	int opt;
 
-	while ((opt = getopt(argc, argv, "s:e:o:l:i:")) != -1) {
+	while ((opt = getopt(argc, argv, "s:e:o:l:i:r")) != -1) {
 		switch (opt) {
 		case 's':
 			initial_offset = (int)get_num(optarg);
@@ -199,6 +226,9 @@ int main(int argc, char **argv)
 				goto out_bad;
 			}
 			break;
+		case 'r':
+			reversed = true;
+			break;
 		default: /* '?' */
 			usage();
 		}
@@ -243,11 +273,50 @@ int main(int argc, char **argv)
 		goto out_bad;
 	}
 
-	ret = inf(in, out, limit, skip);
-	if (ret == Z_OK)
-		goto out;
+	/* Set boundaries. Only keep default datasize if we need complete data
+	 * for reversal and didn't set a higher limit. */
+	if (!limit) {
+		limit_was_set = false;
+		limit = datasize - skip;
+	}
+	datasize = (reversed && datasize >= limit + skip) ? datasize : (limit + skip);
+
+	/* Create data buffer. */
+	buf = malloc(datasize);
+	assert(buf != NULL);
+
+	ret = inflate_to_buffer(in, buf, &datasize);
+
+	if ((reversed || !limit_was_set) && ret != Z_STREAM_END) { /* didn't read to stream end */
+		fprintf(stderr, "Failed: Data exceeds buffer size of %u. Refusing to reverse"
+				" or store incomplete data."
+				" Use a higher limit [-l] to increase buffer size.\n",
+				(unsigned int) datasize);
+		goto out_bad;
+	}
+
+	ret = (ret == Z_STREAM_END) ? Z_OK : ret; /* normalize return value */
+	if (ret != Z_OK) {
+		zerr(ret);
+		goto out_bad;
+	}
+
+	if (reversed)
+		buffer_reverse(buf, datasize - 1);
+
+	if (datasize <= skip) {
+		fprintf(stderr, "Failed to skip %u bytes, total data size is %u!\n", 
+				(unsigned int)skip, (unsigned int)datasize);
+		goto out_bad;
+	}
+
+	limit = MIN(limit, datasize - skip);
+	if (fwrite(&buf[skip], limit, 1, out) != 1 || ferror(out)) {
+		fprintf(stderr, "Failed to write data buffer to output file");
+		goto out_bad;
+	}
 
-	zerr(ret);
+	goto out;
 
 out_bad:
 	ret = EXIT_FAILURE;
@@ -257,5 +326,6 @@ out:
 		fclose(in);
 	if (out)
 		fclose(out);
+	free(buf);
 	return ret;
 }
diff --git a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
index 936181c693..cb3fef9168 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
+++ b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
@@ -19,11 +19,14 @@ case "$FIRMWARE" in
 			avm,fritz3390)
 				caldata_extract_reverse "urlader" 0x2546 0x440
 				;;
-			avm,fritz7412|\
-			avm,fritz7430)
+			avm,fritz7412)
 				/usr/bin/fritz_cal_extract -i 1 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \
 				/usr/bin/fritz_cal_extract -i 1 -s 0x1e800 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader")
 				;;
+			avm,fritz7430)
+				/usr/bin/fritz_cal_extract -r -i 4 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \
+				/usr/bin/fritz_cal_extract -r -i 4 -s 0x1e800 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader")
+				;;
 			bt,homehub-v5a)
 				caldata_extract_ubi "caldata" 0x1000 0x1000
 				ath9k_patch_mac_crc $(macaddr_add $(mtd_get_mac_binary_ubi caldata 0x110c) 2) 0x10c



From lede-commits at lists.infradead.org  Mon Jan 20 04:09:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 07:09:25 -0500
Subject: [openwrt/openwrt]  fritz-tools: increase PKG_RELEASE
In-Reply-To: <173737496567.3765043.7174956359181706585@git-01.infra.openwrt.org>
References: <173737496567.3765043.7174956359181706585@git-01.infra.openwrt.org>
Message-ID: <mailman.43163.1737374969.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4a8717b5e76edbc8e1f63122f8b05685e0b779db

commit 4a8717b5e76edbc8e1f63122f8b05685e0b779db
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Mon Jan 20 13:08:38 2025 +0100

    fritz-tools: increase PKG_RELEASE
    
    Increase PKG_RELEASE as follow-up for
    ("lantiq: fritz_cal_extract with reverse option for AVM FritzBox 7430").
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/utils/fritz-tools/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/utils/fritz-tools/Makefile b/package/utils/fritz-tools/Makefile
index 6e20b56ff8..b43fe20e9e 100644
--- a/package/utils/fritz-tools/Makefile
+++ b/package/utils/fritz-tools/Makefile
@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=fritz-tools
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 CMAKE_INSTALL:=1
 
 include $(INCLUDE_DIR)/package.mk



From lede-commits at lists.infradead.org  Mon Jan 20 04:15:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 07:15:21 -0500
Subject: [openwrt/openwrt]  fritz-tools: increase PKG_RELEASE
In-Reply-To: <173737532052.3772665.8187576566237263994@git-01.infra.openwrt.org>
References: <173737532052.3772665.8187576566237263994@git-01.infra.openwrt.org>
Message-ID: <mailman.43166.1737375329.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a252c56b4b0e452930cce99a8769616755ab630d

commit a252c56b4b0e452930cce99a8769616755ab630d
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Mon Jan 20 13:08:38 2025 +0100

    fritz-tools: increase PKG_RELEASE
    
    Increase PKG_RELEASE as follow-up for
    ("lantiq: fritz_cal_extract with reverse option for AVM FritzBox 7430").
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 4a8717b5e76edbc8e1f63122f8b05685e0b779db)
---
 package/utils/fritz-tools/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/utils/fritz-tools/Makefile b/package/utils/fritz-tools/Makefile
index 6e20b56ff8..b43fe20e9e 100644
--- a/package/utils/fritz-tools/Makefile
+++ b/package/utils/fritz-tools/Makefile
@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=fritz-tools
-PKG_RELEASE:=2
+PKG_RELEASE:=3
 CMAKE_INSTALL:=1
 
 include $(INCLUDE_DIR)/package.mk



From lede-commits at lists.infradead.org  Mon Jan 20 04:15:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 07:15:20 -0500
Subject: [openwrt/openwrt]  lantiq: fritz_cal_extract with reverse option for
 AVM FritzBox 7430
In-Reply-To: <173737532052.3772665.8187576566237263994@git-01.infra.openwrt.org>
References: <173737532052.3772665.8187576566237263994@git-01.infra.openwrt.org>
Message-ID: <mailman.43167.1737375329.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/61dabbbfe3bfba7f2a780b0160341c1b6e3a027a

commit 61dabbbfe3bfba7f2a780b0160341c1b6e3a027a
Author: Dustin Gathmann <dzsoftware at posteo.org>
AuthorDate: Wed Jan 15 15:55:29 2025 +0100

    lantiq: fritz_cal_extract with reverse option for AVM FritzBox 7430
    
    This implementation of fritz_cal_extract can also retrieve firmware
    data stored in reverse byte order, as found in the AVM 7430 device.
    
    This is done by intermediate storage in a buffer presumably large enough
    to hold the complete data set. Currently, this buffer size is 128kB + 1kB
    (some extra space for skipped data).
    
    In the usual case of "forward" data, this implementation should behave
    like the original implementation in all common cases. limit [-l] will
    determine the amount of data read and size of buffer allocated.
    
    However, if you are reading reversed data or didn't set a limit, the buffer
    may be too small to hold all data. In this case, you can choose a higher
    limit [-l] to enforce a sufficient buffer size.
    
    Signed-off-by: Dustin Gathmann <dzsoftware at posteo.org>
    Link: https://github.com/openwrt/openwrt/pull/15501
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit b2cac2a9785ada7c30388349f5d9a9bdcff2e730)
---
 package/utils/fritz-tools/src/fritz_cal_extract.c  | 142 +++++++++++++++------
 .../etc/hotplug.d/firmware/12-ath9k-eeprom         |   7 +-
 2 files changed, 111 insertions(+), 38 deletions(-)

diff --git a/package/utils/fritz-tools/src/fritz_cal_extract.c b/package/utils/fritz-tools/src/fritz_cal_extract.c
index 9899cd53c3..c4547bc7e0 100644
--- a/package/utils/fritz-tools/src/fritz_cal_extract.c
+++ b/package/utils/fritz-tools/src/fritz_cal_extract.c
@@ -8,6 +8,9 @@
  * that is Not copyrighted -- provided to the public domain
  * Version 1.4  11 December 2005  Mark Adler
  *
+ * Modifications to also handle calibration data in reversed byte order
+ * (c) 2024 by <dzsoftware at posteo.org>.
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -28,31 +31,54 @@
 #include <assert.h>
 #include <unistd.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <endian.h>
 #include <errno.h>
 #include "zlib.h"
 
 #define CHUNK 1024
+#define DEFAULT_BUFFERSIZE (129 * 1024)
+
+#define MIN(a,b) (((a)<(b))?(a):(b))
 
-static inline size_t special_min(size_t a, size_t b)
+/* Reverse byte order in data buffer.
+ * 'top' is position of last valid data byte = (datasize - 1)
+ */
+static void buffer_reverse(unsigned char *data, unsigned int top)
 {
-	return a == 0 ? b : (a < b ? a : b);
+	register unsigned char swapbyte;
+	const unsigned int center = top / 2;
+
+	for (unsigned int bottom = 0; bottom < center; ++bottom, --top) {
+		swapbyte = data[bottom];
+		data[bottom] = data[top];
+		data[top] = swapbyte;
+	}
 }
 
-/* Decompress from file source to file dest until stream ends or EOF.
-   inf() returns Z_OK on success, Z_MEM_ERROR if memory could not be
-   allocated for processing, Z_DATA_ERROR if the deflate data is
-   invalid or incomplete, Z_VERSION_ERROR if the version of zlib.h and
-   the version of the library linked do not match, or Z_ERRNO if there
-   is an error reading or writing the files. */
-static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
+/* Decompress from file source to data buffer until stream ends
+ * or *limit bytes have been written to buffer.
+ *
+ * On call, 'limit' must reference a variable containing the intended
+ * number of bytes to retrieve (must be <= allocated buffer size).
+ *
+ * Return values (success):
+ * Z_END_STREAM if complete data was retrieved (*limit == size of complete data),
+ * or Z_OK if data was retrieved up to limit (*limit == original value).
+ *
+ * Return values (failure):
+ * Z_MEM_ERROR if memory could not be allocated for processing, 
+ * Z_DATA_ERROR if the deflate data is invalid or incomplete, 
+ * Z_VERSION_ERROR if the version of zlib.h and the version of the 
+ * library linked do not match, or 
+ * Z_ERRNO if there is an error reading or writing the files.
+ */
+static int inflate_to_buffer(FILE *source, unsigned char *buf, size_t *limit)
 {
 	int ret;
-	size_t have;
 	z_stream strm;
 	unsigned char in[CHUNK];
-	unsigned char out[CHUNK];
 
 	/* allocate inflate state */
 	strm.zalloc = Z_NULL;
@@ -64,6 +90,10 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 	if (ret != Z_OK)
 		return ret;
 
+	/* set data buffer as stream output */
+	strm.avail_out = *limit;
+	strm.next_out = buf;
+
 	/* decompress until deflate stream ends or end of file */
 	do {
 		strm.avail_in = fread(in, 1, CHUNK, source);
@@ -75,35 +105,28 @@ static int inf(FILE *source, FILE *dest, size_t limit, size_t skip)
 			break;
 		strm.next_in = in;
 
-		/* run inflate() on input until output buffer not full */
-		do {
-			strm.avail_out = CHUNK;
-			strm.next_out = out;
-			ret = inflate(&strm, Z_NO_FLUSH);
-			assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
-			switch (ret) {
+		/* run inflate(), fill data buffer with all available output */
+		ret = inflate(&strm, Z_FINISH);
+		assert(ret != Z_STREAM_ERROR);  /* state not clobbered */
+
+		switch (ret) {
 			case Z_NEED_DICT:
 				ret = Z_DATA_ERROR;     /* and fall through */
 			case Z_DATA_ERROR:
 			case Z_MEM_ERROR:
 				(void)inflateEnd(&strm);
 				return ret;
-			}
-			have = special_min(limit, CHUNK - strm.avail_out) - skip;
-			if (fwrite(&out[skip], have, 1, dest) != 1 || ferror(dest)) {
-				(void)inflateEnd(&strm);
-				return Z_ERRNO;
-			}
-		skip = 0;
-		limit -= have;
-		} while (strm.avail_out == 0 && limit > 0);
+		}
+		/* done when inflate() says it's done or limit reached */
+	} while (ret != Z_STREAM_END && strm.avail_out > 0);
 
-		/* done when inflate() says it's done */
-	} while (ret != Z_STREAM_END && limit > 0);
+	/* set limit to end of retrieved data */
+	assert(strm.total_out <= *limit);
+	*limit = strm.total_out;
 
 	/* clean up and return */
 	(void)inflateEnd(&strm);
-	return (limit == 0 ? Z_OK : (ret == Z_STREAM_END ? Z_OK : Z_DATA_ERROR));
+	return (ret == Z_STREAM_END ? Z_STREAM_END : (strm.avail_out == 0 ? Z_OK : Z_DATA_ERROR));
 }
 
 /* report a zlib or i/o error */
@@ -140,7 +163,8 @@ static unsigned int get_num(char *str)
 
 static void usage(void)
 {
-	fprintf(stderr, "Usage: fritz_cal_extract [-s seek offset] [-i skip] [-o output file] [-l limit] [infile] -e entry_id\n"
+	fprintf(stderr, "Usage: fritz_cal_extract -e entry_id [-s seek offset] [-l limit]\n"
+			"\t[-r reverse extracted data] [-i skip n bytes] [-o output file] [infile]\n"
 			"Finds and extracts zlib compressed calibration data in the EVA loader\n");
 	exit(EXIT_FAILURE);
 }
@@ -154,15 +178,18 @@ struct cal_entry {
 int main(int argc, char **argv)
 {
 	struct cal_entry cal = { .len = 0 };
+	unsigned char *buf = NULL;
 	FILE *in = stdin;
 	FILE *out = stdout;
+	size_t datasize = DEFAULT_BUFFERSIZE;
 	size_t limit = 0, skip = 0;
 	int initial_offset = 0;
 	int entry = -1;
+	bool reversed = false, limit_was_set = true;
 	int ret;
 	int opt;
 
-	while ((opt = getopt(argc, argv, "s:e:o:l:i:")) != -1) {
+	while ((opt = getopt(argc, argv, "s:e:o:l:i:r")) != -1) {
 		switch (opt) {
 		case 's':
 			initial_offset = (int)get_num(optarg);
@@ -199,6 +226,9 @@ int main(int argc, char **argv)
 				goto out_bad;
 			}
 			break;
+		case 'r':
+			reversed = true;
+			break;
 		default: /* '?' */
 			usage();
 		}
@@ -243,11 +273,50 @@ int main(int argc, char **argv)
 		goto out_bad;
 	}
 
-	ret = inf(in, out, limit, skip);
-	if (ret == Z_OK)
-		goto out;
+	/* Set boundaries. Only keep default datasize if we need complete data
+	 * for reversal and didn't set a higher limit. */
+	if (!limit) {
+		limit_was_set = false;
+		limit = datasize - skip;
+	}
+	datasize = (reversed && datasize >= limit + skip) ? datasize : (limit + skip);
+
+	/* Create data buffer. */
+	buf = malloc(datasize);
+	assert(buf != NULL);
+
+	ret = inflate_to_buffer(in, buf, &datasize);
+
+	if ((reversed || !limit_was_set) && ret != Z_STREAM_END) { /* didn't read to stream end */
+		fprintf(stderr, "Failed: Data exceeds buffer size of %u. Refusing to reverse"
+				" or store incomplete data."
+				" Use a higher limit [-l] to increase buffer size.\n",
+				(unsigned int) datasize);
+		goto out_bad;
+	}
+
+	ret = (ret == Z_STREAM_END) ? Z_OK : ret; /* normalize return value */
+	if (ret != Z_OK) {
+		zerr(ret);
+		goto out_bad;
+	}
+
+	if (reversed)
+		buffer_reverse(buf, datasize - 1);
+
+	if (datasize <= skip) {
+		fprintf(stderr, "Failed to skip %u bytes, total data size is %u!\n", 
+				(unsigned int)skip, (unsigned int)datasize);
+		goto out_bad;
+	}
+
+	limit = MIN(limit, datasize - skip);
+	if (fwrite(&buf[skip], limit, 1, out) != 1 || ferror(out)) {
+		fprintf(stderr, "Failed to write data buffer to output file");
+		goto out_bad;
+	}
 
-	zerr(ret);
+	goto out;
 
 out_bad:
 	ret = EXIT_FAILURE;
@@ -257,5 +326,6 @@ out:
 		fclose(in);
 	if (out)
 		fclose(out);
+	free(buf);
 	return ret;
 }
diff --git a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
index 936181c693..cb3fef9168 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
+++ b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom
@@ -19,11 +19,14 @@ case "$FIRMWARE" in
 			avm,fritz3390)
 				caldata_extract_reverse "urlader" 0x2546 0x440
 				;;
-			avm,fritz7412|\
-			avm,fritz7430)
+			avm,fritz7412)
 				/usr/bin/fritz_cal_extract -i 1 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \
 				/usr/bin/fritz_cal_extract -i 1 -s 0x1e800 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader")
 				;;
+			avm,fritz7430)
+				/usr/bin/fritz_cal_extract -r -i 4 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \
+				/usr/bin/fritz_cal_extract -r -i 4 -s 0x1e800 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader")
+				;;
 			bt,homehub-v5a)
 				caldata_extract_ubi "caldata" 0x1000 0x1000
 				ath9k_patch_mac_crc $(macaddr_add $(mtd_get_mac_binary_ubi caldata 0x110c) 2) 0x10c



From lede-commits at lists.infradead.org  Mon Jan 20 08:22:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 11:22:27 -0500
Subject: [openwrt/openwrt]  kernel: fix rootfs initramfs not updating on
 subsequent single build
In-Reply-To: <173739014782.4106828.5042517469133143645@git-01.infra.openwrt.org>
References: <173739014782.4106828.5042517469133143645@git-01.infra.openwrt.org>
Message-ID: <mailman.43320.1737390152.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/334c649a8d9b191c0282f9104b3997b090628f56

commit 334c649a8d9b191c0282f9104b3997b090628f56
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 20 17:14:47 2025 +0100

    kernel: fix rootfs initramfs not updating on subsequent single build
    
    There is currently a problem where the rootfs in an initramfs image for
    single target build is not updated on subsequent run. This is caused by
    a bug introduced in d78dec3e19e3 ("kernel: copy kernel build dir on
    Per-Device Initramfs compilation") where the initramfs_data.cpio rm was
    moved to PrepareConfigPerRootfs. This caused the side effect of dropping
    the rm call for single target build making the kernel reusing the
    previous generated initramfs_data.cpio.
    
    To correctly handle this, restore the original location of this call
    right after the touch /init call. This way the kernel will always
    regenerate the initramfs embedded rootfs ALSO for single target build.
    
    Fixes: d78dec3e19e3 ("kernel: copy kernel build dir on Per-Device Initramfs compilation")
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 include/kernel-defaults.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
index f94ed33230..cbe415abe6 100644
--- a/include/kernel-defaults.mk
+++ b/include/kernel-defaults.mk
@@ -175,7 +175,6 @@ define Kernel/PrepareConfigPerRootfs
 		[ ! -d "$(1)" ] || rm -rf $(1); \
 		mkdir $(1) && $(CP) -T $(LINUX_DIR) $(1); \
 		touch $(1)/.config; \
-		rm -rf $(1)/usr/initramfs_data.cpio*; \
 	}
 endef
 
@@ -190,6 +189,7 @@ define Kernel/CompileImage/Initramfs
 		$(call Kernel/Configure/Initramfs,$(if $(1),$(1),$(TARGET_DIR)),$(LINUX_DIR)$(2)); \
 		$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(if $(1),$(1),$(TARGET_DIR))/init; \
 		$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(if $(1),$(1),$(TARGET_DIR)) $(if $(1),$(1),$(TARGET_DIR))/init;) \
+		rm -rf $(LINUX_DIR)$(2)/usr/initramfs_data.cpio*; \
 		$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE), \
 			$(call locked,{ \
 				$(if $(call qstrip,$(CONFIG_EXTERNAL_CPIO)), \



From lede-commits at lists.infradead.org  Mon Jan 20 08:23:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 11:23:04 -0500
Subject: [openwrt/openwrt]  kernel: fix rootfs initramfs not updating on
 subsequent single build
In-Reply-To: <173739018438.4108150.16913866335075777516@git-01.infra.openwrt.org>
References: <173739018438.4108150.16913866335075777516@git-01.infra.openwrt.org>
Message-ID: <mailman.43321.1737390188.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/96ff9c3353b70f2b025a6fedb32bd99e458cff05

commit 96ff9c3353b70f2b025a6fedb32bd99e458cff05
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 20 17:14:47 2025 +0100

    kernel: fix rootfs initramfs not updating on subsequent single build
    
    There is currently a problem where the rootfs in an initramfs image for
    single target build is not updated on subsequent run. This is caused by
    a bug introduced in d78dec3e19e3 ("kernel: copy kernel build dir on
    Per-Device Initramfs compilation") where the initramfs_data.cpio rm was
    moved to PrepareConfigPerRootfs. This caused the side effect of dropping
    the rm call for single target build making the kernel reusing the
    previous generated initramfs_data.cpio.
    
    To correctly handle this, restore the original location of this call
    right after the touch /init call. This way the kernel will always
    regenerate the initramfs embedded rootfs ALSO for single target build.
    
    Fixes: d78dec3e19e3 ("kernel: copy kernel build dir on Per-Device Initramfs compilation")
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 334c649a8d9b191c0282f9104b3997b090628f56)
---
 include/kernel-defaults.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
index f94ed33230..cbe415abe6 100644
--- a/include/kernel-defaults.mk
+++ b/include/kernel-defaults.mk
@@ -175,7 +175,6 @@ define Kernel/PrepareConfigPerRootfs
 		[ ! -d "$(1)" ] || rm -rf $(1); \
 		mkdir $(1) && $(CP) -T $(LINUX_DIR) $(1); \
 		touch $(1)/.config; \
-		rm -rf $(1)/usr/initramfs_data.cpio*; \
 	}
 endef
 
@@ -190,6 +189,7 @@ define Kernel/CompileImage/Initramfs
 		$(call Kernel/Configure/Initramfs,$(if $(1),$(1),$(TARGET_DIR)),$(LINUX_DIR)$(2)); \
 		$(CP) $(GENERIC_PLATFORM_DIR)/other-files/init $(if $(1),$(1),$(TARGET_DIR))/init; \
 		$(if $(SOURCE_DATE_EPOCH),touch -hcd "@$(SOURCE_DATE_EPOCH)" $(if $(1),$(1),$(TARGET_DIR)) $(if $(1),$(1),$(TARGET_DIR))/init;) \
+		rm -rf $(LINUX_DIR)$(2)/usr/initramfs_data.cpio*; \
 		$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE), \
 			$(call locked,{ \
 				$(if $(call qstrip,$(CONFIG_EXTERNAL_CPIO)), \



From lede-commits at lists.infradead.org  Mon Jan 20 13:05:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:05:03 -0500
Subject: [openwrt/openwrt]  ath79: zte-mf28x-common: fix initramfs execution
In-Reply-To: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
References: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
Message-ID: <mailman.43409.1737407104.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/baa0fc8e042969afa575c4fd4fd4ce9bac8cd96f

commit baa0fc8e042969afa575c4fd4fd4ce9bac8cd96f
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Wed Nov 20 03:45:46 2024 +0100

    ath79: zte-mf28x-common: fix initramfs execution
    
    Now that LZMA_TEXT_START is configurable per-target once again,
    move the target above 32MB boundary for ZTE MF28* devices.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17616
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 32c6b9064ac7fc62cead37b1bc7d46ffba598c71)
---
 target/linux/ath79/image/nand.mk | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk
index d3c1120aa2..e8494da15d 100644
--- a/target/linux/ath79/image/nand.mk
+++ b/target/linux/ath79/image/nand.mk
@@ -442,6 +442,10 @@ define Device/zte_mf28x_common
   DEVICE_PACKAGES := kmod-usb2 kmod-ath10k-ct
   BLOCKSIZE := 128k
   PAGESIZE := 2048
+  LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
+  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
+  KERNEL_INITRAMFS := $$(KERNEL)
   KERNEL_SIZE := 4096k
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
 endef



From lede-commits at lists.infradead.org  Mon Jan 20 13:05:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:05:02 -0500
Subject: [openwrt/openwrt]  ath79: lzma-loader: expose LZMA_TEXT_ADDRESS
 configuration again
In-Reply-To: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
References: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
Message-ID: <mailman.43410.1737407104.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/eb82b2cbcb1bd351ec83dd8ca0f36d4dcb138095

commit eb82b2cbcb1bd351ec83dd8ca0f36d4dcb138095
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Wed Nov 20 03:45:21 2024 +0100

    ath79: lzma-loader: expose LZMA_TEXT_ADDRESS configuration again
    
    initramfs for some devices grew so big, that it can't be loaded within
    the previous 32MB RAM limit. Make the LZMA_TEXT_ADDRESS configurable
    per-target once again, to fix it for bigger devices, while maintaining
    compatibility with previous ones.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17616
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 6720958659d226e71dca49657202e0502bb059bd)
---
 target/linux/ath79/image/Makefile | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/linux/ath79/image/Makefile b/target/linux/ath79/image/Makefile
index 5647200b4b..1918a8a431 100644
--- a/target/linux/ath79/image/Makefile
+++ b/target/linux/ath79/image/Makefile
@@ -4,7 +4,7 @@ include $(INCLUDE_DIR)/image.mk
 KERNEL_LOADADDR = 0x80060000
 
 DEVICE_VARS += LOADER_FLASH_OFFS LOADER_TYPE
-DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC
+DEVICE_VARS += LOADER_FLASH_MAX LOADER_KERNEL_MAGIC LZMA_TEXT_START
 DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID
 DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
 DEVICE_VARS += SEAMA_SIGNATURE SEAMA_MTDBLOCK
@@ -14,6 +14,7 @@ define Build/loader-common
 	$(MAKE) -C lzma-loader \
 		PKG_BUILD_DIR="$@.src" \
 		TARGET_DIR="$(dir $@)" LOADER_NAME="$(notdir $@)" \
+		LZMA_TEXT_START=$(LZMA_TEXT_START) \
 		$(1) compile loader.$(LOADER_TYPE)
 	mv "$@.$(LOADER_TYPE)" "$@"
 	rm -rf $@.src
@@ -74,6 +75,7 @@ define Device/Default
   LOADER_FLASH_MAX :=
   LOADER_FLASH_OFFS :=
   LOADER_TYPE :=
+  LZMA_TEXT_START := 0x81800000
   COMPILE :=
   IMAGES := sysupgrade.bin
   IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \



From lede-commits at lists.infradead.org  Mon Jan 20 13:05:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:05:04 -0500
Subject: [openwrt/openwrt]  mediatek-filogic: fix wax220 wifi leds
In-Reply-To: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
References: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
Message-ID: <mailman.43411.1737407106.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/3f4c175851a5abb416f8d18eab20f98c014b8bf1

commit 3f4c175851a5abb416f8d18eab20f98c014b8bf1
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Thu Jan 16 09:29:55 2025 +0100

    mediatek-filogic: fix wax220 wifi leds
    
    The WAX220 does have a 2.4GHz and 5GHz wifi led, which was set to trigger on netdev before.
    This commit changes this to trigger on activity of the respective radio
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17627
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 99431e315039d7f9689b21a8aa220adadf52a886)
---
 target/linux/mediatek/dts/mt7986b-netgear-wax220.dts         | 2 ++
 target/linux/mediatek/filogic/base-files/etc/board.d/01_leds | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts b/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
index 6e51d88470..9537afba89 100644
--- a/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
+++ b/target/linux/mediatek/dts/mt7986b-netgear-wax220.dts
@@ -67,6 +67,7 @@
 		wlan2g_blue {
 			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
 			label = "blue:wlan2g";
+			linux,default-trigger = "phy0tpt";
 		};
 
 		lan_green {
@@ -84,6 +85,7 @@
 		wlan5g_blue {
 			gpios = <&pio 2 GPIO_ACTIVE_LOW>;
 			label = "blue:wlan5g";
+			linux,default-trigger = "phy1tpt";
 		};
 	};
 };
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index 168909cf90..5048e9bb8f 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -58,8 +58,6 @@ mercusys,mr90x-v1-ubi)
 	;;
 netgear,wax220)
 	ucidef_set_led_netdev "eth0" "LAN" "green:lan" "eth0"
-	ucidef_set_led_netdev "wlan2g" "WLAN2G" "blue:wlan2g" "phy0-ap0"
-	ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan5g" "phy1-ap0"
 	;;
 nokia,ea0326gmp)
 	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1" "link"



From lede-commits at lists.infradead.org  Mon Jan 20 13:05:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:05:01 -0500
Subject: [openwrt/openwrt]  mediatek: EX5601-T0 add Zyxel EX5601-T1 and T-56
 alias
In-Reply-To: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
References: <173740710100.328555.1453762814640200477@git-01.infra.openwrt.org>
Message-ID: <mailman.43412.1737407106.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/40115d519cd226889c7ec01d261ac87ccafe6b75

commit 40115d519cd226889c7ec01d261ac87ccafe6b75
Author: Aleksander Jan Bajkowski <olek2 at wp.pl>
AuthorDate: Wed Jan 15 19:21:24 2025 +0100

    mediatek: EX5601-T0 add Zyxel EX5601-T1 and T-56 alias
    
    Define EX5601-T1 and T-56 as alternative name, to explicitly show
    the device is supported using existing image. EX5601-T1 does not
    have the option to switch between WAN/SFP port. The switch port
    is hardwired to the WAN port. The Zyxel T-56 is the odido-branded
    version of the EX5601-T1.
    
    Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Link: https://github.com/openwrt/openwrt/pull/17615
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 3d63a41ffab69cb6f49c14cff99c3c3a84899363)
---
 target/linux/mediatek/image/filogic.mk | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index d8d35954b0..135a954400 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -1628,6 +1628,10 @@ TARGET_DEVICES += zbtlink_zbt-z8103ax
 define Device/zyxel_ex5601-t0-stock
   DEVICE_VENDOR := Zyxel
   DEVICE_MODEL := EX5601-T0
+  DEVICE_ALT0_VENDOR := Zyxel
+  DEVICE_ALT0_MODEL := EX5601-T1
+  DEVICE_ALT1_VENDOR := Zyxel
+  DEVICE_ALT1_MODEL := T-56
   DEVICE_VARIANT := (stock layout)
   DEVICE_DTS := mt7986a-zyxel-ex5601-t0-stock
   DEVICE_DTS_DIR := ../dts
@@ -1651,6 +1655,10 @@ TARGET_DEVICES += zyxel_ex5601-t0-stock
 define Device/zyxel_ex5601-t0-ubootmod
   DEVICE_VENDOR := Zyxel
   DEVICE_MODEL := EX5601-T0
+  DEVICE_ALT0_VENDOR := Zyxel
+  DEVICE_ALT0_MODEL := EX5601-T1
+  DEVICE_ALT1_VENDOR := Zyxel
+  DEVICE_ALT1_MODEL := T-56
   DEVICE_VARIANT := (OpenWrt U-Boot layout)
   DEVICE_DTS := mt7986a-zyxel-ex5601-t0-ubootmod
   DEVICE_DTS_DIR := ../dts



From lede-commits at lists.infradead.org  Mon Jan 20 13:17:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:17:34 -0500
Subject: [openwrt/openwrt]  uci: update to Git HEAD (2025-01-20)
In-Reply-To: <173740785443.340451.10151670293990500468@git-01.infra.openwrt.org>
References: <173740785443.340451.10151670293990500468@git-01.infra.openwrt.org>
Message-ID: <mailman.43415.1737407857.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e046f8c318618162fcdd768c4a9eadd53c239629

commit e046f8c318618162fcdd768c4a9eadd53c239629
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Jan 20 22:16:37 2025 +0100

    uci: update to Git HEAD (2025-01-20)
    
    047b2efc1348 CMakeLists.txt: bump minimum cmake version
    16ff0badbde7 CMakeLists: add support for including ABIVERSION in the library version number
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/system/uci/Makefile | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile
index a253b43938..6e4d8da97c 100644
--- a/package/system/uci/Makefile
+++ b/package/system/uci/Makefile
@@ -13,9 +13,10 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-17
-PKG_SOURCE_VERSION:=fb3c2343b17b759b175f11aec5b3fbb1cf48bbc3
-PKG_MIRROR_HASH:=c9302f4a1cb400134cb9fc0622fb6a04bbe8c55bcc83ec454caadb1e62f3257e
+PKG_SOURCE_DATE:=2025-01-20
+PKG_SOURCE_VERSION:=16ff0badbde7e17ec3bd1f827ffe45922956cf86
+PKG_MIRROR_HASH:=e91ee4a2c0baaafe1d8ccd5321de70a8412a50323b0b27bbc7ad145e77018a22
+PKG_ABI_VERSION:=20250120
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
@@ -33,7 +34,7 @@ define Package/libuci
   CATEGORY:=Libraries
   TITLE:=C library for the Unified Configuration Interface (UCI)
   DEPENDS:=+libubox
-  ABI_VERSION:=20250117
+  ABI_VERSION:=$(PKG_ABI_VERSION)
 endef
 
 define Package/uci
@@ -55,11 +56,12 @@ TARGET_LDFLAGS += -L$(STAGING_DIR)/usr/lib
 
 CMAKE_OPTIONS += \
 	-DLUAPATH=/usr/lib/lua \
+	-DABIVERSION=$(PKG_ABI_VERSION) \
 	$(if $(DEBUG),-DUCI_DEBUG=ON)
 
 define Package/libuci/install
 	$(INSTALL_DIR) $(1)/lib
-	$(CP) $(PKG_BUILD_DIR)/libuci.so* $(1)/lib/
+	$(CP) $(PKG_BUILD_DIR)/libuci.so.* $(1)/lib/
 endef
 
 define Package/libuci-lua/install



From lede-commits at lists.infradead.org  Mon Jan 20 13:18:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 16:18:01 -0500
Subject: [openwrt/openwrt]  uci: update to Git HEAD (2025-01-20)
In-Reply-To: <173740788113.341122.14510637474957063614@git-01.infra.openwrt.org>
References: <173740788113.341122.14510637474957063614@git-01.infra.openwrt.org>
Message-ID: <mailman.43416.1737407884.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f9df8a90c8a44814df78e25bbda254a79f9d3785

commit f9df8a90c8a44814df78e25bbda254a79f9d3785
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Jan 20 22:16:37 2025 +0100

    uci: update to Git HEAD (2025-01-20)
    
    047b2efc1348 CMakeLists.txt: bump minimum cmake version
    16ff0badbde7 CMakeLists: add support for including ABIVERSION in the library version number
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit e046f8c318618162fcdd768c4a9eadd53c239629)
---
 package/system/uci/Makefile | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile
index a253b43938..6e4d8da97c 100644
--- a/package/system/uci/Makefile
+++ b/package/system/uci/Makefile
@@ -13,9 +13,10 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-17
-PKG_SOURCE_VERSION:=fb3c2343b17b759b175f11aec5b3fbb1cf48bbc3
-PKG_MIRROR_HASH:=c9302f4a1cb400134cb9fc0622fb6a04bbe8c55bcc83ec454caadb1e62f3257e
+PKG_SOURCE_DATE:=2025-01-20
+PKG_SOURCE_VERSION:=16ff0badbde7e17ec3bd1f827ffe45922956cf86
+PKG_MIRROR_HASH:=e91ee4a2c0baaafe1d8ccd5321de70a8412a50323b0b27bbc7ad145e77018a22
+PKG_ABI_VERSION:=20250120
 
 PKG_LICENSE:=LGPL-2.1
 PKG_LICENSE_FILES:=
@@ -33,7 +34,7 @@ define Package/libuci
   CATEGORY:=Libraries
   TITLE:=C library for the Unified Configuration Interface (UCI)
   DEPENDS:=+libubox
-  ABI_VERSION:=20250117
+  ABI_VERSION:=$(PKG_ABI_VERSION)
 endef
 
 define Package/uci
@@ -55,11 +56,12 @@ TARGET_LDFLAGS += -L$(STAGING_DIR)/usr/lib
 
 CMAKE_OPTIONS += \
 	-DLUAPATH=/usr/lib/lua \
+	-DABIVERSION=$(PKG_ABI_VERSION) \
 	$(if $(DEBUG),-DUCI_DEBUG=ON)
 
 define Package/libuci/install
 	$(INSTALL_DIR) $(1)/lib
-	$(CP) $(PKG_BUILD_DIR)/libuci.so* $(1)/lib/
+	$(CP) $(PKG_BUILD_DIR)/libuci.so.* $(1)/lib/
 endef
 
 define Package/libuci-lua/install



From lede-commits at lists.infradead.org  Mon Jan 20 14:04:07 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 17:04:07 -0500
Subject: [openwrt/openwrt]  d1: Use correct module for devices with wifi
In-Reply-To: <173741064701.385185.3060419829193565047@git-01.infra.openwrt.org>
References: <173741064701.385185.3060419829193565047@git-01.infra.openwrt.org>
Message-ID: <mailman.43425.1737410651.1089.lede-commits@lists.infradead.org>

wigyori pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6c628bfddcfe2f0e2cf5c367cfbaba1a434116bf

commit 6c628bfddcfe2f0e2cf5c367cfbaba1a434116bf
Author: Raylynn Knight <rayknight at me.com>
AuthorDate: Sat Jan 11 00:19:59 2025 -0500

    d1: Use correct module for devices with wifi
    
    Devices with wifi (LicheePi RV and MangoPi MQ Pro) were using the
    wrong module.  Also wpad was missing to enable using the WiFi.
    
    Signed-off-by: Raylynn Knight <rayknight at me.com>
    Link: https://github.com/openwrt/openwrt/pull/17576
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    Signed-off-by: Zoltan HERPAI <wigyori at uid0.hu>
    (cherry picked from commit 8a17bae722a62954269f29dc48025e88c919dc24)
---
 target/linux/d1/base-files/etc/board.d/02_network | 4 ++++
 target/linux/d1/image/Makefile                    | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/target/linux/d1/base-files/etc/board.d/02_network b/target/linux/d1/base-files/etc/board.d/02_network
index df48b431af..dc61e4bde5 100644
--- a/target/linux/d1/base-files/etc/board.d/02_network
+++ b/target/linux/d1/base-files/etc/board.d/02_network
@@ -8,6 +8,10 @@
 board_config_update
 
 case "$(board_name)" in
+sipeed,lichee-rv-dock |\
+widora,mangopi-mq-pro)
+	ucidef_set_interface_lan "wlan0"
+	;;
 *)
 	ucidef_set_interface_lan 'eth0'
 	;;
diff --git a/target/linux/d1/image/Makefile b/target/linux/d1/image/Makefile
index 8dca2fb1cb..ea41e65c76 100644
--- a/target/linux/d1/image/Makefile
+++ b/target/linux/d1/image/Makefile
@@ -65,7 +65,7 @@ define Device/sipeed_lichee-rv-dock
   DEVICE_MODEL := LicheePi RV (dock)
   DEVICE_DTS := allwinner/sun20i-d1-lichee-rv-dock
   SUPPORTED_DEVICES += lichee_rv_dock
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := lichee_rv_dock
 endef
 TARGET_DEVICES += sipeed_lichee-rv-dock
@@ -76,7 +76,7 @@ define Device/widora_mangopi-mq-pro
   DEVICE_MODEL := MQ Pro
   DEVICE_DTS := allwinner/sun20i-d1-mangopi-mq-pro
   SUPPORTED_DEVICES += mangopi_mq_pro
-  DEVICE_PACKAGES += kmod-rtl8723bs
+  DEVICE_PACKAGES += kmod-rtw88-8723ds wpad-basic-mbedtls
   UBOOT := mangopi_mq_pro
 endef
 TARGET_DEVICES += widora_mangopi-mq-pro



From lede-commits at lists.infradead.org  Mon Jan 20 14:54:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 17:54:47 -0500
Subject: [openwrt/openwrt]  lldpd: reset PKG_RELEASE
In-Reply-To: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
References: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
Message-ID: <mailman.43434.1737413690.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/dc81243e87fd305959ca25fa78e3a11b8ebfc0bc

commit dc81243e87fd305959ca25fa78e3a11b8ebfc0bc
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Tue Jan 14 09:37:33 2025 +0100

    lldpd: reset PKG_RELEASE
    
    lldpd was updated, so reset PKG_RELEASE after the PKG_VERSION update.
    
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit abbec429b40f149f9c5a99a64ee7bf4e804fbb7d)
---
 package/network/services/lldpd/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index b21ca76c5e..6be9723a9b 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
 PKG_VERSION:=1.0.18
-PKG_RELEASE:=5
+PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/



From lede-commits at lists.infradead.org  Mon Jan 20 14:54:48 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 17:54:48 -0500
Subject: [openwrt/openwrt]  lldpd: fix config for build without LLDP-MED
In-Reply-To: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
References: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
Message-ID: <mailman.43435.1737413692.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c8c1156e9dda1b72d525d442d76d819737b79d87

commit c8c1156e9dda1b72d525d442d76d819737b79d87
Author: Sebastian Pflieger <sebastian at pflieger.email>
AuthorDate: Thu Jan 9 18:10:38 2025 +0100

    lldpd: fix config for build without LLDP-MED
    
    The lldp_class and lldp_location config option are only valid when
    compiled with LLDP-MED support. If not they will cause lldpd not to
    start.
    
    Signed-off-by: Sebastian Pflieger <sebastian at pflieger.email>
    Link: https://github.com/openwrt/openwrt/pull/17571
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 2c22d7c3a4a7edcce1af656c8cddb1ab163e3d02)
---
 package/network/services/lldpd/Makefile         | 4 +++-
 package/network/services/lldpd/files/lldpd.init | 4 ++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index 6be9723a9b..3fbd0bf4f9 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
 PKG_VERSION:=1.0.18
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
@@ -90,6 +90,8 @@ endif
 ifneq ($(CONFIG_LLDPD_WITH_LLDPMED),y)
 	sed -i -e 's/CONFIG_LLDPD_WITH_LLDPMED=y/CONFIG_LLDPD_WITH_LLDPMED=n/g' $(1)/etc/init.d/lldpd
 	sed -i -e '/agentxsocket/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_class/d' $(1)/etc/config/lldpd
+	sed -i -e '/lldp_location/d' $(1)/etc/config/lldpd
 endif
 endef
 
diff --git a/package/network/services/lldpd/files/lldpd.init b/package/network/services/lldpd/files/lldpd.init
index 3922b676b5..6c1c184bfa 100644
--- a/package/network/services/lldpd/files/lldpd.init
+++ b/package/network/services/lldpd/files/lldpd.init
@@ -39,7 +39,6 @@ get_config_restart_hash() {
 
 	config_load 'lldpd'
 
-	config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then
 		config_get      v 'config' 'agentxsocket'; append _string "$v" ","
 	fi
@@ -49,6 +48,7 @@ get_config_restart_hash() {
 	config_get_bool v 'config' 'lldp_no_version'; append _string "$v" ","
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool v 'config' 'lldpmed_no_inventory'; append _string "$v" ","
+		config_get      v 'config' 'lldp_class'; append _string "$v" ","
 	fi
 	config_get_bool v 'config' 'enable_lldp' 1; append _string "$v" ","
 	config_get_bool v 'config' 'force_lldp'; append _string "$v" ","
@@ -243,10 +243,10 @@ start_service() {
 		config_get_bool enable_edp 'config' 'enable_edp' 0
 		config_get_bool force_edp 'config' 'force_edp' 0
 	fi
-	config_get lldp_class 'config' 'lldp_class'
 	config_get_bool lldp_no_version 'config' 'lldp_no_version' 0
 	if [ "$CONFIG_LLDPD_WITH_LLDPMED" = "y" ]; then
 		config_get_bool lldpmed_no_inventory 'config' 'lldpmed_no_inventory' 0
+		config_get lldp_class 'config' 'lldp_class'
 	fi
 	config_get_bool readonly_mode 'config' 'readonly_mode' 0
 	if [ "$CONFIG_LLDPD_WITH_SNMP" = "y" ]; then



From lede-commits at lists.infradead.org  Mon Jan 20 14:54:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 17:54:46 -0500
Subject: [openwrt/openwrt]  lldpd: bump version to 1.0.18
In-Reply-To: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
References: <173741368621.450656.7889006969035169012@git-01.infra.openwrt.org>
Message-ID: <mailman.43436.1737413696.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/592e56c0649fc138b844c40aadeda7e856b060d4

commit 592e56c0649fc138b844c40aadeda7e856b060d4
Author: Sebastian Pflieger <sebastian at pflieger.email>
AuthorDate: Thu Jan 9 18:16:04 2025 +0100

    lldpd: bump version to 1.0.18
    
    Changes (breaking):
    - Remove support for building 802.3bt TLVs (broken).
    
    Fix:
    - Fix memory leaks in EDP/FDP decoding when receiving some TLVs twice.
    - Do not set interface description continuously.
    - Use a different Netlink socket for changes and queries.
    
    Signed-off-by: Sebastian Pflieger <sebastian at pflieger.email>
    Link: https://github.com/openwrt/openwrt/pull/17570
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit a18385041eaeaf6d98ab79a30ce5fba4e712b765)
---
 package/network/services/lldpd/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile
index f34cd28faa..b21ca76c5e 100644
--- a/package/network/services/lldpd/Makefile
+++ b/package/network/services/lldpd/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=lldpd
-PKG_VERSION:=1.0.17
+PKG_VERSION:=1.0.18
 PKG_RELEASE:=5
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/
-PKG_HASH:=89ae691a4917ac9e0ec3b8b2c1e634cc402d43b804f98850c73bd1c7df380882
+PKG_HASH:=38cd319aa02ab61d9a2ad130e22f906795ccca9ac73a0a0d9dac19ca99a8a870
 
 PKG_MAINTAINER:=Stijn Tintel <stijn at linux-ipv6.be>
 PKG_LICENSE:=ISC



From lede-commits at lists.infradead.org  Mon Jan 20 15:07:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:07:08 -0500
Subject: [openwrt/openwrt]  ath79: add support for Ruckus R500
In-Reply-To: <173741442809.464602.12283608713647583257@git-01.infra.openwrt.org>
References: <173741442809.464602.12283608713647583257@git-01.infra.openwrt.org>
Message-ID: <mailman.43439.1737414436.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ca7324134dd4fa49266c1917dc18aeb19d95077f

commit ca7324134dd4fa49266c1917dc18aeb19d95077f
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Thu Jan 9 21:40:03 2025 +0100

    ath79: add support for Ruckus R500
    
    Ruckus R500 datasheet: https://webresources.ruckuswireless.com/datasheets/r500/ds-ruckus-r500.html
    
    Specifications:
    
    SoC: 720Mhz QCA9558
    RAM: 256MB
    Storage: 64MB of FLASH (SPI NOR - S25FL512S)
    1x AR8327 GB switch
    Ethernet: 1x1000M port #3 on AR8327,
              1x1000M (802.3at POE), port #5 on AR8327
    Wireless: QCA988X HW2.0 802.11ac
    AR9550 2.4GHz 802.11b/g/n
    5x GPIO LED
    1x GPIO Reset Button
    1x DC Jack 12v
    1x UART, 3.3v, 115200
    1x TPM, SLB9645TT12
    2x Beamforming antennas configured via 74LV164
    
    MAC addresses:
     1. art 0x807E | Factory bridged | f0:3e:90:XX:XX:80 |
     2. art 0x66   | eth0            | f0:3e:90:XX:XX:83 | (port 5, cpu port 6) - PoE port
     3. art 0x6c   | eth1            | f0:3e:90:XX:XX:84 | (port 3, cpu port 0) - non PoE port
    
    Serial console: 115200-8-N-1 on internal H4 header.
    Pinout:
    
    H1
    -----------
    |1|x|3|4|5|
    -----------
    
    Pin 1 is near the "H4" marking.
    1 - RX
    x - no pin
    3 - VCC (3.3V)
    4 - GND
    5 - TX
    
    JTAG: Connector H2, similar to MIPS eJTAG, standard, unpoulated.
    
    H9
    ----------------------
    |2 |4 |6 |8 |10|12|14|
    ----------------------
    |1 |3 |5 |7 |9 |11|13|
    ----------------------
    
    3 - TDI
    5 - TDO
    7 - TMS
    9 - TCK
    2,4,6,8,10 - GND
    14 - Vref
    1,11,12,13 - Not connected
    
    I?C: connector H2, near power LED, unpopulated:
    
    ------
    |1|2|3
    ------
        H2
    
    1 - SCL
    2 - SDA
    3 - GND
    
    Installation:
    
    Serial Port/TFTP
    
    1. Setup tftp server on the local network
    2. Connect to UART with TTL
    3. Interupt U-boot process with Ctrl-C
    4. Setup appropriate ipaddr and serverip in setenv:
      - setenv ipaddr 192.168.1.1
      - setenv serverip 192.168.1.2
    5. On TFTP Server - copy openwrt-ath79-generic-ruckus_r500-initramfs-kernel.bin to /srv/tftp
    6. On R500 boot into initrd image
      - tftpboot 0x81000000 openwrt-ath79-generic-ruckus_r500-initramfs-kernel.bin
      - bootm 0x81000000
    7. On TFTP server - scp -O openwrt-ath79-generic-ruckus_r500-squashfs-sysupgrade.bin root at 192.168.1.1:/tmp
    8. Ensure the boot command is set before flashing the image:
        fw_setenv bootcmd 'bootm 0xbf1c0000'
    9. On R500 - sysupgrade /tmp/openwrt-ath79-generic-ruckus_r500-squashfs-sysupgrade.bin
    10. If not done in 8; set boot command from U-boot shell itself:
      - setenv bootcmd bootm 0xbf1c0000
      - saveenv
      - reset
    
    This patch adapted from https://github.com/victhor393/openwrt-ruckus-r500/tree/ruckus-r500-master
    
    Signed-off-by: Damien Mascord <tusker at tusker.org>
    
    - Heavily refactored the device tree
    - Extended commit message
    - Documented onboad connectors
    - Refactored MAC and calibration data setups to use nvmem-layout
    - Made both network interfaces LAN ports and bridge them, this makes
      more sense for an access point and is consistent with the rest of
      Ruckus APs.
    - Enable lzma-loader for compressed initramfs
    - Enabled the optional internal USB port
    - Added missing LEDs and according pinctrl settings
    - Added reserved memory region used for bootloader communication
    - Added the bit-banged I?C bus and onboard TPM
    - Refactored boot scheme and flash layout to match earlier Ruckus
      devices and maximize usable space for user data.
    
    Quirks:
    - H7 is the physical presence switch for the SLB9645TT12 TPM.
    
    TODO:
    - Link state reporting on the Ethernet ports doesn't work and both ports
      report "up" due to limitation of swconfig ar8327 driver. With DSA
      conversion, this shall be rectified.
    - Locate 2nd shift register (U7) controlling beamforming antennas, probably
      on ath10k GPIOs which are currently unsupported in the driver. For
      this, there is a device tree node describing that - but explicitly
      disabled.
    - At the moment of adding support, there is an endianness bug in the TPM
      driver causing it to not detect the TPM module because of ID mismatch.
    
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17550
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ath79/dts/qca9557_ruckus_r500.dts     | 331 +++++++++++++++++++++
 .../generic/base-files/etc/board.d/02_network      |   5 +
 target/linux/ath79/image/generic.mk                |  11 +
 3 files changed, 347 insertions(+)

diff --git a/target/linux/ath79/dts/qca9557_ruckus_r500.dts b/target/linux/ath79/dts/qca9557_ruckus_r500.dts
new file mode 100644
index 0000000000..53495ac16d
--- /dev/null
+++ b/target/linux/ath79/dts/qca9557_ruckus_r500.dts
@@ -0,0 +1,331 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca955x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+	compatible = "ruckus,r500", "qca,qca9557";
+	model = "Ruckus R500";
+
+	aliases {
+		led-boot = &power_green;
+		led-failsafe = &power_red;
+		led-running = &power_green;
+		led-upgrade = &power_red;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&jtag_disable_pins &clks_disable_pins &enable_gpio_4>;
+
+		power_green: led-0 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		power_red: led-1 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			panic-indicator;
+		};
+
+		// DIR (Zone Director) LED - Indicates Zone director connection status
+		led-2 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = "dir";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+		};
+
+		// AIR (Signal/Air Quality) LED - Indicates uplink status and the quality of the wireless signal to the uplink AP
+		led-3 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = "air";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+		};
+
+		led-4 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1assoc";
+		};
+
+		led-5 {
+			color = <LED_COLOR_ID_YELLOW>;
+			function = LED_FUNCTION_WLAN_2GHZ;
+			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led-6 {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0assoc";
+		};
+
+		led-7 {
+			color = <LED_COLOR_ID_YELLOW>;
+			function = LED_FUNCTION_WLAN_5GHZ;
+			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RESTART>;
+			debounce-interval = <60>;
+		};
+
+	};
+
+	beamforming-2g-spi {
+		compatible = "spi-gpio";
+		mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		sck-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+		num-chipselects = <0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		beamforming-2g-gpio at 0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <1>;
+			spi-max-frequency = <24000000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	beamforming-5g-spi {
+		/*
+		 * ath10k driver doesn't expose GPIOs as of now,
+		 * so let's disable it for now. The shift register
+		 * for antenna pattern control is correctly initialized
+		 * for omnidirectional pattern correctly despite that,
+		 * there is just no possibility to control that from OpenWrt yet.
+		 */
+		status = "disabled";
+		compatible = "spi-gpio";
+		mosi-gpios = <&ath10k 15 GPIO_ACTIVE_HIGH>;
+		sck-gpios = <&ath10k 14 GPIO_ACTIVE_HIGH>;
+		num-chipselects = <0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		beamforming-5g-gpio at 0 {
+			compatible = "fairchild,74hc595";
+			reg = <0>;
+			registers-number = <1>;
+			spi-max-frequency = <24000000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+	};
+
+	i2c: i2c {
+		compatible = "i2c-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		scl-gpios = <&gpio 19 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+		sda-gpios = <&gpio 20 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+
+		tpm at 20 {
+			compatible = "infineon,slb9645tt", "tcg,tpm-tis-i2c";
+			reg = <0x20>;
+			crc-checksum;
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		ruckus-himem at fff0000 {
+			/* Ruckus Himem area used to control
+			 * redundant boot image selection
+			 */
+			compatible = "nvmem-rmem";
+			reg = <0xfff0000 0x10000>;
+			no-map;
+		};
+	};
+};
+
+&pinmux {
+	clks_disable_pins: pinmux_clks_disable_pins {
+		pinctrl-single,bits = <0x40 0x0 0x80>;
+	};
+
+	enable_gpio_4: pinctrl_enable_gpio_4 {
+		pinctrl-single,bits = <0x4 0x0 0xff>;
+	};
+};
+
+&spi {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				reg = <0x0000000 0x100000>;
+				label = "u-boot";
+				read-only;
+			};
+
+			partition at 100000 {
+				compatible = "u-boot,env";
+				reg = <0x0100000 0x40000>;
+				label = "u-boot-env";
+			};
+
+			board_data: partition at 140000 {
+				reg = <0x0140000 0x80000>;
+				label = "board-data";
+				read-only;
+			};
+
+			partition at 1c0000 {
+				reg = <0x01c0000 0x3e40000>;
+				compatible = "openwrt,uimage", "denx,uimage";
+				label = "firmware";
+			};
+		};
+	};
+};
+
+&mdio0 {
+	status = "okay";
+
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+
+		qca,ar8327-initvals = <
+		    0x04 0x00080080 /* PORT0 PAD MODE CTRL */
+		    0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
+		    0x7c 0x0000007e /* PORT0_STATUS */
+		    0x94 0x0000007e /* PORT6 STATUS */
+		>;
+	};
+};
+
+&eth0 {
+	status = "okay";
+
+	nvmem-cells = <&macaddr_board_data_66>;
+	nvmem-cell-names = "mac-address";
+	pll-data = <0x96000000 0x00000101 0x00001616>;
+
+	phy-handle = <&phy0>;
+};
+
+&eth1 {
+	status = "okay";
+
+	nvmem-cells = <&macaddr_board_data_6c>;
+	nvmem-cell-names = "mac-address";
+	pll-data = <0x03000101 0x00000101 0x00001616>;
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+	};
+};
+
+&pcie0 {
+	status = "okay";
+
+	ath10k: wifi at 0,0 {
+		compatible = "pci168c,003c";
+		reg = <0x0000 0 0 0 0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		nvmem-cells = <&macaddr_board_data_76>, <&cal_board_data_45000>;
+		nvmem-cell-names = "mac-address", "calibration";
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	nvmem-cells = <&macaddr_board_data_60>, <&cal_board_data_41000>;
+	nvmem-cell-names = "mac-address", "calibration";
+};
+
+&usb_phy0 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb_phy1 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&board_data {
+	nvmem-layout {
+		compatible = "fixed-layout";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		macaddr_board_data_60: macaddr at 60 {
+			reg = <0x60 0x6>;
+		};
+
+		macaddr_board_data_66: macaddr at 66 {
+			reg = <0x66 0x6>;
+		};
+
+		macaddr_board_data_6c: macaddr at 6c {
+			reg = <0x6c 0x6>;
+		};
+
+		macaddr_board_data_76: macaddr at 76 {
+			reg = <0x76 0x6>;
+		};
+
+		cal_board_data_41000: cal at 41000 {
+			reg = <0x41000 0x440>;
+		};
+
+		cal_board_data_45000: cal at 45000 {
+			reg = <0x45000 0x844>;
+		};
+	};
+};
diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network
index 0321a9ac85..9a9267c8c7 100644
--- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
@@ -505,6 +505,10 @@ ath79_setup_interfaces()
 		ucidef_add_switch "switch0" \
 			"0u at eth1" "4:lan:1" "3:lan:2" "2:lan:3" "1:lan:4"
 		;;
+	ruckus,r500)
+		ucidef_add_switch "switch0" \
+			"6u at eth0" "5:lan:1" "3:lan:2" "0 at eth1"
+		;;
 	teltonika,rut955|\
 	teltonika,rut955-h7v3c0)
 		ucidef_set_interface_wan "eth1"
@@ -813,6 +817,7 @@ ath79_setup_macs()
 		wan_mac=$(mtd_get_mac_binary factory 0x0)
 		lan_mac=$(macaddr_setbit_la "$wan_mac")
 		;;
+	ruckus,r500|\
 	ruckus,zf7025|\
 	ruckus,zf7321|\
 	ruckus,zf7341|\
diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk
index b15b8b0efe..f9547e9567 100644
--- a/target/linux/ath79/image/generic.mk
+++ b/target/linux/ath79/image/generic.mk
@@ -2941,6 +2941,17 @@ define Device/ruckus_zf7372
 endef
 TARGET_DEVICES += ruckus_zf7372
 
+define Device/ruckus_r500
+  $(Device/ruckus_common)
+  SOC := qca9557
+  DEVICE_MODEL := R500
+  IMAGE_SIZE := 63744k
+  BLOCKSIZE := 256k
+  DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct \
+		     kmod-i2c-gpio kmod-tpm-i2c-infineon
+endef
+TARGET_DEVICES += ruckus_r500
+
 define Device/samsung_wam250
   SOC := ar9344
   DEVICE_VENDOR := Samsung



From lede-commits at lists.infradead.org  Mon Jan 20 15:10:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:10:51 -0500
Subject: [openwrt/openwrt]  kernel: add missing symbols for lxc
In-Reply-To: <173741465126.469716.880527231249955447@git-01.infra.openwrt.org>
References: <173741465126.469716.880527231249955447@git-01.infra.openwrt.org>
Message-ID: <mailman.43442.1737414657.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/65de1e0f78707695238382ace6a78695acbb8ed8

commit 65de1e0f78707695238382ace6a78695acbb8ed8
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 9 21:22:48 2025 -0500

    kernel: add missing symbols for lxc
    
    These symbols are needed to satisfy lxc dependencies.
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17553
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/kernel/linux/modules/netsupport.mk | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk
index 06ef823280..20f85c3173 100644
--- a/package/kernel/linux/modules/netsupport.mk
+++ b/package/kernel/linux/modules/netsupport.mk
@@ -1649,3 +1649,21 @@ define KernelPackage/qrtr-mhi/description
 endef
 
 $(eval $(call KernelPackage,qrtr-mhi))
+
+define KernelPackage/unix-diag
+  TITLE:=UNIX socket monitoring interface
+  KCONFIG:=CONFIG_UNIX_DIAG
+  FILES:= $(LINUX_DIR)/net/unix/unix_diag.ko
+  AUTOLOAD:=$(call AutoProbe,unix_diag)
+endef
+
+$(eval $(call KernelPackage,unix-diag))
+
+define KernelPackage/packet-diag
+  TITLE:=Packet sockets monitoring interface
+  KCONFIG:=CONFIG_PACKET_DIAG
+  FILES:= $(LINUX_DIR)/net/packet/af_packet_diag.ko
+  AUTOLOAD:=$(call AutoProbe,af_packet_diag)
+endef
+
+$(eval $(call KernelPackage,packet-diag))



From lede-commits at lists.infradead.org  Mon Jan 20 15:16:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:16:21 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: fb7430 set correct label-mac
In-Reply-To: <173741498100.477305.7136997216432024228@git-01.infra.openwrt.org>
References: <173741498100.477305.7136997216432024228@git-01.infra.openwrt.org>
Message-ID: <mailman.43445.1737414985.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f9813f41b2e9fccb644ae149eabe575fbae12fa3

commit f9813f41b2e9fccb644ae149eabe575fbae12fa3
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Wed Jan 15 21:31:47 2025 +0100

    lantiq: xrx200: fb7430 set correct label-mac
    
    the CWMP account mac is correctly set on the lan device but was not correctly as label-mac
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17618
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/lantiq/xrx200/base-files/etc/board.d/02_network | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
index 8c2cdb12af..bf90757897 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
+++ b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
@@ -125,6 +125,7 @@ lantiq_setup_macs()
 		tffsdev=$(find_mtd_chardev "nand-tffs")
 		lan_mac=$(/usr/bin/fritz_tffs_nand -d $tffsdev -n maca -o)
 		wan_mac=$(/usr/bin/fritz_tffs_nand -d $tffsdev -n macdsl -o)
+		label_mac=$lan_mac
 		;;
 	bt,homehub-v5a)
 		lan_mac=$(mtd_get_mac_binary_ubi caldata 0x110c)
@@ -142,6 +143,7 @@ lantiq_setup_macs()
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" "$lan_mac"
 	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" "$wan_mac"
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr "$label_mac"
 }
 
 board_config_update



From lede-commits at lists.infradead.org  Mon Jan 20 15:17:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:17:01 -0500
Subject: [openwrt/openwrt]  lantiq: xrx200: fb7430 set correct label-mac
In-Reply-To: <173741502104.479801.6555315533587348525@git-01.infra.openwrt.org>
References: <173741502104.479801.6555315533587348525@git-01.infra.openwrt.org>
Message-ID: <mailman.43446.1737415024.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/b957ee982ae1a38aeeeee44baf4c6e8d2c239978

commit b957ee982ae1a38aeeeee44baf4c6e8d2c239978
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Wed Jan 15 21:31:47 2025 +0100

    lantiq: xrx200: fb7430 set correct label-mac
    
    the CWMP account mac is correctly set on the lan device but was not correctly as label-mac
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17618
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit f9813f41b2e9fccb644ae149eabe575fbae12fa3)
---
 target/linux/lantiq/xrx200/base-files/etc/board.d/02_network | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
index 8c2cdb12af..bf90757897 100644
--- a/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
+++ b/target/linux/lantiq/xrx200/base-files/etc/board.d/02_network
@@ -125,6 +125,7 @@ lantiq_setup_macs()
 		tffsdev=$(find_mtd_chardev "nand-tffs")
 		lan_mac=$(/usr/bin/fritz_tffs_nand -d $tffsdev -n maca -o)
 		wan_mac=$(/usr/bin/fritz_tffs_nand -d $tffsdev -n macdsl -o)
+		label_mac=$lan_mac
 		;;
 	bt,homehub-v5a)
 		lan_mac=$(mtd_get_mac_binary_ubi caldata 0x110c)
@@ -142,6 +143,7 @@ lantiq_setup_macs()
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" "$lan_mac"
 	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" "$wan_mac"
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr "$label_mac"
 }
 
 board_config_update



From lede-commits at lists.infradead.org  Mon Jan 20 15:19:29 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:19:29 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.72
In-Reply-To: <173741516923.483110.13504791222801710302@git-01.infra.openwrt.org>
References: <173741516923.483110.13504791222801710302@git-01.infra.openwrt.org>
Message-ID: <mailman.43447.1737415173.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/1d021458fd681dc4c27615a574cc09cc57d1c51e

commit 1d021458fd681dc4c27615a574cc09cc57d1c51e
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Fri Jan 17 08:25:17 2025 -0500

    kernel: bump 6.6 to 6.6.72
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.72
    
    Dropped to due being superseded by upstream patch:
            mediatek/patches-6.6/870-drm-mediatek-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch[1]
    
    All other patches automatically rebased.
    
    1. https://github.com/gregkh/linux/commit/ac7f5641e9887354a0fc6f48190533af084bb0dc
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17646
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 include/kernel-6.6                                 |  4 +-
 ...Add-devm_thermal_of_zone_register_with_pa.patch | 18 +++---
 .../patches-6.6/950-0087-Add-dwc_otg-driver.patch  |  2 +-
 ...oth-hci_sync-Add-fallback-bd-address-prop.patch |  4 +-
 ...usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  4 +-
 ...-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch |  4 +-
 ...uetooth-hci_sync-Fix-crash-on-NULL-parent.patch |  2 +-
 ...re-add-support-for-setting-NAK-enhancemen.patch |  4 +-
 ...nel-ct-size-the-hashtable-more-adequately.patch |  2 +-
 ...f_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch |  2 +-
 ...k-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch | 70 ----------------------
 ...sb-dwc3-add-optional-PHY-interface-clocks.patch |  4 +-
 ...6-uart-8250-Add-dw-auto-flow-ctrl-support.patch |  2 +-
 13 files changed, 26 insertions(+), 96 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index f034d0754c..8fa79f9ce1 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .71
-LINUX_KERNEL_HASH-6.6.71 = 219715ba2dcfa6539fba09ad3f9212772f3507189eb60d77f8e89b06c32e724e
+LINUX_VERSION-6.6 = .72
+LINUX_KERNEL_HASH-6.6.72 = feb9e514930d5968daa0b8b5486d3295d1fb2b34accf876207641884d4baef39
diff --git a/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch b/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
index 7836aef7dd..d646e05170 100644
--- a/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
+++ b/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
@@ -40,7 +40,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 
 --- a/drivers/thermal/thermal_of.c
 +++ b/drivers/thermal/thermal_of.c
-@@ -245,7 +245,7 @@ static void thermal_of_parameters_init(s
+@@ -246,7 +246,7 @@ static void thermal_of_parameters_init(s
  {
  	int coef[2];
  	int ncoef = ARRAY_SIZE(coef);
@@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	tzp->no_hwmon = true;
  
-@@ -257,14 +257,11 @@ static void thermal_of_parameters_init(s
+@@ -258,14 +258,11 @@ static void thermal_of_parameters_init(s
  	 * thermal zone. Thus, we are considering only the first two
  	 * values as slope and offset.
  	 */
@@ -67,7 +67,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  }
  
  static struct device_node *thermal_of_zone_get_by_name(struct thermal_zone_device *tz)
-@@ -458,10 +455,15 @@ static void thermal_of_zone_unregister(s
+@@ -459,10 +456,15 @@ static void thermal_of_zone_unregister(s
   * zone properties and registers new thermal zone with those
   * properties.
   *
@@ -83,7 +83,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
   *
   * Return: a valid thermal zone structure pointer on success.
   * 	- EINVAL: if the device tree thermal description is malformed
-@@ -469,11 +471,11 @@ static void thermal_of_zone_unregister(s
+@@ -470,11 +472,11 @@ static void thermal_of_zone_unregister(s
   *	- Other negative errors are returned by the underlying called functions
   */
  static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
@@ -97,7 +97,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	struct thermal_zone_device_ops *of_ops;
  	struct device_node *np;
  	int delay, pdelay;
-@@ -508,7 +510,7 @@ static struct thermal_zone_device *therm
+@@ -509,7 +511,7 @@ static struct thermal_zone_device *therm
  		goto out_kfree_trips;
  	}
  
@@ -106,7 +106,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	of_ops->bind = thermal_of_bind;
  	of_ops->unbind = thermal_of_unbind;
-@@ -516,7 +518,7 @@ static struct thermal_zone_device *therm
+@@ -517,7 +519,7 @@ static struct thermal_zone_device *therm
  	mask = GENMASK_ULL((ntrips) - 1, 0);
  
  	tz = thermal_zone_device_register_with_trips(np->name, trips, ntrips,
@@ -115,7 +115,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  						     pdelay, delay);
  	if (IS_ERR(tz)) {
  		ret = PTR_ERR(tz);
-@@ -571,6 +573,7 @@ static int devm_thermal_of_zone_match(st
+@@ -572,6 +574,7 @@ static int devm_thermal_of_zone_match(st
  struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int sensor_id, void *data,
  							  const struct thermal_zone_device_ops *ops)
  {
@@ -123,7 +123,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	struct thermal_zone_device **ptr, *tzd;
  
  	ptr = devres_alloc(devm_thermal_of_zone_release, sizeof(*ptr),
-@@ -578,7 +581,7 @@ struct thermal_zone_device *devm_thermal
+@@ -579,7 +582,7 @@ struct thermal_zone_device *devm_thermal
  	if (!ptr)
  		return ERR_PTR(-ENOMEM);
  
@@ -132,7 +132,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	if (IS_ERR(tzd)) {
  		devres_free(ptr);
  		return tzd;
-@@ -592,6 +595,46 @@ struct thermal_zone_device *devm_thermal
+@@ -593,6 +596,46 @@ struct thermal_zone_device *devm_thermal
  EXPORT_SYMBOL_GPL(devm_thermal_of_zone_register);
  
  /**
diff --git a/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch b/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
index cb9fd4442a..3da9f4230b 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
@@ -1189,7 +1189,7 @@ Signed-off-by: Alexander Winkowski <dereference23 at outlook.com>
  }
 --- a/drivers/usb/core/hub.c
 +++ b/drivers/usb/core/hub.c
-@@ -5710,7 +5710,7 @@ static void port_event(struct usb_hub *h
+@@ -5712,7 +5712,7 @@ static void port_event(struct usb_hub *h
  		port_dev->over_current_count++;
  		port_over_current_notify(port_dev);
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
index 3f9d802de3..b9d1a95c6d 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
@@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,6 +4872,7 @@ static const struct {
+@@ -4873,6 +4873,7 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
@@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
  	int ret = 0;
  	bool invalid_bdaddr;
  	size_t i;
-@@ -4900,7 +4901,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4901,7 +4902,8 @@ static int hci_dev_setup_sync(struct hci
  			 test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  	if (!ret) {
  		if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index 2448bd942a..db3b6cd828 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -333,7 +333,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* Global Debug LSP MUX Select */
  #define DWC3_GDBGLSPMUX_ENDBC		BIT(15)	/* Host only */
  #define DWC3_GDBGLSPMUX_HOSTSELECT(n)	((n) & 0x3fff)
-@@ -1066,6 +1069,7 @@ struct dwc3_scratchpad_array {
+@@ -1067,6 +1070,7 @@ struct dwc3_scratchpad_array {
   * @tx_max_burst_prd: max periodic ESS transmit burst size
   * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
   * @clear_stall_protocol: endpoint number that requires a delayed status phase
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1303,6 +1307,7 @@ struct dwc3 {
+@@ -1304,6 +1308,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
index 6eb5e5697f..0441512add 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
@@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST	BIT(10)
  
  /* Global Status Register */
-@@ -1121,10 +1122,12 @@ struct dwc3_scratchpad_array {
+@@ -1122,10 +1123,12 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1351,6 +1354,7 @@ struct dwc3 {
+@@ -1352,6 +1355,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch b/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
index 223e2df2b7..6dfd31c70f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,7 +4872,8 @@ static const struct {
+@@ -4873,7 +4873,8 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
index cb4f6deb39..8995f6f9dc 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS		BIT(17)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS		BIT(16)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS	BIT(15)
-@@ -1122,6 +1124,8 @@ struct dwc3_scratchpad_array {
+@@ -1123,6 +1125,8 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -66,7 +66,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
   *			Superspeed instances.
   * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1352,6 +1356,8 @@ struct dwc3 {
+@@ -1353,6 +1357,8 @@ struct dwc3 {
  	unsigned		dis_tx_ipgap_linecheck_quirk:1;
  	unsigned		resume_hs_terminations:1;
  	unsigned		ulpi_ext_vbus_drv:1;
diff --git a/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch b/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
index 020f3f3a11..ff959ec8d2 100644
--- a/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
+++ b/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
@@ -14,7 +14,7 @@ Signed-off-by: Rui Salvaterra <rsalvaterra at gmail.com>
 
 --- a/net/netfilter/nf_conntrack_core.c
 +++ b/net/netfilter/nf_conntrack_core.c
-@@ -2682,7 +2682,7 @@ int nf_conntrack_init_start(void)
+@@ -2685,7 +2685,7 @@ int nf_conntrack_init_start(void)
  
  	if (!nf_conntrack_htable_size) {
  		nf_conntrack_htable_size
diff --git a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
index 572aad2a3b..6cb52d00a2 100644
--- a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
+++ b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/netfilter/nf_tables_api.c
 +++ b/net/netfilter/nf_tables_api.c
-@@ -8421,7 +8421,7 @@ static int nft_register_flowtable_net_ho
+@@ -8425,7 +8425,7 @@ static int nft_register_flowtable_net_ho
  		err = flowtable->data.type->setup(&flowtable->data,
  						  hook->ops.dev,
  						  FLOW_BLOCK_BIND);
diff --git a/target/linux/mediatek/patches-6.6/870-drm-mediatek-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch b/target/linux/mediatek/patches-6.6/870-drm-mediatek-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch
deleted file mode 100644
index 4aea9e034c..0000000000
--- a/target/linux/mediatek/patches-6.6/870-drm-mediatek-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From patchwork Sun Dec 15 22:09:41 2024
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Daniel Golle <daniel at makrotopia.org>
-X-Patchwork-Id: 13908995
-Return-Path: 
- <linux-mediatek-bounces+linux-mediatek=archiver.kernel.org at lists.infradead.org>
-Date: Sun, 15 Dec 2024 22:09:41 +0000
-From: Daniel Golle <daniel at makrotopia.org>
-To: Chun-Kuang Hu <chunkuang.hu at kernel.org>,
-	Philipp Zabel <p.zabel at pengutronix.de>,
-	David Airlie <airlied at gmail.com>, Simona Vetter <simona at ffwll.ch>,
-	Matthias Brugger <matthias.bgg at gmail.com>,
-	AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>,
-	Justin Green <greenjustin at chromium.org>,
-	Frank Wunderlich <frank-w at public-files.de>,
-	John Crispin <john at phrozen.org>, dri-devel at lists.freedesktop.org,
-	linux-mediatek at lists.infradead.org, linux-kernel at vger.kernel.org,
-	linux-arm-kernel at lists.infradead.org, stable at vger.kernel.org
-Subject: [PATCH] drm/mediatek: only touch DISP_REG_OVL_PITCH_MSB if AFBC is
- supported
-Message-ID: 
- <8c001c8e70d93d64d3ee6bf7dc5078d2783d4e32.1734300345.git.daniel at makrotopia.org>
-MIME-Version: 1.0
-Content-Disposition: inline
-X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 
-X-CRM114-CacheID: sfid-20241215_140959_910539_20C140B3 
-X-CRM114-Status: UNSURE (   9.48  )
-X-CRM114-Notice: Please train this message.
-X-BeenThere: linux-mediatek at lists.infradead.org
-X-Mailman-Version: 2.1.34
-Precedence: list
-List-Id: <linux-mediatek.lists.infradead.org>
-List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-mediatek>,
- <mailto:linux-mediatek-request at lists.infradead.org?subject=unsubscribe>
-List-Archive: <http://lists.infradead.org/pipermail/linux-mediatek/>
-List-Post: <mailto:linux-mediatek at lists.infradead.org>
-List-Help: <mailto:linux-mediatek-request at lists.infradead.org?subject=help>
-List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mediatek>,
- <mailto:linux-mediatek-request at lists.infradead.org?subject=subscribe>
-Sender: "Linux-mediatek" <linux-mediatek-bounces at lists.infradead.org>
-Errors-To: 
- linux-mediatek-bounces+linux-mediatek=archiver.kernel.org at lists.infradead.org
-
-Touching DISP_REG_OVL_PITCH_MSB leads to video overlay on MT2701, MT7623N
-and probably other older SoCs being broken.
-
-Only touching it on hardware which actually supports AFBC like it was
-before commit c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek
-DRM driver") fixes it.
-
-Fixes: c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek DRM driver")
-Cc: stable at vger.kernel.org
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
----
- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
-+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
-@@ -478,7 +478,7 @@ void mtk_ovl_layer_config(struct device
- 				      &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx));
- 		mtk_ddp_write_relaxed(cmdq_pkt, hdr_pitch, &ovl->cmdq_reg, ovl->regs,
- 				      DISP_REG_OVL_HDR_PITCH(ovl, idx));
--	} else {
-+	} else if (ovl->data->supports_afbc) {
- 		mtk_ddp_write_relaxed(cmdq_pkt,
- 				      overlay_pitch.split_pitch.msb,
- 				      &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx));
diff --git a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
index d38d260ef1..30e8a98fd7 100644
--- a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
+++ b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
@@ -71,7 +71,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
  
 --- a/drivers/usb/dwc3/core.h
 +++ b/drivers/usb/dwc3/core.h
-@@ -1002,6 +1002,8 @@ struct dwc3_scratchpad_array {
+@@ -1003,6 +1003,8 @@ struct dwc3_scratchpad_array {
   * @bus_clk: clock for accessing the registers
   * @ref_clk: reference clock
   * @susp_clk: clock used when the SS phy is in low power (S3) state
@@ -80,7 +80,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
   * @reset: reset control
   * @regs: base address for our registers
   * @regs_size: address space size
-@@ -1174,6 +1176,8 @@ struct dwc3 {
+@@ -1175,6 +1177,8 @@ struct dwc3 {
  	struct clk		*bus_clk;
  	struct clk		*ref_clk;
  	struct clk		*susp_clk;
diff --git a/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch b/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
index c88008a604..617d72f11f 100644
--- a/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
+++ b/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
@@ -25,7 +25,7 @@ Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
 +			uart->probe = up->probe;
  
  		if (uart->port.type != PORT_8250_CIR) {
- 			if (serial8250_isa_config != NULL)
+ 			if (uart_console_registered(&uart->port))
 --- a/drivers/tty/serial/8250/8250_dw.c
 +++ b/drivers/tty/serial/8250/8250_dw.c
 @@ -612,6 +612,9 @@ static int dw8250_probe(struct platform_



From lede-commits at lists.infradead.org  Mon Jan 20 15:28:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:28:01 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.72
In-Reply-To: <173741568132.494114.6371261132851424300@git-01.infra.openwrt.org>
References: <173741568132.494114.6371261132851424300@git-01.infra.openwrt.org>
Message-ID: <mailman.43450.1737415684.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/4081bc3f6cb61df7b9608d6bdc0a103ab0c06d35

commit 4081bc3f6cb61df7b9608d6bdc0a103ab0c06d35
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Fri Jan 17 08:25:17 2025 -0500

    kernel: bump 6.6 to 6.6.72
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.72
    
    Dropped to due being superseded by upstream patch:
            mediatek/patches-6.6/870-drm-mediatek-only-touch-DISP_REG_OVL_PITCH_MSB-if-AF.patch[1]
    
    All other patches automatically rebased.
    
    1. https://github.com/gregkh/linux/commit/ac7f5641e9887354a0fc6f48190533af084bb0dc
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17646
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 1d021458fd681dc4c27615a574cc09cc57d1c51e)
---
 include/kernel-6.6                                     |  4 ++--
 ...-of-Add-devm_thermal_of_zone_register_with_pa.patch | 18 +++++++++---------
 .../patches-6.6/950-0087-Add-dwc_otg-driver.patch      |  2 +-
 ...uetooth-hci_sync-Add-fallback-bd-address-prop.patch |  4 ++--
 ...519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch |  4 ++--
 ...-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch |  4 ++--
 ...8-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch |  2 +-
 ...3-core-add-support-for-setting-NAK-enhancemen.patch |  4 ++--
 ...-kernel-ct-size-the-hashtable-more-adequately.patch |  2 +-
 ...er-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch |  2 +-
 ....7-usb-dwc3-add-optional-PHY-interface-clocks.patch |  4 ++--
 .../0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch |  2 +-
 12 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index f034d0754c..8fa79f9ce1 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .71
-LINUX_KERNEL_HASH-6.6.71 = 219715ba2dcfa6539fba09ad3f9212772f3507189eb60d77f8e89b06c32e724e
+LINUX_VERSION-6.6 = .72
+LINUX_KERNEL_HASH-6.6.72 = feb9e514930d5968daa0b8b5486d3295d1fb2b34accf876207641884d4baef39
diff --git a/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch b/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
index 7836aef7dd..d646e05170 100644
--- a/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
+++ b/target/linux/airoha/patches-6.6/101-01-thermal-of-Add-devm_thermal_of_zone_register_with_pa.patch
@@ -40,7 +40,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 
 --- a/drivers/thermal/thermal_of.c
 +++ b/drivers/thermal/thermal_of.c
-@@ -245,7 +245,7 @@ static void thermal_of_parameters_init(s
+@@ -246,7 +246,7 @@ static void thermal_of_parameters_init(s
  {
  	int coef[2];
  	int ncoef = ARRAY_SIZE(coef);
@@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	tzp->no_hwmon = true;
  
-@@ -257,14 +257,11 @@ static void thermal_of_parameters_init(s
+@@ -258,14 +258,11 @@ static void thermal_of_parameters_init(s
  	 * thermal zone. Thus, we are considering only the first two
  	 * values as slope and offset.
  	 */
@@ -67,7 +67,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  }
  
  static struct device_node *thermal_of_zone_get_by_name(struct thermal_zone_device *tz)
-@@ -458,10 +455,15 @@ static void thermal_of_zone_unregister(s
+@@ -459,10 +456,15 @@ static void thermal_of_zone_unregister(s
   * zone properties and registers new thermal zone with those
   * properties.
   *
@@ -83,7 +83,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
   *
   * Return: a valid thermal zone structure pointer on success.
   * 	- EINVAL: if the device tree thermal description is malformed
-@@ -469,11 +471,11 @@ static void thermal_of_zone_unregister(s
+@@ -470,11 +472,11 @@ static void thermal_of_zone_unregister(s
   *	- Other negative errors are returned by the underlying called functions
   */
  static struct thermal_zone_device *thermal_of_zone_register(struct device_node *sensor, int id, void *data,
@@ -97,7 +97,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	struct thermal_zone_device_ops *of_ops;
  	struct device_node *np;
  	int delay, pdelay;
-@@ -508,7 +510,7 @@ static struct thermal_zone_device *therm
+@@ -509,7 +511,7 @@ static struct thermal_zone_device *therm
  		goto out_kfree_trips;
  	}
  
@@ -106,7 +106,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  
  	of_ops->bind = thermal_of_bind;
  	of_ops->unbind = thermal_of_unbind;
-@@ -516,7 +518,7 @@ static struct thermal_zone_device *therm
+@@ -517,7 +519,7 @@ static struct thermal_zone_device *therm
  	mask = GENMASK_ULL((ntrips) - 1, 0);
  
  	tz = thermal_zone_device_register_with_trips(np->name, trips, ntrips,
@@ -115,7 +115,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  						     pdelay, delay);
  	if (IS_ERR(tz)) {
  		ret = PTR_ERR(tz);
-@@ -571,6 +573,7 @@ static int devm_thermal_of_zone_match(st
+@@ -572,6 +574,7 @@ static int devm_thermal_of_zone_match(st
  struct thermal_zone_device *devm_thermal_of_zone_register(struct device *dev, int sensor_id, void *data,
  							  const struct thermal_zone_device_ops *ops)
  {
@@ -123,7 +123,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	struct thermal_zone_device **ptr, *tzd;
  
  	ptr = devres_alloc(devm_thermal_of_zone_release, sizeof(*ptr),
-@@ -578,7 +581,7 @@ struct thermal_zone_device *devm_thermal
+@@ -579,7 +582,7 @@ struct thermal_zone_device *devm_thermal
  	if (!ptr)
  		return ERR_PTR(-ENOMEM);
  
@@ -132,7 +132,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  	if (IS_ERR(tzd)) {
  		devres_free(ptr);
  		return tzd;
-@@ -592,6 +595,46 @@ struct thermal_zone_device *devm_thermal
+@@ -593,6 +596,46 @@ struct thermal_zone_device *devm_thermal
  EXPORT_SYMBOL_GPL(devm_thermal_of_zone_register);
  
  /**
diff --git a/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch b/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
index cb9fd4442a..3da9f4230b 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0087-Add-dwc_otg-driver.patch
@@ -1189,7 +1189,7 @@ Signed-off-by: Alexander Winkowski <dereference23 at outlook.com>
  }
 --- a/drivers/usb/core/hub.c
 +++ b/drivers/usb/core/hub.c
-@@ -5710,7 +5710,7 @@ static void port_event(struct usb_hub *h
+@@ -5712,7 +5712,7 @@ static void port_event(struct usb_hub *h
  		port_dev->over_current_count++;
  		port_over_current_notify(port_dev);
  
diff --git a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
index 3f9d802de3..b9d1a95c6d 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0441-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch
@@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,6 +4872,7 @@ static const struct {
+@@ -4873,6 +4873,7 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
@@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
  	int ret = 0;
  	bool invalid_bdaddr;
  	size_t i;
-@@ -4900,7 +4901,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4901,7 +4902,8 @@ static int hci_dev_setup_sync(struct hci
  			 test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  	if (!ret) {
  		if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&
diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
index 2448bd942a..db3b6cd828 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch
@@ -333,7 +333,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  /* Global Debug LSP MUX Select */
  #define DWC3_GDBGLSPMUX_ENDBC		BIT(15)	/* Host only */
  #define DWC3_GDBGLSPMUX_HOSTSELECT(n)	((n) & 0x3fff)
-@@ -1066,6 +1069,7 @@ struct dwc3_scratchpad_array {
+@@ -1067,6 +1070,7 @@ struct dwc3_scratchpad_array {
   * @tx_max_burst_prd: max periodic ESS transmit burst size
   * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
   * @clear_stall_protocol: endpoint number that requires a delayed status phase
@@ -341,7 +341,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @hsphy_interface: "utmi" or "ulpi"
   * @connected: true when we're connected to a host, false otherwise
   * @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1303,6 +1307,7 @@ struct dwc3 {
+@@ -1304,6 +1308,7 @@ struct dwc3 {
  	u8			tx_max_burst_prd;
  	u8			tx_fifo_resize_max_num;
  	u8			clear_stall_protocol;
diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
index 6eb5e5697f..0441512add 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
@@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST	BIT(10)
  
  /* Global Status Register */
-@@ -1121,10 +1122,12 @@ struct dwc3_scratchpad_array {
+@@ -1122,10 +1123,12 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -62,7 +62,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
   * @tx_de_emphasis: Tx de-emphasis value
   *	0	- -6dB de-emphasis
-@@ -1351,6 +1354,7 @@ struct dwc3 {
+@@ -1352,6 +1355,7 @@ struct dwc3 {
  	unsigned		ulpi_ext_vbus_drv:1;
  	unsigned		parkmode_disable_ss_quirk:1;
  	unsigned		parkmode_disable_hs_quirk:1;
diff --git a/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch b/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
index 223e2df2b7..6dfd31c70f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1218-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch
@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4872,7 +4872,8 @@ static const struct {
+@@ -4873,7 +4873,8 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
diff --git a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
index cb4f6deb39..8995f6f9dc 100644
--- a/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-1359-usb-dwc3-core-add-support-for-setting-NAK-enhancemen.patch
@@ -57,7 +57,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS		BIT(17)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS		BIT(16)
  #define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS	BIT(15)
-@@ -1122,6 +1124,8 @@ struct dwc3_scratchpad_array {
+@@ -1123,6 +1125,8 @@ struct dwc3_scratchpad_array {
   *			generation after resume from suspend.
   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
   *			VBUS with an external supply.
@@ -66,7 +66,7 @@ Signed-off-by: Jonathan Bell <jonathan at raspberrypi.com>
   * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
   *			Superspeed instances.
   * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1352,6 +1356,8 @@ struct dwc3 {
+@@ -1353,6 +1357,8 @@ struct dwc3 {
  	unsigned		dis_tx_ipgap_linecheck_quirk:1;
  	unsigned		resume_hs_terminations:1;
  	unsigned		ulpi_ext_vbus_drv:1;
diff --git a/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch b/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
index 020f3f3a11..ff959ec8d2 100644
--- a/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
+++ b/target/linux/generic/hack-6.6/661-kernel-ct-size-the-hashtable-more-adequately.patch
@@ -14,7 +14,7 @@ Signed-off-by: Rui Salvaterra <rsalvaterra at gmail.com>
 
 --- a/net/netfilter/nf_conntrack_core.c
 +++ b/net/netfilter/nf_conntrack_core.c
-@@ -2682,7 +2682,7 @@ int nf_conntrack_init_start(void)
+@@ -2685,7 +2685,7 @@ int nf_conntrack_init_start(void)
  
  	if (!nf_conntrack_htable_size) {
  		nf_conntrack_htable_size
diff --git a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
index 572aad2a3b..6cb52d00a2 100644
--- a/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
+++ b/target/linux/generic/pending-6.6/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/netfilter/nf_tables_api.c
 +++ b/net/netfilter/nf_tables_api.c
-@@ -8421,7 +8421,7 @@ static int nft_register_flowtable_net_ho
+@@ -8425,7 +8425,7 @@ static int nft_register_flowtable_net_ho
  		err = flowtable->data.type->setup(&flowtable->data,
  						  hook->ops.dev,
  						  FLOW_BLOCK_BIND);
diff --git a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
index d38d260ef1..30e8a98fd7 100644
--- a/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
+++ b/target/linux/rockchip/patches-6.6/034-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch
@@ -71,7 +71,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
  
 --- a/drivers/usb/dwc3/core.h
 +++ b/drivers/usb/dwc3/core.h
-@@ -1002,6 +1002,8 @@ struct dwc3_scratchpad_array {
+@@ -1003,6 +1003,8 @@ struct dwc3_scratchpad_array {
   * @bus_clk: clock for accessing the registers
   * @ref_clk: reference clock
   * @susp_clk: clock used when the SS phy is in low power (S3) state
@@ -80,7 +80,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
   * @reset: reset control
   * @regs: base address for our registers
   * @regs_size: address space size
-@@ -1174,6 +1176,8 @@ struct dwc3 {
+@@ -1175,6 +1177,8 @@ struct dwc3 {
  	struct clk		*bus_clk;
  	struct clk		*ref_clk;
  	struct clk		*susp_clk;
diff --git a/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch b/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
index c88008a604..617d72f11f 100644
--- a/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
+++ b/target/linux/starfive/patches-6.6/0066-uart-8250-Add-dw-auto-flow-ctrl-support.patch
@@ -25,7 +25,7 @@ Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
 +			uart->probe = up->probe;
  
  		if (uart->port.type != PORT_8250_CIR) {
- 			if (serial8250_isa_config != NULL)
+ 			if (uart_console_registered(&uart->port))
 --- a/drivers/tty/serial/8250/8250_dw.c
 +++ b/drivers/tty/serial/8250/8250_dw.c
 @@ -612,6 +612,9 @@ static int dw8250_probe(struct platform_



From lede-commits at lists.infradead.org  Mon Jan 20 15:39:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:39:11 -0500
Subject: [openwrt/openwrt]  mediatek: Xiaomi AX3000t: fix soft brick for the
 rd23 model
In-Reply-To: <173741635056.505179.6864379620109216605@git-01.infra.openwrt.org>
References: <173741635056.505179.6864379620109216605@git-01.infra.openwrt.org>
Message-ID: <mailman.43451.1737416354.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/42a253c7e8992e2274628b1770a0263ac433d0bc

commit 42a253c7e8992e2274628b1770a0263ac433d0bc
Author: Mikhail Zhilkin <csharper2005 at gmail.com>
AuthorDate: Sat Jan 11 14:55:17 2025 +0000

    mediatek: Xiaomi AX3000t: fix soft brick for the rd23 model
    
    This commit fixes Xiaomi AX3000t soft bricks. Issue affects at least rd23
    model (Global version) users:
    Link: https://forum.openwrt.org/t/openwrt-support-for-xiaomi-ax3000t/180490/452
    
    I also found that these nvram settings are wrong for the rd23 model and
    U-Boot erase them:
    '''
    flag_try_sys1_failed 8
    flag_try_sys2_failed 8
    '''
    As a result, platform.sh -> xiaomi_initial_setup() function sometimes ends
    early without applying settings for the rd23 model.
    
    RD03 model strategy:
    1. Don't touch values those were set up by platform.sh ->
    xiaomi_initial_setup() function
    
    RD23 model strategy:
    1. Apply correct nvram settings at every boot
    2. Use bulk fw_setenv call
    
    I didn't find opened issue for AX3000t. Similar AX3200 issue:
    Link: https://github.com/openwrt/openwrt/issues/16347
    So, other Xiaomi devices (e.g. Xiaomi WR30U) may also require fix.
    
    Fixes: 7dbcc1215a56cc1da68c81bf92d7efa174c5e051 ("mediatek: filogic: add support for Xiaomi AX3000T")
    Signed-off-by: Mikhail Zhilkin <csharper2005 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17580
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../mediatek/filogic/base-files/etc/init.d/bootcount   | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
index c52d004c63..a0e7d40862 100755
--- a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
+++ b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
@@ -5,6 +5,24 @@ START=99
 
 boot() {
 	case $(board_name) in
+	xiaomi,mi-router-ax3000t)
+		. /lib/upgrade/common.sh
+		[ "$(rootfs_type)" = "tmpfs" ] && \
+			logger "bootcount: initramfs mode detected, exit" && \
+			return 0
+		[ "$(fw_printenv -n flag_try_sys2_failed 2>&1)" = "8" ] && \
+			logger "bootcount: rd03 model detected, exit" && \
+			return 0
+		fw_setenv -s - <<-EOF
+			flag_boot_rootfs 0
+			flag_boot_success 1
+			flag_last_success 0
+			flag_ota_reboot 0
+			flag_try_sys1_failed 0
+			flag_try_sys2_failed 0
+		EOF
+		logger "bootcount: rd23 model detected, nvram was updated"
+		;;
 	zyxel,ex5700-telenor)
 		fw_setenv uboot_bootcount 0
 		;;



From lede-commits at lists.infradead.org  Mon Jan 20 15:39:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:39:10 -0500
Subject: [openwrt/openwrt]  mediatek: replace multiple fw_setenv calls by the
 bulk one
In-Reply-To: <173741635056.505179.6864379620109216605@git-01.infra.openwrt.org>
References: <173741635056.505179.6864379620109216605@git-01.infra.openwrt.org>
Message-ID: <mailman.43452.1737416611.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a6b0abf4661e4dc1449494e46340f75c44df81de

commit a6b0abf4661e4dc1449494e46340f75c44df81de
Author: Mikhail Zhilkin <csharper2005 at gmail.com>
AuthorDate: Sat Jan 11 14:46:05 2025 +0000

    mediatek: replace multiple fw_setenv calls by the bulk one
    
    This commit replaces multiple fw_setenv calls by the bulk one to reduce
    flash writes.
    
    Thanks @Linaro1985 for the idea.
    
    Signed-off-by: Mikhail Zhilkin <csharper2005 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17580
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../mediatek/filogic/base-files/lib/upgrade/platform.sh  | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 1d89640a4e..38019e89e5 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -40,13 +40,15 @@ xiaomi_initial_setup()
 		return 0
 	fi
 
-	fw_setenv boot_wait on
-	fw_setenv uart_en 1
-	fw_setenv flag_boot_rootfs 0
-	fw_setenv flag_last_success 1
-	fw_setenv flag_boot_success 1
-	fw_setenv flag_try_sys1_failed 8
-	fw_setenv flag_try_sys2_failed 8
+	fw_setenv -s - <<-EOF
+		boot_wait on
+		uart_en 1
+		flag_boot_rootfs 0
+		flag_last_success 1
+		flag_boot_success 1
+		flag_try_sys1_failed 8
+		flag_try_sys2_failed 8
+	EOF
 
 	local board=$(board_name)
 	case "$board" in



From lede-commits at lists.infradead.org  Mon Jan 20 15:45:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:45:20 -0500
Subject: [openwrt/openwrt]  mediatek: replace multiple fw_setenv calls by the
 bulk one
In-Reply-To: <173741672079.511020.1141540254088239951@git-01.infra.openwrt.org>
References: <173741672079.511020.1141540254088239951@git-01.infra.openwrt.org>
Message-ID: <mailman.43455.1737416847.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/f5fd378e849e20823ce663351977f6f6d0a7dbac

commit f5fd378e849e20823ce663351977f6f6d0a7dbac
Author: Mikhail Zhilkin <csharper2005 at gmail.com>
AuthorDate: Sat Jan 11 14:46:05 2025 +0000

    mediatek: replace multiple fw_setenv calls by the bulk one
    
    This commit replaces multiple fw_setenv calls by the bulk one to reduce
    flash writes.
    
    Thanks @Linaro1985 for the idea.
    
    Signed-off-by: Mikhail Zhilkin <csharper2005 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17580
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit a6b0abf4661e4dc1449494e46340f75c44df81de)
---
 .../mediatek/filogic/base-files/lib/upgrade/platform.sh  | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index 2ad92b2f56..11bfad2e7b 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -40,13 +40,15 @@ xiaomi_initial_setup()
 		return 0
 	fi
 
-	fw_setenv boot_wait on
-	fw_setenv uart_en 1
-	fw_setenv flag_boot_rootfs 0
-	fw_setenv flag_last_success 1
-	fw_setenv flag_boot_success 1
-	fw_setenv flag_try_sys1_failed 8
-	fw_setenv flag_try_sys2_failed 8
+	fw_setenv -s - <<-EOF
+		boot_wait on
+		uart_en 1
+		flag_boot_rootfs 0
+		flag_last_success 1
+		flag_boot_success 1
+		flag_try_sys1_failed 8
+		flag_try_sys2_failed 8
+	EOF
 
 	local board=$(board_name)
 	case "$board" in



From lede-commits at lists.infradead.org  Mon Jan 20 15:45:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 20 Jan 2025 18:45:21 -0500
Subject: [openwrt/openwrt]  mediatek: Xiaomi AX3000t: fix soft brick for the
 rd23 model
In-Reply-To: <173741672079.511020.1141540254088239951@git-01.infra.openwrt.org>
References: <173741672079.511020.1141540254088239951@git-01.infra.openwrt.org>
Message-ID: <mailman.43456.1737416855.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/939550bfbfc8423873348f890d2507eb6732ffec

commit 939550bfbfc8423873348f890d2507eb6732ffec
Author: Mikhail Zhilkin <csharper2005 at gmail.com>
AuthorDate: Sat Jan 11 14:55:17 2025 +0000

    mediatek: Xiaomi AX3000t: fix soft brick for the rd23 model
    
    This commit fixes Xiaomi AX3000t soft bricks. Issue affects at least rd23
    model (Global version) users:
    Link: https://forum.openwrt.org/t/openwrt-support-for-xiaomi-ax3000t/180490/452
    
    I also found that these nvram settings are wrong for the rd23 model and
    U-Boot erase them:
    '''
    flag_try_sys1_failed 8
    flag_try_sys2_failed 8
    '''
    As a result, platform.sh -> xiaomi_initial_setup() function sometimes ends
    early without applying settings for the rd23 model.
    
    RD03 model strategy:
    1. Don't touch values those were set up by platform.sh ->
    xiaomi_initial_setup() function
    
    RD23 model strategy:
    1. Apply correct nvram settings at every boot
    2. Use bulk fw_setenv call
    
    I didn't find opened issue for AX3000t. Similar AX3200 issue:
    Link: https://github.com/openwrt/openwrt/issues/16347
    So, other Xiaomi devices (e.g. Xiaomi WR30U) may also require fix.
    
    Fixes: 7dbcc1215a56cc1da68c81bf92d7efa174c5e051 ("mediatek: filogic: add support for Xiaomi AX3000T")
    Signed-off-by: Mikhail Zhilkin <csharper2005 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17580
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 42a253c7e8992e2274628b1770a0263ac433d0bc)
---
 .../mediatek/filogic/base-files/etc/init.d/bootcount   | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
index c52d004c63..a0e7d40862 100755
--- a/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
+++ b/target/linux/mediatek/filogic/base-files/etc/init.d/bootcount
@@ -5,6 +5,24 @@ START=99
 
 boot() {
 	case $(board_name) in
+	xiaomi,mi-router-ax3000t)
+		. /lib/upgrade/common.sh
+		[ "$(rootfs_type)" = "tmpfs" ] && \
+			logger "bootcount: initramfs mode detected, exit" && \
+			return 0
+		[ "$(fw_printenv -n flag_try_sys2_failed 2>&1)" = "8" ] && \
+			logger "bootcount: rd03 model detected, exit" && \
+			return 0
+		fw_setenv -s - <<-EOF
+			flag_boot_rootfs 0
+			flag_boot_success 1
+			flag_last_success 0
+			flag_ota_reboot 0
+			flag_try_sys1_failed 0
+			flag_try_sys2_failed 0
+		EOF
+		logger "bootcount: rd23 model detected, nvram was updated"
+		;;
 	zyxel,ex5700-telenor)
 		fw_setenv uboot_bootcount 0
 		;;



From lede-commits at lists.infradead.org  Tue Jan 21 01:02:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 04:02:37 -0500
Subject: [openwrt/openwrt]  ath79: meraki-mr18: fix initramfs build
In-Reply-To: <173745015731.1610320.10399927151852104477@git-01.infra.openwrt.org>
References: <173745015731.1610320.10399927151852104477@git-01.infra.openwrt.org>
Message-ID: <mailman.43689.1737450161.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7423e67e1b8c7e4c9f527d1300dbeaab72b1f95f

commit 7423e67e1b8c7e4c9f527d1300dbeaab72b1f95f
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Tue Jan 21 00:10:50 2025 +0100

    ath79: meraki-mr18: fix initramfs build
    
    Now, that initramfs images built for ZTE devices work, by moving
    LZMA_TEXT_START further up the available RAM - same fix works
    successfully for Meraki MR18 too. Apply it and reenable initramfs
    generation again.
    
    Fixes: 1d49310fdb5e ("ath79: add Cisco Meraki MR18")
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17680
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/ath79/image/nand.mk | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk
index e8494da15d..68cb543187 100644
--- a/target/linux/ath79/image/nand.mk
+++ b/target/linux/ath79/image/nand.mk
@@ -313,10 +313,9 @@ define Device/meraki_mr18
   BLOCKSIZE := 128k
   PAGESIZE := 2048
   LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
   KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | meraki-header MR18
-# Initramfs-build fails due to size issues
-# KERNEL_INITRAMFS := $$(KERNEL)
-  KERNEL_INITRAMFS :=
+  KERNEL_INITRAMFS := $$(KERNEL)
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   SUPPORTED_DEVICES += mr18
 endef



From lede-commits at lists.infradead.org  Tue Jan 21 02:05:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 05:05:38 -0500
Subject: [openwrt/openwrt]  ath79: meraki-mr18: fix initramfs build
In-Reply-To: <173745393839.1692763.5987264398157864104@git-01.infra.openwrt.org>
References: <173745393839.1692763.5987264398157864104@git-01.infra.openwrt.org>
Message-ID: <mailman.43757.1737453941.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/ad98c322cc50e4b2819dc195cb195b0e3daf9d5a

commit ad98c322cc50e4b2819dc195cb195b0e3daf9d5a
Author: Lech Perczak <lech.perczak at gmail.com>
AuthorDate: Tue Jan 21 00:10:50 2025 +0100

    ath79: meraki-mr18: fix initramfs build
    
    Now, that initramfs images built for ZTE devices work, by moving
    LZMA_TEXT_START further up the available RAM - same fix works
    successfully for Meraki MR18 too. Apply it and reenable initramfs
    generation again.
    
    Fixes: 1d49310fdb5e ("ath79: add Cisco Meraki MR18")
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17680
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 7423e67e1b8c7e4c9f527d1300dbeaab72b1f95f)
---
 target/linux/ath79/image/nand.mk | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk
index e8494da15d..68cb543187 100644
--- a/target/linux/ath79/image/nand.mk
+++ b/target/linux/ath79/image/nand.mk
@@ -313,10 +313,9 @@ define Device/meraki_mr18
   BLOCKSIZE := 128k
   PAGESIZE := 2048
   LOADER_TYPE := bin
+  LZMA_TEXT_START := 0x82800000
   KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | meraki-header MR18
-# Initramfs-build fails due to size issues
-# KERNEL_INITRAMFS := $$(KERNEL)
-  KERNEL_INITRAMFS :=
+  KERNEL_INITRAMFS := $$(KERNEL)
   IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
   SUPPORTED_DEVICES += mr18
 endef



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:16 -0500
Subject: [openwrt/openwrt]  realtek: add aux-mdio and pinctrl nodes to
 rtl930x.dtsi
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44146.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d45890f6cd508256356f99c11b8a744a30d99cf4

commit d45890f6cd508256356f99c11b8a744a30d99cf4
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sun Jan 19 19:01:28 2025 +0900

    realtek: add aux-mdio and pinctrl nodes to rtl930x.dtsi
    
    Add aux-mdio and pinctrl nodes to rtl930x.dtsi to enable handling of the
    external RTL8231 GPIO expander connected via MDIO.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl930x.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/target/linux/realtek/dts/rtl930x.dtsi b/target/linux/realtek/dts/rtl930x.dtsi
index 9b0a5781a2..94b755aeee 100644
--- a/target/linux/realtek/dts/rtl930x.dtsi
+++ b/target/linux/realtek/dts/rtl930x.dtsi
@@ -143,6 +143,35 @@
 
 	};
 
+	switchcore at 1b000000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x1b000000 0x10000>;
+
+		mdio_aux: mdio-aux {
+			compatible = "realtek,rtl9300-aux-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-0 = <&pinmux_gpio_mdio_en>;
+			pinctrl-names = "default";
+
+			status = "disabled";
+		};
+	};
+
+	pinmux at 1b00c600 {
+		compatible = "pinctrl-single";
+		reg = <0x1b00c600 0x4>;
+
+		pinctrl-single,bit-per-mux;
+		pinctrl-single,register-width = <32>;
+		pinctrl-single,function-mask = <0x1>;
+		#pinctrl-cells = <2>;
+
+		pinmux_gpio_mdio_en: gpio-mdio-en {
+			pinctrl-single,bits = <0x0 0x100 0x100>;
+		};
+	};
+
 	pinmux_led: pinmux at 1b00cc00 {
 		compatible = "pinctrl-single";
 		reg = <0x1b00cc00 0x4>;



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:12 -0500
Subject: [openwrt/openwrt]  tools: firmware-utils: update to Git HEAD
 (2024-01-14)
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44147.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/db0fcc0c8dd4424631931aea5dbb7050fa88d088

commit db0fcc0c8dd4424631931aea5dbb7050fa88d088
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Mon Jan 13 19:46:10 2025 +0900

    tools: firmware-utils: update to Git HEAD (2024-01-14)
    
    12c0b42 nosimg-enc: add new tool for XikeStor SKS8300 series
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 tools/firmware-utils/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile
index 62222b6daf..117dceb754 100644
--- a/tools/firmware-utils/Makefile
+++ b/tools/firmware-utils/Makefile
@@ -11,9 +11,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git
-PKG_SOURCE_DATE:=2024-10-20
-PKG_SOURCE_VERSION:=4b7638925d3eac03e614e40bc30cb49f5877c46d
-PKG_MIRROR_HASH:=ea0e30f2b20211e4153704019ebb3f8789269893a4af6d853a85fae7c091802c
+PKG_SOURCE_DATE:=2025-01-14
+PKG_SOURCE_VERSION:=12c0b42231bee58b3cd7cbe95c33de2685484a4f
+PKG_MIRROR_HASH:=50d872a5069f9f672de5ea9efcf00872bcce27ec52bbb69fff3785abcee1c77c
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:15 -0500
Subject: [openwrt/openwrt]  realtek: rtl930x: enable rtl8231-related drivers
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44148.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/70198cac367d22b32dd6bb3c980d6b1061e55364

commit 70198cac367d22b32dd6bb3c980d6b1061e55364
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sun Jan 19 18:56:15 2025 +0900

    realtek: rtl930x: enable rtl8231-related drivers
    
    Enable the following drivers to use the external RTL8231 GPIO expander.
    
    - aux-mdio
    - rtl8231 (mfd)
    - rtl8231 (pinctrl)
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl930x/config-6.6 | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/target/linux/realtek/rtl930x/config-6.6 b/target/linux/realtek/rtl930x/config-6.6
index f1e5eb96e2..4c53682b1b 100644
--- a/target/linux/realtek/rtl930x/config-6.6
+++ b/target/linux/realtek/rtl930x/config-6.6
@@ -105,6 +105,7 @@ CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_JFFS2_ZLIB=y
 CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_RTL8231 is not set
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MACH_REALTEK_RTL=y
@@ -113,9 +114,9 @@ CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
 CONFIG_MDIO_I2C=y
-# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
+CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y
-# CONFIG_MFD_RTL8231 is not set
+CONFIG_MFD_RTL8231=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
 CONFIG_MIPS=y
@@ -176,6 +177,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHYLIB_LEDS=y
 CONFIG_PHYLINK=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_RTL8231=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_GPIO_RESTART=y
 CONFIG_POWER_RESET_SYSCON=y
@@ -189,6 +191,7 @@ CONFIG_REALTEK_PHY=y
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_MDIO=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y
 # CONFIG_RTL838X is not set



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:13 -0500
Subject: [openwrt/openwrt]  build: add additional parameter support to
 Build/jffs2
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44151.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/5410d1299ebc4ba316bbe16f0d336772731e5245

commit 5410d1299ebc4ba316bbe16f0d336772731e5245
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Mon Jan 13 17:30:26 2025 +0900

    build: add additional parameter support to Build/jffs2
    
    Allow specifying additional parameters on Build/jffs2.
    This is useful to specify additional options or overriding existing
    ones.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 include/image-commands.mk | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/image-commands.mk b/include/image-commands.mk
index aa48e19399..030cd17dd8 100644
--- a/include/image-commands.mk
+++ b/include/image-commands.mk
@@ -438,13 +438,14 @@ endef
 
 define Build/jffs2
 	rm -rf $(KDIR_TMP)/$(DEVICE_NAME)/jffs2 && \
-		mkdir -p $(KDIR_TMP)/$(DEVICE_NAME)/jffs2/$$(dirname $(1)) && \
-		cp $@ $(KDIR_TMP)/$(DEVICE_NAME)/jffs2/$(1) && \
+		mkdir -p $(KDIR_TMP)/$(DEVICE_NAME)/jffs2/$$(dirname $(word 1,$(1))) && \
+		cp $@ $(KDIR_TMP)/$(DEVICE_NAME)/jffs2/$(word 1,$(1)) && \
 		$(STAGING_DIR_HOST)/bin/mkfs.jffs2 --pad \
 			$(if $(CONFIG_BIG_ENDIAN),--big-endian,--little-endian) \
 			--squash-uids -v -e $(patsubst %k,%KiB,$(BLOCKSIZE)) \
 			-o $@.new \
 			-d $(KDIR_TMP)/$(DEVICE_NAME)/jffs2 \
+			$(wordlist 2,$(words $(1)),$(1)) \
 			2>&1 1>/dev/null | awk '/^.+$$$$/' && \
 		$(STAGING_DIR_HOST)/bin/padjffs2 $@.new -J $(patsubst %k,,$(BLOCKSIZE))
 	-rm -rf $(KDIR_TMP)/$(DEVICE_NAME)/jffs2/



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:14 -0500
Subject: [openwrt/openwrt]  realtek: rtl930x: enable HIGHMEM for large memory
 (>256M)
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44152.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ad8bc8900de9c2d6095b93244bfba439cbbc512d

commit ad8bc8900de9c2d6095b93244bfba439cbbc512d
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Sun May 26 02:25:13 2024 +0900

    realtek: rtl930x: enable HIGHMEM for large memory (>256M)
    
    Enable HIGHMEM option to use all ranges of memory on XikeStor SKS8300-8X
    that has 512MiB RAM.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl930x/config-6.6 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/realtek/rtl930x/config-6.6 b/target/linux/realtek/rtl930x/config-6.6
index 5b070a8371..f1e5eb96e2 100644
--- a/target/linux/realtek/rtl930x/config-6.6
+++ b/target/linux/realtek/rtl930x/config-6.6
@@ -85,6 +85,7 @@ CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HIGHMEM=y
 CONFIG_HWMON=y
 CONFIG_HZ_PERIODIC=y
 CONFIG_I2C=y



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:18 -0500
Subject: [openwrt/openwrt]  realtek: suppress debug messages of RTL930x SerDes
 in PHY driver
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44153.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9fc80b684cb4d0d4b632c973bd1b90ca573628d1

commit 9fc80b684cb4d0d4b632c973bd1b90ca573628d1
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Mon Dec 23 21:00:26 2024 +0900

    realtek: suppress debug messages of RTL930x SerDes in PHY driver
    
    Change some debugging messages of RTL930x SerDes in the PHY driver to
    pr_debug() to suppress log messages on the console.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/files-6.6/drivers/net/phy/rtl83xx-phy.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/linux/realtek/files-6.6/drivers/net/phy/rtl83xx-phy.c b/target/linux/realtek/files-6.6/drivers/net/phy/rtl83xx-phy.c
index 09c6ca3b2c..53a7e184f5 100644
--- a/target/linux/realtek/files-6.6/drivers/net/phy/rtl83xx-phy.c
+++ b/target/linux/realtek/files-6.6/drivers/net/phy/rtl83xx-phy.c
@@ -1690,7 +1690,7 @@ static int rtl9300_read_status(struct phy_device *phydev)
 
 		if (of_property_read_u32(dn, "sds", &sds_num))
 			sds_num = -1;
-		pr_info("%s: Port %d, SerDes is %d\n", __func__, phy_addr, sds_num);
+		pr_debug("%s: Port %d, SerDes is %d\n", __func__, phy_addr, sds_num);
 	} else {
 		dev_err(dev, "No DT node.\n");
 		return -EINVAL;
@@ -1700,7 +1700,7 @@ static int rtl9300_read_status(struct phy_device *phydev)
 		return 0;
 
 	mode = rtl9300_sds_mode_get(sds_num);
-	pr_info("%s got SDS mode %02x\n", __func__, mode);
+	pr_debug("%s got SDS mode %02x\n", __func__, mode);
 	if (mode == RTL930X_SDS_OFF)
 		mode = rtl9300_sds_field_r(sds_num, 0x1f, 9, 11, 7);
 	if (mode == RTL930X_SDS_MODE_10GBASER) { /* 10GR mode */
@@ -1715,7 +1715,7 @@ static int rtl9300_read_status(struct phy_device *phydev)
 		latch_status |= rtl9300_sds_field_r(sds_num, 0x1, 30, 8, 0);
 	}
 
-	pr_info("%s link status: status: %d, latch %d\n", __func__, status, latch_status);
+	pr_debug("%s link status: status: %d, latch %d\n", __func__, status, latch_status);
 
 	if (latch_status) {
 		phydev->link = true;



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:17 -0500
Subject: [openwrt/openwrt]  realtek: add 10GBASER to supported interfaces in
 DSA driver
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44154.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/09fbc5d343bb5a5c247c9f302491108de740606f

commit 09fbc5d343bb5a5c247c9f302491108de740606f
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Mon Dec 23 20:58:30 2024 +0900

    realtek: add 10GBASER to supported interfaces in DSA driver
    
    add PHY_INTERFACE_MODE_10GBASER to supported_interfaces for using
    10GBase-*R interfaces on SFP+ ports.
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
index f9d37fb3bd..69151b2f6b 100644
--- a/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
+++ b/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
@@ -686,6 +686,7 @@ static void rtl83xx_phylink_get_caps(struct dsa_switch *ds, int port,
 	__set_bit(PHY_INTERFACE_MODE_XGMII, config->supported_interfaces);
 	__set_bit(PHY_INTERFACE_MODE_USXGMII, config->supported_interfaces);
 	__set_bit(PHY_INTERFACE_MODE_1000BASEX, config->supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_10GBASER, config->supported_interfaces);
 }
 
 static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,



From lede-commits at lists.infradead.org  Tue Jan 21 09:39:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 12:39:19 -0500
Subject: [openwrt/openwrt]  realtek: add support for XikeStor SKS8300-8X
In-Reply-To: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
References: <173748115204.2635554.6069302509866655848@git-01.infra.openwrt.org>
Message-ID: <mailman.44155.1737481312.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0dc0b982950a3e471862925ff1ca5a78d9515821

commit 0dc0b982950a3e471862925ff1ca5a78d9515821
Author: INAGAKI Hiroshi <musashino.open at gmail.com>
AuthorDate: Fri May 24 13:38:02 2024 +0900

    realtek: add support for XikeStor SKS8300-8X
    
    XikeStor (Seeker) SKS8300-8X is a 8 ports Multi-Gig switch, based on
    RTL9303.
    
    Specification:
    
    - SoC             : Realtek RTL9303
    - RAM             : DDR3 512 MiB
    - Flash           : SPI-NOR 32 MiB (Winbond W25Q256JVFIQ)
    - Ethernet        : 8x 1/2.5/10 Gbps (SFP+)
    - LEDs/Keys (GPIO): 1x/1x
    - UART            : "Console" port on the front panel
      - type          : RS-232C
      - connector     : RJ-45
      - settings      : 9600n8
    - Watchdog        : Diodes PT7A7514WE
    - Power           : 12 VDC, 2 A
    
    Flash instruction using initramfs image:
    
     1. Prepare TFTP server with an IP address "192.168.2.36"
     2. Connect your PC to Port1 on SKS8300-8X
     3. Power on SKS8300-8X and interrupt by Ctrl + B
     4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env"
     5. Login to the U-Boot CLI by "debug_unish_env" command
     6. Enable Port1 with the following commands
    
        rtk 10g 0 fiber1g (or fiber10g if 10GBase-*R)
        rtk ext-devInit 0
        rtk ext-pinSet 2 0
    
        Note: the last command sets tx-disable to low
    
     7. Download initramfs image from TFTP server
    
        tftpboot 0x82000000 <image name>
    
     8. Boot with the downloaded image
    
        bootm
    
     9. On the initramfs image, backup the stock firmware if needed
    10. Upload (or download) sysupgrade image to the device
    11. Erase "firmware" partition to cleanup JFFS2 of stock FW
    
        mtd erase firmware
    
    12. Perform sysupgrade with the sysupgrade image
    13. Wait ~120 sec to complete flashing
    
    Notes:
    
    - A kernel binary "nos.img" needs to be stored into JFFS2 filesystem
      using 4KiB erase block instead of 64KiB.
    
    - PT7A7514WE is handled by hardware-assited system LED output
      (blinking).
    
    - Some Japanese users asked to XikeStor about maximum power limit of
      SFP+ ports and got approximate criteria:
    
      - per port       : <=  2.9 W
      - total (8 ports): <= 15.8 W
    
    MAC addresses:
    
    eth0   : 84:E5:D8:xx:xx:37 (board-info (stock:"flash_raw"), 0x218 (hex))
    (ports): 84:E5:D8:xx:xx:36 (board-info (stock:"flash_raw"), 0x1f1 (hex))
    
    Reverting to stock firmware:
    
    1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it
    
       Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
             erase size and not usable for SKS8300-8X
    
    2. Create a directory for working
    3. Download official firmware for SKS8300-8X from XikeStor's official
       website
    4. Rename the downloaded firmware to "nos.img" and place it to the
       working directory
    5. Create a JFFS2 filesystem binary with the working directory
    
       /path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
           -o nos.img.jffs2 -d /path/to/working/dir/
    
    6. Upload the created JFFS2 filesystem binary to the device
    7. Erase the "firmware" partition
    
       mtd erase firmware
    
    8. Write the JFFS2 filesystem binary to the "firmware" partition
    
       mtd write /path/to/nos.img.jffs2 firmware
    
    9. After writing, reboot the device by power cycle
    
    Signed-off-by: INAGAKI Hiroshi <musashino.open at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17593
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/base-files/etc/board.d/02_network      |   3 +
 .../realtek/dts/rtl9303_xikestor_sks8300-8x.dts    | 434 +++++++++++++++++++++
 target/linux/realtek/image/rtl930x.mk              |  18 +
 3 files changed, 455 insertions(+)

diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 1255ee8b9e..16642c273a 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -54,6 +54,9 @@ tplink,t1600g-28ts-v3)
 	label_mac=$(get_mac_label)
 	lan_mac="$label_mac"
 	;;
+xikestor,sks8300-8x)
+	lan_mac=$(mtd_get_mac_binary board-info 0x1f1)
+	;;
 *)
 	lan_mac=$(mtd_get_mac_ascii u-boot-env2 mac_start)
 	lan_mac_end=$(mtd_get_mac_ascii u-boot-env2 mac_end)
diff --git a/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
new file mode 100644
index 0000000000..b143844ddd
--- /dev/null
+++ b/target/linux/realtek/dts/rtl9303_xikestor_sks8300-8x.dts
@@ -0,0 +1,434 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl930x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "xikestor,sks8300-8x", "realtek,rtl930x-soc";
+	model = "XikeStor SKS8300-8X";
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>, /* first 256 MiB */
+		      <0x20000000 0x10000000>; /* remaining 256 MiB */
+	};
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+	};
+
+	chosen {
+		stdout-path = "serial0:9600n8";
+	};
+
+	i2c_master: i2c at 1b00036c {
+		compatible = "realtek,rtl9300-i2c";
+		reg = <0x1b00036c 0x3c>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		scl-pin = <8>;
+		sda-pin = <9>;
+		clock-frequency = <100000>;
+	};
+
+	i2c-mux {
+		compatible = "realtek,i2c-mux-rtl9300";
+		i2c-parent = <&i2c_master>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c0: i2c at 0 {
+			reg = <0>;
+			scl-pin = <8>;
+			sda-pin = <9>;
+		};
+
+		i2c1: i2c at 1 {
+			reg = <1>;
+			scl-pin = <8>;
+			sda-pin = <10>;
+		};
+
+		i2c2: i2c at 2 {
+			reg = <2>;
+			scl-pin = <8>;
+			sda-pin = <11>;
+		};
+
+		i2c3: i2c at 3 {
+			reg = <3>;
+			scl-pin = <8>;
+			sda-pin = <12>;
+		};
+
+		i2c4: i2c at 4 {
+			reg = <4>;
+			scl-pin = <8>;
+			sda-pin = <13>;
+		};
+
+		i2c5: i2c at 5 {
+			reg = <5>;
+			scl-pin = <8>;
+			sda-pin = <14>;
+		};
+
+		i2c6: i2c at 6 {
+			reg = <6>;
+			scl-pin = <8>;
+			sda-pin = <15>;
+		};
+
+		i2c7: i2c at 7 {
+			reg = <7>;
+			scl-pin = <8>;
+			sda-pin = <16>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		button-reset {
+			label = "reset";
+			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: led-0 {
+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+		};
+	};
+
+	led_set {
+		compatible = "realtek,rtl9300-leds";
+		active-low;
+
+		/*
+		 * LED set 0
+		 *
+		 * - LED[0](Green): 10G/LINK/ACT
+		 * - LED[1](Amber): 10M/100M/1G/2.5G/5G/LINK/ACT
+		 */
+		led_set0 = <0x0baa 0x0a01>;
+	};
+
+	sfp0: sfp-p1 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <2900>;
+	};
+
+	sfp1: sfp-p2 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <1500>;
+	};
+
+	sfp2: sfp-p3 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c2>;
+		los-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <1500>;
+	};
+
+	sfp3: sfp-p4 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c3>;
+		los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <2000>;
+	};
+
+	sfp4: sfp-p5 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c4>;
+		los-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <2000>;
+	};
+
+	sfp5: sfp-p6 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c5>;
+		los-gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 22 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <1500>;
+	};
+
+	sfp6: sfp-p7 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c6>;
+		los-gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <1500>;
+	};
+
+	sfp7: sfp-p8 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c7>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		maximum-power-milliwatt = <2900>;
+	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	gpio1: gpio at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x100000>;
+				read-only;
+			};
+
+			/* "flash_raw" on stock */
+			partition at 100000 {
+				label = "board-info";
+				reg = <0x100000 0x30000>;
+				read-only;
+			};
+
+			partition at 130000 {
+				label = "syslog";
+				reg = <0x130000 0xd0000>;
+				read-only;
+			};
+
+			/* "flash_user" on stock */
+			partition at 200000 {
+				compatible = "fixed-partitions";
+				label = "firmware";
+				reg = <0x200000 0x1e00000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition at 0 {
+					label = "kernel";
+					reg = <0x0 0x800000>;
+				};
+
+				partition at 800000 {
+					label = "rootfs";
+					reg = <0x800000 0x1600000>;
+				};
+			};
+		};
+	};
+};
+
+&ethernet0 {
+	mdio: mdio-bus {
+		compatible = "realtek,rtl838x-mdio";
+		regmap = <&ethernet0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy0: ethernet-phy at 0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <0>;
+			sds = <2>;
+		};
+
+		phy8: ethernet-phy at 8 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <8>;
+			sds = <3>;
+		};
+
+		phy16: ethernet-phy at 10 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <16>;
+			sds = <4>;
+		};
+
+		phy20: ethernet-phy at 14 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <20>;
+			sds = <5>;
+		};
+
+		phy24: ethernet-phy at 18 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <24>;
+			sds = <6>;
+		};
+
+		phy25: ethernet-phy at 19 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <25>;
+			sds = <7>;
+		};
+
+		phy26: ethernet-phy at 1a {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <26>;
+			sds = <8>;
+		};
+
+		phy27: ethernet-phy at 1b {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+			reg = <27>;
+			sds = <9>;
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port at 0 {
+			reg = <0>;
+			label = "lan1";
+			phy-handle = <&phy0>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp0>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 8 {
+			reg = <8>;
+			label = "lan2";
+			phy-handle = <&phy8>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp1>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 10 {
+			reg = <16>;
+			label = "lan3";
+			phy-handle = <&phy16>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp2>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 14 {
+			reg = <20>;
+			label = "lan4";
+			phy-handle = <&phy20>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp3>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 18 {
+			reg = <24>;
+			label = "lan5";
+			phy-handle = <&phy24>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp4>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 19 {
+			reg = <25>;
+			label = "lan6";
+			phy-handle = <&phy25>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp5>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 1a {
+			reg = <26>;
+			label = "lan7";
+			phy-handle = <&phy26>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp6>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 1b {
+			reg = <27>;
+			label = "lan8";
+			phy-handle = <&phy27>;
+			phy-mode = "10gbase-r";
+			sfp = <&sfp7>;
+			managed = "in-band-status";
+			led-set = <0>;
+		};
+
+		port at 1c {
+			ethernet = <&ethernet0>;
+			reg = <28>;
+			phy-mode = "internal";
+
+			fixed-link {
+				speed = <10000>;
+				full-duplex;
+			};
+		};
+	};
+};
diff --git a/target/linux/realtek/image/rtl930x.mk b/target/linux/realtek/image/rtl930x.mk
index 7f0b691759..8aff7d52f6 100644
--- a/target/linux/realtek/image/rtl930x.mk
+++ b/target/linux/realtek/image/rtl930x.mk
@@ -1,5 +1,23 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+define Build/xikestor-nosimg
+  $(STAGING_DIR_HOST)/bin/nosimg-enc -i $@ -o $@.new
+  mv $@.new $@
+endef
+
+define Device/xikestor_sks8300-8x
+  SOC := rtl9303
+  DEVICE_VENDOR := XikeStor
+  DEVICE_MODEL := SKS8300-8X
+  BLOCKSIZE := 64k
+  KERNEL_SIZE := 8192k
+  IMAGE_SIZE := 30720k
+  IMAGE/sysupgrade.bin := pad-extra 256 | append-kernel | xikestor-nosimg | \
+	jffs2 nos.img -e 4KiB -x lzma | pad-to $$$$(KERNEL_SIZE) | \
+	append-rootfs | pad-rootfs | append-metadata | check-size
+endef
+TARGET_DEVICES += xikestor_sks8300-8x
+
 define Device/zyxel_xgs1250-12
   SOC := rtl9302
   UIMAGE_MAGIC := 0x93001250



From lede-commits at lists.infradead.org  Tue Jan 21 14:48:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 17:48:10 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.73
In-Reply-To: <173749969059.3260745.7411645779316513191@git-01.infra.openwrt.org>
References: <173749969059.3260745.7411645779316513191@git-01.infra.openwrt.org>
Message-ID: <mailman.44231.1737499694.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/761b244964f8d5da9fbd27a618565b4c38ae0cbc

commit 761b244964f8d5da9fbd27a618565b4c38ae0cbc
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Tue Jan 21 15:07:46 2025 -0500

    kernel: bump 6.6 to 6.6.73
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.73
    
    No patches needed a rebase.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17687
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 include/kernel-6.6 | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 8fa79f9ce1..aa0a345b29 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .72
-LINUX_KERNEL_HASH-6.6.72 = feb9e514930d5968daa0b8b5486d3295d1fb2b34accf876207641884d4baef39
+LINUX_VERSION-6.6 = .73
+LINUX_KERNEL_HASH-6.6.73 = d2028db190c201650898be8db1c705e9fe73ab44fc04290b4f7af63514122490



From lede-commits at lists.infradead.org  Tue Jan 21 14:48:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 21 Jan 2025 17:48:56 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.73
In-Reply-To: <173749973681.3261825.17158736229930309326@git-01.infra.openwrt.org>
References: <173749973681.3261825.17158736229930309326@git-01.infra.openwrt.org>
Message-ID: <mailman.44232.1737499739.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/454dbafd9b34226c83b4c26d415531d235bdc0cf

commit 454dbafd9b34226c83b4c26d415531d235bdc0cf
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Tue Jan 21 15:07:46 2025 -0500

    kernel: bump 6.6 to 6.6.73
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.73
    
    No patches needed a rebase.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17687
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 761b244964f8d5da9fbd27a618565b4c38ae0cbc)
---
 include/kernel-6.6 | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index 8fa79f9ce1..aa0a345b29 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .72
-LINUX_KERNEL_HASH-6.6.72 = feb9e514930d5968daa0b8b5486d3295d1fb2b34accf876207641884d4baef39
+LINUX_VERSION-6.6 = .73
+LINUX_KERNEL_HASH-6.6.73 = d2028db190c201650898be8db1c705e9fe73ab44fc04290b4f7af63514122490



From lede-commits at lists.infradead.org  Tue Jan 21 21:55:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 00:55:50 -0500
Subject: [openwrt/openwrt]  generic: mtk_eth_soc: reduce driver memory usage
In-Reply-To: <173752535019.3810444.17659946664268712556@git-01.infra.openwrt.org>
References: <173752535019.3810444.17659946664268712556@git-01.infra.openwrt.org>
Message-ID: <mailman.44311.1737525353.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/15887235c1e3b732d4c8e14afac253d00a7bfb36

commit 15887235c1e3b732d4c8e14afac253d00a7bfb36
Author: Danila Romanov <pervokur at gmail.com>
AuthorDate: Mon Jan 20 18:40:20 2025 +0300

    generic: mtk_eth_soc: reduce driver memory usage
    
    1. Import pending patch to fix ramips/mt7621 64MB targets.
    
    2. Do not enable CONFIG_PAGE_POOL_STATS by default.
    
    Signed-off-by: Danila Romanov <pervokur at gmail.com>
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...mtk_eth_soc-reduce-rx-ring-size-for-older.patch | 104 +++++++++++++++++++++
 ...t-mtk_eth_soc-do-not-enable-page-pool-sta.patch |  43 +++++++++
 2 files changed, 147 insertions(+)

diff --git a/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch
new file mode 100644
index 0000000000..b492f4d0c0
--- /dev/null
+++ b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch
@@ -0,0 +1,104 @@
+From: Felix Fietkau <nbd at nbd.name>
+Subject: [PATCH net-next 3/4] net: ethernet: mtk_eth_soc: reduce rx ring size for older chipsets
+Date: Tue, 15 Oct 2024 13:09:37 +0200
+
+Commit c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer
+size soc specific") resolved some tx timeout issues by bumping FQ and
+tx ring sizes from 512 to 2048 entries (the value used in the MediaTek
+SDK), however it also changed the rx ring size for all chipsets in the
+same way.
+
+Based on a few tests, it seems that a symmetric rx/tx ring size of 2048
+really only makes sense on MT7988, which is capable of 10G ethernet links.
+
+Older chipsets are typically deployed in systems that are more memory
+constrained and don't actually need the larger rings to handle received
+packets.
+
+In order to reduce wasted memory set the ring size based on the SoC to
+the following values:
+- 2048 on MT7988
+- 1024 on MT7986
+- 512 (previous value) on everything else, except:
+- 256 on RT5350 (the oldest supported chipset)
+
+Fixes: c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer size soc specific")
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -5381,7 +5381,7 @@ static const struct mtk_soc_data mt2701_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5409,7 +5409,7 @@ static const struct mtk_soc_data mt7621_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5439,7 +5439,7 @@ static const struct mtk_soc_data mt7622_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5468,7 +5468,7 @@ static const struct mtk_soc_data mt7623_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5494,7 +5494,7 @@ static const struct mtk_soc_data mt7629_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5526,7 +5526,7 @@ static const struct mtk_soc_data mt7981_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_V2,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 	},
+ };
+ 
+@@ -5556,7 +5556,7 @@ static const struct mtk_soc_data mt7986_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_V2,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(1K),
+ 	},
+ };
+ 
+@@ -5609,7 +5609,7 @@ static const struct mtk_soc_data rt5350_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_PDMA,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(256),
+ 	},
+ };
+ 
diff --git a/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch
new file mode 100644
index 0000000000..ab374d93e4
--- /dev/null
+++ b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch
@@ -0,0 +1,43 @@
+From: Danila Romanov <pervokur at gmail.com>
+Date: Wed, 22 Jan 2025 06:48:45 +0100
+Subject: [PATCH] net: ethernet: mtk_eth_soc: do not enable page pool stats by
+ default
+
+There is no reason for it to be enabled by default.
+Align mtk_eth_soc driver to mt76 driver.
+
+This option incurs additional CPU cost in allocation and recycle paths
+and additional memory cost to store the statistics.
+
+Signed-off-by: Danila Romanov <pervokur at gmail.com>
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/drivers/net/ethernet/mediatek/Kconfig
++++ b/drivers/net/ethernet/mediatek/Kconfig
+@@ -18,7 +18,6 @@ config NET_MEDIATEK_SOC
+ 	select PHYLINK
+ 	select DIMLIB
+ 	select PAGE_POOL
+-	select PAGE_POOL_STATS
+ 	select PCS_MTK_LYNXI
+ 	select REGMAP_MMIO
+ 	help
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -4552,6 +4552,7 @@ static int mtk_get_sset_count(struct net
+ 
+ static void mtk_ethtool_pp_stats(struct mtk_eth *eth, u64 *data)
+ {
++#ifdef CONFIG_PAGE_POOL_STATS
+ 	struct page_pool_stats stats = {};
+ 	int i;
+ 
+@@ -4564,6 +4565,7 @@ static void mtk_ethtool_pp_stats(struct
+ 		page_pool_get_stats(ring->page_pool, &stats);
+ 	}
+ 	page_pool_ethtool_stats_get(data, &stats);
++#endif
+ }
+ 
+ static void mtk_get_ethtool_stats(struct net_device *dev,



From lede-commits at lists.infradead.org  Tue Jan 21 21:56:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 00:56:17 -0500
Subject: [openwrt/openwrt]  generic: mtk_eth_soc: reduce driver memory usage
In-Reply-To: <173752537749.3811303.16217697319188943795@git-01.infra.openwrt.org>
References: <173752537749.3811303.16217697319188943795@git-01.infra.openwrt.org>
Message-ID: <mailman.44312.1737525380.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/642b5b619967ebe91c8051f76b14e2c703703535

commit 642b5b619967ebe91c8051f76b14e2c703703535
Author: Danila Romanov <pervokur at gmail.com>
AuthorDate: Mon Jan 20 18:40:20 2025 +0300

    generic: mtk_eth_soc: reduce driver memory usage
    
    1. Import pending patch to fix ramips/mt7621 64MB targets.
    
    2. Do not enable CONFIG_PAGE_POOL_STATS by default.
    
    Signed-off-by: Danila Romanov <pervokur at gmail.com>
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 15887235c1e3b732d4c8e14afac253d00a7bfb36)
---
 ...mtk_eth_soc-reduce-rx-ring-size-for-older.patch | 104 +++++++++++++++++++++
 ...t-mtk_eth_soc-do-not-enable-page-pool-sta.patch |  43 +++++++++
 2 files changed, 147 insertions(+)

diff --git a/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch
new file mode 100644
index 0000000000..b492f4d0c0
--- /dev/null
+++ b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch
@@ -0,0 +1,104 @@
+From: Felix Fietkau <nbd at nbd.name>
+Subject: [PATCH net-next 3/4] net: ethernet: mtk_eth_soc: reduce rx ring size for older chipsets
+Date: Tue, 15 Oct 2024 13:09:37 +0200
+
+Commit c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer
+size soc specific") resolved some tx timeout issues by bumping FQ and
+tx ring sizes from 512 to 2048 entries (the value used in the MediaTek
+SDK), however it also changed the rx ring size for all chipsets in the
+same way.
+
+Based on a few tests, it seems that a symmetric rx/tx ring size of 2048
+really only makes sense on MT7988, which is capable of 10G ethernet links.
+
+Older chipsets are typically deployed in systems that are more memory
+constrained and don't actually need the larger rings to handle received
+packets.
+
+In order to reduce wasted memory set the ring size based on the SoC to
+the following values:
+- 2048 on MT7988
+- 1024 on MT7986
+- 512 (previous value) on everything else, except:
+- 256 on RT5350 (the oldest supported chipset)
+
+Fixes: c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer size soc specific")
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -5381,7 +5381,7 @@ static const struct mtk_soc_data mt2701_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5409,7 +5409,7 @@ static const struct mtk_soc_data mt7621_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5439,7 +5439,7 @@ static const struct mtk_soc_data mt7622_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5468,7 +5468,7 @@ static const struct mtk_soc_data mt7623_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5494,7 +5494,7 @@ static const struct mtk_soc_data mt7629_
+ 		.desc_size = sizeof(struct mtk_rx_dma),
+ 		.irq_done_mask = MTK_RX_DONE_INT,
+ 		.dma_l4_valid = RX_DMA_L4_VALID,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+ 	},
+@@ -5526,7 +5526,7 @@ static const struct mtk_soc_data mt7981_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_V2,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(512),
+ 	},
+ };
+ 
+@@ -5556,7 +5556,7 @@ static const struct mtk_soc_data mt7986_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_V2,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(1K),
+ 	},
+ };
+ 
+@@ -5609,7 +5609,7 @@ static const struct mtk_soc_data rt5350_
+ 		.dma_l4_valid = RX_DMA_L4_VALID_PDMA,
+ 		.dma_max_len = MTK_TX_DMA_BUF_LEN,
+ 		.dma_len_offset = 16,
+-		.dma_size = MTK_DMA_SIZE(2K),
++		.dma_size = MTK_DMA_SIZE(256),
+ 	},
+ };
+ 
diff --git a/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch
new file mode 100644
index 0000000000..ab374d93e4
--- /dev/null
+++ b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch
@@ -0,0 +1,43 @@
+From: Danila Romanov <pervokur at gmail.com>
+Date: Wed, 22 Jan 2025 06:48:45 +0100
+Subject: [PATCH] net: ethernet: mtk_eth_soc: do not enable page pool stats by
+ default
+
+There is no reason for it to be enabled by default.
+Align mtk_eth_soc driver to mt76 driver.
+
+This option incurs additional CPU cost in allocation and recycle paths
+and additional memory cost to store the statistics.
+
+Signed-off-by: Danila Romanov <pervokur at gmail.com>
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/drivers/net/ethernet/mediatek/Kconfig
++++ b/drivers/net/ethernet/mediatek/Kconfig
+@@ -18,7 +18,6 @@ config NET_MEDIATEK_SOC
+ 	select PHYLINK
+ 	select DIMLIB
+ 	select PAGE_POOL
+-	select PAGE_POOL_STATS
+ 	select PCS_MTK_LYNXI
+ 	select REGMAP_MMIO
+ 	help
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -4552,6 +4552,7 @@ static int mtk_get_sset_count(struct net
+ 
+ static void mtk_ethtool_pp_stats(struct mtk_eth *eth, u64 *data)
+ {
++#ifdef CONFIG_PAGE_POOL_STATS
+ 	struct page_pool_stats stats = {};
+ 	int i;
+ 
+@@ -4564,6 +4565,7 @@ static void mtk_ethtool_pp_stats(struct
+ 		page_pool_get_stats(ring->page_pool, &stats);
+ 	}
+ 	page_pool_ethtool_stats_get(data, &stats);
++#endif
+ }
+ 
+ static void mtk_get_ethtool_stats(struct net_device *dev,



From lede-commits at lists.infradead.org  Wed Jan 22 03:39:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 06:39:32 -0500
Subject: [openwrt/openwrt]  kernel: backport improvement to page pool fragment
 handling from 6.7
In-Reply-To: <173754597282.418707.931201544862579466@git-01.infra.openwrt.org>
References: <173754597282.418707.931201544862579466@git-01.infra.openwrt.org>
Message-ID: <mailman.44518.1737546122.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9508ca44eb577a13e795e0a6c5683689efc61475

commit 9508ca44eb577a13e795e0a6c5683689efc61475
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 22 12:11:56 2025 +0100

    kernel: backport improvement to page pool fragment handling from 6.7
    
    Makes it easier to keep drivers like mt76 in sync with newer versions
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...ragment-API-support-for-32-bit-arch-with-.patch | 139 ++++++++++++++++
 ...nify-frag_count-handling-in-page_pool_is_.patch | 183 +++++++++++++++++++++
 2 files changed, 322 insertions(+)

diff --git a/target/linux/generic/backport-6.6/620-01-page_pool-fragment-API-support-for-32-bit-arch-with-.patch b/target/linux/generic/backport-6.6/620-01-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
new file mode 100644
index 0000000000..0f57e2ec66
--- /dev/null
+++ b/target/linux/generic/backport-6.6/620-01-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
@@ -0,0 +1,139 @@
+From: Yunsheng Lin <linyunsheng at huawei.com>
+Date: Fri, 13 Oct 2023 14:48:21 +0800
+Subject: [PATCH] page_pool: fragment API support for 32-bit arch with 64-bit
+ DMA
+
+Currently page_pool_alloc_frag() is not supported in 32-bit
+arch with 64-bit DMA because of the overlap issue between
+pp_frag_count and dma_addr_upper in 'struct page' for those
+arches, which seems to be quite common, see [1], which means
+driver may need to handle it when using fragment API.
+
+It is assumed that the combination of the above arch with an
+address space >16TB does not exist, as all those arches have
+64b equivalent, it seems logical to use the 64b version for a
+system with a large address space. It is also assumed that dma
+address is page aligned when we are dma mapping a page aligned
+buffer, see [2].
+
+That means we're storing 12 bits of 0 at the lower end for a
+dma address, we can reuse those bits for the above arches to
+support 32b+12b, which is 16TB of memory.
+
+If we make a wrong assumption, a warning is emitted so that
+user can report to us.
+
+1. https://lore.kernel.org/all/20211117075652.58299-1-linyunsheng at huawei.com/
+2. https://lore.kernel.org/all/20230818145145.4b357c89 at kernel.org/
+
+Tested-by: Alexander Lobakin <aleksander.lobakin at intel.com>
+Signed-off-by: Yunsheng Lin <linyunsheng at huawei.com>
+CC: Lorenzo Bianconi <lorenzo at kernel.org>
+CC: Alexander Duyck <alexander.duyck at gmail.com>
+CC: Liang Chen <liangchen.linux at gmail.com>
+CC: Guillaume Tucker <guillaume.tucker at collabora.com>
+CC: Matthew Wilcox <willy at infradead.org>
+CC: Linux-MM <linux-mm at kvack.org>
+Link: https://lore.kernel.org/r/20231013064827.61135-2-linyunsheng at huawei.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+
+--- a/include/linux/mm_types.h
++++ b/include/linux/mm_types.h
+@@ -125,18 +125,7 @@ struct page {
+ 			struct page_pool *pp;
+ 			unsigned long _pp_mapping_pad;
+ 			unsigned long dma_addr;
+-			union {
+-				/**
+-				 * dma_addr_upper: might require a 64-bit
+-				 * value on 32-bit architectures.
+-				 */
+-				unsigned long dma_addr_upper;
+-				/**
+-				 * For frag page support, not supported in
+-				 * 32-bit architectures with 64-bit DMA.
+-				 */
+-				atomic_long_t pp_frag_count;
+-			};
++			atomic_long_t pp_frag_count;
+ 		};
+ 		struct {	/* Tail pages of compound page */
+ 			unsigned long compound_head;	/* Bit zero is set */
+--- a/include/net/page_pool/helpers.h
++++ b/include/net/page_pool/helpers.h
+@@ -197,7 +197,7 @@ static inline void page_pool_recycle_dir
+ 	page_pool_put_full_page(pool, page, true);
+ }
+ 
+-#define PAGE_POOL_DMA_USE_PP_FRAG_COUNT	\
++#define PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA	\
+ 		(sizeof(dma_addr_t) > sizeof(unsigned long))
+ 
+ /**
+@@ -211,17 +211,25 @@ static inline dma_addr_t page_pool_get_d
+ {
+ 	dma_addr_t ret = page->dma_addr;
+ 
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT)
+-		ret |= (dma_addr_t)page->dma_addr_upper << 16 << 16;
++	if (PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA)
++		ret <<= PAGE_SHIFT;
+ 
+ 	return ret;
+ }
+ 
+-static inline void page_pool_set_dma_addr(struct page *page, dma_addr_t addr)
++static inline bool page_pool_set_dma_addr(struct page *page, dma_addr_t addr)
+ {
++	if (PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA) {
++		page->dma_addr = addr >> PAGE_SHIFT;
++
++		/* We assume page alignment to shave off bottom bits,
++		 * if this "compression" doesn't work we need to drop.
++		 */
++		return addr != (dma_addr_t)page->dma_addr << PAGE_SHIFT;
++	}
++
+ 	page->dma_addr = addr;
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT)
+-		page->dma_addr_upper = upper_32_bits(addr);
++	return false;
+ }
+ 
+ static inline bool page_pool_put(struct page_pool *pool)
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -211,10 +211,6 @@ static int page_pool_init(struct page_po
+ 		 */
+ 	}
+ 
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT &&
+-	    pool->p.flags & PP_FLAG_PAGE_FRAG)
+-		return -EINVAL;
+-
+ #ifdef CONFIG_PAGE_POOL_STATS
+ 	pool->recycle_stats = alloc_percpu(struct page_pool_recycle_stats);
+ 	if (!pool->recycle_stats)
+@@ -363,12 +359,20 @@ static bool page_pool_dma_map(struct pag
+ 	if (dma_mapping_error(pool->p.dev, dma))
+ 		return false;
+ 
+-	page_pool_set_dma_addr(page, dma);
++	if (page_pool_set_dma_addr(page, dma))
++		goto unmap_failed;
+ 
+ 	if (pool->p.flags & PP_FLAG_DMA_SYNC_DEV)
+ 		page_pool_dma_sync_for_device(pool, page, pool->p.max_len);
+ 
+ 	return true;
++
++unmap_failed:
++	WARN_ON_ONCE("unexpected DMA address, please report to netdev@");
++	dma_unmap_page_attrs(pool->p.dev, dma,
++			     PAGE_SIZE << pool->p.order, pool->p.dma_dir,
++			     DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);
++	return false;
+ }
+ 
+ static void page_pool_set_pp_info(struct page_pool *pool,
diff --git a/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch b/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch
new file mode 100644
index 0000000000..1ad0eb449d
--- /dev/null
+++ b/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch
@@ -0,0 +1,183 @@
+From: Yunsheng Lin <linyunsheng at huawei.com>
+Date: Fri, 20 Oct 2023 17:59:48 +0800
+Subject: [PATCH] page_pool: unify frag_count handling in
+ page_pool_is_last_frag()
+
+Currently when page_pool_create() is called with
+PP_FLAG_PAGE_FRAG flag, page_pool_alloc_pages() is only
+allowed to be called under the below constraints:
+1. page_pool_fragment_page() need to be called to setup
+   page->pp_frag_count immediately.
+2. page_pool_defrag_page() often need to be called to drain
+   the page->pp_frag_count when there is no more user will
+   be holding on to that page.
+
+Those constraints exist in order to support a page to be
+split into multi fragments.
+
+And those constraints have some overhead because of the
+cache line dirtying/bouncing and atomic update.
+
+Those constraints are unavoidable for case when we need a
+page to be split into more than one fragment, but there is
+also case that we want to avoid the above constraints and
+their overhead when a page can't be split as it can only
+hold a fragment as requested by user, depending on different
+use cases:
+use case 1: allocate page without page splitting.
+use case 2: allocate page with page splitting.
+use case 3: allocate page with or without page splitting
+            depending on the fragment size.
+
+Currently page pool only provide page_pool_alloc_pages() and
+page_pool_alloc_frag() API to enable the 1 & 2 separately,
+so we can not use a combination of 1 & 2 to enable 3, it is
+not possible yet because of the per page_pool flag
+PP_FLAG_PAGE_FRAG.
+
+So in order to allow allocating unsplit page without the
+overhead of split page while still allow allocating split
+page we need to remove the per page_pool flag in
+page_pool_is_last_frag(), as best as I can think of, it seems
+there are two methods as below:
+1. Add per page flag/bit to indicate a page is split or
+   not, which means we might need to update that flag/bit
+   everytime the page is recycled, dirtying the cache line
+   of 'struct page' for use case 1.
+2. Unify the page->pp_frag_count handling for both split and
+   unsplit page by assuming all pages in the page pool is split
+   into a big fragment initially.
+
+As page pool already supports use case 1 without dirtying the
+cache line of 'struct page' whenever a page is recyclable, we
+need to support the above use case 3 with minimal overhead,
+especially not adding any noticeable overhead for use case 1,
+and we are already doing an optimization by not updating
+pp_frag_count in page_pool_defrag_page() for the last fragment
+user, this patch chooses to unify the pp_frag_count handling
+to support the above use case 3.
+
+There is no noticeable performance degradation and some
+justification for unifying the frag_count handling with this
+patch applied using a micro-benchmark testing in [1].
+
+1. https://lore.kernel.org/all/bf2591f8-7b3c-4480-bb2c-31dc9da1d6ac at huawei.com/
+
+Signed-off-by: Yunsheng Lin <linyunsheng at huawei.com>
+CC: Lorenzo Bianconi <lorenzo at kernel.org>
+CC: Alexander Duyck <alexander.duyck at gmail.com>
+CC: Liang Chen <liangchen.linux at gmail.com>
+CC: Alexander Lobakin <aleksander.lobakin at intel.com>
+Link: https://lore.kernel.org/r/20231020095952.11055-2-linyunsheng at huawei.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+
+--- a/include/net/page_pool/helpers.h
++++ b/include/net/page_pool/helpers.h
+@@ -115,28 +115,49 @@ static inline long page_pool_defrag_page
+ 	long ret;
+ 
+ 	/* If nr == pp_frag_count then we have cleared all remaining
+-	 * references to the page. No need to actually overwrite it, instead
+-	 * we can leave this to be overwritten by the calling function.
++	 * references to the page:
++	 * 1. 'n == 1': no need to actually overwrite it.
++	 * 2. 'n != 1': overwrite it with one, which is the rare case
++	 *              for pp_frag_count draining.
+ 	 *
+-	 * The main advantage to doing this is that an atomic_read is
+-	 * generally a much cheaper operation than an atomic update,
+-	 * especially when dealing with a page that may be partitioned
+-	 * into only 2 or 3 pieces.
++	 * The main advantage to doing this is that not only we avoid a atomic
++	 * update, as an atomic_read is generally a much cheaper operation than
++	 * an atomic update, especially when dealing with a page that may be
++	 * partitioned into only 2 or 3 pieces; but also unify the pp_frag_count
++	 * handling by ensuring all pages have partitioned into only 1 piece
++	 * initially, and only overwrite it when the page is partitioned into
++	 * more than one piece.
+ 	 */
+-	if (atomic_long_read(&page->pp_frag_count) == nr)
++	if (atomic_long_read(&page->pp_frag_count) == nr) {
++		/* As we have ensured nr is always one for constant case using
++		 * the BUILD_BUG_ON(), only need to handle the non-constant case
++		 * here for pp_frag_count draining, which is a rare case.
++		 */
++		BUILD_BUG_ON(__builtin_constant_p(nr) && nr != 1);
++		if (!__builtin_constant_p(nr))
++			atomic_long_set(&page->pp_frag_count, 1);
++
+ 		return 0;
++	}
+ 
+ 	ret = atomic_long_sub_return(nr, &page->pp_frag_count);
+ 	WARN_ON(ret < 0);
++
++	/* We are the last user here too, reset pp_frag_count back to 1 to
++	 * ensure all pages have been partitioned into 1 piece initially,
++	 * this should be the rare case when the last two fragment users call
++	 * page_pool_defrag_page() currently.
++	 */
++	if (unlikely(!ret))
++		atomic_long_set(&page->pp_frag_count, 1);
++
+ 	return ret;
+ }
+ 
+-static inline bool page_pool_is_last_frag(struct page_pool *pool,
+-					  struct page *page)
++static inline bool page_pool_is_last_frag(struct page *page)
+ {
+-	/* If fragments aren't enabled or count is 0 we were the last user */
+-	return !(pool->p.flags & PP_FLAG_PAGE_FRAG) ||
+-	       (page_pool_defrag_page(page, 1) == 0);
++	/* If page_pool_defrag_page() returns 0, we were the last user */
++	return page_pool_defrag_page(page, 1) == 0;
+ }
+ 
+ /**
+@@ -161,7 +182,7 @@ static inline void page_pool_put_page(st
+ 	 * allow registering MEM_TYPE_PAGE_POOL, but shield linker.
+ 	 */
+ #ifdef CONFIG_PAGE_POOL
+-	if (!page_pool_is_last_frag(pool, page))
++	if (!page_pool_is_last_frag(page))
+ 		return;
+ 
+ 	page_pool_put_defragged_page(pool, page, dma_sync_size, allow_direct);
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -380,6 +380,14 @@ static void page_pool_set_pp_info(struct
+ {
+ 	page->pp = pool;
+ 	page->pp_magic |= PP_SIGNATURE;
++
++	/* Ensuring all pages have been split into one fragment initially:
++	 * page_pool_set_pp_info() is only called once for every page when it
++	 * is allocated from the page allocator and page_pool_fragment_page()
++	 * is dirtying the same cache line as the page->pp_magic above, so
++	 * the overhead is negligible.
++	 */
++	page_pool_fragment_page(page, 1);
+ 	if (pool->p.init_callback)
+ 		pool->p.init_callback(page, pool->p.init_arg);
+ }
+@@ -676,7 +684,7 @@ void page_pool_put_page_bulk(struct page
+ 		struct page *page = virt_to_head_page(data[i]);
+ 
+ 		/* It is not the last user for the page frag case */
+-		if (!page_pool_is_last_frag(pool, page))
++		if (!page_pool_is_last_frag(page))
+ 			continue;
+ 
+ 		page = __page_pool_put_page(pool, page, -1, false);
+@@ -752,8 +760,7 @@ struct page *page_pool_alloc_frag(struct
+ 	unsigned int max_size = PAGE_SIZE << pool->p.order;
+ 	struct page *page = pool->frag_page;
+ 
+-	if (WARN_ON(!(pool->p.flags & PP_FLAG_PAGE_FRAG) ||
+-		    size > max_size))
++	if (WARN_ON(size > max_size))
+ 		return NULL;
+ 
+ 	size = ALIGN(size, dma_get_cache_alignment());



From lede-commits at lists.infradead.org  Wed Jan 22 03:41:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 06:41:11 -0500
Subject: [openwrt/openwrt]  kernel: add missing version number to the page
 pool backport patch
In-Reply-To: <173754607184.420639.7832411016129578839@git-01.infra.openwrt.org>
References: <173754607184.420639.7832411016129578839@git-01.infra.openwrt.org>
Message-ID: <mailman.44521.1737546122.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/478041997f068c87c6356108cf3dc3b667666dd5

commit 478041997f068c87c6356108cf3dc3b667666dd5
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 22 12:40:57 2025 +0100

    kernel: add missing version number to the page pool backport patch
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...20-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch} | 0
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/target/linux/generic/backport-6.6/620-01-page_pool-fragment-API-support-for-32-bit-arch-with-.patch b/target/linux/generic/backport-6.6/620-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/620-01-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
rename to target/linux/generic/backport-6.6/620-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch



From lede-commits at lists.infradead.org  Wed Jan 22 03:42:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 06:42:09 -0500
Subject: [openwrt/openwrt]  kernel: backport improvement to page pool fragment
 handling from 6.7
In-Reply-To: <173754612944.421311.3884046243079297622@git-01.infra.openwrt.org>
References: <173754612944.421311.3884046243079297622@git-01.infra.openwrt.org>
Message-ID: <mailman.44522.1737546138.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/419ef19dba74f5259d1579d4c5c57b4785de46f0

commit 419ef19dba74f5259d1579d4c5c57b4785de46f0
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 22 12:11:56 2025 +0100

    kernel: backport improvement to page pool fragment handling from 6.7
    
    Makes it easier to keep drivers like mt76 in sync with newer versions
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 9508ca44eb577a13e795e0a6c5683689efc61475)
    (cherry picked from commit 478041997f068c87c6356108cf3dc3b667666dd5)
---
 ...ragment-API-support-for-32-bit-arch-with-.patch | 139 ++++++++++++++++
 ...nify-frag_count-handling-in-page_pool_is_.patch | 183 +++++++++++++++++++++
 2 files changed, 322 insertions(+)

diff --git a/target/linux/generic/backport-6.6/620-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch b/target/linux/generic/backport-6.6/620-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
new file mode 100644
index 0000000000..0f57e2ec66
--- /dev/null
+++ b/target/linux/generic/backport-6.6/620-01-v6.7-page_pool-fragment-API-support-for-32-bit-arch-with-.patch
@@ -0,0 +1,139 @@
+From: Yunsheng Lin <linyunsheng at huawei.com>
+Date: Fri, 13 Oct 2023 14:48:21 +0800
+Subject: [PATCH] page_pool: fragment API support for 32-bit arch with 64-bit
+ DMA
+
+Currently page_pool_alloc_frag() is not supported in 32-bit
+arch with 64-bit DMA because of the overlap issue between
+pp_frag_count and dma_addr_upper in 'struct page' for those
+arches, which seems to be quite common, see [1], which means
+driver may need to handle it when using fragment API.
+
+It is assumed that the combination of the above arch with an
+address space >16TB does not exist, as all those arches have
+64b equivalent, it seems logical to use the 64b version for a
+system with a large address space. It is also assumed that dma
+address is page aligned when we are dma mapping a page aligned
+buffer, see [2].
+
+That means we're storing 12 bits of 0 at the lower end for a
+dma address, we can reuse those bits for the above arches to
+support 32b+12b, which is 16TB of memory.
+
+If we make a wrong assumption, a warning is emitted so that
+user can report to us.
+
+1. https://lore.kernel.org/all/20211117075652.58299-1-linyunsheng at huawei.com/
+2. https://lore.kernel.org/all/20230818145145.4b357c89 at kernel.org/
+
+Tested-by: Alexander Lobakin <aleksander.lobakin at intel.com>
+Signed-off-by: Yunsheng Lin <linyunsheng at huawei.com>
+CC: Lorenzo Bianconi <lorenzo at kernel.org>
+CC: Alexander Duyck <alexander.duyck at gmail.com>
+CC: Liang Chen <liangchen.linux at gmail.com>
+CC: Guillaume Tucker <guillaume.tucker at collabora.com>
+CC: Matthew Wilcox <willy at infradead.org>
+CC: Linux-MM <linux-mm at kvack.org>
+Link: https://lore.kernel.org/r/20231013064827.61135-2-linyunsheng at huawei.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+
+--- a/include/linux/mm_types.h
++++ b/include/linux/mm_types.h
+@@ -125,18 +125,7 @@ struct page {
+ 			struct page_pool *pp;
+ 			unsigned long _pp_mapping_pad;
+ 			unsigned long dma_addr;
+-			union {
+-				/**
+-				 * dma_addr_upper: might require a 64-bit
+-				 * value on 32-bit architectures.
+-				 */
+-				unsigned long dma_addr_upper;
+-				/**
+-				 * For frag page support, not supported in
+-				 * 32-bit architectures with 64-bit DMA.
+-				 */
+-				atomic_long_t pp_frag_count;
+-			};
++			atomic_long_t pp_frag_count;
+ 		};
+ 		struct {	/* Tail pages of compound page */
+ 			unsigned long compound_head;	/* Bit zero is set */
+--- a/include/net/page_pool/helpers.h
++++ b/include/net/page_pool/helpers.h
+@@ -197,7 +197,7 @@ static inline void page_pool_recycle_dir
+ 	page_pool_put_full_page(pool, page, true);
+ }
+ 
+-#define PAGE_POOL_DMA_USE_PP_FRAG_COUNT	\
++#define PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA	\
+ 		(sizeof(dma_addr_t) > sizeof(unsigned long))
+ 
+ /**
+@@ -211,17 +211,25 @@ static inline dma_addr_t page_pool_get_d
+ {
+ 	dma_addr_t ret = page->dma_addr;
+ 
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT)
+-		ret |= (dma_addr_t)page->dma_addr_upper << 16 << 16;
++	if (PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA)
++		ret <<= PAGE_SHIFT;
+ 
+ 	return ret;
+ }
+ 
+-static inline void page_pool_set_dma_addr(struct page *page, dma_addr_t addr)
++static inline bool page_pool_set_dma_addr(struct page *page, dma_addr_t addr)
+ {
++	if (PAGE_POOL_32BIT_ARCH_WITH_64BIT_DMA) {
++		page->dma_addr = addr >> PAGE_SHIFT;
++
++		/* We assume page alignment to shave off bottom bits,
++		 * if this "compression" doesn't work we need to drop.
++		 */
++		return addr != (dma_addr_t)page->dma_addr << PAGE_SHIFT;
++	}
++
+ 	page->dma_addr = addr;
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT)
+-		page->dma_addr_upper = upper_32_bits(addr);
++	return false;
+ }
+ 
+ static inline bool page_pool_put(struct page_pool *pool)
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -211,10 +211,6 @@ static int page_pool_init(struct page_po
+ 		 */
+ 	}
+ 
+-	if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT &&
+-	    pool->p.flags & PP_FLAG_PAGE_FRAG)
+-		return -EINVAL;
+-
+ #ifdef CONFIG_PAGE_POOL_STATS
+ 	pool->recycle_stats = alloc_percpu(struct page_pool_recycle_stats);
+ 	if (!pool->recycle_stats)
+@@ -363,12 +359,20 @@ static bool page_pool_dma_map(struct pag
+ 	if (dma_mapping_error(pool->p.dev, dma))
+ 		return false;
+ 
+-	page_pool_set_dma_addr(page, dma);
++	if (page_pool_set_dma_addr(page, dma))
++		goto unmap_failed;
+ 
+ 	if (pool->p.flags & PP_FLAG_DMA_SYNC_DEV)
+ 		page_pool_dma_sync_for_device(pool, page, pool->p.max_len);
+ 
+ 	return true;
++
++unmap_failed:
++	WARN_ON_ONCE("unexpected DMA address, please report to netdev@");
++	dma_unmap_page_attrs(pool->p.dev, dma,
++			     PAGE_SIZE << pool->p.order, pool->p.dma_dir,
++			     DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);
++	return false;
+ }
+ 
+ static void page_pool_set_pp_info(struct page_pool *pool,
diff --git a/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch b/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch
new file mode 100644
index 0000000000..1ad0eb449d
--- /dev/null
+++ b/target/linux/generic/backport-6.6/620-02-v6.7-page_pool-unify-frag_count-handling-in-page_pool_is_.patch
@@ -0,0 +1,183 @@
+From: Yunsheng Lin <linyunsheng at huawei.com>
+Date: Fri, 20 Oct 2023 17:59:48 +0800
+Subject: [PATCH] page_pool: unify frag_count handling in
+ page_pool_is_last_frag()
+
+Currently when page_pool_create() is called with
+PP_FLAG_PAGE_FRAG flag, page_pool_alloc_pages() is only
+allowed to be called under the below constraints:
+1. page_pool_fragment_page() need to be called to setup
+   page->pp_frag_count immediately.
+2. page_pool_defrag_page() often need to be called to drain
+   the page->pp_frag_count when there is no more user will
+   be holding on to that page.
+
+Those constraints exist in order to support a page to be
+split into multi fragments.
+
+And those constraints have some overhead because of the
+cache line dirtying/bouncing and atomic update.
+
+Those constraints are unavoidable for case when we need a
+page to be split into more than one fragment, but there is
+also case that we want to avoid the above constraints and
+their overhead when a page can't be split as it can only
+hold a fragment as requested by user, depending on different
+use cases:
+use case 1: allocate page without page splitting.
+use case 2: allocate page with page splitting.
+use case 3: allocate page with or without page splitting
+            depending on the fragment size.
+
+Currently page pool only provide page_pool_alloc_pages() and
+page_pool_alloc_frag() API to enable the 1 & 2 separately,
+so we can not use a combination of 1 & 2 to enable 3, it is
+not possible yet because of the per page_pool flag
+PP_FLAG_PAGE_FRAG.
+
+So in order to allow allocating unsplit page without the
+overhead of split page while still allow allocating split
+page we need to remove the per page_pool flag in
+page_pool_is_last_frag(), as best as I can think of, it seems
+there are two methods as below:
+1. Add per page flag/bit to indicate a page is split or
+   not, which means we might need to update that flag/bit
+   everytime the page is recycled, dirtying the cache line
+   of 'struct page' for use case 1.
+2. Unify the page->pp_frag_count handling for both split and
+   unsplit page by assuming all pages in the page pool is split
+   into a big fragment initially.
+
+As page pool already supports use case 1 without dirtying the
+cache line of 'struct page' whenever a page is recyclable, we
+need to support the above use case 3 with minimal overhead,
+especially not adding any noticeable overhead for use case 1,
+and we are already doing an optimization by not updating
+pp_frag_count in page_pool_defrag_page() for the last fragment
+user, this patch chooses to unify the pp_frag_count handling
+to support the above use case 3.
+
+There is no noticeable performance degradation and some
+justification for unifying the frag_count handling with this
+patch applied using a micro-benchmark testing in [1].
+
+1. https://lore.kernel.org/all/bf2591f8-7b3c-4480-bb2c-31dc9da1d6ac at huawei.com/
+
+Signed-off-by: Yunsheng Lin <linyunsheng at huawei.com>
+CC: Lorenzo Bianconi <lorenzo at kernel.org>
+CC: Alexander Duyck <alexander.duyck at gmail.com>
+CC: Liang Chen <liangchen.linux at gmail.com>
+CC: Alexander Lobakin <aleksander.lobakin at intel.com>
+Link: https://lore.kernel.org/r/20231020095952.11055-2-linyunsheng at huawei.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+
+--- a/include/net/page_pool/helpers.h
++++ b/include/net/page_pool/helpers.h
+@@ -115,28 +115,49 @@ static inline long page_pool_defrag_page
+ 	long ret;
+ 
+ 	/* If nr == pp_frag_count then we have cleared all remaining
+-	 * references to the page. No need to actually overwrite it, instead
+-	 * we can leave this to be overwritten by the calling function.
++	 * references to the page:
++	 * 1. 'n == 1': no need to actually overwrite it.
++	 * 2. 'n != 1': overwrite it with one, which is the rare case
++	 *              for pp_frag_count draining.
+ 	 *
+-	 * The main advantage to doing this is that an atomic_read is
+-	 * generally a much cheaper operation than an atomic update,
+-	 * especially when dealing with a page that may be partitioned
+-	 * into only 2 or 3 pieces.
++	 * The main advantage to doing this is that not only we avoid a atomic
++	 * update, as an atomic_read is generally a much cheaper operation than
++	 * an atomic update, especially when dealing with a page that may be
++	 * partitioned into only 2 or 3 pieces; but also unify the pp_frag_count
++	 * handling by ensuring all pages have partitioned into only 1 piece
++	 * initially, and only overwrite it when the page is partitioned into
++	 * more than one piece.
+ 	 */
+-	if (atomic_long_read(&page->pp_frag_count) == nr)
++	if (atomic_long_read(&page->pp_frag_count) == nr) {
++		/* As we have ensured nr is always one for constant case using
++		 * the BUILD_BUG_ON(), only need to handle the non-constant case
++		 * here for pp_frag_count draining, which is a rare case.
++		 */
++		BUILD_BUG_ON(__builtin_constant_p(nr) && nr != 1);
++		if (!__builtin_constant_p(nr))
++			atomic_long_set(&page->pp_frag_count, 1);
++
+ 		return 0;
++	}
+ 
+ 	ret = atomic_long_sub_return(nr, &page->pp_frag_count);
+ 	WARN_ON(ret < 0);
++
++	/* We are the last user here too, reset pp_frag_count back to 1 to
++	 * ensure all pages have been partitioned into 1 piece initially,
++	 * this should be the rare case when the last two fragment users call
++	 * page_pool_defrag_page() currently.
++	 */
++	if (unlikely(!ret))
++		atomic_long_set(&page->pp_frag_count, 1);
++
+ 	return ret;
+ }
+ 
+-static inline bool page_pool_is_last_frag(struct page_pool *pool,
+-					  struct page *page)
++static inline bool page_pool_is_last_frag(struct page *page)
+ {
+-	/* If fragments aren't enabled or count is 0 we were the last user */
+-	return !(pool->p.flags & PP_FLAG_PAGE_FRAG) ||
+-	       (page_pool_defrag_page(page, 1) == 0);
++	/* If page_pool_defrag_page() returns 0, we were the last user */
++	return page_pool_defrag_page(page, 1) == 0;
+ }
+ 
+ /**
+@@ -161,7 +182,7 @@ static inline void page_pool_put_page(st
+ 	 * allow registering MEM_TYPE_PAGE_POOL, but shield linker.
+ 	 */
+ #ifdef CONFIG_PAGE_POOL
+-	if (!page_pool_is_last_frag(pool, page))
++	if (!page_pool_is_last_frag(page))
+ 		return;
+ 
+ 	page_pool_put_defragged_page(pool, page, dma_sync_size, allow_direct);
+--- a/net/core/page_pool.c
++++ b/net/core/page_pool.c
+@@ -380,6 +380,14 @@ static void page_pool_set_pp_info(struct
+ {
+ 	page->pp = pool;
+ 	page->pp_magic |= PP_SIGNATURE;
++
++	/* Ensuring all pages have been split into one fragment initially:
++	 * page_pool_set_pp_info() is only called once for every page when it
++	 * is allocated from the page allocator and page_pool_fragment_page()
++	 * is dirtying the same cache line as the page->pp_magic above, so
++	 * the overhead is negligible.
++	 */
++	page_pool_fragment_page(page, 1);
+ 	if (pool->p.init_callback)
+ 		pool->p.init_callback(page, pool->p.init_arg);
+ }
+@@ -676,7 +684,7 @@ void page_pool_put_page_bulk(struct page
+ 		struct page *page = virt_to_head_page(data[i]);
+ 
+ 		/* It is not the last user for the page frag case */
+-		if (!page_pool_is_last_frag(pool, page))
++		if (!page_pool_is_last_frag(page))
+ 			continue;
+ 
+ 		page = __page_pool_put_page(pool, page, -1, false);
+@@ -752,8 +760,7 @@ struct page *page_pool_alloc_frag(struct
+ 	unsigned int max_size = PAGE_SIZE << pool->p.order;
+ 	struct page *page = pool->frag_page;
+ 
+-	if (WARN_ON(!(pool->p.flags & PP_FLAG_PAGE_FRAG) ||
+-		    size > max_size))
++	if (WARN_ON(size > max_size))
+ 		return NULL;
+ 
+ 	size = ALIGN(size, dma_get_cache_alignment());



From lede-commits at lists.infradead.org  Wed Jan 22 11:13:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:13:28 -0500
Subject: [openwrt/openwrt]  generic: refresh hack patches
In-Reply-To: <173757320819.1039110.16117218129106665001@git-01.infra.openwrt.org>
References: <173757320819.1039110.16117218129106665001@git-01.infra.openwrt.org>
Message-ID: <mailman.44811.1737573213.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ee730a66e9c670ec2ee37ee2b207accd539e1d15

commit ee730a66e9c670ec2ee37ee2b207accd539e1d15
Author: Mieczyslaw Nalewaj <namiltd at yahoo.com>
AuthorDate: Wed Jan 22 17:05:30 2025 +0100

    generic: refresh hack patches
    
    Refresh hack patches with make target/linux/refresh.
    
    Fixes: 9508ca44eb57 ("kernel: backport improvement to page pool fragment handling from 6.7")
    Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 .../610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
index 36c28b94f6..c1f5959131 100644
--- a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
+++ b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
@@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/core/page_pool.c
 +++ b/net/core/page_pool.c
-@@ -862,12 +862,23 @@ static void page_pool_release_retry(stru
+@@ -873,12 +873,23 @@ static void page_pool_release_retry(stru
  {
  	struct delayed_work *dwq = to_delayed_work(wq);
  	struct page_pool *pool = container_of(dwq, typeof(*pool), release_dw);



From lede-commits at lists.infradead.org  Wed Jan 22 11:15:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:15:51 -0500
Subject: [openwrt/openwrt]  generic: net: phy: realtek: expose temperature
 sensors
In-Reply-To: <173757335163.1044226.10830076127400848818@git-01.infra.openwrt.org>
References: <173757335163.1044226.10830076127400848818@git-01.infra.openwrt.org>
Message-ID: <mailman.44812.1737573355.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3a189e38317e3390ba5b17523f55bd2fb1b72327

commit 3a189e38317e3390ba5b17523f55bd2fb1b72327
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Fri Jan 17 20:53:03 2025 +0000

    generic: net: phy: realtek: expose temperature sensors
    
    Expose the temperature sensor built-into RTL822x 2.5G and 5G PHYs.
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...ltek-HWMON-support-for-standalone-version.patch | 64 ++++++++++++++++++++++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch | 14 ++---
 ...hy-realtek-introduce-rtl822x_aldps_probe.patch} | 30 +++++-----
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  8 +--
 4 files changed, 92 insertions(+), 24 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch b/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch
new file mode 100644
index 0000000000..8b8c97c54f
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch
@@ -0,0 +1,64 @@
+From 64ff63aeefb03139ae27454bd4208244579ae88e Mon Sep 17 00:00:00 2001
+From: Aleksander Jan Bajkowski <olek2 at wp.pl>
+Date: Fri, 17 Jan 2025 23:24:21 +0100
+Subject: [PATCH] net: phy: realtek: HWMON support for standalone versions of
+ RTL8221B and RTL8251
+
+HWMON support has been added for the RTL8221/8251 PHYs integrated together
+with the MAC inside the RTL8125/8126 chips. This patch extends temperature
+reading support for standalone variants of the mentioned PHYs.
+
+I don't know whether the earlier revisions of the RTL8226 also have a
+built-in temperature sensor, so they have been skipped for now.
+
+Tested on RTL8221B-VB-CG.
+
+Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek/realtek_main.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1474,6 +1474,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1486,6 +1487,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.probe		= rtl822x_probe,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1496,6 +1498,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1508,6 +1511,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.probe		= rtl822x_probe,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1518,6 +1522,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8251b_c45_match_phy_device,
+ 		.name           = "RTL8251B 5Gbps PHY",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 3f43412648..24885e3681 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -52,30 +52,30 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1486,6 +1491,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
-@@ -1496,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1498,6 +1504,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1508,6 +1515,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1511,6 +1518,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
similarity index 85%
rename from target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
rename to target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
index b73e6c6443..6610af12c3 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
@@ -44,7 +44,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 +
 +	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
 +
-+	return 0;
++	return rtl822x_probe(phydev);
 +}
 +
  static int rtlgen_resume(struct phy_device *phydev)
@@ -66,35 +66,39 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1502,6 +1527,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1515,6 +1541,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.config_init    = rtl822xb_config_init,
+@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1526,6 +1553,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1539,6 +1567,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.config_init    = rtl822xb_config_init,
+@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index c855a211e8..3e9b34b8a5 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -70,8 +70,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
 @@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -79,8 +79,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
 @@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -88,8 +88,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
 @@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -97,6 +97,6 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,



From lede-commits at lists.infradead.org  Wed Jan 22 11:38:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:38:05 -0500
Subject: [openwrt/openwrt]  generic: fix version number on realtek phy patches
In-Reply-To: <173757468569.1078300.3477092736640235408@git-01.infra.openwrt.org>
References: <173757468569.1078300.3477092736640235408@git-01.infra.openwrt.org>
Message-ID: <mailman.44821.1737574689.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/12a07e934c013c87ea96ddda8ec18c9af0362c53

commit 12a07e934c013c87ea96ddda8ec18c9af0362c53
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 22 20:34:26 2025 +0100

    generic: fix version number on realtek phy patches
    
    These patches have been accepted in linux v6.14 instead of v6.13.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...1-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch} | 0
 ...1-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch} | 0
 ....patch => 781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch} | 0
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
rename to target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
diff --git a/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
rename to target/linux/generic/backport-6.6/781-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
diff --git a/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
rename to target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch



From lede-commits at lists.infradead.org  Wed Jan 22 11:50:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:50:47 -0500
Subject: [openwrt/openwrt]  generic: backport pending gpio-regmap ops patch
In-Reply-To: <173757544726.1096262.9236711484806374617@git-01.infra.openwrt.org>
References: <173757544726.1096262.9236711484806374617@git-01.infra.openwrt.org>
Message-ID: <mailman.44828.1737575451.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2f2e21a52bdfdcf83868e3169768fda134aa883b

commit 2f2e21a52bdfdcf83868e3169768fda134aa883b
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 22 20:42:49 2025 +0100

    generic: backport pending gpio-regmap ops patch
    
    This patch has been accepted for linux v6.14 so we can move it from pending
    to backport.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...-gpio-regmap-Use-generic-request-free-ops.patch |  30 +++++
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 ---------------------
 2 files changed, 30 insertions(+), 131 deletions(-)

diff --git a/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..f9299f9733
--- /dev/null
+++ b/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,30 @@
+From b0fa00fe38f673c986633c11087274deeb7ce7b0 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Tue, 7 Jan 2025 21:16:20 +0100
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+Link: https://lore.kernel.org/r/20250107201621.12467-1-sander at svanheule.net
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski at linaro.org>
+---
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	chip->label = config->label ?: dev_name(config->parent);
+ 	chip->can_sleep = regmap_might_sleep(config->regmap);
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;
diff --git a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
deleted file mode 100644
index 344a5b1c5a..0000000000
--- a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
+++ /dev/null
@@ -1,131 +0,0 @@
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- SHA256)
-	(No client certificate requested)
-	(Authenticated sender: sander at svanheule.net)
-	by polaris.svanheule.net (Postfix) with ESMTPSA id 1E18459A0D6;
-	Tue,  7 Jan 2025 21:17:02 +0100 (CET)
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-From: Sander Vanheule <sander at svanheule.net>
-To: Michael Walle <mwalle at kernel.org>,
-	Linus Walleij <linus.walleij at linaro.org>,
-	Bartosz Golaszewski <brgl at bgdev.pl>,
-	linux-gpio at vger.kernel.org,
-	linux-kernel at vger.kernel.org
-Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
- jonas.gorski at gmail.com, kylehendrydev at gmail.com,
- florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
-Subject: [PATCH] gpio: regmap: Use generic request/free ops
-Date: Tue,  7 Jan 2025 21:16:20 +0100
-Message-ID: <20250107201621.12467-1-sander at svanheule.net>
-X-Mailer: git-send-email 2.47.1
-Precedence: bulk
-X-Mailing-List: linux-gpio at vger.kernel.org
-List-Id: <linux-gpio.vger.kernel.org>
-List-Subscribe: <mailto:linux-gpio+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:linux-gpio+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-
-Set the gpiochip request and free ops to the generic implementations.
-This way a user can provide a gpio-ranges property defined for a pinmux,
-easing muxing of gpio functions. Provided that the pin controller
-implementents the pinmux op .gpio_request_enable(), pins will
-automatically be muxed to their GPIO function when requested.
-
-Signed-off-by: Sander Vanheule <sander at svanheule.net>
-Acked-by: Michael Walle <mwalle at kernel.org>
----
-?lvaro has submitted a similar patch today. My implementation's impact
-is more limited, but I hadn't gotten around to submitting it yet.
-
-For the original (short) discussion, see:
-https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
-
- drivers/gpio/gpio-regmap.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpio/gpio-regmap.c
-+++ b/drivers/gpio/gpio-regmap.c
-@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
- 	chip->label = config->label ?: dev_name(config->parent);
- 	chip->can_sleep = regmap_might_sleep(config->regmap);
- 
-+	chip->request = gpiochip_generic_request;
-+	chip->free = gpiochip_generic_free;
- 	chip->get = gpio_regmap_get;
- 	if (gpio->reg_set_base && gpio->reg_clr_base)
- 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Wed Jan 22 11:54:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:54:42 -0500
Subject: [openwrt/openwrt]  generic: net: phy: realtek: expose temperature
 sensors
In-Reply-To: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
References: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
Message-ID: <mailman.44829.1737575685.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a872a245a2559d5c12b0578cec8dcbf2bd9ae87b

commit a872a245a2559d5c12b0578cec8dcbf2bd9ae87b
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Fri Jan 17 20:53:03 2025 +0000

    generic: net: phy: realtek: expose temperature sensors
    
    Expose the temperature sensor built-into RTL822x 2.5G and 5G PHYs.
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 3a189e38317e3390ba5b17523f55bd2fb1b72327)
---
 ...ltek-HWMON-support-for-standalone-version.patch | 64 ++++++++++++++++++++++
 ...altek-use-genphy_soft_reset-for-2.5G-PHYs.patch | 14 ++---
 ...hy-realtek-introduce-rtl822x_aldps_probe.patch} | 30 +++++-----
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  8 +--
 4 files changed, 92 insertions(+), 24 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch b/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch
new file mode 100644
index 0000000000..8b8c97c54f
--- /dev/null
+++ b/target/linux/generic/backport-6.6/781-26-v6.14-net-phy-realtek-HWMON-support-for-standalone-version.patch
@@ -0,0 +1,64 @@
+From 64ff63aeefb03139ae27454bd4208244579ae88e Mon Sep 17 00:00:00 2001
+From: Aleksander Jan Bajkowski <olek2 at wp.pl>
+Date: Fri, 17 Jan 2025 23:24:21 +0100
+Subject: [PATCH] net: phy: realtek: HWMON support for standalone versions of
+ RTL8221B and RTL8251
+
+HWMON support has been added for the RTL8221/8251 PHYs integrated together
+with the MAC inside the RTL8125/8126 chips. This patch extends temperature
+reading support for standalone variants of the mentioned PHYs.
+
+I don't know whether the earlier revisions of the RTL8226 also have a
+built-in temperature sensor, so they have been skipped for now.
+
+Tested on RTL8221B-VB-CG.
+
+Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/realtek/realtek_main.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1474,6 +1474,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1486,6 +1487,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
++		.probe		= rtl822x_probe,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1496,6 +1498,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
+ 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.config_init    = rtl822xb_config_init,
+@@ -1508,6 +1511,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
+ 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
++		.probe		= rtl822x_probe,
+ 		.config_init    = rtl822xb_config_init,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1518,6 +1522,7 @@ static struct phy_driver realtek_drvs[]
+ 	}, {
+ 		.match_phy_device = rtl8251b_c45_match_phy_device,
+ 		.name           = "RTL8251B 5Gbps PHY",
++		.probe		= rtl822x_probe,
+ 		.get_features   = rtl822x_get_features,
+ 		.config_aneg    = rtl822x_config_aneg,
+ 		.read_status    = rtl822x_read_status,
diff --git a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
index 3f43412648..24885e3681 100644
--- a/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
+++ b/target/linux/generic/pending-6.6/720-01-net-phy-realtek-use-genphy_soft_reset-for-2.5G-PHYs.patch
@@ -52,30 +52,30 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1486,6 +1491,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
-@@ -1496,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1498,6 +1504,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1508,6 +1515,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1511,6 +1518,7 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
similarity index 85%
rename from target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
rename to target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
index b73e6c6443..6610af12c3 100644
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_probe.patch
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
@@ -44,7 +44,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 +
 +	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
 +
-+	return 0;
++	return rtl822x_probe(phydev);
 +}
 +
  static int rtlgen_resume(struct phy_device *phydev)
@@ -66,35 +66,39 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
  		.soft_reset     = genphy_soft_reset,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1502,6 +1527,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1515,6 +1541,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.config_init    = rtl822xb_config_init,
+@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1526,6 +1553,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.get_features   = rtl822x_c45_get_features,
+@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
  		.config_aneg    = rtl822x_config_aneg,
-@@ -1539,6 +1567,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
+ 		.config_init    = rtl822xb_config_init,
+@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
-+		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+-		.probe		= rtl822x_probe,
++		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
  		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index c855a211e8..3e9b34b8a5 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -70,8 +70,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
 @@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -79,8 +79,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,
 @@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -88,8 +88,8 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.get_features   = rtl822x_get_features,
 @@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
@@ -97,6 +97,6 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
- 		.probe          = rtl822x_aldps_probe,
  		.soft_reset     = genphy_soft_reset,
+ 		.probe          = rtl822x_aldps_probe,
  		.config_init    = rtl822xb_config_init,



From lede-commits at lists.infradead.org  Wed Jan 22 11:54:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:54:44 -0500
Subject: [openwrt/openwrt]  generic: backport pending gpio-regmap ops patch
In-Reply-To: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
References: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
Message-ID: <mailman.44832.1737575685.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/58d0057481d4f0fbd2c9bc9707fca3cab50a4050

commit 58d0057481d4f0fbd2c9bc9707fca3cab50a4050
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 22 20:42:49 2025 +0100

    generic: backport pending gpio-regmap ops patch
    
    This patch has been accepted for linux v6.14 so we can move it from pending
    to backport.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 2f2e21a52bdfdcf83868e3169768fda134aa883b)
---
 ...-gpio-regmap-Use-generic-request-free-ops.patch |  30 +++++
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 ---------------------
 2 files changed, 30 insertions(+), 131 deletions(-)

diff --git a/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..f9299f9733
--- /dev/null
+++ b/target/linux/generic/backport-6.6/880-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,30 @@
+From b0fa00fe38f673c986633c11087274deeb7ce7b0 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Tue, 7 Jan 2025 21:16:20 +0100
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+Link: https://lore.kernel.org/r/20250107201621.12467-1-sander at svanheule.net
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski at linaro.org>
+---
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	chip->label = config->label ?: dev_name(config->parent);
+ 	chip->can_sleep = regmap_might_sleep(config->regmap);
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;
diff --git a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
deleted file mode 100644
index 344a5b1c5a..0000000000
--- a/target/linux/generic/pending-6.6/821-gpio-regmap-Use-generic-request-free-ops.patch
+++ /dev/null
@@ -1,131 +0,0 @@
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-From: Sander Vanheule <sander at svanheule.net>
-To: Michael Walle <mwalle at kernel.org>,
-	Linus Walleij <linus.walleij at linaro.org>,
-	Bartosz Golaszewski <brgl at bgdev.pl>,
-	linux-gpio at vger.kernel.org,
-	linux-kernel at vger.kernel.org
-Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
- jonas.gorski at gmail.com, kylehendrydev at gmail.com,
- florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
-Subject: [PATCH] gpio: regmap: Use generic request/free ops
-Date: Tue,  7 Jan 2025 21:16:20 +0100
-Message-ID: <20250107201621.12467-1-sander at svanheule.net>
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-
-Set the gpiochip request and free ops to the generic implementations.
-This way a user can provide a gpio-ranges property defined for a pinmux,
-easing muxing of gpio functions. Provided that the pin controller
-implementents the pinmux op .gpio_request_enable(), pins will
-automatically be muxed to their GPIO function when requested.
-
-Signed-off-by: Sander Vanheule <sander at svanheule.net>
-Acked-by: Michael Walle <mwalle at kernel.org>
----
-?lvaro has submitted a similar patch today. My implementation's impact
-is more limited, but I hadn't gotten around to submitting it yet.
-
-For the original (short) discussion, see:
-https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
-
- drivers/gpio/gpio-regmap.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpio/gpio-regmap.c
-+++ b/drivers/gpio/gpio-regmap.c
-@@ -262,6 +262,8 @@ struct gpio_regmap *gpio_regmap_register
- 	chip->label = config->label ?: dev_name(config->parent);
- 	chip->can_sleep = regmap_might_sleep(config->regmap);
- 
-+	chip->request = gpiochip_generic_request;
-+	chip->free = gpiochip_generic_free;
- 	chip->get = gpio_regmap_get;
- 	if (gpio->reg_set_base && gpio->reg_clr_base)
- 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Wed Jan 22 11:54:43 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:54:43 -0500
Subject: [openwrt/openwrt]  generic: fix version number on realtek phy patches
In-Reply-To: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
References: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
Message-ID: <mailman.44833.1737575688.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/9d9e06a30ab9720dbd02209f910912ce14800a4c

commit 9d9e06a30ab9720dbd02209f910912ce14800a4c
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 22 20:34:26 2025 +0100

    generic: fix version number on realtek phy patches
    
    These patches have been accepted in linux v6.14 instead of v6.13.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 12a07e934c013c87ea96ddda8ec18c9af0362c53)
---
 ...1-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch} | 0
 ...1-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch} | 0
 ....patch => 781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch} | 0
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch b/target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-20-v6.13-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
rename to target/linux/generic/backport-6.6/781-20-v6.14-net-phy-realtek-clear-1000Base-T-lpa-if-link-is-down.patch
diff --git a/target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch b/target/linux/generic/backport-6.6/781-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-21-v6.13-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
rename to target/linux/generic/backport-6.6/781-21-v6.14-net-phy-realtek-clear-master_slave_state-if-link-is-.patch
diff --git a/target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch b/target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch
similarity index 100%
rename from target/linux/generic/backport-6.6/781-22-v6.13-net-phy-realtek-always-clear-NBase-T-lpa.patch
rename to target/linux/generic/backport-6.6/781-22-v6.14-net-phy-realtek-always-clear-NBase-T-lpa.patch



From lede-commits at lists.infradead.org  Wed Jan 22 11:54:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 14:54:41 -0500
Subject: [openwrt/openwrt]  generic: refresh hack patches
In-Reply-To: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
References: <173757568186.1101104.15645019394366818683@git-01.infra.openwrt.org>
Message-ID: <mailman.44834.1737575690.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/eff00e2fb12721cb8fc0a61dd9f3732d7f594215

commit eff00e2fb12721cb8fc0a61dd9f3732d7f594215
Author: Mieczyslaw Nalewaj <namiltd at yahoo.com>
AuthorDate: Wed Jan 22 17:05:30 2025 +0100

    generic: refresh hack patches
    
    Refresh hack patches with make target/linux/refresh.
    
    Fixes: 9508ca44eb57 ("kernel: backport improvement to page pool fragment handling from 6.7")
    Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit ee730a66e9c670ec2ee37ee2b207accd539e1d15)
---
 .../610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
index 36c28b94f6..c1f5959131 100644
--- a/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
+++ b/target/linux/generic/hack-6.6/610-net-page_pool-try-to-free-deferred-skbs-while-waitin.patch
@@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau <nbd at nbd.name>
 
 --- a/net/core/page_pool.c
 +++ b/net/core/page_pool.c
-@@ -862,12 +862,23 @@ static void page_pool_release_retry(stru
+@@ -873,12 +873,23 @@ static void page_pool_release_retry(stru
  {
  	struct delayed_work *dwq = to_delayed_work(wq);
  	struct page_pool *pool = container_of(dwq, typeof(*pool), release_dw);



From lede-commits at lists.infradead.org  Wed Jan 22 13:56:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 16:56:52 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc6: revert to branch defaults
In-Reply-To: <173758301194.1389900.13742635659216010103@git-01.infra.openwrt.org>
References: <173758301194.1389900.13742635659216010103@git-01.infra.openwrt.org>
Message-ID: <mailman.44853.1737583015.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/18c47b0e968c4b2b102cd78b12b87615a35e8424

commit 18c47b0e968c4b2b102cd78b12b87615a35e8424
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Wed Jan 22 22:49:28 2025 +0100

    OpenWrt v24.10.0-rc6: revert to branch defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 -
 version.date                       | 1 -
 5 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index c16689d75e..581de056c4 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git^212eb308f108b2460909b3cd25d68374913b266f
-src-git luci https://git.openwrt.org/project/luci.git^36b610767adf7172f87e89e02edc1a91af1fcb45
-src-git routing https://git.openwrt.org/feed/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
-src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
+src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
+src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
+src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
+src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
diff --git a/include/version.mk b/include/version.mk
index 5fff601701..a6ebe58779 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc6)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28388-58d0057481)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc6)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index ae0517f2cc..80db993d46 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10.0-rc6"
+		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default n
+		default y
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
deleted file mode 100644
index d98b48a5e3..0000000000
--- a/version
+++ /dev/null
@@ -1 +0,0 @@
-r28388-58d0057481
diff --git a/version.date b/version.date
deleted file mode 100644
index 5c263ddd8a..0000000000
--- a/version.date
+++ /dev/null
@@ -1 +0,0 @@
-1737575574



From lede-commits at lists.infradead.org  Wed Jan 22 13:56:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 16:56:51 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc6: adjust config defaults
In-Reply-To: <173758301194.1389900.13742635659216010103@git-01.infra.openwrt.org>
References: <173758301194.1389900.13742635659216010103@git-01.infra.openwrt.org>
Message-ID: <mailman.44854.1737583015.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/8c660861ef97b40395671b4c1bfde2c0867e18b9

commit 8c660861ef97b40395671b4c1bfde2c0867e18b9
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Wed Jan 22 22:49:23 2025 +0100

    OpenWrt v24.10.0-rc6: adjust config defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 +
 version.date                       | 1 +
 5 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index 581de056c4..c16689d75e 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
-src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
-src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
-src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
+src-git packages https://git.openwrt.org/feed/packages.git^212eb308f108b2460909b3cd25d68374913b266f
+src-git luci https://git.openwrt.org/project/luci.git^36b610767adf7172f87e89e02edc1a91af1fcb45
+src-git routing https://git.openwrt.org/feed/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
+src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
diff --git a/include/version.mk b/include/version.mk
index a6ebe58779..5fff601701 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc6)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28388-58d0057481)
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc6)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index 80db993d46..ae0517f2cc 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
+		default "https://downloads.openwrt.org/releases/24.10.0-rc6"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default y
+		default n
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
new file mode 100644
index 0000000000..d98b48a5e3
--- /dev/null
+++ b/version
@@ -0,0 +1 @@
+r28388-58d0057481
diff --git a/version.date b/version.date
new file mode 100644
index 0000000000..5c263ddd8a
--- /dev/null
+++ b/version.date
@@ -0,0 +1 @@
+1737575574



From lede-commits at lists.infradead.org  Wed Jan 22 19:52:16 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 22:52:16 -0500
Subject: [openwrt/openwrt]  mediatek: update status led for Cudy TR3000
In-Reply-To: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
References: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
Message-ID: <mailman.44897.1737604338.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/87632219d4b8f0c96ea053e375f6f324fab0806f

commit 87632219d4b8f0c96ea053e375f6f324fab0806f
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Wed Dec 4 23:26:28 2024 +0800

    mediatek: update status led for Cudy TR3000
    
    Use white led when running, consistent with the stock firmware.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 2591de8520..ff3c83a12d 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -12,10 +12,10 @@
 
 	aliases {
 		label-mac-device = &gmac1;
-		led-boot = &led_status;
-		led-failsafe = &led_status;
-		led-running = &led_status;
-		led-upgrade = &led_status;
+		led-boot = &led_sys_red;
+		led-failsafe = &led_sys_red;
+		led-running = &led_sys_white;
+		led-upgrade = &led_sys_white;
 		serial0 = &uart0;
 	};
 
@@ -34,8 +34,8 @@
 
 		mode {
 			label = "mode";
-			linux,input-type = <EV_SW>;
 			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
 			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;
 		};
@@ -44,18 +44,17 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led_0 {
+		led_sys_red: led-0 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_1 {
+		led_sys_white: led-1 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
-
 	};
 
 	usb_vbus: regulator-usb {



From lede-commits at lists.infradead.org  Wed Jan 22 19:52:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 22:52:18 -0500
Subject: [openwrt/openwrt]  mediatek: use standard PHY reset bindings for Cudy
 WR3000H
In-Reply-To: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
References: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
Message-ID: <mailman.44898.1737604338.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/4c380d0f25f84da191ac824c2470d3851844cdd7

commit 4c380d0f25f84da191ac824c2470d3851844cdd7
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Wed Jan 15 23:10:26 2025 +0800

    mediatek: use standard PHY reset bindings for Cudy WR3000H
    
    Use generic Ethernet PHY reset bindings.
    Remove the useless lan label as connected switch.
    
    Fixes: 9d66b8b ("mediatek: filogic: Add support for cudy wr3000h")
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
 .../linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts | 22 +++++-----------------
 1 file changed, 5 insertions(+), 17 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
index 13c99db988..3b858f7638 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
@@ -39,17 +39,6 @@
 		};
 	};
 
-	gpio-export {
-		compatible = "gpio-export";
-		#size-cells = <0>;
-
-		phyreset {
-			gpio-export,name = "phyreset";
-			gpio-export,output = <1>;
-			gpios = <&pio 3 GPIO_ACTIVE_LOW>;
-		};
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
@@ -132,7 +121,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {
@@ -141,7 +129,6 @@
 		phy-mode = "2500base-x";
 		nvmem-cell-names = "mac-address";
 		nvmem-cells = <&macaddr_bdinfo_de00 0>;
-		label = "lan";
 
 		fixed-link {
 			speed = <2500>;
@@ -159,7 +146,6 @@
 		nvmem-cells = <&macaddr_bdinfo_de00 1>;
 		label = "wan";
 	};
-
 };
 
 &mdio_bus {
@@ -172,12 +158,14 @@
 		interrupt-parent = <&pio>;
 		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 	};
+
 	phy6: ethernet-phy at 6 {
-		compatible = "ethernet-phy-ieee802.3-c22"; // [RTL8221B-VB-CG 2.5Gbps PHY (C22)]
+		compatible = "ethernet-phy-ieee802.3-c22";
 		reg = <6>;
-		phy-mode = "2500base-x";
+		reset-assert-us = <100000>;
+		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 3 GPIO_ACTIVE_LOW>;
 	};
-
 };
 
 &spi0 {



From lede-commits at lists.infradead.org  Wed Jan 22 19:52:17 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 22:52:17 -0500
Subject: [openwrt/openwrt]  mediatek: cleanup device tree for cudy devices
In-Reply-To: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
References: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
Message-ID: <mailman.44899.1737604340.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/64d1b1089c25d778f5f22bfc0c1590a2e83b664e

commit 64d1b1089c25d778f5f22bfc0c1590a2e83b664e
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Thu Dec 5 23:26:18 2024 +0800

    mediatek: cleanup device tree for cudy devices
    
    Fixes typo for led properties.
    Delete the unused rfb compatible.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
 .../mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts |  8 ++++----
 .../linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts   |  2 +-
 .../linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts  |  4 +---
 .../linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts | 23 +++++++++++-----------
 .../linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts | 14 ++++++-------
 5 files changed, 23 insertions(+), 28 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
index 2e84d2b538..735cecfe42 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy AP3000 Outdoor v1";
-	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &wifi;
@@ -42,18 +42,19 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status_green: led at 0 {
+		led_status_green: led-0 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
 		};
 
-		led_status_red: led_1 {
+		led_status_red: led-1 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
+
 	gpio_export {
 		compatible = "gpio-export";
 		#size-cells = <0>;
@@ -89,7 +90,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac1: mac at 1 {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index abe40403af..cfe9d45630 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -6,7 +6,7 @@
 
 / {
 	model = "Cudy M3000 v1";
-	compatible = "cudy,m3000-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,m3000-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index ff3c83a12d..86d8e857f1 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy TR3000 v1";
-	compatible = "cudy,tr3000-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,tr3000-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac1;
@@ -59,11 +59,9 @@
 
 	usb_vbus: regulator-usb {
 		compatible = "regulator-fixed";
-
 		regulator-name = "usb-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-
 		gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 	};
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
index 1bf166e0bf..13c99db988 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy WR3000H v1";
-	compatible = "cudy,wr3000h-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,wr3000h-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
@@ -53,68 +53,67 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led at 0 {
+		led_status: led-status {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 5 GPIO_ACTIVE_LOW>;
 		};
 
-
-		led_internet {
+		led-internet {
 			function = LED_FUNCTION_WAN_ONLINE;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wps {
+		led-wps {
 			function = LED_FUNCTION_WPS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wlan2g {
+		led-wlan2g {
 			function = LED_FUNCTION_WLAN_2GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
-		led_wlan5g {
+		led-wlan5g {
 			function = LED_FUNCTION_WLAN_5GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy1tpt";
 		};
 
-		led_lan1 {
+		led-lan1 {
 			function = LED_FUNCTION_LAN;
 			function-enumerator = <1>;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
 		};
 
-		led_lan2 {
+		led-lan2 {
 			function = LED_FUNCTION_LAN;
 			function-enumerator = <2>;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
 
-		led_lan3 {
+		led-lan3 {
 			function = LED_FUNCTION_LAN;
 			function-enumerator = <3>;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
 		};
 
-		led_lan4 {
+		led-lan4 {
 			function = LED_FUNCTION_LAN;
 			function-enumerator = <4>;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wan {
+		led-wan {
 			function = LED_FUNCTION_WAN;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
index ccefc1926c..bdc6188a4a 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy WR3000S v1";
-	compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,wr3000s-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
@@ -42,33 +42,32 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led at 0 {
+		led_status: led-status {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
 
-
-		led_internet {
+		led-internet {
 			function = LED_FUNCTION_WAN_ONLINE;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wps {
+		led-wps {
 			function = LED_FUNCTION_WPS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wlan2g {
+		led-wlan2g {
 			function = LED_FUNCTION_WLAN_2GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
-		led_wlan5g {
+		led-wlan5g {
 			function = LED_FUNCTION_WLAN_5GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
@@ -88,7 +87,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {



From lede-commits at lists.infradead.org  Wed Jan 22 19:52:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 22:52:14 -0500
Subject: [openwrt/openwrt]  mediatek: cudy: fixes typo for spi and mtd
 properties
In-Reply-To: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
References: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
Message-ID: <mailman.44902.1737604340.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/ab375a3484db67857450ced461498ad3d7942e05

commit ab375a3484db67857450ced461498ad3d7942e05
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Tue Dec 3 23:02:15 2024 +0800

    mediatek: cudy: fixes typo for spi and mtd properties
    
    Same as commit 3674689, correct 'buswidth' to 'bus-width'.
    Move the nmbm properties outside the partition definition.
    Change uppercase to lowercase, add missing read-only flag.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
 target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts       |  4 ++--
 .../linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts   | 12 ++++++------
 target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts        | 14 +++++++-------
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts       | 12 ++++++------
 target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts      | 10 ++++++----
 target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts      | 10 ++++++----
 6 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
index bd6c15225b..7101c4bab0 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
@@ -133,8 +133,8 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 
 		spi-cal-enable;
 		spi-cal-mode = "read-data";
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
index a1eb9c6e1e..2e84d2b538 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
@@ -148,6 +148,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -163,6 +164,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -174,25 +176,23 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
 	};
 };
 
-
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index 85bdabe474..b1797157ac 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -117,7 +117,6 @@
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
-
 	status = "okay";
 
 	spi_nand: spi_nand at 0 {
@@ -127,18 +126,18 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
 
 		partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			mediatek,nmbm;
-			mediatek,bmt-max-ratio = <1>;
-			mediatek,bmt-max-reserved-blocks = <64>;
-
 			partition at 0 {
 				label = "BL2";
 				reg = <0x0000000 0x0100000>;
@@ -177,6 +176,7 @@
 			partition at 3c0000 {
 				label = "FIP";
 				reg = <0x03c0000 0x0200000>;
+				read-only;
 			};
 
 			partition at 5c0000 {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 1f03b42b1b..31a2cf5194 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -162,6 +162,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -177,6 +178,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -188,25 +190,23 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
 	};
 };
 
-
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
index 0808eb9557..1bf166e0bf 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
@@ -227,6 +227,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -242,6 +243,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -255,15 +257,15 @@
 				};
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
index cf2f79b407..ccefc1926c 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
@@ -165,6 +165,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -180,6 +181,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -193,15 +195,15 @@
 				};
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};



From lede-commits at lists.infradead.org  Wed Jan 22 19:52:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 22 Jan 2025 22:52:15 -0500
Subject: [openwrt/openwrt]  mediatek: cudy: fixes 2.5G PHY interrupt support
In-Reply-To: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
References: <173760433408.1878889.12918980658583382557@git-01.infra.openwrt.org>
Message-ID: <mailman.44903.1737604340.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/82b69dfaf6ca92eeffb7523295d3d81a1d54323a

commit 82b69dfaf6ca92eeffb7523295d3d81a1d54323a
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Mon Dec 9 23:17:06 2024 +0800

    mediatek: cudy: fixes 2.5G PHY interrupt support
    
    Fixed interrupt support for 2.5G PHY.
    Removed useless phy-mode on phy node.
    
    Tested on Cudy TR3000.
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
---
 target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts  | 8 +++-----
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts | 9 ++++-----
 2 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index b1797157ac..abe40403af 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -77,7 +77,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {
@@ -105,12 +104,11 @@
 	rtl8221b_phy: ethernet-phy at 1 {
 		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <1>;
-
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 	};
 };
 
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 31a2cf5194..2591de8520 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -81,7 +81,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {
@@ -105,13 +104,13 @@
 
 &mdio_bus {
 	phy1: phy at 1 {
-		reg = <1>;
 		compatible = "ethernet-phy-ieee802.3-c45";
-		phy-mode = "2500base-x";
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		reg = <1>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 		realtek,aldps-enable;
 	};
 };



From lede-commits at lists.infradead.org  Wed Jan 22 23:49:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 02:49:50 -0500
Subject: [openwrt/openwrt]  generic: backport pending gpio-regmap ops patch
In-Reply-To: <173761859031.2173774.7396071573309445401@git-01.infra.openwrt.org>
References: <173761859031.2173774.7396071573309445401@git-01.infra.openwrt.org>
Message-ID: <mailman.44940.1737618606.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/b5ad709554e55ae6b5aaf867c1610423e365c856

commit b5ad709554e55ae6b5aaf867c1610423e365c856
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Wed Jan 22 20:42:49 2025 +0100

    generic: backport pending gpio-regmap ops patch
    
    This patch has been accepted for linux v6.14 so we can move it from pending
    to backport.
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit 2f2e21a52bdfdcf83868e3169768fda134aa883b)
---
 ...-gpio-regmap-Use-generic-request-free-ops.patch |  30 +++++
 ...-gpio-regmap-Use-generic-request-free-ops.patch | 131 ---------------------
 2 files changed, 30 insertions(+), 131 deletions(-)

diff --git a/target/linux/generic/backport-5.15/840-v6.14-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/backport-5.15/840-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
new file mode 100644
index 0000000000..c5e5668f27
--- /dev/null
+++ b/target/linux/generic/backport-5.15/840-v6.14-gpio-regmap-Use-generic-request-free-ops.patch
@@ -0,0 +1,30 @@
+From b0fa00fe38f673c986633c11087274deeb7ce7b0 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander at svanheule.net>
+Date: Tue, 7 Jan 2025 21:16:20 +0100
+Subject: [PATCH] gpio: regmap: Use generic request/free ops
+
+Set the gpiochip request and free ops to the generic implementations.
+This way a user can provide a gpio-ranges property defined for a pinmux,
+easing muxing of gpio functions. Provided that the pin controller
+implementents the pinmux op .gpio_request_enable(), pins will
+automatically be muxed to their GPIO function when requested.
+
+Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Acked-by: Michael Walle <mwalle at kernel.org>
+Link: https://lore.kernel.org/r/20250107201621.12467-1-sander at svanheule.net
+Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski at linaro.org>
+---
+ drivers/gpio/gpio-regmap.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpio/gpio-regmap.c
++++ b/drivers/gpio/gpio-regmap.c
+@@ -263,6 +263,8 @@ struct gpio_regmap *gpio_regmap_register
+ 	 */
+ 	chip->can_sleep = true;
+ 
++	chip->request = gpiochip_generic_request;
++	chip->free = gpiochip_generic_free;
+ 	chip->get = gpio_regmap_get;
+ 	if (gpio->reg_set_base && gpio->reg_clr_base)
+ 		chip->set = gpio_regmap_set_with_clear;
diff --git a/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch b/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch
deleted file mode 100644
index 35c85f97e5..0000000000
--- a/target/linux/generic/pending-5.15/821-gpio-regmap-Use-generic-request-free-ops.patch
+++ /dev/null
@@ -1,131 +0,0 @@
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-	 content-transfer-encoding:content-transfer-encoding;
-	bh=yNGIiTe7uonx3NZIc6+B7LVjvR8RnIV2zq++EO7NLhg=;
-	b=YjCvLC2HqArIGWGFkNYmh+oloGi7ZFo7WZGlTbxuHqrQVJ6mLNoLCTCkPkX1EJWEQyNysD
-	Jj+7tBnAYyCrJ0NuSTD9CPW1+KwKP4wlvWpBUlayCdUJyU4rzjqmlYAI5vJ1UX8FOnvEpn
-	KeWjgjbeMI6dvIE7ATPFkDvMrDxR9KSEe/1pfzY3E5jh1T8tcnTRMQKTll7hSUBN63dVfJ
-	U7wnHRLvwx8ESIjrHDKOlsSohmV6lyQTrgEeE2RCM6SpZPNoSpPVjTinF1kPuMHNWHV+Th
-	6eDOblXxt859JECDowM0NjF87XJqjgph22+A1WUV4iaePO4GIWo9DQ3KhP/Pyg==
-From: Sander Vanheule <sander at svanheule.net>
-To: Michael Walle <mwalle at kernel.org>,
-	Linus Walleij <linus.walleij at linaro.org>,
-	Bartosz Golaszewski <brgl at bgdev.pl>,
-	linux-gpio at vger.kernel.org,
-	linux-kernel at vger.kernel.org
-Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= <noltari at gmail.com>,
- jonas.gorski at gmail.com, kylehendrydev at gmail.com,
- florian.fainelli at broadcom.com, Sander Vanheule <sander at svanheule.net>
-Subject: [PATCH] gpio: regmap: Use generic request/free ops
-Date: Tue,  7 Jan 2025 21:16:20 +0100
-Message-ID: <20250107201621.12467-1-sander at svanheule.net>
-X-Mailer: git-send-email 2.47.1
-Precedence: bulk
-X-Mailing-List: linux-gpio at vger.kernel.org
-List-Id: <linux-gpio.vger.kernel.org>
-List-Subscribe: <mailto:linux-gpio+subscribe at vger.kernel.org>
-List-Unsubscribe: <mailto:linux-gpio+unsubscribe at vger.kernel.org>
-MIME-Version: 1.0
-
-Set the gpiochip request and free ops to the generic implementations.
-This way a user can provide a gpio-ranges property defined for a pinmux,
-easing muxing of gpio functions. Provided that the pin controller
-implementents the pinmux op .gpio_request_enable(), pins will
-automatically be muxed to their GPIO function when requested.
-
-Signed-off-by: Sander Vanheule <sander at svanheule.net>
-Acked-by: Michael Walle <mwalle at kernel.org>
----
-?lvaro has submitted a similar patch today. My implementation's impact
-is more limited, but I hadn't gotten around to submitting it yet.
-
-For the original (short) discussion, see:
-https://lore.kernel.org/linux-gpio/20250107102735.317446-1-noltari at gmail.com/T/#t
-
- drivers/gpio/gpio-regmap.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpio/gpio-regmap.c
-+++ b/drivers/gpio/gpio-regmap.c
-@@ -263,6 +263,8 @@ struct gpio_regmap *gpio_regmap_register
- 	 */
- 	chip->can_sleep = true;
- 
-+	chip->request = gpiochip_generic_request;
-+	chip->free = gpiochip_generic_free;
- 	chip->get = gpio_regmap_get;
- 	if (gpio->reg_set_base && gpio->reg_clr_base)
- 		chip->set = gpio_regmap_set_with_clear;



From lede-commits at lists.infradead.org  Thu Jan 23 02:37:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 05:37:34 -0500
Subject: [openwrt/openwrt]  mt76: update to Git HEAD (2025-01-22)
In-Reply-To: <173762865410.2389809.5627375282122004116@git-01.infra.openwrt.org>
References: <173762865410.2389809.5627375282122004116@git-01.infra.openwrt.org>
Message-ID: <mailman.45063.1737628849.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/17dc0797d03d2f2dd57b38ab39962dafc69d1d34

commit 17dc0797d03d2f2dd57b38ab39962dafc69d1d34
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Jan 23 11:36:59 2025 +0100

    mt76: update to Git HEAD (2025-01-22)
    
    3e85822b9c66 page_pool: remove PP_FLAG_PAGE_FRAG
    a22d59e4ad50 tools: fix allocation check and missing memory freeing
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/kernel/mt76/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index cd168f49bc..ef2c619885 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2025-01-14
-PKG_SOURCE_VERSION:=8e4f72b682e9070108536507c5e2720b18c3816d
-PKG_MIRROR_HASH:=fa8c5a2ece9e7287605910d9f906b601711c7863613addaadd666f9e3858a9e7
+PKG_SOURCE_DATE:=2025-01-22
+PKG_SOURCE_VERSION:=a22d59e4ad50c89326342a0736cd2c1ba32e8a0b
+PKG_MIRROR_HASH:=e8bbbada2171ea31a6788e3e46e81c409a9fe038eefe4b41f541da848a1b1bcd
 
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
 PKG_USE_NINJA:=0



From lede-commits at lists.infradead.org  Thu Jan 23 06:27:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 09:27:47 -0500
Subject: [openwrt/openwrt]  mediatek: add Airoha AN8855 gigabit switch driver
In-Reply-To: <173764246706.2753076.2891839909808894541@git-01.infra.openwrt.org>
References: <173764246706.2753076.2891839909808894541@git-01.infra.openwrt.org>
Message-ID: <mailman.45179.1737642478.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0fd9d00cd6fc285b2a925eb03e6350a4b00fc279

commit 0fd9d00cd6fc285b2a925eb03e6350a4b00fc279
Author: Dim Fish <dimfish at gmail.com>
AuthorDate: Fri Oct 11 19:25:29 2024 +0300

    mediatek: add Airoha AN8855 gigabit switch driver
    
    New revisions of Xiaomi AX3000T with 1.0.84+ stock firmware contain new hardware.
    This commit add support for Airoha AN8855 gigabit switch driver with 6.6 kernel patches
    
    Based on https://patchwork.kernel.org/project/netdevbpf/cover/20241209134459.27110-1-ansuelsmth at gmail.com/
    
    Signed-off-by: Dim Fish <dimfish at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16709
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 .../dts/mt7981b-xiaomi-mi-router-common.dtsi       |  180 ++
 .../mediatek/files-6.6/drivers/mfd/airoha-an8855.c |  278 +++
 .../mediatek/files-6.6/drivers/net/dsa/an8855.c    | 2311 ++++++++++++++++++++
 .../mediatek/files-6.6/drivers/net/dsa/an8855.h    |  783 +++++++
 .../files-6.6/drivers/net/mdio/mdio-an8855.c       |  113 +
 .../files-6.6/drivers/net/phy/air_an8855.c         |  267 +++
 .../files-6.6/drivers/nvmem/an8855-efuse.c         |   63 +
 .../include/linux/mfd/airoha-an8855-mfd.h          |   41 +
 target/linux/mediatek/filogic/config-6.6           |    5 +
 target/linux/mediatek/mt7622/config-6.6            |    5 +
 target/linux/mediatek/mt7623/config-6.6            |    5 +
 target/linux/mediatek/mt7629/config-6.6            |    5 +
 .../737-net-dsa-add-Airoha-AN8855.patch            |  309 +++
 ...738-net-phylink-move-phylink_pcs_neg_mode.patch |  166 ++
 ...t-add-negotiation-of-in-band-capabilities.patch | 1233 +++++++++++
 15 files changed, 5764 insertions(+)

diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
index d6872395a9..c64b55cf6f 100644
--- a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
+++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
@@ -83,6 +83,11 @@
 		interrupt-parent = <&pio>;
 		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 	};
+
+	mfd: mfd at 1 {
+		compatible = "airoha,an8855-mfd";
+		reg = <1>;
+	};
 };
 
 &switch {
@@ -124,6 +129,181 @@
 	};
 };
 
+&mfd {
+	efuse {
+		compatible = "airoha,an8855-efuse";
+		#nvmem-cell-cells = <0>;
+
+		nvmem-layout {
+			compatible = "fixed-layout";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			shift_sel_port0_tx_a: shift-sel-port0-tx-a at c {
+				reg = <0xc 0x4>;
+			};
+
+			shift_sel_port0_tx_b: shift-sel-port0-tx-b at 10 {
+				reg = <0x10 0x4>;
+			};
+
+			shift_sel_port0_tx_c: shift-sel-port0-tx-c at 14 {
+				reg = <0x14 0x4>;
+			};
+
+			shift_sel_port0_tx_d: shift-sel-port0-tx-d at 18 {
+				reg = <0x18 0x4>;
+			};
+
+			shift_sel_port1_tx_a: shift-sel-port1-tx-a at 1c {
+				reg = <0x1c 0x4>;
+			};
+
+			shift_sel_port1_tx_b: shift-sel-port1-tx-b at 20 {
+				reg = <0x20 0x4>;
+			};
+
+			shift_sel_port1_tx_c: shift-sel-port1-tx-c at 24 {
+				reg = <0x24 0x4>;
+			};
+
+			shift_sel_port1_tx_d: shift-sel-port1-tx-d at 28 {
+				reg = <0x28 0x4>;
+			};
+
+			shift_sel_port2_tx_a: shift-sel-port2-tx-a at 2c {
+				reg = <0x2c 0x4>;
+			};
+
+			shift_sel_port2_tx_b: shift-sel-port2-tx-b at 30 {
+				reg = <0x30 0x4>;
+			};
+
+			shift_sel_port2_tx_c: shift-sel-port2-tx-c at 34 {
+				reg = <0x34 0x4>;
+			};
+
+			shift_sel_port2_tx_d: shift-sel-port2-tx-d at 38 {
+				reg = <0x38 0x4>;
+			};
+
+			shift_sel_port3_tx_a: shift-sel-port3-tx-a at 4c {
+				reg = <0x4c 0x4>;
+			};
+
+			shift_sel_port3_tx_b: shift-sel-port3-tx-b at 50 {
+				reg = <0x50 0x4>;
+			};
+
+			shift_sel_port3_tx_c: shift-sel-port3-tx-c at 54 {
+				reg = <0x54 0x4>;
+			};
+
+			shift_sel_port3_tx_d: shift-sel-port3-tx-d at 58 {
+				reg = <0x58 0x4>;
+			};
+		};
+	};
+
+	ethernet-switch {
+		compatible = "airoha,an8855-switch";
+		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+		airoha,ext-surge;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				label = "wan";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy1>;
+			};
+
+			port at 1 {
+				reg = <1>;
+				label = "lan2";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy2>;
+			};
+
+			port at 2 {
+				reg = <2>;
+				label = "lan3";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy3>;
+			};
+
+			port at 3 {
+				reg = <3>;
+				label = "lan4";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy4>;
+			};
+
+			port at 5 {
+				reg = <5>;
+				label = "cpu";
+				ethernet = <&gmac0>;
+				phy-mode = "2500base-x";
+
+				fixed-link {
+					speed = <2500>;
+					full-duplex;
+					pause;
+				};
+			};
+		};
+	};
+
+	mdio {
+		compatible = "airoha,an8855-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		internal_phy1: phy at 1 {
+			reg = <1>;
+
+			nvmem-cells = <&shift_sel_port0_tx_a>,
+					<&shift_sel_port0_tx_b>,
+					<&shift_sel_port0_tx_c>,
+					<&shift_sel_port0_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy2: phy at 2 {
+			reg = <2>;
+
+			nvmem-cells = <&shift_sel_port1_tx_a>,
+					<&shift_sel_port1_tx_b>,
+					<&shift_sel_port1_tx_c>,
+					<&shift_sel_port1_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy3: phy at 3 {
+			reg = <3>;
+
+			nvmem-cells = <&shift_sel_port2_tx_a>,
+					<&shift_sel_port2_tx_b>,
+					<&shift_sel_port2_tx_c>,
+					<&shift_sel_port2_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy4: phy at 4 {
+			reg = <4>;
+
+			nvmem-cells = <&shift_sel_port3_tx_a>,
+					<&shift_sel_port3_tx_b>,
+					<&shift_sel_port3_tx_c>,
+					<&shift_sel_port3_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+	};
+};
+
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
diff --git a/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c b/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c
new file mode 100644
index 0000000000..eeaea348aa
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c
@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MFD driver for Airoha AN8855 Switch
+ */
+
+#include <linux/mfd/airoha-an8855-mfd.h>
+#include <linux/mfd/core.h>
+#include <linux/mdio.h>
+#include <linux/module.h>
+#include <linux/phy.h>
+#include <linux/regmap.h>
+
+static const struct mfd_cell an8855_mfd_devs[] = {
+	{
+		.name = "an8855-efuse",
+		.of_compatible = "airoha,an8855-efuse",
+	}, {
+		.name = "an8855-switch",
+		.of_compatible = "airoha,an8855-switch",
+	}, {
+		.name = "an8855-mdio",
+		.of_compatible = "airoha,an8855-mdio",
+	}
+};
+
+int an8855_mii_set_page(struct an8855_mfd_priv *priv, u8 phy_id,
+			u8 page) __must_hold(&priv->bus->mdio_lock)
+{
+	struct mii_bus *bus = priv->bus;
+	int ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PHY_SELECT_PAGE, page);
+	if (ret < 0)
+		dev_err_ratelimited(&bus->dev,
+				    "failed to set an8855 mii page\n");
+
+	/* Cache current page if next mii read/write is for switch */
+	priv->current_page = page;
+	return ret < 0 ? ret : 0;
+}
+EXPORT_SYMBOL_GPL(an8855_mii_set_page);
+
+static int an8855_mii_read32(struct mii_bus *bus, u8 phy_id, u32 reg,
+			     u32 *val) __must_hold(&bus->mdio_lock)
+{
+	int lo, hi, ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_MODE,
+			      AN8855_PBUS_MODE_ADDR_FIXED);
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_RD_ADDR_HIGH,
+			      upper_16_bits(reg));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_RD_ADDR_LOW,
+			      lower_16_bits(reg));
+	if (ret < 0)
+		goto err;
+
+	hi = __mdiobus_read(bus, phy_id, AN8855_PBUS_RD_DATA_HIGH);
+	if (hi < 0) {
+		ret = hi;
+		goto err;
+	}
+	lo = __mdiobus_read(bus, phy_id, AN8855_PBUS_RD_DATA_LOW);
+	if (lo < 0) {
+		ret = lo;
+		goto err;
+	}
+
+	*val = ((u16)hi << 16) | ((u16)lo & 0xffff);
+
+	return 0;
+err:
+	dev_err_ratelimited(&bus->dev,
+			    "failed to read an8855 register\n");
+	return ret;
+}
+
+static int an8855_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_read32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static int an8855_mii_write32(struct mii_bus *bus, u8 phy_id, u32 reg,
+			      u32 val) __must_hold(&bus->mdio_lock)
+{
+	int ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_MODE,
+			      AN8855_PBUS_MODE_ADDR_FIXED);
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_ADDR_HIGH,
+			      upper_16_bits(reg));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_ADDR_LOW,
+			      lower_16_bits(reg));
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_DATA_HIGH,
+			      upper_16_bits(val));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_DATA_LOW,
+			      lower_16_bits(val));
+	if (ret < 0)
+		goto err;
+
+	return 0;
+err:
+	dev_err_ratelimited(&bus->dev,
+			    "failed to write an8855 register\n");
+	return ret;
+}
+
+static int
+an8855_regmap_write(void *ctx, uint32_t reg, uint32_t val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_write32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static int an8855_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask,
+				     uint32_t write_val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	u32 val;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_read32(bus, addr, reg, &val);
+	if (ret < 0)
+		goto exit;
+
+	val &= ~mask;
+	val |= write_val;
+	ret = an8855_mii_write32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static const struct regmap_range an8855_readable_ranges[] = {
+	regmap_reg_range(0x10000000, 0x10000fff), /* SCU */
+	regmap_reg_range(0x10001000, 0x10001fff), /* RBUS */
+	regmap_reg_range(0x10002000, 0x10002fff), /* MCU */
+	regmap_reg_range(0x10005000, 0x10005fff), /* SYS SCU */
+	regmap_reg_range(0x10007000, 0x10007fff), /* I2C Slave */
+	regmap_reg_range(0x10008000, 0x10008fff), /* I2C Master */
+	regmap_reg_range(0x10009000, 0x10009fff), /* PDMA */
+	regmap_reg_range(0x1000a100, 0x1000a2ff), /* General Purpose Timer */
+	regmap_reg_range(0x1000a200, 0x1000a2ff), /* GPU timer */
+	regmap_reg_range(0x1000a300, 0x1000a3ff), /* GPIO */
+	regmap_reg_range(0x1000a400, 0x1000a5ff), /* EFUSE */
+	regmap_reg_range(0x1000c000, 0x1000cfff), /* GDMP CSR */
+	regmap_reg_range(0x10010000, 0x1001ffff), /* GDMP SRAM */
+	regmap_reg_range(0x10200000, 0x10203fff), /* Switch - ARL Global */
+	regmap_reg_range(0x10204000, 0x10207fff), /* Switch - BMU */
+	regmap_reg_range(0x10208000, 0x1020bfff), /* Switch - ARL Port */
+	regmap_reg_range(0x1020c000, 0x1020cfff), /* Switch - SCH */
+	regmap_reg_range(0x10210000, 0x10213fff), /* Switch - MAC */
+	regmap_reg_range(0x10214000, 0x10217fff), /* Switch - MIB */
+	regmap_reg_range(0x10218000, 0x1021bfff), /* Switch - Port Control */
+	regmap_reg_range(0x1021c000, 0x1021ffff), /* Switch - TOP */
+	regmap_reg_range(0x10220000, 0x1022ffff), /* SerDes */
+	regmap_reg_range(0x10286000, 0x10286fff), /* RG Batcher */
+	regmap_reg_range(0x1028c000, 0x1028ffff), /* ETHER_SYS */
+	regmap_reg_range(0x30000000, 0x37ffffff), /* I2C EEPROM */
+	regmap_reg_range(0x38000000, 0x3fffffff), /* BOOT_ROM */
+	regmap_reg_range(0xa0000000, 0xbfffffff), /* GPHY */
+};
+
+static const struct regmap_access_table an8855_readable_table = {
+	.yes_ranges = an8855_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(an8855_readable_ranges),
+};
+
+static const struct regmap_config an8855_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+	.max_register = 0xbfffffff,
+	.reg_read = an8855_regmap_read,
+	.reg_write = an8855_regmap_write,
+	.reg_update_bits = an8855_regmap_update_bits,
+	.disable_locking = true,
+	.rd_table = &an8855_readable_table,
+};
+
+static int an8855_mfd_probe(struct mdio_device *mdiodev)
+{
+	struct an8855_mfd_priv *priv;
+	struct regmap *regmap;
+
+	priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->bus = mdiodev->bus;
+	priv->dev = &mdiodev->dev;
+	priv->switch_addr = mdiodev->addr;
+	/* no DMA for mdiobus, mute warning for DMA mask not set */
+	priv->dev->dma_mask = &priv->dev->coherent_dma_mask;
+
+	regmap = devm_regmap_init(priv->dev, NULL, priv,
+				  &an8855_regmap_config);
+	if (IS_ERR(regmap))
+		dev_err_probe(priv->dev, PTR_ERR(priv->dev),
+			      "regmap initialization failed\n");
+
+	dev_set_drvdata(&mdiodev->dev, priv);
+
+	return devm_mfd_add_devices(priv->dev, PLATFORM_DEVID_AUTO, an8855_mfd_devs,
+				    ARRAY_SIZE(an8855_mfd_devs), NULL, 0,
+				    NULL);
+}
+
+static const struct of_device_id an8855_mfd_of_match[] = {
+	{ .compatible = "airoha,an8855-mfd" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_mfd_of_match);
+
+static struct mdio_driver an8855_mfd_driver = {
+	.probe = an8855_mfd_probe,
+	.mdiodrv.driver = {
+		.name = "an8855",
+		.of_match_table = an8855_mfd_of_match,
+	},
+};
+mdio_module_driver(an8855_mfd_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for Airoha AN8855 MFD");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c
new file mode 100644
index 0000000000..7dd62e1a86
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c
@@ -0,0 +1,2311 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Airoha AN8855 DSA Switch driver
+ * Copyright (C) 2023 Min Yao <min.yao at airoha.com>
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+#include <linux/bitfield.h>
+#include <linux/ethtool.h>
+#include <linux/etherdevice.h>
+#include <linux/gpio/consumer.h>
+#include <linux/if_bridge.h>
+#include <linux/iopoll.h>
+#include <linux/netdevice.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include <linux/phylink.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <net/dsa.h>
+
+#include "an8855.h"
+
+static const struct an8855_mib_desc an8855_mib[] = {
+	MIB_DESC(1, AN8855_PORT_MIB_TX_DROP, "TxDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_CRC_ERR, "TxCrcErr"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_COLLISION, "TxCollision"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_OVERSIZE_DROP, "TxOversizeDrop"),
+	MIB_DESC(2, AN8855_PORT_MIB_TX_BAD_PKT_BYTES, "TxBadPktBytes"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_DROP, "RxDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_FILTERING, "RxFiltering"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_CRC_ERR, "RxCrcErr"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_CTRL_DROP, "RxCtrlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_INGRESS_DROP, "RxIngressDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_ARL_DROP, "RxArlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_FLOW_CONTROL_DROP, "FlowControlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_WRED_DROP, "WredDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_MIRROR_DROP, "MirrorDrop"),
+	MIB_DESC(2, AN8855_PORT_MIB_RX_BAD_PKT_BYTES, "RxBadPktBytes"),
+	MIB_DESC(1, AN8855_PORT_MIB_RXS_FLOW_SAMPLING_PKT_DROP, "RxsFlowSamplingPktDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RXS_FLOW_TOTAL_PKT_DROP, "RxsFlowTotalPktDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_PORT_CONTROL_DROP, "PortControlDrop"),
+};
+
+static int
+an8855_mib_init(struct an8855_priv *priv)
+{
+	int ret;
+
+	ret = regmap_write(priv->regmap, AN8855_MIB_CCR,
+			   AN8855_CCR_MIB_ENABLE);
+	if (ret)
+		return ret;
+
+	return regmap_write(priv->regmap, AN8855_MIB_CCR,
+			    AN8855_CCR_MIB_ACTIVATE);
+}
+
+static void an8855_fdb_write(struct an8855_priv *priv, u16 vid,
+			     u8 port_mask, const u8 *mac,
+			     bool add) __must_hold(&priv->reg_mutex)
+{
+	u32 mac_reg[2] = { };
+	u32 reg;
+
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC0, mac[0]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC1, mac[1]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC2, mac[2]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC3, mac[3]);
+	mac_reg[1] |= FIELD_PREP(AN8855_ATA2_MAC4, mac[4]);
+	mac_reg[1] |= FIELD_PREP(AN8855_ATA2_MAC5, mac[5]);
+
+	regmap_bulk_write(priv->regmap, AN8855_ATA1, mac_reg,
+			  ARRAY_SIZE(mac_reg));
+
+	reg = AN8855_ATWD_IVL;
+	if (add)
+		reg |= AN8855_ATWD_VLD;
+	reg |= FIELD_PREP(AN8855_ATWD_VID, vid);
+	reg |= FIELD_PREP(AN8855_ATWD_FID, AN8855_FID_BRIDGED);
+	regmap_write(priv->regmap, AN8855_ATWD, reg);
+	regmap_write(priv->regmap, AN8855_ATWD2,
+		     FIELD_PREP(AN8855_ATWD2_PORT, port_mask));
+}
+
+static void an8855_fdb_read(struct an8855_priv *priv, struct an8855_fdb *fdb)
+{
+	u32 reg[4];
+
+	regmap_bulk_read(priv->regmap, AN8855_ATRD0, reg,
+			 ARRAY_SIZE(reg));
+
+	fdb->live = FIELD_GET(AN8855_ATRD0_LIVE, reg[0]);
+	fdb->type = FIELD_GET(AN8855_ATRD0_TYPE, reg[0]);
+	fdb->ivl = FIELD_GET(AN8855_ATRD0_IVL, reg[0]);
+	fdb->vid = FIELD_GET(AN8855_ATRD0_VID, reg[0]);
+	fdb->fid = FIELD_GET(AN8855_ATRD0_FID, reg[0]);
+	fdb->aging = FIELD_GET(AN8855_ATRD1_AGING, reg[1]);
+	fdb->port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, reg[3]);
+	fdb->mac[0] = FIELD_GET(AN8855_ATRD2_MAC0, reg[2]);
+	fdb->mac[1] = FIELD_GET(AN8855_ATRD2_MAC1, reg[2]);
+	fdb->mac[2] = FIELD_GET(AN8855_ATRD2_MAC2, reg[2]);
+	fdb->mac[3] = FIELD_GET(AN8855_ATRD2_MAC3, reg[2]);
+	fdb->mac[4] = FIELD_GET(AN8855_ATRD1_MAC4, reg[1]);
+	fdb->mac[5] = FIELD_GET(AN8855_ATRD1_MAC5, reg[1]);
+	fdb->noarp = !!FIELD_GET(AN8855_ATRD0_ARP, reg[0]);
+}
+
+static int an8855_fdb_cmd(struct an8855_priv *priv, u32 cmd,
+			  u32 *rsp) __must_hold(&priv->reg_mutex)
+{
+	u32 val;
+	int ret;
+
+	/* Set the command operating upon the MAC address entries */
+	val = AN8855_ATC_BUSY | cmd;
+	ret = regmap_write(priv->regmap, AN8855_ATC, val);
+	if (ret)
+		return ret;
+
+	ret = regmap_read_poll_timeout(priv->regmap, AN8855_ATC, val,
+				       !(val & AN8855_ATC_BUSY), 20, 200000);
+	if (ret)
+		return ret;
+
+	if (rsp)
+		*rsp = val;
+
+	return 0;
+}
+
+static void
+an8855_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
+{
+	struct dsa_port *dp = dsa_to_port(ds, port);
+	struct an8855_priv *priv = ds->priv;
+	bool learning = false;
+	u32 stp_state;
+
+	switch (state) {
+	case BR_STATE_DISABLED:
+		stp_state = AN8855_STP_DISABLED;
+		break;
+	case BR_STATE_BLOCKING:
+		stp_state = AN8855_STP_BLOCKING;
+		break;
+	case BR_STATE_LISTENING:
+		stp_state = AN8855_STP_LISTENING;
+		break;
+	case BR_STATE_LEARNING:
+		stp_state = AN8855_STP_LEARNING;
+		learning = dp->learning;
+		break;
+	case BR_STATE_FORWARDING:
+		learning = dp->learning;
+		fallthrough;
+	default:
+		stp_state = AN8855_STP_FORWARDING;
+		break;
+	}
+
+	regmap_update_bits(priv->regmap, AN8855_SSP_P(port),
+			   AN8855_FID_PST_MASK(AN8855_FID_BRIDGED),
+			   AN8855_FID_PST_VAL(AN8855_FID_BRIDGED, stp_state));
+
+	regmap_update_bits(priv->regmap, AN8855_PSC_P(port), AN8855_SA_DIS,
+			   learning ? 0 : AN8855_SA_DIS);
+}
+
+static void an8855_port_fast_age(struct dsa_switch *ds, int port)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	/* Set to clean Dynamic entry */
+	ret = regmap_write(priv->regmap, AN8855_ATA2, AN8855_ATA2_TYPE);
+	if (ret)
+		return;
+
+	/* Set Port */
+	ret = regmap_write(priv->regmap, AN8855_ATWD2,
+			   FIELD_PREP(AN8855_ATWD2_PORT, BIT(port)));
+	if (ret)
+		return;
+
+	/* Flush Dynamic entry at port */
+	an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_TYPE_PORT) |
+		       AN8855_FDB_FLUSH, NULL);
+}
+
+static int an8855_update_port_member(struct dsa_switch *ds, int port,
+				     const struct net_device *bridge_dev,
+				     bool join)
+{
+	struct an8855_priv *priv = ds->priv;
+	bool isolated, other_isolated;
+	struct dsa_port *dp;
+	u32 port_mask = 0;
+	int ret;
+
+	isolated = !!(priv->port_isolated_map & BIT(port));
+
+	dsa_switch_for_each_user_port(dp, ds) {
+		if (dp->index == port)
+			continue;
+
+		if (!dsa_port_offloads_bridge_dev(dp, bridge_dev))
+			continue;
+
+		other_isolated = !!(priv->port_isolated_map & BIT(dp->index));
+		port_mask |= BIT(dp->index);
+		/* Add/remove this port to the portvlan mask of the other
+		 * ports in the bridge
+		 */
+		if (join && !(isolated && other_isolated))
+			ret = regmap_set_bits(priv->regmap,
+					      AN8855_PORTMATRIX_P(dp->index),
+					      FIELD_PREP(AN8855_USER_PORTMATRIX,
+							 BIT(port)));
+		else
+			ret = regmap_clear_bits(priv->regmap,
+						AN8855_PORTMATRIX_P(dp->index),
+						FIELD_PREP(AN8855_USER_PORTMATRIX,
+							   BIT(port)));
+		if (ret)
+			return ret;
+	}
+
+	/* Add/remove all other ports to this port's portvlan mask */
+	return regmap_update_bits(priv->regmap, AN8855_PORTMATRIX_P(port),
+				  AN8855_USER_PORTMATRIX,
+				  join ? port_mask : ~port_mask);
+}
+
+static int an8855_port_pre_bridge_flags(struct dsa_switch *ds, int port,
+					struct switchdev_brport_flags flags,
+					struct netlink_ext_ack *extack)
+{
+	if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
+			   BR_BCAST_FLOOD | BR_ISOLATED))
+		return -EINVAL;
+
+	return 0;
+}
+
+static int an8855_port_bridge_flags(struct dsa_switch *ds, int port,
+				    struct switchdev_brport_flags flags,
+				    struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	if (flags.mask & BR_LEARNING) {
+		ret = regmap_update_bits(priv->regmap, AN8855_PSC_P(port), AN8855_SA_DIS,
+					 flags.val & BR_LEARNING ? 0 : AN8855_SA_DIS);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_UNUF, BIT(port),
+					 flags.val & BR_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_MCAST_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_UNMF, BIT(port),
+					 flags.val & BR_MCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+
+		ret = regmap_update_bits(priv->regmap, AN8855_UNIPMF, BIT(port),
+					 flags.val & BR_MCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_BCAST_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_BCF, BIT(port),
+					 flags.val & BR_BCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_ISOLATED) {
+		struct dsa_port *dp = dsa_to_port(ds, port);
+		struct net_device *bridge_dev = dsa_port_bridge_dev_get(dp);
+
+		if (flags.val & BR_ISOLATED)
+			priv->port_isolated_map |= BIT(port);
+		else
+			priv->port_isolated_map &= ~BIT(port);
+
+		ret = an8855_update_port_member(ds, port, bridge_dev, true);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int an8855_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 age_count, age_unit, val;
+
+	/* Convert msec in AN8855_L2_AGING_MS_CONSTANT counter */
+	val = msecs / AN8855_L2_AGING_MS_CONSTANT;
+	/* Derive the count unit */
+	age_unit = val / FIELD_MAX(AN8855_AGE_UNIT);
+	/* Get the count in unit, age_unit is always incremented by 1 internally */
+	age_count = val / (age_unit + 1);
+
+	return regmap_update_bits(priv->regmap, AN8855_AAC,
+				  AN8855_AGE_CNT | AN8855_AGE_UNIT,
+				  FIELD_PREP(AN8855_AGE_CNT, age_count) |
+				  FIELD_PREP(AN8855_AGE_UNIT, age_unit));
+}
+
+static int an8855_port_bridge_join(struct dsa_switch *ds, int port,
+				   struct dsa_bridge bridge,
+				   bool *tx_fwd_offload,
+				   struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	ret = an8855_update_port_member(ds, port, bridge.dev, true);
+	if (ret)
+		return ret;
+
+	/* Set to fallback mode for independent VLAN learning if in a bridge */
+	return regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+				  AN8855_PORT_VLAN,
+				  FIELD_PREP(AN8855_PORT_VLAN,
+					     AN8855_PORT_FALLBACK_MODE));
+}
+
+static void an8855_port_bridge_leave(struct dsa_switch *ds, int port,
+				     struct dsa_bridge bridge)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_update_port_member(ds, port, bridge.dev, false);
+
+	/* When a port is removed from the bridge, the port would be set up
+	 * back to the default as is at initial boot which is a VLAN-unaware
+	 * port.
+	 */
+	regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+			   AN8855_PORT_VLAN,
+			   FIELD_PREP(AN8855_PORT_VLAN,
+				      AN8855_PORT_MATRIX_MODE));
+}
+
+static int an8855_port_fdb_add(struct dsa_switch *ds, int port,
+			       const unsigned char *addr, u16 vid,
+			       struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	u8 port_mask = BIT(port);
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+	an8855_fdb_write(priv, vid, port_mask, addr, true);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int an8855_port_fdb_del(struct dsa_switch *ds, int port,
+			       const unsigned char *addr, u16 vid,
+			       struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	u8 port_mask = BIT(port);
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+	an8855_fdb_write(priv, vid, port_mask, addr, false);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int an8855_port_fdb_dump(struct dsa_switch *ds, int port,
+				dsa_fdb_dump_cb_t *cb, void *data)
+{
+	struct an8855_priv *priv = ds->priv;
+	int banks, count = 0;
+	u32 rsp;
+	int ret;
+	int i;
+
+	mutex_lock(&priv->reg_mutex);
+
+	/* Load search port */
+	ret = regmap_write(priv->regmap, AN8855_ATWD2,
+			   FIELD_PREP(AN8855_ATWD2_PORT, BIT(port)));
+	if (ret)
+		goto exit;
+	ret = an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_PORT) |
+			     AN8855_FDB_START, &rsp);
+	if (ret < 0)
+		goto exit;
+
+	do {
+		/* From response get the number of banks to read, exit if 0 */
+		banks = FIELD_GET(AN8855_ATC_HIT, rsp);
+		if (!banks)
+			break;
+
+		/* Each banks have 4 entry */
+		for (i = 0; i < 4; i++) {
+			struct an8855_fdb _fdb = {  };
+
+			count++;
+
+			/* Check if bank is present */
+			if (!(banks & BIT(i)))
+				continue;
+
+			/* Select bank entry index */
+			ret = regmap_write(priv->regmap, AN8855_ATRDS,
+					   FIELD_PREP(AN8855_ATRD_SEL, i));
+			if (ret)
+				break;
+			/* wait 1ms for the bank entry to be filled */
+			usleep_range(1000, 1500);
+			an8855_fdb_read(priv, &_fdb);
+
+			if (!_fdb.live)
+				continue;
+			ret = cb(_fdb.mac, _fdb.vid, _fdb.noarp, data);
+			if (ret < 0)
+				break;
+		}
+
+		/* Stop if reached max FDB number */
+		if (count >= AN8855_NUM_FDB_RECORDS)
+			break;
+
+		/* Read next bank */
+		ret = an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_PORT) |
+				     AN8855_FDB_NEXT, &rsp);
+		if (ret < 0)
+			break;
+	} while (true);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+	return ret;
+}
+
+static int an8855_vlan_cmd(struct an8855_priv *priv, enum an8855_vlan_cmd cmd,
+			   u16 vid) __must_hold(&priv->reg_mutex)
+{
+	u32 val;
+	int ret;
+
+	val = AN8855_VTCR_BUSY | FIELD_PREP(AN8855_VTCR_FUNC, cmd) |
+	      FIELD_PREP(AN8855_VTCR_VID, vid);
+	ret = regmap_write(priv->regmap, AN8855_VTCR, val);
+	if (ret)
+		return ret;
+
+	return regmap_read_poll_timeout(priv->regmap, AN8855_VTCR, val,
+					!(val & AN8855_VTCR_BUSY), 20, 200000);
+}
+
+static int an8855_vlan_add(struct an8855_priv *priv, u8 port, u16 vid,
+			   bool untagged) __must_hold(&priv->reg_mutex)
+{
+	u32 port_mask;
+	u32 val;
+	int ret;
+
+	/* Fetch entry */
+	ret = an8855_vlan_cmd(priv, AN8855_VTCR_RD_VID, vid);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_VARD0, &val);
+	if (ret)
+		return ret;
+	port_mask = FIELD_GET(AN8855_VA0_PORT, val) | BIT(port);
+
+	/* Validate the entry with independent learning, create egress tag per
+	 * VLAN and joining the port as one of the port members.
+	 */
+	val = (val & AN8855_VA0_ETAG) | AN8855_VA0_IVL_MAC |
+	      AN8855_VA0_VTAG_EN | AN8855_VA0_VLAN_VALID |
+	      FIELD_PREP(AN8855_VA0_PORT, port_mask) |
+	      FIELD_PREP(AN8855_VA0_FID, AN8855_FID_BRIDGED);
+	ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_VAWD1, 0);
+	if (ret)
+		return ret;
+
+	/* CPU port is always taken as a tagged port for serving more than one
+	 * VLANs across and also being applied with egress type stack mode for
+	 * that VLAN tags would be appended after hardware special tag used as
+	 * DSA tag.
+	 */
+	if (port == AN8855_CPU_PORT)
+		val = AN8855_VLAN_EGRESS_STACK;
+	/* Decide whether adding tag or not for those outgoing packets from the
+	 * port inside the VLAN.
+	 */
+	else
+		val = untagged ? AN8855_VLAN_EGRESS_UNTAG : AN8855_VLAN_EGRESS_TAG;
+	ret = regmap_update_bits(priv->regmap, AN8855_VAWD0,
+				 AN8855_VA0_ETAG_PORT_MASK(port),
+				 AN8855_VA0_ETAG_PORT_VAL(port, val));
+	if (ret)
+		return ret;
+
+	/* Flush result to hardware */
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID, vid);
+}
+
+static int an8855_vlan_del(struct an8855_priv *priv, u8 port,
+			   u16 vid) __must_hold(&priv->reg_mutex)
+{
+	u32 port_mask;
+	u32 val;
+	int ret;
+
+	/* Fetch entry */
+	ret = an8855_vlan_cmd(priv, AN8855_VTCR_RD_VID, vid);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_VARD0, &val);
+	if (ret)
+		return ret;
+	port_mask = FIELD_GET(AN8855_VA0_PORT, val) & ~BIT(port);
+
+	if (!(val & AN8855_VA0_VLAN_VALID)) {
+		dev_err(priv->dev, "Cannot be deleted due to invalid entry\n");
+		return -EINVAL;
+	}
+
+	if (port_mask) {
+		val = (val & AN8855_VA0_ETAG) | AN8855_VA0_IVL_MAC |
+		       AN8855_VA0_VTAG_EN | AN8855_VA0_VLAN_VALID |
+		       FIELD_PREP(AN8855_VA0_PORT, port_mask);
+		ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+		if (ret)
+			return ret;
+	} else {
+		ret = regmap_write(priv->regmap, AN8855_VAWD0, 0);
+		if (ret)
+			return ret;
+	}
+	ret = regmap_write(priv->regmap, AN8855_VAWD1, 0);
+	if (ret)
+		return ret;
+
+	/* Flush result to hardware */
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID, vid);
+}
+
+static int an8855_port_set_vlan_mode(struct an8855_priv *priv, int port,
+				     enum an8855_port_mode port_mode,
+				     enum an8855_vlan_port_eg_tag eg_tag,
+				     enum an8855_vlan_port_attr vlan_attr,
+				     enum an8855_vlan_port_acc_frm acc_frm)
+{
+	int ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+				 AN8855_PORT_VLAN,
+				 FIELD_PREP(AN8855_PORT_VLAN, port_mode));
+	if (ret)
+		return ret;
+
+	return regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+				  AN8855_PVC_EG_TAG | AN8855_VLAN_ATTR | AN8855_ACC_FRM,
+				  FIELD_PREP(AN8855_PVC_EG_TAG, eg_tag) |
+				  FIELD_PREP(AN8855_VLAN_ATTR, vlan_attr) |
+				  FIELD_PREP(AN8855_ACC_FRM, acc_frm));
+}
+
+static int an8855_port_set_pid(struct an8855_priv *priv, int port,
+			       u16 pid)
+{
+	int ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PPBV1_P(port),
+				 AN8855_PPBV_G0_PORT_VID,
+				 FIELD_PREP(AN8855_PPBV_G0_PORT_VID, pid));
+	if (ret)
+		return ret;
+
+	return regmap_update_bits(priv->regmap, AN8855_PVID_P(port),
+				  AN8855_G0_PORT_VID,
+				  FIELD_PREP(AN8855_G0_PORT_VID, pid));
+}
+
+static int an8855_port_vlan_filtering(struct dsa_switch *ds, int port,
+				      bool vlan_filtering,
+				      struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	/* The port is being kept as VLAN-unaware port when bridge is
+	 * set up with vlan_filtering not being set, Otherwise, the
+	 * port and the corresponding CPU port is required the setup
+	 * for becoming a VLAN-aware port.
+	 */
+	if (vlan_filtering) {
+		u32 acc_frm;
+		/* CPU port is set to fallback mode to let untagged
+		 * frames pass through.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, AN8855_CPU_PORT,
+						AN8855_PORT_FALLBACK_MODE,
+						AN8855_VLAN_EG_CONSISTENT,
+						AN8855_VLAN_USER,
+						AN8855_VLAN_ACC_ALL);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+		if (ret)
+			return ret;
+
+		/* Only accept tagged frames if PVID is not set */
+		if (FIELD_GET(AN8855_G0_PORT_VID, val) != AN8855_PORT_VID_DEFAULT)
+			acc_frm = AN8855_VLAN_ACC_TAGGED;
+		else
+			acc_frm = AN8855_VLAN_ACC_ALL;
+
+		/* Trapped into security mode allows packet forwarding through VLAN
+		 * table lookup.
+		 * Set the port as a user port which is to be able to recognize VID
+		 * from incoming packets before fetching entry within the VLAN table.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, port,
+						AN8855_PORT_SECURITY_MODE,
+						AN8855_VLAN_EG_DISABLED,
+						AN8855_VLAN_USER,
+						acc_frm);
+		if (ret)
+			return ret;
+	} else {
+		bool disable_cpu_vlan = true;
+		struct dsa_port *dp;
+		u32 port_mode;
+
+		/* This is called after .port_bridge_leave when leaving a VLAN-aware
+		 * bridge. Don't set standalone ports to fallback mode.
+		 */
+		if (dsa_port_bridge_dev_get(dsa_to_port(ds, port)))
+			port_mode = AN8855_PORT_FALLBACK_MODE;
+		else
+			port_mode = AN8855_PORT_MATRIX_MODE;
+
+		/* When a port is removed from the bridge, the port would be set up
+		 * back to the default as is at initial boot which is a VLAN-unaware
+		 * port.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, port, port_mode,
+						AN8855_VLAN_EG_CONSISTENT,
+						AN8855_VLAN_TRANSPARENT,
+						AN8855_VLAN_ACC_ALL);
+		if (ret)
+			return ret;
+
+		/* Restore default PVID */
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+
+		dsa_switch_for_each_user_port(dp, ds) {
+			if (dsa_port_is_vlan_filtering(dp)) {
+				disable_cpu_vlan = false;
+				break;
+			}
+		}
+
+		if (disable_cpu_vlan) {
+			ret = an8855_port_set_vlan_mode(priv, AN8855_CPU_PORT,
+							AN8855_PORT_MATRIX_MODE,
+							AN8855_VLAN_EG_CONSISTENT,
+							AN8855_VLAN_USER,
+							AN8855_VLAN_ACC_ALL);
+			if (ret)
+				return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int an8855_port_vlan_add(struct dsa_switch *ds, int port,
+				const struct switchdev_obj_port_vlan *vlan,
+				struct netlink_ext_ack *extack)
+{
+	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+	bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = an8855_vlan_add(priv, port, vlan->vid, untagged);
+	mutex_unlock(&priv->reg_mutex);
+	if (ret)
+		return ret;
+
+	if (pvid) {
+		/* Accept all frames if PVID is set */
+		regmap_update_bits(priv->regmap, AN8855_PVC_P(port), AN8855_ACC_FRM,
+				   FIELD_PREP(AN8855_ACC_FRM, AN8855_VLAN_ACC_ALL));
+
+		/* Only configure PVID if VLAN filtering is enabled */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = an8855_port_set_pid(priv, port, vlan->vid);
+			if (ret)
+				return ret;
+		}
+	} else if (vlan->vid) {
+		ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+		if (ret)
+			return ret;
+
+		if (FIELD_GET(AN8855_G0_PORT_VID, val) != vlan->vid)
+			return 0;
+
+		/* This VLAN is overwritten without PVID, so unset it */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+						 AN8855_ACC_FRM,
+						 FIELD_PREP(AN8855_ACC_FRM,
+							    AN8855_VLAN_ACC_TAGGED));
+			if (ret)
+				return ret;
+		}
+
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int an8855_port_vlan_del(struct dsa_switch *ds, int port,
+				const struct switchdev_obj_port_vlan *vlan)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = an8855_vlan_del(priv, port, vlan->vid);
+	mutex_unlock(&priv->reg_mutex);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+	if (ret)
+		return ret;
+
+	/* PVID is being restored to the default whenever the PVID port
+	 * is being removed from the VLAN.
+	 */
+	if (FIELD_GET(AN8855_G0_PORT_VID, val) == vlan->vid) {
+		/* Only accept tagged frames if the port is VLAN-aware */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+						 AN8855_ACC_FRM,
+						 FIELD_PREP(AN8855_ACC_FRM,
+							    AN8855_VLAN_ACC_TAGGED));
+			if (ret)
+				return ret;
+		}
+
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int
+an8855_port_mdb_add(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_mdb *mdb,
+		    struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	const u8 *addr = mdb->addr;
+	u16 vid = mdb->vid;
+	u8 port_mask = 0;
+	u32 val;
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+
+	an8855_fdb_write(priv, vid, 0, addr, false);
+	if (!an8855_fdb_cmd(priv, AN8855_FDB_READ, NULL)) {
+		ret = regmap_read(priv->regmap, AN8855_ATRD3, &val);
+		if (ret)
+			goto exit;
+
+		port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, val);
+	}
+
+	port_mask |= BIT(port);
+	an8855_fdb_write(priv, vid, port_mask, addr, true);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+an8855_port_mdb_del(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_mdb *mdb,
+		    struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	const u8 *addr = mdb->addr;
+	u16 vid = mdb->vid;
+	u8 port_mask = 0;
+	u32 val;
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+
+	an8855_fdb_write(priv, vid, 0, addr, 0);
+	if (!an8855_fdb_cmd(priv, AN8855_FDB_READ, NULL)) {
+		ret = regmap_read(priv->regmap, AN8855_ATRD3, &val);
+		if (ret)
+			goto exit;
+
+		port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, val);
+	}
+
+	port_mask &= ~BIT(port);
+	an8855_fdb_write(priv, vid, port_mask, addr, port_mask ? true : false);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+an8855_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
+{
+	struct an8855_priv *priv = ds->priv;
+	int length;
+	u32 val;
+
+	/* When a new MTU is set, DSA always set the CPU port's MTU to the
+	 * largest MTU of the slave ports. Because the switch only has a global
+	 * RX length register, only allowing CPU port here is enough.
+	 */
+	if (!dsa_is_cpu_port(ds, port))
+		return 0;
+
+	/* RX length also includes Ethernet header, MTK tag, and FCS length */
+	length = new_mtu + ETH_HLEN + MTK_TAG_LEN + ETH_FCS_LEN;
+	if (length <= 1522)
+		val = AN8855_MAX_RX_PKT_1518_1522;
+	else if (length <= 1536)
+		val = AN8855_MAX_RX_PKT_1536;
+	else if (length <= 1552)
+		val = AN8855_MAX_RX_PKT_1552;
+	else if (length <= 3072)
+		val = AN8855_MAX_RX_JUMBO_3K;
+	else if (length <= 4096)
+		val = AN8855_MAX_RX_JUMBO_4K;
+	else if (length <= 5120)
+		val = AN8855_MAX_RX_JUMBO_5K;
+	else if (length <= 6144)
+		val = AN8855_MAX_RX_JUMBO_6K;
+	else if (length <= 7168)
+		val = AN8855_MAX_RX_JUMBO_7K;
+	else if (length <= 8192)
+		val = AN8855_MAX_RX_JUMBO_8K;
+	else if (length <= 9216)
+		val = AN8855_MAX_RX_JUMBO_9K;
+	else if (length <= 12288)
+		val = AN8855_MAX_RX_JUMBO_12K;
+	else if (length <= 15360)
+		val = AN8855_MAX_RX_JUMBO_15K;
+	else
+		val = AN8855_MAX_RX_JUMBO_16K;
+
+	/* Enable JUMBO packet */
+	if (length > 1552)
+		val |= AN8855_MAX_RX_PKT_JUMBO;
+
+	return regmap_update_bits(priv->regmap, AN8855_GMACCR,
+				  AN8855_MAX_RX_JUMBO | AN8855_MAX_RX_PKT_LEN,
+				  val);
+}
+
+static int
+an8855_port_max_mtu(struct dsa_switch *ds, int port)
+{
+	return AN8855_MAX_MTU;
+}
+
+static void
+an8855_get_strings(struct dsa_switch *ds, int port, u32 stringset,
+		   uint8_t *data)
+{
+	int i;
+
+	if (stringset != ETH_SS_STATS)
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(an8855_mib); i++)
+		ethtool_puts(&data, an8855_mib[i].name);
+}
+
+static void
+an8855_read_port_stats(struct an8855_priv *priv, int port, u32 offset, u8 size,
+		       uint64_t *data)
+{
+	u32 val, reg = AN8855_PORT_MIB_COUNTER(port) + offset;
+
+	regmap_read(priv->regmap, reg, &val);
+	*data = val;
+
+	if (size == 2) {
+		regmap_read(priv->regmap, reg + 4, &val);
+		*data |= (u64)val << 32;
+	}
+}
+
+static void
+an8855_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)
+{
+	struct an8855_priv *priv = ds->priv;
+	const struct an8855_mib_desc *mib;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(an8855_mib); i++) {
+		mib = &an8855_mib[i];
+
+		an8855_read_port_stats(priv, port, mib->offset, mib->size,
+				       data + i);
+	}
+}
+
+static int
+an8855_get_sset_count(struct dsa_switch *ds, int port, int sset)
+{
+	if (sset != ETH_SS_STATS)
+		return 0;
+
+	return ARRAY_SIZE(an8855_mib);
+}
+
+static void
+an8855_get_eth_mac_stats(struct dsa_switch *ds, int port,
+			 struct ethtool_eth_mac_stats *mac_stats)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	/* MIB counter doesn't provide a FramesTransmittedOK but instead
+	 * provide stats for Unicast, Broadcast and Multicast frames separately.
+	 * To simulate a global frame counter, read Unicast and addition Multicast
+	 * and Broadcast later
+	 */
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_UNICAST, 1,
+			       &mac_stats->FramesTransmittedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_SINGLE_COLLISION, 1,
+			       &mac_stats->SingleCollisionFrames);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_MULTIPLE_COLLISION, 1,
+			       &mac_stats->MultipleCollisionFrames);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_UNICAST, 1,
+			       &mac_stats->FramesReceivedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_BYTES, 2,
+			       &mac_stats->OctetsTransmittedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_ALIGN_ERR, 1,
+			       &mac_stats->AlignmentErrors);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_DEFERRED, 1,
+			       &mac_stats->FramesWithDeferredXmissions);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_LATE_COLLISION, 1,
+			       &mac_stats->LateCollisions);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,
+			       &mac_stats->FramesAbortedDueToXSColls);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_BYTES, 2,
+			       &mac_stats->OctetsReceivedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_MULTICAST, 1,
+			       &mac_stats->MulticastFramesXmittedOK);
+	mac_stats->FramesTransmittedOK += mac_stats->MulticastFramesXmittedOK;
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_BROADCAST, 1,
+			       &mac_stats->BroadcastFramesXmittedOK);
+	mac_stats->FramesTransmittedOK += mac_stats->BroadcastFramesXmittedOK;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_MULTICAST, 1,
+			       &mac_stats->MulticastFramesReceivedOK);
+	mac_stats->FramesReceivedOK += mac_stats->MulticastFramesReceivedOK;
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_BROADCAST, 1,
+			       &mac_stats->BroadcastFramesReceivedOK);
+	mac_stats->FramesReceivedOK += mac_stats->BroadcastFramesReceivedOK;
+}
+
+static const struct ethtool_rmon_hist_range an8855_rmon_ranges[] = {
+	{ 0, 64 },
+	{ 65, 127 },
+	{ 128, 255 },
+	{ 256, 511 },
+	{ 512, 1023 },
+	{ 1024, 1518 },
+	{ 1519, AN8855_MAX_MTU },
+	{}
+};
+
+static void an8855_get_rmon_stats(struct dsa_switch *ds, int port,
+				  struct ethtool_rmon_stats *rmon_stats,
+				  const struct ethtool_rmon_hist_range **ranges)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_UNDER_SIZE_ERR, 1,
+			       &rmon_stats->undersize_pkts);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_OVER_SZ_ERR, 1,
+			       &rmon_stats->oversize_pkts);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_FRAG_ERR, 1,
+			       &rmon_stats->fragments);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_JABBER_ERR, 1,
+			       &rmon_stats->jabbers);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_64, 1,
+			       &rmon_stats->hist[0]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_65_TO_127, 1,
+			       &rmon_stats->hist[1]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_128_TO_255, 1,
+			       &rmon_stats->hist[2]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_256_TO_511, 1,
+			       &rmon_stats->hist[3]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_512_TO_1023, 1,
+			       &rmon_stats->hist[4]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_1024_TO_1518, 1,
+			       &rmon_stats->hist[5]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_1519_TO_MAX, 1,
+			       &rmon_stats->hist[6]);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_64, 1,
+			       &rmon_stats->hist_tx[0]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_65_TO_127, 1,
+			       &rmon_stats->hist_tx[1]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_128_TO_255, 1,
+			       &rmon_stats->hist_tx[2]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_256_TO_511, 1,
+			       &rmon_stats->hist_tx[3]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_512_TO_1023, 1,
+			       &rmon_stats->hist_tx[4]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_1024_TO_1518, 1,
+			       &rmon_stats->hist_tx[5]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_1519_TO_MAX, 1,
+			       &rmon_stats->hist_tx[6]);
+
+	*ranges = an8855_rmon_ranges;
+}
+
+static void an8855_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
+				      struct ethtool_eth_ctrl_stats *ctrl_stats)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PAUSE, 1,
+			       &ctrl_stats->MACControlFramesTransmitted);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PAUSE, 1,
+			       &ctrl_stats->MACControlFramesReceived);
+}
+
+static int an8855_port_mirror_add(struct dsa_switch *ds, int port,
+				  struct dsa_mall_mirror_tc_entry *mirror,
+				  bool ingress,
+				  struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int monitor_port;
+	u32 val;
+	int ret;
+
+	/* Check for existent entry */
+	if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port))
+		return -EEXIST;
+
+	ret = regmap_read(priv->regmap, AN8855_MIR, &val);
+	if (ret)
+		return ret;
+
+	/* AN8855 supports 4 monitor port, but only use first group */
+	monitor_port = FIELD_GET(AN8855_MIRROR_PORT, val);
+	if (val & AN8855_MIRROR_EN && monitor_port != mirror->to_local_port)
+		return -EEXIST;
+
+	val = AN8855_MIRROR_EN;
+	val |= FIELD_PREP(AN8855_MIRROR_PORT, mirror->to_local_port);
+	ret = regmap_update_bits(priv->regmap, AN8855_MIR,
+				 AN8855_MIRROR_EN | AN8855_MIRROR_PORT,
+				 val);
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_PCR_P(port),
+			      ingress ? AN8855_PORT_RX_MIR : AN8855_PORT_TX_MIR);
+	if (ret)
+		return ret;
+
+	if (ingress)
+		priv->mirror_rx |= BIT(port);
+	else
+		priv->mirror_tx |= BIT(port);
+
+	return 0;
+}
+
+static void an8855_port_mirror_del(struct dsa_switch *ds, int port,
+				   struct dsa_mall_mirror_tc_entry *mirror)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	if (mirror->ingress)
+		priv->mirror_rx &= ~BIT(port);
+	else
+		priv->mirror_tx &= ~BIT(port);
+
+	regmap_clear_bits(priv->regmap, AN8855_PCR_P(port),
+			  mirror->ingress ? AN8855_PORT_RX_MIR :
+					    AN8855_PORT_TX_MIR);
+
+	if (!priv->mirror_rx && !priv->mirror_tx)
+		regmap_clear_bits(priv->regmap, AN8855_MIR, AN8855_MIRROR_EN);
+}
+
+static int an8855_port_set_status(struct an8855_priv *priv, int port,
+				  bool enable)
+{
+	if (enable)
+		return regmap_set_bits(priv->regmap, AN8855_PMCR_P(port),
+				       AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+	else
+		return regmap_clear_bits(priv->regmap, AN8855_PMCR_P(port),
+					 AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+}
+
+static int an8855_port_enable(struct dsa_switch *ds, int port,
+			      struct phy_device *phy)
+{
+	return an8855_port_set_status(ds->priv, port, true);
+}
+
+static void an8855_port_disable(struct dsa_switch *ds, int port)
+{
+	an8855_port_set_status(ds->priv, port, false);
+}
+
+static u32 en8855_get_phy_flags(struct dsa_switch *ds, int port)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	/* PHY doesn't need calibration */
+	if (!priv->phy_require_calib)
+		return 0;
+
+	/* Use AN8855_PHY_FLAGS_EN_CALIBRATION to signal
+	 * calibration needed.
+	 */
+	return AN8855_PHY_FLAGS_EN_CALIBRATION;
+}
+
+static enum dsa_tag_protocol
+an8855_get_tag_protocol(struct dsa_switch *ds, int port,
+			enum dsa_tag_protocol mp)
+{
+	return DSA_TAG_PROTO_MTK;
+}
+
+/* Similar to MT7530 also trap link local frame and special frame to CPU */
+static int an8855_trap_special_frames(struct an8855_priv *priv)
+{
+	int ret;
+
+	/* Trap BPDUs to the CPU port(s) and egress them
+	 * VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_BPC,
+				 AN8855_BPDU_BPDU_FR | AN8855_BPDU_EG_TAG |
+				 AN8855_BPDU_PORT_FW,
+				 AN8855_BPDU_BPDU_FR |
+				 FIELD_PREP(AN8855_BPDU_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_BPDU_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap 802.1X PAE frames to the CPU port(s) and egress them
+	 * VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_PAC,
+				 AN8855_PAE_BPDU_FR | AN8855_PAE_EG_TAG |
+				 AN8855_PAE_PORT_FW,
+				 AN8855_PAE_BPDU_FR |
+				 FIELD_PREP(AN8855_PAE_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_PAE_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :01 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R01_BPDU_FR | AN8855_R01_EG_TAG |
+				 AN8855_R01_PORT_FW,
+				 AN8855_R01_BPDU_FR |
+				 FIELD_PREP(AN8855_R01_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R01_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :02 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R02_BPDU_FR | AN8855_R02_EG_TAG |
+				 AN8855_R02_PORT_FW,
+				 AN8855_R02_BPDU_FR |
+				 FIELD_PREP(AN8855_R02_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R02_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :03 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R03_BPDU_FR | AN8855_R03_EG_TAG |
+				 AN8855_R03_PORT_FW,
+				 AN8855_R03_BPDU_FR |
+				 FIELD_PREP(AN8855_R03_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R03_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :0E MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	return regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				  AN8855_R0E_BPDU_FR | AN8855_R0E_EG_TAG |
+				  AN8855_R0E_PORT_FW,
+				  AN8855_R0E_BPDU_FR |
+				  FIELD_PREP(AN8855_R0E_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				  FIELD_PREP(AN8855_R0E_PORT_FW, AN8855_BPDU_CPU_ONLY));
+}
+
+static int
+an8855_setup_pvid_vlan(struct an8855_priv *priv)
+{
+	u32 val;
+	int ret;
+
+	/* Validate the entry with independent learning, keep the original
+	 * ingress tag attribute.
+	 */
+	val = AN8855_VA0_IVL_MAC | AN8855_VA0_EG_CON |
+	      FIELD_PREP(AN8855_VA0_FID, AN8855_FID_BRIDGED) |
+	      AN8855_VA0_PORT | AN8855_VA0_VLAN_VALID;
+	ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+	if (ret)
+		return ret;
+
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID,
+			       AN8855_PORT_VID_DEFAULT);
+}
+
+static int an8855_setup(struct dsa_switch *ds)
+{
+	struct an8855_priv *priv = ds->priv;
+	struct dsa_port *dp;
+	int ret;
+
+	/* Enable and reset MIB counters */
+	ret = an8855_mib_init(priv);
+	if (ret)
+		return ret;
+
+	dsa_switch_for_each_user_port(dp, ds) {
+		/* Disable MAC by default on all user ports */
+		ret = an8855_port_set_status(priv, dp->index, false);
+		if (ret)
+			return ret;
+
+		/* Individual user ports get connected to CPU port only */
+		ret = regmap_write(priv->regmap, AN8855_PORTMATRIX_P(dp->index),
+				   FIELD_PREP(AN8855_PORTMATRIX, BIT(AN8855_CPU_PORT)));
+		if (ret)
+			return ret;
+
+		/* Disable Broadcast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_BCF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Disable Unknown Unicast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNUF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Disable Unknown Multicast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNMF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNIPMF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Set default PVID to on all user ports */
+		ret = an8855_port_set_pid(priv, dp->index, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	/* Enable Airoha header mode on the cpu port */
+	ret = regmap_write(priv->regmap, AN8855_PVC_P(AN8855_CPU_PORT),
+			   AN8855_PORT_SPEC_REPLACE_MODE | AN8855_PORT_SPEC_TAG);
+	if (ret)
+		return ret;
+
+	/* Unknown multicast frame forwarding to the cpu port */
+	ret = regmap_write(priv->regmap, AN8855_UNMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Set CPU port number */
+	ret = regmap_update_bits(priv->regmap, AN8855_MFC,
+				 AN8855_CPU_EN | AN8855_CPU_PORT_IDX,
+				 AN8855_CPU_EN |
+				 FIELD_PREP(AN8855_CPU_PORT_IDX, AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* CPU port gets connected to all user ports of
+	 * the switch.
+	 */
+	ret = regmap_write(priv->regmap, AN8855_PORTMATRIX_P(AN8855_CPU_PORT),
+			   FIELD_PREP(AN8855_PORTMATRIX, dsa_user_ports(ds)));
+	if (ret)
+		return ret;
+
+	/* CPU port is set to fallback mode to let untagged
+	 * frames pass through.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_PCR_P(AN8855_CPU_PORT),
+				 AN8855_PORT_VLAN,
+				 FIELD_PREP(AN8855_PORT_VLAN, AN8855_PORT_FALLBACK_MODE));
+	if (ret)
+		return ret;
+
+	/* Enable Broadcast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_BCF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Enable Unknown Unicast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_UNUF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Enable Unknown Multicast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_UNMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_UNIPMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Setup Trap special frame to CPU rules */
+	ret = an8855_trap_special_frames(priv);
+	if (ret)
+		return ret;
+
+	dsa_switch_for_each_port(dp, ds) {
+		/* Disable Learning on all ports.
+		 * Learning on CPU is disabled for fdb isolation and handled by
+		 * assisted_learning_on_cpu_port.
+		 */
+		ret = regmap_set_bits(priv->regmap, AN8855_PSC_P(dp->index),
+				      AN8855_SA_DIS);
+		if (ret)
+			return ret;
+
+		/* Enable consistent egress tag (for VLAN unware VLAN-passtrough) */
+		ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(dp->index),
+					 AN8855_PVC_EG_TAG,
+					 FIELD_PREP(AN8855_PVC_EG_TAG, AN8855_VLAN_EG_CONSISTENT));
+		if (ret)
+			return ret;
+	}
+
+	/* Setup VLAN for Default PVID */
+	ret = an8855_setup_pvid_vlan(priv);
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_CKGCR,
+				AN8855_CKG_LNKDN_GLB_STOP | AN8855_CKG_LNKDN_PORT_STOP);
+	if (ret)
+		return ret;
+
+	/* Release global PHY power down */
+	ret = regmap_write(priv->regmap, AN8855_RG_GPHY_AFE_PWD, 0x0);
+	if (ret)
+		return ret;
+
+	ds->configure_vlan_while_not_filtering = true;
+
+	/* Flush the FDB table */
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_FLUSH, NULL);
+	if (ret < 0)
+		return ret;
+
+	/* Set min a max ageing value supported */
+	ds->ageing_time_min = AN8855_L2_AGING_MS_CONSTANT;
+	ds->ageing_time_max = FIELD_MAX(AN8855_AGE_CNT) *
+			      FIELD_MAX(AN8855_AGE_UNIT) *
+			      AN8855_L2_AGING_MS_CONSTANT;
+
+	/* Enable assisted learning for fdb isolation */
+	ds->assisted_learning_on_cpu_port = true;
+
+	return 0;
+}
+
+static struct phylink_pcs *an8855_phylink_mac_select_pcs(struct phylink_config *config,
+							 phy_interface_t interface)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+
+	switch (interface) {
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_2500BASEX:
+		return &priv->pcs;
+	default:
+		return NULL;
+	}
+}
+
+static void an8855_phylink_mac_config(struct phylink_config *config,
+				      unsigned int mode,
+				      const struct phylink_link_state *state)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct dsa_switch *ds = dp->ds;
+	struct an8855_priv *priv;
+	int port = dp->index;
+
+	priv = ds->priv;
+
+	/* Nothing to configure for internal ports */
+	if (port != 5)
+		return;
+
+	regmap_update_bits(priv->regmap, AN8855_PMCR_P(port),
+			   AN8855_PMCR_IFG_XMIT | AN8855_PMCR_MAC_MODE |
+			   AN8855_PMCR_BACKOFF_EN | AN8855_PMCR_BACKPR_EN,
+			   FIELD_PREP(AN8855_PMCR_IFG_XMIT, 0x1) |
+			   AN8855_PMCR_MAC_MODE | AN8855_PMCR_BACKOFF_EN |
+			   AN8855_PMCR_BACKPR_EN);
+}
+
+static void an8855_phylink_get_caps(struct dsa_switch *ds, int port,
+				    struct phylink_config *config)
+{
+	switch (port) {
+	case 0:
+	case 1:
+	case 2:
+	case 3:
+	case 4:
+		__set_bit(PHY_INTERFACE_MODE_GMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
+			  config->supported_interfaces);
+		break;
+	case 5:
+		phy_interface_set_rgmii(config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_SGMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,
+			  config->supported_interfaces);
+		break;
+	}
+
+	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+				   MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
+}
+
+static void an8855_phylink_mac_link_down(struct phylink_config *config,
+					 unsigned int mode,
+					 phy_interface_t interface)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+
+	/* With autoneg just disable TX/RX else also force link down */
+	if (phylink_autoneg_inband(mode)) {
+		regmap_clear_bits(priv->regmap, AN8855_PMCR_P(dp->index),
+				  AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+	} else {
+		regmap_update_bits(priv->regmap, AN8855_PMCR_P(dp->index),
+				   AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN |
+				   AN8855_PMCR_FORCE_MODE | AN8855_PMCR_FORCE_LNK,
+				   AN8855_PMCR_FORCE_MODE);
+	}
+}
+
+static void an8855_phylink_mac_link_up(struct phylink_config *config,
+				       struct phy_device *phydev, unsigned int mode,
+				       phy_interface_t interface, int speed,
+				       int duplex, bool tx_pause, bool rx_pause)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+	int port = dp->index;
+	u32 reg;
+
+	reg = regmap_read(priv->regmap, AN8855_PMCR_P(port), &reg);
+	if (phylink_autoneg_inband(mode)) {
+		reg &= ~AN8855_PMCR_FORCE_MODE;
+	} else {
+		reg |= AN8855_PMCR_FORCE_MODE | AN8855_PMCR_FORCE_LNK;
+
+		reg &= ~AN8855_PMCR_FORCE_SPEED;
+		switch (speed) {
+		case SPEED_10:
+			reg |= AN8855_PMCR_FORCE_SPEED_10;
+			break;
+		case SPEED_100:
+			reg |= AN8855_PMCR_FORCE_SPEED_100;
+			break;
+		case SPEED_1000:
+			reg |= AN8855_PMCR_FORCE_SPEED_1000;
+			break;
+		case SPEED_2500:
+			reg |= AN8855_PMCR_FORCE_SPEED_2500;
+			break;
+		case SPEED_5000:
+			dev_err(priv->dev, "Missing support for 5G speed. Aborting...\n");
+			return;
+		}
+
+		reg &= ~AN8855_PMCR_FORCE_FDX;
+		if (duplex == DUPLEX_FULL)
+			reg |= AN8855_PMCR_FORCE_FDX;
+
+		reg &= ~AN8855_PMCR_RX_FC_EN;
+		if (rx_pause || dsa_port_is_cpu(dp))
+			reg |= AN8855_PMCR_RX_FC_EN;
+
+		reg &= ~AN8855_PMCR_TX_FC_EN;
+		if (rx_pause || dsa_port_is_cpu(dp))
+			reg |= AN8855_PMCR_TX_FC_EN;
+
+		/* Disable any EEE options */
+		reg &= ~(AN8855_PMCR_FORCE_EEE5G | AN8855_PMCR_FORCE_EEE2P5G |
+			 AN8855_PMCR_FORCE_EEE1G | AN8855_PMCR_FORCE_EEE100);
+	}
+
+	reg |= AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN;
+
+	regmap_write(priv->regmap, AN8855_PMCR_P(port), reg);
+}
+
+static unsigned int an8855_pcs_inband_caps(struct phylink_pcs *pcs,
+					   phy_interface_t interface)
+{
+	/* SGMII can be configured to use inband with AN result */
+	if (interface == PHY_INTERFACE_MODE_SGMII)
+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
+
+	/* inband is not supported in 2500-baseX and must be disabled */
+	return  LINK_INBAND_DISABLE;
+}
+
+static void an8855_pcs_get_state(struct phylink_pcs *pcs,
+				 struct phylink_link_state *state)
+{
+	struct an8855_priv *priv = container_of(pcs, struct an8855_priv, pcs);
+	u32 val;
+	int ret;
+
+	ret = regmap_read(priv->regmap, AN8855_PMSR_P(AN8855_CPU_PORT), &val);
+	if (ret < 0) {
+		state->link = false;
+		return;
+	}
+
+	state->link = !!(val & AN8855_PMSR_LNK);
+	state->an_complete = state->link;
+	state->duplex = (val & AN8855_PMSR_DPX) ? DUPLEX_FULL :
+						  DUPLEX_HALF;
+
+	switch (val & AN8855_PMSR_SPEED) {
+	case AN8855_PMSR_SPEED_10:
+		state->speed = SPEED_10;
+		break;
+	case AN8855_PMSR_SPEED_100:
+		state->speed = SPEED_100;
+		break;
+	case AN8855_PMSR_SPEED_1000:
+		state->speed = SPEED_1000;
+		break;
+	case AN8855_PMSR_SPEED_2500:
+		state->speed = SPEED_2500;
+		break;
+	case AN8855_PMSR_SPEED_5000:
+		dev_err(priv->dev, "Missing support for 5G speed. Setting Unknown.\n");
+		fallthrough;
+	default:
+		state->speed = SPEED_UNKNOWN;
+		break;
+	}
+
+	if (val & AN8855_PMSR_RX_FC)
+		state->pause |= MLO_PAUSE_RX;
+	if (val & AN8855_PMSR_TX_FC)
+		state->pause |= MLO_PAUSE_TX;
+}
+
+static int an8855_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
+			     phy_interface_t interface,
+			     const unsigned long *advertising,
+			     bool permit_pause_to_mac)
+{
+	struct an8855_priv *priv = container_of(pcs, struct an8855_priv, pcs);
+	u32 val;
+	int ret;
+
+	/*                   !!! WELCOME TO HELL !!!                   */
+
+	/* TX FIR - improve TX EYE */
+	ret = regmap_update_bits(priv->regmap, AN8855_INTF_CTRL_10,
+				 AN8855_RG_DA_QP_TX_FIR_C2_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C2_FORCE |
+				 AN8855_RG_DA_QP_TX_FIR_C1_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C1_FORCE,
+				 AN8855_RG_DA_QP_TX_FIR_C2_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C2_FORCE, 0x4) |
+				 AN8855_RG_DA_QP_TX_FIR_C1_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C1_FORCE, 0x0));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x0;
+	else
+		val = 0xd;
+	ret = regmap_update_bits(priv->regmap, AN8855_INTF_CTRL_11,
+				 AN8855_RG_DA_QP_TX_FIR_C0B_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C0B_FORCE,
+				 AN8855_RG_DA_QP_TX_FIR_C0B_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C0B_FORCE, val));
+	if (ret)
+		return ret;
+
+	/* RX CDR - improve RX Jitter Tolerance */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x5;
+	else
+		val = 0x6;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_BOT_LIM,
+				 AN8855_RG_QP_CDR_LPF_KP_GAIN |
+				 AN8855_RG_QP_CDR_LPF_KI_GAIN,
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_KP_GAIN, val) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_KI_GAIN, val));
+	if (ret)
+		return ret;
+
+	/* PLL */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x1;
+	else
+		val = 0x0;
+	ret = regmap_update_bits(priv->regmap, AN8855_QP_DIG_MODE_CTRL_1,
+				 AN8855_RG_TPHY_SPEED,
+				 FIELD_PREP(AN8855_RG_TPHY_SPEED, val));
+	if (ret)
+		return ret;
+
+	/* PLL - LPF */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_RICO_SEL_INTF |
+				 AN8855_RG_DA_QP_PLL_FBKSEL_INTF |
+				 AN8855_RG_DA_QP_PLL_BR_INTF |
+				 AN8855_RG_DA_QP_PLL_BPD_INTF |
+				 AN8855_RG_DA_QP_PLL_BPA_INTF |
+				 AN8855_RG_DA_QP_PLL_BC_INTF,
+				 AN8855_RG_DA_QP_PLL_RICO_SEL_INTF |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_FBKSEL_INTF, 0x0) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BR_INTF, 0x3) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BPD_INTF, 0x0) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BPA_INTF, 0x5) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BC_INTF, 0x1));
+	if (ret)
+		return ret;
+
+	/* PLL - ICO */
+	ret = regmap_set_bits(priv->regmap, AN8855_PLL_CTRL_4,
+			      AN8855_RG_DA_QP_PLL_ICOLP_EN_INTF);
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				AN8855_RG_DA_QP_PLL_ICOIQ_EN_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - CHP */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x6;
+	else
+		val = 0x4;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_IR_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_IR_INTF, val));
+	if (ret)
+		return ret;
+
+	/* PLL - PFD */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_PFD_OFFSET_EN_INTRF |
+				 AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF |
+				 AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF, 0x1) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF, 0x1));
+	if (ret)
+		return ret;
+
+	/* PLL - POSTDIV */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_POSTDIV_EN_INTF |
+				 AN8855_RG_DA_QP_PLL_PHY_CK_EN_INTF |
+				 AN8855_RG_DA_QP_PLL_PCK_SEL_INTF,
+				 AN8855_RG_DA_QP_PLL_PCK_SEL_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - SDM */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_SDM_HREN_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SDM_HREN_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				AN8855_RG_DA_QP_PLL_SDM_IFM_INTF);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_SS_LCPLL_PWCTL_SETTING_2,
+				 AN8855_RG_NCPO_ANA_MSB,
+				 FIELD_PREP(AN8855_RG_NCPO_ANA_MSB, 0x1));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x7a000000;
+	else
+		val = 0x48000000;
+	ret = regmap_write(priv->regmap, AN8855_SS_LCPLL_TDC_FLT_2,
+			   FIELD_PREP(AN8855_RG_LCPLL_NCPO_VALUE, val));
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_SS_LCPLL_TDC_PCW_1,
+			   FIELD_PREP(AN8855_RG_LCPLL_PON_HRDDS_PCW_NCPO_GPON, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_SS_LCPLL_TDC_FLT_5,
+				AN8855_RG_LCPLL_NCPO_CHG);
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CK_CTRL_0,
+				AN8855_RG_DA_QP_PLL_SDM_DI_EN_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - SS */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_3,
+				 AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_4,
+				 AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_3,
+				 AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF, 0x0));
+	if (ret)
+		return ret;
+
+	/* PLL - TDC */
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CK_CTRL_0,
+				AN8855_RG_DA_QP_PLL_TDC_TXCK_SEL_INTF);
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_PLL_SDM_ORD,
+			      AN8855_RG_QP_PLL_SSC_TRI_EN);
+	if (ret)
+		return ret;
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_PLL_SDM_ORD,
+			      AN8855_RG_QP_PLL_SSC_PHASE_INI);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_RX_DAC_EN,
+				 AN8855_RG_QP_SIGDET_HF,
+				 FIELD_PREP(AN8855_RG_QP_SIGDET_HF, 0x2));
+	if (ret)
+		return ret;
+
+	/* TCL Disable (only for Co-SIM) */
+	ret = regmap_clear_bits(priv->regmap, AN8855_PON_RXFEDIG_CTRL_0,
+				AN8855_RG_QP_EQ_RX500M_CK_SEL);
+	if (ret)
+		return ret;
+
+	/* TX Init */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x4;
+	else
+		val = 0x0;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_TX_MODE,
+				 AN8855_RG_QP_TX_RESERVE |
+				 AN8855_RG_QP_TX_MODE_16B_EN,
+				 FIELD_PREP(AN8855_RG_QP_TX_RESERVE, val));
+	if (ret)
+		return ret;
+
+	/* RX Control/Init */
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_RXAFE_RESERVE,
+			      AN8855_RG_QP_CDR_PD_10B_EN);
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x1;
+	else
+		val = 0x2;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_MJV_LIM,
+				 AN8855_RG_QP_CDR_LPF_RATIO,
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_RATIO, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_SETVALUE,
+				 AN8855_RG_QP_CDR_PR_BUF_IN_SR |
+				 AN8855_RG_QP_CDR_PR_BETA_SEL,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_BUF_IN_SR, 0x6) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_BETA_SEL, 0x1));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0xf;
+	else
+		val = 0xc;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_CKREF_DIV1,
+				 AN8855_RG_QP_CDR_PR_DAC_BAND,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_DAC_BAND, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE,
+				 AN8855_RG_QP_CDR_PR_KBAND_PCIE_MODE |
+				 AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK, 0x19));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_FORCE_IBANDLPF_R_OFF,
+				 AN8855_RG_QP_CDR_PHYCK_SEL |
+				 AN8855_RG_QP_CDR_PHYCK_RSTB |
+				 AN8855_RG_QP_CDR_PHYCK_DIV,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PHYCK_SEL, 0x2) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_PHYCK_DIV, 0x21));
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE,
+				AN8855_RG_QP_CDR_PR_XFICK_EN);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_CKREF_DIV1,
+				 AN8855_RG_QP_CDR_PR_KBAND_DIV,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_KBAND_DIV, 0x4));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_26,
+				 AN8855_RG_QP_EQ_RETRAIN_ONLY_EN |
+				 AN8855_RG_LINK_NE_EN |
+				 AN8855_RG_LINK_ERRO_EN,
+				 AN8855_RG_QP_EQ_RETRAIN_ONLY_EN |
+				 AN8855_RG_LINK_ERRO_EN);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_DLY_0,
+				 AN8855_RG_QP_RX_SAOSC_EN_H_DLY |
+				 AN8855_RG_QP_RX_PI_CAL_EN_H_DLY,
+				 FIELD_PREP(AN8855_RG_QP_RX_SAOSC_EN_H_DLY, 0x3f) |
+				 FIELD_PREP(AN8855_RG_QP_RX_PI_CAL_EN_H_DLY, 0x6f));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_42,
+				 AN8855_RG_QP_EQ_EN_DLY,
+				 FIELD_PREP(AN8855_RG_QP_EQ_EN_DLY, 0x150));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_2,
+				 AN8855_RG_QP_RX_EQ_EN_H_DLY,
+				 FIELD_PREP(AN8855_RG_QP_RX_EQ_EN_H_DLY, 0x150));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PON_RXFEDIG_CTRL_9,
+				 AN8855_RG_QP_EQ_LEQOSC_DLYCNT,
+				 FIELD_PREP(AN8855_RG_QP_EQ_LEQOSC_DLYCNT, 0x1));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_8,
+				 AN8855_RG_DA_QP_SAOSC_DONE_TIME |
+				 AN8855_RG_DA_QP_LEQOS_EN_TIME,
+				 FIELD_PREP(AN8855_RG_DA_QP_SAOSC_DONE_TIME, 0x200) |
+				 FIELD_PREP(AN8855_RG_DA_QP_LEQOS_EN_TIME, 0xfff));
+	if (ret)
+		return ret;
+
+	/* Frequency meter */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x10;
+	else
+		val = 0x28;
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_5,
+				 AN8855_RG_FREDET_CHK_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_CHK_CYCLE, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_6,
+				 AN8855_RG_FREDET_GOLDEN_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_GOLDEN_CYCLE, 0x64));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_7,
+				 AN8855_RG_FREDET_TOLERATE_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_TOLERATE_CYCLE, 0x2710));
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_PLL_CTRL_0,
+			      AN8855_RG_PHYA_AUTO_INIT);
+	if (ret)
+		return ret;
+
+	/* PCS Init */
+	if (interface == PHY_INTERFACE_MODE_SGMII &&
+	    neg_mode == PHYLINK_PCS_NEG_INBAND_DISABLED) {
+		ret = regmap_clear_bits(priv->regmap, AN8855_QP_DIG_MODE_CTRL_0,
+					AN8855_RG_SGMII_MODE | AN8855_RG_SGMII_AN_EN);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_RG_HSGMII_PCS_CTROL_1,
+				AN8855_RG_TBI_10B_MODE);
+	if (ret)
+		return ret;
+
+	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+		/* Set AN Ability - Interrupt */
+		ret = regmap_set_bits(priv->regmap, AN8855_SGMII_REG_AN_FORCE_CL37,
+				      AN8855_RG_FORCE_AN_DONE);
+		if (ret)
+			return ret;
+
+		ret = regmap_update_bits(priv->regmap, AN8855_SGMII_REG_AN_13,
+					 AN8855_SGMII_REMOTE_FAULT_DIS |
+					 AN8855_SGMII_IF_MODE,
+					 AN8855_SGMII_REMOTE_FAULT_DIS |
+					 FIELD_PREP(AN8855_SGMII_IF_MODE, 0xb));
+		if (ret)
+			return ret;
+	}
+
+	/* Rate Adaption - GMII path config. */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX) {
+		ret = regmap_clear_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+					AN8855_RG_P0_DIS_MII_MODE);
+		if (ret)
+			return ret;
+	} else {
+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+			ret = regmap_set_bits(priv->regmap, AN8855_MII_RA_AN_ENABLE,
+					      AN8855_RG_P0_RA_AN_EN);
+			if (ret)
+				return ret;
+		} else {
+			ret = regmap_update_bits(priv->regmap, AN8855_RG_AN_SGMII_MODE_FORCE,
+						 AN8855_RG_FORCE_CUR_SGMII_MODE |
+						 AN8855_RG_FORCE_CUR_SGMII_SEL,
+						 AN8855_RG_FORCE_CUR_SGMII_SEL);
+			if (ret)
+				return ret;
+
+			ret = regmap_clear_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+						AN8855_RG_P0_MII_RA_RX_EN |
+						AN8855_RG_P0_MII_RA_TX_EN |
+						AN8855_RG_P0_MII_RA_RX_MODE |
+						AN8855_RG_P0_MII_RA_TX_MODE);
+			if (ret)
+				return ret;
+		}
+
+		ret = regmap_set_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+				      AN8855_RG_P0_MII_MODE);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_RATE_ADAPT_CTRL_0,
+			      AN8855_RG_RATE_ADAPT_RX_BYPASS |
+			      AN8855_RG_RATE_ADAPT_TX_BYPASS |
+			      AN8855_RG_RATE_ADAPT_RX_EN |
+			      AN8855_RG_RATE_ADAPT_TX_EN);
+	if (ret)
+		return ret;
+
+	/* Disable AN if not in autoneg */
+	ret = regmap_update_bits(priv->regmap, AN8855_SGMII_REG_AN0, BMCR_ANENABLE,
+				 neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE :
+									      0);
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_SGMII) {
+		/* Follow SDK init flow with restarting AN after AN enable */
+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+			ret = regmap_set_bits(priv->regmap, AN8855_SGMII_REG_AN0,
+					      BMCR_ANRESTART);
+			if (ret)
+				return ret;
+		} else {
+			ret = regmap_set_bits(priv->regmap, AN8855_PHY_RX_FORCE_CTRL_0,
+					      AN8855_RG_FORCE_TXC_SEL);
+			if (ret)
+				return ret;
+		}
+	}
+
+	/* Force Speed with fixed-link or 2500base-x as doesn't support aneg */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX ||
+	    neg_mode != PHYLINK_PCS_NEG_INBAND_ENABLED) {
+		if (interface == PHY_INTERFACE_MODE_2500BASEX)
+			val = AN8855_RG_LINK_MODE_P0_SPEED_2500;
+		else
+			val = AN8855_RG_LINK_MODE_P0_SPEED_1000;
+		ret = regmap_update_bits(priv->regmap, AN8855_SGMII_STS_CTRL_0,
+					 AN8855_RG_LINK_MODE_P0 |
+					 AN8855_RG_FORCE_SPD_MODE_P0,
+					 val | AN8855_RG_FORCE_SPD_MODE_P0);
+		if (ret)
+			return ret;
+	}
+
+	/* bypass flow control to MAC */
+	ret = regmap_write(priv->regmap, AN8855_MSG_RX_LIK_STS_0,
+			   AN8855_RG_DPX_STS_P3 | AN8855_RG_DPX_STS_P2 |
+			   AN8855_RG_DPX_STS_P1 | AN8855_RG_TXFC_STS_P0 |
+			   AN8855_RG_RXFC_STS_P0 | AN8855_RG_DPX_STS_P0);
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_MSG_RX_LIK_STS_2,
+			   AN8855_RG_RXFC_AN_BYPASS_P3 |
+			   AN8855_RG_RXFC_AN_BYPASS_P2 |
+			   AN8855_RG_RXFC_AN_BYPASS_P1 |
+			   AN8855_RG_TXFC_AN_BYPASS_P3 |
+			   AN8855_RG_TXFC_AN_BYPASS_P2 |
+			   AN8855_RG_TXFC_AN_BYPASS_P1 |
+			   AN8855_RG_DPX_AN_BYPASS_P3 |
+			   AN8855_RG_DPX_AN_BYPASS_P2 |
+			   AN8855_RG_DPX_AN_BYPASS_P1 |
+			   AN8855_RG_DPX_AN_BYPASS_P0);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static void an8855_pcs_an_restart(struct phylink_pcs *pcs)
+{
+	return;
+}
+
+static const struct phylink_pcs_ops an8855_pcs_ops = {
+	.pcs_inband_caps = an8855_pcs_inband_caps,
+	.pcs_get_state = an8855_pcs_get_state,
+	.pcs_config = an8855_pcs_config,
+	.pcs_an_restart = an8855_pcs_an_restart,
+};
+
+static const struct phylink_mac_ops an8855_phylink_mac_ops = {
+	.mac_select_pcs	= an8855_phylink_mac_select_pcs,
+	.mac_config	= an8855_phylink_mac_config,
+	.mac_link_down	= an8855_phylink_mac_link_down,
+	.mac_link_up	= an8855_phylink_mac_link_up,
+};
+
+static const struct dsa_switch_ops an8855_switch_ops = {
+	.get_tag_protocol = an8855_get_tag_protocol,
+	.setup = an8855_setup,
+	.get_phy_flags = en8855_get_phy_flags,
+	.phylink_get_caps = an8855_phylink_get_caps,
+	.get_strings = an8855_get_strings,
+	.get_ethtool_stats = an8855_get_ethtool_stats,
+	.get_sset_count = an8855_get_sset_count,
+	.get_eth_mac_stats = an8855_get_eth_mac_stats,
+	.get_eth_ctrl_stats = an8855_get_eth_ctrl_stats,
+	.get_rmon_stats = an8855_get_rmon_stats,
+	.port_enable = an8855_port_enable,
+	.port_disable = an8855_port_disable,
+	.set_ageing_time = an8855_set_ageing_time,
+	.port_bridge_join = an8855_port_bridge_join,
+	.port_bridge_leave = an8855_port_bridge_leave,
+	.port_fast_age = an8855_port_fast_age,
+	.port_stp_state_set = an8855_port_stp_state_set,
+	.port_pre_bridge_flags = an8855_port_pre_bridge_flags,
+	.port_bridge_flags = an8855_port_bridge_flags,
+	.port_vlan_filtering = an8855_port_vlan_filtering,
+	.port_vlan_add = an8855_port_vlan_add,
+	.port_vlan_del = an8855_port_vlan_del,
+	.port_fdb_add = an8855_port_fdb_add,
+	.port_fdb_del = an8855_port_fdb_del,
+	.port_fdb_dump = an8855_port_fdb_dump,
+	.port_mdb_add = an8855_port_mdb_add,
+	.port_mdb_del = an8855_port_mdb_del,
+	.port_change_mtu = an8855_port_change_mtu,
+	.port_max_mtu = an8855_port_max_mtu,
+	.port_mirror_add = an8855_port_mirror_add,
+	.port_mirror_del = an8855_port_mirror_del,
+};
+
+static int an8855_read_switch_id(struct an8855_priv *priv)
+{
+	u32 id;
+	int ret;
+
+	ret = regmap_read(priv->regmap, AN8855_CREV, &id);
+	if (ret)
+		return ret;
+
+	if (id != AN8855_ID) {
+		dev_err(priv->dev,
+			"Switch id detected %x but expected %x\n",
+			id, AN8855_ID);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int an8855_switch_probe(struct platform_device *pdev)
+{
+	struct an8855_priv *priv;
+	u32 val;
+	int ret;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = &pdev->dev;
+	priv->phy_require_calib = of_property_read_bool(priv->dev->of_node,
+							"airoha,ext-surge");
+
+	priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset",
+						   GPIOD_OUT_LOW);
+	if (IS_ERR(priv->reset_gpio))
+		return PTR_ERR(priv->reset_gpio);
+
+	/* Get regmap from MFD */
+	priv->regmap = dev_get_regmap(priv->dev->parent, NULL);
+
+	if (priv->reset_gpio) {
+		usleep_range(100000, 150000);
+		gpiod_set_value_cansleep(priv->reset_gpio, 0);
+		usleep_range(100000, 150000);
+		gpiod_set_value_cansleep(priv->reset_gpio, 1);
+
+		/* Poll HWTRAP reg to wait for Switch to fully Init */
+		ret = regmap_read_poll_timeout(priv->regmap, AN8855_HWTRAP, val,
+					       val, 20, 200000);
+		if (ret)
+			return ret;
+	}
+
+	ret = an8855_read_switch_id(priv);
+	if (ret)
+		return ret;
+
+	priv->ds = devm_kzalloc(priv->dev, sizeof(*priv->ds), GFP_KERNEL);
+	if (!priv->ds)
+		return -ENOMEM;
+
+	priv->ds->dev = priv->dev;
+	priv->ds->num_ports = AN8855_NUM_PORTS;
+	priv->ds->priv = priv;
+	priv->ds->ops = &an8855_switch_ops;
+	devm_mutex_init(priv->dev, &priv->reg_mutex);
+	priv->ds->phylink_mac_ops = &an8855_phylink_mac_ops;
+
+	priv->pcs.ops = &an8855_pcs_ops;
+	priv->pcs.neg_mode = true;
+	priv->pcs.poll = true;
+
+	dev_set_drvdata(priv->dev, priv);
+
+	return dsa_register_switch(priv->ds);
+}
+
+static int an8855_switch_remove(struct platform_device *pdev)
+{
+	struct an8855_priv *priv = dev_get_drvdata(&pdev->dev);
+
+	if (!priv)
+		return 0;
+
+	dsa_unregister_switch(priv->ds);
+	return 0;
+}
+
+static const struct of_device_id an8855_switch_of_match[] = {
+	{ .compatible = "airoha,an8855-switch" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_switch_of_match);
+
+static struct platform_driver an8855_switch_driver = {
+	.probe = an8855_switch_probe,
+	.remove = an8855_switch_remove,
+	.driver = {
+		.name = "an8855-switch",
+		.of_match_table = an8855_switch_of_match,
+	},
+};
+module_platform_driver(an8855_switch_driver);
+
+MODULE_AUTHOR("Min Yao <min.yao at airoha.com>");
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for Airoha AN8855 Switch");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h
new file mode 100644
index 0000000000..2462b9d337
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h
@@ -0,0 +1,783 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2023 Min Yao <min.yao at airoha.com>
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+
+#ifndef __AN8855_H
+#define __AN8855_H
+
+#include <linux/bitfield.h>
+
+#define AN8855_NUM_PORTS		6
+#define AN8855_CPU_PORT			5
+#define AN8855_NUM_FDB_RECORDS		2048
+#define AN8855_GPHY_SMI_ADDR_DEFAULT	1
+#define AN8855_PORT_VID_DEFAULT		0
+
+#define MTK_TAG_LEN			4
+#define AN8855_MAX_MTU			(15360 - ETH_HLEN - ETH_FCS_LEN - MTK_TAG_LEN)
+
+#define AN8855_L2_AGING_MS_CONSTANT	1024
+
+#define AN8855_PHY_FLAGS_EN_CALIBRATION	BIT(0)
+
+/*	AN8855_SCU			0x10000000 */
+#define AN8855_RG_GPIO_LED_MODE		0x10000054
+#define AN8855_RG_GPIO_LED_SEL(i)	(0x10000000 + (0x0058 + ((i) * 4)))
+#define AN8855_RG_INTB_MODE		0x10000080
+#define AN8855_RG_RGMII_TXCK_C		0x100001d0
+
+#define AN8855_PKG_SEL			0x10000094
+#define   AN8855_PAG_SEL_AN8855H	0x2
+
+/* Register for hw trap status */
+#define AN8855_HWTRAP			0x1000009c
+
+#define AN8855_RG_GPIO_L_INV		0x10000010
+#define AN8855_RG_GPIO_CTRL		0x1000a300
+#define AN8855_RG_GPIO_DATA		0x1000a304
+#define AN8855_RG_GPIO_OE		0x1000a314
+
+#define AN8855_CREV			0x10005000
+#define   AN8855_ID			0x8855
+
+/* Register for system reset */
+#define AN8855_RST_CTRL			0x100050c0
+#define   AN8855_SYS_CTRL_SYS_RST	BIT(31)
+
+#define AN8855_INT_MASK			0x100050f0
+#define   AN8855_INT_SYS		BIT(15)
+
+#define AN8855_RG_CLK_CPU_ICG		0x10005034
+#define   AN8855_MCU_ENABLE		BIT(3)
+
+#define AN8855_RG_TIMER_CTL		0x1000a100
+#define   AN8855_WDOG_ENABLE		BIT(25)
+
+#define AN8855_RG_GDMP_RAM		0x10010000
+
+/* Registers to mac forward control for unknown frames */
+#define AN8855_MFC			0x10200010
+#define   AN8855_CPU_EN			BIT(15)
+#define   AN8855_CPU_PORT_IDX		GENMASK(12, 8)
+
+#define AN8855_PAC			0x10200024
+#define   AN8855_TAG_PAE_MANG_FR	BIT(30)
+#define   AN8855_TAG_PAE_BPDU_FR	BIT(28)
+#define   AN8855_TAG_PAE_EG_TAG		GENMASK(27, 25)
+#define   AN8855_TAG_PAE_LKY_VLAN	BIT(24)
+#define   AN8855_TAG_PAE_PRI_HIGH	BIT(23)
+#define   AN8855_TAG_PAE_MIR		GENMASK(20, 19)
+#define   AN8855_TAG_PAE_PORT_FW	GENMASK(18, 16)
+#define   AN8855_PAE_MANG_FR		BIT(14)
+#define   AN8855_PAE_BPDU_FR		BIT(12)
+#define   AN8855_PAE_EG_TAG		GENMASK(11, 9)
+#define   AN8855_PAE_LKY_VLAN		BIT(8)
+#define   AN8855_PAE_PRI_HIGH		BIT(7)
+#define   AN8855_PAE_MIR		GENMASK(4, 3)
+#define   AN8855_PAE_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_RGAC1			0x10200028
+#define   AN8855_R02_MANG_FR		BIT(30)
+#define   AN8855_R02_BPDU_FR		BIT(28)
+#define   AN8855_R02_EG_TAG		GENMASK(27, 25)
+#define   AN8855_R02_LKY_VLAN		BIT(24)
+#define   AN8855_R02_PRI_HIGH		BIT(23)
+#define   AN8855_R02_MIR		GENMASK(20, 19)
+#define   AN8855_R02_PORT_FW		GENMASK(18, 16)
+#define   AN8855_R01_MANG_FR		BIT(14)
+#define   AN8855_R01_BPDU_FR		BIT(12)
+#define   AN8855_R01_EG_TAG		GENMASK(11, 9)
+#define   AN8855_R01_LKY_VLAN		BIT(8)
+#define   AN8855_R01_PRI_HIGH		BIT(7)
+#define   AN8855_R01_MIR		GENMASK(4, 3)
+#define   AN8855_R01_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_RGAC2			0x1020002c
+#define   AN8855_R0E_MANG_FR		BIT(30)
+#define   AN8855_R0E_BPDU_FR		BIT(28)
+#define   AN8855_R0E_EG_TAG		GENMASK(27, 25)
+#define   AN8855_R0E_LKY_VLAN		BIT(24)
+#define   AN8855_R0E_PRI_HIGH		BIT(23)
+#define   AN8855_R0E_MIR		GENMASK(20, 19)
+#define   AN8855_R0E_PORT_FW		GENMASK(18, 16)
+#define   AN8855_R03_MANG_FR		BIT(14)
+#define   AN8855_R03_BPDU_FR		BIT(12)
+#define   AN8855_R03_EG_TAG		GENMASK(11, 9)
+#define   AN8855_R03_LKY_VLAN		BIT(8)
+#define   AN8855_R03_PRI_HIGH		BIT(7)
+#define   AN8855_R03_MIR		GENMASK(4, 3)
+#define   AN8855_R03_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_AAC			0x102000a0
+#define   AN8855_MAC_AUTO_FLUSH		BIT(28)
+/* Control Address Table Age time.
+ * (AN8855_AGE_CNT + 1) * ( AN8855_AGE_UNIT + 1 ) * AN8855_L2_AGING_MS_CONSTANT
+ */
+#define   AN8855_AGE_CNT		GENMASK(20, 12)
+/* Value in seconds. Value is always incremented of 1 */
+#define   AN8855_AGE_UNIT		GENMASK(10, 0)
+
+/* Registers for ARL Unknown Unicast Forward control */
+#define AN8855_UNUF			0x102000b4
+
+/* Registers for ARL Unknown Multicast Forward control */
+#define AN8855_UNMF			0x102000b8
+
+/* Registers for ARL Broadcast forward control */
+#define AN8855_BCF			0x102000bc
+
+/* Registers for port address age disable */
+#define AN8855_AGDIS			0x102000c0
+
+/* Registers for mirror port control */
+#define AN8855_MIR			0x102000cc
+#define   AN8855_MIRROR_EN		BIT(7)
+#define   AN8855_MIRROR_PORT		GENMASK(4, 0)
+
+/* Registers for BPDU and PAE frame control*/
+#define AN8855_BPC			0x102000d0
+#define   AN8855_BPDU_MANG_FR		BIT(14)
+#define   AN8855_BPDU_BPDU_FR		BIT(12)
+#define   AN8855_BPDU_EG_TAG		GENMASK(11, 9)
+#define   AN8855_BPDU_LKY_VLAN		BIT(8)
+#define   AN8855_BPDU_PRI_HIGH		BIT(7)
+#define   AN8855_BPDU_MIR		GENMASK(4, 3)
+#define   AN8855_BPDU_PORT_FW		GENMASK(2, 0)
+
+/* Registers for IP Unknown Multicast Forward control */
+#define AN8855_UNIPMF			0x102000dc
+
+enum an8855_bpdu_port_fw {
+	AN8855_BPDU_FOLLOW_MFC = 0,
+	AN8855_BPDU_CPU_EXCLUDE = 4,
+	AN8855_BPDU_CPU_INCLUDE = 5,
+	AN8855_BPDU_CPU_ONLY = 6,
+	AN8855_BPDU_DROP = 7,
+};
+
+/* Register for address table control */
+#define AN8855_ATC			0x10200300
+#define   AN8855_ATC_BUSY		BIT(31)
+#define   AN8855_ATC_HASH		GENMASK(24, 16)
+#define   AN8855_ATC_HIT		GENMASK(15, 12)
+#define   AN8855_ATC_MAT_MASK		GENMASK(11, 7)
+#define   AN8855_ATC_MAT(x)		FIELD_PREP(AN8855_ATC_MAT_MASK, x)
+#define   AN8855_ATC_SAT		GENMASK(5, 4)
+#define   AN8855_ATC_CMD		GENMASK(2, 0)
+
+enum an8855_fdb_mat_cmds {
+	AND8855_FDB_MAT_ALL = 0,
+	AND8855_FDB_MAT_MAC, /* All MAC address */
+	AND8855_FDB_MAT_DYNAMIC_MAC, /* All Dynamic MAC address */
+	AND8855_FDB_MAT_STATIC_MAC, /* All Static Mac Address */
+	AND8855_FDB_MAT_DIP, /* All DIP/GA address */
+	AND8855_FDB_MAT_DIP_IPV4, /* All DIP/GA IPv4 address */
+	AND8855_FDB_MAT_DIP_IPV6, /* All DIP/GA IPv6 address */
+	AND8855_FDB_MAT_DIP_SIP, /* All DIP_SIP address */
+	AND8855_FDB_MAT_DIP_SIP_IPV4, /* All DIP_SIP IPv4 address */
+	AND8855_FDB_MAT_DIP_SIP_IPV6, /* All DIP_SIP IPv6 address */
+	AND8855_FDB_MAT_MAC_CVID, /* All MAC address with CVID */
+	AND8855_FDB_MAT_MAC_FID, /* All MAC address with Filter ID */
+	AND8855_FDB_MAT_MAC_PORT, /* All MAC address with port */
+	AND8855_FDB_MAT_DIP_SIP_DIP_IPV4, /* All DIP_SIP address with DIP_IPV4 */
+	AND8855_FDB_MAT_DIP_SIP_SIP_IPV4, /* All DIP_SIP address with SIP_IPV4 */
+	AND8855_FDB_MAT_DIP_SIP_DIP_IPV6, /* All DIP_SIP address with DIP_IPV6 */
+	AND8855_FDB_MAT_DIP_SIP_SIP_IPV6, /* All DIP_SIP address with SIP_IPV6 */
+	/* All MAC address with MAC type (dynamic or static) with CVID */
+	AND8855_FDB_MAT_MAC_TYPE_CVID,
+	/* All MAC address with MAC type (dynamic or static) with Filter ID */
+	AND8855_FDB_MAT_MAC_TYPE_FID,
+	/* All MAC address with MAC type (dynamic or static) with port */
+	AND8855_FDB_MAT_MAC_TYPE_PORT,
+};
+
+enum an8855_fdb_cmds {
+	AN8855_FDB_READ = 0,
+	AN8855_FDB_WRITE = 1,
+	AN8855_FDB_FLUSH = 2,
+	AN8855_FDB_START = 4,
+	AN8855_FDB_NEXT = 5,
+};
+
+/* Registers for address table access */
+#define AN8855_ATA1			0x10200304
+#define   AN8855_ATA1_MAC0		GENMASK(31, 24)
+#define   AN8855_ATA1_MAC1		GENMASK(23, 16)
+#define   AN8855_ATA1_MAC2		GENMASK(15, 8)
+#define   AN8855_ATA1_MAC3		GENMASK(7, 0)
+#define AN8855_ATA2			0x10200308
+#define   AN8855_ATA2_MAC4		GENMASK(31, 24)
+#define   AN8855_ATA2_MAC5		GENMASK(23, 16)
+#define   AN8855_ATA2_UNAUTH		BIT(10)
+#define   AN8855_ATA2_TYPE		BIT(9) /* 1: dynamic, 0: static */
+#define   AN8855_ATA2_AGE		GENMASK(8, 0)
+
+/* Register for address table write data */
+#define AN8855_ATWD			0x10200324
+#define   AN8855_ATWD_FID		GENMASK(31, 28)
+#define   AN8855_ATWD_VID		GENMASK(27, 16)
+#define   AN8855_ATWD_IVL		BIT(15)
+#define   AN8855_ATWD_EG_TAG		GENMASK(14, 12)
+#define   AN8855_ATWD_SA_MIR		GENMASK(9, 8)
+#define   AN8855_ATWD_SA_FWD		GENMASK(7, 5)
+#define   AN8855_ATWD_UPRI		GENMASK(4, 2)
+#define   AN8855_ATWD_LEAKY		BIT(1)
+#define   AN8855_ATWD_VLD		BIT(0) /* vid LOAD */
+#define AN8855_ATWD2			0x10200328
+#define   AN8855_ATWD2_PORT		GENMASK(7, 0)
+
+/* Registers for table search read address */
+#define AN8855_ATRDS			0x10200330
+#define   AN8855_ATRD_SEL		GENMASK(1, 0)
+#define AN8855_ATRD0			0x10200334
+#define   AN8855_ATRD0_FID		GENMASK(28, 25)
+#define   AN8855_ATRD0_VID		GENMASK(21, 10)
+#define   AN8855_ATRD0_IVL		BIT(9)
+#define   AN8855_ATRD0_TYPE		GENMASK(4, 3)
+#define   AN8855_ATRD0_ARP		GENMASK(2, 1)
+#define   AN8855_ATRD0_LIVE		BIT(0)
+#define AN8855_ATRD1			0x10200338
+#define   AN8855_ATRD1_MAC4		GENMASK(31, 24)
+#define   AN8855_ATRD1_MAC5		GENMASK(23, 16)
+#define   AN8855_ATRD1_AGING		GENMASK(11, 3)
+#define AN8855_ATRD2			0x1020033c
+#define   AN8855_ATRD2_MAC0		GENMASK(31, 24)
+#define   AN8855_ATRD2_MAC1		GENMASK(23, 16)
+#define   AN8855_ATRD2_MAC2		GENMASK(15, 8)
+#define   AN8855_ATRD2_MAC3		GENMASK(7, 0)
+#define AN8855_ATRD3			0x10200340
+#define   AN8855_ATRD3_PORTMASK		GENMASK(7, 0)
+
+enum an8855_fdb_type {
+	AN8855_MAC_TB_TY_MAC = 0,
+	AN8855_MAC_TB_TY_DIP = 1,
+	AN8855_MAC_TB_TY_DIP_SIP = 2,
+};
+
+/* Register for vlan table control */
+#define AN8855_VTCR			0x10200600
+#define   AN8855_VTCR_BUSY		BIT(31)
+#define   AN8855_VTCR_FUNC		GENMASK(15, 12)
+#define   AN8855_VTCR_VID		GENMASK(11, 0)
+
+enum an8855_vlan_cmd {
+	/* Read/Write the specified VID entry from VAWD register based
+	 * on VID.
+	 */
+	AN8855_VTCR_RD_VID = 0,
+	AN8855_VTCR_WR_VID = 1,
+};
+
+/* Register for setup vlan write data */
+#define AN8855_VAWD0			0x10200604
+/* VLAN Member Control */
+#define   AN8855_VA0_PORT		GENMASK(31, 26)
+/* Egress Tag Control */
+#define   AN8855_VA0_ETAG		GENMASK(23, 12)
+#define   AN8855_VA0_ETAG_PORT		GENMASK(13, 12)
+#define   AN8855_VA0_ETAG_PORT_SHIFT(port) ((port) * 2)
+#define   AN8855_VA0_ETAG_PORT_MASK(port) (AN8855_VA0_ETAG_PORT << \
+						AN8855_VA0_ETAG_PORT_SHIFT(port))
+#define   AN8855_VA0_ETAG_PORT_VAL(port, val) (FIELD_PREP(AN8855_VA0_ETAG_PORT, (val)) << \
+						AN8855_VA0_ETAG_PORT_SHIFT(port))
+#define   AN8855_VA0_EG_CON		BIT(11)
+#define   AN8855_VA0_VTAG_EN		BIT(10) /* Per VLAN Egress Tag Control */
+#define   AN8855_VA0_IVL_MAC		BIT(5) /* Independent VLAN Learning */
+#define	  AN8855_VA0_FID		GENMASK(4, 1)
+#define   AN8855_VA0_VLAN_VALID		BIT(0) /* VLAN Entry Valid */
+#define AN8855_VAWD1			0x10200608
+#define   AN8855_VA1_PORT_STAG		BIT(1)
+
+enum an8855_fid {
+	AN8855_FID_STANDALONE = 0,
+	AN8855_FID_BRIDGED = 1,
+};
+
+/* Same register field of VAWD0 */
+#define AN8855_VARD0			0x10200618
+
+enum an8855_vlan_egress_attr {
+	AN8855_VLAN_EGRESS_UNTAG = 0,
+	AN8855_VLAN_EGRESS_TAG = 2,
+	AN8855_VLAN_EGRESS_STACK = 3,
+};
+
+/* Register for port STP state control */
+#define AN8855_SSP_P(x)			(0x10208000 + ((x) * 0x200))
+/* Up to 16 FID supported, each with the same mask */
+#define	  AN8855_FID_PST		GENMASK(1, 0)
+#define   AN8855_FID_PST_SHIFT(fid)	(2 * (fid))
+#define   AN8855_FID_PST_MASK(fid)	(AN8855_FID_PST << \
+						AN8855_FID_PST_SHIFT(fid))
+#define   AN8855_FID_PST_VAL(fid, val)	(FIELD_PREP(AN8855_FID_PST, (val)) << \
+						AN8855_FID_PST_SHIFT(fid))
+
+enum an8855_stp_state {
+	AN8855_STP_DISABLED = 0,
+	AN8855_STP_BLOCKING = 1,
+	AN8855_STP_LISTENING = AN8855_STP_BLOCKING,
+	AN8855_STP_LEARNING = 2,
+	AN8855_STP_FORWARDING = 3
+};
+
+/* Register for port control */
+#define AN8855_PCR_P(x)			(0x10208004 + ((x) * 0x200))
+#define   AN8855_EG_TAG			GENMASK(29, 28)
+#define   AN8855_PORT_PRI		GENMASK(26, 24)
+#define   AN8855_PORT_TX_MIR		BIT(20)
+#define   AN8855_PORT_RX_MIR		BIT(16)
+#define   AN8855_PORT_VLAN		GENMASK(1, 0)
+
+enum an8855_port_mode {
+	/* Port Matrix Mode: Frames are forwarded by the PCR_MATRIX members. */
+	AN8855_PORT_MATRIX_MODE = 0,
+
+	/* Fallback Mode: Forward received frames with ingress ports that do
+	 * not belong to the VLAN member. Frames whose VID is not listed on
+	 * the VLAN table are forwarded by the PCR_MATRIX members.
+	 */
+	AN8855_PORT_FALLBACK_MODE = 1,
+
+	/* Check Mode: Forward received frames whose ingress do not
+	 * belong to the VLAN member. Discard frames if VID ismiddes on the
+	 * VLAN table.
+	 */
+	AN8855_PORT_CHECK_MODE = 2,
+
+	/* Security Mode: Discard any frame due to ingress membership
+	 * violation or VID missed on the VLAN table.
+	 */
+	AN8855_PORT_SECURITY_MODE = 3,
+};
+
+/* Register for port security control */
+#define AN8855_PSC_P(x)			(0x1020800c + ((x) * 0x200))
+#define   AN8855_SA_DIS			BIT(4)
+
+/* Register for port vlan control */
+#define AN8855_PVC_P(x)			(0x10208010 + ((x) * 0x200))
+#define   AN8855_PORT_SPEC_REPLACE_MODE	BIT(11)
+#define   AN8855_PVC_EG_TAG		GENMASK(10, 8)
+#define   AN8855_VLAN_ATTR		GENMASK(7, 6)
+#define   AN8855_PORT_SPEC_TAG		BIT(5)
+#define   AN8855_ACC_FRM		GENMASK(1, 0)
+
+enum an8855_vlan_port_eg_tag {
+	AN8855_VLAN_EG_DISABLED = 0,
+	AN8855_VLAN_EG_CONSISTENT = 1,
+	AN8855_VLAN_EG_UNTAGGED = 4,
+	AN8855_VLAN_EG_SWAP = 5,
+	AN8855_VLAN_EG_TAGGED = 6,
+	AN8855_VLAN_EG_STACK = 7,
+};
+
+enum an8855_vlan_port_attr {
+	AN8855_VLAN_USER = 0,
+	AN8855_VLAN_STACK = 1,
+	AN8855_VLAN_TRANSPARENT = 3,
+};
+
+enum an8855_vlan_port_acc_frm {
+	AN8855_VLAN_ACC_ALL = 0,
+	AN8855_VLAN_ACC_TAGGED = 1,
+	AN8855_VLAN_ACC_UNTAGGED = 2,
+};
+
+#define AN8855_PPBV1_P(x)		(0x10208014 + ((x) * 0x200))
+#define   AN8855_PPBV_G0_PORT_VID	GENMASK(11, 0)
+
+#define AN8855_PORTMATRIX_P(x)		(0x10208044 + ((x) * 0x200))
+#define   AN8855_PORTMATRIX		GENMASK(5, 0)
+/* Port matrix without the CPU port that should never be removed */
+#define   AN8855_USER_PORTMATRIX	GENMASK(4, 0)
+
+/* Register for port PVID */
+#define AN8855_PVID_P(x)		(0x10208048 + ((x) * 0x200))
+#define   AN8855_G0_PORT_VID		GENMASK(11, 0)
+
+/* Register for port MAC control register */
+#define AN8855_PMCR_P(x)		(0x10210000 + ((x) * 0x200))
+#define   AN8855_PMCR_FORCE_MODE	BIT(31)
+#define   AN8855_PMCR_FORCE_SPEED	GENMASK(30, 28)
+#define   AN8855_PMCR_FORCE_SPEED_5000	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x4)
+#define   AN8855_PMCR_FORCE_SPEED_2500	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x3)
+#define   AN8855_PMCR_FORCE_SPEED_1000	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x2)
+#define   AN8855_PMCR_FORCE_SPEED_100	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x1)
+#define   AN8855_PMCR_FORCE_SPEED_10	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x1)
+#define   AN8855_PMCR_FORCE_FDX		BIT(25)
+#define   AN8855_PMCR_FORCE_LNK		BIT(24)
+#define   AN8855_PMCR_IFG_XMIT		GENMASK(21, 20)
+#define   AN8855_PMCR_EXT_PHY		BIT(19)
+#define   AN8855_PMCR_MAC_MODE		BIT(18)
+#define   AN8855_PMCR_TX_EN		BIT(16)
+#define   AN8855_PMCR_RX_EN		BIT(15)
+#define   AN8855_PMCR_BACKOFF_EN	BIT(12)
+#define   AN8855_PMCR_BACKPR_EN		BIT(11)
+#define   AN8855_PMCR_FORCE_EEE5G	BIT(9)
+#define   AN8855_PMCR_FORCE_EEE2P5G	BIT(8)
+#define   AN8855_PMCR_FORCE_EEE1G	BIT(7)
+#define   AN8855_PMCR_FORCE_EEE100	BIT(6)
+#define   AN8855_PMCR_TX_FC_EN		BIT(5)
+#define   AN8855_PMCR_RX_FC_EN		BIT(4)
+
+#define AN8855_PMSR_P(x)		(0x10210010 + (x) * 0x200)
+#define   AN8855_PMSR_SPEED		GENMASK(30, 28)
+#define   AN8855_PMSR_SPEED_5000	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x4)
+#define   AN8855_PMSR_SPEED_2500	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x3)
+#define   AN8855_PMSR_SPEED_1000	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x2)
+#define   AN8855_PMSR_SPEED_100		FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x1)
+#define   AN8855_PMSR_SPEED_10		FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x0)
+#define   AN8855_PMSR_DPX		BIT(25)
+#define   AN8855_PMSR_LNK		BIT(24)
+#define   AN8855_PMSR_EEE1G		BIT(7)
+#define   AN8855_PMSR_EEE100M		BIT(6)
+#define   AN8855_PMSR_RX_FC		BIT(5)
+#define   AN8855_PMSR_TX_FC		BIT(4)
+
+#define AN8855_PMEEECR_P(x)		(0x10210004 + (x) * 0x200)
+#define   AN8855_LPI_MODE_EN		BIT(31)
+#define   AN8855_WAKEUP_TIME_2500	GENMASK(23, 16)
+#define   AN8855_WAKEUP_TIME_1000	GENMASK(15, 8)
+#define   AN8855_WAKEUP_TIME_100	GENMASK(7, 0)
+#define AN8855_PMEEECR2_P(x)		(0x10210008 + (x) * 0x200)
+#define   AN8855_WAKEUP_TIME_5000	GENMASK(7, 0)
+
+#define AN8855_GMACCR			0x10213e00
+#define   AN8855_MAX_RX_JUMBO		GENMASK(7, 4)
+/* 2K for 0x0, 0x1, 0x2 */
+#define   AN8855_MAX_RX_JUMBO_2K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x0)
+#define   AN8855_MAX_RX_JUMBO_3K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x3)
+#define   AN8855_MAX_RX_JUMBO_4K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x4)
+#define   AN8855_MAX_RX_JUMBO_5K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x5)
+#define   AN8855_MAX_RX_JUMBO_6K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x6)
+#define   AN8855_MAX_RX_JUMBO_7K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x7)
+#define   AN8855_MAX_RX_JUMBO_8K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x8)
+#define   AN8855_MAX_RX_JUMBO_9K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x9)
+#define   AN8855_MAX_RX_JUMBO_12K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xa)
+#define   AN8855_MAX_RX_JUMBO_15K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xb)
+#define   AN8855_MAX_RX_JUMBO_16K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xc)
+#define   AN8855_MAX_RX_PKT_LEN		GENMASK(1, 0)
+#define   AN8855_MAX_RX_PKT_1518_1522	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x0)
+#define   AN8855_MAX_RX_PKT_1536	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x1)
+#define   AN8855_MAX_RX_PKT_1552	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x2)
+#define   AN8855_MAX_RX_PKT_JUMBO	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x3)
+
+#define AN8855_CKGCR			0x10213e1c
+#define   AN8855_LPI_TXIDLE_THD_MASK	GENMASK(31, 14)
+#define   AN8855_CKG_LNKDN_PORT_STOP	BIT(1)
+#define   AN8855_CKG_LNKDN_GLB_STOP	BIT(0)
+
+/* Register for MIB */
+#define AN8855_PORT_MIB_COUNTER(x)	(0x10214000 + (x) * 0x200)
+/* Each define is an offset of AN8855_PORT_MIB_COUNTER */
+#define   AN8855_PORT_MIB_TX_DROP	0x00
+#define   AN8855_PORT_MIB_TX_CRC_ERR	0x04
+#define   AN8855_PORT_MIB_TX_UNICAST	0x08
+#define   AN8855_PORT_MIB_TX_MULTICAST	0x0c
+#define   AN8855_PORT_MIB_TX_BROADCAST	0x10
+#define   AN8855_PORT_MIB_TX_COLLISION	0x14
+#define   AN8855_PORT_MIB_TX_SINGLE_COLLISION 0x18
+#define   AN8855_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c
+#define   AN8855_PORT_MIB_TX_DEFERRED	0x20
+#define   AN8855_PORT_MIB_TX_LATE_COLLISION 0x24
+#define   AN8855_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28
+#define   AN8855_PORT_MIB_TX_PAUSE	0x2c
+#define   AN8855_PORT_MIB_TX_PKT_SZ_64	0x30
+#define   AN8855_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34
+#define   AN8855_PORT_MIB_TX_PKT_SZ_128_TO_255 0x38
+#define   AN8855_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3
+#define   AN8855_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40
+#define   AN8855_PORT_MIB_TX_PKT_SZ_1024_TO_1518 0x44
+#define   AN8855_PORT_MIB_TX_PKT_SZ_1519_TO_MAX 0x48
+#define   AN8855_PORT_MIB_TX_BYTES	0x4c /* 64 bytes */
+#define   AN8855_PORT_MIB_TX_OVERSIZE_DROP 0x54
+#define   AN8855_PORT_MIB_TX_BAD_PKT_BYTES 0x58 /* 64 bytes */
+#define   AN8855_PORT_MIB_RX_DROP	0x80
+#define   AN8855_PORT_MIB_RX_FILTERING	0x84
+#define   AN8855_PORT_MIB_RX_UNICAST	0x88
+#define   AN8855_PORT_MIB_RX_MULTICAST	0x8c
+#define   AN8855_PORT_MIB_RX_BROADCAST	0x90
+#define   AN8855_PORT_MIB_RX_ALIGN_ERR	0x94
+#define   AN8855_PORT_MIB_RX_CRC_ERR	0x98
+#define   AN8855_PORT_MIB_RX_UNDER_SIZE_ERR 0x9c
+#define   AN8855_PORT_MIB_RX_FRAG_ERR	0xa0
+#define   AN8855_PORT_MIB_RX_OVER_SZ_ERR 0xa4
+#define   AN8855_PORT_MIB_RX_JABBER_ERR	0xa8
+#define   AN8855_PORT_MIB_RX_PAUSE	0xac
+#define   AN8855_PORT_MIB_RX_PKT_SZ_64	0xb0
+#define   AN8855_PORT_MIB_RX_PKT_SZ_65_TO_127 0xb4
+#define   AN8855_PORT_MIB_RX_PKT_SZ_128_TO_255 0xb8
+#define   AN8855_PORT_MIB_RX_PKT_SZ_256_TO_511 0xbc
+#define   AN8855_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xc0
+#define   AN8855_PORT_MIB_RX_PKT_SZ_1024_TO_1518 0xc4
+#define   AN8855_PORT_MIB_RX_PKT_SZ_1519_TO_MAX 0xc8
+#define   AN8855_PORT_MIB_RX_BYTES	0xcc /* 64 bytes */
+#define   AN8855_PORT_MIB_RX_CTRL_DROP	0xd4
+#define   AN8855_PORT_MIB_RX_INGRESS_DROP 0xd8
+#define   AN8855_PORT_MIB_RX_ARL_DROP	0xdc
+#define   AN8855_PORT_MIB_FLOW_CONTROL_DROP 0xe0
+#define   AN8855_PORT_MIB_WRED_DROP	0xe4
+#define   AN8855_PORT_MIB_MIRROR_DROP	0xe8
+#define   AN8855_PORT_MIB_RX_BAD_PKT_BYTES 0xec /* 64 bytes */
+#define   AN8855_PORT_MIB_RXS_FLOW_SAMPLING_PKT_DROP 0xf4
+#define   AN8855_PORT_MIB_RXS_FLOW_TOTAL_PKT_DROP 0xf8
+#define   AN8855_PORT_MIB_PORT_CONTROL_DROP 0xfc
+#define AN8855_MIB_CCR			0x10213e30
+#define   AN8855_CCR_MIB_ENABLE		BIT(31)
+#define   AN8855_CCR_RX_OCT_CNT_GOOD	BIT(7)
+#define   AN8855_CCR_RX_OCT_CNT_BAD	BIT(6)
+#define   AN8855_CCR_TX_OCT_CNT_GOOD	BIT(5)
+#define   AN8855_CCR_TX_OCT_CNT_BAD	BIT(4)
+#define   AN8855_CCR_RX_OCT_CNT_GOOD_2	BIT(3)
+#define   AN8855_CCR_RX_OCT_CNT_BAD_2	BIT(2)
+#define   AN8855_CCR_TX_OCT_CNT_GOOD_2	BIT(1)
+#define   AN8855_CCR_TX_OCT_CNT_BAD_2	BIT(0)
+#define   AN8855_CCR_MIB_ACTIVATE	(AN8855_CCR_MIB_ENABLE | \
+					 AN8855_CCR_RX_OCT_CNT_GOOD | \
+					 AN8855_CCR_RX_OCT_CNT_BAD | \
+					 AN8855_CCR_TX_OCT_CNT_GOOD | \
+					 AN8855_CCR_TX_OCT_CNT_BAD | \
+					 AN8855_CCR_RX_OCT_CNT_BAD_2 | \
+					 AN8855_CCR_TX_OCT_CNT_BAD_2)
+#define AN8855_MIB_CLR			0x10213e34
+#define   AN8855_MIB_PORT6_CLR		BIT(6)
+#define   AN8855_MIB_PORT5_CLR		BIT(5)
+#define   AN8855_MIB_PORT4_CLR		BIT(4)
+#define   AN8855_MIB_PORT3_CLR		BIT(3)
+#define   AN8855_MIB_PORT2_CLR		BIT(2)
+#define   AN8855_MIB_PORT1_CLR		BIT(1)
+#define   AN8855_MIB_PORT0_CLR		BIT(0)
+
+/* HSGMII/SGMII Configuration register */
+/*	AN8855_HSGMII_AN_CSR_BASE	0x10220000 */
+#define AN8855_SGMII_REG_AN0		0x10220000
+/*        AN8855_SGMII_AN_ENABLE	BMCR_ANENABLE */
+/*        AN8855_SGMII_AN_RESTART	BMCR_ANRESTART */
+#define AN8855_SGMII_REG_AN_13		0x10220034
+#define   AN8855_SGMII_REMOTE_FAULT_DIS	BIT(8)
+#define   AN8855_SGMII_IF_MODE		GENMASK(5, 0)
+#define AN8855_SGMII_REG_AN_FORCE_CL37	0x10220060
+#define   AN8855_RG_FORCE_AN_DONE	BIT(0)
+
+/*	AN8855_HSGMII_CSR_PCS_BASE	0x10220000 */
+#define AN8855_RG_HSGMII_PCS_CTROL_1	0x10220a00
+#define   AN8855_RG_TBI_10B_MODE	BIT(30)
+#define AN8855_RG_AN_SGMII_MODE_FORCE	0x10220a24
+#define   AN8855_RG_FORCE_CUR_SGMII_MODE GENMASK(5, 4)
+#define   AN8855_RG_FORCE_CUR_SGMII_SEL	BIT(0)
+
+/*	AN8855_MULTI_SGMII_CSR_BASE	0x10224000 */
+#define AN8855_SGMII_STS_CTRL_0		0x10224018
+#define   AN8855_RG_LINK_MODE_P0	GENMASK(5, 4)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_2500 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x3)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_1000 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x2)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_100 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x1)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_10 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x0)
+#define   AN8855_RG_FORCE_SPD_MODE_P0	BIT(2)
+#define AN8855_MSG_RX_CTRL_0		0x10224100
+#define AN8855_MSG_RX_LIK_STS_0		0x10224514
+#define   AN8855_RG_DPX_STS_P3		BIT(24)
+#define   AN8855_RG_DPX_STS_P2		BIT(16)
+#define   AN8855_RG_EEE1G_STS_P1	BIT(12)
+#define   AN8855_RG_DPX_STS_P1		BIT(8)
+#define   AN8855_RG_TXFC_STS_P0		BIT(2)
+#define   AN8855_RG_RXFC_STS_P0		BIT(1)
+#define   AN8855_RG_DPX_STS_P0		BIT(0)
+#define AN8855_MSG_RX_LIK_STS_2		0x1022451c
+#define   AN8855_RG_RXFC_AN_BYPASS_P3	BIT(11)
+#define   AN8855_RG_RXFC_AN_BYPASS_P2	BIT(10)
+#define   AN8855_RG_RXFC_AN_BYPASS_P1	BIT(9)
+#define   AN8855_RG_TXFC_AN_BYPASS_P3	BIT(7)
+#define   AN8855_RG_TXFC_AN_BYPASS_P2	BIT(6)
+#define   AN8855_RG_TXFC_AN_BYPASS_P1	BIT(5)
+#define   AN8855_RG_DPX_AN_BYPASS_P3	BIT(3)
+#define   AN8855_RG_DPX_AN_BYPASS_P2	BIT(2)
+#define   AN8855_RG_DPX_AN_BYPASS_P1	BIT(1)
+#define   AN8855_RG_DPX_AN_BYPASS_P0	BIT(0)
+#define AN8855_PHY_RX_FORCE_CTRL_0	0x10224520
+#define   AN8855_RG_FORCE_TXC_SEL	BIT(4)
+
+/*	AN8855_XFI_CSR_PCS_BASE		0x10225000 */
+#define AN8855_RG_USXGMII_AN_CONTROL_0	0x10225bf8
+
+/*	AN8855_MULTI_PHY_RA_CSR_BASE	0x10226000 */
+#define AN8855_RG_RATE_ADAPT_CTRL_0	0x10226000
+#define   AN8855_RG_RATE_ADAPT_RX_BYPASS BIT(27)
+#define   AN8855_RG_RATE_ADAPT_TX_BYPASS BIT(26)
+#define   AN8855_RG_RATE_ADAPT_RX_EN	BIT(4)
+#define   AN8855_RG_RATE_ADAPT_TX_EN	BIT(0)
+#define AN8855_RATE_ADP_P0_CTRL_0	0x10226100
+#define   AN8855_RG_P0_DIS_MII_MODE	BIT(31)
+#define   AN8855_RG_P0_MII_MODE		BIT(28)
+#define   AN8855_RG_P0_MII_RA_RX_EN	BIT(3)
+#define   AN8855_RG_P0_MII_RA_TX_EN	BIT(2)
+#define   AN8855_RG_P0_MII_RA_RX_MODE	BIT(1)
+#define   AN8855_RG_P0_MII_RA_TX_MODE	BIT(0)
+#define AN8855_MII_RA_AN_ENABLE		0x10226300
+#define   AN8855_RG_P0_RA_AN_EN		BIT(0)
+
+/*	AN8855_QP_DIG_CSR_BASE		0x1022a000 */
+#define AN8855_QP_CK_RST_CTRL_4		0x1022a310
+#define AN8855_QP_DIG_MODE_CTRL_0	0x1022a324
+#define   AN8855_RG_SGMII_MODE		GENMASK(5, 4)
+#define   AN8855_RG_SGMII_AN_EN		BIT(0)
+#define AN8855_QP_DIG_MODE_CTRL_1	0x1022a330
+#define   AN8855_RG_TPHY_SPEED		GENMASK(3, 2)
+
+/*	AN8855_SERDES_WRAPPER_BASE	0x1022c000 */
+#define AN8855_USGMII_CTRL_0		0x1022c000
+
+/*	AN8855_QP_PMA_TOP_BASE		0x1022e000 */
+#define AN8855_PON_RXFEDIG_CTRL_0	0x1022e100
+#define   AN8855_RG_QP_EQ_RX500M_CK_SEL	BIT(12)
+#define AN8855_PON_RXFEDIG_CTRL_9	0x1022e124
+#define   AN8855_RG_QP_EQ_LEQOSC_DLYCNT	GENMASK(2, 0)
+
+#define AN8855_SS_LCPLL_PWCTL_SETTING_2	0x1022e208
+#define   AN8855_RG_NCPO_ANA_MSB	GENMASK(17, 16)
+#define AN8855_SS_LCPLL_TDC_FLT_2	0x1022e230
+#define   AN8855_RG_LCPLL_NCPO_VALUE	GENMASK(30, 0)
+#define AN8855_SS_LCPLL_TDC_FLT_5	0x1022e23c
+#define   AN8855_RG_LCPLL_NCPO_CHG	BIT(24)
+#define AN8855_SS_LCPLL_TDC_PCW_1	0x1022e248
+#define  AN8855_RG_LCPLL_PON_HRDDS_PCW_NCPO_GPON GENMASK(30, 0)
+#define AN8855_INTF_CTRL_8		0x1022e320
+#define AN8855_INTF_CTRL_9		0x1022e324
+#define AN8855_INTF_CTRL_10		0x1022e328
+#define   AN8855_RG_DA_QP_TX_FIR_C2_SEL	BIT(29)
+#define   AN8855_RG_DA_QP_TX_FIR_C2_FORCE GENMASK(28, 24)
+#define   AN8855_RG_DA_QP_TX_FIR_C1_SEL	BIT(21)
+#define   AN8855_RG_DA_QP_TX_FIR_C1_FORCE GENMASK(20, 16)
+#define AN8855_INTF_CTRL_11		0x1022e32c
+#define   AN8855_RG_DA_QP_TX_FIR_C0B_SEL BIT(6)
+#define   AN8855_RG_DA_QP_TX_FIR_C0B_FORCE GENMASK(5, 0)
+#define AN8855_PLL_CTRL_0		0x1022e400
+#define   AN8855_RG_PHYA_AUTO_INIT	BIT(0)
+#define AN8855_PLL_CTRL_2		0x1022e408
+#define   AN8855_RG_DA_QP_PLL_SDM_IFM_INTF BIT(30)
+#define   AN8855_RG_DA_QP_PLL_RICO_SEL_INTF BIT(29)
+#define   AN8855_RG_DA_QP_PLL_POSTDIV_EN_INTF BIT(28)
+#define   AN8855_RG_DA_QP_PLL_PHY_CK_EN_INTF BIT(27)
+#define   AN8855_RG_DA_QP_PLL_PFD_OFFSET_EN_INTRF BIT(26)
+#define   AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF GENMASK(25, 24)
+#define   AN8855_RG_DA_QP_PLL_PCK_SEL_INTF BIT(22)
+#define   AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF GENMASK(21, 20)
+#define   AN8855_RG_DA_QP_PLL_IR_INTF	GENMASK(19, 16)
+#define   AN8855_RG_DA_QP_PLL_ICOIQ_EN_INTF BIT(14)
+#define   AN8855_RG_DA_QP_PLL_FBKSEL_INTF GENMASK(13, 12)
+#define   AN8855_RG_DA_QP_PLL_BR_INTF	GENMASK(10, 8)
+#define   AN8855_RG_DA_QP_PLL_BPD_INTF	GENMASK(7, 6)
+#define   AN8855_RG_DA_QP_PLL_BPA_INTF	GENMASK(4, 2)
+#define   AN8855_RG_DA_QP_PLL_BC_INTF	GENMASK(1, 0)
+#define AN8855_PLL_CTRL_3		0x1022e40c
+#define   AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF GENMASK(31, 16)
+#define   AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF GENMASK(15, 0)
+#define AN8855_PLL_CTRL_4		0x1022e410
+#define   AN8855_RG_DA_QP_PLL_SDM_HREN_INTF GENMASK(4, 3)
+#define   AN8855_RG_DA_QP_PLL_ICOLP_EN_INTF BIT(2)
+#define   AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF GENMASK(1, 0)
+#define AN8855_PLL_CK_CTRL_0		0x1022e414
+#define   AN8855_RG_DA_QP_PLL_TDC_TXCK_SEL_INTF BIT(9)
+#define   AN8855_RG_DA_QP_PLL_SDM_DI_EN_INTF BIT(8)
+#define AN8855_RX_DLY_0			0x1022e614
+#define   AN8855_RG_QP_RX_SAOSC_EN_H_DLY GENMASK(13, 8)
+#define   AN8855_RG_QP_RX_PI_CAL_EN_H_DLY GENMASK(7, 0)
+#define AN8855_RX_CTRL_2		0x1022e630
+#define   AN8855_RG_QP_RX_EQ_EN_H_DLY	GENMASK(28, 16)
+#define AN8855_RX_CTRL_5		0x1022e63c
+#define   AN8855_RG_FREDET_CHK_CYCLE	GENMASK(29, 10)
+#define AN8855_RX_CTRL_6		0x1022e640
+#define   AN8855_RG_FREDET_GOLDEN_CYCLE	GENMASK(19, 0)
+#define AN8855_RX_CTRL_7		0x1022e644
+#define   AN8855_RG_FREDET_TOLERATE_CYCLE GENMASK(19, 0)
+#define AN8855_RX_CTRL_8		0x1022e648
+#define   AN8855_RG_DA_QP_SAOSC_DONE_TIME GENMASK(27, 16)
+#define   AN8855_RG_DA_QP_LEQOS_EN_TIME	GENMASK(14, 0)
+#define AN8855_RX_CTRL_26		0x1022e690
+#define   AN8855_RG_QP_EQ_RETRAIN_ONLY_EN BIT(26)
+#define   AN8855_RG_LINK_NE_EN		BIT(24)
+#define   AN8855_RG_LINK_ERRO_EN	BIT(23)
+#define AN8855_RX_CTRL_42		0x1022e6d0
+#define   AN8855_RG_QP_EQ_EN_DLY	GENMASK(12, 0)
+
+/*	AN8855_QP_ANA_CSR_BASE		0x1022f000 */
+#define AN8855_RG_QP_RX_DAC_EN		0x1022f000
+#define   AN8855_RG_QP_SIGDET_HF	GENMASK(17, 16)
+#define AN8855_RG_QP_RXAFE_RESERVE	0x1022f004
+#define   AN8855_RG_QP_CDR_PD_10B_EN	BIT(11)
+#define AN8855_RG_QP_CDR_LPF_BOT_LIM	0x1022f008
+#define   AN8855_RG_QP_CDR_LPF_KP_GAIN	GENMASK(26, 24)
+#define   AN8855_RG_QP_CDR_LPF_KI_GAIN	GENMASK(22, 20)
+#define AN8855_RG_QP_CDR_LPF_MJV_LIM	0x1022f00c
+#define   AN8855_RG_QP_CDR_LPF_RATIO	GENMASK(5, 4)
+#define AN8855_RG_QP_CDR_LPF_SETVALUE	0x1022f014
+#define   AN8855_RG_QP_CDR_PR_BUF_IN_SR	GENMASK(31, 29)
+#define   AN8855_RG_QP_CDR_PR_BETA_SEL	GENMASK(28, 25)
+#define AN8855_RG_QP_CDR_PR_CKREF_DIV1	0x1022f018
+#define   AN8855_RG_QP_CDR_PR_KBAND_DIV	GENMASK(26, 24)
+#define   AN8855_RG_QP_CDR_PR_DAC_BAND	GENMASK(12, 8)
+#define AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE 0x1022f01c
+#define   AN8855_RG_QP_CDR_PR_XFICK_EN	BIT(30)
+#define   AN8855_RG_QP_CDR_PR_KBAND_PCIE_MODE BIT(6)
+#define   AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK GENMASK(5, 0)
+#define AN8855_RG_QP_CDR_FORCE_IBANDLPF_R_OFF 0x1022f020
+#define   AN8855_RG_QP_CDR_PHYCK_SEL	GENMASK(17, 16)
+#define   AN8855_RG_QP_CDR_PHYCK_RSTB	BIT(13)
+#define   AN8855_RG_QP_CDR_PHYCK_DIV	GENMASK(12, 6)
+#define AN8855_RG_QP_TX_MODE		0x1022f028
+#define   AN8855_RG_QP_TX_RESERVE	GENMASK(31, 16)
+#define   AN8855_RG_QP_TX_MODE_16B_EN	BIT(0)
+#define AN8855_RG_QP_PLL_IPLL_DIG_PWR_SEL 0x1022f03c
+#define AN8855_RG_QP_PLL_SDM_ORD	0x1022f040
+#define   AN8855_RG_QP_PLL_SSC_PHASE_INI BIT(4)
+#define   AN8855_RG_QP_PLL_SSC_TRI_EN	BIT(3)
+
+/*	AN8855_ETHER_SYS_BASE		0x1028c800 */
+#define AN8855_RG_GPHY_AFE_PWD		0x1028c840
+#define AN8855_RG_GPHY_SMI_ADDR		0x1028c848
+
+#define MIB_DESC(_s, _o, _n)	\
+	{			\
+		.size = (_s),	\
+		.offset = (_o),	\
+		.name = (_n),	\
+	}
+
+struct an8855_mib_desc {
+	unsigned int size;
+	unsigned int offset;
+	const char *name;
+};
+
+struct an8855_fdb {
+	u16 vid;
+	u8 port_mask;
+	u16 aging;
+	u8 mac[6];
+	bool noarp;
+	u8 live;
+	u8 type;
+	u8 fid;
+	u8 ivl;
+};
+
+struct an8855_priv {
+	struct device *dev;
+	struct dsa_switch *ds;
+	struct regmap *regmap;
+	struct gpio_desc *reset_gpio;
+	/* Protect ATU or VLAN table access */
+	struct mutex reg_mutex;
+
+	struct phylink_pcs pcs;
+
+	u8 mirror_rx;
+	u8 mirror_tx;
+	u8 port_isolated_map;
+
+	bool phy_require_calib;
+};
+
+#endif /* __AN8855_H */
diff --git a/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c b/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c
new file mode 100644
index 0000000000..5feba72c02
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MDIO passthrough driver for Airoha AN8855 Switch
+ */
+
+#include <linux/mfd/airoha-an8855-mfd.h>
+#include <linux/module.h>
+#include <linux/of_mdio.h>
+#include <linux/platform_device.h>
+
+static int an855_phy_restore_page(struct an8855_mfd_priv *priv,
+				  int phy) __must_hold(&priv->bus->mdio_lock)
+{
+	/* Check PHY page only for addr shared with switch */
+	if (phy != priv->switch_addr)
+		return 0;
+
+	/* Don't restore page if it's not set to switch page */
+	if (priv->current_page != FIELD_GET(AN8855_PHY_PAGE,
+					    AN8855_PHY_PAGE_EXTENDED_4))
+		return 0;
+
+	/* Restore page to 0, PHY might change page right after but that
+	 * will be ignored as it won't be a switch page.
+	 */
+	return an8855_mii_set_page(priv, phy, AN8855_PHY_PAGE_STANDARD);
+}
+
+static int an8855_phy_read(struct mii_bus *bus, int phy, int regnum)
+{
+	struct an8855_mfd_priv *priv = bus->priv;
+	struct mii_bus *real_bus = priv->bus;
+	int ret;
+
+	mutex_lock_nested(&real_bus->mdio_lock, MDIO_MUTEX_NESTED);
+
+	ret = an855_phy_restore_page(priv, phy);
+	if (ret)
+		goto exit;
+
+	ret = __mdiobus_read(real_bus, phy, regnum);
+exit:
+	mutex_unlock(&real_bus->mdio_lock);
+
+	return ret;
+}
+
+static int an8855_phy_write(struct mii_bus *bus, int phy, int regnum, u16 val)
+{
+	struct an8855_mfd_priv *priv = bus->priv;
+	struct mii_bus *real_bus = priv->bus;
+	int ret;
+
+	mutex_lock_nested(&real_bus->mdio_lock, MDIO_MUTEX_NESTED);
+
+	ret = an855_phy_restore_page(priv, phy);
+	if (ret)
+		goto exit;
+
+	ret = __mdiobus_write(real_bus, phy, regnum, val);
+exit:
+	mutex_unlock(&real_bus->mdio_lock);
+
+	return ret;
+}
+
+static int an8855_mdio_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct an8855_mfd_priv *priv;
+	struct mii_bus *bus;
+	int ret;
+
+	/* Get priv of MFD */
+	priv = dev_get_drvdata(dev->parent);
+
+	bus = devm_mdiobus_alloc(dev);
+	if (!bus)
+		return -ENOMEM;
+
+	bus->priv = priv;
+	bus->name = KBUILD_MODNAME "-mii";
+	snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d",
+		 priv->switch_addr);
+	bus->parent = dev;
+	bus->read = an8855_phy_read;
+	bus->write = an8855_phy_write;
+
+	ret = devm_of_mdiobus_register(dev, bus, dev->of_node);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to register MDIO bus\n");
+
+	return ret;
+}
+
+static const struct of_device_id an8855_mdio_of_match[] = {
+	{ .compatible = "airoha,an8855-mdio", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_mdio_of_match);
+
+static struct platform_driver an8855_mdio_driver = {
+	.probe	= an8855_mdio_probe,
+	.driver = {
+		.name = "an8855-mdio",
+		.of_match_table = an8855_mdio_of_match,
+	},
+};
+module_platform_driver(an8855_mdio_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for AN8855 MDIO passthrough");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c b/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c
new file mode 100644
index 0000000000..7fab0854ef
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c
@@ -0,0 +1,267 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/phy.h>
+
+#define AN8855_PHY_SELECT_PAGE			0x1f
+#define   AN8855_PHY_PAGE			GENMASK(2, 0)
+#define   AN8855_PHY_PAGE_STANDARD		FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x0)
+#define   AN8855_PHY_PAGE_EXTENDED_1		FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x1)
+
+/* MII Registers Page 1 */
+#define AN8855_PHY_EXT_REG_14			0x14
+#define   AN8855_PHY_EN_DOWN_SHIFT		BIT(4)
+
+/* R50 Calibration regs in MDIO_MMD_VEND1 */
+#define AN8855_PHY_R500HM_RSEL_TX_AB		0x174
+#define AN8855_PHY_R50OHM_RSEL_TX_A_EN		BIT(15)
+#define AN8855_PHY_R50OHM_RSEL_TX_A		GENMASK(14, 8)
+#define AN8855_PHY_R50OHM_RSEL_TX_B_EN		BIT(7)
+#define AN8855_PHY_R50OHM_RSEL_TX_B		GENMASK(6, 0)
+#define AN8855_PHY_R500HM_RSEL_TX_CD		0x175
+#define AN8855_PHY_R50OHM_RSEL_TX_C_EN		BIT(15)
+#define AN8855_PHY_R50OHM_RSEL_TX_C		GENMASK(14, 8)
+#define AN8855_PHY_R50OHM_RSEL_TX_D_EN		BIT(7)
+#define AN8855_PHY_R50OHM_RSEL_TX_D		GENMASK(6, 0)
+
+#define AN8855_SWITCH_EFUSE_R50O		GENMASK(30, 24)
+
+/* PHY TX PAIR DELAY SELECT Register */
+#define AN8855_PHY_TX_PAIR_DLY_SEL_GBE		0x013
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_A_GBE GENMASK(14, 12)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_B_GBE GENMASK(10, 8)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_C_GBE GENMASK(6, 4)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_D_GBE GENMASK(2, 0)
+/* PHY ADC Register */
+#define AN8855_PHY_RXADC_CTRL			0x0d8
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_A	BIT(12)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_B	BIT(8)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_C	BIT(4)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_D	BIT(0)
+#define AN8855_PHY_RXADC_REV_0			0x0d9
+#define   AN8855_PHY_RG_AD_RESERVE0_A		GENMASK(15, 8)
+#define   AN8855_PHY_RG_AD_RESERVE0_B		GENMASK(7, 0)
+#define AN8855_PHY_RXADC_REV_1			0x0da
+#define   AN8855_PHY_RG_AD_RESERVE0_C		GENMASK(15, 8)
+#define   AN8855_PHY_RG_AD_RESERVE0_D		GENMASK(7, 0)
+
+#define AN8855_PHY_ID				0xc0ff0410
+
+#define AN8855_PHY_FLAGS_EN_CALIBRATION		BIT(0)
+
+struct air_an8855_priv {
+	u8 calibration_data[4];
+};
+
+static const u8 dsa_r50ohm_table[] = {
+	127, 127, 127, 127, 127, 127, 127, 127, 127, 127,
+	127, 127, 127, 127, 127, 127, 127, 126, 122, 117,
+	112, 109, 104, 101,  97,  94,  90,  88,  84,  80,
+	78,  74,  72,  68,  66,  64,  61,  58,  56,  53,
+	51,  48,  47,  44,  42,  40,  38,  36,  34,  32,
+	31,  28,  27,  24,  24,  22,  20,  18,  16,  16,
+	14,  12,  11,   9
+};
+
+static int en8855_get_r50ohm_val(struct device *dev, const char *calib_name,
+				 u8 *dest)
+{
+	u32 shift_sel, val;
+	int ret;
+	int i;
+
+	ret = nvmem_cell_read_u32(dev, calib_name, &val);
+	if (ret)
+		return ret;
+
+	shift_sel = FIELD_GET(AN8855_SWITCH_EFUSE_R50O, val);
+	for (i = 0; i < ARRAY_SIZE(dsa_r50ohm_table); i++)
+		if (dsa_r50ohm_table[i] == shift_sel)
+			break;
+
+	if (i < 8 || i >= ARRAY_SIZE(dsa_r50ohm_table))
+		*dest = dsa_r50ohm_table[25];
+	else
+		*dest = dsa_r50ohm_table[i - 8];
+
+	return 0;
+}
+
+static int an8855_probe(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	struct device_node *node = dev->of_node;
+	struct air_an8855_priv *priv;
+
+	/* If we don't have a node, skip calib */
+	if (!node)
+		return 0;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	phydev->priv = priv;
+
+	return 0;
+}
+
+static int an8855_get_downshift(struct phy_device *phydev, u8 *data)
+{
+	int val;
+
+	val = phy_read_paged(phydev, AN8855_PHY_PAGE_EXTENDED_1, AN8855_PHY_EXT_REG_14);
+	if (val < 0)
+		return val;
+
+	*data = val & AN8855_PHY_EN_DOWN_SHIFT ? DOWNSHIFT_DEV_DEFAULT_COUNT :
+						 DOWNSHIFT_DEV_DISABLE;
+
+	return 0;
+}
+
+static int an8855_set_downshift(struct phy_device *phydev, u8 cnt)
+{
+	u16 ds = cnt != DOWNSHIFT_DEV_DISABLE ? AN8855_PHY_EN_DOWN_SHIFT : 0;
+
+	return phy_modify_paged(phydev, AN8855_PHY_PAGE_EXTENDED_1,
+				AN8855_PHY_EXT_REG_14, AN8855_PHY_EN_DOWN_SHIFT,
+				ds);
+}
+
+static int an8855_config_init(struct phy_device *phydev)
+{
+	struct air_an8855_priv *priv = phydev->priv;
+	struct device *dev = &phydev->mdio.dev;
+	int ret;
+
+	/* Enable HW auto downshift */
+	ret = an8855_set_downshift(phydev, DOWNSHIFT_DEV_DEFAULT_COUNT);
+	if (ret)
+		return ret;
+
+	/* Apply calibration values, if needed.
+	 * AN8855_PHY_FLAGS_EN_CALIBRATION signal this.
+	 */
+	if (priv && phydev->dev_flags & AN8855_PHY_FLAGS_EN_CALIBRATION) {
+		u8 *calibration_data = priv->calibration_data;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_a", &calibration_data[0]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_b", &calibration_data[1]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_c", &calibration_data[2]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_d", &calibration_data[3]);
+		if (ret)
+			return ret;
+
+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_R500HM_RSEL_TX_AB,
+				     AN8855_PHY_R50OHM_RSEL_TX_A | AN8855_PHY_R50OHM_RSEL_TX_B,
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_A, calibration_data[0]) |
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_B, calibration_data[1]));
+		if (ret)
+			return ret;
+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_R500HM_RSEL_TX_CD,
+				     AN8855_PHY_R50OHM_RSEL_TX_C | AN8855_PHY_R50OHM_RSEL_TX_D,
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_C, calibration_data[2]) |
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_D, calibration_data[3]));
+		if (ret)
+			return ret;
+	}
+
+	/* Apply values to reduce signal noise */
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_TX_PAIR_DLY_SEL_GBE,
+			    FIELD_PREP(AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_A_GBE, 0x4) |
+			    FIELD_PREP(AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_C_GBE, 0x4));
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_CTRL,
+			    AN8855_PHY_RG_AD_SAMNPLE_PHSEL_A |
+			    AN8855_PHY_RG_AD_SAMNPLE_PHSEL_C);
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_REV_0,
+			    FIELD_PREP(AN8855_PHY_RG_AD_RESERVE0_A, 0x1));
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_REV_1,
+			    FIELD_PREP(AN8855_PHY_RG_AD_RESERVE0_C, 0x1));
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int an8855_get_tunable(struct phy_device *phydev,
+			      struct ethtool_tunable *tuna, void *data)
+{
+	switch (tuna->id) {
+	case ETHTOOL_PHY_DOWNSHIFT:
+		return an8855_get_downshift(phydev, data);
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int an8855_set_tunable(struct phy_device *phydev,
+			      struct ethtool_tunable *tuna, const void *data)
+{
+	switch (tuna->id) {
+	case ETHTOOL_PHY_DOWNSHIFT:
+		return an8855_set_downshift(phydev, *(const u8 *)data);
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int an8855_read_page(struct phy_device *phydev)
+{
+	return __phy_read(phydev, AN8855_PHY_SELECT_PAGE);
+}
+
+static int an8855_write_page(struct phy_device *phydev, int page)
+{
+	return __phy_write(phydev, AN8855_PHY_SELECT_PAGE, page);
+}
+
+static struct phy_driver an8855_driver[] = {
+{
+	PHY_ID_MATCH_EXACT(AN8855_PHY_ID),
+	.name			= "Airoha AN8855 internal PHY",
+	/* PHY_GBIT_FEATURES */
+	.flags			= PHY_IS_INTERNAL,
+	.probe			= an8855_probe,
+	.config_init		= an8855_config_init,
+	.soft_reset		= genphy_soft_reset,
+	.get_tunable		= an8855_get_tunable,
+	.set_tunable		= an8855_set_tunable,
+	.suspend		= genphy_suspend,
+	.resume			= genphy_resume,
+	.read_page		= an8855_read_page,
+	.write_page		= an8855_write_page,
+}, };
+
+module_phy_driver(an8855_driver);
+
+static struct mdio_device_id __maybe_unused an8855_tbl[] = {
+	{ PHY_ID_MATCH_EXACT(AN8855_PHY_ID) },
+	{ }
+};
+
+MODULE_DEVICE_TABLE(mdio, an8855_tbl);
+
+MODULE_DESCRIPTION("Airoha AN8855 PHY driver");
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c b/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c
new file mode 100644
index 0000000000..7940453d6e
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Airoha AN8855 Switch EFUSE Driver
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define AN8855_EFUSE_CELL		50
+
+#define AN8855_EFUSE_DATA0		0x1000a500
+#define   AN8855_EFUSE_R50O		GENMASK(30, 24)
+
+static int an8855_efuse_read(void *context, unsigned int offset,
+			     void *val, size_t bytes)
+{
+	struct regmap *regmap = context;
+
+	return regmap_bulk_read(regmap, AN8855_EFUSE_DATA0 + offset,
+				val, bytes / sizeof(u32));
+}
+
+static int an8855_efuse_probe(struct platform_device *pdev)
+{
+	struct nvmem_config an8855_nvmem_config = {
+		.name = "an8855-efuse",
+		.size = AN8855_EFUSE_CELL * sizeof(u32),
+		.stride = sizeof(u32),
+		.word_size = sizeof(u32),
+		.reg_read = an8855_efuse_read,
+	};
+	struct device *dev = &pdev->dev;
+	struct nvmem_device *nvmem;
+
+	/* Assign NVMEM priv to MFD regmap */
+	an8855_nvmem_config.priv = dev_get_regmap(dev->parent, NULL);
+	an8855_nvmem_config.dev = dev;
+	nvmem = devm_nvmem_register(dev, &an8855_nvmem_config);
+
+	return PTR_ERR_OR_ZERO(nvmem);
+}
+
+static const struct of_device_id an8855_efuse_of_match[] = {
+	{ .compatible = "airoha,an8855-efuse", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_efuse_of_match);
+
+static struct platform_driver an8855_efuse_driver = {
+	.probe = an8855_efuse_probe,
+	.driver = {
+		.name = "an8855-efuse",
+		.of_match_table = an8855_efuse_of_match,
+	},
+};
+module_platform_driver(an8855_efuse_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for AN8855 Switch EFUSE");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h b/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h
new file mode 100644
index 0000000000..56061566a0
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * MFD driver for Airoha AN8855 Switch
+ */
+#ifndef _LINUX_INCLUDE_MFD_AIROHA_AN8855_MFD_H
+#define _LINUX_INCLUDE_MFD_AIROHA_AN8855_MFD_H
+
+#include <linux/bitfield.h>
+
+/* MII Registers */
+#define AN8855_PHY_SELECT_PAGE		0x1f
+#define   AN8855_PHY_PAGE		GENMASK(2, 0)
+#define   AN8855_PHY_PAGE_STANDARD	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x0)
+#define   AN8855_PHY_PAGE_EXTENDED_1	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x1)
+#define   AN8855_PHY_PAGE_EXTENDED_4	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x4)
+
+/* MII Registers Page 4 */
+#define AN8855_PBUS_MODE		0x10
+#define   AN8855_PBUS_MODE_ADDR_FIXED	0x0
+#define AN8855_PBUS_MODE_ADDR_INCR	BIT(15)
+#define AN8855_PBUS_WR_ADDR_HIGH	0x11
+#define AN8855_PBUS_WR_ADDR_LOW		0x12
+#define AN8855_PBUS_WR_DATA_HIGH	0x13
+#define AN8855_PBUS_WR_DATA_LOW		0x14
+#define AN8855_PBUS_RD_ADDR_HIGH	0x15
+#define AN8855_PBUS_RD_ADDR_LOW		0x16
+#define AN8855_PBUS_RD_DATA_HIGH	0x17
+#define AN8855_PBUS_RD_DATA_LOW		0x18
+
+struct an8855_mfd_priv {
+	struct device *dev;
+	struct mii_bus *bus;
+
+	unsigned int switch_addr;
+	u16 current_page;
+};
+
+int an8855_mii_set_page(struct an8855_mfd_priv *priv, u8 phy_id,
+			u8 page);
+
+#endif
diff --git a/target/linux/mediatek/filogic/config-6.6 b/target/linux/mediatek/filogic/config-6.6
index e0a715a56b..fe85b9d3f1 100644
--- a/target/linux/mediatek/filogic/config-6.6
+++ b/target/linux/mediatek/filogic/config-6.6
@@ -1,5 +1,6 @@
 CONFIG_64BIT=y
 # CONFIG_AHCI_MTK is not set
+CONFIG_AIR_AN8855_PHY=y
 CONFIG_AIROHA_EN8801SC_PHY=y
 CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
 CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
@@ -237,12 +238,14 @@ CONFIG_MAXLINEAR_GPHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+CONFIG_MDIO_AN8855=y
 CONFIG_MEDIATEK_2P5GE_PHY=y
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_GE_SOC_PHY=y
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_MFD_SYSCON=y
+CONFIG_MFD_AIROHA_AN8855=y
 CONFIG_MIGRATION=y
 # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
 CONFIG_MMC=y
@@ -292,6 +295,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+CONFIG_NET_DSA_AN8855=y
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 CONFIG_NET_DSA_MT7530_MMIO=y
@@ -310,6 +314,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=4
 CONFIG_NVMEM=y
+CONFIG_NVMEM_AN8855_EFUSE=y
 CONFIG_NVMEM_BLOCK=y
 CONFIG_NVMEM_LAYOUTS=y
 CONFIG_NVMEM_LAYOUT_ADTRAN=y
diff --git a/target/linux/mediatek/mt7622/config-6.6 b/target/linux/mediatek/mt7622/config-6.6
index ec3be8df9a..c3c8b60684 100644
--- a/target/linux/mediatek/mt7622/config-6.6
+++ b/target/linux/mediatek/mt7622/config-6.6
@@ -1,5 +1,6 @@
 CONFIG_64BIT=y
 # CONFIG_AHCI_MTK is not set
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_AQUANTIA_PHY=y
 CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
@@ -240,12 +241,14 @@ CONFIG_MAXLINEAR_GPHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 # CONFIG_MEDIATEK_2P5GE_PHY is not set
 CONFIG_MEDIATEK_GE_PHY=y
 # CONFIG_MEDIATEK_GE_SOC_PHY is not set
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGRATION=y
 # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
 CONFIG_MMC=y
@@ -294,6 +297,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -312,6 +316,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_BLOCK=y
 CONFIG_NVMEM_LAYOUTS=y
 CONFIG_NVMEM_LAYOUT_ADTRAN=y
diff --git a/target/linux/mediatek/mt7623/config-6.6 b/target/linux/mediatek/mt7623/config-6.6
index 6bc92a09dc..9d12c48eee 100644
--- a/target/linux/mediatek/mt7623/config-6.6
+++ b/target/linux/mediatek/mt7623/config-6.6
@@ -1,4 +1,5 @@
 # CONFIG_AIO is not set
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ARCH_32BIT_OFF_T=y
@@ -352,6 +353,7 @@ CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 CONFIG_MDIO_GPIO=y
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_MT6577_AUXADC=y
@@ -361,6 +363,7 @@ CONFIG_MFD_CORE=y
 # CONFIG_MFD_HI6421_SPMI is not set
 CONFIG_MFD_MT6397=y
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGRATION=y
 CONFIG_MMC=y
@@ -410,6 +413,7 @@ CONFIG_NEED_SRCU_NMI_SAFE=y
 CONFIG_NEON=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -431,6 +435,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=4
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_LAYOUTS=y
 # CONFIG_NVMEM_LAYOUT_ADTRAN is not set
 CONFIG_NVMEM_MTK_EFUSE=y
diff --git a/target/linux/mediatek/mt7629/config-6.6 b/target/linux/mediatek/mt7629/config-6.6
index 9f57bda3e9..d66a514f63 100644
--- a/target/linux/mediatek/mt7629/config-6.6
+++ b/target/linux/mediatek/mt7629/config-6.6
@@ -1,3 +1,4 @@
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ARCH_32BIT_OFF_T=y
@@ -181,9 +182,11 @@ CONFIG_MACH_MT7629=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGRATION=y
 CONFIG_MMU_LAZY_TLB_REFCOUNT=y
@@ -216,6 +219,7 @@ CONFIG_NETFILTER=y
 CONFIG_NETFILTER_BPF_LINK=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -234,6 +238,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_LAYOUTS=y
 # CONFIG_NVMEM_LAYOUT_ADTRAN is not set
 # CONFIG_NVMEM_MTK_EFUSE is not set
diff --git a/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch b/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch
new file mode 100644
index 0000000000..bd70bec4b3
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch
@@ -0,0 +1,309 @@
+From: Christian Marangi <ansuelsmth at gmail.com>
+To: Christian Marangi <ansuelsmth at gmail.com>,
+	Lee Jones <lee at kernel.org>, Rob Herring <robh at kernel.org>,
+	Krzysztof Kozlowski <krzk+dt at kernel.org>,
+	Conor Dooley <conor+dt at kernel.org>,
+	Andrew Lunn <andrew+netdev at lunn.ch>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Vladimir Oltean <olteanv at gmail.com>,
+	Srinivas Kandagatla <srinivas.kandagatla at linaro.org>,
+	Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	Matthias Brugger <matthias.bgg at gmail.com>,
+	AngeloGioacchino Del Regno
+	<angelogioacchino.delregno at collabora.com>,
+	linux-arm-kernel at lists.infradead.org,
+	linux-mediatek at lists.infradead.org, netdev at vger.kernel.org,
+	devicetree at vger.kernel.org, linux-kernel at vger.kernel.org,
+	upstream at airoha.com
+Subject: [net-next PATCH v11 0/9] net: dsa: Add Airoha AN8855 support
+Date: Mon,  9 Dec 2024 14:44:17 +0100	[thread overview]
+Message-ID: <20241209134459.27110-1-ansuelsmth at gmail.com> (raw)
+
+This small series add the initial support for the Airoha AN8855 Switch.
+
+It's a 5 port Gigabit Switch with SGMII/HSGMII upstream port.
+
+This is starting to get in the wild and there are already some router
+having this switch chip.
+
+It's conceptually similar to mediatek switch but register and bits
+are different. And there is that massive Hell that is the PCS
+configuration.
+Saddly for that part we have absolutely NO documentation currently.
+
+There is this special thing where PHY needs to be calibrated with values
+from the switch efuse. (the thing have a whole cpu timer and MCU)
+
+Changes v11:
+- Address reviews from Christophe (spell mistake + dev_err_probe)
+- Fix kconfig dependency for MFD driver (depends on MDIO_DEVICE instead of MDIO)
+  (indirectly fix link error for mdio APIs)
+- Fix copy-paste error for MFD driver of_table
+- Fix compilation error for PHY (move NVMEM to .config)
+- Drop unneeded NVMEM node from MDIO example schema (from Andrew)
+- Adapt MFD example schema to MDIO reg property restrictions
+Changes v10:
+- Entire rework to MFD + split to MDIO, EFUSE, SWITCH separate drivers
+- Drop EEE OPs (while Russell finish RFC for EEE changes)
+- Use new pcs_inpand OPs
+- Drop AN restart function and move to pcs_config
+- Enable assisted_learning and disable CPU learn (preparation for fdb_isolation)
+- Move EFUSE read in Internal PHY driver to .config to handle EPROBE_DEFER
+  (needed now that NVMEM driver is register externally instead of internally to switch
+   node)
+Changes v9:
+- Error out on using 5G speed as currently not supported
+- Add missing MAC_2500FD in phylink mac_capabilities
+- Add comment and improve if condition for an8855_phylink_mac_config
+Changes v8:
+- Add port Fast Age support
+- Add support for Port Isolation
+- Use correct register for Learning Disable
+- Add support for Ageing Time OP
+- Set default PVID to 0 by default
+- Add mdb OPs
+- Add port change MTU
+- Fix support for Upper VLAN
+Changes v7:
+- Fix devm_dsa_register_switch wrong export symbol
+Changes v6:
+- Drop standard MIB and handle with ethtool OPs (as requested by Jakub)
+- Cosmetic: use bool instead of 0 or 1
+Changes v5:
+- Add devm_dsa_register_switch() patch
+- Add Reviewed-by tag for DT patch
+Changes v4:
+- Set regmap readable_table static (mute compilation warning)
+- Add support for port_bridge flags (LEARNING, FLOOD)
+- Reset fdb struct in fdb_dump
+- Drop support_asym_pause in port_enable
+- Add define for get_phy_flags
+- Fix bug for port not inititially part of a bridge
+  (in an8855_setup the port matrix was always cleared but
+   the CPU port was never initially added)
+- Disable learning and flood for user port by default
+- Set CPU port to flood and learning by default
+- Correctly AND force duplex and flow control in an8855_phylink_mac_link_up
+- Drop RGMII from pcs_config
+- Check ret in "Disable AN if not in autoneg"
+- Use devm_mutex_init
+- Fix typo for AN8855_PORT_CHECK_MODE
+- Better define AN8855_STP_LISTENING = AN8855_STP_BLOCKING
+- Fix typo in AN8855_PHY_EN_DOWN_SHIFT
+- Use paged helper for PHY
+- Skip calibration in config_init if priv not defined
+Changes v3:
+- Out of RFC
+- Switch PHY code to select_page API
+- Better describe masks and bits in PHY driver for ADC register
+- Drop raw values and use define for mii read/write
+- Switch to absolute PHY address
+- Replace raw values with mask and bits for pcs_config
+- Fix typo for ext-surge property name
+- Drop support for relocating Switch base PHY address on the bus
+Changes v2:
+- Drop mutex guard patch
+- Drop guard usage in DSA driver
+- Use __mdiobus_write/read
+- Check return condition and return errors for mii read/write
+- Fix wrong logic for EEE
+- Fix link_down (don't force link down with autoneg)
+- Fix forcing speed on sgmii autoneg
+- Better document link speed for sgmii reg
+- Use standard define for sgmii reg
+- Imlement nvmem support to expose switch EFUSE
+- Rework PHY calibration with the use of NVMEM producer/consumer
+- Update DT with new NVMEM property
+- Move aneg validation for 2500-basex in pcs_config
+- Move r50Ohm table and function to PHY driver
+
+Christian Marangi (9):
+  dt-bindings: nvmem: Document support for Airoha AN8855 Switch EFUSE
+  dt-bindings: net: Document support for Airoha AN8855 Switch Virtual
+    MDIO
+  dt-bindings: net: dsa: Document support for Airoha AN8855 DSA Switch
+  dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC
+  mfd: an8855: Add support for Airoha AN8855 Switch MFD
+  net: mdio: Add Airoha AN8855 Switch MDIO Passtrough
+  nvmem: an8855: Add support for Airoha AN8855 Switch EFUSE
+  net: dsa: Add Airoha AN8855 5-Port Gigabit DSA Switch driver
+  net: phy: Add Airoha AN8855 Internal Switch Gigabit PHY
+
+ .../bindings/mfd/airoha,an8855-mfd.yaml       |  178 ++
+ .../bindings/net/airoha,an8855-mdio.yaml      |   56 +
+ .../net/dsa/airoha,an8855-switch.yaml         |  105 +
+ .../bindings/nvmem/airoha,an8855-efuse.yaml   |  123 +
+ MAINTAINERS                                   |   17 +
+ drivers/mfd/Kconfig                           |   10 +
+ drivers/mfd/Makefile                          |    1 +
+ drivers/mfd/airoha-an8855.c                   |  278 ++
+ drivers/net/dsa/Kconfig                       |    9 +
+ drivers/net/dsa/Makefile                      |    1 +
+ drivers/net/dsa/an8855.c                      | 2310 +++++++++++++++++
+ drivers/net/dsa/an8855.h                      |  783 ++++++
+ drivers/net/mdio/Kconfig                      |    9 +
+ drivers/net/mdio/Makefile                     |    1 +
+ drivers/net/mdio/mdio-an8855.c                |  113 +
+ drivers/net/phy/Kconfig                       |    5 +
+ drivers/net/phy/Makefile                      |    1 +
+ drivers/net/phy/air_an8855.c                  |  267 ++
+ drivers/nvmem/Kconfig                         |   11 +
+ drivers/nvmem/Makefile                        |    2 +
+ drivers/nvmem/an8855-efuse.c                  |   63 +
+ include/linux/mfd/airoha-an8855-mfd.h         |   41 +
+ 22 files changed, 4384 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
+ create mode 100644 Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml
+ create mode 100644 Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
+ create mode 100644 Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml
+ create mode 100644 drivers/mfd/airoha-an8855.c
+ create mode 100644 drivers/net/dsa/an8855.c
+ create mode 100644 drivers/net/dsa/an8855.h
+ create mode 100644 drivers/net/mdio/mdio-an8855.c
+ create mode 100644 drivers/net/phy/air_an8855.c
+ create mode 100644 drivers/nvmem/an8855-efuse.c
+ create mode 100644 include/linux/mfd/airoha-an8855-mfd.h
+
+--- a/drivers/mfd/Kconfig
++++ b/drivers/mfd/Kconfig
+@@ -41,6 +41,16 @@ config MFD_ALTERA_SYSMGR
+ 	  using regmap_mmio accesses for ARM32 parts and SMC calls to
+ 	  EL3 for ARM64 parts.
+ 
++config MFD_AIROHA_AN8855
++	tristate "Airoha AN8855 Switch MFD"
++	select MFD_CORE
++	select MDIO_DEVICE
++	depends on NETDEVICES && OF
++	help
++	  Support for the Airoha AN8855 Switch MFD. This is a SoC Switch
++	  that provides various peripherals. Currently it provides a
++	  DSA switch and a NVMEM provider.
++
+ config MFD_ACT8945A
+ 	tristate "Active-semi ACT8945A"
+ 	select MFD_CORE
+--- a/drivers/mfd/Makefile
++++ b/drivers/mfd/Makefile
+@@ -7,6 +7,7 @@
+ obj-$(CONFIG_MFD_88PM860X)	+= 88pm860x.o
+ obj-$(CONFIG_MFD_88PM800)	+= 88pm800.o 88pm80x.o
+ obj-$(CONFIG_MFD_88PM805)	+= 88pm805.o 88pm80x.o
++obj-$(CONFIG_MFD_AIROHA_AN8855)	+= airoha-an8855.o
+ obj-$(CONFIG_MFD_ACT8945A)	+= act8945a.o
+ obj-$(CONFIG_MFD_SM501)		+= sm501.o
+ obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835-pm.o
+--- a/drivers/net/dsa/Kconfig
++++ b/drivers/net/dsa/Kconfig
+@@ -24,6 +24,15 @@ config NET_DSA_LOOP
+ 	  This enables support for a fake mock-up switch chip which
+ 	  exercises the DSA APIs.
+ 
++config NET_DSA_AN8855
++	tristate "Airoha AN8855 Ethernet switch support"
++	depends on MFD_AIROHA_AN8855
++	depends on NET_DSA
++	select NET_DSA_TAG_MTK
++	help
++	  This enables support for the Airoha AN8855 Ethernet switch
++	  chip.
++
+ source "drivers/net/dsa/hirschmann/Kconfig"
+ 
+ config NET_DSA_LANTIQ_GSWIP
+--- a/drivers/net/dsa/Makefile
++++ b/drivers/net/dsa/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_NET_DSA_LOOP)	+= dsa_loop.o
+ ifdef CONFIG_NET_DSA_LOOP
+ obj-$(CONFIG_FIXED_PHY)		+= dsa_loop_bdinfo.o
+ endif
++obj-$(CONFIG_NET_DSA_AN8855)	+= an8855.o
+ obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o
+ obj-$(CONFIG_NET_DSA_MT7530)	+= mt7530.o
+ obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o
+--- a/drivers/net/mdio/Kconfig
++++ b/drivers/net/mdio/Kconfig
+@@ -61,6 +61,15 @@ config MDIO_XGENE
+ 	  This module provides a driver for the MDIO busses found in the
+ 	  APM X-Gene SoC's.
+ 
++config MDIO_AN8855
++	tristate "Airoha AN8855 Switch MDIO bus controller"
++	depends on MFD_AIROHA_AN8855
++	depends on OF_MDIO
++	help
++	  This module provides a driver for the Airoha AN8855 Switch
++	  that requires a MDIO passtrough as switch address is shared
++	  with the internal PHYs and requires additional page handling.
++
+ config MDIO_ASPEED
+ 	tristate "ASPEED MDIO bus controller"
+ 	depends on ARCH_ASPEED || COMPILE_TEST
+--- a/drivers/net/mdio/Makefile
++++ b/drivers/net/mdio/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_ACPI_MDIO)		+= acpi_mdio.o
+ obj-$(CONFIG_FWNODE_MDIO)	+= fwnode_mdio.o
+ obj-$(CONFIG_OF_MDIO)		+= of_mdio.o
+ 
++obj-$(CONFIG_MDIO_AN8855)		+= mdio-an8855.o
+ obj-$(CONFIG_MDIO_ASPEED)		+= mdio-aspeed.o
+ obj-$(CONFIG_MDIO_BCM_IPROC)		+= mdio-bcm-iproc.o
+ obj-$(CONFIG_MDIO_BCM_UNIMAC)		+= mdio-bcm-unimac.o
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -147,6 +147,11 @@ config AIROHA_EN8801SC_PHY
+ 	help
+ 	  Currently supports the Airoha EN8801SC PHY.
+ 
++config AIR_AN8855_PHY
++	tristate "Airoha AN8855 Internal Gigabit PHY"
++	help
++	  Currently supports the internal Airoha AN8855 Switch PHY.
++
+ config AIR_EN8811H_PHY
+ 	tristate "Airoha EN8811H 2.5 Gigabit PHY"
+ 	help
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -50,6 +50,7 @@ obj-y				+= $(sfp-obj-y) $(sfp-obj-m)
+ obj-$(CONFIG_ADIN_PHY)		+= adin.o
+ obj-$(CONFIG_ADIN1100_PHY)	+= adin1100.o
+ obj-$(CONFIG_AIROHA_EN8801SC_PHY)   += en8801sc.o
++obj-$(CONFIG_AIR_AN8855_PHY)		+= air_an8855.o
+ obj-$(CONFIG_AIR_EN8811H_PHY)   += air_en8811h.o
+ obj-$(CONFIG_AMD_PHY)		+= amd.o
+ obj-$(CONFIG_AQUANTIA_PHY)	+= aquantia/
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -29,6 +29,17 @@ source "drivers/nvmem/layouts/Kconfig"
+ 
+ # Devices
+ 
++config NVMEM_AN8855_EFUSE
++	tristate "Airoha AN8855 eFuse support"
++	depends on MFD_AIROHA_AN8855 || COMPILE_TEST
++	help
++	  Say y here to enable support for reading eFuses on Airoha AN8855
++	  Switch. These are e.g. used to store factory programmed
++	  calibration data required for the PHY.
++
++	  This driver can also be built as a module. If so, the module will
++	  be called nvmem-an8855-efuse.
++
+ config NVMEM_APPLE_EFUSES
+ 	tristate "Apple eFuse support"
+ 	depends on ARCH_APPLE || COMPILE_TEST
+--- a/drivers/nvmem/Makefile
++++ b/drivers/nvmem/Makefile
+@@ -10,6 +10,8 @@ nvmem_layouts-y			:= layouts.o
+ obj-y				+= layouts/
+ 
+ # Devices
++obj-$(CONFIG_NVMEM_AN8855_EFUSE)	+= nvmem-an8855-efuse.o
++nvmem-an8855-efuse-y 			:= an8855-efuse.o
+ obj-$(CONFIG_NVMEM_APPLE_EFUSES)	+= nvmem-apple-efuses.o
+ nvmem-apple-efuses-y 			:= apple-efuses.o
+ obj-$(CONFIG_NVMEM_BCM_OCOTP)		+= nvmem-bcm-ocotp.o
diff --git a/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch b/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch
new file mode 100644
index 0000000000..2860b785fa
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch
@@ -0,0 +1,166 @@
+From 5e5401d6612ef599ad45785b941eebda7effc90f Mon Sep 17 00:00:00 2001
+From: "Russell King (Oracle)" <rmk+kernel at armlinux.org.uk>
+Date: Thu, 4 Jan 2024 09:47:36 +0000
+Subject: [PATCH] net: phylink: move phylink_pcs_neg_mode() into phylink.c
+
+Move phylink_pcs_neg_mode() from the header file into the .c file since
+nothing should be using it.
+
+Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/phylink.c | 66 +++++++++++++++++++++++++++++++++++++++
+ include/linux/phylink.h   | 66 ---------------------------------------
+ 2 files changed, 66 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -1150,6 +1150,72 @@ static void phylink_pcs_an_restart(struc
+ 		pl->pcs->ops->pcs_an_restart(pl->pcs);
+ }
+ 
++/**
++ * phylink_pcs_neg_mode() - helper to determine PCS inband mode
++ * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
++ * @interface: interface mode to be used
++ * @advertising: adertisement ethtool link mode mask
++ *
++ * Determines the negotiation mode to be used by the PCS, and returns
++ * one of:
++ *
++ * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
++ * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
++ *   will be used.
++ * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
++ *   disabled
++ * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
++ *
++ * Note: this is for cases where the PCS itself is involved in negotiation
++ * (e.g. Clause 37, SGMII and similar) not Clause 73.
++ */
++static unsigned int phylink_pcs_neg_mode(unsigned int mode,
++					 phy_interface_t interface,
++					 const unsigned long *advertising)
++{
++	unsigned int neg_mode;
++
++	switch (interface) {
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++	case PHY_INTERFACE_MODE_QUSGMII:
++	case PHY_INTERFACE_MODE_USXGMII:
++		/* These protocols are designed for use with a PHY which
++		 * communicates its negotiation result back to the MAC via
++		 * inband communication. Note: there exist PHYs that run
++		 * with SGMII but do not send the inband data.
++		 */
++		if (!phylink_autoneg_inband(mode))
++			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++		else
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		break;
++
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_2500BASEX:
++		/* 1000base-X is designed for use media-side for Fibre
++		 * connections, and thus the Autoneg bit needs to be
++		 * taken into account. We also do this for 2500base-X
++		 * as well, but drivers may not support this, so may
++		 * need to override this.
++		 */
++		if (!phylink_autoneg_inband(mode))
++			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
++					   advertising))
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		else
++			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
++		break;
++
++	default:
++		neg_mode = PHYLINK_PCS_NEG_NONE;
++		break;
++	}
++
++	return neg_mode;
++}
++
+ static void phylink_major_config(struct phylink *pl, bool restart,
+ 				  const struct phylink_link_state *state)
+ {
+--- a/include/linux/phylink.h
++++ b/include/linux/phylink.h
+@@ -99,72 +99,6 @@ static inline bool phylink_autoneg_inban
+ }
+ 
+ /**
+- * phylink_pcs_neg_mode() - helper to determine PCS inband mode
+- * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
+- * @interface: interface mode to be used
+- * @advertising: adertisement ethtool link mode mask
+- *
+- * Determines the negotiation mode to be used by the PCS, and returns
+- * one of:
+- *
+- * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
+- * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
+- *   will be used.
+- * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
+- *   disabled
+- * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
+- *
+- * Note: this is for cases where the PCS itself is involved in negotiation
+- * (e.g. Clause 37, SGMII and similar) not Clause 73.
+- */
+-static inline unsigned int phylink_pcs_neg_mode(unsigned int mode,
+-						phy_interface_t interface,
+-						const unsigned long *advertising)
+-{
+-	unsigned int neg_mode;
+-
+-	switch (interface) {
+-	case PHY_INTERFACE_MODE_SGMII:
+-	case PHY_INTERFACE_MODE_QSGMII:
+-	case PHY_INTERFACE_MODE_QUSGMII:
+-	case PHY_INTERFACE_MODE_USXGMII:
+-		/* These protocols are designed for use with a PHY which
+-		 * communicates its negotiation result back to the MAC via
+-		 * inband communication. Note: there exist PHYs that run
+-		 * with SGMII but do not send the inband data.
+-		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_1000BASEX:
+-	case PHY_INTERFACE_MODE_2500BASEX:
+-		/* 1000base-X is designed for use media-side for Fibre
+-		 * connections, and thus the Autoneg bit needs to be
+-		 * taken into account. We also do this for 2500base-X
+-		 * as well, but drivers may not support this, so may
+-		 * need to override this.
+-		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+-					   advertising))
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
+-		break;
+-
+-	default:
+-		neg_mode = PHYLINK_PCS_NEG_NONE;
+-		break;
+-	}
+-
+-	return neg_mode;
+-}
+-
+-/**
+  * struct phylink_link_state - link state structure
+  * @advertising: ethtool bitmask containing advertised link modes
+  * @lp_advertising: ethtool bitmask containing link partner advertised link
diff --git a/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch b/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch
new file mode 100644
index 0000000000..44a6aad7f5
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch
@@ -0,0 +1,1233 @@
+From: "Russell King (Oracle)" <linux at armlinux.org.uk>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>
+Cc: Alexander Couzens <lynxis at fe80.eu>,
+	Andrew Lunn <andrew+netdev at lunn.ch>,
+	AngeloGioacchino Del Regno
+	<angelogioacchino.delregno at collabora.com>,
+	Broadcom internal kernel review list
+	<bcm-kernel-feedback-list at broadcom.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Florian Fainelli <florian.fainelli at broadcom.com>,
+	Ioana Ciornei <ioana.ciornei at nxp.com>,
+	Jakub Kicinski <kuba at kernel.org>,
+	Jose Abreu <Jose.Abreu at synopsys.com>,
+	linux-arm-kernel at lists.infradead.org,
+	linux-mediatek at lists.infradead.org,
+	Marcin Wojtas <marcin.s.wojtas at gmail.com>,
+	Matthias Brugger <matthias.bgg at gmail.com>,
+	netdev at vger.kernel.org, Paolo Abeni <pabeni at redhat.com>
+Subject: [PATCH RFC net-next 00/16] net: add negotiation of in-band capabilities
+Date: Tue, 26 Nov 2024 09:23:48 +0000	[thread overview]
+Message-ID: <Z0WTpE8wkpjMiv_J at shell.armlinux.org.uk> (raw)
+
+Hi,
+
+Yes, this is one patch over the limit of 15 for netdev - but I think it's
+important to include the last patch to head off review comments like "why
+don't you remove phylink_phy_no_inband() in this series?"
+
+Phylink's handling of in-band has been deficient for a long time, and
+people keep hitting problems with it. Notably, situations with the way-
+to-late standardized 2500Base-X and whether that should or should not
+have in-band enabled. We have also been carrying a hack in the form of
+phylink_phy_no_inband() for a PHY that has been used on a SFP module,
+but has no in-band capabilities, not even for SGMII.
+
+When phylink is trying to operate in in-band mode, this series will look
+at the capabilities of the MAC-side PCS and PHY, and work out whether
+in-band can or should be used, programming the PHY as appropriate. This
+includes in-band bypass mode at the PHY.
+
+We don't... yet... support that on the MAC side PCS, because that
+requires yet more complexity.
+
+Patch 1 passes struct phylink and struct phylink_pcs into
+phylink_pcs_neg_mode() so we can look at more state in this function in
+a future patch.
+
+Patch 2 splits "cur_link_an_mode" (the MLO_AN_* mode) into two separate
+purposes - a requested and an active mode. The active mode is the one
+we will be using for the MAC, which becomes dependent on the result of
+in-band negotiation.
+
+Patch 3 adds debug to phylink_major_config() so we can see what is going
+on with the requested and active AN modes.
+
+Patch 4 adds to phylib a method to get the in-band capabilities of the
+PHY from phylib. Patches 5 and 6 add implementations for BCM84881 and
+some Marvell PHYs found on SFPs.
+
+Patch 7 adds to phylib a method to configure the PHY in-band signalling,
+and patch 8 implements it for those Marvell PHYs that support the method
+in patch 4.
+
+Patch 9 does the same as patch 4 but for the MAC-side PCS, with patches
+10 through 14 adding support to several PCS.
+
+Patch 15 adds the code to phylink_pcs_neg_mode() which looks at the
+capabilities, and works out whether to use in-band or out-band mode for
+driving the link between the MAC PCS and PHY.
+
+Patch 16 removes the phylink_phy_no_inband() hack now that we are
+publishing the in-band capabilities from the BCM84881 PHY driver.
+
+ drivers/net/ethernet/marvell/mvneta.c           |  27 +-
+ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c |  25 +-
+ drivers/net/pcs/pcs-lynx.c                      |  22 ++
+ drivers/net/pcs/pcs-mtk-lynxi.c                 |  16 ++
+ drivers/net/pcs/pcs-xpcs.c                      |  28 ++
+ drivers/net/phy/bcm84881.c                      |  10 +
+ drivers/net/phy/marvell.c                       |  48 ++++
+ drivers/net/phy/phy.c                           |  52 ++++
+ drivers/net/phy/phylink.c                       | 352 +++++++++++++++++++-----
+ include/linux/phy.h                             |  34 +++
+ include/linux/phylink.h                         |  17 ++
+ 11 files changed, 539 insertions(+), 92 deletions(-)
+
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -56,7 +56,8 @@ struct phylink {
+ 	struct phy_device *phydev;
+ 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
+ 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
+-	u8 cur_link_an_mode;
++	u8 req_link_an_mode;		/* Requested MLO_AN_xxx mode */
++	u8 act_link_an_mode;		/* Active MLO_AN_xxx mode */
+ 	u8 link_port;			/* The current non-phy ethtool port */
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
+ 
+@@ -74,6 +75,7 @@ struct phylink {
+ 
+ 	struct mutex state_mutex;
+ 	struct phylink_link_state phy_state;
++	unsigned int phy_ib_mode;
+ 	struct work_struct resolve;
+ 	unsigned int pcs_neg_mode;
+ 	unsigned int pcs_state;
+@@ -175,6 +177,24 @@ static const char *phylink_an_mode_str(u
+ 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
+ }
+ 
++static const char *phylink_pcs_mode_str(unsigned int mode)
++{
++	if (!mode)
++		return "none";
++
++	if (mode & PHYLINK_PCS_NEG_OUTBAND)
++		return "outband";
++
++	if (mode & PHYLINK_PCS_NEG_INBAND) {
++		if (mode & PHYLINK_PCS_NEG_ENABLED)
++			return "inband,an-enabled";
++		else
++			return "inband,an-disabled";
++	}
++
++	return "unknown";
++}
++
+ static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
+ {
+ 	switch (interface) {
+@@ -1053,6 +1073,15 @@ static void phylink_resolve_an_pause(str
+ 	}
+ }
+ 
++static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
++				    phy_interface_t interface)
++{
++	if (pcs && pcs->ops->pcs_inband_caps)
++		return pcs->ops->pcs_inband_caps(pcs, interface);
++
++	return 0;
++}
++
+ static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
+ 				   phy_interface_t interface)
+ {
+@@ -1106,6 +1135,24 @@ static void phylink_pcs_link_up(struct p
+ 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
+ }
+ 
++/* Query inband for a specific interface mode, asking the MAC for the
++ * PCS which will be used to handle the interface mode.
++ */
++static unsigned int phylink_inband_caps(struct phylink *pl,
++					 phy_interface_t interface)
++{
++	struct phylink_pcs *pcs;
++
++	if (!pl->mac_ops->mac_select_pcs)
++		return 0;
++
++	pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
++	if (!pcs)
++		return 0;
++
++	return phylink_pcs_inband_caps(pcs, interface);
++}
++
+ static void phylink_pcs_poll_stop(struct phylink *pl)
+ {
+ 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
+@@ -1132,13 +1179,13 @@ static void phylink_mac_config(struct ph
+ 
+ 	phylink_dbg(pl,
+ 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
+-		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
++		    __func__, phylink_an_mode_str(pl->act_link_an_mode),
+ 		    phy_modes(st.interface),
+ 		    phy_rate_matching_to_str(st.rate_matching),
+ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
+ 		    st.pause);
+ 
+-	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
++	pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
+ }
+ 
+ static void phylink_pcs_an_restart(struct phylink *pl)
+@@ -1146,13 +1193,14 @@ static void phylink_pcs_an_restart(struc
+ 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+ 					 pl->link_config.advertising) &&
+ 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
+-	    phylink_autoneg_inband(pl->cur_link_an_mode))
++	    phylink_autoneg_inband(pl->act_link_an_mode))
+ 		pl->pcs->ops->pcs_an_restart(pl->pcs);
+ }
+ 
+ /**
+  * phylink_pcs_neg_mode() - helper to determine PCS inband mode
+- * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
++ * @pl: a pointer to a &struct phylink returned from phylink_create()
++ * @pcs: a pointer to &struct phylink_pcs
+  * @interface: interface mode to be used
+  * @advertising: adertisement ethtool link mode mask
+  *
+@@ -1169,11 +1217,21 @@ static void phylink_pcs_an_restart(struc
+  * Note: this is for cases where the PCS itself is involved in negotiation
+  * (e.g. Clause 37, SGMII and similar) not Clause 73.
+  */
+-static unsigned int phylink_pcs_neg_mode(unsigned int mode,
+-					 phy_interface_t interface,
+-					 const unsigned long *advertising)
++static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
++				 phy_interface_t interface,
++				 const unsigned long *advertising)
+ {
+-	unsigned int neg_mode;
++	unsigned int pcs_ib_caps = 0;
++	unsigned int phy_ib_caps = 0;
++	unsigned int neg_mode, mode;
++	enum {
++		INBAND_CISCO_SGMII,
++		INBAND_BASEX,
++	} type;
++
++	mode = pl->req_link_an_mode;
++
++	pl->phy_ib_mode = 0;
+ 
+ 	switch (interface) {
+ 	case PHY_INTERFACE_MODE_SGMII:
+@@ -1185,10 +1243,7 @@ static unsigned int phylink_pcs_neg_mode
+ 		 * inband communication. Note: there exist PHYs that run
+ 		 * with SGMII but do not send the inband data.
+ 		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		type = INBAND_CISCO_SGMII;
+ 		break;
+ 
+ 	case PHY_INTERFACE_MODE_1000BASEX:
+@@ -1199,21 +1254,143 @@ static unsigned int phylink_pcs_neg_mode
+ 		 * as well, but drivers may not support this, so may
+ 		 * need to override this.
+ 		 */
+-		if (!phylink_autoneg_inband(mode))
++		type = INBAND_BASEX;
++		break;
++
++	default:
++		pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
++		pl->act_link_an_mode = mode;
++		return;
++	}
++
++	if (pcs)
++		pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
++
++	if (pl->phydev)
++		phy_ib_caps = phy_inband_caps(pl->phydev, interface);
++
++	phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
++		    phy_modes(interface), pcs_ib_caps, phy_ib_caps);
++
++	if (!phylink_autoneg_inband(mode)) {
++		bool pcs_ib_only = false;
++		bool phy_ib_only = false;
++
++		if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
++			/* PCS supports reporting in-band capabilities, and
++			 * supports more than disable mode.
++			 */
++			if (pcs_ib_caps & LINK_INBAND_DISABLE)
++				neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++			else if (pcs_ib_caps & LINK_INBAND_ENABLE)
++				pcs_ib_only = true;
++		}
++
++		if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
++			/* PHY supports in-band capabilities, and supports
++			 * more than disable mode.
++			 */
++			if (phy_ib_caps & LINK_INBAND_DISABLE)
++				pl->phy_ib_mode = LINK_INBAND_DISABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++			else if (phy_ib_caps & LINK_INBAND_ENABLE)
++				phy_ib_only = true;
++		}
++
++		/* If either the PCS or PHY requires inband to be enabled,
++		 * this is an invalid configuration. Provide a diagnostic
++		 * message for this case, but don't try to force the issue.
++		 */
++		if (pcs_ib_only || phy_ib_only)
++			phylink_warn(pl,
++				     "firmware wants %s mode, but %s%s%s requires inband\n",
++				     phylink_an_mode_str(mode),
++				     pcs_ib_only ? "PCS" : "",
++				     pcs_ib_only && phy_ib_only ? " and " : "",
++				     phy_ib_only ? "PHY" : "");
++
++		neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++	} else if (type == INBAND_CISCO_SGMII || pl->phydev) {
++		/* For SGMII modes which are designed to be used with PHYs, or
++		 * Base-X with a PHY, we try to use in-band mode where-ever
++		 * possible. However, there are some PHYs e.g. BCM84881 which
++		 * do not support in-band.
++		 */
++		const unsigned int inband_ok = LINK_INBAND_ENABLE |
++					       LINK_INBAND_BYPASS;
++		const unsigned int outband_ok = LINK_INBAND_DISABLE |
++						LINK_INBAND_BYPASS;
++		/* PCS	PHY
++		 * D E	D E
++		 * 0 0  0 0	no information			inband enabled
++		 * 1 0  0 0	pcs doesn't support		outband
++		 * 0 1  0 0	pcs required			inband enabled
++		 * 1 1  0 0	pcs optional			inband enabled
++		 * 0 0  1 0	phy doesn't support		outband
++		 * 1 0  1 0	pcs+phy doesn't support		outband
++		 * 0 1  1 0	pcs required, phy doesn't support, invalid
++		 * 1 1  1 0	pcs optional, phy doesn't support, outband
++		 * 0 0  0 1	phy required			inband enabled
++		 * 1 0  0 1	pcs doesn't support, phy required, invalid
++		 * 0 1  0 1	pcs+phy required		inband enabled
++		 * 1 1  0 1	pcs optional, phy required	inband enabled
++		 * 0 0  1 1	phy optional			inband enabled
++		 * 1 0  1 1	pcs doesn't support, phy optional, outband
++		 * 0 1  1 1	pcs required, phy optional	inband enabled
++		 * 1 1  1 1	pcs+phy optional		inband enabled
++		 */
++		if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
++		    (!phy_ib_caps || phy_ib_caps & inband_ok)) {
++			/* In-band supported or unknown at both ends. Enable
++			 * in-band mode with or without bypass at the PHY.
++			 */
++			if (phy_ib_caps & LINK_INBAND_ENABLE)
++				pl->phy_ib_mode = LINK_INBAND_ENABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		} else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
++			   (!phy_ib_caps || phy_ib_caps & outband_ok)) {
++			/* Either in-band not supported at at least one end.
++			 * In-band bypass at the other end is possible.
++			 */
++			if (phy_ib_caps & LINK_INBAND_DISABLE)
++				pl->phy_ib_mode = LINK_INBAND_DISABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++
+ 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++			if (pl->phydev)
++				mode = MLO_AN_PHY;
++		} else {
++			/* invalid */
++			phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
++				     phy_modes(interface));
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		}
++	} else {
++		/* For Base-X without a PHY */
++		if (pcs_ib_caps == LINK_INBAND_DISABLE)
++			/* If the PCS doesn't support inband, then inband must
++			 * be disabled.
++			 */
++			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
++		else if (pcs_ib_caps == LINK_INBAND_ENABLE)
++			/* If the PCS requires inband, then inband must always
++			 * be enabled.
++			 */
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+ 		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+ 					   advertising))
+ 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+ 		else
+ 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
+-		break;
+-
+-	default:
+-		neg_mode = PHYLINK_PCS_NEG_NONE;
+-		break;
+ 	}
+ 
+-	return neg_mode;
++	pl->pcs_neg_mode = neg_mode;
++	pl->act_link_an_mode = mode;
+ }
+ 
+ static void phylink_major_config(struct phylink *pl, bool restart,
+@@ -1225,11 +1402,9 @@ static void phylink_major_config(struct
+ 	unsigned int neg_mode;
+ 	int err;
+ 
+-	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
+-
+-	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
+-						state->interface,
+-						state->advertising);
++	phylink_dbg(pl, "major config, requested %s/%s\n",
++		    phylink_an_mode_str(pl->req_link_an_mode),
++		    phy_modes(state->interface));
+ 
+ 	if (pl->using_mac_select_pcs) {
+ 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
+@@ -1243,10 +1418,17 @@ static void phylink_major_config(struct
+ 		pcs_changed = pcs && pl->pcs != pcs;
+ 	}
+ 
++	phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
++
++	phylink_dbg(pl, "major config, active %s/%s/%s\n",
++		    phylink_an_mode_str(pl->act_link_an_mode),
++		    phylink_pcs_mode_str(pl->pcs_neg_mode),
++		    phy_modes(state->interface));
++
+ 	phylink_pcs_poll_stop(pl);
+ 
+ 	if (pl->mac_ops->mac_prepare) {
+-		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
++		err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
+ 					       state->interface);
+ 		if (err < 0) {
+ 			phylink_err(pl, "mac_prepare failed: %pe\n",
+@@ -1280,7 +1462,7 @@ static void phylink_major_config(struct
+ 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
+ 		phylink_pcs_enable(pl->pcs);
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs && pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+@@ -1296,13 +1478,20 @@ static void phylink_major_config(struct
+ 		phylink_pcs_an_restart(pl);
+ 
+ 	if (pl->mac_ops->mac_finish) {
+-		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
++		err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
+ 					      state->interface);
+ 		if (err < 0)
+ 			phylink_err(pl, "mac_finish failed: %pe\n",
+ 				    ERR_PTR(err));
+ 	}
+ 
++	if (pl->phydev && pl->phy_ib_mode) {
++		err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
++		if (err < 0)
++			phylink_err(pl, "phy_config_inband: %pe\n",
++				    ERR_PTR(err));
++	}
++
+ 	if (pl->sfp_bus) {
+ 		rate_kbd = phylink_interface_signal_rate(state->interface);
+ 		if (rate_kbd)
+@@ -1327,17 +1516,16 @@ static int phylink_change_inband_advert(
+ 		return 0;
+ 
+ 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
+-		    phylink_an_mode_str(pl->cur_link_an_mode),
++		    phylink_an_mode_str(pl->req_link_an_mode),
+ 		    phy_modes(pl->link_config.interface),
+ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
+ 		    pl->link_config.pause);
+ 
+ 	/* Recompute the PCS neg mode */
+-	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
+-					pl->link_config.interface,
+-					pl->link_config.advertising);
++	phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
++			     pl->link_config.advertising);
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+@@ -1402,7 +1590,7 @@ static void phylink_mac_initial_config(s
+ {
+ 	struct phylink_link_state link_state;
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->req_link_an_mode) {
+ 	case MLO_AN_PHY:
+ 		link_state = pl->phy_state;
+ 		break;
+@@ -1476,14 +1664,14 @@ static void phylink_link_up(struct phyli
+ 
+ 	pl->cur_interface = link_state.interface;
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs && pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+ 	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
+ 			    duplex);
+ 
+-	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
++	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
+ 				 pl->cur_interface, speed, duplex,
+ 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
+ 
+@@ -1503,7 +1691,7 @@ static void phylink_link_down(struct phy
+ 
+ 	if (ndev)
+ 		netif_carrier_off(ndev);
+-	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
++	pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
+ 				   pl->cur_interface);
+ 	phylink_info(pl, "Link is Down\n");
+ }
+@@ -1530,7 +1718,7 @@ static void phylink_resolve(struct work_
+ 		link_state.link = false;
+ 		retrigger = true;
+ 	} else {
+-		switch (pl->cur_link_an_mode) {
++		switch (pl->act_link_an_mode) {
+ 		case MLO_AN_PHY:
+ 			link_state = pl->phy_state;
+ 			phylink_apply_manual_flow(pl, &link_state);
+@@ -1773,7 +1961,7 @@ struct phylink *phylink_create(struct ph
+ 		}
+ 	}
+ 
+-	pl->cur_link_an_mode = pl->cfg_link_an_mode;
++	pl->req_link_an_mode = pl->cfg_link_an_mode;
+ 
+ 	ret = phylink_register_sfp(pl, fwnode);
+ 	if (ret < 0) {
+@@ -2236,7 +2424,7 @@ void phylink_start(struct phylink *pl)
+ 	ASSERT_RTNL();
+ 
+ 	phylink_info(pl, "configuring for %s/%s link mode\n",
+-		     phylink_an_mode_str(pl->cur_link_an_mode),
++		     phylink_an_mode_str(pl->req_link_an_mode),
+ 		     phy_modes(pl->link_config.interface));
+ 
+ 	/* Always set the carrier off */
+@@ -2495,7 +2683,7 @@ int phylink_ethtool_ksettings_get(struct
+ 
+ 	linkmode_copy(kset->link_modes.supported, pl->supported);
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		/* We are using fixed settings. Report these as the
+ 		 * current link settings - and note that these also
+@@ -2526,6 +2714,26 @@ int phylink_ethtool_ksettings_get(struct
+ }
+ EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
+ 
++static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
++					        phy_interface_t interface,
++						unsigned long *adv)
++{
++	unsigned int inband = phylink_inband_caps(pl, interface);
++	unsigned int mask;
++
++	/* If the PCS doesn't implement inband support, be permissive. */
++	if (!inband)
++		return true;
++
++	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
++		mask = LINK_INBAND_ENABLE;
++	else
++		mask = LINK_INBAND_DISABLE;
++
++	/* Check whether the PCS implements the required mode */
++	return !!(inband & mask);
++}
++
+ /**
+  * phylink_ethtool_ksettings_set() - set the link settings
+  * @pl: a pointer to a &struct phylink returned from phylink_create()
+@@ -2587,7 +2795,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		/* If we have a fixed link, refuse to change link parameters.
+ 		 * If the link parameters match, accept them but do nothing.
+ 		 */
+-		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
++		if (pl->req_link_an_mode == MLO_AN_FIXED) {
+ 			if (s->speed != pl->link_config.speed ||
+ 			    s->duplex != pl->link_config.duplex)
+ 				return -EINVAL;
+@@ -2603,7 +2811,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		 * is our default case) but do not allow the advertisement to
+ 		 * be changed. If the advertisement matches, simply return.
+ 		 */
+-		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
++		if (pl->req_link_an_mode == MLO_AN_FIXED) {
+ 			if (!linkmode_equal(config.advertising,
+ 					    pl->link_config.advertising))
+ 				return -EINVAL;
+@@ -2643,7 +2851,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		linkmode_copy(support, pl->supported);
+ 		if (phylink_validate(pl, support, &config)) {
+ 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
+-				    phylink_an_mode_str(pl->cur_link_an_mode),
++				    phylink_an_mode_str(pl->req_link_an_mode),
+ 				    phy_modes(config.interface),
+ 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
+ 			return -EINVAL;
+@@ -2661,6 +2869,13 @@ int phylink_ethtool_ksettings_set(struct
+ 	    phylink_is_empty_linkmode(config.advertising))
+ 		return -EINVAL;
+ 
++	/* Validate the autonegotiation state. We don't have a PHY in this
++	 * situation, so the PCS is the media-facing entity.
++	 */
++	if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
++						 config.advertising))
++		return -EINVAL;
++
+ 	mutex_lock(&pl->state_mutex);
+ 	pl->link_config.speed = config.speed;
+ 	pl->link_config.duplex = config.duplex;
+@@ -2743,7 +2958,7 @@ int phylink_ethtool_set_pauseparam(struc
+ 
+ 	ASSERT_RTNL();
+ 
+-	if (pl->cur_link_an_mode == MLO_AN_FIXED)
++	if (pl->req_link_an_mode == MLO_AN_FIXED)
+ 		return -EOPNOTSUPP;
+ 
+ 	if (!phylink_test(pl->supported, Pause) &&
+@@ -3007,7 +3222,7 @@ static int phylink_mii_read(struct phyli
+ 	struct phylink_link_state state;
+ 	int val = 0xffff;
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		if (phy_id == 0) {
+ 			phylink_get_fixed_state(pl, &state);
+@@ -3032,7 +3247,7 @@ static int phylink_mii_read(struct phyli
+ static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
+ 			     unsigned int reg, unsigned int val)
+ {
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		break;
+ 
+@@ -3202,10 +3417,11 @@ static phy_interface_t phylink_choose_sf
+ 	return interface;
+ }
+ 
+-static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
++static void phylink_sfp_set_config(struct phylink *pl,
+ 				   unsigned long *supported,
+ 				   struct phylink_link_state *state)
+ {
++	u8 mode = MLO_AN_INBAND;
+ 	bool changed = false;
+ 
+ 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
+@@ -3222,9 +3438,9 @@ static void phylink_sfp_set_config(struc
+ 		changed = true;
+ 	}
+ 
+-	if (pl->cur_link_an_mode != mode ||
++	if (pl->req_link_an_mode != mode ||
+ 	    pl->link_config.interface != state->interface) {
+-		pl->cur_link_an_mode = mode;
++		pl->req_link_an_mode = mode;
+ 		pl->link_config.interface = state->interface;
+ 
+ 		changed = true;
+@@ -3239,8 +3455,7 @@ static void phylink_sfp_set_config(struc
+ 		phylink_mac_initial_config(pl, false);
+ }
+ 
+-static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
+-				  struct phy_device *phy)
++static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
+ {
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
+@@ -3279,8 +3494,7 @@ static int phylink_sfp_config_phy(struct
+ 	ret = phylink_validate(pl, support1, &config);
+ 	if (ret) {
+ 		phylink_err(pl,
+-			    "validation of %s/%s with support %*pb failed: %pe\n",
+-			    phylink_an_mode_str(mode),
++			    "validation of %s with support %*pb failed: %pe\n",
+ 			    phy_modes(config.interface),
+ 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
+ 			    ERR_PTR(ret));
+@@ -3289,7 +3503,7 @@ static int phylink_sfp_config_phy(struct
+ 
+ 	pl->link_port = pl->sfp_port;
+ 
+-	phylink_sfp_set_config(pl, mode, support, &config);
++	phylink_sfp_set_config(pl, support, &config);
+ 
+ 	return 0;
+ }
+@@ -3345,6 +3559,12 @@ static int phylink_sfp_config_optical(st
+ 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
+ 		    phy_modes(interface));
+ 
++	if (!phylink_validate_pcs_inband_autoneg(pl, interface,
++						 config.advertising)) {
++		phylink_err(pl, "autoneg setting not compatible with PCS");
++		return -EINVAL;
++	}
++
+ 	config.interface = interface;
+ 
+ 	/* Ignore errors if we're expecting a PHY to attach later */
+@@ -3358,7 +3578,7 @@ static int phylink_sfp_config_optical(st
+ 
+ 	pl->link_port = pl->sfp_port;
+ 
+-	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
++	phylink_sfp_set_config(pl, pl->sfp_support, &config);
+ 
+ 	return 0;
+ }
+@@ -3429,20 +3649,10 @@ static void phylink_sfp_link_up(void *up
+ 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
+ }
+ 
+-/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
+- * or 802.3z control word, so inband will not work.
+- */
+-static bool phylink_phy_no_inband(struct phy_device *phy)
+-{
+-	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
+-					     0xae025150, 0xfffffff0);
+-}
+-
+ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
+ {
+ 	struct phylink *pl = upstream;
+ 	phy_interface_t interface;
+-	u8 mode;
+ 	int ret;
+ 
+ 	/*
+@@ -3454,17 +3664,12 @@ static int phylink_sfp_connect_phy(void
+ 	 */
+ 	phy_support_asym_pause(phy);
+ 
+-	if (phylink_phy_no_inband(phy))
+-		mode = MLO_AN_PHY;
+-	else
+-		mode = MLO_AN_INBAND;
+-
+ 	/* Set the PHY's host supported interfaces */
+ 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
+ 			  pl->config->supported_interfaces);
+ 
+ 	/* Do the initial configuration */
+-	ret = phylink_sfp_config_phy(pl, mode, phy);
++	ret = phylink_sfp_config_phy(pl, phy);
+ 	if (ret < 0)
+ 		return ret;
+ 
+--- a/drivers/net/phy/phy.c
++++ b/drivers/net/phy/phy.c
+@@ -973,6 +973,58 @@ static int phy_check_link_status(struct
+ }
+ 
+ /**
++ * phy_inband_caps - query which in-band signalling modes are supported
++ * @phydev: a pointer to a &struct phy_device
++ * @interface: the interface mode for the PHY
++ *
++ * Returns zero if it is unknown what in-band signalling is supported by the
++ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
++ * returns a bit mask of the LINK_INBAND_* values from
++ * &enum link_inband_signalling to describe which inband modes are supported
++ * by the PHY for this interface mode.
++ */
++unsigned int phy_inband_caps(struct phy_device *phydev,
++			     phy_interface_t interface)
++{
++	if (phydev->drv && phydev->drv->inband_caps)
++		return phydev->drv->inband_caps(phydev, interface);
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(phy_inband_caps);
++
++/**
++ * phy_config_inband - configure the desired PHY in-band mode
++ * @phydev: the phy_device struct
++ * @modes: in-band modes to configure
++ *
++ * Description: disables, enables or enables-with-bypass in-band signalling
++ *   between the PHY and host system.
++ *
++ * Returns: zero on success, or negative errno value.
++ */
++int phy_config_inband(struct phy_device *phydev, unsigned int modes)
++{
++	int err;
++
++	if (!!(modes & LINK_INBAND_DISABLE) +
++	    !!(modes & LINK_INBAND_ENABLE) +
++	    !!(modes & LINK_INBAND_BYPASS) != 1)
++		return -EINVAL;
++
++	mutex_lock(&phydev->lock);
++	if (!phydev->drv)
++		err = -EIO;
++	else if (!phydev->drv->config_inband)
++		err = -EOPNOTSUPP;
++	else
++		err = phydev->drv->config_inband(phydev, modes);
++	mutex_unlock(&phydev->lock);
++
++	return err;
++}
++
++/**
+  * _phy_start_aneg - start auto-negotiation for this PHY device
+  * @phydev: the phy_device struct
+  *
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -800,6 +800,24 @@ struct phy_tdr_config {
+ #define PHY_PAIR_ALL -1
+ 
+ /**
++ * enum link_inband_signalling - in-band signalling modes that are supported
++ *
++ * @LINK_INBAND_DISABLE: in-band signalling can be disabled
++ * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
++ * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
++ *
++ * The possible and required bits can only be used if the valid bit is set.
++ * If possible is clear, that means inband signalling can not be used.
++ * Required is only valid when possible is set, and means that inband
++ * signalling must be used.
++ */
++enum link_inband_signalling {
++	LINK_INBAND_DISABLE		= BIT(0),
++	LINK_INBAND_ENABLE		= BIT(1),
++	LINK_INBAND_BYPASS		= BIT(2),
++};
++
++/**
+  * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
+  * Avoidance) Reconciliation Sublayer.
+  *
+@@ -939,6 +957,19 @@ struct phy_driver {
+ 	int (*get_features)(struct phy_device *phydev);
+ 
+ 	/**
++	 * @inband_caps: query whether in-band is supported for the given PHY
++	 * interface mode. Returns a bitmask of bits defined by enum
++	 * link_inband_signalling.
++	 */
++	unsigned int (*inband_caps)(struct phy_device *phydev,
++				    phy_interface_t interface);
++
++	/**
++	 * @config_inband: configure in-band mode for the PHY
++	 */
++	int (*config_inband)(struct phy_device *phydev, unsigned int modes);
++
++	/**
+ 	 * @get_rate_matching: Get the supported type of rate matching for a
+ 	 * particular phy interface. This is used by phy consumers to determine
+ 	 * whether to advertise lower-speed modes for that interface. It is
+@@ -1774,6 +1805,9 @@ void phy_stop(struct phy_device *phydev)
+ int phy_config_aneg(struct phy_device *phydev);
+ int phy_start_aneg(struct phy_device *phydev);
+ int phy_aneg_done(struct phy_device *phydev);
++unsigned int phy_inband_caps(struct phy_device *phydev,
++			     phy_interface_t interface);
++int phy_config_inband(struct phy_device *phydev, unsigned int modes);
+ int phy_speed_down(struct phy_device *phydev, bool sync);
+ int phy_speed_up(struct phy_device *phydev);
+ bool phy_check_valid(int speed, int duplex, unsigned long *features);
+--- a/drivers/net/phy/bcm84881.c
++++ b/drivers/net/phy/bcm84881.c
+@@ -223,11 +223,21 @@ static int bcm84881_read_status(struct p
+ 	return genphy_c45_read_mdix(phydev);
+ }
+ 
++/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
++ * or 802.3z control word, so inband will not work.
++ */
++static unsigned int bcm84881_inband_caps(struct phy_device *phydev,
++					 phy_interface_t interface)
++{
++	return LINK_INBAND_DISABLE;
++}
++
+ static struct phy_driver bcm84881_drivers[] = {
+ 	{
+ 		.phy_id		= 0xae025150,
+ 		.phy_id_mask	= 0xfffffff0,
+ 		.name		= "Broadcom BCM84881",
++		.inband_caps	= bcm84881_inband_caps,
+ 		.config_init	= bcm84881_config_init,
+ 		.probe		= bcm84881_probe,
+ 		.get_features	= bcm84881_get_features,
+--- a/drivers/net/phy/marvell.c
++++ b/drivers/net/phy/marvell.c
+@@ -673,6 +673,48 @@ static int marvell_config_aneg_fiber(str
+ 	return genphy_check_and_restart_aneg(phydev, changed);
+ }
+ 
++static unsigned int m88e1111_inband_caps(struct phy_device *phydev,
++					 phy_interface_t interface)
++{
++	/* In 1000base-X and SGMII modes, the inband mode can be changed
++	 * through the Fibre page BMCR ANENABLE bit.
++	 */
++	if (interface == PHY_INTERFACE_MODE_1000BASEX ||
++	    interface == PHY_INTERFACE_MODE_SGMII)
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
++		       LINK_INBAND_BYPASS;
++
++	return 0;
++}
++
++static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)
++{
++	u16 extsr, bmcr;
++	int err;
++
++	if (phydev->interface != PHY_INTERFACE_MODE_1000BASEX &&
++	    phydev->interface != PHY_INTERFACE_MODE_SGMII)
++		return -EINVAL;
++
++	if (modes == LINK_INBAND_BYPASS)
++		extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;
++	else
++		extsr = 0;
++
++	if (modes == LINK_INBAND_DISABLE)
++		bmcr = 0;
++	else
++		bmcr = BMCR_ANENABLE;
++
++	err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
++			 MII_M1111_HWCFG_SERIAL_AN_BYPASS, extsr);
++	if (err < 0)
++		return extsr;
++
++	return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,
++				BMCR_ANENABLE, bmcr);
++}
++
+ static int m88e1111_config_aneg(struct phy_device *phydev)
+ {
+ 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
+@@ -3292,6 +3334,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1112",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1112_config_init,
+ 		.config_aneg = marvell_config_aneg,
+ 		.config_intr = marvell_config_intr,
+@@ -3312,6 +3356,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1111",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1111gbe_config_init,
+ 		.config_aneg = m88e1111_config_aneg,
+ 		.read_status = marvell_read_status,
+@@ -3333,6 +3379,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1111 (Finisar)",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1111gbe_config_init,
+ 		.config_aneg = m88e1111_config_aneg,
+ 		.read_status = marvell_read_status,
+--- a/include/linux/phylink.h
++++ b/include/linux/phylink.h
+@@ -432,6 +432,7 @@ struct phylink_pcs {
+ /**
+  * struct phylink_pcs_ops - MAC PCS operations structure.
+  * @pcs_validate: validate the link configuration.
++ * @pcs_inband_caps: query inband support for interface mode.
+  * @pcs_enable: enable the PCS.
+  * @pcs_disable: disable the PCS.
+  * @pcs_pre_config: pre-mac_config method (for errata)
+@@ -445,6 +446,8 @@ struct phylink_pcs {
+ struct phylink_pcs_ops {
+ 	int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported,
+ 			    const struct phylink_link_state *state);
++	unsigned int (*pcs_inband_caps)(struct phylink_pcs *pcs,
++					phy_interface_t interface);
+ 	int (*pcs_enable)(struct phylink_pcs *pcs);
+ 	void (*pcs_disable)(struct phylink_pcs *pcs);
+ 	void (*pcs_pre_config)(struct phylink_pcs *pcs,
+@@ -481,6 +484,20 @@ int pcs_validate(struct phylink_pcs *pcs
+ 		 const struct phylink_link_state *state);
+ 
+ /**
++ * pcs_inband_caps - query PCS in-band capabilities for interface mode.
++ * @pcs: a pointer to a &struct phylink_pcs.
++ * @interface: interface mode to be queried
++ *
++ * Returns zero if it is unknown what in-band signalling is supported by the
++ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
++ * returns a bit mask of the LINK_INBAND_* values from
++ * &enum link_inband_signalling to describe which inband modes are supported
++ * for this interface mode.
++ */
++unsigned int pcs_inband_caps(struct phylink_pcs *pcs,
++			     phy_interface_t interface);
++
++/**
+  * pcs_enable() - enable the PCS.
+  * @pcs: a pointer to a &struct phylink_pcs.
+  */
+--- a/drivers/net/ethernet/marvell/mvneta.c
++++ b/drivers/net/ethernet/marvell/mvneta.c
+@@ -3959,20 +3959,27 @@ static struct mvneta_port *mvneta_pcs_to
+ 	return container_of(pcs, struct mvneta_port, phylink_pcs);
+ }
+ 
+-static int mvneta_pcs_validate(struct phylink_pcs *pcs,
+-			       unsigned long *supported,
+-			       const struct phylink_link_state *state)
++static unsigned int mvneta_pcs_inband_caps(struct phylink_pcs *pcs,
++					   phy_interface_t interface)
+ {
+-	/* We only support QSGMII, SGMII, 802.3z and RGMII modes.
+-	 * When in 802.3z mode, we must have AN enabled:
++	/* When operating in an 802.3z mode, we must have AN enabled:
+ 	 * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
+ 	 * When <PortType> = 1 (1000BASE-X) this field must be set to 1."
++	 * Therefore, inband is "required".
+ 	 */
+-	if (phy_interface_mode_is_8023z(state->interface) &&
+-	    !phylink_test(state->advertising, Autoneg))
+-		return -EINVAL;
++	if (phy_interface_mode_is_8023z(interface))
++		return LINK_INBAND_ENABLE;
+ 
+-	return 0;
++	/* QSGMII, SGMII and RGMII can be configured to use inband
++	 * signalling of the AN result. Indicate these as "possible".
++	 */
++	if (interface == PHY_INTERFACE_MODE_SGMII ||
++	    interface == PHY_INTERFACE_MODE_QSGMII ||
++	    phy_interface_mode_is_rgmii(interface))
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	/* For any other modes, indicate that inband is not supported. */
++	return LINK_INBAND_DISABLE;
+ }
+ 
+ static void mvneta_pcs_get_state(struct phylink_pcs *pcs,
+@@ -4070,7 +4077,7 @@ static void mvneta_pcs_an_restart(struct
+ }
+ 
+ static const struct phylink_pcs_ops mvneta_phylink_pcs_ops = {
+-	.pcs_validate = mvneta_pcs_validate,
++	.pcs_inband_caps = mvneta_pcs_inband_caps,
+ 	.pcs_get_state = mvneta_pcs_get_state,
+ 	.pcs_config = mvneta_pcs_config,
+ 	.pcs_an_restart = mvneta_pcs_an_restart,
+--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+@@ -6214,19 +6214,26 @@ static const struct phylink_pcs_ops mvpp
+ 	.pcs_config = mvpp2_xlg_pcs_config,
+ };
+ 
+-static int mvpp2_gmac_pcs_validate(struct phylink_pcs *pcs,
+-				   unsigned long *supported,
+-				   const struct phylink_link_state *state)
++static unsigned int mvpp2_gmac_pcs_inband_caps(struct phylink_pcs *pcs,
++					       phy_interface_t interface)
+ {
+-	/* When in 802.3z mode, we must have AN enabled:
++	/* When operating in an 802.3z mode, we must have AN enabled:
+ 	 * Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
+ 	 * When <PortType> = 1 (1000BASE-X) this field must be set to 1.
++	 * Therefore, inband is "required".
+ 	 */
+-	if (phy_interface_mode_is_8023z(state->interface) &&
+-	    !phylink_test(state->advertising, Autoneg))
+-		return -EINVAL;
++	if (phy_interface_mode_is_8023z(interface))
++		return LINK_INBAND_ENABLE;
+ 
+-	return 0;
++	/* SGMII and RGMII can be configured to use inband signalling of the
++	 * AN result. Indicate these as "possible".
++	 */
++	if (interface == PHY_INTERFACE_MODE_SGMII ||
++	    phy_interface_mode_is_rgmii(interface))
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	/* For any other modes, indicate that inband is not supported. */
++	return LINK_INBAND_DISABLE;
+ }
+ 
+ static void mvpp2_gmac_pcs_get_state(struct phylink_pcs *pcs,
+@@ -6333,7 +6340,7 @@ static void mvpp2_gmac_pcs_an_restart(st
+ }
+ 
+ static const struct phylink_pcs_ops mvpp2_phylink_gmac_pcs_ops = {
+-	.pcs_validate = mvpp2_gmac_pcs_validate,
++	.pcs_inband_caps = mvpp2_gmac_pcs_inband_caps,
+ 	.pcs_get_state = mvpp2_gmac_pcs_get_state,
+ 	.pcs_config = mvpp2_gmac_pcs_config,
+ 	.pcs_an_restart = mvpp2_gmac_pcs_an_restart,
+--- a/drivers/net/pcs/pcs-lynx.c
++++ b/drivers/net/pcs/pcs-lynx.c
+@@ -35,6 +35,27 @@ enum sgmii_speed {
+ #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
+ #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
+ 
++static unsigned int lynx_pcs_inband_caps(struct phylink_pcs *pcs,
++					 phy_interface_t interface)
++{
++	switch (interface) {
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	case PHY_INTERFACE_MODE_10GBASER:
++	case PHY_INTERFACE_MODE_2500BASEX:
++		return LINK_INBAND_DISABLE;
++
++	case PHY_INTERFACE_MODE_USXGMII:
++		return LINK_INBAND_ENABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,
+ 				       struct phylink_link_state *state)
+ {
+@@ -307,6 +328,7 @@ static void lynx_pcs_link_up(struct phyl
+ }
+ 
+ static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
++	.pcs_inband_caps = lynx_pcs_inband_caps,
+ 	.pcs_get_state = lynx_pcs_get_state,
+ 	.pcs_config = lynx_pcs_config,
+ 	.pcs_an_restart = lynx_pcs_an_restart,
+--- a/drivers/net/pcs/pcs-mtk-lynxi.c
++++ b/drivers/net/pcs/pcs-mtk-lynxi.c
+@@ -110,6 +110,21 @@ static struct mtk_pcs_lynxi *pcs_to_mtk_
+ 	return container_of(pcs, struct mtk_pcs_lynxi, pcs);
+ }
+ 
++static unsigned int mtk_pcs_lynxi_inband_caps(struct phylink_pcs *pcs,
++					      phy_interface_t interface)
++{
++	switch (interface) {
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_2500BASEX:
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs,
+ 				    struct phylink_link_state *state)
+ {
+@@ -302,6 +317,7 @@ static void mtk_pcs_lynxi_disable(struct
+ }
+ 
+ static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = {
++	.pcs_inband_caps = mtk_pcs_lynxi_inband_caps,
+ 	.pcs_get_state = mtk_pcs_lynxi_get_state,
+ 	.pcs_config = mtk_pcs_lynxi_config,
+ 	.pcs_an_restart = mtk_pcs_lynxi_restart_an,
+--- a/drivers/net/pcs/pcs-xpcs.c
++++ b/drivers/net/pcs/pcs-xpcs.c
+@@ -628,6 +628,33 @@ static int xpcs_validate(struct phylink_
+ 	return 0;
+ }
+ 
++static unsigned int xpcs_inband_caps(struct phylink_pcs *pcs,
++				     phy_interface_t interface)
++{
++	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);
++	const struct dw_xpcs_compat *compat;
++
++	compat = xpcs_find_compat(xpcs, interface);
++	if (!compat)
++		return 0;
++
++	switch (compat->an_mode) {
++	case DW_AN_C73:
++		return LINK_INBAND_ENABLE;
++
++	case DW_AN_C37_SGMII:
++	case DW_AN_C37_1000BASEX:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	case DW_10GBASER:
++	case DW_2500BASEX:
++		return LINK_INBAND_DISABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)
+ {
+ 	int i, j;
+@@ -1331,6 +1358,7 @@ static const struct xpcs_id xpcs_id_list
+ 
+ static const struct phylink_pcs_ops xpcs_phylink_ops = {
+ 	.pcs_validate = xpcs_validate,
++	.pcs_inband_caps = xpcs_inband_caps,
+ 	.pcs_config = xpcs_config,
+ 	.pcs_get_state = xpcs_get_state,
+ 	.pcs_an_restart = xpcs_an_restart,



From lede-commits at lists.infradead.org  Thu Jan 23 06:28:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 09:28:18 -0500
Subject: [openwrt/openwrt]  mediatek: add Airoha AN8855 gigabit switch driver
In-Reply-To: <173764249853.2753970.5470377062961591620@git-01.infra.openwrt.org>
References: <173764249853.2753970.5470377062961591620@git-01.infra.openwrt.org>
Message-ID: <mailman.45182.1737642509.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/8290303ea42e75fe54d744aa3b6a7d1d6f960f09

commit 8290303ea42e75fe54d744aa3b6a7d1d6f960f09
Author: Dim Fish <dimfish at gmail.com>
AuthorDate: Fri Oct 11 19:25:29 2024 +0300

    mediatek: add Airoha AN8855 gigabit switch driver
    
    New revisions of Xiaomi AX3000T with 1.0.84+ stock firmware contain new hardware.
    This commit add support for Airoha AN8855 gigabit switch driver with 6.6 kernel patches
    
    Based on https://patchwork.kernel.org/project/netdevbpf/cover/20241209134459.27110-1-ansuelsmth at gmail.com/
    
    Signed-off-by: Dim Fish <dimfish at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/16709
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit 0fd9d00cd6fc285b2a925eb03e6350a4b00fc279)
---
 .../dts/mt7981b-xiaomi-mi-router-common.dtsi       |  180 ++
 .../mediatek/files-6.6/drivers/mfd/airoha-an8855.c |  278 +++
 .../mediatek/files-6.6/drivers/net/dsa/an8855.c    | 2311 ++++++++++++++++++++
 .../mediatek/files-6.6/drivers/net/dsa/an8855.h    |  783 +++++++
 .../files-6.6/drivers/net/mdio/mdio-an8855.c       |  113 +
 .../files-6.6/drivers/net/phy/air_an8855.c         |  267 +++
 .../files-6.6/drivers/nvmem/an8855-efuse.c         |   63 +
 .../include/linux/mfd/airoha-an8855-mfd.h          |   41 +
 target/linux/mediatek/filogic/config-6.6           |    5 +
 target/linux/mediatek/mt7622/config-6.6            |    5 +
 target/linux/mediatek/mt7623/config-6.6            |    5 +
 target/linux/mediatek/mt7629/config-6.6            |    5 +
 .../737-net-dsa-add-Airoha-AN8855.patch            |  309 +++
 ...738-net-phylink-move-phylink_pcs_neg_mode.patch |  166 ++
 ...t-add-negotiation-of-in-band-capabilities.patch | 1233 +++++++++++
 15 files changed, 5764 insertions(+)

diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
index d6872395a9..c64b55cf6f 100644
--- a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
+++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-common.dtsi
@@ -83,6 +83,11 @@
 		interrupt-parent = <&pio>;
 		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 	};
+
+	mfd: mfd at 1 {
+		compatible = "airoha,an8855-mfd";
+		reg = <1>;
+	};
 };
 
 &switch {
@@ -124,6 +129,181 @@
 	};
 };
 
+&mfd {
+	efuse {
+		compatible = "airoha,an8855-efuse";
+		#nvmem-cell-cells = <0>;
+
+		nvmem-layout {
+			compatible = "fixed-layout";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			shift_sel_port0_tx_a: shift-sel-port0-tx-a at c {
+				reg = <0xc 0x4>;
+			};
+
+			shift_sel_port0_tx_b: shift-sel-port0-tx-b at 10 {
+				reg = <0x10 0x4>;
+			};
+
+			shift_sel_port0_tx_c: shift-sel-port0-tx-c at 14 {
+				reg = <0x14 0x4>;
+			};
+
+			shift_sel_port0_tx_d: shift-sel-port0-tx-d at 18 {
+				reg = <0x18 0x4>;
+			};
+
+			shift_sel_port1_tx_a: shift-sel-port1-tx-a at 1c {
+				reg = <0x1c 0x4>;
+			};
+
+			shift_sel_port1_tx_b: shift-sel-port1-tx-b at 20 {
+				reg = <0x20 0x4>;
+			};
+
+			shift_sel_port1_tx_c: shift-sel-port1-tx-c at 24 {
+				reg = <0x24 0x4>;
+			};
+
+			shift_sel_port1_tx_d: shift-sel-port1-tx-d at 28 {
+				reg = <0x28 0x4>;
+			};
+
+			shift_sel_port2_tx_a: shift-sel-port2-tx-a at 2c {
+				reg = <0x2c 0x4>;
+			};
+
+			shift_sel_port2_tx_b: shift-sel-port2-tx-b at 30 {
+				reg = <0x30 0x4>;
+			};
+
+			shift_sel_port2_tx_c: shift-sel-port2-tx-c at 34 {
+				reg = <0x34 0x4>;
+			};
+
+			shift_sel_port2_tx_d: shift-sel-port2-tx-d at 38 {
+				reg = <0x38 0x4>;
+			};
+
+			shift_sel_port3_tx_a: shift-sel-port3-tx-a at 4c {
+				reg = <0x4c 0x4>;
+			};
+
+			shift_sel_port3_tx_b: shift-sel-port3-tx-b at 50 {
+				reg = <0x50 0x4>;
+			};
+
+			shift_sel_port3_tx_c: shift-sel-port3-tx-c at 54 {
+				reg = <0x54 0x4>;
+			};
+
+			shift_sel_port3_tx_d: shift-sel-port3-tx-d at 58 {
+				reg = <0x58 0x4>;
+			};
+		};
+	};
+
+	ethernet-switch {
+		compatible = "airoha,an8855-switch";
+		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+		airoha,ext-surge;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port at 0 {
+				reg = <0>;
+				label = "wan";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy1>;
+			};
+
+			port at 1 {
+				reg = <1>;
+				label = "lan2";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy2>;
+			};
+
+			port at 2 {
+				reg = <2>;
+				label = "lan3";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy3>;
+			};
+
+			port at 3 {
+				reg = <3>;
+				label = "lan4";
+				phy-mode = "internal";
+				phy-handle = <&internal_phy4>;
+			};
+
+			port at 5 {
+				reg = <5>;
+				label = "cpu";
+				ethernet = <&gmac0>;
+				phy-mode = "2500base-x";
+
+				fixed-link {
+					speed = <2500>;
+					full-duplex;
+					pause;
+				};
+			};
+		};
+	};
+
+	mdio {
+		compatible = "airoha,an8855-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		internal_phy1: phy at 1 {
+			reg = <1>;
+
+			nvmem-cells = <&shift_sel_port0_tx_a>,
+					<&shift_sel_port0_tx_b>,
+					<&shift_sel_port0_tx_c>,
+					<&shift_sel_port0_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy2: phy at 2 {
+			reg = <2>;
+
+			nvmem-cells = <&shift_sel_port1_tx_a>,
+					<&shift_sel_port1_tx_b>,
+					<&shift_sel_port1_tx_c>,
+					<&shift_sel_port1_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy3: phy at 3 {
+			reg = <3>;
+
+			nvmem-cells = <&shift_sel_port2_tx_a>,
+					<&shift_sel_port2_tx_b>,
+					<&shift_sel_port2_tx_c>,
+					<&shift_sel_port2_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+
+		internal_phy4: phy at 4 {
+			reg = <4>;
+
+			nvmem-cells = <&shift_sel_port3_tx_a>,
+					<&shift_sel_port3_tx_b>,
+					<&shift_sel_port3_tx_c>,
+					<&shift_sel_port3_tx_d>;
+			nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
+		};
+	};
+};
+
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
diff --git a/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c b/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c
new file mode 100644
index 0000000000..eeaea348aa
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c
@@ -0,0 +1,278 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MFD driver for Airoha AN8855 Switch
+ */
+
+#include <linux/mfd/airoha-an8855-mfd.h>
+#include <linux/mfd/core.h>
+#include <linux/mdio.h>
+#include <linux/module.h>
+#include <linux/phy.h>
+#include <linux/regmap.h>
+
+static const struct mfd_cell an8855_mfd_devs[] = {
+	{
+		.name = "an8855-efuse",
+		.of_compatible = "airoha,an8855-efuse",
+	}, {
+		.name = "an8855-switch",
+		.of_compatible = "airoha,an8855-switch",
+	}, {
+		.name = "an8855-mdio",
+		.of_compatible = "airoha,an8855-mdio",
+	}
+};
+
+int an8855_mii_set_page(struct an8855_mfd_priv *priv, u8 phy_id,
+			u8 page) __must_hold(&priv->bus->mdio_lock)
+{
+	struct mii_bus *bus = priv->bus;
+	int ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PHY_SELECT_PAGE, page);
+	if (ret < 0)
+		dev_err_ratelimited(&bus->dev,
+				    "failed to set an8855 mii page\n");
+
+	/* Cache current page if next mii read/write is for switch */
+	priv->current_page = page;
+	return ret < 0 ? ret : 0;
+}
+EXPORT_SYMBOL_GPL(an8855_mii_set_page);
+
+static int an8855_mii_read32(struct mii_bus *bus, u8 phy_id, u32 reg,
+			     u32 *val) __must_hold(&bus->mdio_lock)
+{
+	int lo, hi, ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_MODE,
+			      AN8855_PBUS_MODE_ADDR_FIXED);
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_RD_ADDR_HIGH,
+			      upper_16_bits(reg));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_RD_ADDR_LOW,
+			      lower_16_bits(reg));
+	if (ret < 0)
+		goto err;
+
+	hi = __mdiobus_read(bus, phy_id, AN8855_PBUS_RD_DATA_HIGH);
+	if (hi < 0) {
+		ret = hi;
+		goto err;
+	}
+	lo = __mdiobus_read(bus, phy_id, AN8855_PBUS_RD_DATA_LOW);
+	if (lo < 0) {
+		ret = lo;
+		goto err;
+	}
+
+	*val = ((u16)hi << 16) | ((u16)lo & 0xffff);
+
+	return 0;
+err:
+	dev_err_ratelimited(&bus->dev,
+			    "failed to read an8855 register\n");
+	return ret;
+}
+
+static int an8855_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_read32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static int an8855_mii_write32(struct mii_bus *bus, u8 phy_id, u32 reg,
+			      u32 val) __must_hold(&bus->mdio_lock)
+{
+	int ret;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_MODE,
+			      AN8855_PBUS_MODE_ADDR_FIXED);
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_ADDR_HIGH,
+			      upper_16_bits(reg));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_ADDR_LOW,
+			      lower_16_bits(reg));
+	if (ret < 0)
+		goto err;
+
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_DATA_HIGH,
+			      upper_16_bits(val));
+	if (ret < 0)
+		goto err;
+	ret = __mdiobus_write(bus, phy_id, AN8855_PBUS_WR_DATA_LOW,
+			      lower_16_bits(val));
+	if (ret < 0)
+		goto err;
+
+	return 0;
+err:
+	dev_err_ratelimited(&bus->dev,
+			    "failed to write an8855 register\n");
+	return ret;
+}
+
+static int
+an8855_regmap_write(void *ctx, uint32_t reg, uint32_t val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_write32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static int an8855_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask,
+				     uint32_t write_val)
+{
+	struct an8855_mfd_priv *priv = ctx;
+	struct mii_bus *bus = priv->bus;
+	u16 addr = priv->switch_addr;
+	u32 val;
+	int ret;
+
+	mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+	ret = an8855_mii_set_page(priv, addr, AN8855_PHY_PAGE_EXTENDED_4);
+	if (ret < 0)
+		goto exit;
+
+	ret = an8855_mii_read32(bus, addr, reg, &val);
+	if (ret < 0)
+		goto exit;
+
+	val &= ~mask;
+	val |= write_val;
+	ret = an8855_mii_write32(bus, addr, reg, val);
+
+exit:
+	mutex_unlock(&bus->mdio_lock);
+
+	return ret < 0 ? ret : 0;
+}
+
+static const struct regmap_range an8855_readable_ranges[] = {
+	regmap_reg_range(0x10000000, 0x10000fff), /* SCU */
+	regmap_reg_range(0x10001000, 0x10001fff), /* RBUS */
+	regmap_reg_range(0x10002000, 0x10002fff), /* MCU */
+	regmap_reg_range(0x10005000, 0x10005fff), /* SYS SCU */
+	regmap_reg_range(0x10007000, 0x10007fff), /* I2C Slave */
+	regmap_reg_range(0x10008000, 0x10008fff), /* I2C Master */
+	regmap_reg_range(0x10009000, 0x10009fff), /* PDMA */
+	regmap_reg_range(0x1000a100, 0x1000a2ff), /* General Purpose Timer */
+	regmap_reg_range(0x1000a200, 0x1000a2ff), /* GPU timer */
+	regmap_reg_range(0x1000a300, 0x1000a3ff), /* GPIO */
+	regmap_reg_range(0x1000a400, 0x1000a5ff), /* EFUSE */
+	regmap_reg_range(0x1000c000, 0x1000cfff), /* GDMP CSR */
+	regmap_reg_range(0x10010000, 0x1001ffff), /* GDMP SRAM */
+	regmap_reg_range(0x10200000, 0x10203fff), /* Switch - ARL Global */
+	regmap_reg_range(0x10204000, 0x10207fff), /* Switch - BMU */
+	regmap_reg_range(0x10208000, 0x1020bfff), /* Switch - ARL Port */
+	regmap_reg_range(0x1020c000, 0x1020cfff), /* Switch - SCH */
+	regmap_reg_range(0x10210000, 0x10213fff), /* Switch - MAC */
+	regmap_reg_range(0x10214000, 0x10217fff), /* Switch - MIB */
+	regmap_reg_range(0x10218000, 0x1021bfff), /* Switch - Port Control */
+	regmap_reg_range(0x1021c000, 0x1021ffff), /* Switch - TOP */
+	regmap_reg_range(0x10220000, 0x1022ffff), /* SerDes */
+	regmap_reg_range(0x10286000, 0x10286fff), /* RG Batcher */
+	regmap_reg_range(0x1028c000, 0x1028ffff), /* ETHER_SYS */
+	regmap_reg_range(0x30000000, 0x37ffffff), /* I2C EEPROM */
+	regmap_reg_range(0x38000000, 0x3fffffff), /* BOOT_ROM */
+	regmap_reg_range(0xa0000000, 0xbfffffff), /* GPHY */
+};
+
+static const struct regmap_access_table an8855_readable_table = {
+	.yes_ranges = an8855_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(an8855_readable_ranges),
+};
+
+static const struct regmap_config an8855_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+	.max_register = 0xbfffffff,
+	.reg_read = an8855_regmap_read,
+	.reg_write = an8855_regmap_write,
+	.reg_update_bits = an8855_regmap_update_bits,
+	.disable_locking = true,
+	.rd_table = &an8855_readable_table,
+};
+
+static int an8855_mfd_probe(struct mdio_device *mdiodev)
+{
+	struct an8855_mfd_priv *priv;
+	struct regmap *regmap;
+
+	priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->bus = mdiodev->bus;
+	priv->dev = &mdiodev->dev;
+	priv->switch_addr = mdiodev->addr;
+	/* no DMA for mdiobus, mute warning for DMA mask not set */
+	priv->dev->dma_mask = &priv->dev->coherent_dma_mask;
+
+	regmap = devm_regmap_init(priv->dev, NULL, priv,
+				  &an8855_regmap_config);
+	if (IS_ERR(regmap))
+		dev_err_probe(priv->dev, PTR_ERR(priv->dev),
+			      "regmap initialization failed\n");
+
+	dev_set_drvdata(&mdiodev->dev, priv);
+
+	return devm_mfd_add_devices(priv->dev, PLATFORM_DEVID_AUTO, an8855_mfd_devs,
+				    ARRAY_SIZE(an8855_mfd_devs), NULL, 0,
+				    NULL);
+}
+
+static const struct of_device_id an8855_mfd_of_match[] = {
+	{ .compatible = "airoha,an8855-mfd" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_mfd_of_match);
+
+static struct mdio_driver an8855_mfd_driver = {
+	.probe = an8855_mfd_probe,
+	.mdiodrv.driver = {
+		.name = "an8855",
+		.of_match_table = an8855_mfd_of_match,
+	},
+};
+mdio_module_driver(an8855_mfd_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for Airoha AN8855 MFD");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c
new file mode 100644
index 0000000000..7dd62e1a86
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.c
@@ -0,0 +1,2311 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Airoha AN8855 DSA Switch driver
+ * Copyright (C) 2023 Min Yao <min.yao at airoha.com>
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+#include <linux/bitfield.h>
+#include <linux/ethtool.h>
+#include <linux/etherdevice.h>
+#include <linux/gpio/consumer.h>
+#include <linux/if_bridge.h>
+#include <linux/iopoll.h>
+#include <linux/netdevice.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include <linux/phylink.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <net/dsa.h>
+
+#include "an8855.h"
+
+static const struct an8855_mib_desc an8855_mib[] = {
+	MIB_DESC(1, AN8855_PORT_MIB_TX_DROP, "TxDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_CRC_ERR, "TxCrcErr"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_COLLISION, "TxCollision"),
+	MIB_DESC(1, AN8855_PORT_MIB_TX_OVERSIZE_DROP, "TxOversizeDrop"),
+	MIB_DESC(2, AN8855_PORT_MIB_TX_BAD_PKT_BYTES, "TxBadPktBytes"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_DROP, "RxDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_FILTERING, "RxFiltering"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_CRC_ERR, "RxCrcErr"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_CTRL_DROP, "RxCtrlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_INGRESS_DROP, "RxIngressDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RX_ARL_DROP, "RxArlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_FLOW_CONTROL_DROP, "FlowControlDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_WRED_DROP, "WredDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_MIRROR_DROP, "MirrorDrop"),
+	MIB_DESC(2, AN8855_PORT_MIB_RX_BAD_PKT_BYTES, "RxBadPktBytes"),
+	MIB_DESC(1, AN8855_PORT_MIB_RXS_FLOW_SAMPLING_PKT_DROP, "RxsFlowSamplingPktDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_RXS_FLOW_TOTAL_PKT_DROP, "RxsFlowTotalPktDrop"),
+	MIB_DESC(1, AN8855_PORT_MIB_PORT_CONTROL_DROP, "PortControlDrop"),
+};
+
+static int
+an8855_mib_init(struct an8855_priv *priv)
+{
+	int ret;
+
+	ret = regmap_write(priv->regmap, AN8855_MIB_CCR,
+			   AN8855_CCR_MIB_ENABLE);
+	if (ret)
+		return ret;
+
+	return regmap_write(priv->regmap, AN8855_MIB_CCR,
+			    AN8855_CCR_MIB_ACTIVATE);
+}
+
+static void an8855_fdb_write(struct an8855_priv *priv, u16 vid,
+			     u8 port_mask, const u8 *mac,
+			     bool add) __must_hold(&priv->reg_mutex)
+{
+	u32 mac_reg[2] = { };
+	u32 reg;
+
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC0, mac[0]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC1, mac[1]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC2, mac[2]);
+	mac_reg[0] |= FIELD_PREP(AN8855_ATA1_MAC3, mac[3]);
+	mac_reg[1] |= FIELD_PREP(AN8855_ATA2_MAC4, mac[4]);
+	mac_reg[1] |= FIELD_PREP(AN8855_ATA2_MAC5, mac[5]);
+
+	regmap_bulk_write(priv->regmap, AN8855_ATA1, mac_reg,
+			  ARRAY_SIZE(mac_reg));
+
+	reg = AN8855_ATWD_IVL;
+	if (add)
+		reg |= AN8855_ATWD_VLD;
+	reg |= FIELD_PREP(AN8855_ATWD_VID, vid);
+	reg |= FIELD_PREP(AN8855_ATWD_FID, AN8855_FID_BRIDGED);
+	regmap_write(priv->regmap, AN8855_ATWD, reg);
+	regmap_write(priv->regmap, AN8855_ATWD2,
+		     FIELD_PREP(AN8855_ATWD2_PORT, port_mask));
+}
+
+static void an8855_fdb_read(struct an8855_priv *priv, struct an8855_fdb *fdb)
+{
+	u32 reg[4];
+
+	regmap_bulk_read(priv->regmap, AN8855_ATRD0, reg,
+			 ARRAY_SIZE(reg));
+
+	fdb->live = FIELD_GET(AN8855_ATRD0_LIVE, reg[0]);
+	fdb->type = FIELD_GET(AN8855_ATRD0_TYPE, reg[0]);
+	fdb->ivl = FIELD_GET(AN8855_ATRD0_IVL, reg[0]);
+	fdb->vid = FIELD_GET(AN8855_ATRD0_VID, reg[0]);
+	fdb->fid = FIELD_GET(AN8855_ATRD0_FID, reg[0]);
+	fdb->aging = FIELD_GET(AN8855_ATRD1_AGING, reg[1]);
+	fdb->port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, reg[3]);
+	fdb->mac[0] = FIELD_GET(AN8855_ATRD2_MAC0, reg[2]);
+	fdb->mac[1] = FIELD_GET(AN8855_ATRD2_MAC1, reg[2]);
+	fdb->mac[2] = FIELD_GET(AN8855_ATRD2_MAC2, reg[2]);
+	fdb->mac[3] = FIELD_GET(AN8855_ATRD2_MAC3, reg[2]);
+	fdb->mac[4] = FIELD_GET(AN8855_ATRD1_MAC4, reg[1]);
+	fdb->mac[5] = FIELD_GET(AN8855_ATRD1_MAC5, reg[1]);
+	fdb->noarp = !!FIELD_GET(AN8855_ATRD0_ARP, reg[0]);
+}
+
+static int an8855_fdb_cmd(struct an8855_priv *priv, u32 cmd,
+			  u32 *rsp) __must_hold(&priv->reg_mutex)
+{
+	u32 val;
+	int ret;
+
+	/* Set the command operating upon the MAC address entries */
+	val = AN8855_ATC_BUSY | cmd;
+	ret = regmap_write(priv->regmap, AN8855_ATC, val);
+	if (ret)
+		return ret;
+
+	ret = regmap_read_poll_timeout(priv->regmap, AN8855_ATC, val,
+				       !(val & AN8855_ATC_BUSY), 20, 200000);
+	if (ret)
+		return ret;
+
+	if (rsp)
+		*rsp = val;
+
+	return 0;
+}
+
+static void
+an8855_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
+{
+	struct dsa_port *dp = dsa_to_port(ds, port);
+	struct an8855_priv *priv = ds->priv;
+	bool learning = false;
+	u32 stp_state;
+
+	switch (state) {
+	case BR_STATE_DISABLED:
+		stp_state = AN8855_STP_DISABLED;
+		break;
+	case BR_STATE_BLOCKING:
+		stp_state = AN8855_STP_BLOCKING;
+		break;
+	case BR_STATE_LISTENING:
+		stp_state = AN8855_STP_LISTENING;
+		break;
+	case BR_STATE_LEARNING:
+		stp_state = AN8855_STP_LEARNING;
+		learning = dp->learning;
+		break;
+	case BR_STATE_FORWARDING:
+		learning = dp->learning;
+		fallthrough;
+	default:
+		stp_state = AN8855_STP_FORWARDING;
+		break;
+	}
+
+	regmap_update_bits(priv->regmap, AN8855_SSP_P(port),
+			   AN8855_FID_PST_MASK(AN8855_FID_BRIDGED),
+			   AN8855_FID_PST_VAL(AN8855_FID_BRIDGED, stp_state));
+
+	regmap_update_bits(priv->regmap, AN8855_PSC_P(port), AN8855_SA_DIS,
+			   learning ? 0 : AN8855_SA_DIS);
+}
+
+static void an8855_port_fast_age(struct dsa_switch *ds, int port)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	/* Set to clean Dynamic entry */
+	ret = regmap_write(priv->regmap, AN8855_ATA2, AN8855_ATA2_TYPE);
+	if (ret)
+		return;
+
+	/* Set Port */
+	ret = regmap_write(priv->regmap, AN8855_ATWD2,
+			   FIELD_PREP(AN8855_ATWD2_PORT, BIT(port)));
+	if (ret)
+		return;
+
+	/* Flush Dynamic entry at port */
+	an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_TYPE_PORT) |
+		       AN8855_FDB_FLUSH, NULL);
+}
+
+static int an8855_update_port_member(struct dsa_switch *ds, int port,
+				     const struct net_device *bridge_dev,
+				     bool join)
+{
+	struct an8855_priv *priv = ds->priv;
+	bool isolated, other_isolated;
+	struct dsa_port *dp;
+	u32 port_mask = 0;
+	int ret;
+
+	isolated = !!(priv->port_isolated_map & BIT(port));
+
+	dsa_switch_for_each_user_port(dp, ds) {
+		if (dp->index == port)
+			continue;
+
+		if (!dsa_port_offloads_bridge_dev(dp, bridge_dev))
+			continue;
+
+		other_isolated = !!(priv->port_isolated_map & BIT(dp->index));
+		port_mask |= BIT(dp->index);
+		/* Add/remove this port to the portvlan mask of the other
+		 * ports in the bridge
+		 */
+		if (join && !(isolated && other_isolated))
+			ret = regmap_set_bits(priv->regmap,
+					      AN8855_PORTMATRIX_P(dp->index),
+					      FIELD_PREP(AN8855_USER_PORTMATRIX,
+							 BIT(port)));
+		else
+			ret = regmap_clear_bits(priv->regmap,
+						AN8855_PORTMATRIX_P(dp->index),
+						FIELD_PREP(AN8855_USER_PORTMATRIX,
+							   BIT(port)));
+		if (ret)
+			return ret;
+	}
+
+	/* Add/remove all other ports to this port's portvlan mask */
+	return regmap_update_bits(priv->regmap, AN8855_PORTMATRIX_P(port),
+				  AN8855_USER_PORTMATRIX,
+				  join ? port_mask : ~port_mask);
+}
+
+static int an8855_port_pre_bridge_flags(struct dsa_switch *ds, int port,
+					struct switchdev_brport_flags flags,
+					struct netlink_ext_ack *extack)
+{
+	if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
+			   BR_BCAST_FLOOD | BR_ISOLATED))
+		return -EINVAL;
+
+	return 0;
+}
+
+static int an8855_port_bridge_flags(struct dsa_switch *ds, int port,
+				    struct switchdev_brport_flags flags,
+				    struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	if (flags.mask & BR_LEARNING) {
+		ret = regmap_update_bits(priv->regmap, AN8855_PSC_P(port), AN8855_SA_DIS,
+					 flags.val & BR_LEARNING ? 0 : AN8855_SA_DIS);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_UNUF, BIT(port),
+					 flags.val & BR_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_MCAST_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_UNMF, BIT(port),
+					 flags.val & BR_MCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+
+		ret = regmap_update_bits(priv->regmap, AN8855_UNIPMF, BIT(port),
+					 flags.val & BR_MCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_BCAST_FLOOD) {
+		ret = regmap_update_bits(priv->regmap, AN8855_BCF, BIT(port),
+					 flags.val & BR_BCAST_FLOOD ? BIT(port) : 0);
+		if (ret)
+			return ret;
+	}
+
+	if (flags.mask & BR_ISOLATED) {
+		struct dsa_port *dp = dsa_to_port(ds, port);
+		struct net_device *bridge_dev = dsa_port_bridge_dev_get(dp);
+
+		if (flags.val & BR_ISOLATED)
+			priv->port_isolated_map |= BIT(port);
+		else
+			priv->port_isolated_map &= ~BIT(port);
+
+		ret = an8855_update_port_member(ds, port, bridge_dev, true);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int an8855_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 age_count, age_unit, val;
+
+	/* Convert msec in AN8855_L2_AGING_MS_CONSTANT counter */
+	val = msecs / AN8855_L2_AGING_MS_CONSTANT;
+	/* Derive the count unit */
+	age_unit = val / FIELD_MAX(AN8855_AGE_UNIT);
+	/* Get the count in unit, age_unit is always incremented by 1 internally */
+	age_count = val / (age_unit + 1);
+
+	return regmap_update_bits(priv->regmap, AN8855_AAC,
+				  AN8855_AGE_CNT | AN8855_AGE_UNIT,
+				  FIELD_PREP(AN8855_AGE_CNT, age_count) |
+				  FIELD_PREP(AN8855_AGE_UNIT, age_unit));
+}
+
+static int an8855_port_bridge_join(struct dsa_switch *ds, int port,
+				   struct dsa_bridge bridge,
+				   bool *tx_fwd_offload,
+				   struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int ret;
+
+	ret = an8855_update_port_member(ds, port, bridge.dev, true);
+	if (ret)
+		return ret;
+
+	/* Set to fallback mode for independent VLAN learning if in a bridge */
+	return regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+				  AN8855_PORT_VLAN,
+				  FIELD_PREP(AN8855_PORT_VLAN,
+					     AN8855_PORT_FALLBACK_MODE));
+}
+
+static void an8855_port_bridge_leave(struct dsa_switch *ds, int port,
+				     struct dsa_bridge bridge)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_update_port_member(ds, port, bridge.dev, false);
+
+	/* When a port is removed from the bridge, the port would be set up
+	 * back to the default as is at initial boot which is a VLAN-unaware
+	 * port.
+	 */
+	regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+			   AN8855_PORT_VLAN,
+			   FIELD_PREP(AN8855_PORT_VLAN,
+				      AN8855_PORT_MATRIX_MODE));
+}
+
+static int an8855_port_fdb_add(struct dsa_switch *ds, int port,
+			       const unsigned char *addr, u16 vid,
+			       struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	u8 port_mask = BIT(port);
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+	an8855_fdb_write(priv, vid, port_mask, addr, true);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int an8855_port_fdb_del(struct dsa_switch *ds, int port,
+			       const unsigned char *addr, u16 vid,
+			       struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	u8 port_mask = BIT(port);
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+	an8855_fdb_write(priv, vid, port_mask, addr, false);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int an8855_port_fdb_dump(struct dsa_switch *ds, int port,
+				dsa_fdb_dump_cb_t *cb, void *data)
+{
+	struct an8855_priv *priv = ds->priv;
+	int banks, count = 0;
+	u32 rsp;
+	int ret;
+	int i;
+
+	mutex_lock(&priv->reg_mutex);
+
+	/* Load search port */
+	ret = regmap_write(priv->regmap, AN8855_ATWD2,
+			   FIELD_PREP(AN8855_ATWD2_PORT, BIT(port)));
+	if (ret)
+		goto exit;
+	ret = an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_PORT) |
+			     AN8855_FDB_START, &rsp);
+	if (ret < 0)
+		goto exit;
+
+	do {
+		/* From response get the number of banks to read, exit if 0 */
+		banks = FIELD_GET(AN8855_ATC_HIT, rsp);
+		if (!banks)
+			break;
+
+		/* Each banks have 4 entry */
+		for (i = 0; i < 4; i++) {
+			struct an8855_fdb _fdb = {  };
+
+			count++;
+
+			/* Check if bank is present */
+			if (!(banks & BIT(i)))
+				continue;
+
+			/* Select bank entry index */
+			ret = regmap_write(priv->regmap, AN8855_ATRDS,
+					   FIELD_PREP(AN8855_ATRD_SEL, i));
+			if (ret)
+				break;
+			/* wait 1ms for the bank entry to be filled */
+			usleep_range(1000, 1500);
+			an8855_fdb_read(priv, &_fdb);
+
+			if (!_fdb.live)
+				continue;
+			ret = cb(_fdb.mac, _fdb.vid, _fdb.noarp, data);
+			if (ret < 0)
+				break;
+		}
+
+		/* Stop if reached max FDB number */
+		if (count >= AN8855_NUM_FDB_RECORDS)
+			break;
+
+		/* Read next bank */
+		ret = an8855_fdb_cmd(priv, AN8855_ATC_MAT(AND8855_FDB_MAT_MAC_PORT) |
+				     AN8855_FDB_NEXT, &rsp);
+		if (ret < 0)
+			break;
+	} while (true);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+	return ret;
+}
+
+static int an8855_vlan_cmd(struct an8855_priv *priv, enum an8855_vlan_cmd cmd,
+			   u16 vid) __must_hold(&priv->reg_mutex)
+{
+	u32 val;
+	int ret;
+
+	val = AN8855_VTCR_BUSY | FIELD_PREP(AN8855_VTCR_FUNC, cmd) |
+	      FIELD_PREP(AN8855_VTCR_VID, vid);
+	ret = regmap_write(priv->regmap, AN8855_VTCR, val);
+	if (ret)
+		return ret;
+
+	return regmap_read_poll_timeout(priv->regmap, AN8855_VTCR, val,
+					!(val & AN8855_VTCR_BUSY), 20, 200000);
+}
+
+static int an8855_vlan_add(struct an8855_priv *priv, u8 port, u16 vid,
+			   bool untagged) __must_hold(&priv->reg_mutex)
+{
+	u32 port_mask;
+	u32 val;
+	int ret;
+
+	/* Fetch entry */
+	ret = an8855_vlan_cmd(priv, AN8855_VTCR_RD_VID, vid);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_VARD0, &val);
+	if (ret)
+		return ret;
+	port_mask = FIELD_GET(AN8855_VA0_PORT, val) | BIT(port);
+
+	/* Validate the entry with independent learning, create egress tag per
+	 * VLAN and joining the port as one of the port members.
+	 */
+	val = (val & AN8855_VA0_ETAG) | AN8855_VA0_IVL_MAC |
+	      AN8855_VA0_VTAG_EN | AN8855_VA0_VLAN_VALID |
+	      FIELD_PREP(AN8855_VA0_PORT, port_mask) |
+	      FIELD_PREP(AN8855_VA0_FID, AN8855_FID_BRIDGED);
+	ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_VAWD1, 0);
+	if (ret)
+		return ret;
+
+	/* CPU port is always taken as a tagged port for serving more than one
+	 * VLANs across and also being applied with egress type stack mode for
+	 * that VLAN tags would be appended after hardware special tag used as
+	 * DSA tag.
+	 */
+	if (port == AN8855_CPU_PORT)
+		val = AN8855_VLAN_EGRESS_STACK;
+	/* Decide whether adding tag or not for those outgoing packets from the
+	 * port inside the VLAN.
+	 */
+	else
+		val = untagged ? AN8855_VLAN_EGRESS_UNTAG : AN8855_VLAN_EGRESS_TAG;
+	ret = regmap_update_bits(priv->regmap, AN8855_VAWD0,
+				 AN8855_VA0_ETAG_PORT_MASK(port),
+				 AN8855_VA0_ETAG_PORT_VAL(port, val));
+	if (ret)
+		return ret;
+
+	/* Flush result to hardware */
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID, vid);
+}
+
+static int an8855_vlan_del(struct an8855_priv *priv, u8 port,
+			   u16 vid) __must_hold(&priv->reg_mutex)
+{
+	u32 port_mask;
+	u32 val;
+	int ret;
+
+	/* Fetch entry */
+	ret = an8855_vlan_cmd(priv, AN8855_VTCR_RD_VID, vid);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_VARD0, &val);
+	if (ret)
+		return ret;
+	port_mask = FIELD_GET(AN8855_VA0_PORT, val) & ~BIT(port);
+
+	if (!(val & AN8855_VA0_VLAN_VALID)) {
+		dev_err(priv->dev, "Cannot be deleted due to invalid entry\n");
+		return -EINVAL;
+	}
+
+	if (port_mask) {
+		val = (val & AN8855_VA0_ETAG) | AN8855_VA0_IVL_MAC |
+		       AN8855_VA0_VTAG_EN | AN8855_VA0_VLAN_VALID |
+		       FIELD_PREP(AN8855_VA0_PORT, port_mask);
+		ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+		if (ret)
+			return ret;
+	} else {
+		ret = regmap_write(priv->regmap, AN8855_VAWD0, 0);
+		if (ret)
+			return ret;
+	}
+	ret = regmap_write(priv->regmap, AN8855_VAWD1, 0);
+	if (ret)
+		return ret;
+
+	/* Flush result to hardware */
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID, vid);
+}
+
+static int an8855_port_set_vlan_mode(struct an8855_priv *priv, int port,
+				     enum an8855_port_mode port_mode,
+				     enum an8855_vlan_port_eg_tag eg_tag,
+				     enum an8855_vlan_port_attr vlan_attr,
+				     enum an8855_vlan_port_acc_frm acc_frm)
+{
+	int ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PCR_P(port),
+				 AN8855_PORT_VLAN,
+				 FIELD_PREP(AN8855_PORT_VLAN, port_mode));
+	if (ret)
+		return ret;
+
+	return regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+				  AN8855_PVC_EG_TAG | AN8855_VLAN_ATTR | AN8855_ACC_FRM,
+				  FIELD_PREP(AN8855_PVC_EG_TAG, eg_tag) |
+				  FIELD_PREP(AN8855_VLAN_ATTR, vlan_attr) |
+				  FIELD_PREP(AN8855_ACC_FRM, acc_frm));
+}
+
+static int an8855_port_set_pid(struct an8855_priv *priv, int port,
+			       u16 pid)
+{
+	int ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PPBV1_P(port),
+				 AN8855_PPBV_G0_PORT_VID,
+				 FIELD_PREP(AN8855_PPBV_G0_PORT_VID, pid));
+	if (ret)
+		return ret;
+
+	return regmap_update_bits(priv->regmap, AN8855_PVID_P(port),
+				  AN8855_G0_PORT_VID,
+				  FIELD_PREP(AN8855_G0_PORT_VID, pid));
+}
+
+static int an8855_port_vlan_filtering(struct dsa_switch *ds, int port,
+				      bool vlan_filtering,
+				      struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	/* The port is being kept as VLAN-unaware port when bridge is
+	 * set up with vlan_filtering not being set, Otherwise, the
+	 * port and the corresponding CPU port is required the setup
+	 * for becoming a VLAN-aware port.
+	 */
+	if (vlan_filtering) {
+		u32 acc_frm;
+		/* CPU port is set to fallback mode to let untagged
+		 * frames pass through.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, AN8855_CPU_PORT,
+						AN8855_PORT_FALLBACK_MODE,
+						AN8855_VLAN_EG_CONSISTENT,
+						AN8855_VLAN_USER,
+						AN8855_VLAN_ACC_ALL);
+		if (ret)
+			return ret;
+
+		ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+		if (ret)
+			return ret;
+
+		/* Only accept tagged frames if PVID is not set */
+		if (FIELD_GET(AN8855_G0_PORT_VID, val) != AN8855_PORT_VID_DEFAULT)
+			acc_frm = AN8855_VLAN_ACC_TAGGED;
+		else
+			acc_frm = AN8855_VLAN_ACC_ALL;
+
+		/* Trapped into security mode allows packet forwarding through VLAN
+		 * table lookup.
+		 * Set the port as a user port which is to be able to recognize VID
+		 * from incoming packets before fetching entry within the VLAN table.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, port,
+						AN8855_PORT_SECURITY_MODE,
+						AN8855_VLAN_EG_DISABLED,
+						AN8855_VLAN_USER,
+						acc_frm);
+		if (ret)
+			return ret;
+	} else {
+		bool disable_cpu_vlan = true;
+		struct dsa_port *dp;
+		u32 port_mode;
+
+		/* This is called after .port_bridge_leave when leaving a VLAN-aware
+		 * bridge. Don't set standalone ports to fallback mode.
+		 */
+		if (dsa_port_bridge_dev_get(dsa_to_port(ds, port)))
+			port_mode = AN8855_PORT_FALLBACK_MODE;
+		else
+			port_mode = AN8855_PORT_MATRIX_MODE;
+
+		/* When a port is removed from the bridge, the port would be set up
+		 * back to the default as is at initial boot which is a VLAN-unaware
+		 * port.
+		 */
+		ret = an8855_port_set_vlan_mode(priv, port, port_mode,
+						AN8855_VLAN_EG_CONSISTENT,
+						AN8855_VLAN_TRANSPARENT,
+						AN8855_VLAN_ACC_ALL);
+		if (ret)
+			return ret;
+
+		/* Restore default PVID */
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+
+		dsa_switch_for_each_user_port(dp, ds) {
+			if (dsa_port_is_vlan_filtering(dp)) {
+				disable_cpu_vlan = false;
+				break;
+			}
+		}
+
+		if (disable_cpu_vlan) {
+			ret = an8855_port_set_vlan_mode(priv, AN8855_CPU_PORT,
+							AN8855_PORT_MATRIX_MODE,
+							AN8855_VLAN_EG_CONSISTENT,
+							AN8855_VLAN_USER,
+							AN8855_VLAN_ACC_ALL);
+			if (ret)
+				return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int an8855_port_vlan_add(struct dsa_switch *ds, int port,
+				const struct switchdev_obj_port_vlan *vlan,
+				struct netlink_ext_ack *extack)
+{
+	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+	bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = an8855_vlan_add(priv, port, vlan->vid, untagged);
+	mutex_unlock(&priv->reg_mutex);
+	if (ret)
+		return ret;
+
+	if (pvid) {
+		/* Accept all frames if PVID is set */
+		regmap_update_bits(priv->regmap, AN8855_PVC_P(port), AN8855_ACC_FRM,
+				   FIELD_PREP(AN8855_ACC_FRM, AN8855_VLAN_ACC_ALL));
+
+		/* Only configure PVID if VLAN filtering is enabled */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = an8855_port_set_pid(priv, port, vlan->vid);
+			if (ret)
+				return ret;
+		}
+	} else if (vlan->vid) {
+		ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+		if (ret)
+			return ret;
+
+		if (FIELD_GET(AN8855_G0_PORT_VID, val) != vlan->vid)
+			return 0;
+
+		/* This VLAN is overwritten without PVID, so unset it */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+						 AN8855_ACC_FRM,
+						 FIELD_PREP(AN8855_ACC_FRM,
+							    AN8855_VLAN_ACC_TAGGED));
+			if (ret)
+				return ret;
+		}
+
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int an8855_port_vlan_del(struct dsa_switch *ds, int port,
+				const struct switchdev_obj_port_vlan *vlan)
+{
+	struct an8855_priv *priv = ds->priv;
+	u32 val;
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = an8855_vlan_del(priv, port, vlan->vid);
+	mutex_unlock(&priv->reg_mutex);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(priv->regmap, AN8855_PVID_P(port), &val);
+	if (ret)
+		return ret;
+
+	/* PVID is being restored to the default whenever the PVID port
+	 * is being removed from the VLAN.
+	 */
+	if (FIELD_GET(AN8855_G0_PORT_VID, val) == vlan->vid) {
+		/* Only accept tagged frames if the port is VLAN-aware */
+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
+			ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(port),
+						 AN8855_ACC_FRM,
+						 FIELD_PREP(AN8855_ACC_FRM,
+							    AN8855_VLAN_ACC_TAGGED));
+			if (ret)
+				return ret;
+		}
+
+		ret = an8855_port_set_pid(priv, port, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int
+an8855_port_mdb_add(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_mdb *mdb,
+		    struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	const u8 *addr = mdb->addr;
+	u16 vid = mdb->vid;
+	u8 port_mask = 0;
+	u32 val;
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+
+	an8855_fdb_write(priv, vid, 0, addr, false);
+	if (!an8855_fdb_cmd(priv, AN8855_FDB_READ, NULL)) {
+		ret = regmap_read(priv->regmap, AN8855_ATRD3, &val);
+		if (ret)
+			goto exit;
+
+		port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, val);
+	}
+
+	port_mask |= BIT(port);
+	an8855_fdb_write(priv, vid, port_mask, addr, true);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+an8855_port_mdb_del(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_mdb *mdb,
+		    struct dsa_db db)
+{
+	struct an8855_priv *priv = ds->priv;
+	const u8 *addr = mdb->addr;
+	u16 vid = mdb->vid;
+	u8 port_mask = 0;
+	u32 val;
+	int ret;
+
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = AN8855_PORT_VID_DEFAULT;
+
+	mutex_lock(&priv->reg_mutex);
+
+	an8855_fdb_write(priv, vid, 0, addr, 0);
+	if (!an8855_fdb_cmd(priv, AN8855_FDB_READ, NULL)) {
+		ret = regmap_read(priv->regmap, AN8855_ATRD3, &val);
+		if (ret)
+			goto exit;
+
+		port_mask = FIELD_GET(AN8855_ATRD3_PORTMASK, val);
+	}
+
+	port_mask &= ~BIT(port);
+	an8855_fdb_write(priv, vid, port_mask, addr, port_mask ? true : false);
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_WRITE, NULL);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+an8855_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
+{
+	struct an8855_priv *priv = ds->priv;
+	int length;
+	u32 val;
+
+	/* When a new MTU is set, DSA always set the CPU port's MTU to the
+	 * largest MTU of the slave ports. Because the switch only has a global
+	 * RX length register, only allowing CPU port here is enough.
+	 */
+	if (!dsa_is_cpu_port(ds, port))
+		return 0;
+
+	/* RX length also includes Ethernet header, MTK tag, and FCS length */
+	length = new_mtu + ETH_HLEN + MTK_TAG_LEN + ETH_FCS_LEN;
+	if (length <= 1522)
+		val = AN8855_MAX_RX_PKT_1518_1522;
+	else if (length <= 1536)
+		val = AN8855_MAX_RX_PKT_1536;
+	else if (length <= 1552)
+		val = AN8855_MAX_RX_PKT_1552;
+	else if (length <= 3072)
+		val = AN8855_MAX_RX_JUMBO_3K;
+	else if (length <= 4096)
+		val = AN8855_MAX_RX_JUMBO_4K;
+	else if (length <= 5120)
+		val = AN8855_MAX_RX_JUMBO_5K;
+	else if (length <= 6144)
+		val = AN8855_MAX_RX_JUMBO_6K;
+	else if (length <= 7168)
+		val = AN8855_MAX_RX_JUMBO_7K;
+	else if (length <= 8192)
+		val = AN8855_MAX_RX_JUMBO_8K;
+	else if (length <= 9216)
+		val = AN8855_MAX_RX_JUMBO_9K;
+	else if (length <= 12288)
+		val = AN8855_MAX_RX_JUMBO_12K;
+	else if (length <= 15360)
+		val = AN8855_MAX_RX_JUMBO_15K;
+	else
+		val = AN8855_MAX_RX_JUMBO_16K;
+
+	/* Enable JUMBO packet */
+	if (length > 1552)
+		val |= AN8855_MAX_RX_PKT_JUMBO;
+
+	return regmap_update_bits(priv->regmap, AN8855_GMACCR,
+				  AN8855_MAX_RX_JUMBO | AN8855_MAX_RX_PKT_LEN,
+				  val);
+}
+
+static int
+an8855_port_max_mtu(struct dsa_switch *ds, int port)
+{
+	return AN8855_MAX_MTU;
+}
+
+static void
+an8855_get_strings(struct dsa_switch *ds, int port, u32 stringset,
+		   uint8_t *data)
+{
+	int i;
+
+	if (stringset != ETH_SS_STATS)
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(an8855_mib); i++)
+		ethtool_puts(&data, an8855_mib[i].name);
+}
+
+static void
+an8855_read_port_stats(struct an8855_priv *priv, int port, u32 offset, u8 size,
+		       uint64_t *data)
+{
+	u32 val, reg = AN8855_PORT_MIB_COUNTER(port) + offset;
+
+	regmap_read(priv->regmap, reg, &val);
+	*data = val;
+
+	if (size == 2) {
+		regmap_read(priv->regmap, reg + 4, &val);
+		*data |= (u64)val << 32;
+	}
+}
+
+static void
+an8855_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)
+{
+	struct an8855_priv *priv = ds->priv;
+	const struct an8855_mib_desc *mib;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(an8855_mib); i++) {
+		mib = &an8855_mib[i];
+
+		an8855_read_port_stats(priv, port, mib->offset, mib->size,
+				       data + i);
+	}
+}
+
+static int
+an8855_get_sset_count(struct dsa_switch *ds, int port, int sset)
+{
+	if (sset != ETH_SS_STATS)
+		return 0;
+
+	return ARRAY_SIZE(an8855_mib);
+}
+
+static void
+an8855_get_eth_mac_stats(struct dsa_switch *ds, int port,
+			 struct ethtool_eth_mac_stats *mac_stats)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	/* MIB counter doesn't provide a FramesTransmittedOK but instead
+	 * provide stats for Unicast, Broadcast and Multicast frames separately.
+	 * To simulate a global frame counter, read Unicast and addition Multicast
+	 * and Broadcast later
+	 */
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_UNICAST, 1,
+			       &mac_stats->FramesTransmittedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_SINGLE_COLLISION, 1,
+			       &mac_stats->SingleCollisionFrames);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_MULTIPLE_COLLISION, 1,
+			       &mac_stats->MultipleCollisionFrames);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_UNICAST, 1,
+			       &mac_stats->FramesReceivedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_BYTES, 2,
+			       &mac_stats->OctetsTransmittedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_ALIGN_ERR, 1,
+			       &mac_stats->AlignmentErrors);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_DEFERRED, 1,
+			       &mac_stats->FramesWithDeferredXmissions);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_LATE_COLLISION, 1,
+			       &mac_stats->LateCollisions);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,
+			       &mac_stats->FramesAbortedDueToXSColls);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_BYTES, 2,
+			       &mac_stats->OctetsReceivedOK);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_MULTICAST, 1,
+			       &mac_stats->MulticastFramesXmittedOK);
+	mac_stats->FramesTransmittedOK += mac_stats->MulticastFramesXmittedOK;
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_BROADCAST, 1,
+			       &mac_stats->BroadcastFramesXmittedOK);
+	mac_stats->FramesTransmittedOK += mac_stats->BroadcastFramesXmittedOK;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_MULTICAST, 1,
+			       &mac_stats->MulticastFramesReceivedOK);
+	mac_stats->FramesReceivedOK += mac_stats->MulticastFramesReceivedOK;
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_BROADCAST, 1,
+			       &mac_stats->BroadcastFramesReceivedOK);
+	mac_stats->FramesReceivedOK += mac_stats->BroadcastFramesReceivedOK;
+}
+
+static const struct ethtool_rmon_hist_range an8855_rmon_ranges[] = {
+	{ 0, 64 },
+	{ 65, 127 },
+	{ 128, 255 },
+	{ 256, 511 },
+	{ 512, 1023 },
+	{ 1024, 1518 },
+	{ 1519, AN8855_MAX_MTU },
+	{}
+};
+
+static void an8855_get_rmon_stats(struct dsa_switch *ds, int port,
+				  struct ethtool_rmon_stats *rmon_stats,
+				  const struct ethtool_rmon_hist_range **ranges)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_UNDER_SIZE_ERR, 1,
+			       &rmon_stats->undersize_pkts);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_OVER_SZ_ERR, 1,
+			       &rmon_stats->oversize_pkts);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_FRAG_ERR, 1,
+			       &rmon_stats->fragments);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_JABBER_ERR, 1,
+			       &rmon_stats->jabbers);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_64, 1,
+			       &rmon_stats->hist[0]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_65_TO_127, 1,
+			       &rmon_stats->hist[1]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_128_TO_255, 1,
+			       &rmon_stats->hist[2]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_256_TO_511, 1,
+			       &rmon_stats->hist[3]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_512_TO_1023, 1,
+			       &rmon_stats->hist[4]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_1024_TO_1518, 1,
+			       &rmon_stats->hist[5]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PKT_SZ_1519_TO_MAX, 1,
+			       &rmon_stats->hist[6]);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_64, 1,
+			       &rmon_stats->hist_tx[0]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_65_TO_127, 1,
+			       &rmon_stats->hist_tx[1]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_128_TO_255, 1,
+			       &rmon_stats->hist_tx[2]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_256_TO_511, 1,
+			       &rmon_stats->hist_tx[3]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_512_TO_1023, 1,
+			       &rmon_stats->hist_tx[4]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_1024_TO_1518, 1,
+			       &rmon_stats->hist_tx[5]);
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PKT_SZ_1519_TO_MAX, 1,
+			       &rmon_stats->hist_tx[6]);
+
+	*ranges = an8855_rmon_ranges;
+}
+
+static void an8855_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
+				      struct ethtool_eth_ctrl_stats *ctrl_stats)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_TX_PAUSE, 1,
+			       &ctrl_stats->MACControlFramesTransmitted);
+
+	an8855_read_port_stats(priv, port, AN8855_PORT_MIB_RX_PAUSE, 1,
+			       &ctrl_stats->MACControlFramesReceived);
+}
+
+static int an8855_port_mirror_add(struct dsa_switch *ds, int port,
+				  struct dsa_mall_mirror_tc_entry *mirror,
+				  bool ingress,
+				  struct netlink_ext_ack *extack)
+{
+	struct an8855_priv *priv = ds->priv;
+	int monitor_port;
+	u32 val;
+	int ret;
+
+	/* Check for existent entry */
+	if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port))
+		return -EEXIST;
+
+	ret = regmap_read(priv->regmap, AN8855_MIR, &val);
+	if (ret)
+		return ret;
+
+	/* AN8855 supports 4 monitor port, but only use first group */
+	monitor_port = FIELD_GET(AN8855_MIRROR_PORT, val);
+	if (val & AN8855_MIRROR_EN && monitor_port != mirror->to_local_port)
+		return -EEXIST;
+
+	val = AN8855_MIRROR_EN;
+	val |= FIELD_PREP(AN8855_MIRROR_PORT, mirror->to_local_port);
+	ret = regmap_update_bits(priv->regmap, AN8855_MIR,
+				 AN8855_MIRROR_EN | AN8855_MIRROR_PORT,
+				 val);
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_PCR_P(port),
+			      ingress ? AN8855_PORT_RX_MIR : AN8855_PORT_TX_MIR);
+	if (ret)
+		return ret;
+
+	if (ingress)
+		priv->mirror_rx |= BIT(port);
+	else
+		priv->mirror_tx |= BIT(port);
+
+	return 0;
+}
+
+static void an8855_port_mirror_del(struct dsa_switch *ds, int port,
+				   struct dsa_mall_mirror_tc_entry *mirror)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	if (mirror->ingress)
+		priv->mirror_rx &= ~BIT(port);
+	else
+		priv->mirror_tx &= ~BIT(port);
+
+	regmap_clear_bits(priv->regmap, AN8855_PCR_P(port),
+			  mirror->ingress ? AN8855_PORT_RX_MIR :
+					    AN8855_PORT_TX_MIR);
+
+	if (!priv->mirror_rx && !priv->mirror_tx)
+		regmap_clear_bits(priv->regmap, AN8855_MIR, AN8855_MIRROR_EN);
+}
+
+static int an8855_port_set_status(struct an8855_priv *priv, int port,
+				  bool enable)
+{
+	if (enable)
+		return regmap_set_bits(priv->regmap, AN8855_PMCR_P(port),
+				       AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+	else
+		return regmap_clear_bits(priv->regmap, AN8855_PMCR_P(port),
+					 AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+}
+
+static int an8855_port_enable(struct dsa_switch *ds, int port,
+			      struct phy_device *phy)
+{
+	return an8855_port_set_status(ds->priv, port, true);
+}
+
+static void an8855_port_disable(struct dsa_switch *ds, int port)
+{
+	an8855_port_set_status(ds->priv, port, false);
+}
+
+static u32 en8855_get_phy_flags(struct dsa_switch *ds, int port)
+{
+	struct an8855_priv *priv = ds->priv;
+
+	/* PHY doesn't need calibration */
+	if (!priv->phy_require_calib)
+		return 0;
+
+	/* Use AN8855_PHY_FLAGS_EN_CALIBRATION to signal
+	 * calibration needed.
+	 */
+	return AN8855_PHY_FLAGS_EN_CALIBRATION;
+}
+
+static enum dsa_tag_protocol
+an8855_get_tag_protocol(struct dsa_switch *ds, int port,
+			enum dsa_tag_protocol mp)
+{
+	return DSA_TAG_PROTO_MTK;
+}
+
+/* Similar to MT7530 also trap link local frame and special frame to CPU */
+static int an8855_trap_special_frames(struct an8855_priv *priv)
+{
+	int ret;
+
+	/* Trap BPDUs to the CPU port(s) and egress them
+	 * VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_BPC,
+				 AN8855_BPDU_BPDU_FR | AN8855_BPDU_EG_TAG |
+				 AN8855_BPDU_PORT_FW,
+				 AN8855_BPDU_BPDU_FR |
+				 FIELD_PREP(AN8855_BPDU_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_BPDU_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap 802.1X PAE frames to the CPU port(s) and egress them
+	 * VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_PAC,
+				 AN8855_PAE_BPDU_FR | AN8855_PAE_EG_TAG |
+				 AN8855_PAE_PORT_FW,
+				 AN8855_PAE_BPDU_FR |
+				 FIELD_PREP(AN8855_PAE_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_PAE_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :01 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R01_BPDU_FR | AN8855_R01_EG_TAG |
+				 AN8855_R01_PORT_FW,
+				 AN8855_R01_BPDU_FR |
+				 FIELD_PREP(AN8855_R01_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R01_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :02 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R02_BPDU_FR | AN8855_R02_EG_TAG |
+				 AN8855_R02_PORT_FW,
+				 AN8855_R02_BPDU_FR |
+				 FIELD_PREP(AN8855_R02_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R02_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :03 MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				 AN8855_R03_BPDU_FR | AN8855_R03_EG_TAG |
+				 AN8855_R03_PORT_FW,
+				 AN8855_R03_BPDU_FR |
+				 FIELD_PREP(AN8855_R03_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				 FIELD_PREP(AN8855_R03_PORT_FW, AN8855_BPDU_CPU_ONLY));
+	if (ret)
+		return ret;
+
+	/* Trap frames with :0E MAC DAs to the CPU port(s) and egress
+	 * them VLAN-untagged.
+	 */
+	return regmap_update_bits(priv->regmap, AN8855_RGAC1,
+				  AN8855_R0E_BPDU_FR | AN8855_R0E_EG_TAG |
+				  AN8855_R0E_PORT_FW,
+				  AN8855_R0E_BPDU_FR |
+				  FIELD_PREP(AN8855_R0E_EG_TAG, AN8855_VLAN_EG_UNTAGGED) |
+				  FIELD_PREP(AN8855_R0E_PORT_FW, AN8855_BPDU_CPU_ONLY));
+}
+
+static int
+an8855_setup_pvid_vlan(struct an8855_priv *priv)
+{
+	u32 val;
+	int ret;
+
+	/* Validate the entry with independent learning, keep the original
+	 * ingress tag attribute.
+	 */
+	val = AN8855_VA0_IVL_MAC | AN8855_VA0_EG_CON |
+	      FIELD_PREP(AN8855_VA0_FID, AN8855_FID_BRIDGED) |
+	      AN8855_VA0_PORT | AN8855_VA0_VLAN_VALID;
+	ret = regmap_write(priv->regmap, AN8855_VAWD0, val);
+	if (ret)
+		return ret;
+
+	return an8855_vlan_cmd(priv, AN8855_VTCR_WR_VID,
+			       AN8855_PORT_VID_DEFAULT);
+}
+
+static int an8855_setup(struct dsa_switch *ds)
+{
+	struct an8855_priv *priv = ds->priv;
+	struct dsa_port *dp;
+	int ret;
+
+	/* Enable and reset MIB counters */
+	ret = an8855_mib_init(priv);
+	if (ret)
+		return ret;
+
+	dsa_switch_for_each_user_port(dp, ds) {
+		/* Disable MAC by default on all user ports */
+		ret = an8855_port_set_status(priv, dp->index, false);
+		if (ret)
+			return ret;
+
+		/* Individual user ports get connected to CPU port only */
+		ret = regmap_write(priv->regmap, AN8855_PORTMATRIX_P(dp->index),
+				   FIELD_PREP(AN8855_PORTMATRIX, BIT(AN8855_CPU_PORT)));
+		if (ret)
+			return ret;
+
+		/* Disable Broadcast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_BCF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Disable Unknown Unicast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNUF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Disable Unknown Multicast Forward on user ports */
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNMF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		ret = regmap_clear_bits(priv->regmap, AN8855_UNIPMF, BIT(dp->index));
+		if (ret)
+			return ret;
+
+		/* Set default PVID to on all user ports */
+		ret = an8855_port_set_pid(priv, dp->index, AN8855_PORT_VID_DEFAULT);
+		if (ret)
+			return ret;
+	}
+
+	/* Enable Airoha header mode on the cpu port */
+	ret = regmap_write(priv->regmap, AN8855_PVC_P(AN8855_CPU_PORT),
+			   AN8855_PORT_SPEC_REPLACE_MODE | AN8855_PORT_SPEC_TAG);
+	if (ret)
+		return ret;
+
+	/* Unknown multicast frame forwarding to the cpu port */
+	ret = regmap_write(priv->regmap, AN8855_UNMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Set CPU port number */
+	ret = regmap_update_bits(priv->regmap, AN8855_MFC,
+				 AN8855_CPU_EN | AN8855_CPU_PORT_IDX,
+				 AN8855_CPU_EN |
+				 FIELD_PREP(AN8855_CPU_PORT_IDX, AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* CPU port gets connected to all user ports of
+	 * the switch.
+	 */
+	ret = regmap_write(priv->regmap, AN8855_PORTMATRIX_P(AN8855_CPU_PORT),
+			   FIELD_PREP(AN8855_PORTMATRIX, dsa_user_ports(ds)));
+	if (ret)
+		return ret;
+
+	/* CPU port is set to fallback mode to let untagged
+	 * frames pass through.
+	 */
+	ret = regmap_update_bits(priv->regmap, AN8855_PCR_P(AN8855_CPU_PORT),
+				 AN8855_PORT_VLAN,
+				 FIELD_PREP(AN8855_PORT_VLAN, AN8855_PORT_FALLBACK_MODE));
+	if (ret)
+		return ret;
+
+	/* Enable Broadcast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_BCF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Enable Unknown Unicast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_UNUF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Enable Unknown Multicast Forward on CPU port */
+	ret = regmap_set_bits(priv->regmap, AN8855_UNMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_UNIPMF, BIT(AN8855_CPU_PORT));
+	if (ret)
+		return ret;
+
+	/* Setup Trap special frame to CPU rules */
+	ret = an8855_trap_special_frames(priv);
+	if (ret)
+		return ret;
+
+	dsa_switch_for_each_port(dp, ds) {
+		/* Disable Learning on all ports.
+		 * Learning on CPU is disabled for fdb isolation and handled by
+		 * assisted_learning_on_cpu_port.
+		 */
+		ret = regmap_set_bits(priv->regmap, AN8855_PSC_P(dp->index),
+				      AN8855_SA_DIS);
+		if (ret)
+			return ret;
+
+		/* Enable consistent egress tag (for VLAN unware VLAN-passtrough) */
+		ret = regmap_update_bits(priv->regmap, AN8855_PVC_P(dp->index),
+					 AN8855_PVC_EG_TAG,
+					 FIELD_PREP(AN8855_PVC_EG_TAG, AN8855_VLAN_EG_CONSISTENT));
+		if (ret)
+			return ret;
+	}
+
+	/* Setup VLAN for Default PVID */
+	ret = an8855_setup_pvid_vlan(priv);
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_CKGCR,
+				AN8855_CKG_LNKDN_GLB_STOP | AN8855_CKG_LNKDN_PORT_STOP);
+	if (ret)
+		return ret;
+
+	/* Release global PHY power down */
+	ret = regmap_write(priv->regmap, AN8855_RG_GPHY_AFE_PWD, 0x0);
+	if (ret)
+		return ret;
+
+	ds->configure_vlan_while_not_filtering = true;
+
+	/* Flush the FDB table */
+	ret = an8855_fdb_cmd(priv, AN8855_FDB_FLUSH, NULL);
+	if (ret < 0)
+		return ret;
+
+	/* Set min a max ageing value supported */
+	ds->ageing_time_min = AN8855_L2_AGING_MS_CONSTANT;
+	ds->ageing_time_max = FIELD_MAX(AN8855_AGE_CNT) *
+			      FIELD_MAX(AN8855_AGE_UNIT) *
+			      AN8855_L2_AGING_MS_CONSTANT;
+
+	/* Enable assisted learning for fdb isolation */
+	ds->assisted_learning_on_cpu_port = true;
+
+	return 0;
+}
+
+static struct phylink_pcs *an8855_phylink_mac_select_pcs(struct phylink_config *config,
+							 phy_interface_t interface)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+
+	switch (interface) {
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_2500BASEX:
+		return &priv->pcs;
+	default:
+		return NULL;
+	}
+}
+
+static void an8855_phylink_mac_config(struct phylink_config *config,
+				      unsigned int mode,
+				      const struct phylink_link_state *state)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct dsa_switch *ds = dp->ds;
+	struct an8855_priv *priv;
+	int port = dp->index;
+
+	priv = ds->priv;
+
+	/* Nothing to configure for internal ports */
+	if (port != 5)
+		return;
+
+	regmap_update_bits(priv->regmap, AN8855_PMCR_P(port),
+			   AN8855_PMCR_IFG_XMIT | AN8855_PMCR_MAC_MODE |
+			   AN8855_PMCR_BACKOFF_EN | AN8855_PMCR_BACKPR_EN,
+			   FIELD_PREP(AN8855_PMCR_IFG_XMIT, 0x1) |
+			   AN8855_PMCR_MAC_MODE | AN8855_PMCR_BACKOFF_EN |
+			   AN8855_PMCR_BACKPR_EN);
+}
+
+static void an8855_phylink_get_caps(struct dsa_switch *ds, int port,
+				    struct phylink_config *config)
+{
+	switch (port) {
+	case 0:
+	case 1:
+	case 2:
+	case 3:
+	case 4:
+		__set_bit(PHY_INTERFACE_MODE_GMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
+			  config->supported_interfaces);
+		break;
+	case 5:
+		phy_interface_set_rgmii(config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_SGMII,
+			  config->supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,
+			  config->supported_interfaces);
+		break;
+	}
+
+	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+				   MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
+}
+
+static void an8855_phylink_mac_link_down(struct phylink_config *config,
+					 unsigned int mode,
+					 phy_interface_t interface)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+
+	/* With autoneg just disable TX/RX else also force link down */
+	if (phylink_autoneg_inband(mode)) {
+		regmap_clear_bits(priv->regmap, AN8855_PMCR_P(dp->index),
+				  AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN);
+	} else {
+		regmap_update_bits(priv->regmap, AN8855_PMCR_P(dp->index),
+				   AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN |
+				   AN8855_PMCR_FORCE_MODE | AN8855_PMCR_FORCE_LNK,
+				   AN8855_PMCR_FORCE_MODE);
+	}
+}
+
+static void an8855_phylink_mac_link_up(struct phylink_config *config,
+				       struct phy_device *phydev, unsigned int mode,
+				       phy_interface_t interface, int speed,
+				       int duplex, bool tx_pause, bool rx_pause)
+{
+	struct dsa_port *dp = dsa_phylink_to_port(config);
+	struct an8855_priv *priv = dp->ds->priv;
+	int port = dp->index;
+	u32 reg;
+
+	reg = regmap_read(priv->regmap, AN8855_PMCR_P(port), &reg);
+	if (phylink_autoneg_inband(mode)) {
+		reg &= ~AN8855_PMCR_FORCE_MODE;
+	} else {
+		reg |= AN8855_PMCR_FORCE_MODE | AN8855_PMCR_FORCE_LNK;
+
+		reg &= ~AN8855_PMCR_FORCE_SPEED;
+		switch (speed) {
+		case SPEED_10:
+			reg |= AN8855_PMCR_FORCE_SPEED_10;
+			break;
+		case SPEED_100:
+			reg |= AN8855_PMCR_FORCE_SPEED_100;
+			break;
+		case SPEED_1000:
+			reg |= AN8855_PMCR_FORCE_SPEED_1000;
+			break;
+		case SPEED_2500:
+			reg |= AN8855_PMCR_FORCE_SPEED_2500;
+			break;
+		case SPEED_5000:
+			dev_err(priv->dev, "Missing support for 5G speed. Aborting...\n");
+			return;
+		}
+
+		reg &= ~AN8855_PMCR_FORCE_FDX;
+		if (duplex == DUPLEX_FULL)
+			reg |= AN8855_PMCR_FORCE_FDX;
+
+		reg &= ~AN8855_PMCR_RX_FC_EN;
+		if (rx_pause || dsa_port_is_cpu(dp))
+			reg |= AN8855_PMCR_RX_FC_EN;
+
+		reg &= ~AN8855_PMCR_TX_FC_EN;
+		if (rx_pause || dsa_port_is_cpu(dp))
+			reg |= AN8855_PMCR_TX_FC_EN;
+
+		/* Disable any EEE options */
+		reg &= ~(AN8855_PMCR_FORCE_EEE5G | AN8855_PMCR_FORCE_EEE2P5G |
+			 AN8855_PMCR_FORCE_EEE1G | AN8855_PMCR_FORCE_EEE100);
+	}
+
+	reg |= AN8855_PMCR_TX_EN | AN8855_PMCR_RX_EN;
+
+	regmap_write(priv->regmap, AN8855_PMCR_P(port), reg);
+}
+
+static unsigned int an8855_pcs_inband_caps(struct phylink_pcs *pcs,
+					   phy_interface_t interface)
+{
+	/* SGMII can be configured to use inband with AN result */
+	if (interface == PHY_INTERFACE_MODE_SGMII)
+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
+
+	/* inband is not supported in 2500-baseX and must be disabled */
+	return  LINK_INBAND_DISABLE;
+}
+
+static void an8855_pcs_get_state(struct phylink_pcs *pcs,
+				 struct phylink_link_state *state)
+{
+	struct an8855_priv *priv = container_of(pcs, struct an8855_priv, pcs);
+	u32 val;
+	int ret;
+
+	ret = regmap_read(priv->regmap, AN8855_PMSR_P(AN8855_CPU_PORT), &val);
+	if (ret < 0) {
+		state->link = false;
+		return;
+	}
+
+	state->link = !!(val & AN8855_PMSR_LNK);
+	state->an_complete = state->link;
+	state->duplex = (val & AN8855_PMSR_DPX) ? DUPLEX_FULL :
+						  DUPLEX_HALF;
+
+	switch (val & AN8855_PMSR_SPEED) {
+	case AN8855_PMSR_SPEED_10:
+		state->speed = SPEED_10;
+		break;
+	case AN8855_PMSR_SPEED_100:
+		state->speed = SPEED_100;
+		break;
+	case AN8855_PMSR_SPEED_1000:
+		state->speed = SPEED_1000;
+		break;
+	case AN8855_PMSR_SPEED_2500:
+		state->speed = SPEED_2500;
+		break;
+	case AN8855_PMSR_SPEED_5000:
+		dev_err(priv->dev, "Missing support for 5G speed. Setting Unknown.\n");
+		fallthrough;
+	default:
+		state->speed = SPEED_UNKNOWN;
+		break;
+	}
+
+	if (val & AN8855_PMSR_RX_FC)
+		state->pause |= MLO_PAUSE_RX;
+	if (val & AN8855_PMSR_TX_FC)
+		state->pause |= MLO_PAUSE_TX;
+}
+
+static int an8855_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
+			     phy_interface_t interface,
+			     const unsigned long *advertising,
+			     bool permit_pause_to_mac)
+{
+	struct an8855_priv *priv = container_of(pcs, struct an8855_priv, pcs);
+	u32 val;
+	int ret;
+
+	/*                   !!! WELCOME TO HELL !!!                   */
+
+	/* TX FIR - improve TX EYE */
+	ret = regmap_update_bits(priv->regmap, AN8855_INTF_CTRL_10,
+				 AN8855_RG_DA_QP_TX_FIR_C2_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C2_FORCE |
+				 AN8855_RG_DA_QP_TX_FIR_C1_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C1_FORCE,
+				 AN8855_RG_DA_QP_TX_FIR_C2_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C2_FORCE, 0x4) |
+				 AN8855_RG_DA_QP_TX_FIR_C1_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C1_FORCE, 0x0));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x0;
+	else
+		val = 0xd;
+	ret = regmap_update_bits(priv->regmap, AN8855_INTF_CTRL_11,
+				 AN8855_RG_DA_QP_TX_FIR_C0B_SEL |
+				 AN8855_RG_DA_QP_TX_FIR_C0B_FORCE,
+				 AN8855_RG_DA_QP_TX_FIR_C0B_SEL |
+				 FIELD_PREP(AN8855_RG_DA_QP_TX_FIR_C0B_FORCE, val));
+	if (ret)
+		return ret;
+
+	/* RX CDR - improve RX Jitter Tolerance */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x5;
+	else
+		val = 0x6;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_BOT_LIM,
+				 AN8855_RG_QP_CDR_LPF_KP_GAIN |
+				 AN8855_RG_QP_CDR_LPF_KI_GAIN,
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_KP_GAIN, val) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_KI_GAIN, val));
+	if (ret)
+		return ret;
+
+	/* PLL */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x1;
+	else
+		val = 0x0;
+	ret = regmap_update_bits(priv->regmap, AN8855_QP_DIG_MODE_CTRL_1,
+				 AN8855_RG_TPHY_SPEED,
+				 FIELD_PREP(AN8855_RG_TPHY_SPEED, val));
+	if (ret)
+		return ret;
+
+	/* PLL - LPF */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_RICO_SEL_INTF |
+				 AN8855_RG_DA_QP_PLL_FBKSEL_INTF |
+				 AN8855_RG_DA_QP_PLL_BR_INTF |
+				 AN8855_RG_DA_QP_PLL_BPD_INTF |
+				 AN8855_RG_DA_QP_PLL_BPA_INTF |
+				 AN8855_RG_DA_QP_PLL_BC_INTF,
+				 AN8855_RG_DA_QP_PLL_RICO_SEL_INTF |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_FBKSEL_INTF, 0x0) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BR_INTF, 0x3) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BPD_INTF, 0x0) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BPA_INTF, 0x5) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_BC_INTF, 0x1));
+	if (ret)
+		return ret;
+
+	/* PLL - ICO */
+	ret = regmap_set_bits(priv->regmap, AN8855_PLL_CTRL_4,
+			      AN8855_RG_DA_QP_PLL_ICOLP_EN_INTF);
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				AN8855_RG_DA_QP_PLL_ICOIQ_EN_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - CHP */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x6;
+	else
+		val = 0x4;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_IR_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_IR_INTF, val));
+	if (ret)
+		return ret;
+
+	/* PLL - PFD */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_PFD_OFFSET_EN_INTRF |
+				 AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF |
+				 AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF, 0x1) |
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF, 0x1));
+	if (ret)
+		return ret;
+
+	/* PLL - POSTDIV */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_POSTDIV_EN_INTF |
+				 AN8855_RG_DA_QP_PLL_PHY_CK_EN_INTF |
+				 AN8855_RG_DA_QP_PLL_PCK_SEL_INTF,
+				 AN8855_RG_DA_QP_PLL_PCK_SEL_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - SDM */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				 AN8855_RG_DA_QP_PLL_SDM_HREN_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SDM_HREN_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CTRL_2,
+				AN8855_RG_DA_QP_PLL_SDM_IFM_INTF);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_SS_LCPLL_PWCTL_SETTING_2,
+				 AN8855_RG_NCPO_ANA_MSB,
+				 FIELD_PREP(AN8855_RG_NCPO_ANA_MSB, 0x1));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x7a000000;
+	else
+		val = 0x48000000;
+	ret = regmap_write(priv->regmap, AN8855_SS_LCPLL_TDC_FLT_2,
+			   FIELD_PREP(AN8855_RG_LCPLL_NCPO_VALUE, val));
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_SS_LCPLL_TDC_PCW_1,
+			   FIELD_PREP(AN8855_RG_LCPLL_PON_HRDDS_PCW_NCPO_GPON, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_SS_LCPLL_TDC_FLT_5,
+				AN8855_RG_LCPLL_NCPO_CHG);
+	if (ret)
+		return ret;
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CK_CTRL_0,
+				AN8855_RG_DA_QP_PLL_SDM_DI_EN_INTF);
+	if (ret)
+		return ret;
+
+	/* PLL - SS */
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_3,
+				 AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_4,
+				 AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF, 0x0));
+	if (ret)
+		return ret;
+	ret = regmap_update_bits(priv->regmap, AN8855_PLL_CTRL_3,
+				 AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF,
+				 FIELD_PREP(AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF, 0x0));
+	if (ret)
+		return ret;
+
+	/* PLL - TDC */
+	ret = regmap_clear_bits(priv->regmap, AN8855_PLL_CK_CTRL_0,
+				AN8855_RG_DA_QP_PLL_TDC_TXCK_SEL_INTF);
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_PLL_SDM_ORD,
+			      AN8855_RG_QP_PLL_SSC_TRI_EN);
+	if (ret)
+		return ret;
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_PLL_SDM_ORD,
+			      AN8855_RG_QP_PLL_SSC_PHASE_INI);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_RX_DAC_EN,
+				 AN8855_RG_QP_SIGDET_HF,
+				 FIELD_PREP(AN8855_RG_QP_SIGDET_HF, 0x2));
+	if (ret)
+		return ret;
+
+	/* TCL Disable (only for Co-SIM) */
+	ret = regmap_clear_bits(priv->regmap, AN8855_PON_RXFEDIG_CTRL_0,
+				AN8855_RG_QP_EQ_RX500M_CK_SEL);
+	if (ret)
+		return ret;
+
+	/* TX Init */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x4;
+	else
+		val = 0x0;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_TX_MODE,
+				 AN8855_RG_QP_TX_RESERVE |
+				 AN8855_RG_QP_TX_MODE_16B_EN,
+				 FIELD_PREP(AN8855_RG_QP_TX_RESERVE, val));
+	if (ret)
+		return ret;
+
+	/* RX Control/Init */
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_QP_RXAFE_RESERVE,
+			      AN8855_RG_QP_CDR_PD_10B_EN);
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x1;
+	else
+		val = 0x2;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_MJV_LIM,
+				 AN8855_RG_QP_CDR_LPF_RATIO,
+				 FIELD_PREP(AN8855_RG_QP_CDR_LPF_RATIO, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_LPF_SETVALUE,
+				 AN8855_RG_QP_CDR_PR_BUF_IN_SR |
+				 AN8855_RG_QP_CDR_PR_BETA_SEL,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_BUF_IN_SR, 0x6) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_BETA_SEL, 0x1));
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0xf;
+	else
+		val = 0xc;
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_CKREF_DIV1,
+				 AN8855_RG_QP_CDR_PR_DAC_BAND,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_DAC_BAND, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE,
+				 AN8855_RG_QP_CDR_PR_KBAND_PCIE_MODE |
+				 AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK, 0x19));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_FORCE_IBANDLPF_R_OFF,
+				 AN8855_RG_QP_CDR_PHYCK_SEL |
+				 AN8855_RG_QP_CDR_PHYCK_RSTB |
+				 AN8855_RG_QP_CDR_PHYCK_DIV,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PHYCK_SEL, 0x2) |
+				 FIELD_PREP(AN8855_RG_QP_CDR_PHYCK_DIV, 0x21));
+	if (ret)
+		return ret;
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE,
+				AN8855_RG_QP_CDR_PR_XFICK_EN);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RG_QP_CDR_PR_CKREF_DIV1,
+				 AN8855_RG_QP_CDR_PR_KBAND_DIV,
+				 FIELD_PREP(AN8855_RG_QP_CDR_PR_KBAND_DIV, 0x4));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_26,
+				 AN8855_RG_QP_EQ_RETRAIN_ONLY_EN |
+				 AN8855_RG_LINK_NE_EN |
+				 AN8855_RG_LINK_ERRO_EN,
+				 AN8855_RG_QP_EQ_RETRAIN_ONLY_EN |
+				 AN8855_RG_LINK_ERRO_EN);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_DLY_0,
+				 AN8855_RG_QP_RX_SAOSC_EN_H_DLY |
+				 AN8855_RG_QP_RX_PI_CAL_EN_H_DLY,
+				 FIELD_PREP(AN8855_RG_QP_RX_SAOSC_EN_H_DLY, 0x3f) |
+				 FIELD_PREP(AN8855_RG_QP_RX_PI_CAL_EN_H_DLY, 0x6f));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_42,
+				 AN8855_RG_QP_EQ_EN_DLY,
+				 FIELD_PREP(AN8855_RG_QP_EQ_EN_DLY, 0x150));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_2,
+				 AN8855_RG_QP_RX_EQ_EN_H_DLY,
+				 FIELD_PREP(AN8855_RG_QP_RX_EQ_EN_H_DLY, 0x150));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_PON_RXFEDIG_CTRL_9,
+				 AN8855_RG_QP_EQ_LEQOSC_DLYCNT,
+				 FIELD_PREP(AN8855_RG_QP_EQ_LEQOSC_DLYCNT, 0x1));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_8,
+				 AN8855_RG_DA_QP_SAOSC_DONE_TIME |
+				 AN8855_RG_DA_QP_LEQOS_EN_TIME,
+				 FIELD_PREP(AN8855_RG_DA_QP_SAOSC_DONE_TIME, 0x200) |
+				 FIELD_PREP(AN8855_RG_DA_QP_LEQOS_EN_TIME, 0xfff));
+	if (ret)
+		return ret;
+
+	/* Frequency meter */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX)
+		val = 0x10;
+	else
+		val = 0x28;
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_5,
+				 AN8855_RG_FREDET_CHK_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_CHK_CYCLE, val));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_6,
+				 AN8855_RG_FREDET_GOLDEN_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_GOLDEN_CYCLE, 0x64));
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(priv->regmap, AN8855_RX_CTRL_7,
+				 AN8855_RG_FREDET_TOLERATE_CYCLE,
+				 FIELD_PREP(AN8855_RG_FREDET_TOLERATE_CYCLE, 0x2710));
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(priv->regmap, AN8855_PLL_CTRL_0,
+			      AN8855_RG_PHYA_AUTO_INIT);
+	if (ret)
+		return ret;
+
+	/* PCS Init */
+	if (interface == PHY_INTERFACE_MODE_SGMII &&
+	    neg_mode == PHYLINK_PCS_NEG_INBAND_DISABLED) {
+		ret = regmap_clear_bits(priv->regmap, AN8855_QP_DIG_MODE_CTRL_0,
+					AN8855_RG_SGMII_MODE | AN8855_RG_SGMII_AN_EN);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_clear_bits(priv->regmap, AN8855_RG_HSGMII_PCS_CTROL_1,
+				AN8855_RG_TBI_10B_MODE);
+	if (ret)
+		return ret;
+
+	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+		/* Set AN Ability - Interrupt */
+		ret = regmap_set_bits(priv->regmap, AN8855_SGMII_REG_AN_FORCE_CL37,
+				      AN8855_RG_FORCE_AN_DONE);
+		if (ret)
+			return ret;
+
+		ret = regmap_update_bits(priv->regmap, AN8855_SGMII_REG_AN_13,
+					 AN8855_SGMII_REMOTE_FAULT_DIS |
+					 AN8855_SGMII_IF_MODE,
+					 AN8855_SGMII_REMOTE_FAULT_DIS |
+					 FIELD_PREP(AN8855_SGMII_IF_MODE, 0xb));
+		if (ret)
+			return ret;
+	}
+
+	/* Rate Adaption - GMII path config. */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX) {
+		ret = regmap_clear_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+					AN8855_RG_P0_DIS_MII_MODE);
+		if (ret)
+			return ret;
+	} else {
+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+			ret = regmap_set_bits(priv->regmap, AN8855_MII_RA_AN_ENABLE,
+					      AN8855_RG_P0_RA_AN_EN);
+			if (ret)
+				return ret;
+		} else {
+			ret = regmap_update_bits(priv->regmap, AN8855_RG_AN_SGMII_MODE_FORCE,
+						 AN8855_RG_FORCE_CUR_SGMII_MODE |
+						 AN8855_RG_FORCE_CUR_SGMII_SEL,
+						 AN8855_RG_FORCE_CUR_SGMII_SEL);
+			if (ret)
+				return ret;
+
+			ret = regmap_clear_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+						AN8855_RG_P0_MII_RA_RX_EN |
+						AN8855_RG_P0_MII_RA_TX_EN |
+						AN8855_RG_P0_MII_RA_RX_MODE |
+						AN8855_RG_P0_MII_RA_TX_MODE);
+			if (ret)
+				return ret;
+		}
+
+		ret = regmap_set_bits(priv->regmap, AN8855_RATE_ADP_P0_CTRL_0,
+				      AN8855_RG_P0_MII_MODE);
+		if (ret)
+			return ret;
+	}
+
+	ret = regmap_set_bits(priv->regmap, AN8855_RG_RATE_ADAPT_CTRL_0,
+			      AN8855_RG_RATE_ADAPT_RX_BYPASS |
+			      AN8855_RG_RATE_ADAPT_TX_BYPASS |
+			      AN8855_RG_RATE_ADAPT_RX_EN |
+			      AN8855_RG_RATE_ADAPT_TX_EN);
+	if (ret)
+		return ret;
+
+	/* Disable AN if not in autoneg */
+	ret = regmap_update_bits(priv->regmap, AN8855_SGMII_REG_AN0, BMCR_ANENABLE,
+				 neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE :
+									      0);
+	if (ret)
+		return ret;
+
+	if (interface == PHY_INTERFACE_MODE_SGMII) {
+		/* Follow SDK init flow with restarting AN after AN enable */
+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
+			ret = regmap_set_bits(priv->regmap, AN8855_SGMII_REG_AN0,
+					      BMCR_ANRESTART);
+			if (ret)
+				return ret;
+		} else {
+			ret = regmap_set_bits(priv->regmap, AN8855_PHY_RX_FORCE_CTRL_0,
+					      AN8855_RG_FORCE_TXC_SEL);
+			if (ret)
+				return ret;
+		}
+	}
+
+	/* Force Speed with fixed-link or 2500base-x as doesn't support aneg */
+	if (interface == PHY_INTERFACE_MODE_2500BASEX ||
+	    neg_mode != PHYLINK_PCS_NEG_INBAND_ENABLED) {
+		if (interface == PHY_INTERFACE_MODE_2500BASEX)
+			val = AN8855_RG_LINK_MODE_P0_SPEED_2500;
+		else
+			val = AN8855_RG_LINK_MODE_P0_SPEED_1000;
+		ret = regmap_update_bits(priv->regmap, AN8855_SGMII_STS_CTRL_0,
+					 AN8855_RG_LINK_MODE_P0 |
+					 AN8855_RG_FORCE_SPD_MODE_P0,
+					 val | AN8855_RG_FORCE_SPD_MODE_P0);
+		if (ret)
+			return ret;
+	}
+
+	/* bypass flow control to MAC */
+	ret = regmap_write(priv->regmap, AN8855_MSG_RX_LIK_STS_0,
+			   AN8855_RG_DPX_STS_P3 | AN8855_RG_DPX_STS_P2 |
+			   AN8855_RG_DPX_STS_P1 | AN8855_RG_TXFC_STS_P0 |
+			   AN8855_RG_RXFC_STS_P0 | AN8855_RG_DPX_STS_P0);
+	if (ret)
+		return ret;
+	ret = regmap_write(priv->regmap, AN8855_MSG_RX_LIK_STS_2,
+			   AN8855_RG_RXFC_AN_BYPASS_P3 |
+			   AN8855_RG_RXFC_AN_BYPASS_P2 |
+			   AN8855_RG_RXFC_AN_BYPASS_P1 |
+			   AN8855_RG_TXFC_AN_BYPASS_P3 |
+			   AN8855_RG_TXFC_AN_BYPASS_P2 |
+			   AN8855_RG_TXFC_AN_BYPASS_P1 |
+			   AN8855_RG_DPX_AN_BYPASS_P3 |
+			   AN8855_RG_DPX_AN_BYPASS_P2 |
+			   AN8855_RG_DPX_AN_BYPASS_P1 |
+			   AN8855_RG_DPX_AN_BYPASS_P0);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static void an8855_pcs_an_restart(struct phylink_pcs *pcs)
+{
+	return;
+}
+
+static const struct phylink_pcs_ops an8855_pcs_ops = {
+	.pcs_inband_caps = an8855_pcs_inband_caps,
+	.pcs_get_state = an8855_pcs_get_state,
+	.pcs_config = an8855_pcs_config,
+	.pcs_an_restart = an8855_pcs_an_restart,
+};
+
+static const struct phylink_mac_ops an8855_phylink_mac_ops = {
+	.mac_select_pcs	= an8855_phylink_mac_select_pcs,
+	.mac_config	= an8855_phylink_mac_config,
+	.mac_link_down	= an8855_phylink_mac_link_down,
+	.mac_link_up	= an8855_phylink_mac_link_up,
+};
+
+static const struct dsa_switch_ops an8855_switch_ops = {
+	.get_tag_protocol = an8855_get_tag_protocol,
+	.setup = an8855_setup,
+	.get_phy_flags = en8855_get_phy_flags,
+	.phylink_get_caps = an8855_phylink_get_caps,
+	.get_strings = an8855_get_strings,
+	.get_ethtool_stats = an8855_get_ethtool_stats,
+	.get_sset_count = an8855_get_sset_count,
+	.get_eth_mac_stats = an8855_get_eth_mac_stats,
+	.get_eth_ctrl_stats = an8855_get_eth_ctrl_stats,
+	.get_rmon_stats = an8855_get_rmon_stats,
+	.port_enable = an8855_port_enable,
+	.port_disable = an8855_port_disable,
+	.set_ageing_time = an8855_set_ageing_time,
+	.port_bridge_join = an8855_port_bridge_join,
+	.port_bridge_leave = an8855_port_bridge_leave,
+	.port_fast_age = an8855_port_fast_age,
+	.port_stp_state_set = an8855_port_stp_state_set,
+	.port_pre_bridge_flags = an8855_port_pre_bridge_flags,
+	.port_bridge_flags = an8855_port_bridge_flags,
+	.port_vlan_filtering = an8855_port_vlan_filtering,
+	.port_vlan_add = an8855_port_vlan_add,
+	.port_vlan_del = an8855_port_vlan_del,
+	.port_fdb_add = an8855_port_fdb_add,
+	.port_fdb_del = an8855_port_fdb_del,
+	.port_fdb_dump = an8855_port_fdb_dump,
+	.port_mdb_add = an8855_port_mdb_add,
+	.port_mdb_del = an8855_port_mdb_del,
+	.port_change_mtu = an8855_port_change_mtu,
+	.port_max_mtu = an8855_port_max_mtu,
+	.port_mirror_add = an8855_port_mirror_add,
+	.port_mirror_del = an8855_port_mirror_del,
+};
+
+static int an8855_read_switch_id(struct an8855_priv *priv)
+{
+	u32 id;
+	int ret;
+
+	ret = regmap_read(priv->regmap, AN8855_CREV, &id);
+	if (ret)
+		return ret;
+
+	if (id != AN8855_ID) {
+		dev_err(priv->dev,
+			"Switch id detected %x but expected %x\n",
+			id, AN8855_ID);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int an8855_switch_probe(struct platform_device *pdev)
+{
+	struct an8855_priv *priv;
+	u32 val;
+	int ret;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = &pdev->dev;
+	priv->phy_require_calib = of_property_read_bool(priv->dev->of_node,
+							"airoha,ext-surge");
+
+	priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset",
+						   GPIOD_OUT_LOW);
+	if (IS_ERR(priv->reset_gpio))
+		return PTR_ERR(priv->reset_gpio);
+
+	/* Get regmap from MFD */
+	priv->regmap = dev_get_regmap(priv->dev->parent, NULL);
+
+	if (priv->reset_gpio) {
+		usleep_range(100000, 150000);
+		gpiod_set_value_cansleep(priv->reset_gpio, 0);
+		usleep_range(100000, 150000);
+		gpiod_set_value_cansleep(priv->reset_gpio, 1);
+
+		/* Poll HWTRAP reg to wait for Switch to fully Init */
+		ret = regmap_read_poll_timeout(priv->regmap, AN8855_HWTRAP, val,
+					       val, 20, 200000);
+		if (ret)
+			return ret;
+	}
+
+	ret = an8855_read_switch_id(priv);
+	if (ret)
+		return ret;
+
+	priv->ds = devm_kzalloc(priv->dev, sizeof(*priv->ds), GFP_KERNEL);
+	if (!priv->ds)
+		return -ENOMEM;
+
+	priv->ds->dev = priv->dev;
+	priv->ds->num_ports = AN8855_NUM_PORTS;
+	priv->ds->priv = priv;
+	priv->ds->ops = &an8855_switch_ops;
+	devm_mutex_init(priv->dev, &priv->reg_mutex);
+	priv->ds->phylink_mac_ops = &an8855_phylink_mac_ops;
+
+	priv->pcs.ops = &an8855_pcs_ops;
+	priv->pcs.neg_mode = true;
+	priv->pcs.poll = true;
+
+	dev_set_drvdata(priv->dev, priv);
+
+	return dsa_register_switch(priv->ds);
+}
+
+static int an8855_switch_remove(struct platform_device *pdev)
+{
+	struct an8855_priv *priv = dev_get_drvdata(&pdev->dev);
+
+	if (!priv)
+		return 0;
+
+	dsa_unregister_switch(priv->ds);
+	return 0;
+}
+
+static const struct of_device_id an8855_switch_of_match[] = {
+	{ .compatible = "airoha,an8855-switch" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_switch_of_match);
+
+static struct platform_driver an8855_switch_driver = {
+	.probe = an8855_switch_probe,
+	.remove = an8855_switch_remove,
+	.driver = {
+		.name = "an8855-switch",
+		.of_match_table = an8855_switch_of_match,
+	},
+};
+module_platform_driver(an8855_switch_driver);
+
+MODULE_AUTHOR("Min Yao <min.yao at airoha.com>");
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for Airoha AN8855 Switch");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h
new file mode 100644
index 0000000000..2462b9d337
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/dsa/an8855.h
@@ -0,0 +1,783 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2023 Min Yao <min.yao at airoha.com>
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+
+#ifndef __AN8855_H
+#define __AN8855_H
+
+#include <linux/bitfield.h>
+
+#define AN8855_NUM_PORTS		6
+#define AN8855_CPU_PORT			5
+#define AN8855_NUM_FDB_RECORDS		2048
+#define AN8855_GPHY_SMI_ADDR_DEFAULT	1
+#define AN8855_PORT_VID_DEFAULT		0
+
+#define MTK_TAG_LEN			4
+#define AN8855_MAX_MTU			(15360 - ETH_HLEN - ETH_FCS_LEN - MTK_TAG_LEN)
+
+#define AN8855_L2_AGING_MS_CONSTANT	1024
+
+#define AN8855_PHY_FLAGS_EN_CALIBRATION	BIT(0)
+
+/*	AN8855_SCU			0x10000000 */
+#define AN8855_RG_GPIO_LED_MODE		0x10000054
+#define AN8855_RG_GPIO_LED_SEL(i)	(0x10000000 + (0x0058 + ((i) * 4)))
+#define AN8855_RG_INTB_MODE		0x10000080
+#define AN8855_RG_RGMII_TXCK_C		0x100001d0
+
+#define AN8855_PKG_SEL			0x10000094
+#define   AN8855_PAG_SEL_AN8855H	0x2
+
+/* Register for hw trap status */
+#define AN8855_HWTRAP			0x1000009c
+
+#define AN8855_RG_GPIO_L_INV		0x10000010
+#define AN8855_RG_GPIO_CTRL		0x1000a300
+#define AN8855_RG_GPIO_DATA		0x1000a304
+#define AN8855_RG_GPIO_OE		0x1000a314
+
+#define AN8855_CREV			0x10005000
+#define   AN8855_ID			0x8855
+
+/* Register for system reset */
+#define AN8855_RST_CTRL			0x100050c0
+#define   AN8855_SYS_CTRL_SYS_RST	BIT(31)
+
+#define AN8855_INT_MASK			0x100050f0
+#define   AN8855_INT_SYS		BIT(15)
+
+#define AN8855_RG_CLK_CPU_ICG		0x10005034
+#define   AN8855_MCU_ENABLE		BIT(3)
+
+#define AN8855_RG_TIMER_CTL		0x1000a100
+#define   AN8855_WDOG_ENABLE		BIT(25)
+
+#define AN8855_RG_GDMP_RAM		0x10010000
+
+/* Registers to mac forward control for unknown frames */
+#define AN8855_MFC			0x10200010
+#define   AN8855_CPU_EN			BIT(15)
+#define   AN8855_CPU_PORT_IDX		GENMASK(12, 8)
+
+#define AN8855_PAC			0x10200024
+#define   AN8855_TAG_PAE_MANG_FR	BIT(30)
+#define   AN8855_TAG_PAE_BPDU_FR	BIT(28)
+#define   AN8855_TAG_PAE_EG_TAG		GENMASK(27, 25)
+#define   AN8855_TAG_PAE_LKY_VLAN	BIT(24)
+#define   AN8855_TAG_PAE_PRI_HIGH	BIT(23)
+#define   AN8855_TAG_PAE_MIR		GENMASK(20, 19)
+#define   AN8855_TAG_PAE_PORT_FW	GENMASK(18, 16)
+#define   AN8855_PAE_MANG_FR		BIT(14)
+#define   AN8855_PAE_BPDU_FR		BIT(12)
+#define   AN8855_PAE_EG_TAG		GENMASK(11, 9)
+#define   AN8855_PAE_LKY_VLAN		BIT(8)
+#define   AN8855_PAE_PRI_HIGH		BIT(7)
+#define   AN8855_PAE_MIR		GENMASK(4, 3)
+#define   AN8855_PAE_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_RGAC1			0x10200028
+#define   AN8855_R02_MANG_FR		BIT(30)
+#define   AN8855_R02_BPDU_FR		BIT(28)
+#define   AN8855_R02_EG_TAG		GENMASK(27, 25)
+#define   AN8855_R02_LKY_VLAN		BIT(24)
+#define   AN8855_R02_PRI_HIGH		BIT(23)
+#define   AN8855_R02_MIR		GENMASK(20, 19)
+#define   AN8855_R02_PORT_FW		GENMASK(18, 16)
+#define   AN8855_R01_MANG_FR		BIT(14)
+#define   AN8855_R01_BPDU_FR		BIT(12)
+#define   AN8855_R01_EG_TAG		GENMASK(11, 9)
+#define   AN8855_R01_LKY_VLAN		BIT(8)
+#define   AN8855_R01_PRI_HIGH		BIT(7)
+#define   AN8855_R01_MIR		GENMASK(4, 3)
+#define   AN8855_R01_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_RGAC2			0x1020002c
+#define   AN8855_R0E_MANG_FR		BIT(30)
+#define   AN8855_R0E_BPDU_FR		BIT(28)
+#define   AN8855_R0E_EG_TAG		GENMASK(27, 25)
+#define   AN8855_R0E_LKY_VLAN		BIT(24)
+#define   AN8855_R0E_PRI_HIGH		BIT(23)
+#define   AN8855_R0E_MIR		GENMASK(20, 19)
+#define   AN8855_R0E_PORT_FW		GENMASK(18, 16)
+#define   AN8855_R03_MANG_FR		BIT(14)
+#define   AN8855_R03_BPDU_FR		BIT(12)
+#define   AN8855_R03_EG_TAG		GENMASK(11, 9)
+#define   AN8855_R03_LKY_VLAN		BIT(8)
+#define   AN8855_R03_PRI_HIGH		BIT(7)
+#define   AN8855_R03_MIR		GENMASK(4, 3)
+#define   AN8855_R03_PORT_FW		GENMASK(2, 0)
+
+#define AN8855_AAC			0x102000a0
+#define   AN8855_MAC_AUTO_FLUSH		BIT(28)
+/* Control Address Table Age time.
+ * (AN8855_AGE_CNT + 1) * ( AN8855_AGE_UNIT + 1 ) * AN8855_L2_AGING_MS_CONSTANT
+ */
+#define   AN8855_AGE_CNT		GENMASK(20, 12)
+/* Value in seconds. Value is always incremented of 1 */
+#define   AN8855_AGE_UNIT		GENMASK(10, 0)
+
+/* Registers for ARL Unknown Unicast Forward control */
+#define AN8855_UNUF			0x102000b4
+
+/* Registers for ARL Unknown Multicast Forward control */
+#define AN8855_UNMF			0x102000b8
+
+/* Registers for ARL Broadcast forward control */
+#define AN8855_BCF			0x102000bc
+
+/* Registers for port address age disable */
+#define AN8855_AGDIS			0x102000c0
+
+/* Registers for mirror port control */
+#define AN8855_MIR			0x102000cc
+#define   AN8855_MIRROR_EN		BIT(7)
+#define   AN8855_MIRROR_PORT		GENMASK(4, 0)
+
+/* Registers for BPDU and PAE frame control*/
+#define AN8855_BPC			0x102000d0
+#define   AN8855_BPDU_MANG_FR		BIT(14)
+#define   AN8855_BPDU_BPDU_FR		BIT(12)
+#define   AN8855_BPDU_EG_TAG		GENMASK(11, 9)
+#define   AN8855_BPDU_LKY_VLAN		BIT(8)
+#define   AN8855_BPDU_PRI_HIGH		BIT(7)
+#define   AN8855_BPDU_MIR		GENMASK(4, 3)
+#define   AN8855_BPDU_PORT_FW		GENMASK(2, 0)
+
+/* Registers for IP Unknown Multicast Forward control */
+#define AN8855_UNIPMF			0x102000dc
+
+enum an8855_bpdu_port_fw {
+	AN8855_BPDU_FOLLOW_MFC = 0,
+	AN8855_BPDU_CPU_EXCLUDE = 4,
+	AN8855_BPDU_CPU_INCLUDE = 5,
+	AN8855_BPDU_CPU_ONLY = 6,
+	AN8855_BPDU_DROP = 7,
+};
+
+/* Register for address table control */
+#define AN8855_ATC			0x10200300
+#define   AN8855_ATC_BUSY		BIT(31)
+#define   AN8855_ATC_HASH		GENMASK(24, 16)
+#define   AN8855_ATC_HIT		GENMASK(15, 12)
+#define   AN8855_ATC_MAT_MASK		GENMASK(11, 7)
+#define   AN8855_ATC_MAT(x)		FIELD_PREP(AN8855_ATC_MAT_MASK, x)
+#define   AN8855_ATC_SAT		GENMASK(5, 4)
+#define   AN8855_ATC_CMD		GENMASK(2, 0)
+
+enum an8855_fdb_mat_cmds {
+	AND8855_FDB_MAT_ALL = 0,
+	AND8855_FDB_MAT_MAC, /* All MAC address */
+	AND8855_FDB_MAT_DYNAMIC_MAC, /* All Dynamic MAC address */
+	AND8855_FDB_MAT_STATIC_MAC, /* All Static Mac Address */
+	AND8855_FDB_MAT_DIP, /* All DIP/GA address */
+	AND8855_FDB_MAT_DIP_IPV4, /* All DIP/GA IPv4 address */
+	AND8855_FDB_MAT_DIP_IPV6, /* All DIP/GA IPv6 address */
+	AND8855_FDB_MAT_DIP_SIP, /* All DIP_SIP address */
+	AND8855_FDB_MAT_DIP_SIP_IPV4, /* All DIP_SIP IPv4 address */
+	AND8855_FDB_MAT_DIP_SIP_IPV6, /* All DIP_SIP IPv6 address */
+	AND8855_FDB_MAT_MAC_CVID, /* All MAC address with CVID */
+	AND8855_FDB_MAT_MAC_FID, /* All MAC address with Filter ID */
+	AND8855_FDB_MAT_MAC_PORT, /* All MAC address with port */
+	AND8855_FDB_MAT_DIP_SIP_DIP_IPV4, /* All DIP_SIP address with DIP_IPV4 */
+	AND8855_FDB_MAT_DIP_SIP_SIP_IPV4, /* All DIP_SIP address with SIP_IPV4 */
+	AND8855_FDB_MAT_DIP_SIP_DIP_IPV6, /* All DIP_SIP address with DIP_IPV6 */
+	AND8855_FDB_MAT_DIP_SIP_SIP_IPV6, /* All DIP_SIP address with SIP_IPV6 */
+	/* All MAC address with MAC type (dynamic or static) with CVID */
+	AND8855_FDB_MAT_MAC_TYPE_CVID,
+	/* All MAC address with MAC type (dynamic or static) with Filter ID */
+	AND8855_FDB_MAT_MAC_TYPE_FID,
+	/* All MAC address with MAC type (dynamic or static) with port */
+	AND8855_FDB_MAT_MAC_TYPE_PORT,
+};
+
+enum an8855_fdb_cmds {
+	AN8855_FDB_READ = 0,
+	AN8855_FDB_WRITE = 1,
+	AN8855_FDB_FLUSH = 2,
+	AN8855_FDB_START = 4,
+	AN8855_FDB_NEXT = 5,
+};
+
+/* Registers for address table access */
+#define AN8855_ATA1			0x10200304
+#define   AN8855_ATA1_MAC0		GENMASK(31, 24)
+#define   AN8855_ATA1_MAC1		GENMASK(23, 16)
+#define   AN8855_ATA1_MAC2		GENMASK(15, 8)
+#define   AN8855_ATA1_MAC3		GENMASK(7, 0)
+#define AN8855_ATA2			0x10200308
+#define   AN8855_ATA2_MAC4		GENMASK(31, 24)
+#define   AN8855_ATA2_MAC5		GENMASK(23, 16)
+#define   AN8855_ATA2_UNAUTH		BIT(10)
+#define   AN8855_ATA2_TYPE		BIT(9) /* 1: dynamic, 0: static */
+#define   AN8855_ATA2_AGE		GENMASK(8, 0)
+
+/* Register for address table write data */
+#define AN8855_ATWD			0x10200324
+#define   AN8855_ATWD_FID		GENMASK(31, 28)
+#define   AN8855_ATWD_VID		GENMASK(27, 16)
+#define   AN8855_ATWD_IVL		BIT(15)
+#define   AN8855_ATWD_EG_TAG		GENMASK(14, 12)
+#define   AN8855_ATWD_SA_MIR		GENMASK(9, 8)
+#define   AN8855_ATWD_SA_FWD		GENMASK(7, 5)
+#define   AN8855_ATWD_UPRI		GENMASK(4, 2)
+#define   AN8855_ATWD_LEAKY		BIT(1)
+#define   AN8855_ATWD_VLD		BIT(0) /* vid LOAD */
+#define AN8855_ATWD2			0x10200328
+#define   AN8855_ATWD2_PORT		GENMASK(7, 0)
+
+/* Registers for table search read address */
+#define AN8855_ATRDS			0x10200330
+#define   AN8855_ATRD_SEL		GENMASK(1, 0)
+#define AN8855_ATRD0			0x10200334
+#define   AN8855_ATRD0_FID		GENMASK(28, 25)
+#define   AN8855_ATRD0_VID		GENMASK(21, 10)
+#define   AN8855_ATRD0_IVL		BIT(9)
+#define   AN8855_ATRD0_TYPE		GENMASK(4, 3)
+#define   AN8855_ATRD0_ARP		GENMASK(2, 1)
+#define   AN8855_ATRD0_LIVE		BIT(0)
+#define AN8855_ATRD1			0x10200338
+#define   AN8855_ATRD1_MAC4		GENMASK(31, 24)
+#define   AN8855_ATRD1_MAC5		GENMASK(23, 16)
+#define   AN8855_ATRD1_AGING		GENMASK(11, 3)
+#define AN8855_ATRD2			0x1020033c
+#define   AN8855_ATRD2_MAC0		GENMASK(31, 24)
+#define   AN8855_ATRD2_MAC1		GENMASK(23, 16)
+#define   AN8855_ATRD2_MAC2		GENMASK(15, 8)
+#define   AN8855_ATRD2_MAC3		GENMASK(7, 0)
+#define AN8855_ATRD3			0x10200340
+#define   AN8855_ATRD3_PORTMASK		GENMASK(7, 0)
+
+enum an8855_fdb_type {
+	AN8855_MAC_TB_TY_MAC = 0,
+	AN8855_MAC_TB_TY_DIP = 1,
+	AN8855_MAC_TB_TY_DIP_SIP = 2,
+};
+
+/* Register for vlan table control */
+#define AN8855_VTCR			0x10200600
+#define   AN8855_VTCR_BUSY		BIT(31)
+#define   AN8855_VTCR_FUNC		GENMASK(15, 12)
+#define   AN8855_VTCR_VID		GENMASK(11, 0)
+
+enum an8855_vlan_cmd {
+	/* Read/Write the specified VID entry from VAWD register based
+	 * on VID.
+	 */
+	AN8855_VTCR_RD_VID = 0,
+	AN8855_VTCR_WR_VID = 1,
+};
+
+/* Register for setup vlan write data */
+#define AN8855_VAWD0			0x10200604
+/* VLAN Member Control */
+#define   AN8855_VA0_PORT		GENMASK(31, 26)
+/* Egress Tag Control */
+#define   AN8855_VA0_ETAG		GENMASK(23, 12)
+#define   AN8855_VA0_ETAG_PORT		GENMASK(13, 12)
+#define   AN8855_VA0_ETAG_PORT_SHIFT(port) ((port) * 2)
+#define   AN8855_VA0_ETAG_PORT_MASK(port) (AN8855_VA0_ETAG_PORT << \
+						AN8855_VA0_ETAG_PORT_SHIFT(port))
+#define   AN8855_VA0_ETAG_PORT_VAL(port, val) (FIELD_PREP(AN8855_VA0_ETAG_PORT, (val)) << \
+						AN8855_VA0_ETAG_PORT_SHIFT(port))
+#define   AN8855_VA0_EG_CON		BIT(11)
+#define   AN8855_VA0_VTAG_EN		BIT(10) /* Per VLAN Egress Tag Control */
+#define   AN8855_VA0_IVL_MAC		BIT(5) /* Independent VLAN Learning */
+#define	  AN8855_VA0_FID		GENMASK(4, 1)
+#define   AN8855_VA0_VLAN_VALID		BIT(0) /* VLAN Entry Valid */
+#define AN8855_VAWD1			0x10200608
+#define   AN8855_VA1_PORT_STAG		BIT(1)
+
+enum an8855_fid {
+	AN8855_FID_STANDALONE = 0,
+	AN8855_FID_BRIDGED = 1,
+};
+
+/* Same register field of VAWD0 */
+#define AN8855_VARD0			0x10200618
+
+enum an8855_vlan_egress_attr {
+	AN8855_VLAN_EGRESS_UNTAG = 0,
+	AN8855_VLAN_EGRESS_TAG = 2,
+	AN8855_VLAN_EGRESS_STACK = 3,
+};
+
+/* Register for port STP state control */
+#define AN8855_SSP_P(x)			(0x10208000 + ((x) * 0x200))
+/* Up to 16 FID supported, each with the same mask */
+#define	  AN8855_FID_PST		GENMASK(1, 0)
+#define   AN8855_FID_PST_SHIFT(fid)	(2 * (fid))
+#define   AN8855_FID_PST_MASK(fid)	(AN8855_FID_PST << \
+						AN8855_FID_PST_SHIFT(fid))
+#define   AN8855_FID_PST_VAL(fid, val)	(FIELD_PREP(AN8855_FID_PST, (val)) << \
+						AN8855_FID_PST_SHIFT(fid))
+
+enum an8855_stp_state {
+	AN8855_STP_DISABLED = 0,
+	AN8855_STP_BLOCKING = 1,
+	AN8855_STP_LISTENING = AN8855_STP_BLOCKING,
+	AN8855_STP_LEARNING = 2,
+	AN8855_STP_FORWARDING = 3
+};
+
+/* Register for port control */
+#define AN8855_PCR_P(x)			(0x10208004 + ((x) * 0x200))
+#define   AN8855_EG_TAG			GENMASK(29, 28)
+#define   AN8855_PORT_PRI		GENMASK(26, 24)
+#define   AN8855_PORT_TX_MIR		BIT(20)
+#define   AN8855_PORT_RX_MIR		BIT(16)
+#define   AN8855_PORT_VLAN		GENMASK(1, 0)
+
+enum an8855_port_mode {
+	/* Port Matrix Mode: Frames are forwarded by the PCR_MATRIX members. */
+	AN8855_PORT_MATRIX_MODE = 0,
+
+	/* Fallback Mode: Forward received frames with ingress ports that do
+	 * not belong to the VLAN member. Frames whose VID is not listed on
+	 * the VLAN table are forwarded by the PCR_MATRIX members.
+	 */
+	AN8855_PORT_FALLBACK_MODE = 1,
+
+	/* Check Mode: Forward received frames whose ingress do not
+	 * belong to the VLAN member. Discard frames if VID ismiddes on the
+	 * VLAN table.
+	 */
+	AN8855_PORT_CHECK_MODE = 2,
+
+	/* Security Mode: Discard any frame due to ingress membership
+	 * violation or VID missed on the VLAN table.
+	 */
+	AN8855_PORT_SECURITY_MODE = 3,
+};
+
+/* Register for port security control */
+#define AN8855_PSC_P(x)			(0x1020800c + ((x) * 0x200))
+#define   AN8855_SA_DIS			BIT(4)
+
+/* Register for port vlan control */
+#define AN8855_PVC_P(x)			(0x10208010 + ((x) * 0x200))
+#define   AN8855_PORT_SPEC_REPLACE_MODE	BIT(11)
+#define   AN8855_PVC_EG_TAG		GENMASK(10, 8)
+#define   AN8855_VLAN_ATTR		GENMASK(7, 6)
+#define   AN8855_PORT_SPEC_TAG		BIT(5)
+#define   AN8855_ACC_FRM		GENMASK(1, 0)
+
+enum an8855_vlan_port_eg_tag {
+	AN8855_VLAN_EG_DISABLED = 0,
+	AN8855_VLAN_EG_CONSISTENT = 1,
+	AN8855_VLAN_EG_UNTAGGED = 4,
+	AN8855_VLAN_EG_SWAP = 5,
+	AN8855_VLAN_EG_TAGGED = 6,
+	AN8855_VLAN_EG_STACK = 7,
+};
+
+enum an8855_vlan_port_attr {
+	AN8855_VLAN_USER = 0,
+	AN8855_VLAN_STACK = 1,
+	AN8855_VLAN_TRANSPARENT = 3,
+};
+
+enum an8855_vlan_port_acc_frm {
+	AN8855_VLAN_ACC_ALL = 0,
+	AN8855_VLAN_ACC_TAGGED = 1,
+	AN8855_VLAN_ACC_UNTAGGED = 2,
+};
+
+#define AN8855_PPBV1_P(x)		(0x10208014 + ((x) * 0x200))
+#define   AN8855_PPBV_G0_PORT_VID	GENMASK(11, 0)
+
+#define AN8855_PORTMATRIX_P(x)		(0x10208044 + ((x) * 0x200))
+#define   AN8855_PORTMATRIX		GENMASK(5, 0)
+/* Port matrix without the CPU port that should never be removed */
+#define   AN8855_USER_PORTMATRIX	GENMASK(4, 0)
+
+/* Register for port PVID */
+#define AN8855_PVID_P(x)		(0x10208048 + ((x) * 0x200))
+#define   AN8855_G0_PORT_VID		GENMASK(11, 0)
+
+/* Register for port MAC control register */
+#define AN8855_PMCR_P(x)		(0x10210000 + ((x) * 0x200))
+#define   AN8855_PMCR_FORCE_MODE	BIT(31)
+#define   AN8855_PMCR_FORCE_SPEED	GENMASK(30, 28)
+#define   AN8855_PMCR_FORCE_SPEED_5000	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x4)
+#define   AN8855_PMCR_FORCE_SPEED_2500	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x3)
+#define   AN8855_PMCR_FORCE_SPEED_1000	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x2)
+#define   AN8855_PMCR_FORCE_SPEED_100	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x1)
+#define   AN8855_PMCR_FORCE_SPEED_10	FIELD_PREP_CONST(AN8855_PMCR_FORCE_SPEED, 0x1)
+#define   AN8855_PMCR_FORCE_FDX		BIT(25)
+#define   AN8855_PMCR_FORCE_LNK		BIT(24)
+#define   AN8855_PMCR_IFG_XMIT		GENMASK(21, 20)
+#define   AN8855_PMCR_EXT_PHY		BIT(19)
+#define   AN8855_PMCR_MAC_MODE		BIT(18)
+#define   AN8855_PMCR_TX_EN		BIT(16)
+#define   AN8855_PMCR_RX_EN		BIT(15)
+#define   AN8855_PMCR_BACKOFF_EN	BIT(12)
+#define   AN8855_PMCR_BACKPR_EN		BIT(11)
+#define   AN8855_PMCR_FORCE_EEE5G	BIT(9)
+#define   AN8855_PMCR_FORCE_EEE2P5G	BIT(8)
+#define   AN8855_PMCR_FORCE_EEE1G	BIT(7)
+#define   AN8855_PMCR_FORCE_EEE100	BIT(6)
+#define   AN8855_PMCR_TX_FC_EN		BIT(5)
+#define   AN8855_PMCR_RX_FC_EN		BIT(4)
+
+#define AN8855_PMSR_P(x)		(0x10210010 + (x) * 0x200)
+#define   AN8855_PMSR_SPEED		GENMASK(30, 28)
+#define   AN8855_PMSR_SPEED_5000	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x4)
+#define   AN8855_PMSR_SPEED_2500	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x3)
+#define   AN8855_PMSR_SPEED_1000	FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x2)
+#define   AN8855_PMSR_SPEED_100		FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x1)
+#define   AN8855_PMSR_SPEED_10		FIELD_PREP_CONST(AN8855_PMSR_SPEED, 0x0)
+#define   AN8855_PMSR_DPX		BIT(25)
+#define   AN8855_PMSR_LNK		BIT(24)
+#define   AN8855_PMSR_EEE1G		BIT(7)
+#define   AN8855_PMSR_EEE100M		BIT(6)
+#define   AN8855_PMSR_RX_FC		BIT(5)
+#define   AN8855_PMSR_TX_FC		BIT(4)
+
+#define AN8855_PMEEECR_P(x)		(0x10210004 + (x) * 0x200)
+#define   AN8855_LPI_MODE_EN		BIT(31)
+#define   AN8855_WAKEUP_TIME_2500	GENMASK(23, 16)
+#define   AN8855_WAKEUP_TIME_1000	GENMASK(15, 8)
+#define   AN8855_WAKEUP_TIME_100	GENMASK(7, 0)
+#define AN8855_PMEEECR2_P(x)		(0x10210008 + (x) * 0x200)
+#define   AN8855_WAKEUP_TIME_5000	GENMASK(7, 0)
+
+#define AN8855_GMACCR			0x10213e00
+#define   AN8855_MAX_RX_JUMBO		GENMASK(7, 4)
+/* 2K for 0x0, 0x1, 0x2 */
+#define   AN8855_MAX_RX_JUMBO_2K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x0)
+#define   AN8855_MAX_RX_JUMBO_3K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x3)
+#define   AN8855_MAX_RX_JUMBO_4K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x4)
+#define   AN8855_MAX_RX_JUMBO_5K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x5)
+#define   AN8855_MAX_RX_JUMBO_6K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x6)
+#define   AN8855_MAX_RX_JUMBO_7K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x7)
+#define   AN8855_MAX_RX_JUMBO_8K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x8)
+#define   AN8855_MAX_RX_JUMBO_9K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0x9)
+#define   AN8855_MAX_RX_JUMBO_12K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xa)
+#define   AN8855_MAX_RX_JUMBO_15K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xb)
+#define   AN8855_MAX_RX_JUMBO_16K	FIELD_PREP_CONST(AN8855_MAX_RX_JUMBO, 0xc)
+#define   AN8855_MAX_RX_PKT_LEN		GENMASK(1, 0)
+#define   AN8855_MAX_RX_PKT_1518_1522	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x0)
+#define   AN8855_MAX_RX_PKT_1536	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x1)
+#define   AN8855_MAX_RX_PKT_1552	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x2)
+#define   AN8855_MAX_RX_PKT_JUMBO	FIELD_PREP_CONST(AN8855_MAX_RX_PKT_LEN, 0x3)
+
+#define AN8855_CKGCR			0x10213e1c
+#define   AN8855_LPI_TXIDLE_THD_MASK	GENMASK(31, 14)
+#define   AN8855_CKG_LNKDN_PORT_STOP	BIT(1)
+#define   AN8855_CKG_LNKDN_GLB_STOP	BIT(0)
+
+/* Register for MIB */
+#define AN8855_PORT_MIB_COUNTER(x)	(0x10214000 + (x) * 0x200)
+/* Each define is an offset of AN8855_PORT_MIB_COUNTER */
+#define   AN8855_PORT_MIB_TX_DROP	0x00
+#define   AN8855_PORT_MIB_TX_CRC_ERR	0x04
+#define   AN8855_PORT_MIB_TX_UNICAST	0x08
+#define   AN8855_PORT_MIB_TX_MULTICAST	0x0c
+#define   AN8855_PORT_MIB_TX_BROADCAST	0x10
+#define   AN8855_PORT_MIB_TX_COLLISION	0x14
+#define   AN8855_PORT_MIB_TX_SINGLE_COLLISION 0x18
+#define   AN8855_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c
+#define   AN8855_PORT_MIB_TX_DEFERRED	0x20
+#define   AN8855_PORT_MIB_TX_LATE_COLLISION 0x24
+#define   AN8855_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28
+#define   AN8855_PORT_MIB_TX_PAUSE	0x2c
+#define   AN8855_PORT_MIB_TX_PKT_SZ_64	0x30
+#define   AN8855_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34
+#define   AN8855_PORT_MIB_TX_PKT_SZ_128_TO_255 0x38
+#define   AN8855_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3
+#define   AN8855_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40
+#define   AN8855_PORT_MIB_TX_PKT_SZ_1024_TO_1518 0x44
+#define   AN8855_PORT_MIB_TX_PKT_SZ_1519_TO_MAX 0x48
+#define   AN8855_PORT_MIB_TX_BYTES	0x4c /* 64 bytes */
+#define   AN8855_PORT_MIB_TX_OVERSIZE_DROP 0x54
+#define   AN8855_PORT_MIB_TX_BAD_PKT_BYTES 0x58 /* 64 bytes */
+#define   AN8855_PORT_MIB_RX_DROP	0x80
+#define   AN8855_PORT_MIB_RX_FILTERING	0x84
+#define   AN8855_PORT_MIB_RX_UNICAST	0x88
+#define   AN8855_PORT_MIB_RX_MULTICAST	0x8c
+#define   AN8855_PORT_MIB_RX_BROADCAST	0x90
+#define   AN8855_PORT_MIB_RX_ALIGN_ERR	0x94
+#define   AN8855_PORT_MIB_RX_CRC_ERR	0x98
+#define   AN8855_PORT_MIB_RX_UNDER_SIZE_ERR 0x9c
+#define   AN8855_PORT_MIB_RX_FRAG_ERR	0xa0
+#define   AN8855_PORT_MIB_RX_OVER_SZ_ERR 0xa4
+#define   AN8855_PORT_MIB_RX_JABBER_ERR	0xa8
+#define   AN8855_PORT_MIB_RX_PAUSE	0xac
+#define   AN8855_PORT_MIB_RX_PKT_SZ_64	0xb0
+#define   AN8855_PORT_MIB_RX_PKT_SZ_65_TO_127 0xb4
+#define   AN8855_PORT_MIB_RX_PKT_SZ_128_TO_255 0xb8
+#define   AN8855_PORT_MIB_RX_PKT_SZ_256_TO_511 0xbc
+#define   AN8855_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xc0
+#define   AN8855_PORT_MIB_RX_PKT_SZ_1024_TO_1518 0xc4
+#define   AN8855_PORT_MIB_RX_PKT_SZ_1519_TO_MAX 0xc8
+#define   AN8855_PORT_MIB_RX_BYTES	0xcc /* 64 bytes */
+#define   AN8855_PORT_MIB_RX_CTRL_DROP	0xd4
+#define   AN8855_PORT_MIB_RX_INGRESS_DROP 0xd8
+#define   AN8855_PORT_MIB_RX_ARL_DROP	0xdc
+#define   AN8855_PORT_MIB_FLOW_CONTROL_DROP 0xe0
+#define   AN8855_PORT_MIB_WRED_DROP	0xe4
+#define   AN8855_PORT_MIB_MIRROR_DROP	0xe8
+#define   AN8855_PORT_MIB_RX_BAD_PKT_BYTES 0xec /* 64 bytes */
+#define   AN8855_PORT_MIB_RXS_FLOW_SAMPLING_PKT_DROP 0xf4
+#define   AN8855_PORT_MIB_RXS_FLOW_TOTAL_PKT_DROP 0xf8
+#define   AN8855_PORT_MIB_PORT_CONTROL_DROP 0xfc
+#define AN8855_MIB_CCR			0x10213e30
+#define   AN8855_CCR_MIB_ENABLE		BIT(31)
+#define   AN8855_CCR_RX_OCT_CNT_GOOD	BIT(7)
+#define   AN8855_CCR_RX_OCT_CNT_BAD	BIT(6)
+#define   AN8855_CCR_TX_OCT_CNT_GOOD	BIT(5)
+#define   AN8855_CCR_TX_OCT_CNT_BAD	BIT(4)
+#define   AN8855_CCR_RX_OCT_CNT_GOOD_2	BIT(3)
+#define   AN8855_CCR_RX_OCT_CNT_BAD_2	BIT(2)
+#define   AN8855_CCR_TX_OCT_CNT_GOOD_2	BIT(1)
+#define   AN8855_CCR_TX_OCT_CNT_BAD_2	BIT(0)
+#define   AN8855_CCR_MIB_ACTIVATE	(AN8855_CCR_MIB_ENABLE | \
+					 AN8855_CCR_RX_OCT_CNT_GOOD | \
+					 AN8855_CCR_RX_OCT_CNT_BAD | \
+					 AN8855_CCR_TX_OCT_CNT_GOOD | \
+					 AN8855_CCR_TX_OCT_CNT_BAD | \
+					 AN8855_CCR_RX_OCT_CNT_BAD_2 | \
+					 AN8855_CCR_TX_OCT_CNT_BAD_2)
+#define AN8855_MIB_CLR			0x10213e34
+#define   AN8855_MIB_PORT6_CLR		BIT(6)
+#define   AN8855_MIB_PORT5_CLR		BIT(5)
+#define   AN8855_MIB_PORT4_CLR		BIT(4)
+#define   AN8855_MIB_PORT3_CLR		BIT(3)
+#define   AN8855_MIB_PORT2_CLR		BIT(2)
+#define   AN8855_MIB_PORT1_CLR		BIT(1)
+#define   AN8855_MIB_PORT0_CLR		BIT(0)
+
+/* HSGMII/SGMII Configuration register */
+/*	AN8855_HSGMII_AN_CSR_BASE	0x10220000 */
+#define AN8855_SGMII_REG_AN0		0x10220000
+/*        AN8855_SGMII_AN_ENABLE	BMCR_ANENABLE */
+/*        AN8855_SGMII_AN_RESTART	BMCR_ANRESTART */
+#define AN8855_SGMII_REG_AN_13		0x10220034
+#define   AN8855_SGMII_REMOTE_FAULT_DIS	BIT(8)
+#define   AN8855_SGMII_IF_MODE		GENMASK(5, 0)
+#define AN8855_SGMII_REG_AN_FORCE_CL37	0x10220060
+#define   AN8855_RG_FORCE_AN_DONE	BIT(0)
+
+/*	AN8855_HSGMII_CSR_PCS_BASE	0x10220000 */
+#define AN8855_RG_HSGMII_PCS_CTROL_1	0x10220a00
+#define   AN8855_RG_TBI_10B_MODE	BIT(30)
+#define AN8855_RG_AN_SGMII_MODE_FORCE	0x10220a24
+#define   AN8855_RG_FORCE_CUR_SGMII_MODE GENMASK(5, 4)
+#define   AN8855_RG_FORCE_CUR_SGMII_SEL	BIT(0)
+
+/*	AN8855_MULTI_SGMII_CSR_BASE	0x10224000 */
+#define AN8855_SGMII_STS_CTRL_0		0x10224018
+#define   AN8855_RG_LINK_MODE_P0	GENMASK(5, 4)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_2500 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x3)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_1000 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x2)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_100 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x1)
+#define   AN8855_RG_LINK_MODE_P0_SPEED_10 FIELD_PREP_CONST(AN8855_RG_LINK_MODE_P0, 0x0)
+#define   AN8855_RG_FORCE_SPD_MODE_P0	BIT(2)
+#define AN8855_MSG_RX_CTRL_0		0x10224100
+#define AN8855_MSG_RX_LIK_STS_0		0x10224514
+#define   AN8855_RG_DPX_STS_P3		BIT(24)
+#define   AN8855_RG_DPX_STS_P2		BIT(16)
+#define   AN8855_RG_EEE1G_STS_P1	BIT(12)
+#define   AN8855_RG_DPX_STS_P1		BIT(8)
+#define   AN8855_RG_TXFC_STS_P0		BIT(2)
+#define   AN8855_RG_RXFC_STS_P0		BIT(1)
+#define   AN8855_RG_DPX_STS_P0		BIT(0)
+#define AN8855_MSG_RX_LIK_STS_2		0x1022451c
+#define   AN8855_RG_RXFC_AN_BYPASS_P3	BIT(11)
+#define   AN8855_RG_RXFC_AN_BYPASS_P2	BIT(10)
+#define   AN8855_RG_RXFC_AN_BYPASS_P1	BIT(9)
+#define   AN8855_RG_TXFC_AN_BYPASS_P3	BIT(7)
+#define   AN8855_RG_TXFC_AN_BYPASS_P2	BIT(6)
+#define   AN8855_RG_TXFC_AN_BYPASS_P1	BIT(5)
+#define   AN8855_RG_DPX_AN_BYPASS_P3	BIT(3)
+#define   AN8855_RG_DPX_AN_BYPASS_P2	BIT(2)
+#define   AN8855_RG_DPX_AN_BYPASS_P1	BIT(1)
+#define   AN8855_RG_DPX_AN_BYPASS_P0	BIT(0)
+#define AN8855_PHY_RX_FORCE_CTRL_0	0x10224520
+#define   AN8855_RG_FORCE_TXC_SEL	BIT(4)
+
+/*	AN8855_XFI_CSR_PCS_BASE		0x10225000 */
+#define AN8855_RG_USXGMII_AN_CONTROL_0	0x10225bf8
+
+/*	AN8855_MULTI_PHY_RA_CSR_BASE	0x10226000 */
+#define AN8855_RG_RATE_ADAPT_CTRL_0	0x10226000
+#define   AN8855_RG_RATE_ADAPT_RX_BYPASS BIT(27)
+#define   AN8855_RG_RATE_ADAPT_TX_BYPASS BIT(26)
+#define   AN8855_RG_RATE_ADAPT_RX_EN	BIT(4)
+#define   AN8855_RG_RATE_ADAPT_TX_EN	BIT(0)
+#define AN8855_RATE_ADP_P0_CTRL_0	0x10226100
+#define   AN8855_RG_P0_DIS_MII_MODE	BIT(31)
+#define   AN8855_RG_P0_MII_MODE		BIT(28)
+#define   AN8855_RG_P0_MII_RA_RX_EN	BIT(3)
+#define   AN8855_RG_P0_MII_RA_TX_EN	BIT(2)
+#define   AN8855_RG_P0_MII_RA_RX_MODE	BIT(1)
+#define   AN8855_RG_P0_MII_RA_TX_MODE	BIT(0)
+#define AN8855_MII_RA_AN_ENABLE		0x10226300
+#define   AN8855_RG_P0_RA_AN_EN		BIT(0)
+
+/*	AN8855_QP_DIG_CSR_BASE		0x1022a000 */
+#define AN8855_QP_CK_RST_CTRL_4		0x1022a310
+#define AN8855_QP_DIG_MODE_CTRL_0	0x1022a324
+#define   AN8855_RG_SGMII_MODE		GENMASK(5, 4)
+#define   AN8855_RG_SGMII_AN_EN		BIT(0)
+#define AN8855_QP_DIG_MODE_CTRL_1	0x1022a330
+#define   AN8855_RG_TPHY_SPEED		GENMASK(3, 2)
+
+/*	AN8855_SERDES_WRAPPER_BASE	0x1022c000 */
+#define AN8855_USGMII_CTRL_0		0x1022c000
+
+/*	AN8855_QP_PMA_TOP_BASE		0x1022e000 */
+#define AN8855_PON_RXFEDIG_CTRL_0	0x1022e100
+#define   AN8855_RG_QP_EQ_RX500M_CK_SEL	BIT(12)
+#define AN8855_PON_RXFEDIG_CTRL_9	0x1022e124
+#define   AN8855_RG_QP_EQ_LEQOSC_DLYCNT	GENMASK(2, 0)
+
+#define AN8855_SS_LCPLL_PWCTL_SETTING_2	0x1022e208
+#define   AN8855_RG_NCPO_ANA_MSB	GENMASK(17, 16)
+#define AN8855_SS_LCPLL_TDC_FLT_2	0x1022e230
+#define   AN8855_RG_LCPLL_NCPO_VALUE	GENMASK(30, 0)
+#define AN8855_SS_LCPLL_TDC_FLT_5	0x1022e23c
+#define   AN8855_RG_LCPLL_NCPO_CHG	BIT(24)
+#define AN8855_SS_LCPLL_TDC_PCW_1	0x1022e248
+#define  AN8855_RG_LCPLL_PON_HRDDS_PCW_NCPO_GPON GENMASK(30, 0)
+#define AN8855_INTF_CTRL_8		0x1022e320
+#define AN8855_INTF_CTRL_9		0x1022e324
+#define AN8855_INTF_CTRL_10		0x1022e328
+#define   AN8855_RG_DA_QP_TX_FIR_C2_SEL	BIT(29)
+#define   AN8855_RG_DA_QP_TX_FIR_C2_FORCE GENMASK(28, 24)
+#define   AN8855_RG_DA_QP_TX_FIR_C1_SEL	BIT(21)
+#define   AN8855_RG_DA_QP_TX_FIR_C1_FORCE GENMASK(20, 16)
+#define AN8855_INTF_CTRL_11		0x1022e32c
+#define   AN8855_RG_DA_QP_TX_FIR_C0B_SEL BIT(6)
+#define   AN8855_RG_DA_QP_TX_FIR_C0B_FORCE GENMASK(5, 0)
+#define AN8855_PLL_CTRL_0		0x1022e400
+#define   AN8855_RG_PHYA_AUTO_INIT	BIT(0)
+#define AN8855_PLL_CTRL_2		0x1022e408
+#define   AN8855_RG_DA_QP_PLL_SDM_IFM_INTF BIT(30)
+#define   AN8855_RG_DA_QP_PLL_RICO_SEL_INTF BIT(29)
+#define   AN8855_RG_DA_QP_PLL_POSTDIV_EN_INTF BIT(28)
+#define   AN8855_RG_DA_QP_PLL_PHY_CK_EN_INTF BIT(27)
+#define   AN8855_RG_DA_QP_PLL_PFD_OFFSET_EN_INTRF BIT(26)
+#define   AN8855_RG_DA_QP_PLL_PFD_OFFSET_INTF GENMASK(25, 24)
+#define   AN8855_RG_DA_QP_PLL_PCK_SEL_INTF BIT(22)
+#define   AN8855_RG_DA_QP_PLL_KBAND_PREDIV_INTF GENMASK(21, 20)
+#define   AN8855_RG_DA_QP_PLL_IR_INTF	GENMASK(19, 16)
+#define   AN8855_RG_DA_QP_PLL_ICOIQ_EN_INTF BIT(14)
+#define   AN8855_RG_DA_QP_PLL_FBKSEL_INTF GENMASK(13, 12)
+#define   AN8855_RG_DA_QP_PLL_BR_INTF	GENMASK(10, 8)
+#define   AN8855_RG_DA_QP_PLL_BPD_INTF	GENMASK(7, 6)
+#define   AN8855_RG_DA_QP_PLL_BPA_INTF	GENMASK(4, 2)
+#define   AN8855_RG_DA_QP_PLL_BC_INTF	GENMASK(1, 0)
+#define AN8855_PLL_CTRL_3		0x1022e40c
+#define   AN8855_RG_DA_QP_PLL_SSC_PERIOD_INTF GENMASK(31, 16)
+#define   AN8855_RG_DA_QP_PLL_SSC_DELTA_INTF GENMASK(15, 0)
+#define AN8855_PLL_CTRL_4		0x1022e410
+#define   AN8855_RG_DA_QP_PLL_SDM_HREN_INTF GENMASK(4, 3)
+#define   AN8855_RG_DA_QP_PLL_ICOLP_EN_INTF BIT(2)
+#define   AN8855_RG_DA_QP_PLL_SSC_DIR_DLY_INTF GENMASK(1, 0)
+#define AN8855_PLL_CK_CTRL_0		0x1022e414
+#define   AN8855_RG_DA_QP_PLL_TDC_TXCK_SEL_INTF BIT(9)
+#define   AN8855_RG_DA_QP_PLL_SDM_DI_EN_INTF BIT(8)
+#define AN8855_RX_DLY_0			0x1022e614
+#define   AN8855_RG_QP_RX_SAOSC_EN_H_DLY GENMASK(13, 8)
+#define   AN8855_RG_QP_RX_PI_CAL_EN_H_DLY GENMASK(7, 0)
+#define AN8855_RX_CTRL_2		0x1022e630
+#define   AN8855_RG_QP_RX_EQ_EN_H_DLY	GENMASK(28, 16)
+#define AN8855_RX_CTRL_5		0x1022e63c
+#define   AN8855_RG_FREDET_CHK_CYCLE	GENMASK(29, 10)
+#define AN8855_RX_CTRL_6		0x1022e640
+#define   AN8855_RG_FREDET_GOLDEN_CYCLE	GENMASK(19, 0)
+#define AN8855_RX_CTRL_7		0x1022e644
+#define   AN8855_RG_FREDET_TOLERATE_CYCLE GENMASK(19, 0)
+#define AN8855_RX_CTRL_8		0x1022e648
+#define   AN8855_RG_DA_QP_SAOSC_DONE_TIME GENMASK(27, 16)
+#define   AN8855_RG_DA_QP_LEQOS_EN_TIME	GENMASK(14, 0)
+#define AN8855_RX_CTRL_26		0x1022e690
+#define   AN8855_RG_QP_EQ_RETRAIN_ONLY_EN BIT(26)
+#define   AN8855_RG_LINK_NE_EN		BIT(24)
+#define   AN8855_RG_LINK_ERRO_EN	BIT(23)
+#define AN8855_RX_CTRL_42		0x1022e6d0
+#define   AN8855_RG_QP_EQ_EN_DLY	GENMASK(12, 0)
+
+/*	AN8855_QP_ANA_CSR_BASE		0x1022f000 */
+#define AN8855_RG_QP_RX_DAC_EN		0x1022f000
+#define   AN8855_RG_QP_SIGDET_HF	GENMASK(17, 16)
+#define AN8855_RG_QP_RXAFE_RESERVE	0x1022f004
+#define   AN8855_RG_QP_CDR_PD_10B_EN	BIT(11)
+#define AN8855_RG_QP_CDR_LPF_BOT_LIM	0x1022f008
+#define   AN8855_RG_QP_CDR_LPF_KP_GAIN	GENMASK(26, 24)
+#define   AN8855_RG_QP_CDR_LPF_KI_GAIN	GENMASK(22, 20)
+#define AN8855_RG_QP_CDR_LPF_MJV_LIM	0x1022f00c
+#define   AN8855_RG_QP_CDR_LPF_RATIO	GENMASK(5, 4)
+#define AN8855_RG_QP_CDR_LPF_SETVALUE	0x1022f014
+#define   AN8855_RG_QP_CDR_PR_BUF_IN_SR	GENMASK(31, 29)
+#define   AN8855_RG_QP_CDR_PR_BETA_SEL	GENMASK(28, 25)
+#define AN8855_RG_QP_CDR_PR_CKREF_DIV1	0x1022f018
+#define   AN8855_RG_QP_CDR_PR_KBAND_DIV	GENMASK(26, 24)
+#define   AN8855_RG_QP_CDR_PR_DAC_BAND	GENMASK(12, 8)
+#define AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE 0x1022f01c
+#define   AN8855_RG_QP_CDR_PR_XFICK_EN	BIT(30)
+#define   AN8855_RG_QP_CDR_PR_KBAND_PCIE_MODE BIT(6)
+#define   AN8855_RG_QP_CDR_PR_KBAND_DIV_PCIE_MASK GENMASK(5, 0)
+#define AN8855_RG_QP_CDR_FORCE_IBANDLPF_R_OFF 0x1022f020
+#define   AN8855_RG_QP_CDR_PHYCK_SEL	GENMASK(17, 16)
+#define   AN8855_RG_QP_CDR_PHYCK_RSTB	BIT(13)
+#define   AN8855_RG_QP_CDR_PHYCK_DIV	GENMASK(12, 6)
+#define AN8855_RG_QP_TX_MODE		0x1022f028
+#define   AN8855_RG_QP_TX_RESERVE	GENMASK(31, 16)
+#define   AN8855_RG_QP_TX_MODE_16B_EN	BIT(0)
+#define AN8855_RG_QP_PLL_IPLL_DIG_PWR_SEL 0x1022f03c
+#define AN8855_RG_QP_PLL_SDM_ORD	0x1022f040
+#define   AN8855_RG_QP_PLL_SSC_PHASE_INI BIT(4)
+#define   AN8855_RG_QP_PLL_SSC_TRI_EN	BIT(3)
+
+/*	AN8855_ETHER_SYS_BASE		0x1028c800 */
+#define AN8855_RG_GPHY_AFE_PWD		0x1028c840
+#define AN8855_RG_GPHY_SMI_ADDR		0x1028c848
+
+#define MIB_DESC(_s, _o, _n)	\
+	{			\
+		.size = (_s),	\
+		.offset = (_o),	\
+		.name = (_n),	\
+	}
+
+struct an8855_mib_desc {
+	unsigned int size;
+	unsigned int offset;
+	const char *name;
+};
+
+struct an8855_fdb {
+	u16 vid;
+	u8 port_mask;
+	u16 aging;
+	u8 mac[6];
+	bool noarp;
+	u8 live;
+	u8 type;
+	u8 fid;
+	u8 ivl;
+};
+
+struct an8855_priv {
+	struct device *dev;
+	struct dsa_switch *ds;
+	struct regmap *regmap;
+	struct gpio_desc *reset_gpio;
+	/* Protect ATU or VLAN table access */
+	struct mutex reg_mutex;
+
+	struct phylink_pcs pcs;
+
+	u8 mirror_rx;
+	u8 mirror_tx;
+	u8 port_isolated_map;
+
+	bool phy_require_calib;
+};
+
+#endif /* __AN8855_H */
diff --git a/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c b/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c
new file mode 100644
index 0000000000..5feba72c02
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/mdio/mdio-an8855.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MDIO passthrough driver for Airoha AN8855 Switch
+ */
+
+#include <linux/mfd/airoha-an8855-mfd.h>
+#include <linux/module.h>
+#include <linux/of_mdio.h>
+#include <linux/platform_device.h>
+
+static int an855_phy_restore_page(struct an8855_mfd_priv *priv,
+				  int phy) __must_hold(&priv->bus->mdio_lock)
+{
+	/* Check PHY page only for addr shared with switch */
+	if (phy != priv->switch_addr)
+		return 0;
+
+	/* Don't restore page if it's not set to switch page */
+	if (priv->current_page != FIELD_GET(AN8855_PHY_PAGE,
+					    AN8855_PHY_PAGE_EXTENDED_4))
+		return 0;
+
+	/* Restore page to 0, PHY might change page right after but that
+	 * will be ignored as it won't be a switch page.
+	 */
+	return an8855_mii_set_page(priv, phy, AN8855_PHY_PAGE_STANDARD);
+}
+
+static int an8855_phy_read(struct mii_bus *bus, int phy, int regnum)
+{
+	struct an8855_mfd_priv *priv = bus->priv;
+	struct mii_bus *real_bus = priv->bus;
+	int ret;
+
+	mutex_lock_nested(&real_bus->mdio_lock, MDIO_MUTEX_NESTED);
+
+	ret = an855_phy_restore_page(priv, phy);
+	if (ret)
+		goto exit;
+
+	ret = __mdiobus_read(real_bus, phy, regnum);
+exit:
+	mutex_unlock(&real_bus->mdio_lock);
+
+	return ret;
+}
+
+static int an8855_phy_write(struct mii_bus *bus, int phy, int regnum, u16 val)
+{
+	struct an8855_mfd_priv *priv = bus->priv;
+	struct mii_bus *real_bus = priv->bus;
+	int ret;
+
+	mutex_lock_nested(&real_bus->mdio_lock, MDIO_MUTEX_NESTED);
+
+	ret = an855_phy_restore_page(priv, phy);
+	if (ret)
+		goto exit;
+
+	ret = __mdiobus_write(real_bus, phy, regnum, val);
+exit:
+	mutex_unlock(&real_bus->mdio_lock);
+
+	return ret;
+}
+
+static int an8855_mdio_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct an8855_mfd_priv *priv;
+	struct mii_bus *bus;
+	int ret;
+
+	/* Get priv of MFD */
+	priv = dev_get_drvdata(dev->parent);
+
+	bus = devm_mdiobus_alloc(dev);
+	if (!bus)
+		return -ENOMEM;
+
+	bus->priv = priv;
+	bus->name = KBUILD_MODNAME "-mii";
+	snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d",
+		 priv->switch_addr);
+	bus->parent = dev;
+	bus->read = an8855_phy_read;
+	bus->write = an8855_phy_write;
+
+	ret = devm_of_mdiobus_register(dev, bus, dev->of_node);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to register MDIO bus\n");
+
+	return ret;
+}
+
+static const struct of_device_id an8855_mdio_of_match[] = {
+	{ .compatible = "airoha,an8855-mdio", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_mdio_of_match);
+
+static struct platform_driver an8855_mdio_driver = {
+	.probe	= an8855_mdio_probe,
+	.driver = {
+		.name = "an8855-mdio",
+		.of_match_table = an8855_mdio_of_match,
+	},
+};
+module_platform_driver(an8855_mdio_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for AN8855 MDIO passthrough");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c b/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c
new file mode 100644
index 0000000000..7fab0854ef
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/net/phy/air_an8855.c
@@ -0,0 +1,267 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Christian Marangi <ansuelsmth at gmail.com>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/phy.h>
+
+#define AN8855_PHY_SELECT_PAGE			0x1f
+#define   AN8855_PHY_PAGE			GENMASK(2, 0)
+#define   AN8855_PHY_PAGE_STANDARD		FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x0)
+#define   AN8855_PHY_PAGE_EXTENDED_1		FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x1)
+
+/* MII Registers Page 1 */
+#define AN8855_PHY_EXT_REG_14			0x14
+#define   AN8855_PHY_EN_DOWN_SHIFT		BIT(4)
+
+/* R50 Calibration regs in MDIO_MMD_VEND1 */
+#define AN8855_PHY_R500HM_RSEL_TX_AB		0x174
+#define AN8855_PHY_R50OHM_RSEL_TX_A_EN		BIT(15)
+#define AN8855_PHY_R50OHM_RSEL_TX_A		GENMASK(14, 8)
+#define AN8855_PHY_R50OHM_RSEL_TX_B_EN		BIT(7)
+#define AN8855_PHY_R50OHM_RSEL_TX_B		GENMASK(6, 0)
+#define AN8855_PHY_R500HM_RSEL_TX_CD		0x175
+#define AN8855_PHY_R50OHM_RSEL_TX_C_EN		BIT(15)
+#define AN8855_PHY_R50OHM_RSEL_TX_C		GENMASK(14, 8)
+#define AN8855_PHY_R50OHM_RSEL_TX_D_EN		BIT(7)
+#define AN8855_PHY_R50OHM_RSEL_TX_D		GENMASK(6, 0)
+
+#define AN8855_SWITCH_EFUSE_R50O		GENMASK(30, 24)
+
+/* PHY TX PAIR DELAY SELECT Register */
+#define AN8855_PHY_TX_PAIR_DLY_SEL_GBE		0x013
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_A_GBE GENMASK(14, 12)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_B_GBE GENMASK(10, 8)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_C_GBE GENMASK(6, 4)
+#define   AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_D_GBE GENMASK(2, 0)
+/* PHY ADC Register */
+#define AN8855_PHY_RXADC_CTRL			0x0d8
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_A	BIT(12)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_B	BIT(8)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_C	BIT(4)
+#define   AN8855_PHY_RG_AD_SAMNPLE_PHSEL_D	BIT(0)
+#define AN8855_PHY_RXADC_REV_0			0x0d9
+#define   AN8855_PHY_RG_AD_RESERVE0_A		GENMASK(15, 8)
+#define   AN8855_PHY_RG_AD_RESERVE0_B		GENMASK(7, 0)
+#define AN8855_PHY_RXADC_REV_1			0x0da
+#define   AN8855_PHY_RG_AD_RESERVE0_C		GENMASK(15, 8)
+#define   AN8855_PHY_RG_AD_RESERVE0_D		GENMASK(7, 0)
+
+#define AN8855_PHY_ID				0xc0ff0410
+
+#define AN8855_PHY_FLAGS_EN_CALIBRATION		BIT(0)
+
+struct air_an8855_priv {
+	u8 calibration_data[4];
+};
+
+static const u8 dsa_r50ohm_table[] = {
+	127, 127, 127, 127, 127, 127, 127, 127, 127, 127,
+	127, 127, 127, 127, 127, 127, 127, 126, 122, 117,
+	112, 109, 104, 101,  97,  94,  90,  88,  84,  80,
+	78,  74,  72,  68,  66,  64,  61,  58,  56,  53,
+	51,  48,  47,  44,  42,  40,  38,  36,  34,  32,
+	31,  28,  27,  24,  24,  22,  20,  18,  16,  16,
+	14,  12,  11,   9
+};
+
+static int en8855_get_r50ohm_val(struct device *dev, const char *calib_name,
+				 u8 *dest)
+{
+	u32 shift_sel, val;
+	int ret;
+	int i;
+
+	ret = nvmem_cell_read_u32(dev, calib_name, &val);
+	if (ret)
+		return ret;
+
+	shift_sel = FIELD_GET(AN8855_SWITCH_EFUSE_R50O, val);
+	for (i = 0; i < ARRAY_SIZE(dsa_r50ohm_table); i++)
+		if (dsa_r50ohm_table[i] == shift_sel)
+			break;
+
+	if (i < 8 || i >= ARRAY_SIZE(dsa_r50ohm_table))
+		*dest = dsa_r50ohm_table[25];
+	else
+		*dest = dsa_r50ohm_table[i - 8];
+
+	return 0;
+}
+
+static int an8855_probe(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	struct device_node *node = dev->of_node;
+	struct air_an8855_priv *priv;
+
+	/* If we don't have a node, skip calib */
+	if (!node)
+		return 0;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	phydev->priv = priv;
+
+	return 0;
+}
+
+static int an8855_get_downshift(struct phy_device *phydev, u8 *data)
+{
+	int val;
+
+	val = phy_read_paged(phydev, AN8855_PHY_PAGE_EXTENDED_1, AN8855_PHY_EXT_REG_14);
+	if (val < 0)
+		return val;
+
+	*data = val & AN8855_PHY_EN_DOWN_SHIFT ? DOWNSHIFT_DEV_DEFAULT_COUNT :
+						 DOWNSHIFT_DEV_DISABLE;
+
+	return 0;
+}
+
+static int an8855_set_downshift(struct phy_device *phydev, u8 cnt)
+{
+	u16 ds = cnt != DOWNSHIFT_DEV_DISABLE ? AN8855_PHY_EN_DOWN_SHIFT : 0;
+
+	return phy_modify_paged(phydev, AN8855_PHY_PAGE_EXTENDED_1,
+				AN8855_PHY_EXT_REG_14, AN8855_PHY_EN_DOWN_SHIFT,
+				ds);
+}
+
+static int an8855_config_init(struct phy_device *phydev)
+{
+	struct air_an8855_priv *priv = phydev->priv;
+	struct device *dev = &phydev->mdio.dev;
+	int ret;
+
+	/* Enable HW auto downshift */
+	ret = an8855_set_downshift(phydev, DOWNSHIFT_DEV_DEFAULT_COUNT);
+	if (ret)
+		return ret;
+
+	/* Apply calibration values, if needed.
+	 * AN8855_PHY_FLAGS_EN_CALIBRATION signal this.
+	 */
+	if (priv && phydev->dev_flags & AN8855_PHY_FLAGS_EN_CALIBRATION) {
+		u8 *calibration_data = priv->calibration_data;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_a", &calibration_data[0]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_b", &calibration_data[1]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_c", &calibration_data[2]);
+		if (ret)
+			return ret;
+
+		ret = en8855_get_r50ohm_val(dev, "tx_d", &calibration_data[3]);
+		if (ret)
+			return ret;
+
+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_R500HM_RSEL_TX_AB,
+				     AN8855_PHY_R50OHM_RSEL_TX_A | AN8855_PHY_R50OHM_RSEL_TX_B,
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_A, calibration_data[0]) |
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_B, calibration_data[1]));
+		if (ret)
+			return ret;
+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_R500HM_RSEL_TX_CD,
+				     AN8855_PHY_R50OHM_RSEL_TX_C | AN8855_PHY_R50OHM_RSEL_TX_D,
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_C, calibration_data[2]) |
+				     FIELD_PREP(AN8855_PHY_R50OHM_RSEL_TX_D, calibration_data[3]));
+		if (ret)
+			return ret;
+	}
+
+	/* Apply values to reduce signal noise */
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_TX_PAIR_DLY_SEL_GBE,
+			    FIELD_PREP(AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_A_GBE, 0x4) |
+			    FIELD_PREP(AN8855_PHY_CR_DA_TX_PAIR_DELKAY_SEL_C_GBE, 0x4));
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_CTRL,
+			    AN8855_PHY_RG_AD_SAMNPLE_PHSEL_A |
+			    AN8855_PHY_RG_AD_SAMNPLE_PHSEL_C);
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_REV_0,
+			    FIELD_PREP(AN8855_PHY_RG_AD_RESERVE0_A, 0x1));
+	if (ret)
+		return ret;
+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, AN8855_PHY_RXADC_REV_1,
+			    FIELD_PREP(AN8855_PHY_RG_AD_RESERVE0_C, 0x1));
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int an8855_get_tunable(struct phy_device *phydev,
+			      struct ethtool_tunable *tuna, void *data)
+{
+	switch (tuna->id) {
+	case ETHTOOL_PHY_DOWNSHIFT:
+		return an8855_get_downshift(phydev, data);
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int an8855_set_tunable(struct phy_device *phydev,
+			      struct ethtool_tunable *tuna, const void *data)
+{
+	switch (tuna->id) {
+	case ETHTOOL_PHY_DOWNSHIFT:
+		return an8855_set_downshift(phydev, *(const u8 *)data);
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int an8855_read_page(struct phy_device *phydev)
+{
+	return __phy_read(phydev, AN8855_PHY_SELECT_PAGE);
+}
+
+static int an8855_write_page(struct phy_device *phydev, int page)
+{
+	return __phy_write(phydev, AN8855_PHY_SELECT_PAGE, page);
+}
+
+static struct phy_driver an8855_driver[] = {
+{
+	PHY_ID_MATCH_EXACT(AN8855_PHY_ID),
+	.name			= "Airoha AN8855 internal PHY",
+	/* PHY_GBIT_FEATURES */
+	.flags			= PHY_IS_INTERNAL,
+	.probe			= an8855_probe,
+	.config_init		= an8855_config_init,
+	.soft_reset		= genphy_soft_reset,
+	.get_tunable		= an8855_get_tunable,
+	.set_tunable		= an8855_set_tunable,
+	.suspend		= genphy_suspend,
+	.resume			= genphy_resume,
+	.read_page		= an8855_read_page,
+	.write_page		= an8855_write_page,
+}, };
+
+module_phy_driver(an8855_driver);
+
+static struct mdio_device_id __maybe_unused an8855_tbl[] = {
+	{ PHY_ID_MATCH_EXACT(AN8855_PHY_ID) },
+	{ }
+};
+
+MODULE_DEVICE_TABLE(mdio, an8855_tbl);
+
+MODULE_DESCRIPTION("Airoha AN8855 PHY driver");
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c b/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c
new file mode 100644
index 0000000000..7940453d6e
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/drivers/nvmem/an8855-efuse.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Airoha AN8855 Switch EFUSE Driver
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define AN8855_EFUSE_CELL		50
+
+#define AN8855_EFUSE_DATA0		0x1000a500
+#define   AN8855_EFUSE_R50O		GENMASK(30, 24)
+
+static int an8855_efuse_read(void *context, unsigned int offset,
+			     void *val, size_t bytes)
+{
+	struct regmap *regmap = context;
+
+	return regmap_bulk_read(regmap, AN8855_EFUSE_DATA0 + offset,
+				val, bytes / sizeof(u32));
+}
+
+static int an8855_efuse_probe(struct platform_device *pdev)
+{
+	struct nvmem_config an8855_nvmem_config = {
+		.name = "an8855-efuse",
+		.size = AN8855_EFUSE_CELL * sizeof(u32),
+		.stride = sizeof(u32),
+		.word_size = sizeof(u32),
+		.reg_read = an8855_efuse_read,
+	};
+	struct device *dev = &pdev->dev;
+	struct nvmem_device *nvmem;
+
+	/* Assign NVMEM priv to MFD regmap */
+	an8855_nvmem_config.priv = dev_get_regmap(dev->parent, NULL);
+	an8855_nvmem_config.dev = dev;
+	nvmem = devm_nvmem_register(dev, &an8855_nvmem_config);
+
+	return PTR_ERR_OR_ZERO(nvmem);
+}
+
+static const struct of_device_id an8855_efuse_of_match[] = {
+	{ .compatible = "airoha,an8855-efuse", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, an8855_efuse_of_match);
+
+static struct platform_driver an8855_efuse_driver = {
+	.probe = an8855_efuse_probe,
+	.driver = {
+		.name = "an8855-efuse",
+		.of_match_table = an8855_efuse_of_match,
+	},
+};
+module_platform_driver(an8855_efuse_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth at gmail.com>");
+MODULE_DESCRIPTION("Driver for AN8855 Switch EFUSE");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h b/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h
new file mode 100644
index 0000000000..56061566a0
--- /dev/null
+++ b/target/linux/mediatek/files-6.6/include/linux/mfd/airoha-an8855-mfd.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * MFD driver for Airoha AN8855 Switch
+ */
+#ifndef _LINUX_INCLUDE_MFD_AIROHA_AN8855_MFD_H
+#define _LINUX_INCLUDE_MFD_AIROHA_AN8855_MFD_H
+
+#include <linux/bitfield.h>
+
+/* MII Registers */
+#define AN8855_PHY_SELECT_PAGE		0x1f
+#define   AN8855_PHY_PAGE		GENMASK(2, 0)
+#define   AN8855_PHY_PAGE_STANDARD	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x0)
+#define   AN8855_PHY_PAGE_EXTENDED_1	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x1)
+#define   AN8855_PHY_PAGE_EXTENDED_4	FIELD_PREP_CONST(AN8855_PHY_PAGE, 0x4)
+
+/* MII Registers Page 4 */
+#define AN8855_PBUS_MODE		0x10
+#define   AN8855_PBUS_MODE_ADDR_FIXED	0x0
+#define AN8855_PBUS_MODE_ADDR_INCR	BIT(15)
+#define AN8855_PBUS_WR_ADDR_HIGH	0x11
+#define AN8855_PBUS_WR_ADDR_LOW		0x12
+#define AN8855_PBUS_WR_DATA_HIGH	0x13
+#define AN8855_PBUS_WR_DATA_LOW		0x14
+#define AN8855_PBUS_RD_ADDR_HIGH	0x15
+#define AN8855_PBUS_RD_ADDR_LOW		0x16
+#define AN8855_PBUS_RD_DATA_HIGH	0x17
+#define AN8855_PBUS_RD_DATA_LOW		0x18
+
+struct an8855_mfd_priv {
+	struct device *dev;
+	struct mii_bus *bus;
+
+	unsigned int switch_addr;
+	u16 current_page;
+};
+
+int an8855_mii_set_page(struct an8855_mfd_priv *priv, u8 phy_id,
+			u8 page);
+
+#endif
diff --git a/target/linux/mediatek/filogic/config-6.6 b/target/linux/mediatek/filogic/config-6.6
index 408ac5483e..8b8444175d 100644
--- a/target/linux/mediatek/filogic/config-6.6
+++ b/target/linux/mediatek/filogic/config-6.6
@@ -1,5 +1,6 @@
 CONFIG_64BIT=y
 # CONFIG_AHCI_MTK is not set
+CONFIG_AIR_AN8855_PHY=y
 CONFIG_AIROHA_EN8801SC_PHY=y
 CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
 CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
@@ -236,12 +237,14 @@ CONFIG_MAXLINEAR_GPHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+CONFIG_MDIO_AN8855=y
 CONFIG_MEDIATEK_2P5GE_PHY=y
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_GE_SOC_PHY=y
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_MFD_SYSCON=y
+CONFIG_MFD_AIROHA_AN8855=y
 CONFIG_MIGRATION=y
 # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
 CONFIG_MMC=y
@@ -290,6 +293,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+CONFIG_NET_DSA_AN8855=y
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 CONFIG_NET_DSA_MT7530_MMIO=y
@@ -308,6 +312,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=4
 CONFIG_NVMEM=y
+CONFIG_NVMEM_AN8855_EFUSE=y
 CONFIG_NVMEM_BLOCK=y
 CONFIG_NVMEM_LAYOUTS=y
 CONFIG_NVMEM_LAYOUT_ADTRAN=y
diff --git a/target/linux/mediatek/mt7622/config-6.6 b/target/linux/mediatek/mt7622/config-6.6
index ec3be8df9a..c3c8b60684 100644
--- a/target/linux/mediatek/mt7622/config-6.6
+++ b/target/linux/mediatek/mt7622/config-6.6
@@ -1,5 +1,6 @@
 CONFIG_64BIT=y
 # CONFIG_AHCI_MTK is not set
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_AQUANTIA_PHY=y
 CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
@@ -240,12 +241,14 @@ CONFIG_MAXLINEAR_GPHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 # CONFIG_MEDIATEK_2P5GE_PHY is not set
 CONFIG_MEDIATEK_GE_PHY=y
 # CONFIG_MEDIATEK_GE_SOC_PHY is not set
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGRATION=y
 # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
 CONFIG_MMC=y
@@ -294,6 +297,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -312,6 +316,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_BLOCK=y
 CONFIG_NVMEM_LAYOUTS=y
 CONFIG_NVMEM_LAYOUT_ADTRAN=y
diff --git a/target/linux/mediatek/mt7623/config-6.6 b/target/linux/mediatek/mt7623/config-6.6
index 6bc92a09dc..9d12c48eee 100644
--- a/target/linux/mediatek/mt7623/config-6.6
+++ b/target/linux/mediatek/mt7623/config-6.6
@@ -1,4 +1,5 @@
 # CONFIG_AIO is not set
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ARCH_32BIT_OFF_T=y
@@ -352,6 +353,7 @@ CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 CONFIG_MDIO_GPIO=y
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_MT6577_AUXADC=y
@@ -361,6 +363,7 @@ CONFIG_MFD_CORE=y
 # CONFIG_MFD_HI6421_SPMI is not set
 CONFIG_MFD_MT6397=y
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGRATION=y
 CONFIG_MMC=y
@@ -410,6 +413,7 @@ CONFIG_NEED_SRCU_NMI_SAFE=y
 CONFIG_NEON=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -431,6 +435,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=4
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_LAYOUTS=y
 # CONFIG_NVMEM_LAYOUT_ADTRAN is not set
 CONFIG_NVMEM_MTK_EFUSE=y
diff --git a/target/linux/mediatek/mt7629/config-6.6 b/target/linux/mediatek/mt7629/config-6.6
index 9f57bda3e9..d66a514f63 100644
--- a/target/linux/mediatek/mt7629/config-6.6
+++ b/target/linux/mediatek/mt7629/config-6.6
@@ -1,3 +1,4 @@
+# CONFIG_AIR_AN8855_PHY is not set
 # CONFIG_AIROHA_EN8801SC_PHY is not set
 CONFIG_ALIGNMENT_TRAP=y
 CONFIG_ARCH_32BIT_OFF_T=y
@@ -181,9 +182,11 @@ CONFIG_MACH_MT7629=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+# CONFIG_MDIO_AN8855 is not set
 CONFIG_MEDIATEK_GE_PHY=y
 CONFIG_MEDIATEK_WATCHDOG=y
 CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_AIROHA_AN8855 is not set
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGRATION=y
 CONFIG_MMU_LAZY_TLB_REFCOUNT=y
@@ -216,6 +219,7 @@ CONFIG_NETFILTER=y
 CONFIG_NETFILTER_BPF_LINK=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_AN8855 is not set
 CONFIG_NET_DSA_MT7530=y
 CONFIG_NET_DSA_MT7530_MDIO=y
 # CONFIG_NET_DSA_MT7530_MMIO is not set
@@ -234,6 +238,7 @@ CONFIG_NO_HZ_COMMON=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_NR_CPUS=2
 CONFIG_NVMEM=y
+# CONFIG_NVMEM_AN8855_EFUSE is not set
 CONFIG_NVMEM_LAYOUTS=y
 # CONFIG_NVMEM_LAYOUT_ADTRAN is not set
 # CONFIG_NVMEM_MTK_EFUSE is not set
diff --git a/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch b/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch
new file mode 100644
index 0000000000..bd70bec4b3
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/737-net-dsa-add-Airoha-AN8855.patch
@@ -0,0 +1,309 @@
+From: Christian Marangi <ansuelsmth at gmail.com>
+To: Christian Marangi <ansuelsmth at gmail.com>,
+	Lee Jones <lee at kernel.org>, Rob Herring <robh at kernel.org>,
+	Krzysztof Kozlowski <krzk+dt at kernel.org>,
+	Conor Dooley <conor+dt at kernel.org>,
+	Andrew Lunn <andrew+netdev at lunn.ch>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Jakub Kicinski <kuba at kernel.org>, Paolo Abeni <pabeni at redhat.com>,
+	Vladimir Oltean <olteanv at gmail.com>,
+	Srinivas Kandagatla <srinivas.kandagatla at linaro.org>,
+	Heiner Kallweit <hkallweit1 at gmail.com>,
+	Russell King <linux at armlinux.org.uk>,
+	Matthias Brugger <matthias.bgg at gmail.com>,
+	AngeloGioacchino Del Regno
+	<angelogioacchino.delregno at collabora.com>,
+	linux-arm-kernel at lists.infradead.org,
+	linux-mediatek at lists.infradead.org, netdev at vger.kernel.org,
+	devicetree at vger.kernel.org, linux-kernel at vger.kernel.org,
+	upstream at airoha.com
+Subject: [net-next PATCH v11 0/9] net: dsa: Add Airoha AN8855 support
+Date: Mon,  9 Dec 2024 14:44:17 +0100	[thread overview]
+Message-ID: <20241209134459.27110-1-ansuelsmth at gmail.com> (raw)
+
+This small series add the initial support for the Airoha AN8855 Switch.
+
+It's a 5 port Gigabit Switch with SGMII/HSGMII upstream port.
+
+This is starting to get in the wild and there are already some router
+having this switch chip.
+
+It's conceptually similar to mediatek switch but register and bits
+are different. And there is that massive Hell that is the PCS
+configuration.
+Saddly for that part we have absolutely NO documentation currently.
+
+There is this special thing where PHY needs to be calibrated with values
+from the switch efuse. (the thing have a whole cpu timer and MCU)
+
+Changes v11:
+- Address reviews from Christophe (spell mistake + dev_err_probe)
+- Fix kconfig dependency for MFD driver (depends on MDIO_DEVICE instead of MDIO)
+  (indirectly fix link error for mdio APIs)
+- Fix copy-paste error for MFD driver of_table
+- Fix compilation error for PHY (move NVMEM to .config)
+- Drop unneeded NVMEM node from MDIO example schema (from Andrew)
+- Adapt MFD example schema to MDIO reg property restrictions
+Changes v10:
+- Entire rework to MFD + split to MDIO, EFUSE, SWITCH separate drivers
+- Drop EEE OPs (while Russell finish RFC for EEE changes)
+- Use new pcs_inpand OPs
+- Drop AN restart function and move to pcs_config
+- Enable assisted_learning and disable CPU learn (preparation for fdb_isolation)
+- Move EFUSE read in Internal PHY driver to .config to handle EPROBE_DEFER
+  (needed now that NVMEM driver is register externally instead of internally to switch
+   node)
+Changes v9:
+- Error out on using 5G speed as currently not supported
+- Add missing MAC_2500FD in phylink mac_capabilities
+- Add comment and improve if condition for an8855_phylink_mac_config
+Changes v8:
+- Add port Fast Age support
+- Add support for Port Isolation
+- Use correct register for Learning Disable
+- Add support for Ageing Time OP
+- Set default PVID to 0 by default
+- Add mdb OPs
+- Add port change MTU
+- Fix support for Upper VLAN
+Changes v7:
+- Fix devm_dsa_register_switch wrong export symbol
+Changes v6:
+- Drop standard MIB and handle with ethtool OPs (as requested by Jakub)
+- Cosmetic: use bool instead of 0 or 1
+Changes v5:
+- Add devm_dsa_register_switch() patch
+- Add Reviewed-by tag for DT patch
+Changes v4:
+- Set regmap readable_table static (mute compilation warning)
+- Add support for port_bridge flags (LEARNING, FLOOD)
+- Reset fdb struct in fdb_dump
+- Drop support_asym_pause in port_enable
+- Add define for get_phy_flags
+- Fix bug for port not inititially part of a bridge
+  (in an8855_setup the port matrix was always cleared but
+   the CPU port was never initially added)
+- Disable learning and flood for user port by default
+- Set CPU port to flood and learning by default
+- Correctly AND force duplex and flow control in an8855_phylink_mac_link_up
+- Drop RGMII from pcs_config
+- Check ret in "Disable AN if not in autoneg"
+- Use devm_mutex_init
+- Fix typo for AN8855_PORT_CHECK_MODE
+- Better define AN8855_STP_LISTENING = AN8855_STP_BLOCKING
+- Fix typo in AN8855_PHY_EN_DOWN_SHIFT
+- Use paged helper for PHY
+- Skip calibration in config_init if priv not defined
+Changes v3:
+- Out of RFC
+- Switch PHY code to select_page API
+- Better describe masks and bits in PHY driver for ADC register
+- Drop raw values and use define for mii read/write
+- Switch to absolute PHY address
+- Replace raw values with mask and bits for pcs_config
+- Fix typo for ext-surge property name
+- Drop support for relocating Switch base PHY address on the bus
+Changes v2:
+- Drop mutex guard patch
+- Drop guard usage in DSA driver
+- Use __mdiobus_write/read
+- Check return condition and return errors for mii read/write
+- Fix wrong logic for EEE
+- Fix link_down (don't force link down with autoneg)
+- Fix forcing speed on sgmii autoneg
+- Better document link speed for sgmii reg
+- Use standard define for sgmii reg
+- Imlement nvmem support to expose switch EFUSE
+- Rework PHY calibration with the use of NVMEM producer/consumer
+- Update DT with new NVMEM property
+- Move aneg validation for 2500-basex in pcs_config
+- Move r50Ohm table and function to PHY driver
+
+Christian Marangi (9):
+  dt-bindings: nvmem: Document support for Airoha AN8855 Switch EFUSE
+  dt-bindings: net: Document support for Airoha AN8855 Switch Virtual
+    MDIO
+  dt-bindings: net: dsa: Document support for Airoha AN8855 DSA Switch
+  dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC
+  mfd: an8855: Add support for Airoha AN8855 Switch MFD
+  net: mdio: Add Airoha AN8855 Switch MDIO Passtrough
+  nvmem: an8855: Add support for Airoha AN8855 Switch EFUSE
+  net: dsa: Add Airoha AN8855 5-Port Gigabit DSA Switch driver
+  net: phy: Add Airoha AN8855 Internal Switch Gigabit PHY
+
+ .../bindings/mfd/airoha,an8855-mfd.yaml       |  178 ++
+ .../bindings/net/airoha,an8855-mdio.yaml      |   56 +
+ .../net/dsa/airoha,an8855-switch.yaml         |  105 +
+ .../bindings/nvmem/airoha,an8855-efuse.yaml   |  123 +
+ MAINTAINERS                                   |   17 +
+ drivers/mfd/Kconfig                           |   10 +
+ drivers/mfd/Makefile                          |    1 +
+ drivers/mfd/airoha-an8855.c                   |  278 ++
+ drivers/net/dsa/Kconfig                       |    9 +
+ drivers/net/dsa/Makefile                      |    1 +
+ drivers/net/dsa/an8855.c                      | 2310 +++++++++++++++++
+ drivers/net/dsa/an8855.h                      |  783 ++++++
+ drivers/net/mdio/Kconfig                      |    9 +
+ drivers/net/mdio/Makefile                     |    1 +
+ drivers/net/mdio/mdio-an8855.c                |  113 +
+ drivers/net/phy/Kconfig                       |    5 +
+ drivers/net/phy/Makefile                      |    1 +
+ drivers/net/phy/air_an8855.c                  |  267 ++
+ drivers/nvmem/Kconfig                         |   11 +
+ drivers/nvmem/Makefile                        |    2 +
+ drivers/nvmem/an8855-efuse.c                  |   63 +
+ include/linux/mfd/airoha-an8855-mfd.h         |   41 +
+ 22 files changed, 4384 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/mfd/airoha,an8855-mfd.yaml
+ create mode 100644 Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml
+ create mode 100644 Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
+ create mode 100644 Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml
+ create mode 100644 drivers/mfd/airoha-an8855.c
+ create mode 100644 drivers/net/dsa/an8855.c
+ create mode 100644 drivers/net/dsa/an8855.h
+ create mode 100644 drivers/net/mdio/mdio-an8855.c
+ create mode 100644 drivers/net/phy/air_an8855.c
+ create mode 100644 drivers/nvmem/an8855-efuse.c
+ create mode 100644 include/linux/mfd/airoha-an8855-mfd.h
+
+--- a/drivers/mfd/Kconfig
++++ b/drivers/mfd/Kconfig
+@@ -41,6 +41,16 @@ config MFD_ALTERA_SYSMGR
+ 	  using regmap_mmio accesses for ARM32 parts and SMC calls to
+ 	  EL3 for ARM64 parts.
+ 
++config MFD_AIROHA_AN8855
++	tristate "Airoha AN8855 Switch MFD"
++	select MFD_CORE
++	select MDIO_DEVICE
++	depends on NETDEVICES && OF
++	help
++	  Support for the Airoha AN8855 Switch MFD. This is a SoC Switch
++	  that provides various peripherals. Currently it provides a
++	  DSA switch and a NVMEM provider.
++
+ config MFD_ACT8945A
+ 	tristate "Active-semi ACT8945A"
+ 	select MFD_CORE
+--- a/drivers/mfd/Makefile
++++ b/drivers/mfd/Makefile
+@@ -7,6 +7,7 @@
+ obj-$(CONFIG_MFD_88PM860X)	+= 88pm860x.o
+ obj-$(CONFIG_MFD_88PM800)	+= 88pm800.o 88pm80x.o
+ obj-$(CONFIG_MFD_88PM805)	+= 88pm805.o 88pm80x.o
++obj-$(CONFIG_MFD_AIROHA_AN8855)	+= airoha-an8855.o
+ obj-$(CONFIG_MFD_ACT8945A)	+= act8945a.o
+ obj-$(CONFIG_MFD_SM501)		+= sm501.o
+ obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835-pm.o
+--- a/drivers/net/dsa/Kconfig
++++ b/drivers/net/dsa/Kconfig
+@@ -24,6 +24,15 @@ config NET_DSA_LOOP
+ 	  This enables support for a fake mock-up switch chip which
+ 	  exercises the DSA APIs.
+ 
++config NET_DSA_AN8855
++	tristate "Airoha AN8855 Ethernet switch support"
++	depends on MFD_AIROHA_AN8855
++	depends on NET_DSA
++	select NET_DSA_TAG_MTK
++	help
++	  This enables support for the Airoha AN8855 Ethernet switch
++	  chip.
++
+ source "drivers/net/dsa/hirschmann/Kconfig"
+ 
+ config NET_DSA_LANTIQ_GSWIP
+--- a/drivers/net/dsa/Makefile
++++ b/drivers/net/dsa/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_NET_DSA_LOOP)	+= dsa_loop.o
+ ifdef CONFIG_NET_DSA_LOOP
+ obj-$(CONFIG_FIXED_PHY)		+= dsa_loop_bdinfo.o
+ endif
++obj-$(CONFIG_NET_DSA_AN8855)	+= an8855.o
+ obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o
+ obj-$(CONFIG_NET_DSA_MT7530)	+= mt7530.o
+ obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o
+--- a/drivers/net/mdio/Kconfig
++++ b/drivers/net/mdio/Kconfig
+@@ -61,6 +61,15 @@ config MDIO_XGENE
+ 	  This module provides a driver for the MDIO busses found in the
+ 	  APM X-Gene SoC's.
+ 
++config MDIO_AN8855
++	tristate "Airoha AN8855 Switch MDIO bus controller"
++	depends on MFD_AIROHA_AN8855
++	depends on OF_MDIO
++	help
++	  This module provides a driver for the Airoha AN8855 Switch
++	  that requires a MDIO passtrough as switch address is shared
++	  with the internal PHYs and requires additional page handling.
++
+ config MDIO_ASPEED
+ 	tristate "ASPEED MDIO bus controller"
+ 	depends on ARCH_ASPEED || COMPILE_TEST
+--- a/drivers/net/mdio/Makefile
++++ b/drivers/net/mdio/Makefile
+@@ -5,6 +5,7 @@ obj-$(CONFIG_ACPI_MDIO)		+= acpi_mdio.o
+ obj-$(CONFIG_FWNODE_MDIO)	+= fwnode_mdio.o
+ obj-$(CONFIG_OF_MDIO)		+= of_mdio.o
+ 
++obj-$(CONFIG_MDIO_AN8855)		+= mdio-an8855.o
+ obj-$(CONFIG_MDIO_ASPEED)		+= mdio-aspeed.o
+ obj-$(CONFIG_MDIO_BCM_IPROC)		+= mdio-bcm-iproc.o
+ obj-$(CONFIG_MDIO_BCM_UNIMAC)		+= mdio-bcm-unimac.o
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -147,6 +147,11 @@ config AIROHA_EN8801SC_PHY
+ 	help
+ 	  Currently supports the Airoha EN8801SC PHY.
+ 
++config AIR_AN8855_PHY
++	tristate "Airoha AN8855 Internal Gigabit PHY"
++	help
++	  Currently supports the internal Airoha AN8855 Switch PHY.
++
+ config AIR_EN8811H_PHY
+ 	tristate "Airoha EN8811H 2.5 Gigabit PHY"
+ 	help
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -50,6 +50,7 @@ obj-y				+= $(sfp-obj-y) $(sfp-obj-m)
+ obj-$(CONFIG_ADIN_PHY)		+= adin.o
+ obj-$(CONFIG_ADIN1100_PHY)	+= adin1100.o
+ obj-$(CONFIG_AIROHA_EN8801SC_PHY)   += en8801sc.o
++obj-$(CONFIG_AIR_AN8855_PHY)		+= air_an8855.o
+ obj-$(CONFIG_AIR_EN8811H_PHY)   += air_en8811h.o
+ obj-$(CONFIG_AMD_PHY)		+= amd.o
+ obj-$(CONFIG_AQUANTIA_PHY)	+= aquantia/
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -29,6 +29,17 @@ source "drivers/nvmem/layouts/Kconfig"
+ 
+ # Devices
+ 
++config NVMEM_AN8855_EFUSE
++	tristate "Airoha AN8855 eFuse support"
++	depends on MFD_AIROHA_AN8855 || COMPILE_TEST
++	help
++	  Say y here to enable support for reading eFuses on Airoha AN8855
++	  Switch. These are e.g. used to store factory programmed
++	  calibration data required for the PHY.
++
++	  This driver can also be built as a module. If so, the module will
++	  be called nvmem-an8855-efuse.
++
+ config NVMEM_APPLE_EFUSES
+ 	tristate "Apple eFuse support"
+ 	depends on ARCH_APPLE || COMPILE_TEST
+--- a/drivers/nvmem/Makefile
++++ b/drivers/nvmem/Makefile
+@@ -10,6 +10,8 @@ nvmem_layouts-y			:= layouts.o
+ obj-y				+= layouts/
+ 
+ # Devices
++obj-$(CONFIG_NVMEM_AN8855_EFUSE)	+= nvmem-an8855-efuse.o
++nvmem-an8855-efuse-y 			:= an8855-efuse.o
+ obj-$(CONFIG_NVMEM_APPLE_EFUSES)	+= nvmem-apple-efuses.o
+ nvmem-apple-efuses-y 			:= apple-efuses.o
+ obj-$(CONFIG_NVMEM_BCM_OCOTP)		+= nvmem-bcm-ocotp.o
diff --git a/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch b/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch
new file mode 100644
index 0000000000..2860b785fa
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/738-net-phylink-move-phylink_pcs_neg_mode.patch
@@ -0,0 +1,166 @@
+From 5e5401d6612ef599ad45785b941eebda7effc90f Mon Sep 17 00:00:00 2001
+From: "Russell King (Oracle)" <rmk+kernel at armlinux.org.uk>
+Date: Thu, 4 Jan 2024 09:47:36 +0000
+Subject: [PATCH] net: phylink: move phylink_pcs_neg_mode() into phylink.c
+
+Move phylink_pcs_neg_mode() from the header file into the .c file since
+nothing should be using it.
+
+Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>
+Reviewed-by: Andrew Lunn <andrew at lunn.ch>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/phy/phylink.c | 66 +++++++++++++++++++++++++++++++++++++++
+ include/linux/phylink.h   | 66 ---------------------------------------
+ 2 files changed, 66 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -1150,6 +1150,72 @@ static void phylink_pcs_an_restart(struc
+ 		pl->pcs->ops->pcs_an_restart(pl->pcs);
+ }
+ 
++/**
++ * phylink_pcs_neg_mode() - helper to determine PCS inband mode
++ * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
++ * @interface: interface mode to be used
++ * @advertising: adertisement ethtool link mode mask
++ *
++ * Determines the negotiation mode to be used by the PCS, and returns
++ * one of:
++ *
++ * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
++ * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
++ *   will be used.
++ * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
++ *   disabled
++ * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
++ *
++ * Note: this is for cases where the PCS itself is involved in negotiation
++ * (e.g. Clause 37, SGMII and similar) not Clause 73.
++ */
++static unsigned int phylink_pcs_neg_mode(unsigned int mode,
++					 phy_interface_t interface,
++					 const unsigned long *advertising)
++{
++	unsigned int neg_mode;
++
++	switch (interface) {
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++	case PHY_INTERFACE_MODE_QUSGMII:
++	case PHY_INTERFACE_MODE_USXGMII:
++		/* These protocols are designed for use with a PHY which
++		 * communicates its negotiation result back to the MAC via
++		 * inband communication. Note: there exist PHYs that run
++		 * with SGMII but do not send the inband data.
++		 */
++		if (!phylink_autoneg_inband(mode))
++			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++		else
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		break;
++
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_2500BASEX:
++		/* 1000base-X is designed for use media-side for Fibre
++		 * connections, and thus the Autoneg bit needs to be
++		 * taken into account. We also do this for 2500base-X
++		 * as well, but drivers may not support this, so may
++		 * need to override this.
++		 */
++		if (!phylink_autoneg_inband(mode))
++			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
++					   advertising))
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		else
++			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
++		break;
++
++	default:
++		neg_mode = PHYLINK_PCS_NEG_NONE;
++		break;
++	}
++
++	return neg_mode;
++}
++
+ static void phylink_major_config(struct phylink *pl, bool restart,
+ 				  const struct phylink_link_state *state)
+ {
+--- a/include/linux/phylink.h
++++ b/include/linux/phylink.h
+@@ -99,72 +99,6 @@ static inline bool phylink_autoneg_inban
+ }
+ 
+ /**
+- * phylink_pcs_neg_mode() - helper to determine PCS inband mode
+- * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
+- * @interface: interface mode to be used
+- * @advertising: adertisement ethtool link mode mask
+- *
+- * Determines the negotiation mode to be used by the PCS, and returns
+- * one of:
+- *
+- * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
+- * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
+- *   will be used.
+- * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
+- *   disabled
+- * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
+- *
+- * Note: this is for cases where the PCS itself is involved in negotiation
+- * (e.g. Clause 37, SGMII and similar) not Clause 73.
+- */
+-static inline unsigned int phylink_pcs_neg_mode(unsigned int mode,
+-						phy_interface_t interface,
+-						const unsigned long *advertising)
+-{
+-	unsigned int neg_mode;
+-
+-	switch (interface) {
+-	case PHY_INTERFACE_MODE_SGMII:
+-	case PHY_INTERFACE_MODE_QSGMII:
+-	case PHY_INTERFACE_MODE_QUSGMII:
+-	case PHY_INTERFACE_MODE_USXGMII:
+-		/* These protocols are designed for use with a PHY which
+-		 * communicates its negotiation result back to the MAC via
+-		 * inband communication. Note: there exist PHYs that run
+-		 * with SGMII but do not send the inband data.
+-		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+-		break;
+-
+-	case PHY_INTERFACE_MODE_1000BASEX:
+-	case PHY_INTERFACE_MODE_2500BASEX:
+-		/* 1000base-X is designed for use media-side for Fibre
+-		 * connections, and thus the Autoneg bit needs to be
+-		 * taken into account. We also do this for 2500base-X
+-		 * as well, but drivers may not support this, so may
+-		 * need to override this.
+-		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+-					   advertising))
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
+-		break;
+-
+-	default:
+-		neg_mode = PHYLINK_PCS_NEG_NONE;
+-		break;
+-	}
+-
+-	return neg_mode;
+-}
+-
+-/**
+  * struct phylink_link_state - link state structure
+  * @advertising: ethtool bitmask containing advertised link modes
+  * @lp_advertising: ethtool bitmask containing link partner advertised link
diff --git a/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch b/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch
new file mode 100644
index 0000000000..44a6aad7f5
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/739-net-add-negotiation-of-in-band-capabilities.patch
@@ -0,0 +1,1233 @@
+From: "Russell King (Oracle)" <linux at armlinux.org.uk>
+To: Andrew Lunn <andrew at lunn.ch>, Heiner Kallweit <hkallweit1 at gmail.com>
+Cc: Alexander Couzens <lynxis at fe80.eu>,
+	Andrew Lunn <andrew+netdev at lunn.ch>,
+	AngeloGioacchino Del Regno
+	<angelogioacchino.delregno at collabora.com>,
+	Broadcom internal kernel review list
+	<bcm-kernel-feedback-list at broadcom.com>,
+	Daniel Golle <daniel at makrotopia.org>,
+	"David S. Miller" <davem at davemloft.net>,
+	Eric Dumazet <edumazet at google.com>,
+	Florian Fainelli <florian.fainelli at broadcom.com>,
+	Ioana Ciornei <ioana.ciornei at nxp.com>,
+	Jakub Kicinski <kuba at kernel.org>,
+	Jose Abreu <Jose.Abreu at synopsys.com>,
+	linux-arm-kernel at lists.infradead.org,
+	linux-mediatek at lists.infradead.org,
+	Marcin Wojtas <marcin.s.wojtas at gmail.com>,
+	Matthias Brugger <matthias.bgg at gmail.com>,
+	netdev at vger.kernel.org, Paolo Abeni <pabeni at redhat.com>
+Subject: [PATCH RFC net-next 00/16] net: add negotiation of in-band capabilities
+Date: Tue, 26 Nov 2024 09:23:48 +0000	[thread overview]
+Message-ID: <Z0WTpE8wkpjMiv_J at shell.armlinux.org.uk> (raw)
+
+Hi,
+
+Yes, this is one patch over the limit of 15 for netdev - but I think it's
+important to include the last patch to head off review comments like "why
+don't you remove phylink_phy_no_inband() in this series?"
+
+Phylink's handling of in-band has been deficient for a long time, and
+people keep hitting problems with it. Notably, situations with the way-
+to-late standardized 2500Base-X and whether that should or should not
+have in-band enabled. We have also been carrying a hack in the form of
+phylink_phy_no_inband() for a PHY that has been used on a SFP module,
+but has no in-band capabilities, not even for SGMII.
+
+When phylink is trying to operate in in-band mode, this series will look
+at the capabilities of the MAC-side PCS and PHY, and work out whether
+in-band can or should be used, programming the PHY as appropriate. This
+includes in-band bypass mode at the PHY.
+
+We don't... yet... support that on the MAC side PCS, because that
+requires yet more complexity.
+
+Patch 1 passes struct phylink and struct phylink_pcs into
+phylink_pcs_neg_mode() so we can look at more state in this function in
+a future patch.
+
+Patch 2 splits "cur_link_an_mode" (the MLO_AN_* mode) into two separate
+purposes - a requested and an active mode. The active mode is the one
+we will be using for the MAC, which becomes dependent on the result of
+in-band negotiation.
+
+Patch 3 adds debug to phylink_major_config() so we can see what is going
+on with the requested and active AN modes.
+
+Patch 4 adds to phylib a method to get the in-band capabilities of the
+PHY from phylib. Patches 5 and 6 add implementations for BCM84881 and
+some Marvell PHYs found on SFPs.
+
+Patch 7 adds to phylib a method to configure the PHY in-band signalling,
+and patch 8 implements it for those Marvell PHYs that support the method
+in patch 4.
+
+Patch 9 does the same as patch 4 but for the MAC-side PCS, with patches
+10 through 14 adding support to several PCS.
+
+Patch 15 adds the code to phylink_pcs_neg_mode() which looks at the
+capabilities, and works out whether to use in-band or out-band mode for
+driving the link between the MAC PCS and PHY.
+
+Patch 16 removes the phylink_phy_no_inband() hack now that we are
+publishing the in-band capabilities from the BCM84881 PHY driver.
+
+ drivers/net/ethernet/marvell/mvneta.c           |  27 +-
+ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c |  25 +-
+ drivers/net/pcs/pcs-lynx.c                      |  22 ++
+ drivers/net/pcs/pcs-mtk-lynxi.c                 |  16 ++
+ drivers/net/pcs/pcs-xpcs.c                      |  28 ++
+ drivers/net/phy/bcm84881.c                      |  10 +
+ drivers/net/phy/marvell.c                       |  48 ++++
+ drivers/net/phy/phy.c                           |  52 ++++
+ drivers/net/phy/phylink.c                       | 352 +++++++++++++++++++-----
+ include/linux/phy.h                             |  34 +++
+ include/linux/phylink.h                         |  17 ++
+ 11 files changed, 539 insertions(+), 92 deletions(-)
+
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -56,7 +56,8 @@ struct phylink {
+ 	struct phy_device *phydev;
+ 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
+ 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
+-	u8 cur_link_an_mode;
++	u8 req_link_an_mode;		/* Requested MLO_AN_xxx mode */
++	u8 act_link_an_mode;		/* Active MLO_AN_xxx mode */
+ 	u8 link_port;			/* The current non-phy ethtool port */
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
+ 
+@@ -74,6 +75,7 @@ struct phylink {
+ 
+ 	struct mutex state_mutex;
+ 	struct phylink_link_state phy_state;
++	unsigned int phy_ib_mode;
+ 	struct work_struct resolve;
+ 	unsigned int pcs_neg_mode;
+ 	unsigned int pcs_state;
+@@ -175,6 +177,24 @@ static const char *phylink_an_mode_str(u
+ 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
+ }
+ 
++static const char *phylink_pcs_mode_str(unsigned int mode)
++{
++	if (!mode)
++		return "none";
++
++	if (mode & PHYLINK_PCS_NEG_OUTBAND)
++		return "outband";
++
++	if (mode & PHYLINK_PCS_NEG_INBAND) {
++		if (mode & PHYLINK_PCS_NEG_ENABLED)
++			return "inband,an-enabled";
++		else
++			return "inband,an-disabled";
++	}
++
++	return "unknown";
++}
++
+ static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
+ {
+ 	switch (interface) {
+@@ -1053,6 +1073,15 @@ static void phylink_resolve_an_pause(str
+ 	}
+ }
+ 
++static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
++				    phy_interface_t interface)
++{
++	if (pcs && pcs->ops->pcs_inband_caps)
++		return pcs->ops->pcs_inband_caps(pcs, interface);
++
++	return 0;
++}
++
+ static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
+ 				   phy_interface_t interface)
+ {
+@@ -1106,6 +1135,24 @@ static void phylink_pcs_link_up(struct p
+ 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
+ }
+ 
++/* Query inband for a specific interface mode, asking the MAC for the
++ * PCS which will be used to handle the interface mode.
++ */
++static unsigned int phylink_inband_caps(struct phylink *pl,
++					 phy_interface_t interface)
++{
++	struct phylink_pcs *pcs;
++
++	if (!pl->mac_ops->mac_select_pcs)
++		return 0;
++
++	pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
++	if (!pcs)
++		return 0;
++
++	return phylink_pcs_inband_caps(pcs, interface);
++}
++
+ static void phylink_pcs_poll_stop(struct phylink *pl)
+ {
+ 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
+@@ -1132,13 +1179,13 @@ static void phylink_mac_config(struct ph
+ 
+ 	phylink_dbg(pl,
+ 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
+-		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
++		    __func__, phylink_an_mode_str(pl->act_link_an_mode),
+ 		    phy_modes(st.interface),
+ 		    phy_rate_matching_to_str(st.rate_matching),
+ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
+ 		    st.pause);
+ 
+-	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
++	pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
+ }
+ 
+ static void phylink_pcs_an_restart(struct phylink *pl)
+@@ -1146,13 +1193,14 @@ static void phylink_pcs_an_restart(struc
+ 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+ 					 pl->link_config.advertising) &&
+ 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
+-	    phylink_autoneg_inband(pl->cur_link_an_mode))
++	    phylink_autoneg_inband(pl->act_link_an_mode))
+ 		pl->pcs->ops->pcs_an_restart(pl->pcs);
+ }
+ 
+ /**
+  * phylink_pcs_neg_mode() - helper to determine PCS inband mode
+- * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
++ * @pl: a pointer to a &struct phylink returned from phylink_create()
++ * @pcs: a pointer to &struct phylink_pcs
+  * @interface: interface mode to be used
+  * @advertising: adertisement ethtool link mode mask
+  *
+@@ -1169,11 +1217,21 @@ static void phylink_pcs_an_restart(struc
+  * Note: this is for cases where the PCS itself is involved in negotiation
+  * (e.g. Clause 37, SGMII and similar) not Clause 73.
+  */
+-static unsigned int phylink_pcs_neg_mode(unsigned int mode,
+-					 phy_interface_t interface,
+-					 const unsigned long *advertising)
++static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
++				 phy_interface_t interface,
++				 const unsigned long *advertising)
+ {
+-	unsigned int neg_mode;
++	unsigned int pcs_ib_caps = 0;
++	unsigned int phy_ib_caps = 0;
++	unsigned int neg_mode, mode;
++	enum {
++		INBAND_CISCO_SGMII,
++		INBAND_BASEX,
++	} type;
++
++	mode = pl->req_link_an_mode;
++
++	pl->phy_ib_mode = 0;
+ 
+ 	switch (interface) {
+ 	case PHY_INTERFACE_MODE_SGMII:
+@@ -1185,10 +1243,7 @@ static unsigned int phylink_pcs_neg_mode
+ 		 * inband communication. Note: there exist PHYs that run
+ 		 * with SGMII but do not send the inband data.
+ 		 */
+-		if (!phylink_autoneg_inband(mode))
+-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
+-		else
+-			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		type = INBAND_CISCO_SGMII;
+ 		break;
+ 
+ 	case PHY_INTERFACE_MODE_1000BASEX:
+@@ -1199,21 +1254,143 @@ static unsigned int phylink_pcs_neg_mode
+ 		 * as well, but drivers may not support this, so may
+ 		 * need to override this.
+ 		 */
+-		if (!phylink_autoneg_inband(mode))
++		type = INBAND_BASEX;
++		break;
++
++	default:
++		pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
++		pl->act_link_an_mode = mode;
++		return;
++	}
++
++	if (pcs)
++		pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
++
++	if (pl->phydev)
++		phy_ib_caps = phy_inband_caps(pl->phydev, interface);
++
++	phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
++		    phy_modes(interface), pcs_ib_caps, phy_ib_caps);
++
++	if (!phylink_autoneg_inband(mode)) {
++		bool pcs_ib_only = false;
++		bool phy_ib_only = false;
++
++		if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
++			/* PCS supports reporting in-band capabilities, and
++			 * supports more than disable mode.
++			 */
++			if (pcs_ib_caps & LINK_INBAND_DISABLE)
++				neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++			else if (pcs_ib_caps & LINK_INBAND_ENABLE)
++				pcs_ib_only = true;
++		}
++
++		if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
++			/* PHY supports in-band capabilities, and supports
++			 * more than disable mode.
++			 */
++			if (phy_ib_caps & LINK_INBAND_DISABLE)
++				pl->phy_ib_mode = LINK_INBAND_DISABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++			else if (phy_ib_caps & LINK_INBAND_ENABLE)
++				phy_ib_only = true;
++		}
++
++		/* If either the PCS or PHY requires inband to be enabled,
++		 * this is an invalid configuration. Provide a diagnostic
++		 * message for this case, but don't try to force the issue.
++		 */
++		if (pcs_ib_only || phy_ib_only)
++			phylink_warn(pl,
++				     "firmware wants %s mode, but %s%s%s requires inband\n",
++				     phylink_an_mode_str(mode),
++				     pcs_ib_only ? "PCS" : "",
++				     pcs_ib_only && phy_ib_only ? " and " : "",
++				     phy_ib_only ? "PHY" : "");
++
++		neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++	} else if (type == INBAND_CISCO_SGMII || pl->phydev) {
++		/* For SGMII modes which are designed to be used with PHYs, or
++		 * Base-X with a PHY, we try to use in-band mode where-ever
++		 * possible. However, there are some PHYs e.g. BCM84881 which
++		 * do not support in-band.
++		 */
++		const unsigned int inband_ok = LINK_INBAND_ENABLE |
++					       LINK_INBAND_BYPASS;
++		const unsigned int outband_ok = LINK_INBAND_DISABLE |
++						LINK_INBAND_BYPASS;
++		/* PCS	PHY
++		 * D E	D E
++		 * 0 0  0 0	no information			inband enabled
++		 * 1 0  0 0	pcs doesn't support		outband
++		 * 0 1  0 0	pcs required			inband enabled
++		 * 1 1  0 0	pcs optional			inband enabled
++		 * 0 0  1 0	phy doesn't support		outband
++		 * 1 0  1 0	pcs+phy doesn't support		outband
++		 * 0 1  1 0	pcs required, phy doesn't support, invalid
++		 * 1 1  1 0	pcs optional, phy doesn't support, outband
++		 * 0 0  0 1	phy required			inband enabled
++		 * 1 0  0 1	pcs doesn't support, phy required, invalid
++		 * 0 1  0 1	pcs+phy required		inband enabled
++		 * 1 1  0 1	pcs optional, phy required	inband enabled
++		 * 0 0  1 1	phy optional			inband enabled
++		 * 1 0  1 1	pcs doesn't support, phy optional, outband
++		 * 0 1  1 1	pcs required, phy optional	inband enabled
++		 * 1 1  1 1	pcs+phy optional		inband enabled
++		 */
++		if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
++		    (!phy_ib_caps || phy_ib_caps & inband_ok)) {
++			/* In-band supported or unknown at both ends. Enable
++			 * in-band mode with or without bypass at the PHY.
++			 */
++			if (phy_ib_caps & LINK_INBAND_ENABLE)
++				pl->phy_ib_mode = LINK_INBAND_ENABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		} else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
++			   (!phy_ib_caps || phy_ib_caps & outband_ok)) {
++			/* Either in-band not supported at at least one end.
++			 * In-band bypass at the other end is possible.
++			 */
++			if (phy_ib_caps & LINK_INBAND_DISABLE)
++				pl->phy_ib_mode = LINK_INBAND_DISABLE;
++			else if (phy_ib_caps & LINK_INBAND_BYPASS)
++				pl->phy_ib_mode = LINK_INBAND_BYPASS;
++
+ 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;
++			if (pl->phydev)
++				mode = MLO_AN_PHY;
++		} else {
++			/* invalid */
++			phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
++				     phy_modes(interface));
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
++		}
++	} else {
++		/* For Base-X without a PHY */
++		if (pcs_ib_caps == LINK_INBAND_DISABLE)
++			/* If the PCS doesn't support inband, then inband must
++			 * be disabled.
++			 */
++			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
++		else if (pcs_ib_caps == LINK_INBAND_ENABLE)
++			/* If the PCS requires inband, then inband must always
++			 * be enabled.
++			 */
++			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+ 		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
+ 					   advertising))
+ 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
+ 		else
+ 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
+-		break;
+-
+-	default:
+-		neg_mode = PHYLINK_PCS_NEG_NONE;
+-		break;
+ 	}
+ 
+-	return neg_mode;
++	pl->pcs_neg_mode = neg_mode;
++	pl->act_link_an_mode = mode;
+ }
+ 
+ static void phylink_major_config(struct phylink *pl, bool restart,
+@@ -1225,11 +1402,9 @@ static void phylink_major_config(struct
+ 	unsigned int neg_mode;
+ 	int err;
+ 
+-	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
+-
+-	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
+-						state->interface,
+-						state->advertising);
++	phylink_dbg(pl, "major config, requested %s/%s\n",
++		    phylink_an_mode_str(pl->req_link_an_mode),
++		    phy_modes(state->interface));
+ 
+ 	if (pl->using_mac_select_pcs) {
+ 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
+@@ -1243,10 +1418,17 @@ static void phylink_major_config(struct
+ 		pcs_changed = pcs && pl->pcs != pcs;
+ 	}
+ 
++	phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
++
++	phylink_dbg(pl, "major config, active %s/%s/%s\n",
++		    phylink_an_mode_str(pl->act_link_an_mode),
++		    phylink_pcs_mode_str(pl->pcs_neg_mode),
++		    phy_modes(state->interface));
++
+ 	phylink_pcs_poll_stop(pl);
+ 
+ 	if (pl->mac_ops->mac_prepare) {
+-		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
++		err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
+ 					       state->interface);
+ 		if (err < 0) {
+ 			phylink_err(pl, "mac_prepare failed: %pe\n",
+@@ -1280,7 +1462,7 @@ static void phylink_major_config(struct
+ 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
+ 		phylink_pcs_enable(pl->pcs);
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs && pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+@@ -1296,13 +1478,20 @@ static void phylink_major_config(struct
+ 		phylink_pcs_an_restart(pl);
+ 
+ 	if (pl->mac_ops->mac_finish) {
+-		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
++		err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
+ 					      state->interface);
+ 		if (err < 0)
+ 			phylink_err(pl, "mac_finish failed: %pe\n",
+ 				    ERR_PTR(err));
+ 	}
+ 
++	if (pl->phydev && pl->phy_ib_mode) {
++		err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
++		if (err < 0)
++			phylink_err(pl, "phy_config_inband: %pe\n",
++				    ERR_PTR(err));
++	}
++
+ 	if (pl->sfp_bus) {
+ 		rate_kbd = phylink_interface_signal_rate(state->interface);
+ 		if (rate_kbd)
+@@ -1327,17 +1516,16 @@ static int phylink_change_inband_advert(
+ 		return 0;
+ 
+ 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
+-		    phylink_an_mode_str(pl->cur_link_an_mode),
++		    phylink_an_mode_str(pl->req_link_an_mode),
+ 		    phy_modes(pl->link_config.interface),
+ 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
+ 		    pl->link_config.pause);
+ 
+ 	/* Recompute the PCS neg mode */
+-	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
+-					pl->link_config.interface,
+-					pl->link_config.advertising);
++	phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
++			     pl->link_config.advertising);
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+@@ -1402,7 +1590,7 @@ static void phylink_mac_initial_config(s
+ {
+ 	struct phylink_link_state link_state;
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->req_link_an_mode) {
+ 	case MLO_AN_PHY:
+ 		link_state = pl->phy_state;
+ 		break;
+@@ -1476,14 +1664,14 @@ static void phylink_link_up(struct phyli
+ 
+ 	pl->cur_interface = link_state.interface;
+ 
+-	neg_mode = pl->cur_link_an_mode;
++	neg_mode = pl->act_link_an_mode;
+ 	if (pl->pcs && pl->pcs->neg_mode)
+ 		neg_mode = pl->pcs_neg_mode;
+ 
+ 	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
+ 			    duplex);
+ 
+-	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
++	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
+ 				 pl->cur_interface, speed, duplex,
+ 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
+ 
+@@ -1503,7 +1691,7 @@ static void phylink_link_down(struct phy
+ 
+ 	if (ndev)
+ 		netif_carrier_off(ndev);
+-	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
++	pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
+ 				   pl->cur_interface);
+ 	phylink_info(pl, "Link is Down\n");
+ }
+@@ -1530,7 +1718,7 @@ static void phylink_resolve(struct work_
+ 		link_state.link = false;
+ 		retrigger = true;
+ 	} else {
+-		switch (pl->cur_link_an_mode) {
++		switch (pl->act_link_an_mode) {
+ 		case MLO_AN_PHY:
+ 			link_state = pl->phy_state;
+ 			phylink_apply_manual_flow(pl, &link_state);
+@@ -1773,7 +1961,7 @@ struct phylink *phylink_create(struct ph
+ 		}
+ 	}
+ 
+-	pl->cur_link_an_mode = pl->cfg_link_an_mode;
++	pl->req_link_an_mode = pl->cfg_link_an_mode;
+ 
+ 	ret = phylink_register_sfp(pl, fwnode);
+ 	if (ret < 0) {
+@@ -2236,7 +2424,7 @@ void phylink_start(struct phylink *pl)
+ 	ASSERT_RTNL();
+ 
+ 	phylink_info(pl, "configuring for %s/%s link mode\n",
+-		     phylink_an_mode_str(pl->cur_link_an_mode),
++		     phylink_an_mode_str(pl->req_link_an_mode),
+ 		     phy_modes(pl->link_config.interface));
+ 
+ 	/* Always set the carrier off */
+@@ -2495,7 +2683,7 @@ int phylink_ethtool_ksettings_get(struct
+ 
+ 	linkmode_copy(kset->link_modes.supported, pl->supported);
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		/* We are using fixed settings. Report these as the
+ 		 * current link settings - and note that these also
+@@ -2526,6 +2714,26 @@ int phylink_ethtool_ksettings_get(struct
+ }
+ EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
+ 
++static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
++					        phy_interface_t interface,
++						unsigned long *adv)
++{
++	unsigned int inband = phylink_inband_caps(pl, interface);
++	unsigned int mask;
++
++	/* If the PCS doesn't implement inband support, be permissive. */
++	if (!inband)
++		return true;
++
++	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
++		mask = LINK_INBAND_ENABLE;
++	else
++		mask = LINK_INBAND_DISABLE;
++
++	/* Check whether the PCS implements the required mode */
++	return !!(inband & mask);
++}
++
+ /**
+  * phylink_ethtool_ksettings_set() - set the link settings
+  * @pl: a pointer to a &struct phylink returned from phylink_create()
+@@ -2587,7 +2795,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		/* If we have a fixed link, refuse to change link parameters.
+ 		 * If the link parameters match, accept them but do nothing.
+ 		 */
+-		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
++		if (pl->req_link_an_mode == MLO_AN_FIXED) {
+ 			if (s->speed != pl->link_config.speed ||
+ 			    s->duplex != pl->link_config.duplex)
+ 				return -EINVAL;
+@@ -2603,7 +2811,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		 * is our default case) but do not allow the advertisement to
+ 		 * be changed. If the advertisement matches, simply return.
+ 		 */
+-		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
++		if (pl->req_link_an_mode == MLO_AN_FIXED) {
+ 			if (!linkmode_equal(config.advertising,
+ 					    pl->link_config.advertising))
+ 				return -EINVAL;
+@@ -2643,7 +2851,7 @@ int phylink_ethtool_ksettings_set(struct
+ 		linkmode_copy(support, pl->supported);
+ 		if (phylink_validate(pl, support, &config)) {
+ 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
+-				    phylink_an_mode_str(pl->cur_link_an_mode),
++				    phylink_an_mode_str(pl->req_link_an_mode),
+ 				    phy_modes(config.interface),
+ 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
+ 			return -EINVAL;
+@@ -2661,6 +2869,13 @@ int phylink_ethtool_ksettings_set(struct
+ 	    phylink_is_empty_linkmode(config.advertising))
+ 		return -EINVAL;
+ 
++	/* Validate the autonegotiation state. We don't have a PHY in this
++	 * situation, so the PCS is the media-facing entity.
++	 */
++	if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
++						 config.advertising))
++		return -EINVAL;
++
+ 	mutex_lock(&pl->state_mutex);
+ 	pl->link_config.speed = config.speed;
+ 	pl->link_config.duplex = config.duplex;
+@@ -2743,7 +2958,7 @@ int phylink_ethtool_set_pauseparam(struc
+ 
+ 	ASSERT_RTNL();
+ 
+-	if (pl->cur_link_an_mode == MLO_AN_FIXED)
++	if (pl->req_link_an_mode == MLO_AN_FIXED)
+ 		return -EOPNOTSUPP;
+ 
+ 	if (!phylink_test(pl->supported, Pause) &&
+@@ -3007,7 +3222,7 @@ static int phylink_mii_read(struct phyli
+ 	struct phylink_link_state state;
+ 	int val = 0xffff;
+ 
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		if (phy_id == 0) {
+ 			phylink_get_fixed_state(pl, &state);
+@@ -3032,7 +3247,7 @@ static int phylink_mii_read(struct phyli
+ static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
+ 			     unsigned int reg, unsigned int val)
+ {
+-	switch (pl->cur_link_an_mode) {
++	switch (pl->act_link_an_mode) {
+ 	case MLO_AN_FIXED:
+ 		break;
+ 
+@@ -3202,10 +3417,11 @@ static phy_interface_t phylink_choose_sf
+ 	return interface;
+ }
+ 
+-static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
++static void phylink_sfp_set_config(struct phylink *pl,
+ 				   unsigned long *supported,
+ 				   struct phylink_link_state *state)
+ {
++	u8 mode = MLO_AN_INBAND;
+ 	bool changed = false;
+ 
+ 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
+@@ -3222,9 +3438,9 @@ static void phylink_sfp_set_config(struc
+ 		changed = true;
+ 	}
+ 
+-	if (pl->cur_link_an_mode != mode ||
++	if (pl->req_link_an_mode != mode ||
+ 	    pl->link_config.interface != state->interface) {
+-		pl->cur_link_an_mode = mode;
++		pl->req_link_an_mode = mode;
+ 		pl->link_config.interface = state->interface;
+ 
+ 		changed = true;
+@@ -3239,8 +3455,7 @@ static void phylink_sfp_set_config(struc
+ 		phylink_mac_initial_config(pl, false);
+ }
+ 
+-static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
+-				  struct phy_device *phy)
++static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
+ {
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
+ 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
+@@ -3279,8 +3494,7 @@ static int phylink_sfp_config_phy(struct
+ 	ret = phylink_validate(pl, support1, &config);
+ 	if (ret) {
+ 		phylink_err(pl,
+-			    "validation of %s/%s with support %*pb failed: %pe\n",
+-			    phylink_an_mode_str(mode),
++			    "validation of %s with support %*pb failed: %pe\n",
+ 			    phy_modes(config.interface),
+ 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
+ 			    ERR_PTR(ret));
+@@ -3289,7 +3503,7 @@ static int phylink_sfp_config_phy(struct
+ 
+ 	pl->link_port = pl->sfp_port;
+ 
+-	phylink_sfp_set_config(pl, mode, support, &config);
++	phylink_sfp_set_config(pl, support, &config);
+ 
+ 	return 0;
+ }
+@@ -3345,6 +3559,12 @@ static int phylink_sfp_config_optical(st
+ 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
+ 		    phy_modes(interface));
+ 
++	if (!phylink_validate_pcs_inband_autoneg(pl, interface,
++						 config.advertising)) {
++		phylink_err(pl, "autoneg setting not compatible with PCS");
++		return -EINVAL;
++	}
++
+ 	config.interface = interface;
+ 
+ 	/* Ignore errors if we're expecting a PHY to attach later */
+@@ -3358,7 +3578,7 @@ static int phylink_sfp_config_optical(st
+ 
+ 	pl->link_port = pl->sfp_port;
+ 
+-	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
++	phylink_sfp_set_config(pl, pl->sfp_support, &config);
+ 
+ 	return 0;
+ }
+@@ -3429,20 +3649,10 @@ static void phylink_sfp_link_up(void *up
+ 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
+ }
+ 
+-/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
+- * or 802.3z control word, so inband will not work.
+- */
+-static bool phylink_phy_no_inband(struct phy_device *phy)
+-{
+-	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
+-					     0xae025150, 0xfffffff0);
+-}
+-
+ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
+ {
+ 	struct phylink *pl = upstream;
+ 	phy_interface_t interface;
+-	u8 mode;
+ 	int ret;
+ 
+ 	/*
+@@ -3454,17 +3664,12 @@ static int phylink_sfp_connect_phy(void
+ 	 */
+ 	phy_support_asym_pause(phy);
+ 
+-	if (phylink_phy_no_inband(phy))
+-		mode = MLO_AN_PHY;
+-	else
+-		mode = MLO_AN_INBAND;
+-
+ 	/* Set the PHY's host supported interfaces */
+ 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
+ 			  pl->config->supported_interfaces);
+ 
+ 	/* Do the initial configuration */
+-	ret = phylink_sfp_config_phy(pl, mode, phy);
++	ret = phylink_sfp_config_phy(pl, phy);
+ 	if (ret < 0)
+ 		return ret;
+ 
+--- a/drivers/net/phy/phy.c
++++ b/drivers/net/phy/phy.c
+@@ -973,6 +973,58 @@ static int phy_check_link_status(struct
+ }
+ 
+ /**
++ * phy_inband_caps - query which in-band signalling modes are supported
++ * @phydev: a pointer to a &struct phy_device
++ * @interface: the interface mode for the PHY
++ *
++ * Returns zero if it is unknown what in-band signalling is supported by the
++ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
++ * returns a bit mask of the LINK_INBAND_* values from
++ * &enum link_inband_signalling to describe which inband modes are supported
++ * by the PHY for this interface mode.
++ */
++unsigned int phy_inband_caps(struct phy_device *phydev,
++			     phy_interface_t interface)
++{
++	if (phydev->drv && phydev->drv->inband_caps)
++		return phydev->drv->inband_caps(phydev, interface);
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(phy_inband_caps);
++
++/**
++ * phy_config_inband - configure the desired PHY in-band mode
++ * @phydev: the phy_device struct
++ * @modes: in-band modes to configure
++ *
++ * Description: disables, enables or enables-with-bypass in-band signalling
++ *   between the PHY and host system.
++ *
++ * Returns: zero on success, or negative errno value.
++ */
++int phy_config_inband(struct phy_device *phydev, unsigned int modes)
++{
++	int err;
++
++	if (!!(modes & LINK_INBAND_DISABLE) +
++	    !!(modes & LINK_INBAND_ENABLE) +
++	    !!(modes & LINK_INBAND_BYPASS) != 1)
++		return -EINVAL;
++
++	mutex_lock(&phydev->lock);
++	if (!phydev->drv)
++		err = -EIO;
++	else if (!phydev->drv->config_inband)
++		err = -EOPNOTSUPP;
++	else
++		err = phydev->drv->config_inband(phydev, modes);
++	mutex_unlock(&phydev->lock);
++
++	return err;
++}
++
++/**
+  * _phy_start_aneg - start auto-negotiation for this PHY device
+  * @phydev: the phy_device struct
+  *
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -800,6 +800,24 @@ struct phy_tdr_config {
+ #define PHY_PAIR_ALL -1
+ 
+ /**
++ * enum link_inband_signalling - in-band signalling modes that are supported
++ *
++ * @LINK_INBAND_DISABLE: in-band signalling can be disabled
++ * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
++ * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
++ *
++ * The possible and required bits can only be used if the valid bit is set.
++ * If possible is clear, that means inband signalling can not be used.
++ * Required is only valid when possible is set, and means that inband
++ * signalling must be used.
++ */
++enum link_inband_signalling {
++	LINK_INBAND_DISABLE		= BIT(0),
++	LINK_INBAND_ENABLE		= BIT(1),
++	LINK_INBAND_BYPASS		= BIT(2),
++};
++
++/**
+  * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
+  * Avoidance) Reconciliation Sublayer.
+  *
+@@ -939,6 +957,19 @@ struct phy_driver {
+ 	int (*get_features)(struct phy_device *phydev);
+ 
+ 	/**
++	 * @inband_caps: query whether in-band is supported for the given PHY
++	 * interface mode. Returns a bitmask of bits defined by enum
++	 * link_inband_signalling.
++	 */
++	unsigned int (*inband_caps)(struct phy_device *phydev,
++				    phy_interface_t interface);
++
++	/**
++	 * @config_inband: configure in-band mode for the PHY
++	 */
++	int (*config_inband)(struct phy_device *phydev, unsigned int modes);
++
++	/**
+ 	 * @get_rate_matching: Get the supported type of rate matching for a
+ 	 * particular phy interface. This is used by phy consumers to determine
+ 	 * whether to advertise lower-speed modes for that interface. It is
+@@ -1774,6 +1805,9 @@ void phy_stop(struct phy_device *phydev)
+ int phy_config_aneg(struct phy_device *phydev);
+ int phy_start_aneg(struct phy_device *phydev);
+ int phy_aneg_done(struct phy_device *phydev);
++unsigned int phy_inband_caps(struct phy_device *phydev,
++			     phy_interface_t interface);
++int phy_config_inband(struct phy_device *phydev, unsigned int modes);
+ int phy_speed_down(struct phy_device *phydev, bool sync);
+ int phy_speed_up(struct phy_device *phydev);
+ bool phy_check_valid(int speed, int duplex, unsigned long *features);
+--- a/drivers/net/phy/bcm84881.c
++++ b/drivers/net/phy/bcm84881.c
+@@ -223,11 +223,21 @@ static int bcm84881_read_status(struct p
+ 	return genphy_c45_read_mdix(phydev);
+ }
+ 
++/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
++ * or 802.3z control word, so inband will not work.
++ */
++static unsigned int bcm84881_inband_caps(struct phy_device *phydev,
++					 phy_interface_t interface)
++{
++	return LINK_INBAND_DISABLE;
++}
++
+ static struct phy_driver bcm84881_drivers[] = {
+ 	{
+ 		.phy_id		= 0xae025150,
+ 		.phy_id_mask	= 0xfffffff0,
+ 		.name		= "Broadcom BCM84881",
++		.inband_caps	= bcm84881_inband_caps,
+ 		.config_init	= bcm84881_config_init,
+ 		.probe		= bcm84881_probe,
+ 		.get_features	= bcm84881_get_features,
+--- a/drivers/net/phy/marvell.c
++++ b/drivers/net/phy/marvell.c
+@@ -673,6 +673,48 @@ static int marvell_config_aneg_fiber(str
+ 	return genphy_check_and_restart_aneg(phydev, changed);
+ }
+ 
++static unsigned int m88e1111_inband_caps(struct phy_device *phydev,
++					 phy_interface_t interface)
++{
++	/* In 1000base-X and SGMII modes, the inband mode can be changed
++	 * through the Fibre page BMCR ANENABLE bit.
++	 */
++	if (interface == PHY_INTERFACE_MODE_1000BASEX ||
++	    interface == PHY_INTERFACE_MODE_SGMII)
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
++		       LINK_INBAND_BYPASS;
++
++	return 0;
++}
++
++static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)
++{
++	u16 extsr, bmcr;
++	int err;
++
++	if (phydev->interface != PHY_INTERFACE_MODE_1000BASEX &&
++	    phydev->interface != PHY_INTERFACE_MODE_SGMII)
++		return -EINVAL;
++
++	if (modes == LINK_INBAND_BYPASS)
++		extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;
++	else
++		extsr = 0;
++
++	if (modes == LINK_INBAND_DISABLE)
++		bmcr = 0;
++	else
++		bmcr = BMCR_ANENABLE;
++
++	err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
++			 MII_M1111_HWCFG_SERIAL_AN_BYPASS, extsr);
++	if (err < 0)
++		return extsr;
++
++	return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,
++				BMCR_ANENABLE, bmcr);
++}
++
+ static int m88e1111_config_aneg(struct phy_device *phydev)
+ {
+ 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
+@@ -3292,6 +3334,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1112",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1112_config_init,
+ 		.config_aneg = marvell_config_aneg,
+ 		.config_intr = marvell_config_intr,
+@@ -3312,6 +3356,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1111",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1111gbe_config_init,
+ 		.config_aneg = m88e1111_config_aneg,
+ 		.read_status = marvell_read_status,
+@@ -3333,6 +3379,8 @@ static struct phy_driver marvell_drivers
+ 		.name = "Marvell 88E1111 (Finisar)",
+ 		/* PHY_GBIT_FEATURES */
+ 		.probe = marvell_probe,
++		.inband_caps = m88e1111_inband_caps,
++		.config_inband = m88e1111_config_inband,
+ 		.config_init = m88e1111gbe_config_init,
+ 		.config_aneg = m88e1111_config_aneg,
+ 		.read_status = marvell_read_status,
+--- a/include/linux/phylink.h
++++ b/include/linux/phylink.h
+@@ -432,6 +432,7 @@ struct phylink_pcs {
+ /**
+  * struct phylink_pcs_ops - MAC PCS operations structure.
+  * @pcs_validate: validate the link configuration.
++ * @pcs_inband_caps: query inband support for interface mode.
+  * @pcs_enable: enable the PCS.
+  * @pcs_disable: disable the PCS.
+  * @pcs_pre_config: pre-mac_config method (for errata)
+@@ -445,6 +446,8 @@ struct phylink_pcs {
+ struct phylink_pcs_ops {
+ 	int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported,
+ 			    const struct phylink_link_state *state);
++	unsigned int (*pcs_inband_caps)(struct phylink_pcs *pcs,
++					phy_interface_t interface);
+ 	int (*pcs_enable)(struct phylink_pcs *pcs);
+ 	void (*pcs_disable)(struct phylink_pcs *pcs);
+ 	void (*pcs_pre_config)(struct phylink_pcs *pcs,
+@@ -481,6 +484,20 @@ int pcs_validate(struct phylink_pcs *pcs
+ 		 const struct phylink_link_state *state);
+ 
+ /**
++ * pcs_inband_caps - query PCS in-band capabilities for interface mode.
++ * @pcs: a pointer to a &struct phylink_pcs.
++ * @interface: interface mode to be queried
++ *
++ * Returns zero if it is unknown what in-band signalling is supported by the
++ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
++ * returns a bit mask of the LINK_INBAND_* values from
++ * &enum link_inband_signalling to describe which inband modes are supported
++ * for this interface mode.
++ */
++unsigned int pcs_inband_caps(struct phylink_pcs *pcs,
++			     phy_interface_t interface);
++
++/**
+  * pcs_enable() - enable the PCS.
+  * @pcs: a pointer to a &struct phylink_pcs.
+  */
+--- a/drivers/net/ethernet/marvell/mvneta.c
++++ b/drivers/net/ethernet/marvell/mvneta.c
+@@ -3959,20 +3959,27 @@ static struct mvneta_port *mvneta_pcs_to
+ 	return container_of(pcs, struct mvneta_port, phylink_pcs);
+ }
+ 
+-static int mvneta_pcs_validate(struct phylink_pcs *pcs,
+-			       unsigned long *supported,
+-			       const struct phylink_link_state *state)
++static unsigned int mvneta_pcs_inband_caps(struct phylink_pcs *pcs,
++					   phy_interface_t interface)
+ {
+-	/* We only support QSGMII, SGMII, 802.3z and RGMII modes.
+-	 * When in 802.3z mode, we must have AN enabled:
++	/* When operating in an 802.3z mode, we must have AN enabled:
+ 	 * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
+ 	 * When <PortType> = 1 (1000BASE-X) this field must be set to 1."
++	 * Therefore, inband is "required".
+ 	 */
+-	if (phy_interface_mode_is_8023z(state->interface) &&
+-	    !phylink_test(state->advertising, Autoneg))
+-		return -EINVAL;
++	if (phy_interface_mode_is_8023z(interface))
++		return LINK_INBAND_ENABLE;
+ 
+-	return 0;
++	/* QSGMII, SGMII and RGMII can be configured to use inband
++	 * signalling of the AN result. Indicate these as "possible".
++	 */
++	if (interface == PHY_INTERFACE_MODE_SGMII ||
++	    interface == PHY_INTERFACE_MODE_QSGMII ||
++	    phy_interface_mode_is_rgmii(interface))
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	/* For any other modes, indicate that inband is not supported. */
++	return LINK_INBAND_DISABLE;
+ }
+ 
+ static void mvneta_pcs_get_state(struct phylink_pcs *pcs,
+@@ -4070,7 +4077,7 @@ static void mvneta_pcs_an_restart(struct
+ }
+ 
+ static const struct phylink_pcs_ops mvneta_phylink_pcs_ops = {
+-	.pcs_validate = mvneta_pcs_validate,
++	.pcs_inband_caps = mvneta_pcs_inband_caps,
+ 	.pcs_get_state = mvneta_pcs_get_state,
+ 	.pcs_config = mvneta_pcs_config,
+ 	.pcs_an_restart = mvneta_pcs_an_restart,
+--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+@@ -6214,19 +6214,26 @@ static const struct phylink_pcs_ops mvpp
+ 	.pcs_config = mvpp2_xlg_pcs_config,
+ };
+ 
+-static int mvpp2_gmac_pcs_validate(struct phylink_pcs *pcs,
+-				   unsigned long *supported,
+-				   const struct phylink_link_state *state)
++static unsigned int mvpp2_gmac_pcs_inband_caps(struct phylink_pcs *pcs,
++					       phy_interface_t interface)
+ {
+-	/* When in 802.3z mode, we must have AN enabled:
++	/* When operating in an 802.3z mode, we must have AN enabled:
+ 	 * Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
+ 	 * When <PortType> = 1 (1000BASE-X) this field must be set to 1.
++	 * Therefore, inband is "required".
+ 	 */
+-	if (phy_interface_mode_is_8023z(state->interface) &&
+-	    !phylink_test(state->advertising, Autoneg))
+-		return -EINVAL;
++	if (phy_interface_mode_is_8023z(interface))
++		return LINK_INBAND_ENABLE;
+ 
+-	return 0;
++	/* SGMII and RGMII can be configured to use inband signalling of the
++	 * AN result. Indicate these as "possible".
++	 */
++	if (interface == PHY_INTERFACE_MODE_SGMII ||
++	    phy_interface_mode_is_rgmii(interface))
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	/* For any other modes, indicate that inband is not supported. */
++	return LINK_INBAND_DISABLE;
+ }
+ 
+ static void mvpp2_gmac_pcs_get_state(struct phylink_pcs *pcs,
+@@ -6333,7 +6340,7 @@ static void mvpp2_gmac_pcs_an_restart(st
+ }
+ 
+ static const struct phylink_pcs_ops mvpp2_phylink_gmac_pcs_ops = {
+-	.pcs_validate = mvpp2_gmac_pcs_validate,
++	.pcs_inband_caps = mvpp2_gmac_pcs_inband_caps,
+ 	.pcs_get_state = mvpp2_gmac_pcs_get_state,
+ 	.pcs_config = mvpp2_gmac_pcs_config,
+ 	.pcs_an_restart = mvpp2_gmac_pcs_an_restart,
+--- a/drivers/net/pcs/pcs-lynx.c
++++ b/drivers/net/pcs/pcs-lynx.c
+@@ -35,6 +35,27 @@ enum sgmii_speed {
+ #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
+ #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
+ 
++static unsigned int lynx_pcs_inband_caps(struct phylink_pcs *pcs,
++					 phy_interface_t interface)
++{
++	switch (interface) {
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	case PHY_INTERFACE_MODE_10GBASER:
++	case PHY_INTERFACE_MODE_2500BASEX:
++		return LINK_INBAND_DISABLE;
++
++	case PHY_INTERFACE_MODE_USXGMII:
++		return LINK_INBAND_ENABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,
+ 				       struct phylink_link_state *state)
+ {
+@@ -307,6 +328,7 @@ static void lynx_pcs_link_up(struct phyl
+ }
+ 
+ static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
++	.pcs_inband_caps = lynx_pcs_inband_caps,
+ 	.pcs_get_state = lynx_pcs_get_state,
+ 	.pcs_config = lynx_pcs_config,
+ 	.pcs_an_restart = lynx_pcs_an_restart,
+--- a/drivers/net/pcs/pcs-mtk-lynxi.c
++++ b/drivers/net/pcs/pcs-mtk-lynxi.c
+@@ -110,6 +110,21 @@ static struct mtk_pcs_lynxi *pcs_to_mtk_
+ 	return container_of(pcs, struct mtk_pcs_lynxi, pcs);
+ }
+ 
++static unsigned int mtk_pcs_lynxi_inband_caps(struct phylink_pcs *pcs,
++					      phy_interface_t interface)
++{
++	switch (interface) {
++	case PHY_INTERFACE_MODE_1000BASEX:
++	case PHY_INTERFACE_MODE_2500BASEX:
++	case PHY_INTERFACE_MODE_SGMII:
++	case PHY_INTERFACE_MODE_QSGMII:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs,
+ 				    struct phylink_link_state *state)
+ {
+@@ -302,6 +317,7 @@ static void mtk_pcs_lynxi_disable(struct
+ }
+ 
+ static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = {
++	.pcs_inband_caps = mtk_pcs_lynxi_inband_caps,
+ 	.pcs_get_state = mtk_pcs_lynxi_get_state,
+ 	.pcs_config = mtk_pcs_lynxi_config,
+ 	.pcs_an_restart = mtk_pcs_lynxi_restart_an,
+--- a/drivers/net/pcs/pcs-xpcs.c
++++ b/drivers/net/pcs/pcs-xpcs.c
+@@ -628,6 +628,33 @@ static int xpcs_validate(struct phylink_
+ 	return 0;
+ }
+ 
++static unsigned int xpcs_inband_caps(struct phylink_pcs *pcs,
++				     phy_interface_t interface)
++{
++	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);
++	const struct dw_xpcs_compat *compat;
++
++	compat = xpcs_find_compat(xpcs, interface);
++	if (!compat)
++		return 0;
++
++	switch (compat->an_mode) {
++	case DW_AN_C73:
++		return LINK_INBAND_ENABLE;
++
++	case DW_AN_C37_SGMII:
++	case DW_AN_C37_1000BASEX:
++		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;
++
++	case DW_10GBASER:
++	case DW_2500BASEX:
++		return LINK_INBAND_DISABLE;
++
++	default:
++		return 0;
++	}
++}
++
+ void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)
+ {
+ 	int i, j;
+@@ -1331,6 +1358,7 @@ static const struct xpcs_id xpcs_id_list
+ 
+ static const struct phylink_pcs_ops xpcs_phylink_ops = {
+ 	.pcs_validate = xpcs_validate,
++	.pcs_inband_caps = xpcs_inband_caps,
+ 	.pcs_config = xpcs_config,
+ 	.pcs_get_state = xpcs_get_state,
+ 	.pcs_an_restart = xpcs_an_restart,



From lede-commits at lists.infradead.org  Thu Jan 23 11:35:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 14:35:04 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: bump PKG_RELEASE
In-Reply-To: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
References: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
Message-ID: <mailman.45314.1737660907.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/78f908407e2824bc69a65acec270ffb94eca4038

commit 78f908407e2824bc69a65acec270ffb94eca4038
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:54 2025 +0200

    kernel: vrx518_tc: bump PKG_RELEASE
    
    Bump PKG_RELEASE after the previous fixes.
    
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-5-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/kernel/lantiq/vrx518_tc/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/kernel/lantiq/vrx518_tc/Makefile b/package/kernel/lantiq/vrx518_tc/Makefile
index a5718d9d5b..d92c6d1c63 100644
--- a/package/kernel/lantiq/vrx518_tc/Makefile
+++ b/package/kernel/lantiq/vrx518_tc/Makefile
@@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=vrx518_tc
 PKG_VERSION:=1.5.12.4
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 PKG_BASE_NAME:=vrx518_tc_drv
 
 UGW_VERSION=8.5.2.10



From lede-commits at lists.infradead.org  Thu Jan 23 11:35:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 14:35:02 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: fix ADSL/ATM operation
In-Reply-To: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
References: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
Message-ID: <mailman.45315.1737660907.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/470335450e67002366fcbcd7334b15bdf008e44d

commit 470335450e67002366fcbcd7334b15bdf008e44d
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:52 2025 +0200

    kernel: vrx518_tc: fix ADSL/ATM operation
    
    ATM TC layer have some issues which effectively prevent VRX518 from
    being used as ADSL modem. Specifically, there one crash during the ATM
    layer configuration and wrong PVC ID selection on packet receiving what
    breaks RX path. Fix both of the issues. Make subif iface registration
    optional to prevent the crash (see more details in the new patch) and
    update the hardcoded PVC ID to match the first allocated channel.
    
    Run tested with FRITZ!Box 7530.
    
    Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
    Reported-and-tested-by: nebibigon93 at yandex.ru
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-3-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../lantiq/vrx518_tc/patches/100-compat.patch      |  2 +-
 ...cdp-atm_tc-fix-crash-on-subif_reg-absence.patch | 75 ++++++++++++++++++++++
 2 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch b/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
index d04c1ed5df..81e32369ba 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
@@ -166,7 +166,7 @@
  
 -	return (skb->DW0 >> 3) & 0xF;
 +// 	return (skb->DW0 >> 3) & 0xF;
-+	return 1;
++	return 0;	/* We use only one connection for now, so return the first connection id */
  }
  
  static int atm_get_qid_by_vcc(struct net_device *dev, struct sk_buff *skb,
diff --git a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
new file mode 100644
index 0000000000..87456424c3
--- /dev/null
+++ b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
@@ -0,0 +1,75 @@
+From: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+Date: Fri, 10 Jan 2025 00:57:27 +0000
+Subject: [PATCH] vrx518_tc: atm_tc: fix crash on subif_reg absence
+
+VRX518 (sw_plat) platform does not provid the subif_reg/subif_unreg ops
+in the same time ATM TC layer unconditionally calls them, what leads to
+the kernel crash on the atm_hook_mpoa_setup hook invocation from the ATM
+stack:
+
+  vrx518_tc:mpoa_setup_sync : sync: conn: 0, vpi: 0, vci: 35, mpoa_type: 0, mpoa_mode: 0
+  Unable to handle kernel NULL pointer dereference at virtual address 00000000
+
+Subif registration is optional and PTM TC do this only when the
+corresponding ops are defined. Do the same for ATM TC and call
+subif_reg/subif_unreg only if they are not NULL.
+
+While at it, move subif related data preparation under the 'if' block
+in order to group and isolate that aux code.
+
+Run tested with FRITZ!Box 7530.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+---
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -1232,8 +1232,9 @@ static void ppe_close(struct atm_vcc *vc
+ 		validate_oam_htu_entry(priv, 0);
+ 	spin_unlock_bh(&priv->atm_lock);
+ 
+-	priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
+-					priv->conn[cid].subif_id, 0);
++	if (priv->tc_priv->tc_ops.subif_unreg)
++		priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
++						  priv->conn[cid].subif_id, 0);
+ 				
+ 	memset(conn, 0, sizeof(*conn));
+ 
+@@ -2791,24 +2792,26 @@ static void mpoa_setup_sync(struct atm_p
+ 	struct wtx_queue_config_t tx_qcfg;
+ 	struct uni_cell_header *cell_header;
+ 	struct atm_vcc *vcc;
+-	struct net_device *dev;
+-	char dev_name[32];
+ 
+ 	tc_dbg(priv->tc_priv, MSG_INIT,
+ 		"sync: conn: %d, vpi: %d, vci: %d, mpoa_type: %d, mpoa_mode: %d\n",
+ 		conn, priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci,
+ 		priv->conn[conn].mpoa_type, priv->conn[conn].mpoa_mode);
+ 
+-	dev = priv->conn[conn].dev;
++	if (priv->tc_priv->tc_ops.subif_reg) {
++		struct net_device *dev;
++		char dev_name[32];
++
++		dev = priv->conn[conn].dev;
++		if (!dev)
++			sprintf(dev_name, "atm_%d%d",
++				priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+ 
+-	if (!dev)
+-		sprintf(dev_name, "atm_%d%d",
+-			priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+-
+-	priv->tc_priv->tc_ops.subif_reg(dev, (!dev) ? dev_name : dev->name,
+-				&priv->conn[conn].subif_id, 0);
+-	tc_dbg(priv->tc_priv, MSG_INIT,
+-		"conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++		priv->tc_priv->tc_ops.subif_reg(dev, !dev ? dev_name : dev->name,
++						&priv->conn[conn].subif_id, 0);
++		tc_dbg(priv->tc_priv, MSG_INIT,
++		       "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++	}
+ 	vcc = priv->conn[conn].vcc;
+ 
+ 	/*  set htu entry   */



From lede-commits at lists.infradead.org  Thu Jan 23 11:35:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 14:35:01 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: fix RX desc phys to virt
 mapping
In-Reply-To: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
References: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
Message-ID: <mailman.45316.1737660907.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7bd579689d2304c73c263be3e030d76c551d6e87

commit 7bd579689d2304c73c263be3e030d76c551d6e87
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:51 2025 +0200

    kernel: vrx518_tc: fix RX desc phys to virt mapping
    
    It looks like VRX518 returns phys addr of data buffer in the 'data_ptr'
    field of the RX descriptor and an actual data offset within the buffer
    in the 'byte_off' field. In order to map the phys address back to
    virtual we need the original phys address of the allocated buffer.
    
    In the same driver applies offset to phys address before the mapping,
    what leads to WARN_ON triggering in plat_mem_virt() function with
    subsequent kernel panic:
    
      WARNING: CPU: 0 PID: 0 at .../sw_plat.c:764 0xbf306cd0 [vrx518_tc at 8af9f5d0+0x25000]
      ...
      Unable to handle kernel NULL pointer dereference at virtual address 00000000
      pgd = aff5701e
      [00000000] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
    
    Noticed in ATM mode, when chip always returns byte_off = 4.
    
    In order to fix the issue, pass the phys address to plat_mem_virt() as
    is and apply byte_off later for proper DMA syncing and on mapped virtual
    address when copying RXed data into the skb.
    
    Run tested with FRITZ!Box 7530 on both ADSL and VDSL (thanks Jan) links.
    
    Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
    Tested-by: Jan Hoffmann <jan at 3e8.eu> # VDSL link
    Reported-and-tested-by: nebibigon93 at yandex.ru # ADSL link
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-2-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
index edc97998b7..6596a8b913 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
@@ -855,12 +855,12 @@ This replaces it by a basic working implementation.
 -			continue;
 +
 +		// this seems to be a pointer to a DS PKT buffer
-+		phyaddr = desc->data_ptr + desc->byte_off;
++		phyaddr = desc->data_ptr;
 +		ptr = plat_mem_virt(phyaddr);
-+
 +		len = desc->data_len;
 +
-+		dma_sync_single_range_for_cpu(pdev, phyaddr, 0, len, DMA_FROM_DEVICE);
++		dma_sync_single_for_cpu(pdev, phyaddr, desc->byte_off + len,
++					DMA_FROM_DEVICE);
 +
 +		skb = netdev_alloc_skb(g_plat_priv->netdev, len);
 +		if (unlikely(!skb)) {
@@ -871,7 +871,7 @@ This replaces it by a basic working implementation.
 -		ring_idx_inc(rxout, idx);
 +
 +		dst = skb_put(skb, len);
-+		memcpy(dst, ptr, len);
++		memcpy(dst, ptr + desc->byte_off, len);
 +
 +		priv->tc_ops.recv(g_plat_priv->netdev, skb);
 +



From lede-commits at lists.infradead.org  Thu Jan 23 11:35:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 23 Jan 2025 14:35:03 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix compatibility with linux-atm tools
In-Reply-To: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
References: <173766090103.3203063.11658948812931167499@git-01.infra.openwrt.org>
Message-ID: <mailman.45317.1737660907.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6d6dc3a3c967174598a44503f4af281574660356

commit 6d6dc3a3c967174598a44503f4af281574660356
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:53 2025 +0200

    ipq40xx: fix compatibility with linux-atm tools
    
    atm_qos struct should be the same both for user and kernel spaces. Via
    the __SO_ENCODE() macro it is used to define the SO_ATMQOS socket IOC.
    
    During the VRX518 support introduction, the atm_trafprm sturct nested
    into the atm_qos stucture was update with newer fields that are
    referenced by the ATM TC layer of the VRX518 TC driver. These new fields
    are intended to communicate information for extra traffic classes
    supported by the driver. But we are still using vanilla kernel headers
    to build the toolchain. Due to the atm.h header incoherency br2684ctl
    from linux-atm tools is incapable to configure the ATM bridge netdev:
    
      br2684ctl: Interface "dsl0" created sucessfully
      br2684ctl: Communicating over ATM 0.1.2, encapsulation: LLC
      br2684ctl: setsockopt SO_ATMQOS 22 <-- EINVAL errno
      br2684ctl: Fatal: failed to connect on socket; File descriptor in bad state
    
    There are two options to fix this incoherency. (a) update the header
    file in the toolchain to build linux-atm against updated atm_trafprm and
    atm_qos structures, or (b) revert atm_trafprm changes.
    
    Since there are no actual users of the extra ATM QoS traffic classes,
    just drop these extra traffic classes from vrx518_tc ATM TC layer and
    drop the kernel patch updating atm.h.
    
    Besides fixing the compatibility with linux-atm tools, removing the
    kernel patch should simplify kernel updates removing unneeded burden of
    maintenance.
    
    Run tested with FRITZ!Box 7530 with disabled extra traffic classes and
    then removed them entirely before the submission.
    
    CC: John Crispin <john at phrozen.org>
    Fixes: cfd42a0098 ("ipq40xx: add Intel/Lantiq ATM hacks")
    Suggested-by: Andre Heider <a.heider at gmail.com>
    Reported-and-tested-by: nebibigon93 at yandex.ru
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-4-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../101-dcdp-atm_tc-drop-extra-qos-classes.patch   | 144 +++++++++++++++++++++
 .../lantiq/vrx518_tc/patches/200-swplat.patch      |  12 +-
 .../kernel/lantiq/vrx518_tc/patches/202-napi.patch |   4 +-
 .../204-dcdp-atm_tc-fix-compilation-warning.patch  |   6 +-
 ...cdp-atm_tc-fix-crash-on-subif_reg-absence.patch |   4 +-
 .../ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch |  43 ------
 6 files changed, 157 insertions(+), 56 deletions(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch b/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch
new file mode 100644
index 0000000000..5c7b246545
--- /dev/null
+++ b/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch
@@ -0,0 +1,144 @@
+Extra ATM traffic classes requires atm_qos struct extension and a set of
+new defines. What itself requires atm.h updates both in the kernel and
+in the toolchain. On another hand we do not have any real users of these
+traffic classes.
+
+In absence of real user there are no benefits to support this
+functionality. There is only the burden of maintenance of extra patches
+all around the building framework. So just drop these extra QoS traffic
+classes in order to facilitate maintenance and avoid side effects like
+breaking compatibility with existing userspace tools like linux-atm.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+--
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -463,34 +463,9 @@ static void set_qsb(struct atm_priv *pri
+ 	/* Weighted Fair Queueing Factor (WFQF) */
+ 	switch (qos->txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		/*  real time queue gets weighted fair queueing bypass  */
+ 		q_parm_tbl.bit.wfqf = 0;
+ 		break;
+-	case ATM_VBR_NRT:
+-	case ATM_UBR_PLUS:
+-		/*  WFQF calculation here is based on virtual cell rates,
+-		      to reduce granularity for high rates
+-		*/
+-		/*  WFQF is maximum cell rate / garenteed cell rate */
+-		/*  wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX /
+-			requested_minimum_peak_cell_rate
+-		*/
+-		if (qos->txtp.min_pcr == 0)
+-			q_parm_tbl.bit.wfqf = QSB_WFQ_NONUBR_MAX;
+-		else {
+-			tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX /
+-				qos->txtp.min_pcr;
+-			if (tmp == 0)
+-				q_parm_tbl.bit.wfqf = 1;
+-			else if (tmp > QSB_WFQ_NONUBR_MAX)
+-				q_parm_tbl.bit.wfqf
+-					= QSB_WFQ_NONUBR_MAX;
+-			else
+-				q_parm_tbl.bit.wfqf = tmp;
+-		}
+-		break;
+-
+ 	case ATM_UBR:
+ 	default:
+ 		q_parm_tbl.bit.wfqf = QSB_WFQ_UBR_BYPASS;
+@@ -498,42 +473,9 @@ static void set_qsb(struct atm_priv *pri
+ 	}
+ 
+ 	/* Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 */
+-	if (qos->txtp.traffic_class == ATM_VBR_RT ||
+-		qos->txtp.traffic_class == ATM_VBR_NRT) {
+-		if (qos->txtp.scr == 0) {
+-			/* disable shaper */
+-			q_vbr_parm_tbl.bit.taus = 0;
+-			q_vbr_parm_tbl.bit.ts = 0;
+-		} else {
+-			/* Cell Loss Priority  (CLP) */
+-			if ((vcc->atm_options & ATM_ATMOPT_CLP))
+-				/* CLP1 */
+-				q_parm_tbl.bit.vbr = 1;
+-			else
+-				/* CLP0 */
+-				q_parm_tbl.bit.vbr = 0;
+-			/* Rate Shaper Parameter (TS) and
+-			    Burst Tolerance Parameter for SCR (tauS)
+-			*/
+-			tmp = ((qsb_clk * param->qsb_tstep) >> 5) /
+-					qos->txtp.scr + 1;
+-			q_vbr_parm_tbl.bit.ts
+-				= tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
+-			tmp = (qos->txtp.mbs - 1) *
+-				(q_vbr_parm_tbl.bit.ts -
+-					q_parm_tbl.bit.tp) / 64;
+-			if (tmp == 0)
+-				q_vbr_parm_tbl.bit.taus = 1;
+-			else if (tmp > QSB_TAUS_MAX)
+-				q_vbr_parm_tbl.bit.taus
+-					= QSB_TAUS_MAX;
+-			else
+-				q_vbr_parm_tbl.bit.taus = tmp;
+-		}
+-	} else {
+-		q_vbr_parm_tbl.bit.taus = 0;
+-		q_vbr_parm_tbl.bit.ts = 0;
+-	}
++	/* NB: shaper disabled since there no user interface to activate it */
++	q_vbr_parm_tbl.bit.taus = 0;
++	q_vbr_parm_tbl.bit.ts = 0;
+ 
+ 	/* Queue Parameter Table (QPT) */
+ 	tc_w32(QSB_QPT_SET_MASK, QSB_RTM);
+@@ -1064,15 +1006,6 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/* check bandwidth */
+ 	if ((vcc->qos.txtp.traffic_class == ATM_CBR &&
+ 		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_RT &&
+-		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_NRT &&
+-		vcc->qos.txtp.scr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS &&
+-		vcc->qos.txtp.min_pcr >
+ 			(port->tx_max_cell_rate - port->tx_used_cell_rate))) {
+ 		tc_dbg(priv->tc_priv, MSG_INIT, "exceed TX line rate\n");
+ 		return -EINVAL;
+@@ -1128,15 +1061,8 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/*  reserve bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate += vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate += vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate += vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* update atm_vcc structure */
+@@ -1222,15 +1148,8 @@ static void ppe_close(struct atm_vcc *vc
+ 	/* release bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate -= vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* idle for a while to let parallel operation finish */
diff --git a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
index 6596a8b913..930fa6632c 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
@@ -3,7 +3,7 @@ This replaces it by a basic working implementation.
 
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -603,7 +603,11 @@ static void atm_aca_init(struct atm_priv
+@@ -545,7 +545,11 @@ static void atm_aca_init(struct atm_priv
  	cfg = &priv->tc_priv->cfg;
  
  	txin = &param.aca_txin;
@@ -15,7 +15,7 @@ This replaces it by a basic working implementation.
  	txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
  	txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
  	txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
-@@ -625,7 +629,11 @@ static void atm_aca_init(struct atm_priv
+@@ -567,7 +571,11 @@ static void atm_aca_init(struct atm_priv
  		txin->soc_cmlt_cnt_addr);
  
  	txout = &param.aca_txout;
@@ -27,7 +27,7 @@ This replaces it by a basic working implementation.
  	txout->hd_size_in_dw = cfg->txout.soc_desc_dwsz;
  	txout->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_OUT_PD_LIST_BASE);
  	txout->pd_desc_num = __ACA_TX_OUT_PD_LIST_NUM;
-@@ -647,7 +655,11 @@ static void atm_aca_init(struct atm_priv
+@@ -589,7 +597,11 @@ static void atm_aca_init(struct atm_priv
  		txout->soc_cmlt_cnt_addr);
  
  	rxout = &param.aca_rxout;
@@ -39,7 +39,7 @@ This replaces it by a basic working implementation.
  	rxout->hd_size_in_dw = cfg->rxout.soc_desc_dwsz;
  	rxout->pd_desc_base = SB_XBAR_ADDR(__ACA_RX_OUT_PD_LIST_BASE);
  	rxout->pd_desc_num = __ACA_RX_OUT_PD_LIST_NUM;
-@@ -669,7 +681,11 @@ static void atm_aca_init(struct atm_priv
+@@ -611,7 +623,11 @@ static void atm_aca_init(struct atm_priv
  		rxout->soc_cmlt_cnt_addr);
  
  	rxin = &param.aca_rxin;
@@ -51,7 +51,7 @@ This replaces it by a basic working implementation.
  	rxin->hd_size_in_dw = cfg->rxin.soc_desc_dwsz;
  	rxin->pd_desc_base = SB_XBAR_ADDR(__RX_IN_PD_DES_LIST_BASE);
  	rxin->pd_desc_num = __ACA_RX_IN_PD_LIST_NUM;
-@@ -1261,7 +1277,7 @@ static int ppe_ioctl(struct atm_dev *dev
+@@ -1180,7 +1196,7 @@ static int ppe_ioctl(struct atm_dev *dev
  static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
  {
  	int ret, qid, mpoa_pt, mpoa_type, vid;
@@ -60,7 +60,7 @@ This replaces it by a basic working implementation.
  	struct atm_priv *priv;
  
  	if (!vcc) {
-@@ -1327,12 +1343,14 @@ static int ppe_send(struct atm_vcc *vcc,
+@@ -1246,12 +1262,14 @@ static int ppe_send(struct atm_vcc *vcc,
  	tc_dbg(priv->tc_priv, MSG_TX, "vid: 0x%x, qid: 0x%x\n",
  			vid, qid);
  
diff --git a/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch b/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
index 266beba1a7..75d18138c0 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
@@ -296,7 +296,7 @@
  	priv->tc_ops.umt_start = plat_umt_start;
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
+@@ -3569,7 +3569,7 @@ static void atm_aca_ring_config_init(str
  static int atm_ring_init(struct atm_priv *priv)
  {
  	atm_aca_ring_config_init(priv);
@@ -305,7 +305,7 @@
  }
  
  static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
-@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
+@@ -3939,7 +3939,7 @@ void atm_tc_unload(void)
  	/* unregister device */
  	if (priv->tc_priv->tc_ops.dev_unreg != NULL)
  		priv->tc_priv->tc_ops.dev_unreg(NULL,
diff --git a/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch b/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
index bf2d82e2b5..1b70a663cd 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
@@ -1,6 +1,6 @@
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -746,7 +746,8 @@ static void atm_aca_init(struct atm_priv
+@@ -688,7 +688,8 @@ static void atm_aca_init(struct atm_priv
  		ACA_TXOUT_EN | ACA_RXIN_EN | ACA_RXOUT_EN, 1);
  }
  
@@ -10,7 +10,7 @@
  {
  	struct tm nowtm;
  	char tmbuf[64];
-@@ -765,7 +766,8 @@ static int print_datetime(char *buffer,
+@@ -707,7 +708,8 @@ static int print_datetime(char *buffer,
  			nowtm.tm_hour,
  			nowtm.tm_min,
  			nowtm.tm_sec);
@@ -20,7 +20,7 @@
  
  	return 0;
  }
-@@ -967,7 +969,7 @@ void show_atm_pvc(struct seq_file *seq,
+@@ -909,7 +911,7 @@ void show_atm_pvc(struct seq_file *seq,
  	char buf[64];
  
  	seq_printf(seq, "\tNet device: %s\n", pvc->dev->name);
diff --git a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
index 87456424c3..f268c0908c 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
@@ -23,7 +23,7 @@ Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
 ---
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -1232,8 +1232,9 @@ static void ppe_close(struct atm_vcc *vc
+@@ -1158,8 +1158,9 @@ static void ppe_close(struct atm_vcc *vc
  		validate_oam_htu_entry(priv, 0);
  	spin_unlock_bh(&priv->atm_lock);
  
@@ -35,7 +35,7 @@ Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
  				
  	memset(conn, 0, sizeof(*conn));
  
-@@ -2791,24 +2792,26 @@ static void mpoa_setup_sync(struct atm_p
+@@ -2710,24 +2711,26 @@ static void mpoa_setup_sync(struct atm_p
  	struct wtx_queue_config_t tx_qcfg;
  	struct uni_cell_header *cell_header;
  	struct atm_vcc *vcc;
diff --git a/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch b/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch
deleted file mode 100644
index c15a4b3ae3..0000000000
--- a/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From: John Crispin <blogic at openwrt.org>
-Date: Fri, 3 Aug 2012 10:27:25 +0200
-Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
-
-Signed-off-by: John Crispin <blogic at openwrt.org>
---- a/include/uapi/linux/atm.h
-+++ b/include/uapi/linux/atm.h
-@@ -131,8 +131,14 @@
- #define ATM_ABR		4
- #define ATM_ANYCLASS	5		/* compatible with everything */
- 
-+#define ATM_VBR_NRT     ATM_VBR
-+#define ATM_VBR_RT      6
-+#define ATM_UBR_PLUS    7
-+#define ATM_GFR         8
-+
- #define ATM_MAX_PCR	-1		/* maximum available PCR */
- 
-+
- struct atm_trafprm {
- 	unsigned char	traffic_class;	/* traffic class (ATM_UBR, ...) */
- 	int		max_pcr;	/* maximum PCR in cells per second */
-@@ -155,6 +161,9 @@ struct atm_trafprm {
- 	unsigned int adtf      :10;     /* ACR Decrease Time Factor (10-bit) */
- 	unsigned int cdf       :3;      /* Cutoff Decrease Factor (3-bit) */
-         unsigned int spare     :9;      /* spare bits */ 
-+	int		scr;		/* sustained rate in cells per second */
-+	int		mbs;		/* maximum burst size (MBS) in cells */
-+	int		cdv;		/* Cell delay variation */
- };
- 
- struct atm_qos {
---- a/net/atm/proc.c
-+++ b/net/atm/proc.c
-@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
- static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
- {
- 	static const char *const class_name[] = {
--		"off", "UBR", "CBR", "VBR", "ABR"};
-+		"off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
- 	static const char *const aal_name[] = {
- 		"---",	"1",	"2",	"3/4",	/*  0- 3 */
- 		"???",	"5",	"???",	"???",	/*  4- 7 */



From lede-commits at lists.infradead.org  Fri Jan 24 02:53:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 05:53:15 -0500
Subject: [openwrt/openwrt]  qualcommax: add missing WAN LED support to
 Spectrum SAX1V1K routers
In-Reply-To: <173771599593.397397.14254470854958251040@git-01.infra.openwrt.org>
References: <173771599593.397397.14254470854958251040@git-01.infra.openwrt.org>
Message-ID: <mailman.45686.1737716064.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8e78bc39a38d2a82818bcae467d3bcbbbe8531f3

commit 8e78bc39a38d2a82818bcae467d3bcbbbe8531f3
Author: Ivan Deng <hongba at rocketmail.com>
AuthorDate: Thu Jan 16 00:53:36 2025 -0800

    qualcommax: add missing WAN LED support to Spectrum SAX1V1K routers
    
    Fixed an issue where both WAN LEDs light up before plugging in the
    ethernet cable and no blinking regardless of WAN network activity.
    
    Updated the LED configuration to reflect proper status:
    Green indicates 2.5Gb connection speed.
    Yellow indicates other connection speed and traffic activity.
    
    This resolves inconsistent WAN LED behavior on Spectrum SAX1V1K routers.
    
    Signed-off-by: Ivan Deng <hongba at rocketmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17623
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts    | 21 +++++++++++++++++++++
 .../ipq807x/base-files/etc/board.d/01_leds          |  3 ++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
index fbb652a097..15ca4d8ec4 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
@@ -137,6 +137,27 @@
 		reg = <28>;
 		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 		reset-deassert-us = <10000>;
+		
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led at 0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_YELLOW>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+
+			led at 2 {
+				reg = <2>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+		};
 	};
 };
 
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
index b5c3cbc736..ae941657f9 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
@@ -16,7 +16,8 @@ asus,rt-ax89x)
 	ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
 	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
 	;;
-dynalink,dl-wrx36)
+dynalink,dl-wrx36|\
+spectrum,sax1v1k)
 	ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
 	ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
 	;;



From lede-commits at lists.infradead.org  Fri Jan 24 02:53:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 05:53:44 -0500
Subject: [openwrt/openwrt]  qualcommax: add missing WAN LED support to
 Spectrum SAX1V1K routers
In-Reply-To: <173771602483.399014.1736496958751455759@git-01.infra.openwrt.org>
References: <173771602483.399014.1736496958751455759@git-01.infra.openwrt.org>
Message-ID: <mailman.45687.1737716064.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/bf0a1296a5533f3b8aa2d07f2f4b3022d074c082

commit bf0a1296a5533f3b8aa2d07f2f4b3022d074c082
Author: Ivan Deng <hongba at rocketmail.com>
AuthorDate: Thu Jan 16 00:53:36 2025 -0800

    qualcommax: add missing WAN LED support to Spectrum SAX1V1K routers
    
    Fixed an issue where both WAN LEDs light up before plugging in the
    ethernet cable and no blinking regardless of WAN network activity.
    
    Updated the LED configuration to reflect proper status:
    Green indicates 2.5Gb connection speed.
    Yellow indicates other connection speed and traffic activity.
    
    This resolves inconsistent WAN LED behavior on Spectrum SAX1V1K routers.
    
    Signed-off-by: Ivan Deng <hongba at rocketmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17623
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 8e78bc39a38d2a82818bcae467d3bcbbbe8531f3)
---
 .../arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts    | 21 +++++++++++++++++++++
 .../ipq807x/base-files/etc/board.d/01_leds          |  3 ++-
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
index fbb652a097..15ca4d8ec4 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-sax1v1k.dts
@@ -137,6 +137,27 @@
 		reg = <28>;
 		reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 		reset-deassert-us = <10000>;
+		
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led at 0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_YELLOW>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+
+			led at 2 {
+				reg = <2>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_WAN;
+				default-state = "keep";
+				active-low;
+			};
+		};
 	};
 };
 
diff --git a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
index b5c3cbc736..ae941657f9 100644
--- a/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
+++ b/target/linux/qualcommax/ipq807x/base-files/etc/board.d/01_leds
@@ -16,7 +16,8 @@ asus,rt-ax89x)
 	ucidef_set_led_netdev "sfp" "SFP" "white:sfp" "10g-sfp"
 	ucidef_set_led_netdev "wan" "WAN" "white:wan" "wan"
 	;;
-dynalink,dl-wrx36)
+dynalink,dl-wrx36|\
+spectrum,sax1v1k)
 	ucidef_set_led_netdev "wan-port-link-green" "WAN-PORT-LINK-GREEN" "90000.mdio-1:1c:green:wan" "wan" "link_2500"
 	ucidef_set_led_netdev "wan-port-link-yellow" "WAN-PORT-LINK-YELLOW" "90000.mdio-1:1c:yellow:wan" "wan" "tx rx link_10 link_100 link_1000"
 	;;



From lede-commits at lists.infradead.org  Fri Jan 24 08:15:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 11:15:38 -0500
Subject: [openwrt/openwrt]  realtek: Fix old compatible for HPE 1920-8G PoE
In-Reply-To: <173773533850.803248.11187352090417000630@git-01.infra.openwrt.org>
References: <173773533850.803248.11187352090417000630@git-01.infra.openwrt.org>
Message-ID: <mailman.45854.1737735343.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6a7fa68569ac11bb2c2abb14026e8b84acd3a12f

commit 6a7fa68569ac11bb2c2abb14026e8b84acd3a12f
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Jan 24 17:07:21 2025 +0100

    realtek: Fix old compatible for HPE 1920-8G PoE
    
    Supported devices are listed in the metadata as the first part of the
    DTS compatible. This normally follows the format "vendor,device".
    
    When updating the device name of the 180W 1920-8G PoE an underscore was
    used, instead of a comma, to join the vendor and device name. This will
    lead to warnings for users wanting to sysupgrade a device with an older
    compatible, as the device's info does not match the one the metadata.
    
    Fixes: 987c96e88927 ("realtek: rename hpe,1920-8g-poe to match hardware")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/image/rtl838x.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 34464316c7..0d6acd483a 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -125,7 +125,7 @@ define Device/hpe_1920-8g-poe-180w
   DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
   DEVICE_PACKAGES += realtek-poe kmod-hwmon-gpiofan
   H3C_DEVICE_ID := 0x00010025
-  SUPPORTED_DEVICES += hpe_1920-8g-poe
+  SUPPORTED_DEVICES += hpe,1920-8g-poe
 endef
 TARGET_DEVICES += hpe_1920-8g-poe-180w
 



From lede-commits at lists.infradead.org  Fri Jan 24 08:16:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 11:16:34 -0500
Subject: [openwrt/openwrt]  realtek: Fix old compatible for HPE 1920-8G PoE
In-Reply-To: <173773539479.806158.17133035691307674193@git-01.infra.openwrt.org>
References: <173773539479.806158.17133035691307674193@git-01.infra.openwrt.org>
Message-ID: <mailman.45855.1737735398.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7a1da5486f378a74c614d49de3ac37ddb82ccc87

commit 7a1da5486f378a74c614d49de3ac37ddb82ccc87
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Jan 24 17:07:21 2025 +0100

    realtek: Fix old compatible for HPE 1920-8G PoE
    
    Supported devices are listed in the metadata as the first part of the
    DTS compatible. This normally follows the format "vendor,device".
    
    When updating the device name of the 180W 1920-8G PoE an underscore was
    used, instead of a comma, to join the vendor and device name. This will
    lead to warnings for users wanting to sysupgrade a device with an older
    compatible, as the device's info does not match the one the metadata.
    
    Fixes: 987c96e88927 ("realtek: rename hpe,1920-8g-poe to match hardware")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    (cherry picked from commit 6a7fa68569ac11bb2c2abb14026e8b84acd3a12f)
---
 target/linux/realtek/image/rtl838x.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 866659ad14..9ade8d536b 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -124,7 +124,7 @@ define Device/hpe_1920-8g-poe-180w
   DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
   DEVICE_PACKAGES += realtek-poe
   H3C_DEVICE_ID := 0x00010025
-  SUPPORTED_DEVICES += hpe_1920-8g-poe
+  SUPPORTED_DEVICES += hpe,1920-8g-poe
 endef
 TARGET_DEVICES += hpe_1920-8g-poe-180w
 



From lede-commits at lists.infradead.org  Fri Jan 24 08:17:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 11:17:33 -0500
Subject: [openwrt/openwrt]  realtek: Fix old compatible for HPE 1920-8G PoE
In-Reply-To: <173773545325.808605.9291431792478500290@git-01.infra.openwrt.org>
References: <173773545325.808605.9291431792478500290@git-01.infra.openwrt.org>
Message-ID: <mailman.45856.1737735457.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/4f2c6dbc393d10e682782694b63ea84e71bb4699

commit 4f2c6dbc393d10e682782694b63ea84e71bb4699
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Fri Jan 24 17:07:21 2025 +0100

    realtek: Fix old compatible for HPE 1920-8G PoE
    
    Supported devices are listed in the metadata as the first part of the
    DTS compatible. This normally follows the format "vendor,device".
    
    When updating the device name of the 180W 1920-8G PoE an underscore was
    used, instead of a comma, to join the vendor and device name. This will
    lead to warnings for users wanting to sysupgrade a device with an older
    compatible, as the device's info does not match the one the metadata.
    
    Fixes: 987c96e88927 ("realtek: rename hpe,1920-8g-poe to match hardware")
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    (cherry picked from commit 6a7fa68569ac11bb2c2abb14026e8b84acd3a12f)
---
 target/linux/realtek/image/rtl838x.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 75118aee43..8479a896aa 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -113,7 +113,7 @@ define Device/hpe_1920-8g-poe-180w
   SOC := rtl8380
   DEVICE_MODEL := 1920-8G-PoE+ 180W (JG922A)
   H3C_DEVICE_ID := 0x00010025
-  SUPPORTED_DEVICES += hpe_1920-8g-poe
+  SUPPORTED_DEVICES += hpe,1920-8g-poe
 endef
 TARGET_DEVICES += hpe_1920-8g-poe-180w
 



From lede-commits at lists.infradead.org  Fri Jan 24 13:20:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:20:14 -0500
Subject: [openwrt/openwrt]  armsr: add Hyper-V on Arm64 support
In-Reply-To: <173775361431.1208839.4187978389075365916@git-01.infra.openwrt.org>
References: <173775361431.1208839.4187978389075365916@git-01.infra.openwrt.org>
Message-ID: <mailman.45915.1737753620.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/075571b0232c0140d9ebcc6c3a250e69a2324aea

commit 075571b0232c0140d9ebcc6c3a250e69a2324aea
Author: Mathew McBride <matt at traverse.com.au>
AuthorDate: Fri Jan 17 16:58:05 2025 +1100

    armsr: add Hyper-V on Arm64 support
    
    This adds support for running as a guest on Windows Hyper-V
    on arm64 Windows machines (like the Qualcomm Snapdragon X based
    machines). The drivers are the same as Hyper-V on x86-64.
    
    Limitations:
    - The VM must be configured with a single vCPU only[1].
    
    It appears Microsoft has made changes to Arm64 Hyper-V's timers
    and other infrastructure in Windows 11 24H2 which require
    kernel changes[2][3] to fix.
    
    - You must turn off secure boot enforcement to boot OpenWrt, as
    OpenWrt/armsr does not have a signed bootloader.
    
    [1] https://www.reddit.com/r/Surface/comments/1dmzpzt/comment/lx4tatp/
    [2] https://www.reddit.com/r/Surface/comments/1dmzpzt/comment/m5bqgrm/
    [3] https://github.com/microsoft/WSL2-Linux-Kernel
    
    Signed-off-by: Mathew McBride <matt at traverse.com.au>
    Link: https://github.com/openwrt/openwrt/pull/17675
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/armsr/armv8/config-6.6 | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/linux/armsr/armv8/config-6.6 b/target/linux/armsr/armv8/config-6.6
index a5a90ff9a8..d99ac46d14 100644
--- a/target/linux/armsr/armv8/config-6.6
+++ b/target/linux/armsr/armv8/config-6.6
@@ -264,6 +264,7 @@ CONFIG_DRM_BOCHS=y
 CONFIG_DRM_BRIDGE=y
 # CONFIG_DRM_FSL_LDB is not set
 CONFIG_DRM_GEM_SHMEM_HELPER=y
+# CONFIG_DRM_HYPERV is not set
 # CONFIG_DRM_IMX8QM_LDB is not set
 # CONFIG_DRM_IMX8QXP_LDB is not set
 # CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set
@@ -308,6 +309,7 @@ CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_IMAGEBLIT=y
 CONFIG_FB_CMDLINE=y
+CONFIG_FB_HYPERV=y
 CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_MX3=y
 # CONFIG_FB_SH_MOBILE_LCDC is not set
@@ -339,6 +341,7 @@ CONFIG_GPIO_ZYNQMP_MODEPIN=y
 CONFIG_HDMI=y
 CONFIG_HI3660_MBOX=y
 CONFIG_HI6220_MBOX=y
+# CONFIG_HID_HYPERV_MOUSE is not set
 CONFIG_HISILICON_ERRATUM_161600802=y
 CONFIG_HISILICON_LPC=y
 CONFIG_HISI_PMU=y
@@ -354,6 +357,12 @@ CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y
 # CONFIG_HW_RANDOM_HISI is not set
 # CONFIG_HW_RANDOM_HISTB is not set
 CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_HYPERV=y
+# CONFIG_HYPERV_BALLOON is not set
+CONFIG_HYPERV_KEYBOARD=y
+CONFIG_HYPERV_NET=y
+CONFIG_HYPERV_STORAGE=y
+# CONFIG_HYPERV_TESTING is not set
 CONFIG_I2C=y
 CONFIG_I2C_ALGOBIT=y
 CONFIG_I2C_ALTERA=y
@@ -408,6 +417,7 @@ CONFIG_IOMMU_SUPPORT=y
 # CONFIG_IPMMU_VMSA is not set
 # CONFIG_K3_DMA is not set
 CONFIG_KCMP=y
+CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_IMX_SC_KEY is not set
 # CONFIG_KEYBOARD_SUN4I_LRADC is not set
 CONFIG_KSM=y
@@ -517,6 +527,7 @@ CONFIG_PCI_AARDVARK=y
 CONFIG_PCI_HISI=y
 CONFIG_PCI_HOST_THUNDER_ECAM=y
 CONFIG_PCI_HOST_THUNDER_PEM=y
+CONFIG_PCI_HYPERV=y
 CONFIG_PCI_IMX6=y
 CONFIG_PCI_IMX6_HOST=y
 CONFIG_PCI_IOV=y
@@ -700,6 +711,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
 CONFIG_SERIAL_SH_SCI_DMA=y
 CONFIG_SERIAL_SH_SCI_EARLYCON=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=18
+CONFIG_SERIO=y
 # CONFIG_SMC91X is not set
 # CONFIG_SND_SOC_RCAR is not set
 # CONFIG_SND_SOC_RZ is not set



From lede-commits at lists.infradead.org  Fri Jan 24 13:23:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:23:55 -0500
Subject: [openwrt/openwrt]  mediatek-mt7622: netgear-wax206 fix wifi leds
In-Reply-To: <173775383527.1213043.15162577620235737574@git-01.infra.openwrt.org>
References: <173775383527.1213043.15162577620235737574@git-01.infra.openwrt.org>
Message-ID: <mailman.45916.1737753839.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9ada8578fd2768d077607b189987972ad600a804

commit 9ada8578fd2768d077607b189987972ad600a804
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Wed Jan 22 19:59:12 2025 +0100

    mediatek-mt7622: netgear-wax206 fix wifi leds
    
    the wifi leds of the wax206 were not reacting.
    This patch enables the green leds to show activity, as the blue ones are very bright.
    Also set the label-mac to the gmac0
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17694
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mediatek/dts/mt7622-netgear-wax206.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
index 524a498740..4881004ac3 100644
--- a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
+++ b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
@@ -13,6 +13,7 @@
 
 	aliases {
 		ethernet0 = &gmac0;
+		label-mac-device = &gmac0;
 		led-boot = &led_power_r;
 		led-failsafe = &led_power_r;
 		led-running = &led_power_g;
@@ -84,6 +85,7 @@
 			default-state = "off";
 			gpios = <&pio 85 GPIO_ACTIVE_LOW>;
 			label = "wifin:green";
+			linux,default-trigger = "phy0tpt";
 		};
 
 		wifin_blue {
@@ -96,6 +98,7 @@
 			default-state = "off";
 			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
 			label = "wifia:green";
+			linux,default-trigger = "phy1tpt";
 		};
 
 		wifia_blue {



From lede-commits at lists.infradead.org  Fri Jan 24 13:40:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:40:19 -0500
Subject: [openwrt/openwrt]  mediatek-mt7622: netgear-wax206 fix wifi leds
In-Reply-To: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
References: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
Message-ID: <mailman.45919.1737754823.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/0ba00ec205a449fd341a7b094363048a8884da63

commit 0ba00ec205a449fd341a7b094363048a8884da63
Author: Florian Maurer <f.maurer at outlook.de>
AuthorDate: Wed Jan 22 19:59:12 2025 +0100

    mediatek-mt7622: netgear-wax206 fix wifi leds
    
    the wifi leds of the wax206 were not reacting.
    This patch enables the green leds to show activity, as the blue ones are very bright.
    Also set the label-mac to the gmac0
    
    Signed-off-by: Florian Maurer <f.maurer at outlook.de>
    Link: https://github.com/openwrt/openwrt/pull/17694
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 9ada8578fd2768d077607b189987972ad600a804)
---
 target/linux/mediatek/dts/mt7622-netgear-wax206.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
index 524a498740..4881004ac3 100644
--- a/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
+++ b/target/linux/mediatek/dts/mt7622-netgear-wax206.dts
@@ -13,6 +13,7 @@
 
 	aliases {
 		ethernet0 = &gmac0;
+		label-mac-device = &gmac0;
 		led-boot = &led_power_r;
 		led-failsafe = &led_power_r;
 		led-running = &led_power_g;
@@ -84,6 +85,7 @@
 			default-state = "off";
 			gpios = <&pio 85 GPIO_ACTIVE_LOW>;
 			label = "wifin:green";
+			linux,default-trigger = "phy0tpt";
 		};
 
 		wifin_blue {
@@ -96,6 +98,7 @@
 			default-state = "off";
 			gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
 			label = "wifia:green";
+			linux,default-trigger = "phy1tpt";
 		};
 
 		wifia_blue {



From lede-commits at lists.infradead.org  Fri Jan 24 13:40:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:40:23 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: bump PKG_RELEASE
In-Reply-To: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
References: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
Message-ID: <mailman.45920.1737754823.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/04a1d0d410fe4df85e5dfc1716102eb9df0d88ad

commit 04a1d0d410fe4df85e5dfc1716102eb9df0d88ad
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:54 2025 +0200

    kernel: vrx518_tc: bump PKG_RELEASE
    
    Bump PKG_RELEASE after the previous fixes.
    
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-5-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 78f908407e2824bc69a65acec270ffb94eca4038)
---
 package/kernel/lantiq/vrx518_tc/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/kernel/lantiq/vrx518_tc/Makefile b/package/kernel/lantiq/vrx518_tc/Makefile
index a5718d9d5b..d92c6d1c63 100644
--- a/package/kernel/lantiq/vrx518_tc/Makefile
+++ b/package/kernel/lantiq/vrx518_tc/Makefile
@@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=vrx518_tc
 PKG_VERSION:=1.5.12.4
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 PKG_BASE_NAME:=vrx518_tc_drv
 
 UGW_VERSION=8.5.2.10



From lede-commits at lists.infradead.org  Fri Jan 24 13:40:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:40:22 -0500
Subject: [openwrt/openwrt]  ipq40xx: fix compatibility with linux-atm tools
In-Reply-To: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
References: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
Message-ID: <mailman.45921.1737754826.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a96eaa645647d3f4c39bd01d2d43418abf29ad0c

commit a96eaa645647d3f4c39bd01d2d43418abf29ad0c
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:53 2025 +0200

    ipq40xx: fix compatibility with linux-atm tools
    
    atm_qos struct should be the same both for user and kernel spaces. Via
    the __SO_ENCODE() macro it is used to define the SO_ATMQOS socket IOC.
    
    During the VRX518 support introduction, the atm_trafprm sturct nested
    into the atm_qos stucture was update with newer fields that are
    referenced by the ATM TC layer of the VRX518 TC driver. These new fields
    are intended to communicate information for extra traffic classes
    supported by the driver. But we are still using vanilla kernel headers
    to build the toolchain. Due to the atm.h header incoherency br2684ctl
    from linux-atm tools is incapable to configure the ATM bridge netdev:
    
      br2684ctl: Interface "dsl0" created sucessfully
      br2684ctl: Communicating over ATM 0.1.2, encapsulation: LLC
      br2684ctl: setsockopt SO_ATMQOS 22 <-- EINVAL errno
      br2684ctl: Fatal: failed to connect on socket; File descriptor in bad state
    
    There are two options to fix this incoherency. (a) update the header
    file in the toolchain to build linux-atm against updated atm_trafprm and
    atm_qos structures, or (b) revert atm_trafprm changes.
    
    Since there are no actual users of the extra ATM QoS traffic classes,
    just drop these extra traffic classes from vrx518_tc ATM TC layer and
    drop the kernel patch updating atm.h.
    
    Besides fixing the compatibility with linux-atm tools, removing the
    kernel patch should simplify kernel updates removing unneeded burden of
    maintenance.
    
    Run tested with FRITZ!Box 7530 with disabled extra traffic classes and
    then removed them entirely before the submission.
    
    CC: John Crispin <john at phrozen.org>
    Fixes: cfd42a0098 ("ipq40xx: add Intel/Lantiq ATM hacks")
    Suggested-by: Andre Heider <a.heider at gmail.com>
    Reported-and-tested-by: nebibigon93 at yandex.ru
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-4-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 6d6dc3a3c967174598a44503f4af281574660356)
---
 .../101-dcdp-atm_tc-drop-extra-qos-classes.patch   | 144 +++++++++++++++++++++
 .../lantiq/vrx518_tc/patches/200-swplat.patch      |  12 +-
 .../kernel/lantiq/vrx518_tc/patches/202-napi.patch |   4 +-
 .../204-dcdp-atm_tc-fix-compilation-warning.patch  |   6 +-
 ...cdp-atm_tc-fix-crash-on-subif_reg-absence.patch |   4 +-
 .../ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch |  43 ------
 6 files changed, 157 insertions(+), 56 deletions(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch b/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch
new file mode 100644
index 0000000000..5c7b246545
--- /dev/null
+++ b/package/kernel/lantiq/vrx518_tc/patches/101-dcdp-atm_tc-drop-extra-qos-classes.patch
@@ -0,0 +1,144 @@
+Extra ATM traffic classes requires atm_qos struct extension and a set of
+new defines. What itself requires atm.h updates both in the kernel and
+in the toolchain. On another hand we do not have any real users of these
+traffic classes.
+
+In absence of real user there are no benefits to support this
+functionality. There is only the burden of maintenance of extra patches
+all around the building framework. So just drop these extra QoS traffic
+classes in order to facilitate maintenance and avoid side effects like
+breaking compatibility with existing userspace tools like linux-atm.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+--
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -463,34 +463,9 @@ static void set_qsb(struct atm_priv *pri
+ 	/* Weighted Fair Queueing Factor (WFQF) */
+ 	switch (qos->txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		/*  real time queue gets weighted fair queueing bypass  */
+ 		q_parm_tbl.bit.wfqf = 0;
+ 		break;
+-	case ATM_VBR_NRT:
+-	case ATM_UBR_PLUS:
+-		/*  WFQF calculation here is based on virtual cell rates,
+-		      to reduce granularity for high rates
+-		*/
+-		/*  WFQF is maximum cell rate / garenteed cell rate */
+-		/*  wfqf = qsb_minimum_cell_rate * QSB_WFQ_NONUBR_MAX /
+-			requested_minimum_peak_cell_rate
+-		*/
+-		if (qos->txtp.min_pcr == 0)
+-			q_parm_tbl.bit.wfqf = QSB_WFQ_NONUBR_MAX;
+-		else {
+-			tmp = QSB_GCR_MIN * QSB_WFQ_NONUBR_MAX /
+-				qos->txtp.min_pcr;
+-			if (tmp == 0)
+-				q_parm_tbl.bit.wfqf = 1;
+-			else if (tmp > QSB_WFQ_NONUBR_MAX)
+-				q_parm_tbl.bit.wfqf
+-					= QSB_WFQ_NONUBR_MAX;
+-			else
+-				q_parm_tbl.bit.wfqf = tmp;
+-		}
+-		break;
+-
+ 	case ATM_UBR:
+ 	default:
+ 		q_parm_tbl.bit.wfqf = QSB_WFQ_UBR_BYPASS;
+@@ -498,42 +473,9 @@ static void set_qsb(struct atm_priv *pri
+ 	}
+ 
+ 	/* Sustained Cell Rate (SCR) Leaky Bucket Shaper VBR.0/VBR.1 */
+-	if (qos->txtp.traffic_class == ATM_VBR_RT ||
+-		qos->txtp.traffic_class == ATM_VBR_NRT) {
+-		if (qos->txtp.scr == 0) {
+-			/* disable shaper */
+-			q_vbr_parm_tbl.bit.taus = 0;
+-			q_vbr_parm_tbl.bit.ts = 0;
+-		} else {
+-			/* Cell Loss Priority  (CLP) */
+-			if ((vcc->atm_options & ATM_ATMOPT_CLP))
+-				/* CLP1 */
+-				q_parm_tbl.bit.vbr = 1;
+-			else
+-				/* CLP0 */
+-				q_parm_tbl.bit.vbr = 0;
+-			/* Rate Shaper Parameter (TS) and
+-			    Burst Tolerance Parameter for SCR (tauS)
+-			*/
+-			tmp = ((qsb_clk * param->qsb_tstep) >> 5) /
+-					qos->txtp.scr + 1;
+-			q_vbr_parm_tbl.bit.ts
+-				= tmp > QSB_TP_TS_MAX ? QSB_TP_TS_MAX : tmp;
+-			tmp = (qos->txtp.mbs - 1) *
+-				(q_vbr_parm_tbl.bit.ts -
+-					q_parm_tbl.bit.tp) / 64;
+-			if (tmp == 0)
+-				q_vbr_parm_tbl.bit.taus = 1;
+-			else if (tmp > QSB_TAUS_MAX)
+-				q_vbr_parm_tbl.bit.taus
+-					= QSB_TAUS_MAX;
+-			else
+-				q_vbr_parm_tbl.bit.taus = tmp;
+-		}
+-	} else {
+-		q_vbr_parm_tbl.bit.taus = 0;
+-		q_vbr_parm_tbl.bit.ts = 0;
+-	}
++	/* NB: shaper disabled since there no user interface to activate it */
++	q_vbr_parm_tbl.bit.taus = 0;
++	q_vbr_parm_tbl.bit.ts = 0;
+ 
+ 	/* Queue Parameter Table (QPT) */
+ 	tc_w32(QSB_QPT_SET_MASK, QSB_RTM);
+@@ -1064,15 +1006,6 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/* check bandwidth */
+ 	if ((vcc->qos.txtp.traffic_class == ATM_CBR &&
+ 		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_RT &&
+-		vcc->qos.txtp.max_pcr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_VBR_NRT &&
+-		vcc->qos.txtp.scr >
+-			(port->tx_max_cell_rate - port->tx_used_cell_rate))
+-		|| (vcc->qos.txtp.traffic_class == ATM_UBR_PLUS &&
+-		vcc->qos.txtp.min_pcr >
+ 			(port->tx_max_cell_rate - port->tx_used_cell_rate))) {
+ 		tc_dbg(priv->tc_priv, MSG_INIT, "exceed TX line rate\n");
+ 		return -EINVAL;
+@@ -1128,15 +1061,8 @@ static int ppe_open(struct atm_vcc *vcc)
+ 	/*  reserve bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate += vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate += vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate += vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* update atm_vcc structure */
+@@ -1222,15 +1148,8 @@ static void ppe_close(struct atm_vcc *vc
+ 	/* release bandwidth */
+ 	switch (vcc->qos.txtp.traffic_class) {
+ 	case ATM_CBR:
+-	case ATM_VBR_RT:
+ 		port->tx_used_cell_rate -= vcc->qos.txtp.max_pcr;
+ 		break;
+-	case ATM_VBR_NRT:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.scr;
+-		break;
+-	case ATM_UBR_PLUS:
+-		port->tx_used_cell_rate -= vcc->qos.txtp.min_pcr;
+-		break;
+ 	}
+ 
+ 	/* idle for a while to let parallel operation finish */
diff --git a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
index 6596a8b913..930fa6632c 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
@@ -3,7 +3,7 @@ This replaces it by a basic working implementation.
 
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -603,7 +603,11 @@ static void atm_aca_init(struct atm_priv
+@@ -545,7 +545,11 @@ static void atm_aca_init(struct atm_priv
  	cfg = &priv->tc_priv->cfg;
  
  	txin = &param.aca_txin;
@@ -15,7 +15,7 @@ This replaces it by a basic working implementation.
  	txin->hd_size_in_dw = cfg->txin.soc_desc_dwsz;
  	txin->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_IN_PD_LIST_BASE);
  	txin->pd_desc_num = __ACA_TX_IN_PD_LIST_NUM;
-@@ -625,7 +629,11 @@ static void atm_aca_init(struct atm_priv
+@@ -567,7 +571,11 @@ static void atm_aca_init(struct atm_priv
  		txin->soc_cmlt_cnt_addr);
  
  	txout = &param.aca_txout;
@@ -27,7 +27,7 @@ This replaces it by a basic working implementation.
  	txout->hd_size_in_dw = cfg->txout.soc_desc_dwsz;
  	txout->pd_desc_base = SB_XBAR_ADDR(__ACA_TX_OUT_PD_LIST_BASE);
  	txout->pd_desc_num = __ACA_TX_OUT_PD_LIST_NUM;
-@@ -647,7 +655,11 @@ static void atm_aca_init(struct atm_priv
+@@ -589,7 +597,11 @@ static void atm_aca_init(struct atm_priv
  		txout->soc_cmlt_cnt_addr);
  
  	rxout = &param.aca_rxout;
@@ -39,7 +39,7 @@ This replaces it by a basic working implementation.
  	rxout->hd_size_in_dw = cfg->rxout.soc_desc_dwsz;
  	rxout->pd_desc_base = SB_XBAR_ADDR(__ACA_RX_OUT_PD_LIST_BASE);
  	rxout->pd_desc_num = __ACA_RX_OUT_PD_LIST_NUM;
-@@ -669,7 +681,11 @@ static void atm_aca_init(struct atm_priv
+@@ -611,7 +623,11 @@ static void atm_aca_init(struct atm_priv
  		rxout->soc_cmlt_cnt_addr);
  
  	rxin = &param.aca_rxin;
@@ -51,7 +51,7 @@ This replaces it by a basic working implementation.
  	rxin->hd_size_in_dw = cfg->rxin.soc_desc_dwsz;
  	rxin->pd_desc_base = SB_XBAR_ADDR(__RX_IN_PD_DES_LIST_BASE);
  	rxin->pd_desc_num = __ACA_RX_IN_PD_LIST_NUM;
-@@ -1261,7 +1277,7 @@ static int ppe_ioctl(struct atm_dev *dev
+@@ -1180,7 +1196,7 @@ static int ppe_ioctl(struct atm_dev *dev
  static int ppe_send(struct atm_vcc *vcc, struct sk_buff *skb)
  {
  	int ret, qid, mpoa_pt, mpoa_type, vid;
@@ -60,7 +60,7 @@ This replaces it by a basic working implementation.
  	struct atm_priv *priv;
  
  	if (!vcc) {
-@@ -1327,12 +1343,14 @@ static int ppe_send(struct atm_vcc *vcc,
+@@ -1246,12 +1262,14 @@ static int ppe_send(struct atm_vcc *vcc,
  	tc_dbg(priv->tc_priv, MSG_TX, "vid: 0x%x, qid: 0x%x\n",
  			vid, qid);
  
diff --git a/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch b/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
index 266beba1a7..75d18138c0 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/202-napi.patch
@@ -296,7 +296,7 @@
  	priv->tc_ops.umt_start = plat_umt_start;
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -3650,7 +3650,7 @@ static void atm_aca_ring_config_init(str
+@@ -3569,7 +3569,7 @@ static void atm_aca_ring_config_init(str
  static int atm_ring_init(struct atm_priv *priv)
  {
  	atm_aca_ring_config_init(priv);
@@ -305,7 +305,7 @@
  }
  
  static int atm_init(struct tc_priv *tcpriv, u32 ep_id)
-@@ -4020,7 +4020,7 @@ void atm_tc_unload(void)
+@@ -3939,7 +3939,7 @@ void atm_tc_unload(void)
  	/* unregister device */
  	if (priv->tc_priv->tc_ops.dev_unreg != NULL)
  		priv->tc_priv->tc_ops.dev_unreg(NULL,
diff --git a/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch b/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
index bf2d82e2b5..1b70a663cd 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/204-dcdp-atm_tc-fix-compilation-warning.patch
@@ -1,6 +1,6 @@
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -746,7 +746,8 @@ static void atm_aca_init(struct atm_priv
+@@ -688,7 +688,8 @@ static void atm_aca_init(struct atm_priv
  		ACA_TXOUT_EN | ACA_RXIN_EN | ACA_RXOUT_EN, 1);
  }
  
@@ -10,7 +10,7 @@
  {
  	struct tm nowtm;
  	char tmbuf[64];
-@@ -765,7 +766,8 @@ static int print_datetime(char *buffer,
+@@ -707,7 +708,8 @@ static int print_datetime(char *buffer,
  			nowtm.tm_hour,
  			nowtm.tm_min,
  			nowtm.tm_sec);
@@ -20,7 +20,7 @@
  
  	return 0;
  }
-@@ -967,7 +969,7 @@ void show_atm_pvc(struct seq_file *seq,
+@@ -909,7 +911,7 @@ void show_atm_pvc(struct seq_file *seq,
  	char buf[64];
  
  	seq_printf(seq, "\tNet device: %s\n", pvc->dev->name);
diff --git a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
index 87456424c3..f268c0908c 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
@@ -23,7 +23,7 @@ Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
 ---
 --- a/dcdp/atm_tc.c
 +++ b/dcdp/atm_tc.c
-@@ -1232,8 +1232,9 @@ static void ppe_close(struct atm_vcc *vc
+@@ -1158,8 +1158,9 @@ static void ppe_close(struct atm_vcc *vc
  		validate_oam_htu_entry(priv, 0);
  	spin_unlock_bh(&priv->atm_lock);
  
@@ -35,7 +35,7 @@ Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
  				
  	memset(conn, 0, sizeof(*conn));
  
-@@ -2791,24 +2792,26 @@ static void mpoa_setup_sync(struct atm_p
+@@ -2710,24 +2711,26 @@ static void mpoa_setup_sync(struct atm_p
  	struct wtx_queue_config_t tx_qcfg;
  	struct uni_cell_header *cell_header;
  	struct atm_vcc *vcc;
diff --git a/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch b/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch
deleted file mode 100644
index c15a4b3ae3..0000000000
--- a/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From: John Crispin <blogic at openwrt.org>
-Date: Fri, 3 Aug 2012 10:27:25 +0200
-Subject: [PATCH 04/36] MIPS: lantiq: add atm hack
-
-Signed-off-by: John Crispin <blogic at openwrt.org>
---- a/include/uapi/linux/atm.h
-+++ b/include/uapi/linux/atm.h
-@@ -131,8 +131,14 @@
- #define ATM_ABR		4
- #define ATM_ANYCLASS	5		/* compatible with everything */
- 
-+#define ATM_VBR_NRT     ATM_VBR
-+#define ATM_VBR_RT      6
-+#define ATM_UBR_PLUS    7
-+#define ATM_GFR         8
-+
- #define ATM_MAX_PCR	-1		/* maximum available PCR */
- 
-+
- struct atm_trafprm {
- 	unsigned char	traffic_class;	/* traffic class (ATM_UBR, ...) */
- 	int		max_pcr;	/* maximum PCR in cells per second */
-@@ -155,6 +161,9 @@ struct atm_trafprm {
- 	unsigned int adtf      :10;     /* ACR Decrease Time Factor (10-bit) */
- 	unsigned int cdf       :3;      /* Cutoff Decrease Factor (3-bit) */
-         unsigned int spare     :9;      /* spare bits */ 
-+	int		scr;		/* sustained rate in cells per second */
-+	int		mbs;		/* maximum burst size (MBS) in cells */
-+	int		cdv;		/* Cell delay variation */
- };
- 
- struct atm_qos {
---- a/net/atm/proc.c
-+++ b/net/atm/proc.c
-@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil
- static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
- {
- 	static const char *const class_name[] = {
--		"off", "UBR", "CBR", "VBR", "ABR"};
-+		"off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
- 	static const char *const aal_name[] = {
- 		"---",	"1",	"2",	"3/4",	/*  0- 3 */
- 		"???",	"5",	"???",	"???",	/*  4- 7 */



From lede-commits at lists.infradead.org  Fri Jan 24 13:40:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:40:21 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: fix ADSL/ATM operation
In-Reply-To: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
References: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
Message-ID: <mailman.45924.1737754828.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6383f24378ed745c2a9fe2645df9d31470eb9599

commit 6383f24378ed745c2a9fe2645df9d31470eb9599
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:52 2025 +0200

    kernel: vrx518_tc: fix ADSL/ATM operation
    
    ATM TC layer have some issues which effectively prevent VRX518 from
    being used as ADSL modem. Specifically, there one crash during the ATM
    layer configuration and wrong PVC ID selection on packet receiving what
    breaks RX path. Fix both of the issues. Make subif iface registration
    optional to prevent the crash (see more details in the new patch) and
    update the hardcoded PVC ID to match the first allocated channel.
    
    Run tested with FRITZ!Box 7530.
    
    Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
    Reported-and-tested-by: nebibigon93 at yandex.ru
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-3-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 470335450e67002366fcbcd7334b15bdf008e44d)
---
 .../lantiq/vrx518_tc/patches/100-compat.patch      |  2 +-
 ...cdp-atm_tc-fix-crash-on-subif_reg-absence.patch | 75 ++++++++++++++++++++++
 2 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch b/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
index d04c1ed5df..81e32369ba 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/100-compat.patch
@@ -166,7 +166,7 @@
  
 -	return (skb->DW0 >> 3) & 0xF;
 +// 	return (skb->DW0 >> 3) & 0xF;
-+	return 1;
++	return 0;	/* We use only one connection for now, so return the first connection id */
  }
  
  static int atm_get_qid_by_vcc(struct net_device *dev, struct sk_buff *skb,
diff --git a/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
new file mode 100644
index 0000000000..87456424c3
--- /dev/null
+++ b/package/kernel/lantiq/vrx518_tc/patches/207-dcdp-atm_tc-fix-crash-on-subif_reg-absence.patch
@@ -0,0 +1,75 @@
+From: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+Date: Fri, 10 Jan 2025 00:57:27 +0000
+Subject: [PATCH] vrx518_tc: atm_tc: fix crash on subif_reg absence
+
+VRX518 (sw_plat) platform does not provid the subif_reg/subif_unreg ops
+in the same time ATM TC layer unconditionally calls them, what leads to
+the kernel crash on the atm_hook_mpoa_setup hook invocation from the ATM
+stack:
+
+  vrx518_tc:mpoa_setup_sync : sync: conn: 0, vpi: 0, vci: 35, mpoa_type: 0, mpoa_mode: 0
+  Unable to handle kernel NULL pointer dereference at virtual address 00000000
+
+Subif registration is optional and PTM TC do this only when the
+corresponding ops are defined. Do the same for ATM TC and call
+subif_reg/subif_unreg only if they are not NULL.
+
+While at it, move subif related data preparation under the 'if' block
+in order to group and isolate that aux code.
+
+Run tested with FRITZ!Box 7530.
+
+Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
+---
+--- a/dcdp/atm_tc.c
++++ b/dcdp/atm_tc.c
+@@ -1232,8 +1232,9 @@ static void ppe_close(struct atm_vcc *vc
+ 		validate_oam_htu_entry(priv, 0);
+ 	spin_unlock_bh(&priv->atm_lock);
+ 
+-	priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
+-					priv->conn[cid].subif_id, 0);
++	if (priv->tc_priv->tc_ops.subif_unreg)
++		priv->tc_priv->tc_ops.subif_unreg(dev, (!dev) ? dev_name : dev->name,
++						  priv->conn[cid].subif_id, 0);
+ 				
+ 	memset(conn, 0, sizeof(*conn));
+ 
+@@ -2791,24 +2792,26 @@ static void mpoa_setup_sync(struct atm_p
+ 	struct wtx_queue_config_t tx_qcfg;
+ 	struct uni_cell_header *cell_header;
+ 	struct atm_vcc *vcc;
+-	struct net_device *dev;
+-	char dev_name[32];
+ 
+ 	tc_dbg(priv->tc_priv, MSG_INIT,
+ 		"sync: conn: %d, vpi: %d, vci: %d, mpoa_type: %d, mpoa_mode: %d\n",
+ 		conn, priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci,
+ 		priv->conn[conn].mpoa_type, priv->conn[conn].mpoa_mode);
+ 
+-	dev = priv->conn[conn].dev;
++	if (priv->tc_priv->tc_ops.subif_reg) {
++		struct net_device *dev;
++		char dev_name[32];
++
++		dev = priv->conn[conn].dev;
++		if (!dev)
++			sprintf(dev_name, "atm_%d%d",
++				priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+ 
+-	if (!dev)
+-		sprintf(dev_name, "atm_%d%d",
+-			priv->conn[conn].vcc->vpi, priv->conn[conn].vcc->vci);
+-
+-	priv->tc_priv->tc_ops.subif_reg(dev, (!dev) ? dev_name : dev->name,
+-				&priv->conn[conn].subif_id, 0);
+-	tc_dbg(priv->tc_priv, MSG_INIT,
+-		"conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++		priv->tc_priv->tc_ops.subif_reg(dev, !dev ? dev_name : dev->name,
++						&priv->conn[conn].subif_id, 0);
++		tc_dbg(priv->tc_priv, MSG_INIT,
++		       "conn[%d]subif_id[%x]", conn, priv->conn[conn].subif_id);
++	}
+ 	vcc = priv->conn[conn].vcc;
+ 
+ 	/*  set htu entry   */



From lede-commits at lists.infradead.org  Fri Jan 24 13:40:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:40:20 -0500
Subject: [openwrt/openwrt]  kernel: vrx518_tc: fix RX desc phys to virt
 mapping
In-Reply-To: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
References: <173775481997.1232606.6357953846577513903@git-01.infra.openwrt.org>
Message-ID: <mailman.45925.1737754828.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/9b32a8ec9d21197202f689225ca3ead817d5a689

commit 9b32a8ec9d21197202f689225ca3ead817d5a689
Author: Sergey Ryazanov <ryazanov.s.a at gmail.com>
AuthorDate: Thu Jan 23 00:26:51 2025 +0200

    kernel: vrx518_tc: fix RX desc phys to virt mapping
    
    It looks like VRX518 returns phys addr of data buffer in the 'data_ptr'
    field of the RX descriptor and an actual data offset within the buffer
    in the 'byte_off' field. In order to map the phys address back to
    virtual we need the original phys address of the allocated buffer.
    
    In the same driver applies offset to phys address before the mapping,
    what leads to WARN_ON triggering in plat_mem_virt() function with
    subsequent kernel panic:
    
      WARNING: CPU: 0 PID: 0 at .../sw_plat.c:764 0xbf306cd0 [vrx518_tc at 8af9f5d0+0x25000]
      ...
      Unable to handle kernel NULL pointer dereference at virtual address 00000000
      pgd = aff5701e
      [00000000] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
    
    Noticed in ATM mode, when chip always returns byte_off = 4.
    
    In order to fix the issue, pass the phys address to plat_mem_virt() as
    is and apply byte_off later for proper DMA syncing and on mapped virtual
    address when copying RXed data into the skb.
    
    Run tested with FRITZ!Box 7530 on both ADSL and VDSL (thanks Jan) links.
    
    Fixes: 474bbe23b7 ("kernel: add Intel/Lantiq VRX518 TC driver")
    Tested-by: Jan Hoffmann <jan at 3e8.eu> # VDSL link
    Reported-and-tested-by: nebibigon93 at yandex.ru # ADSL link
    Signed-off-by: Sergey Ryazanov <ryazanov.s.a at gmail.com>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250122222654.21833-2-ryazanov.s.a at gmail.com/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 7bd579689d2304c73c263be3e030d76c551d6e87)
---
 package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
index edc97998b7..6596a8b913 100644
--- a/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
+++ b/package/kernel/lantiq/vrx518_tc/patches/200-swplat.patch
@@ -855,12 +855,12 @@ This replaces it by a basic working implementation.
 -			continue;
 +
 +		// this seems to be a pointer to a DS PKT buffer
-+		phyaddr = desc->data_ptr + desc->byte_off;
++		phyaddr = desc->data_ptr;
 +		ptr = plat_mem_virt(phyaddr);
-+
 +		len = desc->data_len;
 +
-+		dma_sync_single_range_for_cpu(pdev, phyaddr, 0, len, DMA_FROM_DEVICE);
++		dma_sync_single_for_cpu(pdev, phyaddr, desc->byte_off + len,
++					DMA_FROM_DEVICE);
 +
 +		skb = netdev_alloc_skb(g_plat_priv->netdev, len);
 +		if (unlikely(!skb)) {
@@ -871,7 +871,7 @@ This replaces it by a basic working implementation.
 -		ring_idx_inc(rxout, idx);
 +
 +		dst = skb_put(skb, len);
-+		memcpy(dst, ptr, len);
++		memcpy(dst, ptr + desc->byte_off, len);
 +
 +		priv->tc_ops.recv(g_plat_priv->netdev, skb);
 +



From lede-commits at lists.infradead.org  Fri Jan 24 13:45:01 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:45:01 -0500
Subject: [openwrt/openwrt]  mediatek: cudy: fixes 2.5G PHY interrupt support
In-Reply-To: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
References: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
Message-ID: <mailman.45926.1737755103.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e5f3704f9a7e1117efd53df651bce7dc01f5e58e

commit e5f3704f9a7e1117efd53df651bce7dc01f5e58e
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Mon Dec 9 23:17:06 2024 +0800

    mediatek: cudy: fixes 2.5G PHY interrupt support
    
    Fixed interrupt support for 2.5G PHY.
    Removed useless phy-mode on phy node.
    
    Tested on Cudy TR3000.
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
    (cherry picked from commit 82b69dfaf6ca92eeffb7523295d3d81a1d54323a)
---
 target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts  | 8 +++-----
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts | 9 ++++-----
 2 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index b1797157ac..abe40403af 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -77,7 +77,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {
@@ -105,12 +104,11 @@
 	rtl8221b_phy: ethernet-phy at 1 {
 		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <1>;
-
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 	};
 };
 
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 31a2cf5194..2591de8520 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -81,7 +81,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {
@@ -105,13 +104,13 @@
 
 &mdio_bus {
 	phy1: phy at 1 {
-		reg = <1>;
 		compatible = "ethernet-phy-ieee802.3-c45";
-		phy-mode = "2500base-x";
-		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
-		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		reg = <1>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&pio>;
 		realtek,aldps-enable;
 	};
 };



From lede-commits at lists.infradead.org  Fri Jan 24 13:45:03 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:45:03 -0500
Subject: [openwrt/openwrt]  mediatek: cleanup device tree for cudy devices
In-Reply-To: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
References: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
Message-ID: <mailman.45927.1737755103.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a296d09dc48942ac3047819c4f16d0fb08a5c28c

commit a296d09dc48942ac3047819c4f16d0fb08a5c28c
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Thu Dec 5 23:26:18 2024 +0800

    mediatek: cleanup device tree for cudy devices
    
    Fixes typo for led properties.
    Delete the unused rfb compatible.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
    (cherry picked from commit 64d1b1089c25d778f5f22bfc0c1590a2e83b664e)
---
 .../linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts   |  8 ++++----
 target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts        |  2 +-
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts       |  4 +---
 target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts      | 14 ++++++--------
 4 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
index 2e84d2b538..735cecfe42 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy AP3000 Outdoor v1";
-	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &wifi;
@@ -42,18 +42,19 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status_green: led at 0 {
+		led_status_green: led-0 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
 		};
 
-		led_status_red: led_1 {
+		led_status_red: led-1 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
 		};
 	};
+
 	gpio_export {
 		compatible = "gpio-export";
 		#size-cells = <0>;
@@ -89,7 +90,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac1: mac at 1 {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index abe40403af..cfe9d45630 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -6,7 +6,7 @@
 
 / {
 	model = "Cudy M3000 v1";
-	compatible = "cudy,m3000-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,m3000-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index ff3c83a12d..86d8e857f1 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy TR3000 v1";
-	compatible = "cudy,tr3000-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,tr3000-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac1;
@@ -59,11 +59,9 @@
 
 	usb_vbus: regulator-usb {
 		compatible = "regulator-fixed";
-
 		regulator-name = "usb-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-
 		gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 	};
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
index ccefc1926c..bdc6188a4a 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
@@ -8,7 +8,7 @@
 
 / {
 	model = "Cudy WR3000S v1";
-	compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
+	compatible = "cudy,wr3000s-v1", "mediatek,mt7981";
 
 	aliases {
 		label-mac-device = &gmac0;
@@ -42,33 +42,32 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led at 0 {
+		led_status: led-status {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
 
-
-		led_internet {
+		led-internet {
 			function = LED_FUNCTION_WAN_ONLINE;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wps {
+		led-wps {
 			function = LED_FUNCTION_WPS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 9 GPIO_ACTIVE_LOW>;
 		};
 
-		led_wlan2g {
+		led-wlan2g {
 			function = LED_FUNCTION_WLAN_2GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
 
-		led_wlan5g {
+		led-wlan5g {
 			function = LED_FUNCTION_WLAN_5GHZ;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
@@ -88,7 +87,6 @@
 &eth {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;
-
 	status = "okay";
 
 	gmac0: mac at 0 {



From lede-commits at lists.infradead.org  Fri Jan 24 13:45:00 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:45:00 -0500
Subject: [openwrt/openwrt]  mediatek: cudy: fixes typo for spi and mtd
 properties
In-Reply-To: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
References: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
Message-ID: <mailman.45928.1737755106.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d6fe1421614b2db6bae8e2facb9645ddbee480b3

commit d6fe1421614b2db6bae8e2facb9645ddbee480b3
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Tue Dec 3 23:02:15 2024 +0800

    mediatek: cudy: fixes typo for spi and mtd properties
    
    Same as commit 3674689, correct 'buswidth' to 'bus-width'.
    Move the nmbm properties outside the partition definition.
    Change uppercase to lowercase, add missing read-only flag.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
    (cherry picked from commit ab375a3484db67857450ced461498ad3d7942e05)
---
 target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts       |  4 ++--
 .../linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts   | 12 ++++++------
 target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts        | 14 +++++++-------
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts       | 12 ++++++------
 target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts      | 10 ++++++----
 5 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
index bd6c15225b..7101c4bab0 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000-v1.dts
@@ -133,8 +133,8 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
 
 		spi-cal-enable;
 		spi-cal-mode = "read-data";
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
index a1eb9c6e1e..2e84d2b538 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
@@ -148,6 +148,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -163,6 +164,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -174,25 +176,23 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
 	};
 };
 
-
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
index 85bdabe474..b1797157ac 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-m3000-v1.dts
@@ -117,7 +117,6 @@
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
-
 	status = "okay";
 
 	spi_nand: spi_nand at 0 {
@@ -127,18 +126,18 @@
 		reg = <0>;
 
 		spi-max-frequency = <52000000>;
-		spi-tx-buswidth = <4>;
-		spi-rx-buswidth = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+
+		mediatek,nmbm;
+		mediatek,bmt-max-ratio = <1>;
+		mediatek,bmt-max-reserved-blocks = <64>;
 
 		partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			mediatek,nmbm;
-			mediatek,bmt-max-ratio = <1>;
-			mediatek,bmt-max-reserved-blocks = <64>;
-
 			partition at 0 {
 				label = "BL2";
 				reg = <0x0000000 0x0100000>;
@@ -177,6 +176,7 @@
 			partition at 3c0000 {
 				label = "FIP";
 				reg = <0x03c0000 0x0200000>;
+				read-only;
 			};
 
 			partition at 5c0000 {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 1f03b42b1b..31a2cf5194 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -162,6 +162,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -177,6 +178,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -188,25 +190,23 @@
 						#nvmem-cell-cells = <1>;
 					};
 				};
-
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};
 	};
 };
 
-
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
index cf2f79b407..ccefc1926c 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
@@ -165,6 +165,7 @@
 				label = "Factory";
 				reg = <0x180000 0x0200000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -180,6 +181,7 @@
 				label = "bdinfo";
 				reg = <0x380000 0x0040000>;
 				read-only;
+
 				nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
@@ -193,15 +195,15 @@
 				};
 			};
 
-			partition at 3C0000 {
+			partition at 3c0000 {
 				label = "FIP";
-				reg = <0x3C0000 0x0200000>;
+				reg = <0x3c0000 0x0200000>;
 				read-only;
 			};
 
-			partition at 580000 {
+			partition at 5c0000 {
 				label = "ubi";
-				reg = <0x5C0000 0x4000000>;
+				reg = <0x5c0000 0x4000000>;
 				compatible = "linux,ubi";
 			};
 		};



From lede-commits at lists.infradead.org  Fri Jan 24 13:45:02 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 24 Jan 2025 16:45:02 -0500
Subject: [openwrt/openwrt]  mediatek: update status led for Cudy TR3000
In-Reply-To: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
References: <173775509999.1238023.3502608708656255366@git-01.infra.openwrt.org>
Message-ID: <mailman.45931.1737755106.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/95dffe39f8df7cc3685d8779426e666d5cc6e3d1

commit 95dffe39f8df7cc3685d8779426e666d5cc6e3d1
Author: Chukun Pan <amadeus at jmu.edu.cn>
AuthorDate: Wed Dec 4 23:26:28 2024 +0800

    mediatek: update status led for Cudy TR3000
    
    Use white led when running, consistent with the stock firmware.
    
    Signed-off-by: Chukun Pan <amadeus at jmu.edu.cn>
    (cherry picked from commit 87632219d4b8f0c96ea053e375f6f324fab0806f)
---
 target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
index 2591de8520..ff3c83a12d 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-tr3000-v1.dts
@@ -12,10 +12,10 @@
 
 	aliases {
 		label-mac-device = &gmac1;
-		led-boot = &led_status;
-		led-failsafe = &led_status;
-		led-running = &led_status;
-		led-upgrade = &led_status;
+		led-boot = &led_sys_red;
+		led-failsafe = &led_sys_red;
+		led-running = &led_sys_white;
+		led-upgrade = &led_sys_white;
 		serial0 = &uart0;
 	};
 
@@ -34,8 +34,8 @@
 
 		mode {
 			label = "mode";
-			linux,input-type = <EV_SW>;
 			linux,code = <BTN_0>;
+			linux,input-type = <EV_SW>;
 			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
 			debounce-interval = <60>;
 		};
@@ -44,18 +44,17 @@
 	leds {
 		compatible = "gpio-leds";
 
-		led_status: led_0 {
+		led_sys_red: led-0 {
 			function = LED_FUNCTION_POWER;
 			color = <LED_COLOR_ID_RED>;
 			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
 		};
 
-		led_1 {
+		led_sys_white: led-1 {
 			function = LED_FUNCTION_STATUS;
 			color = <LED_COLOR_ID_WHITE>;
 			gpios = <&pio 10 GPIO_ACTIVE_LOW>;
 		};
-
 	};
 
 	usb_vbus: regulator-usb {



From lede-commits at lists.infradead.org  Sat Jan 25 04:33:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 07:33:55 -0500
Subject: [openwrt/openwrt]  kernel: Make kmod-usb-chipidea select
 kmod-phy-ath79-usb
In-Reply-To: <173780843572.2304833.7757961452233924204@git-01.infra.openwrt.org>
References: <173780843572.2304833.7757961452233924204@git-01.infra.openwrt.org>
Message-ID: <mailman.46071.1737808439.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b467e5a0afebbc4982213c03f90dfc6deb717b36

commit b467e5a0afebbc4982213c03f90dfc6deb717b36
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Fri Jan 24 22:56:59 2025 +0100

    kernel: Make kmod-usb-chipidea select kmod-phy-ath79-usb
    
    The USB PHY on the ar9330 and similar SoCs needs the PHY driver. In
    OpenWrt 23.05 it was compiled into the kernel. The kernel 6.6
    configuration does not compile it in any more, make the
    kmod-usb-chipidea driver select it to add it to the images.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17710
    Fixes: 04bdf9b3323e ("ath79: disable ath79 USB phy drivers by default")
    Link: https://github.com/openwrt/openwrt/pull/17720
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/kernel/linux/modules/usb.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk
index 8f934800fc..481d2be59a 100644
--- a/package/kernel/linux/modules/usb.mk
+++ b/package/kernel/linux/modules/usb.mk
@@ -1737,7 +1737,7 @@ $(eval $(call KernelPackage,usbip-server))
 
 define KernelPackage/usb-chipidea
   TITLE:=Host and device support for Chipidea controllers
-  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles
+  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles +kmod-phy-ath79-usb
   KCONFIG:= \
 	CONFIG_EXTCON \
 	CONFIG_USB_CHIPIDEA \



From lede-commits at lists.infradead.org  Sat Jan 25 04:34:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 07:34:46 -0500
Subject: [openwrt/openwrt]  kernel: Make kmod-usb-chipidea select
 kmod-phy-ath79-usb
In-Reply-To: <173780848614.2305653.13441782923730632706@git-01.infra.openwrt.org>
References: <173780848614.2305653.13441782923730632706@git-01.infra.openwrt.org>
Message-ID: <mailman.46072.1737808489.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/1e9966a63ae430a5c48039fd9752bf1c465325f3

commit 1e9966a63ae430a5c48039fd9752bf1c465325f3
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Fri Jan 24 22:56:59 2025 +0100

    kernel: Make kmod-usb-chipidea select kmod-phy-ath79-usb
    
    The USB PHY on the ar9330 and similar SoCs needs the PHY driver. In
    OpenWrt 23.05 it was compiled into the kernel. The kernel 6.6
    configuration does not compile it in any more, make the
    kmod-usb-chipidea driver select it to add it to the images.
    
    Fixes: https://github.com/openwrt/openwrt/issues/17710
    Fixes: 04bdf9b3323e ("ath79: disable ath79 USB phy drivers by default")
    Link: https://github.com/openwrt/openwrt/pull/17720
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit b467e5a0afebbc4982213c03f90dfc6deb717b36)
---
 package/kernel/linux/modules/usb.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk
index 8f934800fc..481d2be59a 100644
--- a/package/kernel/linux/modules/usb.mk
+++ b/package/kernel/linux/modules/usb.mk
@@ -1737,7 +1737,7 @@ $(eval $(call KernelPackage,usbip-server))
 
 define KernelPackage/usb-chipidea
   TITLE:=Host and device support for Chipidea controllers
-  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles
+  DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop +kmod-usb-roles +kmod-phy-ath79-usb
   KCONFIG:= \
 	CONFIG_EXTCON \
 	CONFIG_USB_CHIPIDEA \



From lede-commits at lists.infradead.org  Sat Jan 25 05:25:06 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 08:25:06 -0500
Subject: [openwrt/openwrt]  kernel: bump 6.6 to 6.6.74
In-Reply-To: <173781150662.2369705.5074708431136585157@git-01.infra.openwrt.org>
References: <173781150662.2369705.5074708431136585157@git-01.infra.openwrt.org>
Message-ID: <mailman.46083.1737811510.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e9fad02c101d7d7f45fd6e5eef8a80b848718a44

commit e9fad02c101d7d7f45fd6e5eef8a80b848718a44
Author: John Audia <therealgraysky at proton.me>
AuthorDate: Thu Jan 23 12:22:43 2025 -0500

    kernel: bump 6.6 to 6.6.74
    
    Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.74
    
    All patches automatically rebased.
    
    Build system: x86/64
    Build-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod
    Run-tested: bcm27xx/bcm2712, flogic/xiaomi_redmi-router-ax6000-ubootmod
    
    Signed-off-by: John Audia <therealgraysky at proton.me>
    Link: https://github.com/openwrt/openwrt/pull/17708
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 include/kernel-6.6                                           |  4 ++--
 ...0-0183-drm-v3d-Suppress-all-but-the-first-MMU-error.patch |  6 +++---
 ...rm-v3d-New-debugfs-end-points-to-query-GPU-usage-st.patch |  6 +++---
 ...-0555-drm-v3d-fix-up-register-addresses-for-V3D-7.x.patch | 12 ++++++------
 4 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/include/kernel-6.6 b/include/kernel-6.6
index aa0a345b29..277669c390 100644
--- a/include/kernel-6.6
+++ b/include/kernel-6.6
@@ -1,2 +1,2 @@
-LINUX_VERSION-6.6 = .73
-LINUX_KERNEL_HASH-6.6.73 = d2028db190c201650898be8db1c705e9fe73ab44fc04290b4f7af63514122490
+LINUX_VERSION-6.6 = .74
+LINUX_KERNEL_HASH-6.6.74 = f15e2b1a8bab0eba494b07858a5abc88d8f788e25f6fe4a572a77840bbd5494d
diff --git a/target/linux/bcm27xx/patches-6.6/950-0183-drm-v3d-Suppress-all-but-the-first-MMU-error.patch b/target/linux/bcm27xx/patches-6.6/950-0183-drm-v3d-Suppress-all-but-the-first-MMU-error.patch
index 31c7840e14..eeb65bbd40 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0183-drm-v3d-Suppress-all-but-the-first-MMU-error.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0183-drm-v3d-Suppress-all-but-the-first-MMU-error.patch
@@ -13,7 +13,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.org>
 
 --- a/drivers/gpu/drm/v3d/v3d_irq.c
 +++ b/drivers/gpu/drm/v3d/v3d_irq.c
-@@ -177,6 +177,7 @@ v3d_hub_irq(int irq, void *arg)
+@@ -181,6 +181,7 @@ v3d_hub_irq(int irq, void *arg)
  			"GMP",
  		};
  		const char *client = "?";
@@ -21,7 +21,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.org>
  
  		V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL));
  
-@@ -186,6 +187,7 @@ v3d_hub_irq(int irq, void *arg)
+@@ -190,6 +191,7 @@ v3d_hub_irq(int irq, void *arg)
  				client = v3d41_axi_ids[axi_id];
  		}
  
@@ -29,7 +29,7 @@ Signed-off-by: Phil Elwell <phil at raspberrypi.org>
  		dev_err(v3d->drm.dev, "MMU error from client %s (%d) at 0x%llx%s%s%s\n",
  			client, axi_id, (long long)vio_addr,
  			((intsts & V3D_HUB_INT_MMU_WRV) ?
-@@ -194,6 +196,7 @@ v3d_hub_irq(int irq, void *arg)
+@@ -198,6 +200,7 @@ v3d_hub_irq(int irq, void *arg)
  			 ", pte invalid" : ""),
  			((intsts & V3D_HUB_INT_MMU_CAP) ?
  			 ", cap exceeded" : ""));
diff --git a/target/linux/bcm27xx/patches-6.6/950-0464-drm-v3d-New-debugfs-end-points-to-query-GPU-usage-st.patch b/target/linux/bcm27xx/patches-6.6/950-0464-drm-v3d-New-debugfs-end-points-to-query-GPU-usage-st.patch
index aef90564b8..01e267fd48 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0464-drm-v3d-New-debugfs-end-points-to-query-GPU-usage-st.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0464-drm-v3d-New-debugfs-end-points-to-query-GPU-usage-st.patch
@@ -258,7 +258,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
  
  		trace_v3d_bcl_irq(&v3d->drm, fence->seqno);
  		dma_fence_signal(&fence->base);
-@@ -109,6 +111,7 @@ v3d_irq(int irq, void *arg)
+@@ -110,6 +112,7 @@ v3d_irq(int irq, void *arg)
  	if (intsts & V3D_INT_FRDONE) {
  		struct v3d_fence *fence =
  			to_v3d_fence(v3d->render_job->base.irq_fence);
@@ -266,7 +266,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
  
  		trace_v3d_rcl_irq(&v3d->drm, fence->seqno);
  		dma_fence_signal(&fence->base);
-@@ -118,6 +121,7 @@ v3d_irq(int irq, void *arg)
+@@ -120,6 +123,7 @@ v3d_irq(int irq, void *arg)
  	if (intsts & V3D_INT_CSDDONE) {
  		struct v3d_fence *fence =
  			to_v3d_fence(v3d->csd_job->base.irq_fence);
@@ -274,7 +274,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
  
  		trace_v3d_csd_irq(&v3d->drm, fence->seqno);
  		dma_fence_signal(&fence->base);
-@@ -154,6 +158,7 @@ v3d_hub_irq(int irq, void *arg)
+@@ -157,6 +161,7 @@ v3d_hub_irq(int irq, void *arg)
  	if (intsts & V3D_HUB_INT_TFUC) {
  		struct v3d_fence *fence =
  			to_v3d_fence(v3d->tfu_job->base.irq_fence);
diff --git a/target/linux/bcm27xx/patches-6.6/950-0555-drm-v3d-fix-up-register-addresses-for-V3D-7.x.patch b/target/linux/bcm27xx/patches-6.6/950-0555-drm-v3d-fix-up-register-addresses-for-V3D-7.x.patch
index 1466d2aadc..560c2f627f 100644
--- a/target/linux/bcm27xx/patches-6.6/950-0555-drm-v3d-fix-up-register-addresses-for-V3D-7.x.patch
+++ b/target/linux/bcm27xx/patches-6.6/950-0555-drm-v3d-fix-up-register-addresses-for-V3D-7.x.patch
@@ -295,7 +295,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  
  static irqreturn_t
  v3d_hub_irq(int irq, void *arg);
-@@ -118,7 +119,8 @@ v3d_irq(int irq, void *arg)
+@@ -120,7 +121,8 @@ v3d_irq(int irq, void *arg)
  		status = IRQ_HANDLED;
  	}
  
@@ -305,7 +305,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  		struct v3d_fence *fence =
  			to_v3d_fence(v3d->csd_job->base.irq_fence);
  		v3d->gpu_queue_stats[V3D_CSD].last_exec_end = local_clock();
-@@ -131,7 +133,7 @@ v3d_irq(int irq, void *arg)
+@@ -134,7 +136,7 @@ v3d_irq(int irq, void *arg)
  	/* We shouldn't be triggering these if we have GMP in
  	 * always-allowed mode.
  	 */
@@ -314,7 +314,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  		dev_err(v3d->drm.dev, "GMP violation\n");
  
  	/* V3D 4.2 wires the hub and core IRQs together, so if we &
-@@ -205,6 +207,11 @@ v3d_hub_irq(int irq, void *arg)
+@@ -209,6 +211,11 @@ v3d_hub_irq(int irq, void *arg)
  		status = IRQ_HANDLED;
  	}
  
@@ -326,7 +326,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  	return status;
  }
  
-@@ -219,8 +226,8 @@ v3d_irq_init(struct v3d_dev *v3d)
+@@ -223,8 +230,8 @@ v3d_irq_init(struct v3d_dev *v3d)
  	 * for us.
  	 */
  	for (core = 0; core < v3d->cores; core++)
@@ -337,7 +337,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  
  	irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1);
  	if (irq1 == -EPROBE_DEFER)
-@@ -264,12 +271,12 @@ v3d_irq_enable(struct v3d_dev *v3d)
+@@ -268,12 +275,12 @@ v3d_irq_enable(struct v3d_dev *v3d)
  
  	/* Enable our set of interrupts, masking out any others. */
  	for (core = 0; core < v3d->cores; core++) {
@@ -354,7 +354,7 @@ v2: fix kernel panic with debug-fs interface to list registers
  }
  
  void
-@@ -284,8 +291,8 @@ v3d_irq_disable(struct v3d_dev *v3d)
+@@ -288,8 +295,8 @@ v3d_irq_disable(struct v3d_dev *v3d)
  
  	/* Clear any pending interrupts we might have left. */
  	for (core = 0; core < v3d->cores; core++)



From lede-commits at lists.infradead.org  Sat Jan 25 06:08:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 09:08:27 -0500
Subject: [openwrt/openwrt]  realtek: rtl838x: Enable MDIO_GPIO driver
In-Reply-To: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
References: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
Message-ID: <mailman.46084.1737814108.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/efffcfa43693b68028a4aed4dea151b82158cc52

commit efffcfa43693b68028a4aed4dea151b82158cc52
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Tue Jan 21 19:57:22 2025 +0100

    realtek: rtl838x: Enable MDIO_GPIO driver
    
    The mdio-gpio driver is required to support early revision of RTL8380M
    slicon (rev A) where the auxilairy MDIO controller does not function
    correctly. Add this driver to the rtl838x kernel so devices with old
    SoCs are also able to function correctly.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/rtl838x/config-6.6 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/realtek/rtl838x/config-6.6 b/target/linux/realtek/rtl838x/config-6.6
index 58c15f7bb0..3a2dbae8c1 100644
--- a/target/linux/realtek/rtl838x/config-6.6
+++ b/target/linux/realtek/rtl838x/config-6.6
@@ -128,9 +128,11 @@ CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MACH_REALTEK_RTL=y
 CONFIG_MARVELL_PHY=y
+CONFIG_MDIO_BITBANG=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_DEVRES=y
+CONFIG_MDIO_GPIO=y
 CONFIG_MDIO_I2C=y
 CONFIG_MDIO_REALTEK_OTTO_AUX=y
 CONFIG_MDIO_SMBUS=y



From lede-commits at lists.infradead.org  Sat Jan 25 06:08:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 09:08:24 -0500
Subject: [openwrt/openwrt]  realtek: Enable Zyxel GS1900's RTL8231 reset line
In-Reply-To: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
References: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
Message-ID: <mailman.46087.1737814108.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b2d17dbb68c232393739e6fb48245f1f4bebb698

commit b2d17dbb68c232393739e6fb48245f1f4bebb698
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Tue Jan 21 19:37:25 2025 +0100

    realtek: Enable Zyxel GS1900's RTL8231 reset line
    
    As the bootloader is reconfiguring the RTL8231 on these devices anyway,
    no pin state can be maintained over warm reboots. This results in for
    example the PoE disable pin always being asserted by the bootloader.
    
    Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem
    will also reset the expander on boot and ensure the line in the correct
    state.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 927b9527a9..6ab3e4834a 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -45,11 +45,9 @@
 &mdio_aux {
 	status = "okay";
 
-	// Reset GPIO is <&gpio0 1 GPIO_ACTIVE_LOW>
-	// Don't specify the reset info so the mdio subsystem doesn't reset the bus
-	//reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-	//reset-delay-us = <1000>;
-	//reset-post-delay-us = <10000>;
+	reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <1000>;
+	reset-post-delay-us = <10000>;
 
 	gpio1: expander at 0 {
 		compatible = "realtek,rtl8231";



From lede-commits at lists.infradead.org  Sat Jan 25 06:08:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 09:08:25 -0500
Subject: [openwrt/openwrt]  realtek: Add virtual MDIO bus on rtl838x
In-Reply-To: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
References: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
Message-ID: <mailman.46088.1737814110.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d4bf16a9e1618347709b0dccae71c273e6291a61

commit d4bf16a9e1618347709b0dccae71c273e6291a61
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Tue Jan 21 19:40:11 2025 +0100

    realtek: Add virtual MDIO bus on rtl838x
    
    Some RTL8380M-based devices have been around for a long time and use an
    early A revision of the RTL8380M SoC. This revision has an issue with
    the auxiliary MDIO controller, causing it to malfunction. This may lead
    to device reboots when the controller is used.
    
    Provide a bit-banged MDIO bus, which muxes the auxiliary MDIO pins to
    their GPIO function. Although this will result in lower performance,
    there should otherwise be no functional differences.
    
    Link: https://github.com/openwrt/openwrt/issues/9534
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl838x.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/target/linux/realtek/dts/rtl838x.dtsi b/target/linux/realtek/dts/rtl838x.dtsi
index ab034fc1bc..18da4c9380 100644
--- a/target/linux/realtek/dts/rtl838x.dtsi
+++ b/target/linux/realtek/dts/rtl838x.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include <dt-bindings/clock/rtl83xx-clk.h>
+#include <dt-bindings/gpio/gpio.h>
 
 /dts-v1/;
 
@@ -120,6 +121,7 @@
 	aliases {
 		serial0 = &uart0;
 		serial1 = &uart1;
+		mdio-gpio1 = &mdio_gpio;
 	};
 
 	chosen {
@@ -134,6 +136,22 @@
 		interrupt-controller;
 	};
 
+	/*
+	 * Provided for devices with RTL838xM SoC with revision A silicon.
+	 * Newer SoCs can use the &mdio_aux bus instead.
+	 */
+	mdio_gpio: mdio {
+		compatible = "virtual,mdio-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>,
+			<&gpio0 3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&mdio_aux_gpio>;
+
+		status = "disabled";
+	};
+
 	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;



From lede-commits at lists.infradead.org  Sat Jan 25 06:08:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 09:08:28 -0500
Subject: [openwrt/openwrt]  realtek: Split Zyxel GS1900-8 into v1 and v2
In-Reply-To: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
References: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
Message-ID: <mailman.46089.1737814110.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7322d3266d84ec4062046254792d78ebca3ea26d

commit 7322d3266d84ec4062046254792d78ebca3ea26d
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 22 12:25:18 2025 +0100

    realtek: Split Zyxel GS1900-8 into v1 and v2
    
    Zyxel GS1900-8 v2 devices have been produced more recently than v1
    devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
    safely be assumed that all v2 devices will also have a recent SoC
    revision, supporting the hardware auxiliary MDIO controller.
    
    Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
    compatibility with devices containing an RTL8380M rev. A.
    
    Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
    an RTL8380M rev. B or C will also be able to use the (more efficient) v2
    image. This includes any currently functioning device with OpenWrt, so
    include the old compatible as a supported device for the GS1900-8 v2.
    
    Link: https://github.com/openwrt/openwrt/issues/9534
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/base-files/etc/board.d/05_compat-version   |  3 ++-
 target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts | 13 +++++++++++++
 ...yxel_gs1900-8.dts => rtl8380_zyxel_gs1900-8-v2.dts} |  4 ++--
 target/linux/realtek/image/rtl838x.mk                  | 18 +++++++++++++-----
 4 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/target/linux/realtek/base-files/etc/board.d/05_compat-version b/target/linux/realtek/base-files/etc/board.d/05_compat-version
index 9c27314b24..52dbdc627e 100644
--- a/target/linux/realtek/base-files/etc/board.d/05_compat-version
+++ b/target/linux/realtek/base-files/etc/board.d/05_compat-version
@@ -13,7 +13,8 @@ case "$(board_name)" in
 	hpe,1920-24g-poe-370w)
 		ucidef_set_compat_version "1.1"
 	;;
-	zyxel,gs1900-8 | \
+	zyxel,gs1900-8-v1 | \
+	zyxel,gs1900-8-v2 | \
 	zyxel,gs1900-8hp-v1 | \
 	zyxel,gs1900-8hp-v2 | \
 	zyxel,gs1900-10hp | \
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts
new file mode 100644
index 0000000000..9838c023da
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio_emulated.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8-v1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8 v1 Switch";
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
similarity index 64%
rename from target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
rename to target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
index 1d76f55d6a..84f87ea037 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
@@ -4,8 +4,8 @@
 #include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
-	compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-8v1/v2 Switch";
+	compatible = "zyxel,gs1900-8-v2", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8 v2 Switch";
 };
 
 &gpio1 {
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 0d6acd483a..3763418233 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -360,17 +360,25 @@ define Device/zyxel_gs1900-16
 endef
 TARGET_DEVICES += zyxel_gs1900-16
 
-define Device/zyxel_gs1900-8
+define Device/zyxel_gs1900-8-v1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8
   DEVICE_VARIANT := v1
-  DEVICE_ALT0_VENDOR := Zyxel
-  DEVICE_ALT0_MODEL := GS1900-8
-  DEVICE_ALT0_VARIANT := v2
   ZYXEL_VERS := AAHH
+  SUPPORTED_DEVICES += zyxel,gs1900-8
 endef
-TARGET_DEVICES += zyxel_gs1900-8
+TARGET_DEVICES += zyxel_gs1900-8-v1
+
+define Device/zyxel_gs1900-8-v2
+  $(Device/zyxel_gs1900)
+  SOC := rtl8380
+  DEVICE_MODEL := GS1900-8
+  DEVICE_VARIANT := v2
+  ZYXEL_VERS := AAHH
+  SUPPORTED_DEVICES += zyxel,gs1900-8
+endef
+TARGET_DEVICES += zyxel_gs1900-8-v2
 
 define Device/zyxel_gs1900-8hp-v1
   $(Device/zyxel_gs1900)



From lede-commits at lists.infradead.org  Sat Jan 25 06:08:26 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 09:08:26 -0500
Subject: [openwrt/openwrt]  realtek: Move GS1900 external GPIO to new DTSI
In-Reply-To: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
References: <173781410404.2421975.11329478852843550213@git-01.infra.openwrt.org>
Message-ID: <mailman.46090.1737814110.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a6a77896f4cddd6e69bcf86d5a6dc190fa82d53d

commit a6a77896f4cddd6e69bcf86d5a6dc190fa82d53d
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Wed Jan 22 12:16:00 2025 +0100

    realtek: Move GS1900 external GPIO to new DTSI
    
    In order to be able to define the external GPIO controller on an
    emulated MDIO bus, move the controller definition outside of the main
    GS1900 include for RTL838x-based devices.
    
    Additionally, a new DTSI is provided defining the RTL8231 on the
    emulated MDIO bus.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts      |  1 +
 .../linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts   |  1 +
 .../realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts    |  1 +
 .../realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts    |  1 +
 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi | 28 -------------------
 .../realtek/dts/rtl8380_zyxel_gs1900_gpio.dtsi     | 31 ++++++++++++++++++++++
 .../dts/rtl8380_zyxel_gs1900_gpio_emulated.dtsi    | 31 ++++++++++++++++++++++
 .../linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts  |  1 +
 .../realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts     |  1 +
 .../linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts |  1 +
 .../realtek/dts/rtl8382_zyxel_gs1900-24ep.dts      |  1 +
 .../realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts   |  1 +
 .../realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts   |  1 +
 13 files changed, 72 insertions(+), 28 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
index 190a77b7ff..d21b748392 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
index 548e83ba73..1d76f55d6a 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts
index 386edfb015..22c052f506 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-8hp-v1", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts
index 2702f2ba1c..728342c22f 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-8hp-v2", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
index 6ab3e4834a..1411ea0f18 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -42,34 +42,6 @@
 	};
 };
 
-&mdio_aux {
-	status = "okay";
-
-	reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
-	reset-delay-us = <1000>;
-	reset-post-delay-us = <10000>;
-
-	gpio1: expander at 0 {
-		compatible = "realtek,rtl8231";
-		reg = <0x0>;
-
-		gpio-controller;
-		#gpio-cells = <2>;
-		gpio-ranges = <&gpio1 0 0 37>;
-
-		poe_enable {
-			gpio-hog;
-			gpios = <13 GPIO_ACTIVE_HIGH>;
-			output-high;
-		};
-
-		led-controller {
-			compatible = "realtek,rtl8231-leds";
-			status = "disabled";
-		};
-	};
-};
-
 &spi0 {
 	status = "okay";
 
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio.dtsi
new file mode 100644
index 0000000000..93ec7e4a1e
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <dt-bindings/gpio/gpio.h>
+
+&mdio_aux {
+	status = "okay";
+
+	reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <1000>;
+	reset-post-delay-us = <10000>;
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0x0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		poe_enable {
+			gpio-hog;
+			gpios = <13 GPIO_ACTIVE_HIGH>;
+			output-high;
+		};
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio_emulated.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio_emulated.dtsi
new file mode 100644
index 0000000000..70969eb00c
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900_gpio_emulated.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <dt-bindings/gpio/gpio.h>
+
+&mdio_gpio {
+	status = "okay";
+
+	reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <1000>;
+	reset-post-delay-us = <10000>;
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0x0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		poe_enable {
+			gpio-hog;
+			gpios = <13 GPIO_ACTIVE_HIGH>;
+			output-high;
+		};
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
index 6010da2e26..5b40f1ce09 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-16", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
index 6d98e7fae1..87cff0022e 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-24-v1", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
index b455ddf23a..1eaf2090ab 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-24e", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
index 25c82f089e..fea2e77f3e 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-24ep", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
index fa9bef89d6..59cd2082a8 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-24hp-v1", "realtek,rtl838x-soc";
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
index 93011cbdaa..78c66507f1 100644
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-24hp-v2", "realtek,rtl838x-soc";



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:36 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Set target as source-only
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46103.1737836673.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/896d953c5312c2b7331daca1d17694d5e469c3fa

commit 896d953c5312c2b7331daca1d17694d5e469c3fa
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Sat Jan 25 21:18:02 2025 +0100

    qualcommbe: ipq95xx: Set target as source-only
    
    Set target as source-only for now as only the Reference Board is
    supported and needs to better evaluated with real Devices.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/qualcommbe/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/qualcommbe/Makefile b/target/linux/qualcommbe/Makefile
index 54d0873c51..4456a8aae7 100644
--- a/target/linux/qualcommbe/Makefile
+++ b/target/linux/qualcommbe/Makefile
@@ -3,7 +3,7 @@ include $(TOPDIR)/rules.mk
 ARCH:=aarch64
 BOARD:=qualcommbe
 BOARDNAME:=Qualcomm Atheros 802.11be WiSoC-s
-FEATURES:=squashfs ramdisk fpu nand rtc emmc
+FEATURES:=squashfs ramdisk fpu nand rtc emmc source-only
 KERNELNAME:=Image
 CPU_TYPE:=cortex-a53
 SUBTARGETS:=ipq95xx



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:33 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Add patch fixing unmet
 dependency for QCOM PPE
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46104.1737836673.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/364a059b26b788d56655c568791caf03b7c7aaa0

commit 364a059b26b788d56655c568791caf03b7c7aaa0
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Dec 9 18:25:45 2024 +0100

    qualcommbe: ipq95xx: Add patch fixing unmet dependency for QCOM PPE
    
    Add patch fixing unmet dependency for QCOM PPE. This fix a compilation
    error when SFP config is selected.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...t-qualcomm-ppe-Fix-unmet-dependency-with-.patch | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/target/linux/qualcommbe/patches-6.6/305-net-ethernet-qualcomm-ppe-Fix-unmet-dependency-with-.patch b/target/linux/qualcommbe/patches-6.6/305-net-ethernet-qualcomm-ppe-Fix-unmet-dependency-with-.patch
new file mode 100644
index 0000000000..a2c7061438
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/305-net-ethernet-qualcomm-ppe-Fix-unmet-dependency-with-.patch
@@ -0,0 +1,35 @@
+From a0a04487554ea21db5eaf04f81fc159386a7477d Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Mon, 9 Dec 2024 18:19:06 +0100
+Subject: [PATCH] net: ethernet: qualcomm: ppe: Fix unmet dependency with
+ QCOM_PPE
+
+Fix unmet dependency with QCOM_PPE on selecting SFP.
+
+WARNING: unmet direct dependencies detected for SFP
+  Depends on [m]: NETDEVICES [=y] && PHYLIB [=y] && I2C [=y] && PHYLINK [=y] && (HWMON [=m] || HWMON [=m]=n [=n])
+  Selected by [y]:
+  - QCOM_PPE [=y] && NETDEVICES [=y] && ETHERNET [=y] && NET_VENDOR_QUALCOMM [=y] && HAS_IOMEM [=y] && OF [=y] && COMMON_CLK [=y]
+
+This permit correct compilation of the modules with SFP enabled.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ drivers/net/ethernet/qualcomm/Kconfig | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/qualcomm/Kconfig b/drivers/net/ethernet/qualcomm/Kconfig
+index a96f6acd4561..364d7e8ea7bf 100644
+--- a/drivers/net/ethernet/qualcomm/Kconfig
++++ b/drivers/net/ethernet/qualcomm/Kconfig
+@@ -68,7 +68,6 @@ config QCOM_PPE
+ 	select REGMAP_MMIO
+ 	select PHYLINK
+ 	select PCS_QCOM_IPQ_UNIPHY
+-	select SFP
+ 	help
+ 	  This driver supports the Qualcomm Technologies, Inc. packet
+ 	  process engine (PPE) available with IPQ SoC. The PPE houses
+-- 
+2.45.2
+



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:35 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:35 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Enable Aquantia PHY by
 default
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46105.1737836673.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/439812283b7dae179d5ecc843d153bf607ae2f46

commit 439812283b7dae179d5ecc843d153bf607ae2f46
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Sat Jan 25 21:13:16 2025 +0100

    qualcommbe: ipq95xx: Enable Aquantia PHY by default
    
    Enable the Aquantia PHY by default in config-defaults. Target is big
    enough to permit embedding the PHY instead of having as an external
    module.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/qualcommbe/ipq95xx/config-default | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/qualcommbe/ipq95xx/config-default b/target/linux/qualcommbe/ipq95xx/config-default
index d1a648ca11..2f05b44fa0 100644
--- a/target/linux/qualcommbe/ipq95xx/config-default
+++ b/target/linux/qualcommbe/ipq95xx/config-default
@@ -1,3 +1,4 @@
+CONFIG_AQUANTIA_PHY=y
 CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
 CONFIG_DT_IDLE_GENPD=y
 CONFIG_GRO_CELLS=y



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:30 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:30 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Backport cpufreq patch and
 enable RPM
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46106.1737836673.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a181fc8b31dac59adec98f6b27a67f4725414a7c

commit a181fc8b31dac59adec98f6b27a67f4725414a7c
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Thu Dec 5 15:10:53 2024 +0100

    qualcommbe: ipq95xx: Backport cpufreq patch and enable RPM
    
    Backport CPUFreq patch and enable RPM. This is to enable CPU Frequency
    scaling and regulators.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/qualcommbe/ipq95xx/config-default     |  12 +++
 ...req-qcom-nvmem-Enable-cpufreq-for-ipq53xx.patch |  68 +++++++++++++
 ...-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch |  64 ++++++++++++
 ...com-ipq9574-populate-the-opp-table-based-.patch | 110 +++++++++++++++++++++
 4 files changed, 254 insertions(+)

diff --git a/target/linux/qualcommbe/ipq95xx/config-default b/target/linux/qualcommbe/ipq95xx/config-default
index 3c20e222ab..d1a648ca11 100644
--- a/target/linux/qualcommbe/ipq95xx/config-default
+++ b/target/linux/qualcommbe/ipq95xx/config-default
@@ -46,3 +46,15 @@ CONFIG_QCOM_PPE=y
 CONFIG_QCOM_IPA=y
 CONFIG_INTERCONNECT_QCOM=y
 CONFIG_INTERCONNECT_QCOM_OSM_L3=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_QCOM_SMD_RPM=y
+CONFIG_REGULATOR_QCOM_SMD_RPM=y
+# CONFIG_QCOM_CLK_SMD_RPM is not set
+# CONFIG_QCOM_RPMPD is not set
+# CONFIG_INTERCONNECT_QCOM_MSM8916 is not set
+# CONFIG_INTERCONNECT_QCOM_MSM8939 is not set
+# CONFIG_INTERCONNECT_QCOM_MSM8996 is not set
+# CONFIG_INTERCONNECT_QCOM_MSM8974 is not set
+# CONFIG_INTERCONNECT_QCOM_QCM2290 is not set
+# CONFIG_INTERCONNECT_QCOM_QCS404 is not set
+# CONFIG_INTERCONNECT_QCOM_SDM660 is not set
diff --git a/target/linux/qualcommbe/patches-6.6/013-01-v6.7-cpufreq-qcom-nvmem-Enable-cpufreq-for-ipq53xx.patch b/target/linux/qualcommbe/patches-6.6/013-01-v6.7-cpufreq-qcom-nvmem-Enable-cpufreq-for-ipq53xx.patch
new file mode 100644
index 0000000000..ed97bca367
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/013-01-v6.7-cpufreq-qcom-nvmem-Enable-cpufreq-for-ipq53xx.patch
@@ -0,0 +1,68 @@
+From ba5a61a08d83b18b99c461b4ddb9009947a4aa0e Mon Sep 17 00:00:00 2001
+From: Varadarajan Narayanan <quic_varada at quicinc.com>
+Date: Tue, 31 Oct 2023 12:41:38 +0530
+Subject: [PATCH 1/2] cpufreq: qcom-nvmem: Enable cpufreq for ipq53xx
+
+IPQ53xx have different OPPs available for the CPU based on
+SoC variant. This can be determined through use of an eFuse
+register present in the silicon.
+
+Added support for ipq53xx on nvmem driver which helps to
+determine OPPs at runtime based on the eFuse register which
+has the CPU frequency limits. opp-supported-hw dt binding
+can be used to indicate the available OPPs for each limit.
+
+nvmem driver also creates the "cpufreq-dt" platform_device after
+passing the version matching data to the OPP framework so that the
+cpufreq-dt handles the actual cpufreq implementation.
+
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
+Reviewed-by: Bryan O'Donoghue <bryan.odonoghue at linaro.org>
+Signed-off-by: Kathiravan T <quic_kathirav at quicinc.com>
+Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
+[ Viresh: Fixed subject ]
+Signed-off-by: Viresh Kumar <viresh.kumar at linaro.org>
+---
+ drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
+ drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
+index 07181913448f..53da25589e5f 100644
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -180,6 +180,7 @@ static const struct of_device_id blocklist[] __initconst = {
+ 	{ .compatible = "ti,am62a7", },
+ 	{ .compatible = "ti,am62p5", },
+ 
++	{ .compatible = "qcom,ipq5332", },
+ 	{ .compatible = "qcom,ipq8064", },
+ 	{ .compatible = "qcom,apq8064", },
+ 	{ .compatible = "qcom,msm8974", },
+diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+index 158c0e139185..4f7af70169e0 100644
+--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
++++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+@@ -183,6 +183,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
+ 	switch (msm_id) {
+ 	case QCOM_ID_MSM8996:
+ 	case QCOM_ID_APQ8096:
++	case QCOM_ID_IPQ5332:
++	case QCOM_ID_IPQ5322:
++	case QCOM_ID_IPQ5312:
++	case QCOM_ID_IPQ5302:
++	case QCOM_ID_IPQ5300:
+ 		drv->versions = 1 << (unsigned int)(*speedbin);
+ 		break;
+ 	case QCOM_ID_MSM8996SG:
+@@ -541,6 +546,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
+ 	{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
+ 	{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
+ 	{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
++	{ .compatible = "qcom,ipq5332", .data = &match_data_kryo },
+ 	{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
+ 	{ .compatible = "qcom,apq8064", .data = &match_data_krait },
+ 	{ .compatible = "qcom,msm8974", .data = &match_data_krait },
+-- 
+2.45.2
+
diff --git a/target/linux/qualcommbe/patches-6.6/013-02-v6.7-v6.8-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch b/target/linux/qualcommbe/patches-6.6/013-02-v6.7-v6.8-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch
new file mode 100644
index 0000000000..b3954d19b0
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/013-02-v6.7-v6.8-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch
@@ -0,0 +1,64 @@
+From 5b5b5806f22390808b8e8fa180fe35b003a4a74d Mon Sep 17 00:00:00 2001
+From: Varadarajan Narayanan <quic_varada at quicinc.com>
+Date: Tue, 31 Oct 2023 12:41:39 +0530
+Subject: [PATCH 2/2] cpufreq: qcom-nvmem: Introduce cpufreq for ipq95xx
+
+IPQ95xx SoCs have different OPPs available for the CPU based on
+the SoC variant. This can be determined from an eFuse register
+present in the silicon.
+
+Added support for ipq95xx on nvmem driver which helps to
+determine OPPs at runtime based on the eFuse register which
+has the CPU frequency limits. opp-supported-hw dt binding
+can be used to indicate the available OPPs for each limit.
+
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
+Signed-off-by: Praveenkumar I <ipkumar at codeaurora.org>
+Signed-off-by: Kathiravan T <quic_kathirav at quicinc.com>
+Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
+[ Viresh: Fixed subject ]
+Signed-off-by: Viresh Kumar <viresh.kumar at linaro.org>
+---
+ drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
+ drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
+index 53da25589e5f..bd1e1357cef8 100644
+--- a/drivers/cpufreq/cpufreq-dt-platdev.c
++++ b/drivers/cpufreq/cpufreq-dt-platdev.c
+@@ -184,6 +184,7 @@ static const struct of_device_id blocklist[] __initconst = {
+ 
+	{ .compatible = "qcom,ipq5332", },
+ 	{ .compatible = "qcom,ipq8064", },
++	{ .compatible = "qcom,ipq9574", },
+ 	{ .compatible = "qcom,apq8064", },
+ 	{ .compatible = "qcom,msm8974", },
+ 	{ .compatible = "qcom,msm8960", },
+diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+index 4f7af70169e0..6355a39418c5 100644
+--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
++++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
+@@ -188,6 +188,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
+ 	case QCOM_ID_IPQ5312:
+ 	case QCOM_ID_IPQ5302:
+ 	case QCOM_ID_IPQ5300:
++	case QCOM_ID_IPQ9514:
++	case QCOM_ID_IPQ9550:
++	case QCOM_ID_IPQ9554:
++	case QCOM_ID_IPQ9570:
++	case QCOM_ID_IPQ9574:
+ 		drv->versions = 1 << (unsigned int)(*speedbin);
+ 		break;
+ 	case QCOM_ID_MSM8996SG:
+@@ -551,6 +556,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
+ 	{ .compatible = "qcom,ipq5332", .data = &match_data_kryo },
+ 	{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
+ 	{ .compatible = "qcom,apq8064", .data = &match_data_krait },
++	{ .compatible = "qcom,ipq9574", .data = &match_data_kryo },
+ 	{ .compatible = "qcom,msm8974", .data = &match_data_krait },
+ 	{ .compatible = "qcom,msm8960", .data = &match_data_krait },
+ 	{},
+-- 
+2.45.2
+
diff --git a/target/linux/qualcommbe/patches-6.6/014-v6.8-arm64-dts-qcom-ipq9574-populate-the-opp-table-based-.patch b/target/linux/qualcommbe/patches-6.6/014-v6.8-arm64-dts-qcom-ipq9574-populate-the-opp-table-based-.patch
new file mode 100644
index 0000000000..8aaf117f58
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/014-v6.8-arm64-dts-qcom-ipq9574-populate-the-opp-table-based-.patch
@@ -0,0 +1,110 @@
+From b36074357baf2794c825ea1c145de1d22b15380b Mon Sep 17 00:00:00 2001
+From: Varadarajan Narayanan <quic_varada at quicinc.com>
+Date: Fri, 20 Oct 2023 11:49:39 +0530
+Subject: [PATCH] arm64: dts: qcom: ipq9574: populate the opp table based on
+ the eFuse
+
+IPQ95xx SoCs have different OPPs available for the CPU based on
+SoC variant. This can be determined from an eFuse register
+present in the silicon.
+
+Add support to read the eFuse and populate the OPPs based on it.
+
+Frequency	1.2GHz	1.8GHz	1.5GHz	No	opp-supported-hw
+					Limit
+------------------------------------------------------------
+936000000	1	1	1	1	0xf
+1104000000	1	1	1	1	0xf
+1200000000	1	1	1	1	0xf
+1416000000	0	1	1	1	0x7
+1488000000	0	1	1	1	0x7
+1800000000	0	1	0	1	0x5
+2208000000	0	0	0	1	0x1
+-----------------------------------------------------------
+
+Reviewed-by: Konrad Dybcio <konrad.dybcio at linaro.org>
+Signed-off-by: Kathiravan T <quic_kathirav at quicinc.com>
+Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
+Link: https://lore.kernel.org/r/14ab08b7cfd904433ca6065fac798d4f221c9d95.1697781921.git.quic_varada at quicinc.com
+Signed-off-by: Bjorn Andersson <andersson at kernel.org>
+---
+ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 21 ++++++++++++++++++++-
+ 1 file changed, 20 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+index 8a72ad4afd03..d4b7e215fc92 100644
+--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+@@ -106,42 +106,56 @@ memory at 40000000 {
+ 	};
+ 
+ 	cpu_opp_table: opp-table-cpu {
+-		compatible = "operating-points-v2";
++		compatible = "operating-points-v2-kryo-cpu";
+ 		opp-shared;
++		nvmem-cells = <&cpu_speed_bin>;
+ 
+ 		opp-936000000 {
+ 			opp-hz = /bits/ 64 <936000000>;
+ 			opp-microvolt = <725000>;
++			opp-supported-hw = <0xf>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
+ 		opp-1104000000 {
+ 			opp-hz = /bits/ 64 <1104000000>;
+ 			opp-microvolt = <787500>;
++			opp-supported-hw = <0xf>;
++			clock-latency-ns = <200000>;
++		};
++
++		opp-1200000000 {
++			opp-hz = /bits/ 64 <1200000000>;
++			opp-microvolt = <862500>;
++			opp-supported-hw = <0xf>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
+ 		opp-1416000000 {
+ 			opp-hz = /bits/ 64 <1416000000>;
+ 			opp-microvolt = <862500>;
++			opp-supported-hw = <0x7>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
+ 		opp-1488000000 {
+ 			opp-hz = /bits/ 64 <1488000000>;
+ 			opp-microvolt = <925000>;
++			opp-supported-hw = <0x7>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
+ 		opp-1800000000 {
+ 			opp-hz = /bits/ 64 <1800000000>;
+ 			opp-microvolt = <987500>;
++			opp-supported-hw = <0x5>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
+ 		opp-2208000000 {
+ 			opp-hz = /bits/ 64 <2208000000>;
+ 			opp-microvolt = <1062500>;
++			opp-supported-hw = <0x1>;
+ 			clock-latency-ns = <200000>;
+ 		};
+ 	};
+@@ -223,6 +237,11 @@ qfprom: efuse at a4000 {
+ 			reg = <0x000a4000 0x5a1>;
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
++
++			cpu_speed_bin: cpu-speed-bin at 15 {
++				reg = <0x15 0x2>;
++				bits = <7 2>;
++			};
+ 		};
+ 
+ 		cryptobam: dma-controller at 704000 {
+-- 
+2.45.2
+



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:34 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:34 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Update patch with upstream
 version and refresh
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46109.1737836677.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7333c694e3f96128fbf6f9a95c51b3fd7ff95ec9

commit 7333c694e3f96128fbf6f9a95c51b3fd7ff95ec9
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Sat Jan 25 21:11:24 2025 +0100

    qualcommbe: ipq95xx: Update patch with upstream version and refresh
    
    Update patch with upstream version and automatically refresh with make
    target/linux/refresh.
    
    Also backport one additional fix patch for NAND patch and drop a patch
    merged upstream.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...d-rawnand-qcom-cleanup-qcom_nandc-driver.patch} | 337 +++++++++------------
 ...wnand-qcom-Add-qcom-prefix-to-common-api.patch} | 174 +++++------
 ...-v6.14-mtd-nand-Add-qpic_common-API-file.patch} | 202 ++++--------
 ...-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch} |  90 ++----
 ...-qcom-Fix-build-issue-on-x86-architecture.patch |  84 +++++
 ...-CMN-PLL-clock-controller-driver-for-IPQ.patch} |  43 +--
 ...clock-qcom-Add-CMN-PLL-clock-controller-.patch} |  30 +-
 ...-arm64-dts-qcom-ipq9574-Add-CMN-PLL-node.patch} |  34 ++-
 ...om-ipq9574-Update-xo_board_clk-to-use-fi.patch} |  19 +-
 ...c-add-driver-for-QCOM-SPI-NAND-flash-Inte.patch | 104 +++++--
 ...k-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-supp.patch |  55 ----
 ...com-add-partition-table-for-ipq9574-rdp-c.patch |   2 +-
 12 files changed, 532 insertions(+), 642 deletions(-)

diff --git a/target/linux/qualcommbe/patches-6.6/100-02-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch b/target/linux/qualcommbe/patches-6.6/016-01-v6.14-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch
similarity index 82%
rename from target/linux/qualcommbe/patches-6.6/100-02-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch
rename to target/linux/qualcommbe/patches-6.6/016-01-v6.14-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch
index 595ef4d895..7db73ad077 100644
--- a/target/linux/qualcommbe/patches-6.6/100-02-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch
+++ b/target/linux/qualcommbe/patches-6.6/016-01-v6.14-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch
@@ -1,101 +1,27 @@
-From 1142a905d3450a40ac03cbe1426b16cd9650c5f7 Mon Sep 17 00:00:00 2001
+From 8c52932da5e6756fa66f52f0720da283fba13aa6 Mon Sep 17 00:00:00 2001
 From: Md Sadre Alam <quic_mdalam at quicinc.com>
-Date: Thu, 4 Apr 2024 16:19:43 +0530
-Subject: [PATCH v10 2/8] mtd: rawnand: qcom: cleanup qcom_nandc driver
+Date: Wed, 20 Nov 2024 14:45:00 +0530
+Subject: [PATCH 1/4] mtd: rawnand: qcom: cleanup qcom_nandc driver
 
-cleanup qcom_nandc driver as below
+Perform a global cleanup of the Qualcomm NAND
+controller driver with the following improvements:
 
-- Remove register value indirection api
+- Remove register value indirection API
 
-- Remove set_reg() api
+- Remove set_reg() API
 
-- Convert read_loc_first & read_loc_last macro to function
+- Convert read_loc_first & read_loc_last macro to functions
 
-- Renamed multiple variables
+- Rename multiple variables
 
 Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
+Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
 ---
+ drivers/mtd/nand/raw/qcom_nandc.c | 516 ++++++++++++++----------------
+ 1 file changed, 234 insertions(+), 282 deletions(-)
 
-Change in [v10]
-
-* No change
-
-Change in [v9]
-
-* Changed type of cmd1, vld to u32 from __le32 in qcom_nand_controller
-  structure
-* Changed type of cfg0, cfg1, cfg0_raw, cfg1_raw, clrflashstatus,
-  ecc_buf_cfg, ecc_bch_cfg, clrreadstatus to u32 in qcom_nand_host
-  structure
-* In nandc_set_read_loc_first() api added cpu_to_le32() macro to fix
-  compilation warning reported by kernel test bot
-* In nandc_set_read_loc_last() api added cpu_to_le32() macro to fix
-  compilation warning reported by kernel test bot
-* Changed data type of cw_offset, read_size, is_last_read_loc to
-  u32 in nandc_set_read_loc() api to fix compilation warning reported
-  by kernel test bot
-* In set_address() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In update_rw_regs() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In qcom_op_cmd_mapping() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In qcom_read_status_exec() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In qcom_read_id_type_exec() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In qcom_misc_cmd_type_exec() api added cpu_to_le32() macro to fix compilation
-  warning reported by kernel test bot
-* In qcom_param_page_type_exec() api added cpu_to_le32() macro to fix
-  compilation warning reported by kernel test bot 
-
-Change in [v8]
-
-* Fixed compilation warning reported by kernel test robot
-* Added "chip" description in nandc_set_read_loc_first()
-* Added "chip" description in nandc_set_read_loc_last()
-* Changed data type of read_location0, read_location1, 
-  read_location2, read_location3, read_location_last0,
-  read_location_last1, read_location_last2, read_location_last3,
-  addr0, addr1, cmd, cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg,
-  clrflashstatus, clrreadstatus, orig_cmd1, orig_vld to 
-  __le32 to fix compilation warning reported by kernel test robot
- 
-Change in [v7]
-
-* No change
-
-Change in [v6]
-
-* No change
-
-Change in [v5]
-
-* Cleand up raw nand driver.
-
-* Removed register value indirection
-
-* Removed set_reg() api.
-
-Change in [v4]
-
-* This patch was not included in [v4]
-
-Change in [v3]
-
-* This patch was not included in [v3]
-
-Change in [v2]
-
-* This patch was not included in [v2]
-
-Change in [v1]
-
-* This patch was not included in [v1]
-
- drivers/mtd/nand/raw/qcom_nandc.c | 506 ++++++++++++++----------------
- 1 file changed, 229 insertions(+), 277 deletions(-)
-
+diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
+index 636bba2528bf..9ae8c9f2ab55 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -189,17 +189,6 @@
@@ -153,7 +79,7 @@ Change in [v1]
 - * @is_bam - whether NAND controller is using BAM
 - * @is_qpic - whether NAND CTRL is part of qpic IP
 - * @qpic_v2 - flag to indicate QPIC IP version 2
-+ * @supports_bam - whether NAND controller is using BAM
++ * @supports_bam - whether NAND controller is using Bus Access Manager (BAM)
 + * @nandc_part_of_qpic - whether NAND controller is part of qpic IP
 + * @qpic_version2 - flag to indicate QPIC IP version 2
   * @use_codeword_fixup - whether NAND has different layout for boot partitions
@@ -170,7 +96,7 @@ Change in [v1]
  	bool use_codeword_fixup;
  };
  
-@@ -613,19 +599,18 @@ static void clear_bam_transaction(struct
+@@ -613,19 +599,11 @@ static void clear_bam_transaction(struct qcom_nand_controller *nandc)
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
@@ -178,20 +104,21 @@ Change in [v1]
 +	if (!nandc->props->supports_bam)
  		return;
  
- 	bam_txn->bam_ce_pos = 0;
- 	bam_txn->bam_ce_start = 0;
- 	bam_txn->cmd_sgl_pos = 0;
- 	bam_txn->cmd_sgl_start = 0;
- 	bam_txn->tx_sgl_pos = 0;
- 	bam_txn->tx_sgl_start = 0;
- 	bam_txn->rx_sgl_pos = 0;
- 	bam_txn->rx_sgl_start = 0;
+-	bam_txn->bam_ce_pos = 0;
+-	bam_txn->bam_ce_start = 0;
+-	bam_txn->cmd_sgl_pos = 0;
+-	bam_txn->cmd_sgl_start = 0;
+-	bam_txn->tx_sgl_pos = 0;
+-	bam_txn->tx_sgl_start = 0;
+-	bam_txn->rx_sgl_pos = 0;
+-	bam_txn->rx_sgl_start = 0;
++	memset(&bam_txn->bam_ce_pos, 0, sizeof(u32) * 8);
  	bam_txn->last_data_desc = NULL;
 -	bam_txn->wait_second_completion = false;
  
  	sg_init_table(bam_txn->cmd_sgl, nandc->max_cwperpage *
  		      QPIC_PER_CW_CMD_SGL);
-@@ -640,17 +618,7 @@ static void qpic_bam_dma_done(void *data
+@@ -640,46 +618,35 @@ static void qpic_bam_dma_done(void *data)
  {
  	struct bam_transaction *bam_txn = data;
  
@@ -209,21 +136,44 @@ Change in [v1]
 +	complete(&bam_txn->txn_done);
  }
  
- static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
-@@ -676,10 +644,9 @@ static inline void nandc_write(struct qc
+-static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
++static struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
+ {
+ 	return container_of(chip, struct qcom_nand_host, chip);
+ }
+ 
+-static inline struct qcom_nand_controller *
++static struct qcom_nand_controller *
+ get_qcom_nand_controller(struct nand_chip *chip)
+ {
+ 	return container_of(chip->controller, struct qcom_nand_controller,
+ 			    controller);
+ }
+ 
+-static inline u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
++static u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
+ {
+ 	return ioread32(nandc->base + offset);
+ }
+ 
+-static inline void nandc_write(struct qcom_nand_controller *nandc, int offset,
+-			       u32 val)
++static void nandc_write(struct qcom_nand_controller *nandc, int offset,
++			u32 val)
+ {
  	iowrite32(val, nandc->base + offset);
  }
  
 -static inline void nandc_read_buffer_sync(struct qcom_nand_controller *nandc,
 -					  bool is_cpu)
-+static inline void nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
++static void nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
  {
 -	if (!nandc->props->is_bam)
 +	if (!nandc->props->supports_bam)
  		return;
  
  	if (is_cpu)
-@@ -694,93 +661,90 @@ static inline void nandc_read_buffer_syn
+@@ -694,93 +661,90 @@ static inline void nandc_read_buffer_sync(struct qcom_nand_controller *nandc,
  					   DMA_FROM_DEVICE);
  }
  
@@ -279,27 +229,14 @@ Change in [v1]
 -	default:
 -		return NULL;
 -	}
--}
--
--static void nandc_set_reg(struct nand_chip *chip, int offset,
--			  u32 val)
--{
--	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
--	struct nandc_regs *regs = nandc->regs;
--	__le32 *reg;
--
--	reg = offset_to_nandc_reg(regs, offset);
--
--	if (reg)
--		*reg = cpu_to_le32(val);
--}
--
- /* Helper to check the code word, whether it is last cw or not */
- static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
- {
- 	return cw == (ecc->steps - 1);
++/* Helper to check whether this is the last CW or not */
++static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
++{
++	return cw == (ecc->steps - 1);
  }
  
+-static void nandc_set_reg(struct nand_chip *chip, int offset,
+-			  u32 val)
 +/**
 + * nandc_set_read_loc_first() - to set read location first register
 + * @chip:		NAND Private Flash Chip Data
@@ -313,8 +250,12 @@ Change in [v1]
 +static void nandc_set_read_loc_first(struct nand_chip *chip,
 +				     int reg_base, u32 cw_offset,
 +				     u32 read_size, u32 is_last_read_loc)
-+{
-+	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
+ {
+ 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
+-	struct nandc_regs *regs = nandc->regs;
+-	__le32 *reg;
+-
+-	reg = offset_to_nandc_reg(regs, offset);
 +	__le32 locreg_val;
 +	u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
 +		  ((read_size) << READ_LOCATION_SIZE) |
@@ -351,9 +292,16 @@ Change in [v1]
 +	u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
 +		  ((read_size) << READ_LOCATION_SIZE) |
 +		  ((is_last_read_loc) << READ_LOCATION_LAST));
-+
+ 
+-	if (reg)
+-		*reg = cpu_to_le32(val);
+-}
 +	locreg_val = cpu_to_le32(val);
-+
+ 
+-/* Helper to check the code word, whether it is last cw or not */
+-static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
+-{
+-	return cw == (ecc->steps - 1);
 +	if (reg_base == NAND_READ_LOCATION_LAST_CW_0)
 +		nandc->regs->read_location_last0 = locreg_val;
 +	else if (reg_base == NAND_READ_LOCATION_LAST_CW_1)
@@ -362,8 +310,8 @@ Change in [v1]
 +		nandc->regs->read_location_last2 = locreg_val;
 +	else if (reg_base == NAND_READ_LOCATION_LAST_CW_3)
 +		nandc->regs->read_location_last3 = locreg_val;
-+}
-+
+ }
+ 
  /* helper to configure location register values */
  static void nandc_set_read_loc(struct nand_chip *chip, int cw, int reg,
 -			       int cw_offset, int read_size, int is_last_read_loc)
@@ -384,7 +332,7 @@ Change in [v1]
  		return nandc_set_read_loc_last(chip, reg_base, cw_offset,
  				read_size, is_last_read_loc);
  	else
-@@ -792,12 +756,13 @@ static void nandc_set_read_loc(struct na
+@@ -792,12 +756,13 @@ static void nandc_set_read_loc(struct nand_chip *chip, int cw, int reg,
  static void set_address(struct qcom_nand_host *host, u16 column, int page)
  {
  	struct nand_chip *chip = &host->chip;
@@ -400,7 +348,7 @@ Change in [v1]
  }
  
  /*
-@@ -811,41 +776,43 @@ static void set_address(struct qcom_nand
+@@ -811,41 +776,43 @@ static void set_address(struct qcom_nand_host *host, u16 column, int page)
  static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, int cw)
  {
  	struct nand_chip *chip = &host->chip;
@@ -465,7 +413,7 @@ Change in [v1]
  
  	if (read)
  		nandc_set_read_loc(chip, cw, 0, 0, host->use_ecc ?
-@@ -1121,7 +1088,7 @@ static int read_reg_dma(struct qcom_nand
+@@ -1121,7 +1088,7 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
  	if (first == NAND_DEV_CMD_VLD || first == NAND_DEV_CMD1)
  		first = dev_cmd_reg_addr(nandc, first);
  
@@ -474,11 +422,11 @@ Change in [v1]
  		return prep_bam_dma_desc_cmd(nandc, true, first, vaddr,
  					     num_regs, flags);
  
-@@ -1136,25 +1103,16 @@ static int read_reg_dma(struct qcom_nand
+@@ -1136,25 +1103,16 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
   * write_reg_dma:	prepares a descriptor to write a given number of
   *			contiguous registers
   *
-+ * @vaddr:		contnigeous memory from where register value will
++ * @vaddr:		contiguous memory from where register value will
 + *			be written
   * @first:		offset of the first register in the contiguous block
   * @num_regs:		number of registers to write
@@ -504,7 +452,7 @@ Change in [v1]
  
  	if (first == NAND_EXEC_CMD)
  		flags |= NAND_BAM_NWD;
-@@ -1165,7 +1123,7 @@ static int write_reg_dma(struct qcom_nan
+@@ -1165,7 +1123,7 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, int first,
  	if (first == NAND_DEV_CMD_VLD_RESTORE || first == NAND_DEV_CMD_VLD)
  		first = dev_cmd_reg_addr(nandc, NAND_DEV_CMD_VLD);
  
@@ -513,7 +461,7 @@ Change in [v1]
  		return prep_bam_dma_desc_cmd(nandc, false, first, vaddr,
  					     num_regs, flags);
  
-@@ -1188,7 +1146,7 @@ static int write_reg_dma(struct qcom_nan
+@@ -1188,7 +1146,7 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, int first,
  static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
  			 const u8 *vaddr, int size, unsigned int flags)
  {
@@ -522,7 +470,7 @@ Change in [v1]
  		return prep_bam_dma_desc_data(nandc, true, vaddr, size, flags);
  
  	return prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false);
-@@ -1206,7 +1164,7 @@ static int read_data_dma(struct qcom_nan
+@@ -1206,7 +1164,7 @@ static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
  static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off,
  			  const u8 *vaddr, int size, unsigned int flags)
  {
@@ -531,7 +479,7 @@ Change in [v1]
  		return prep_bam_dma_desc_data(nandc, false, vaddr, size, flags);
  
  	return prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
-@@ -1220,13 +1178,14 @@ static void config_nand_page_read(struct
+@@ -1220,13 +1178,14 @@ static void config_nand_page_read(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -553,7 +501,7 @@ Change in [v1]
  }
  
  /*
-@@ -1239,16 +1198,16 @@ config_nand_cw_read(struct nand_chip *ch
+@@ -1239,16 +1198,16 @@ config_nand_cw_read(struct nand_chip *chip, bool use_ecc, int cw)
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	struct nand_ecc_ctrl *ecc = &chip->ecc;
  
@@ -577,7 +525,7 @@ Change in [v1]
  
  	if (use_ecc) {
  		read_reg_dma(nandc, NAND_FLASH_STATUS, 2, 0);
-@@ -1279,10 +1238,10 @@ static void config_nand_page_write(struc
+@@ -1279,10 +1238,10 @@ static void config_nand_page_write(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -592,7 +540,7 @@ Change in [v1]
  			      NAND_BAM_NEXT_SGL);
  }
  
-@@ -1294,13 +1253,13 @@ static void config_nand_cw_write(struct
+@@ -1294,13 +1253,13 @@ static void config_nand_cw_write(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -610,7 +558,7 @@ Change in [v1]
  }
  
  /* helpers to submit/free our list of dma descriptors */
-@@ -1311,7 +1270,7 @@ static int submit_descs(struct qcom_nand
+@@ -1311,7 +1270,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  	int ret = 0;
  
@@ -619,7 +567,7 @@ Change in [v1]
  		if (bam_txn->rx_sgl_pos > bam_txn->rx_sgl_start) {
  			ret = prepare_bam_async_desc(nandc, nandc->rx_chan, 0);
  			if (ret)
-@@ -1336,14 +1295,9 @@ static int submit_descs(struct qcom_nand
+@@ -1336,14 +1295,9 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  	list_for_each_entry(desc, &nandc->desc_list, node)
  		cookie = dmaengine_submit(desc->dma_desc);
  
@@ -635,7 +583,7 @@ Change in [v1]
  
  		dma_async_issue_pending(nandc->tx_chan);
  		dma_async_issue_pending(nandc->rx_chan);
-@@ -1365,7 +1319,7 @@ err_unmap_free_desc:
+@@ -1365,7 +1319,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  	list_for_each_entry_safe(desc, n, &nandc->desc_list, node) {
  		list_del(&desc->node);
  
@@ -644,7 +592,7 @@ Change in [v1]
  			dma_unmap_sg(nandc->dev, desc->bam_sgl,
  				     desc->sgl_cnt, desc->dir);
  		else
-@@ -1382,7 +1336,7 @@ err_unmap_free_desc:
+@@ -1382,7 +1336,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  static void clear_read_regs(struct qcom_nand_controller *nandc)
  {
  	nandc->reg_read_pos = 0;
@@ -653,7 +601,7 @@ Change in [v1]
  }
  
  /*
-@@ -1446,7 +1400,7 @@ static int check_flash_errors(struct qco
+@@ -1446,7 +1400,7 @@ static int check_flash_errors(struct qcom_nand_host *host, int cw_cnt)
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	int i;
  
@@ -662,7 +610,7 @@ Change in [v1]
  
  	for (i = 0; i < cw_cnt; i++) {
  		u32 flash = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -1476,7 +1430,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
+@@ -1476,7 +1430,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
  	clear_read_regs(nandc);
  	host->use_ecc = false;
  
@@ -671,7 +619,7 @@ Change in [v1]
  		raw_cw = ecc->steps - 1;
  
  	clear_bam_transaction(nandc);
-@@ -1497,7 +1451,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
+@@ -1497,7 +1451,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
  		oob_size2 = host->ecc_bytes_hw + host->spare_bytes;
  	}
  
@@ -680,7 +628,7 @@ Change in [v1]
  		nandc_set_read_loc(chip, cw, 0, read_loc, data_size1, 0);
  		read_loc += data_size1;
  
-@@ -1621,7 +1575,7 @@ static int parse_read_errors(struct qcom
+@@ -1621,7 +1575,7 @@ static int parse_read_errors(struct qcom_nand_host *host, u8 *data_buf,
  	u8 *data_buf_start = data_buf, *oob_buf_start = oob_buf;
  
  	buf = (struct read_stats *)nandc->reg_read_buf;
@@ -689,7 +637,7 @@ Change in [v1]
  
  	for (i = 0; i < ecc->steps; i++, buf++) {
  		u32 flash, buffer, erased_cw;
-@@ -1734,7 +1688,7 @@ static int read_page_ecc(struct qcom_nan
+@@ -1734,7 +1688,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
  			oob_size = host->ecc_bytes_hw + host->spare_bytes;
  		}
  
@@ -698,7 +646,7 @@ Change in [v1]
  			if (data_buf && oob_buf) {
  				nandc_set_read_loc(chip, i, 0, 0, data_size, 0);
  				nandc_set_read_loc(chip, i, 1, data_size,
-@@ -2455,14 +2409,14 @@ static int qcom_nand_attach_chip(struct
+@@ -2455,14 +2409,14 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
  
  	mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
  	/* Free the initially allocated BAM transaction for reading the ONFI params */
@@ -715,7 +663,7 @@ Change in [v1]
  		nandc->bam_txn = alloc_bam_transaction(nandc);
  		if (!nandc->bam_txn) {
  			dev_err(nandc->dev,
-@@ -2522,7 +2476,7 @@ static int qcom_nand_attach_chip(struct
+@@ -2522,7 +2476,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
  				| ecc_mode << ECC_MODE
  				| host->ecc_bytes_hw << ECC_PARITY_SIZE_BYTES_BCH;
  
@@ -724,7 +672,7 @@ Change in [v1]
  		host->ecc_buf_cfg = 0x203 << NUM_STEPS;
  
  	host->clrflashstatus = FS_READY_BSY_N;
-@@ -2556,7 +2510,7 @@ static int qcom_op_cmd_mapping(struct na
+@@ -2556,7 +2510,7 @@ static int qcom_op_cmd_mapping(struct nand_chip *chip, u8 opcode,
  		cmd = OP_FETCH_ID;
  		break;
  	case NAND_CMD_PARAM:
@@ -733,7 +681,7 @@ Change in [v1]
  			cmd = OP_PAGE_READ_ONFI_READ;
  		else
  			cmd = OP_PAGE_READ;
-@@ -2609,7 +2563,7 @@ static int qcom_parse_instructions(struc
+@@ -2609,7 +2563,7 @@ static int qcom_parse_instructions(struct nand_chip *chip,
  			if (ret < 0)
  				return ret;
  
@@ -742,7 +690,7 @@ Change in [v1]
  			q_op->rdy_delay_ns = instr->delay_ns;
  			break;
  
-@@ -2619,10 +2573,10 @@ static int qcom_parse_instructions(struc
+@@ -2619,10 +2573,10 @@ static int qcom_parse_instructions(struct nand_chip *chip,
  			addrs = &instr->ctx.addr.addrs[offset];
  
  			for (i = 0; i < min_t(unsigned int, 4, naddrs); i++)
@@ -755,7 +703,7 @@ Change in [v1]
  
  			q_op->rdy_delay_ns = instr->delay_ns;
  			break;
-@@ -2663,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nan
+@@ -2663,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nand_chip *chip, unsigned int time_ms)
  	unsigned long start = jiffies + msecs_to_jiffies(time_ms);
  	u32 flash;
  
@@ -764,7 +712,7 @@ Change in [v1]
  
  	do {
  		flash = le32_to_cpu(nandc->reg_read_buf[0]);
-@@ -2706,11 +2660,11 @@ static int qcom_read_status_exec(struct
+@@ -2706,11 +2660,11 @@ static int qcom_read_status_exec(struct nand_chip *chip,
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -780,7 +728,7 @@ Change in [v1]
  	read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
  
  	ret = submit_descs(nandc);
-@@ -2719,7 +2673,7 @@ static int qcom_read_status_exec(struct
+@@ -2719,7 +2673,7 @@ static int qcom_read_status_exec(struct nand_chip *chip,
  		goto err_out;
  	}
  
@@ -789,7 +737,7 @@ Change in [v1]
  
  	for (i = 0; i < num_cw; i++) {
  		flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -2763,16 +2717,14 @@ static int qcom_read_id_type_exec(struct
+@@ -2763,16 +2717,14 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -798,14 +746,14 @@ Change in [v1]
 -	nandc_set_reg(chip, NAND_ADDR1, q_op.addr2_reg);
 -	nandc_set_reg(chip, NAND_FLASH_CHIP_SELECT,
 -		      nandc->props->is_bam ? 0 : DM_EN);
+-
+-	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
 +	nandc->regs->cmd = q_op.cmd_reg;
 +	nandc->regs->addr0 = q_op.addr1_reg;
 +	nandc->regs->addr1 = q_op.addr2_reg;
 +	nandc->regs->chip_sel = cpu_to_le32(nandc->props->supports_bam ? 0 : DM_EN);
 +	nandc->regs->exec = cpu_to_le32(1);
  
--	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
--
 -	write_reg_dma(nandc, NAND_FLASH_CMD, 4, NAND_BAM_NEXT_SGL);
 -	write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
 +	write_reg_dma(nandc, &nandc->regs->cmd, NAND_FLASH_CMD, 4, NAND_BAM_NEXT_SGL);
@@ -813,7 +761,7 @@ Change in [v1]
  
  	read_reg_dma(nandc, NAND_READ_ID, 1, NAND_BAM_NEXT_SGL);
  
-@@ -2786,7 +2738,7 @@ static int qcom_read_id_type_exec(struct
+@@ -2786,7 +2738,7 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
  	op_id = q_op.data_instr_idx;
  	len = nand_subop_get_data_len(subop, op_id);
  
@@ -822,7 +770,7 @@ Change in [v1]
  	memcpy(instr->ctx.data.buf.in, nandc->reg_read_buf, len);
  
  err_out:
-@@ -2807,15 +2759,14 @@ static int qcom_misc_cmd_type_exec(struc
+@@ -2807,15 +2759,14 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
  
  	if (q_op.flag == OP_PROGRAM_PAGE) {
  		goto wait_rdy;
@@ -845,7 +793,7 @@ Change in [v1]
  		return 0;
  	}
  
-@@ -2826,14 +2777,14 @@ static int qcom_misc_cmd_type_exec(struc
+@@ -2826,14 +2777,14 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -866,7 +814,7 @@ Change in [v1]
  	read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
  
  	ret = submit_descs(nandc);
-@@ -2864,7 +2815,7 @@ static int qcom_param_page_type_exec(str
+@@ -2864,7 +2815,7 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  	if (ret)
  		return ret;
  
@@ -875,28 +823,12 @@ Change in [v1]
  
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
-@@ -2872,38 +2823,38 @@ static int qcom_param_page_type_exec(str
+@@ -2872,38 +2823,38 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
 -	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);
-+	nandc->regs->cmd = q_op.cmd_reg;
-+	nandc->regs->addr0 = 0;
-+	nandc->regs->addr1 = 0;
-+
-+	nandc->regs->cfg0 = cpu_to_le32(0 << CW_PER_PAGE
-+			    | 512 << UD_SIZE_BYTES
-+			    | 5 << NUM_ADDR_CYCLES
-+			    | 0 << SPARE_SIZE_BYTES);
-+
-+	nandc->regs->cfg1 = cpu_to_le32(7 << NAND_RECOVERY_CYCLES
-+			    | 0 << CS_ACTIVE_BSY
-+			    | 17 << BAD_BLOCK_BYTE_NUM
-+			    | 1 << BAD_BLOCK_IN_SPARE_AREA
-+			    | 2 << WR_RD_BSY_GAP
-+			    | 0 << WIDE_FLASH
-+			    | 1 << DEV0_CFG1_ECC_DISABLE);
- 
+-
 -	nandc_set_reg(chip, NAND_ADDR0, 0);
 -	nandc_set_reg(chip, NAND_ADDR1, 0);
 -	nandc_set_reg(chip, NAND_DEV0_CFG0, 0 << CW_PER_PAGE
@@ -912,6 +844,23 @@ Change in [v1]
 -					| 1 << DEV0_CFG1_ECC_DISABLE);
 -	if (!nandc->props->qpic_v2)
 -		nandc_set_reg(chip, NAND_EBI2_ECC_BUF_CFG, 1 << ECC_CFG_ECC_DISABLE);
++	nandc->regs->cmd = q_op.cmd_reg;
++	nandc->regs->addr0 = 0;
++	nandc->regs->addr1 = 0;
++
++	nandc->regs->cfg0 = cpu_to_le32(0 << CW_PER_PAGE |
++					512 << UD_SIZE_BYTES |
++					5 << NUM_ADDR_CYCLES |
++					0 << SPARE_SIZE_BYTES);
++
++	nandc->regs->cfg1 = cpu_to_le32(7 << NAND_RECOVERY_CYCLES |
++					0 << CS_ACTIVE_BSY |
++					17 << BAD_BLOCK_BYTE_NUM |
++					1 << BAD_BLOCK_IN_SPARE_AREA |
++					2 << WR_RD_BSY_GAP |
++					0 << WIDE_FLASH |
++					1 << DEV0_CFG1_ECC_DISABLE);
++
 +	if (!nandc->props->qpic_version2)
 +		nandc->regs->ecc_buf_cfg = cpu_to_le32(1 << ECC_CFG_ECC_DISABLE);
  
@@ -929,19 +878,18 @@ Change in [v1]
  	}
  
 -	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
--
++	nandc->regs->exec = cpu_to_le32(1);
+ 
 -	if (!nandc->props->qpic_v2) {
 -		nandc_set_reg(chip, NAND_DEV_CMD1_RESTORE, nandc->cmd1);
 -		nandc_set_reg(chip, NAND_DEV_CMD_VLD_RESTORE, nandc->vld);
-+	nandc->regs->exec = cpu_to_le32(1);
-+
 +	if (!nandc->props->qpic_version2) {
 +		nandc->regs->orig_cmd1 = cpu_to_le32(nandc->cmd1);
 +		nandc->regs->orig_vld = cpu_to_le32(nandc->vld);
  	}
  
  	instr = q_op.data_instr;
-@@ -2912,9 +2863,9 @@ static int qcom_param_page_type_exec(str
+@@ -2912,9 +2863,9 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  
  	nandc_set_read_loc(chip, 0, 0, 0, len, 1);
  
@@ -954,7 +902,7 @@ Change in [v1]
  	}
  
  	nandc->buf_count = len;
-@@ -2926,9 +2877,10 @@ static int qcom_param_page_type_exec(str
+@@ -2926,9 +2877,10 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  		      nandc->buf_count, 0);
  
  	/* restore CMD1 and VLD regs */
@@ -968,7 +916,7 @@ Change in [v1]
  	}
  
  	ret = submit_descs(nandc);
-@@ -3017,7 +2969,7 @@ static const struct nand_controller_ops
+@@ -3017,7 +2969,7 @@ static const struct nand_controller_ops qcom_nandc_ops = {
  
  static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
  {
@@ -977,7 +925,7 @@ Change in [v1]
  		if (!dma_mapping_error(nandc->dev, nandc->reg_read_dma))
  			dma_unmap_single(nandc->dev, nandc->reg_read_dma,
  					 MAX_REG_RD *
-@@ -3070,7 +3022,7 @@ static int qcom_nandc_alloc(struct qcom_
+@@ -3070,7 +3022,7 @@ static int qcom_nandc_alloc(struct qcom_nand_controller *nandc)
  	if (!nandc->reg_read_buf)
  		return -ENOMEM;
  
@@ -986,7 +934,7 @@ Change in [v1]
  		nandc->reg_read_dma =
  			dma_map_single(nandc->dev, nandc->reg_read_buf,
  				       MAX_REG_RD *
-@@ -3151,15 +3103,15 @@ static int qcom_nandc_setup(struct qcom_
+@@ -3151,15 +3103,15 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
  	u32 nand_ctrl;
  
  	/* kill onenand */
@@ -1005,7 +953,7 @@ Change in [v1]
  		nand_ctrl = nandc_read(nandc, NAND_CTRL);
  
  		/*
-@@ -3176,7 +3128,7 @@ static int qcom_nandc_setup(struct qcom_
+@@ -3176,7 +3128,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
  	}
  
  	/* save the original values of these registers */
@@ -1014,7 +962,7 @@ Change in [v1]
  		nandc->cmd1 = nandc_read(nandc, dev_cmd_reg_addr(nandc, NAND_DEV_CMD1));
  		nandc->vld = NAND_DEV_CMD_VLD_VAL;
  	}
-@@ -3349,7 +3301,7 @@ static int qcom_nandc_parse_dt(struct pl
+@@ -3349,7 +3301,7 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
  	struct device_node *np = nandc->dev->of_node;
  	int ret;
  
@@ -1023,7 +971,7 @@ Change in [v1]
  		ret = of_property_read_u32(np, "qcom,cmd-crci",
  					   &nandc->cmd_crci);
  		if (ret) {
-@@ -3474,30 +3426,30 @@ static void qcom_nandc_remove(struct pla
+@@ -3474,30 +3426,30 @@ static void qcom_nandc_remove(struct platform_device *pdev)
  
  static const struct qcom_nandc_props ipq806x_nandc_props = {
  	.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
@@ -1062,3 +1010,6 @@ Change in [v1]
  	.dev_cmd_reg_start = 0x7000,
  };
  
+-- 
+2.47.1
+
diff --git a/target/linux/qualcommbe/patches-6.6/100-03-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch b/target/linux/qualcommbe/patches-6.6/016-02-v6.14-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch
similarity index 85%
rename from target/linux/qualcommbe/patches-6.6/100-03-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch
rename to target/linux/qualcommbe/patches-6.6/016-02-v6.14-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch
index e34bd28d82..ca8727d516 100644
--- a/target/linux/qualcommbe/patches-6.6/100-03-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch
+++ b/target/linux/qualcommbe/patches-6.6/016-02-v6.14-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch
@@ -1,57 +1,20 @@
-From dde50ed4a7bdb79b4bb408781d3e4846d4c49f0a Mon Sep 17 00:00:00 2001
+From 1d479f5b345e0c3650fec4dddeef9fc6fab30c8b Mon Sep 17 00:00:00 2001
 From: Md Sadre Alam <quic_mdalam at quicinc.com>
-Date: Wed, 11 Sep 2024 11:13:42 +0530
-Subject: [PATCH v10 3/8] mtd: rawnand: qcom: Add qcom prefix to common api
+Date: Wed, 20 Nov 2024 14:45:01 +0530
+Subject: [PATCH 2/4] mtd: rawnand: qcom: Add qcom prefix to common api
 
 Add qcom prefix to all the api which will be commonly
 used by spi nand driver and raw nand driver.
 
+Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
 Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
+Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
 ---
-
-Change in [v10]
-
-* No change
-
-Change in [v9]
-
-* No change
-
-Change in [v8]
-
-* No change
-
-Change in [v7]
-
-* No change
-
-Change in [v6]
-
-* No change
-
-Change in [v5]
-
-* Add qcom_ prefix to all common API.
-
-Change in [v4]
-
-* This patch was not included in [v4]
-
-Change in [v3]
-
-* This patch was not included in [v3]
-
-Change in [v2]
-
-* This patch was not included in [v2]
-
-Change in [v1]
-
-* This patch was not included in [v1]
-
  drivers/mtd/nand/raw/qcom_nandc.c | 320 +++++++++++++++---------------
  1 file changed, 160 insertions(+), 160 deletions(-)
 
+diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
+index 9ae8c9f2ab55..6da5d23d2c8b 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -53,7 +53,7 @@
@@ -81,7 +44,7 @@ Change in [v1]
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
-@@ -559,7 +559,7 @@ static void free_bam_transaction(struct
+@@ -559,7 +559,7 @@ static void free_bam_transaction(struct qcom_nand_controller *nandc)
  
  /* Allocates and Initializes the BAM transaction */
  static struct bam_transaction *
@@ -90,7 +53,7 @@ Change in [v1]
  {
  	struct bam_transaction *bam_txn;
  	size_t bam_txn_size;
-@@ -595,7 +595,7 @@ alloc_bam_transaction(struct qcom_nand_c
+@@ -595,7 +595,7 @@ alloc_bam_transaction(struct qcom_nand_controller *nandc)
  }
  
  /* Clears the BAM transaction indexes */
@@ -99,7 +62,7 @@ Change in [v1]
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
-@@ -614,7 +614,7 @@ static void clear_bam_transaction(struct
+@@ -614,7 +614,7 @@ static void clear_bam_transaction(struct qcom_nand_controller *nandc)
  }
  
  /* Callback for DMA descriptor completion */
@@ -108,16 +71,16 @@ Change in [v1]
  {
  	struct bam_transaction *bam_txn = data;
  
-@@ -644,7 +644,7 @@ static inline void nandc_write(struct qc
+@@ -644,7 +644,7 @@ static void nandc_write(struct qcom_nand_controller *nandc, int offset,
  	iowrite32(val, nandc->base + offset);
  }
  
--static inline void nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
-+static inline void qcom_nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
+-static void nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
++static void qcom_nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
  {
  	if (!nandc->props->supports_bam)
  		return;
-@@ -824,9 +824,9 @@ static void update_rw_regs(struct qcom_n
+@@ -824,9 +824,9 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
   * for BAM. This descriptor will be added in the NAND DMA descriptor queue
   * which will be submitted to DMA engine.
   */
@@ -130,7 +93,7 @@ Change in [v1]
  {
  	struct desc_info *desc;
  	struct scatterlist *sgl;
-@@ -903,9 +903,9 @@ static int prepare_bam_async_desc(struct
+@@ -903,9 +903,9 @@ static int prepare_bam_async_desc(struct qcom_nand_controller *nandc,
   * NAND_BAM_NEXT_SGL will be used for starting the separate SGL
   * after the current command element.
   */
@@ -143,7 +106,7 @@ Change in [v1]
  {
  	int bam_ce_size;
  	int i, ret;
-@@ -943,9 +943,9 @@ static int prep_bam_dma_desc_cmd(struct
+@@ -943,9 +943,9 @@ static int prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
  		bam_txn->bam_ce_start = bam_txn->bam_ce_pos;
  
  		if (flags & NAND_BAM_NWD) {
@@ -156,7 +119,7 @@ Change in [v1]
  			if (ret)
  				return ret;
  		}
-@@ -958,9 +958,8 @@ static int prep_bam_dma_desc_cmd(struct
+@@ -958,9 +958,8 @@ static int prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
   * Prepares the data descriptor for BAM DMA which will be used for NAND
   * data reads and writes.
   */
@@ -168,7 +131,7 @@ Change in [v1]
  {
  	int ret;
  	struct bam_transaction *bam_txn = nandc->bam_txn;
-@@ -979,8 +978,8 @@ static int prep_bam_dma_desc_data(struct
+@@ -979,8 +978,8 @@ static int prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
  		 * is not set, form the DMA descriptor
  		 */
  		if (!(flags & NAND_BAM_NO_EOT)) {
@@ -179,7 +142,7 @@ Change in [v1]
  			if (ret)
  				return ret;
  		}
-@@ -989,9 +988,9 @@ static int prep_bam_dma_desc_data(struct
+@@ -989,9 +988,9 @@ static int prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
  	return 0;
  }
  
@@ -192,7 +155,7 @@ Change in [v1]
  {
  	struct desc_info *desc;
  	struct dma_async_tx_descriptor *dma_desc;
-@@ -1069,15 +1068,15 @@ err:
+@@ -1069,15 +1068,15 @@ static int prep_adm_dma_desc(struct qcom_nand_controller *nandc, bool read,
  }
  
  /*
@@ -211,7 +174,7 @@ Change in [v1]
  {
  	bool flow_control = false;
  	void *vaddr;
-@@ -1089,18 +1088,18 @@ static int read_reg_dma(struct qcom_nand
+@@ -1089,18 +1088,18 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
  		first = dev_cmd_reg_addr(nandc, first);
  
  	if (nandc->props->supports_bam)
@@ -232,8 +195,8 @@ Change in [v1]
 + * qcom_write_reg_dma:	prepares a descriptor to write a given number of
   *			contiguous registers
   *
-  * @vaddr:		contnigeous memory from where register value will
-@@ -1109,8 +1108,8 @@ static int read_reg_dma(struct qcom_nand
+  * @vaddr:		contiguous memory from where register value will
+@@ -1109,8 +1108,8 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
   * @num_regs:		number of registers to write
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -244,7 +207,7 @@ Change in [v1]
  {
  	bool flow_control = false;
  
-@@ -1124,18 +1123,18 @@ static int write_reg_dma(struct qcom_nan
+@@ -1124,18 +1123,18 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, __le32 *vaddr,
  		first = dev_cmd_reg_addr(nandc, NAND_DEV_CMD_VLD);
  
  	if (nandc->props->supports_bam)
@@ -266,7 +229,7 @@ Change in [v1]
   *			controller's internal buffer to the buffer 'vaddr'
   *
   * @reg_off:		offset within the controller's data buffer
-@@ -1143,17 +1142,17 @@ static int write_reg_dma(struct qcom_nan
+@@ -1143,17 +1142,17 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, __le32 *vaddr,
   * @size:		DMA transaction size in bytes
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -289,7 +252,7 @@ Change in [v1]
   *			'vaddr' to the controller's internal buffer
   *
   * @reg_off:		offset within the controller's data buffer
-@@ -1161,13 +1160,13 @@ static int read_data_dma(struct qcom_nan
+@@ -1161,13 +1160,13 @@ static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
   * @size:		DMA transaction size in bytes
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -307,7 +270,7 @@ Change in [v1]
  }
  
  /*
-@@ -1178,14 +1177,14 @@ static void config_nand_page_read(struct
+@@ -1178,14 +1177,14 @@ static void config_nand_page_read(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -329,7 +292,7 @@ Change in [v1]
  }
  
  /*
-@@ -1204,17 +1203,17 @@ config_nand_cw_read(struct nand_chip *ch
+@@ -1204,17 +1203,17 @@ config_nand_cw_read(struct nand_chip *chip, bool use_ecc, int cw)
  		reg = &nandc->regs->read_location_last0;
  
  	if (nandc->props->supports_bam)
@@ -354,7 +317,7 @@ Change in [v1]
  	}
  }
  
-@@ -1238,11 +1237,11 @@ static void config_nand_page_write(struc
+@@ -1238,11 +1237,11 @@ static void config_nand_page_write(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -370,7 +333,7 @@ Change in [v1]
  }
  
  /*
-@@ -1253,17 +1252,18 @@ static void config_nand_cw_write(struct
+@@ -1253,17 +1252,18 @@ static void config_nand_cw_write(struct nand_chip *chip)
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -395,7 +358,7 @@ Change in [v1]
  {
  	struct desc_info *desc, *n;
  	dma_cookie_t cookie = 0;
-@@ -1272,21 +1272,21 @@ static int submit_descs(struct qcom_nand
+@@ -1272,21 +1272,21 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  
  	if (nandc->props->supports_bam) {
  		if (bam_txn->rx_sgl_pos > bam_txn->rx_sgl_start) {
@@ -422,7 +385,7 @@ Change in [v1]
  			if (ret)
  				goto err_unmap_free_desc;
  		}
-@@ -1296,7 +1296,7 @@ static int submit_descs(struct qcom_nand
+@@ -1296,7 +1296,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  		cookie = dmaengine_submit(desc->dma_desc);
  
  	if (nandc->props->supports_bam) {
@@ -431,7 +394,7 @@ Change in [v1]
  		bam_txn->last_cmd_desc->callback_param = bam_txn;
  
  		dma_async_issue_pending(nandc->tx_chan);
-@@ -1314,7 +1314,7 @@ static int submit_descs(struct qcom_nand
+@@ -1314,7 +1314,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  err_unmap_free_desc:
  	/*
  	 * Unmap the dma sg_list and free the desc allocated by both
@@ -440,7 +403,7 @@ Change in [v1]
  	 */
  	list_for_each_entry_safe(desc, n, &nandc->desc_list, node) {
  		list_del(&desc->node);
-@@ -1333,10 +1333,10 @@ err_unmap_free_desc:
+@@ -1333,10 +1333,10 @@ static int submit_descs(struct qcom_nand_controller *nandc)
  }
  
  /* reset the register read buffer for next NAND operation */
@@ -453,7 +416,7 @@ Change in [v1]
  }
  
  /*
-@@ -1400,7 +1400,7 @@ static int check_flash_errors(struct qco
+@@ -1400,7 +1400,7 @@ static int check_flash_errors(struct qcom_nand_host *host, int cw_cnt)
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	int i;
  
@@ -462,7 +425,7 @@ Change in [v1]
  
  	for (i = 0; i < cw_cnt; i++) {
  		u32 flash = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -1427,13 +1427,13 @@ qcom_nandc_read_cw_raw(struct mtd_info *
+@@ -1427,13 +1427,13 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
  	nand_read_page_op(chip, page, 0, NULL, 0);
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
@@ -478,7 +441,7 @@ Change in [v1]
  	set_address(host, host->cw_size * cw, page);
  	update_rw_regs(host, 1, true, raw_cw);
  	config_nand_page_read(chip);
-@@ -1466,18 +1466,18 @@ qcom_nandc_read_cw_raw(struct mtd_info *
+@@ -1466,18 +1466,18 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
  
  	config_nand_cw_read(chip, false, raw_cw);
  
@@ -502,7 +465,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to read raw cw %d\n", cw);
  		return ret;
-@@ -1575,7 +1575,7 @@ static int parse_read_errors(struct qcom
+@@ -1575,7 +1575,7 @@ static int parse_read_errors(struct qcom_nand_host *host, u8 *data_buf,
  	u8 *data_buf_start = data_buf, *oob_buf_start = oob_buf;
  
  	buf = (struct read_stats *)nandc->reg_read_buf;
@@ -511,7 +474,7 @@ Change in [v1]
  
  	for (i = 0; i < ecc->steps; i++, buf++) {
  		u32 flash, buffer, erased_cw;
-@@ -1704,8 +1704,8 @@ static int read_page_ecc(struct qcom_nan
+@@ -1704,8 +1704,8 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
  		config_nand_cw_read(chip, true, i);
  
  		if (data_buf)
@@ -522,7 +485,7 @@ Change in [v1]
  
  		/*
  		 * when ecc is enabled, the controller doesn't read the real
-@@ -1720,8 +1720,8 @@ static int read_page_ecc(struct qcom_nan
+@@ -1720,8 +1720,8 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
  			for (j = 0; j < host->bbm_size; j++)
  				*oob_buf++ = 0xff;
  
@@ -533,7 +496,7 @@ Change in [v1]
  		}
  
  		if (data_buf)
-@@ -1730,7 +1730,7 @@ static int read_page_ecc(struct qcom_nan
+@@ -1730,7 +1730,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
  			oob_buf += oob_size;
  	}
  
@@ -542,7 +505,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to read page/oob\n");
  		return ret;
-@@ -1751,7 +1751,7 @@ static int copy_last_cw(struct qcom_nand
+@@ -1751,7 +1751,7 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
  	int size;
  	int ret;
  
@@ -551,7 +514,7 @@ Change in [v1]
  
  	size = host->use_ecc ? host->cw_data : host->cw_size;
  
-@@ -1763,9 +1763,9 @@ static int copy_last_cw(struct qcom_nand
+@@ -1763,9 +1763,9 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
  
  	config_nand_single_cw_page_read(chip, host->use_ecc, ecc->steps - 1);
  
@@ -563,7 +526,7 @@ Change in [v1]
  	if (ret)
  		dev_err(nandc->dev, "failed to copy last codeword\n");
  
-@@ -1851,14 +1851,14 @@ static int qcom_nandc_read_page(struct n
+@@ -1851,14 +1851,14 @@ static int qcom_nandc_read_page(struct nand_chip *chip, u8 *buf,
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
  	host->use_ecc = true;
@@ -580,7 +543,7 @@ Change in [v1]
  
  	return read_page_ecc(host, data_buf, oob_buf, page);
  }
-@@ -1899,8 +1899,8 @@ static int qcom_nandc_read_oob(struct na
+@@ -1899,8 +1899,8 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
  	if (host->nr_boot_partitions)
  		qcom_nandc_codeword_fixup(host, page);
  
@@ -591,7 +554,7 @@ Change in [v1]
  
  	host->use_ecc = true;
  	set_address(host, 0, page);
-@@ -1927,8 +1927,8 @@ static int qcom_nandc_write_page(struct
+@@ -1927,8 +1927,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
  	set_address(host, 0, page);
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
@@ -602,7 +565,7 @@ Change in [v1]
  
  	data_buf = (u8 *)buf;
  	oob_buf = chip->oob_poi;
-@@ -1949,8 +1949,8 @@ static int qcom_nandc_write_page(struct
+@@ -1949,8 +1949,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
  			oob_size = ecc->bytes;
  		}
  
@@ -613,7 +576,7 @@ Change in [v1]
  
  		/*
  		 * when ECC is enabled, we don't really need to write anything
-@@ -1962,8 +1962,8 @@ static int qcom_nandc_write_page(struct
+@@ -1962,8 +1962,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
  		if (qcom_nandc_is_last_cw(ecc, i)) {
  			oob_buf += host->bbm_size;
  
@@ -624,7 +587,7 @@ Change in [v1]
  		}
  
  		config_nand_cw_write(chip);
-@@ -1972,7 +1972,7 @@ static int qcom_nandc_write_page(struct
+@@ -1972,7 +1972,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
  		oob_buf += oob_size;
  	}
  
@@ -633,7 +596,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to write page\n");
  		return ret;
-@@ -1997,8 +1997,8 @@ static int qcom_nandc_write_page_raw(str
+@@ -1997,8 +1997,8 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
  		qcom_nandc_codeword_fixup(host, page);
  
  	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
@@ -644,7 +607,7 @@ Change in [v1]
  
  	data_buf = (u8 *)buf;
  	oob_buf = chip->oob_poi;
-@@ -2024,28 +2024,28 @@ static int qcom_nandc_write_page_raw(str
+@@ -2024,28 +2024,28 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
  			oob_size2 = host->ecc_bytes_hw + host->spare_bytes;
  		}
  
@@ -681,7 +644,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to write raw page\n");
  		return ret;
-@@ -2075,7 +2075,7 @@ static int qcom_nandc_write_oob(struct n
+@@ -2075,7 +2075,7 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
  		qcom_nandc_codeword_fixup(host, page);
  
  	host->use_ecc = true;
@@ -690,7 +653,7 @@ Change in [v1]
  
  	/* calculate the data and oob size for the last codeword/step */
  	data_size = ecc->size - ((ecc->steps - 1) << 2);
-@@ -2090,11 +2090,11 @@ static int qcom_nandc_write_oob(struct n
+@@ -2090,11 +2090,11 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
  	update_rw_regs(host, 1, false, 0);
  
  	config_nand_page_write(chip);
@@ -705,7 +668,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to write oob\n");
  		return ret;
-@@ -2121,7 +2121,7 @@ static int qcom_nandc_block_bad(struct n
+@@ -2121,7 +2121,7 @@ static int qcom_nandc_block_bad(struct nand_chip *chip, loff_t ofs)
  	 */
  	host->use_ecc = false;
  
@@ -714,7 +677,7 @@ Change in [v1]
  	ret = copy_last_cw(host, page);
  	if (ret)
  		goto err;
-@@ -2148,8 +2148,8 @@ static int qcom_nandc_block_markbad(stru
+@@ -2148,8 +2148,8 @@ static int qcom_nandc_block_markbad(struct nand_chip *chip, loff_t ofs)
  	struct nand_ecc_ctrl *ecc = &chip->ecc;
  	int page, ret;
  
@@ -725,7 +688,7 @@ Change in [v1]
  
  	/*
  	 * to mark the BBM as bad, we flash the entire last codeword with 0s.
-@@ -2166,11 +2166,11 @@ static int qcom_nandc_block_markbad(stru
+@@ -2166,11 +2166,11 @@ static int qcom_nandc_block_markbad(struct nand_chip *chip, loff_t ofs)
  	update_rw_regs(host, 1, false, ecc->steps - 1);
  
  	config_nand_page_write(chip);
@@ -740,7 +703,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure to update BBM\n");
  		return ret;
-@@ -2410,14 +2410,14 @@ static int qcom_nand_attach_chip(struct
+@@ -2410,14 +2410,14 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
  	mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
  	/* Free the initially allocated BAM transaction for reading the ONFI params */
  	if (nandc->props->supports_bam)
@@ -757,7 +720,7 @@ Change in [v1]
  		if (!nandc->bam_txn) {
  			dev_err(nandc->dev,
  				"failed to allocate bam transaction\n");
-@@ -2617,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nan
+@@ -2617,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nand_chip *chip, unsigned int time_ms)
  	unsigned long start = jiffies + msecs_to_jiffies(time_ms);
  	u32 flash;
  
@@ -766,7 +729,7 @@ Change in [v1]
  
  	do {
  		flash = le32_to_cpu(nandc->reg_read_buf[0]);
-@@ -2657,23 +2657,23 @@ static int qcom_read_status_exec(struct
+@@ -2657,23 +2657,23 @@ static int qcom_read_status_exec(struct nand_chip *chip,
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -797,7 +760,7 @@ Change in [v1]
  
  	for (i = 0; i < num_cw; i++) {
  		flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -2714,8 +2714,8 @@ static int qcom_read_id_type_exec(struct
+@@ -2714,8 +2714,8 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -808,7 +771,7 @@ Change in [v1]
  
  	nandc->regs->cmd = q_op.cmd_reg;
  	nandc->regs->addr0 = q_op.addr1_reg;
-@@ -2723,12 +2723,12 @@ static int qcom_read_id_type_exec(struct
+@@ -2723,12 +2723,12 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
  	nandc->regs->chip_sel = cpu_to_le32(nandc->props->supports_bam ? 0 : DM_EN);
  	nandc->regs->exec = cpu_to_le32(1);
  
@@ -825,7 +788,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting read id descriptor\n");
  		goto err_out;
-@@ -2738,7 +2738,7 @@ static int qcom_read_id_type_exec(struct
+@@ -2738,7 +2738,7 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
  	op_id = q_op.data_instr_idx;
  	len = nand_subop_get_data_len(subop, op_id);
  
@@ -834,7 +797,7 @@ Change in [v1]
  	memcpy(instr->ctx.data.buf.in, nandc->reg_read_buf, len);
  
  err_out:
-@@ -2774,20 +2774,20 @@ static int qcom_misc_cmd_type_exec(struc
+@@ -2774,20 +2774,20 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -862,7 +825,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting misc descriptor\n");
  		goto err_out;
-@@ -2820,8 +2820,8 @@ static int qcom_param_page_type_exec(str
+@@ -2820,8 +2820,8 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
  	host->use_ecc = false;
@@ -873,7 +836,7 @@ Change in [v1]
  
  	nandc->regs->cmd = q_op.cmd_reg;
  	nandc->regs->addr0 = 0;
-@@ -2864,8 +2864,8 @@ static int qcom_param_page_type_exec(str
+@@ -2864,8 +2864,8 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  	nandc_set_read_loc(chip, 0, 0, 0, len, 1);
  
  	if (!nandc->props->qpic_version2) {
@@ -884,7 +847,7 @@ Change in [v1]
  	}
  
  	nandc->buf_count = len;
-@@ -2873,17 +2873,17 @@ static int qcom_param_page_type_exec(str
+@@ -2873,17 +2873,17 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  
  	config_nand_single_cw_page_read(chip, false, 0);
  
@@ -908,7 +871,7 @@ Change in [v1]
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting param page descriptor\n");
  		goto err_out;
-@@ -3067,7 +3067,7 @@ static int qcom_nandc_alloc(struct qcom_
+@@ -3067,7 +3067,7 @@ static int qcom_nandc_alloc(struct qcom_nand_controller *nandc)
  		 * maximum codeword size
  		 */
  		nandc->max_cwperpage = 1;
@@ -917,3 +880,6 @@ Change in [v1]
  		if (!nandc->bam_txn) {
  			dev_err(nandc->dev,
  				"failed to allocate bam transaction\n");
+-- 
+2.47.1
+
diff --git a/target/linux/qualcommbe/patches-6.6/100-04-mtd-nand-Add-qpic_common-API-file.patch b/target/linux/qualcommbe/patches-6.6/016-03-v6.14-mtd-nand-Add-qpic_common-API-file.patch
similarity index 95%
rename from target/linux/qualcommbe/patches-6.6/100-04-mtd-nand-Add-qpic_common-API-file.patch
rename to target/linux/qualcommbe/patches-6.6/016-03-v6.14-mtd-nand-Add-qpic_common-API-file.patch
index 93dca8aaaa..8506fbab05 100644
--- a/target/linux/qualcommbe/patches-6.6/100-04-mtd-nand-Add-qpic_common-API-file.patch
+++ b/target/linux/qualcommbe/patches-6.6/016-03-v6.14-mtd-nand-Add-qpic_common-API-file.patch
@@ -1,117 +1,46 @@
-From b00c2f583e54aa8bed2044e5b1898d9accd45415 Mon Sep 17 00:00:00 2001
+From fdf3ee5c6e5278dab4f60b998b47ed2d510bf80f Mon Sep 17 00:00:00 2001
 From: Md Sadre Alam <quic_mdalam at quicinc.com>
-Date: Wed, 11 Sep 2024 17:20:22 +0530
-Subject: [PATCH v10 4/8] mtd: nand: Add qpic_common API file
+Date: Wed, 20 Nov 2024 14:45:02 +0530
+Subject: [PATCH 3/4] mtd: nand: Add qpic_common API file
 
 Add qpic_common.c file which hold all the common
 qpic APIs which will be used by both qpic raw nand
 driver and qpic spi nand driver.
 
 Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
+Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
 ---
-
-Change in [v10]
-
-* No change
-
-Change in [v9]
-
-* No Change 
-
-Change in [v8]
-
-* Removed "inline" from qcom_nandc_dev_to_mem()
-
-Change in [v7]
-
-* Removed partition.h
-
-* Updated commit message heading
-
-* Made CONFIG_MTD_NAND_QCOM as bool
-
-Change in [v6]
-
-* made changes to select qpic_common.c based on either
-  CONFIG_MTD_NAND_QCOM=y or CONFIG_SPI_QPIC_SNAND=y
-
-* Removed rawnand.h from qpic_common.c
-
-* change nand_controller variable as a pointer type.
-
-Change in [v5]
-
-* Remove multiple dma call back to avoid race condition
-
-Change in [v4]
-
-* Added kernel doc for all common api as per kernel doc
-  standard
-
-* Added QPIC_COMMON config to build qpic_common.c
-
-Change in [v3]
-
-* Added original copy right
-
-* Removed all EXPORT_SYMBOL()
-
-* Made this common api file more generic
-
-* Added qcom_ prefix to all api in this file
-
-* Removed devm_kfree and added kfree
-
-* Moved to_qcom_nand_controller() to raw nand driver
-  since it was only used by raw nand driver, so not needed
-  as common
-
-* Added kernel doc for all api
-
-* made reverse tree of variable declaration in 
-  prep_adm_dma_desc() function
-
-* Added if(!ret) condition in prep_adm_dma_desc()
-  function
-
-* Initialized slave_conf as 0 while declaration
-
-Change in [v2]
-
-* Posted initial support for common api file
-
-Change in [v1]
-
-* Posted as RFC patch for design review
-
- drivers/mtd/nand/Makefile            |    4 +
- drivers/mtd/nand/qpic_common.c       |  738 +++++++++++++++++
- drivers/mtd/nand/raw/Kconfig         |    2 +-
+ drivers/mtd/nand/Makefile            |    2 +-
+ drivers/mtd/nand/qpic_common.c       |  759 ++++++++++++++++++
  drivers/mtd/nand/raw/qcom_nandc.c    | 1092 +-------------------------
  include/linux/mtd/nand-qpic-common.h |  468 +++++++++++
- 5 files changed, 1223 insertions(+), 1081 deletions(-)
+ 4 files changed, 1240 insertions(+), 1081 deletions(-)
  create mode 100644 drivers/mtd/nand/qpic_common.c
  create mode 100644 include/linux/mtd/nand-qpic-common.h
 
+diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
+index 19e1291ac4d5..da1586a36574 100644
 --- a/drivers/mtd/nand/Makefile
 +++ b/drivers/mtd/nand/Makefile
-@@ -5,6 +5,10 @@ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.
+@@ -3,7 +3,7 @@
+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
  obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
  obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
- 
-+ifeq ($(CONFIG_MTD_NAND_QCOM),y)
-+obj-y	+= qpic_common.o
-+endif
-+
+-
++obj-$(CONFIG_MTD_NAND_QCOM) += qpic_common.o
  obj-y	+= onenand/
  obj-y	+= raw/
  obj-y	+= spi/
+diff --git a/drivers/mtd/nand/qpic_common.c b/drivers/mtd/nand/qpic_common.c
+new file mode 100644
+index 000000000000..8abbb960a7ce
 --- /dev/null
 +++ b/drivers/mtd/nand/qpic_common.c
-@@ -0,0 +1,745 @@
+@@ -0,0 +1,759 @@
 +// SPDX-License-Identifier: GPL-2.0-only
 +/*
 + * Copyright (c) 2016, The Linux Foundation. All rights reserved.
++ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved
 + */
 +#include <linux/clk.h>
 +#include <linux/delay.h>
@@ -137,6 +66,7 @@ Change in [v1]
 +
 +	kfree(bam_txn);
 +}
++EXPORT_SYMBOL(qcom_free_bam_transaction);
 +
 +/**
 + * qcom_alloc_bam_transaction() - allocate BAM transaction
@@ -179,6 +109,7 @@ Change in [v1]
 +
 +	return bam_txn;
 +}
++EXPORT_SYMBOL(qcom_alloc_bam_transaction);
 +
 +/**
 + * qcom_clear_bam_transaction() - Clears the BAM transaction
@@ -193,14 +124,7 @@ Change in [v1]
 +	if (!nandc->props->supports_bam)
 +		return;
 +
-+	bam_txn->bam_ce_pos = 0;
-+	bam_txn->bam_ce_start = 0;
-+	bam_txn->cmd_sgl_pos = 0;
-+	bam_txn->cmd_sgl_start = 0;
-+	bam_txn->tx_sgl_pos = 0;
-+	bam_txn->tx_sgl_start = 0;
-+	bam_txn->rx_sgl_pos = 0;
-+	bam_txn->rx_sgl_start = 0;
++	memset(&bam_txn->bam_ce_pos, 0, sizeof(u32) * 8);
 +	bam_txn->last_data_desc = NULL;
 +
 +	sg_init_table(bam_txn->cmd_sgl, nandc->max_cwperpage *
@@ -210,6 +134,7 @@ Change in [v1]
 +
 +	reinit_completion(&bam_txn->txn_done);
 +}
++EXPORT_SYMBOL(qcom_clear_bam_transaction);
 +
 +/**
 + * qcom_qpic_bam_dma_done() - Callback for DMA descriptor completion
@@ -223,6 +148,7 @@ Change in [v1]
 +
 +	complete(&bam_txn->txn_done);
 +}
++EXPORT_SYMBOL(qcom_qpic_bam_dma_done);
 +
 +/**
 + * qcom_nandc_dev_to_mem() - Check for dma sync for cpu or device
@@ -247,6 +173,7 @@ Change in [v1]
 +					   sizeof(*nandc->reg_read_buf),
 +					   DMA_FROM_DEVICE);
 +}
++EXPORT_SYMBOL(qcom_nandc_dev_to_mem);
 +
 +/**
 + * qcom_prepare_bam_async_desc() - Prepare DMA descriptor
@@ -326,6 +253,7 @@ Change in [v1]
 +
 +	return 0;
 +}
++EXPORT_SYMBOL(qcom_prepare_bam_async_desc);
 +
 +/**
 + * qcom_prep_bam_dma_desc_cmd() - Prepares the command descriptor for BAM DMA
@@ -388,6 +316,7 @@ Change in [v1]
 +
 +	return 0;
 +}
++EXPORT_SYMBOL(qcom_prep_bam_dma_desc_cmd);
 +
 +/**
 + * qcom_prep_bam_dma_desc_data() - Prepares the data descriptor for BAM DMA
@@ -429,6 +358,7 @@ Change in [v1]
 +
 +	return 0;
 +}
++EXPORT_SYMBOL(qcom_prep_bam_dma_desc_data);
 +
 +/**
 + * qcom_prep_adm_dma_desc() - Prepare descriptor for adma
@@ -517,6 +447,7 @@ Change in [v1]
 +
 +	return ret;
 +}
++EXPORT_SYMBOL(qcom_prep_adm_dma_desc);
 +
 +/**
 + * qcom_read_reg_dma() - read a given number of registers to the reg_read_buf pointer
@@ -550,11 +481,12 @@ Change in [v1]
 +	return qcom_prep_adm_dma_desc(nandc, true, first, vaddr,
 +				      num_regs * sizeof(u32), flow_control);
 +}
++EXPORT_SYMBOL(qcom_read_reg_dma);
 +
 +/**
 + * qcom_write_reg_dma() - write a given number of registers
 + * @nandc: qpic nand controller
-+ * @vaddr: contnigeous memory from where register value will
++ * @vaddr: contiguous memory from where register value will
 + *	   be written
 + * @first: offset of the first register in the contiguous block
 + * @num_regs: number of registers to write
@@ -587,6 +519,7 @@ Change in [v1]
 +	return qcom_prep_adm_dma_desc(nandc, false, first, vaddr,
 +				      num_regs * sizeof(u32), flow_control);
 +}
++EXPORT_SYMBOL(qcom_write_reg_dma);
 +
 +/**
 + * qcom_read_data_dma() - transfer data
@@ -607,6 +540,7 @@ Change in [v1]
 +
 +	return qcom_prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false);
 +}
++EXPORT_SYMBOL(qcom_read_data_dma);
 +
 +/**
 + * qcom_write_data_dma() - transfer data
@@ -627,6 +561,7 @@ Change in [v1]
 +
 +	return qcom_prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
 +}
++EXPORT_SYMBOL(qcom_write_data_dma);
 +
 +/**
 + * qcom_submit_descs() - submit dma descriptor
@@ -703,6 +638,7 @@ Change in [v1]
 +
 +	return ret;
 +}
++EXPORT_SYMBOL(qcom_submit_descs);
 +
 +/**
 + * qcom_clear_read_regs() - reset the read register buffer
@@ -715,6 +651,7 @@ Change in [v1]
 +	nandc->reg_read_pos = 0;
 +	qcom_nandc_dev_to_mem(nandc, false);
 +}
++EXPORT_SYMBOL(qcom_clear_read_regs);
 +
 +/**
 + * qcom_nandc_unalloc() - unallocate qpic nand controller
@@ -744,6 +681,7 @@ Change in [v1]
 +			dma_release_channel(nandc->chan);
 +	}
 +}
++EXPORT_SYMBOL(qcom_nandc_unalloc);
 +
 +/**
 + * qcom_nandc_alloc() - Allocate qpic nand controller
@@ -854,17 +792,12 @@ Change in [v1]
 +	qcom_nandc_unalloc(nandc);
 +	return ret;
 +}
---- a/drivers/mtd/nand/raw/Kconfig
-+++ b/drivers/mtd/nand/raw/Kconfig
-@@ -330,7 +330,7 @@ config MTD_NAND_HISI504
- 	  Enables support for NAND controller on Hisilicon SoC Hip04.
- 
- config MTD_NAND_QCOM
--	tristate "QCOM NAND controller"
-+	bool "QCOM NAND controller"
- 	depends on ARCH_QCOM || COMPILE_TEST
- 	depends on HAS_IOMEM
- 	help
++EXPORT_SYMBOL(qcom_nandc_alloc);
++
++MODULE_DESCRIPTION("QPIC controller common api");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
+index 6da5d23d2c8b..dcb62fd19dd7 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -15,417 +15,7 @@
@@ -1286,7 +1219,7 @@ Change in [v1]
  
  /*
   * NAND special boot partitions
-@@ -530,104 +120,6 @@ struct qcom_nand_host {
+@@ -530,97 +120,6 @@ struct qcom_nand_host {
  	bool bch_enabled;
  };
  
@@ -1295,7 +1228,7 @@ Change in [v1]
 - * among different NAND controllers.
 - * @ecc_modes - ecc mode for NAND
 - * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
-- * @supports_bam - whether NAND controller is using BAM
+- * @supports_bam - whether NAND controller is using Bus Access Manager (BAM)
 - * @nandc_part_of_qpic - whether NAND controller is part of qpic IP
 - * @qpic_version2 - flag to indicate QPIC IP version 2
 - * @use_codeword_fixup - whether NAND has different layout for boot partitions
@@ -1362,14 +1295,7 @@ Change in [v1]
 -	if (!nandc->props->supports_bam)
 -		return;
 -
--	bam_txn->bam_ce_pos = 0;
--	bam_txn->bam_ce_start = 0;
--	bam_txn->cmd_sgl_pos = 0;
--	bam_txn->cmd_sgl_start = 0;
--	bam_txn->tx_sgl_pos = 0;
--	bam_txn->tx_sgl_start = 0;
--	bam_txn->rx_sgl_pos = 0;
--	bam_txn->rx_sgl_start = 0;
+-	memset(&bam_txn->bam_ce_pos, 0, sizeof(u32) * 8);
 -	bam_txn->last_data_desc = NULL;
 -
 -	sg_init_table(bam_txn->cmd_sgl, nandc->max_cwperpage *
@@ -1388,11 +1314,11 @@ Change in [v1]
 -	complete(&bam_txn->txn_done);
 -}
 -
- static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
+ static struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
  {
  	return container_of(chip, struct qcom_nand_host, chip);
-@@ -629,8 +128,8 @@ static inline struct qcom_nand_host *to_
- static inline struct qcom_nand_controller *
+@@ -629,8 +128,8 @@ static struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
+ static struct qcom_nand_controller *
  get_qcom_nand_controller(struct nand_chip *chip)
  {
 -	return container_of(chip->controller, struct qcom_nand_controller,
@@ -1401,12 +1327,12 @@ Change in [v1]
 +		((u8 *)chip->controller - sizeof(struct qcom_nand_controller));
  }
  
- static inline u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
-@@ -644,23 +143,6 @@ static inline void nandc_write(struct qc
+ static u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
+@@ -644,23 +143,6 @@ static void nandc_write(struct qcom_nand_controller *nandc, int offset,
  	iowrite32(val, nandc->base + offset);
  }
  
--static inline void qcom_nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
+-static void qcom_nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu)
 -{
 -	if (!nandc->props->supports_bam)
 -		return;
@@ -1423,13 +1349,14 @@ Change in [v1]
 -					   DMA_FROM_DEVICE);
 -}
 -
- /* Helper to check the code word, whether it is last cw or not */
+ /* Helper to check whether this is the last CW or not */
  static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
  {
-@@ -820,356 +302,6 @@ static void update_rw_regs(struct qcom_n
+@@ -819,356 +301,6 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
+ 				   host->cw_data : host->cw_size, 1);
  }
  
- /*
+-/*
 - * Maps the scatter gather list for DMA transfer and forms the DMA descriptor
 - * for BAM. This descriptor will be added in the NAND DMA descriptor queue
 - * which will be submitted to DMA engine.
@@ -1712,7 +1639,7 @@ Change in [v1]
 - * qcom_write_reg_dma:	prepares a descriptor to write a given number of
 - *			contiguous registers
 - *
-- * @vaddr:		contnigeous memory from where register value will
+- * @vaddr:		contiguous memory from where register value will
 - *			be written
 - * @first:		offset of the first register in the contiguous block
 - * @num_regs:		number of registers to write
@@ -1779,11 +1706,10 @@ Change in [v1]
 -	return qcom_prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
 -}
 -
--/*
+ /*
   * Helper to prepare DMA descriptors for configuring registers
   * before reading a NAND page.
-  */
-@@ -1262,83 +394,6 @@ static void config_nand_cw_write(struct
+@@ -1262,83 +394,6 @@ static void config_nand_cw_write(struct nand_chip *chip)
  			   NAND_BAM_NEXT_SGL);
  }
  
@@ -1867,7 +1793,7 @@ Change in [v1]
  /*
   * when using BCH ECC, the HW flags an error in NAND_FLASH_STATUS if it read
   * an erased CW, and reports an erased CW in NAND_ERASED_CW_DETECT_STATUS.
-@@ -2967,141 +2022,14 @@ static const struct nand_controller_ops
+@@ -2967,141 +2022,14 @@ static const struct nand_controller_ops qcom_nandc_ops = {
  	.exec_op = qcom_nand_exec_op,
  };
  
@@ -2012,7 +1938,7 @@ Change in [v1]
  	/* kill onenand */
  	if (!nandc->props->nandc_part_of_qpic)
  		nandc_write(nandc, SFLASHC_BURST_CFG, 0);
-@@ -3240,7 +2168,7 @@ static int qcom_nand_host_init_and_regis
+@@ -3240,7 +2168,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
  	chip->legacy.block_bad		= qcom_nandc_block_bad;
  	chip->legacy.block_markbad	= qcom_nandc_block_markbad;
  
@@ -2021,7 +1947,7 @@ Change in [v1]
  	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA |
  			 NAND_SKIP_BBTSCAN;
  
-@@ -3323,17 +2251,21 @@ static int qcom_nandc_parse_dt(struct pl
+@@ -3323,17 +2251,21 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
  static int qcom_nandc_probe(struct platform_device *pdev)
  {
  	struct qcom_nand_controller *nandc;
@@ -2044,6 +1970,9 @@ Change in [v1]
  
  	dev_data = of_device_get_match_data(dev);
  	if (!dev_data) {
+diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
+new file mode 100644
+index 000000000000..425994429387
 --- /dev/null
 +++ b/include/linux/mtd/nand-qpic-common.h
 @@ -0,0 +1,468 @@
@@ -2515,3 +2444,6 @@ Change in [v1]
 +int qcom_nandc_alloc(struct qcom_nand_controller *nandc);
 +#endif
 +
+-- 
+2.47.1
+
diff --git a/target/linux/qualcommbe/patches-6.6/100-05-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch b/target/linux/qualcommbe/patches-6.6/016-04-v6.14-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch
similarity index 82%
rename from target/linux/qualcommbe/patches-6.6/100-05-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch
rename to target/linux/qualcommbe/patches-6.6/016-04-v6.14-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch
index 5dddc3d891..71f25e27b5 100644
--- a/target/linux/qualcommbe/patches-6.6/100-05-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch
+++ b/target/linux/qualcommbe/patches-6.6/016-04-v6.14-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch
@@ -1,65 +1,25 @@
-From 9c5b6453db27706f090ab06987394aabaaf24e1b Mon Sep 17 00:00:00 2001
+From 0c08080fd71cd5dd59643104b39d3c89d793ab3c Mon Sep 17 00:00:00 2001
 From: Md Sadre Alam <quic_mdalam at quicinc.com>
-Date: Wed, 11 Sep 2024 12:50:42 +0530
-Subject: [PATCH v10 5/8] mtd: rawnand: qcom: use FIELD_PREP and GENMASK
+Date: Wed, 20 Nov 2024 14:45:03 +0530
+Subject: [PATCH 4/4] mtd: rawnand: qcom: use FIELD_PREP and GENMASK
 
 Use the bitfield macro FIELD_PREP, and GENMASK to
 do the shift and mask in one go. This makes the code
 more readable.
 
+Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
 Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
+Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
 ---
-
-Change in [v10]
-
-* No change
-
-Change in [v9]
-
-* In update_rw_regs() api added cpu_to_le32() macro to fix compilation
-  issue reported by kernel test bot
-* In qcom_param_page_type_exec() api added cpu_to_le32() macro to fix
-  compilation issue reported by kernel test bot  
-
-Change in [v8]
-
-* No change
-
-Change in [v7]
-
-* No change
-
-Change in [v6]
-
-* Added FIELD_PREP() and GENMASK() macro
-
-Change in [v5]
-
-* This patch was not included in [v1]
-
-Change in [v4]
-
-* This patch was not included in [v4]
-
-Change in [v3]
-
-* This patch was not included in [v3]
-
-Change in [v2]
-
-* This patch was not included in [v2]
-
-Change in [v1]
-
-* This patch was not included in [v1]
-
  drivers/mtd/nand/raw/qcom_nandc.c    | 97 ++++++++++++++--------------
  include/linux/mtd/nand-qpic-common.h | 31 +++++----
  2 files changed, 67 insertions(+), 61 deletions(-)
 
+diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
+index dcb62fd19dd7..d2d2aeee42a7 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
-@@ -281,7 +281,7 @@ static void update_rw_regs(struct qcom_n
+@@ -281,7 +281,7 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
  				(num_cw - 1) << CW_PER_PAGE);
  
  		cfg1 = cpu_to_le32(host->cfg1_raw);
@@ -68,7 +28,7 @@ Change in [v1]
  	}
  
  	nandc->regs->cmd = cmd;
-@@ -1494,42 +1494,41 @@ static int qcom_nand_attach_chip(struct
+@@ -1494,42 +1494,41 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
  	host->cw_size = host->cw_data + ecc->bytes;
  	bad_block_byte = mtd->writesize - host->cw_size * (cwperpage - 1) + 1;
  
@@ -146,27 +106,26 @@ Change in [v1]
  
  	if (!nandc->props->qpic_version2)
  		host->ecc_buf_cfg = 0x203 << NUM_STEPS;
-@@ -1882,21 +1881,21 @@ static int qcom_param_page_type_exec(str
+@@ -1882,21 +1881,21 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
  	nandc->regs->addr0 = 0;
  	nandc->regs->addr1 = 0;
  
--	nandc->regs->cfg0 = cpu_to_le32(0 << CW_PER_PAGE
--			    | 512 << UD_SIZE_BYTES
--			    | 5 << NUM_ADDR_CYCLES
--			    | 0 << SPARE_SIZE_BYTES);
--
--	nandc->regs->cfg1 = cpu_to_le32(7 << NAND_RECOVERY_CYCLES
--			    | 0 << CS_ACTIVE_BSY
--			    | 17 << BAD_BLOCK_BYTE_NUM
--			    | 1 << BAD_BLOCK_IN_SPARE_AREA
--			    | 2 << WR_RD_BSY_GAP
--			    | 0 << WIDE_FLASH
--			    | 1 << DEV0_CFG1_ECC_DISABLE);
+-	nandc->regs->cfg0 = cpu_to_le32(0 << CW_PER_PAGE |
+-					512 << UD_SIZE_BYTES |
+-					5 << NUM_ADDR_CYCLES |
+-					0 << SPARE_SIZE_BYTES);
 +	host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
 +		     FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |
 +		     FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |
 +		     FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);
-+
+ 
+-	nandc->regs->cfg1 = cpu_to_le32(7 << NAND_RECOVERY_CYCLES |
+-					0 << CS_ACTIVE_BSY |
+-					17 << BAD_BLOCK_BYTE_NUM |
+-					1 << BAD_BLOCK_IN_SPARE_AREA |
+-					2 << WR_RD_BSY_GAP |
+-					0 << WIDE_FLASH |
+-					1 << DEV0_CFG1_ECC_DISABLE);
 +	host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
 +		     FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |
 +		     FIELD_PREP(CS_ACTIVE_BSY, 0) |
@@ -181,6 +140,8 @@ Change in [v1]
  
  	/* configure CMD1 and VLD for ONFI param probing in QPIC v1 */
  	if (!nandc->props->qpic_version2) {
+diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
+index 425994429387..e79c79775eb8 100644
 --- a/include/linux/mtd/nand-qpic-common.h
 +++ b/include/linux/mtd/nand-qpic-common.h
 @@ -70,35 +70,42 @@
@@ -238,3 +199,6 @@ Change in [v1]
  
  /* NAND_DEV_CMD1 bits */
  #define	READ_ADDR			0
+-- 
+2.47.1
+
diff --git a/target/linux/qualcommbe/patches-6.6/017-v6.,14-mtd-rawnand-qcom-Fix-build-issue-on-x86-architecture.patch b/target/linux/qualcommbe/patches-6.6/017-v6.,14-mtd-rawnand-qcom-Fix-build-issue-on-x86-architecture.patch
new file mode 100644
index 0000000000..5c3fcc43c8
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/017-v6.,14-mtd-rawnand-qcom-Fix-build-issue-on-x86-architecture.patch
@@ -0,0 +1,84 @@
+From b9371866799d67a80be0ea9e01bd41987db22f26 Mon Sep 17 00:00:00 2001
+From: Md Sadre Alam <quic_mdalam at quicinc.com>
+Date: Mon, 6 Jan 2025 18:45:58 +0530
+Subject: [PATCH] mtd: rawnand: qcom: Fix build issue on x86 architecture
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Fix a buffer overflow issue in qcom_clear_bam_transaction by using
+struct_group to group related fields and avoid FORTIFY_SOURCE warnings.
+
+On x86 architecture, the following error occurs due to warnings being
+treated as errors:
+
+In function ?fortify_memset_chk?,
+    inlined from ?qcom_clear_bam_transaction? at
+drivers/mtd/nand/qpic_common.c:88:2:
+./include/linux/fortify-string.h:480:25: error: call to ?__write_overflow_field?
+declared with attribute warning: detected write beyond size of field
+(1st parameter); maybe use struct_group()? [-Werror=attribute-warning]
+  480 |                         __write_overflow_field(p_size_field, size);
+      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+  LD [M]  drivers/mtd/nand/nandcore.o
+  CC [M]  drivers/w1/masters/mxc_w1.o
+cc1: all warnings being treated as errors
+
+This patch addresses the issue by grouping the related fields in
+struct bam_transaction using struct_group and updating the memset call
+accordingly.
+
+Fixes: 8c52932da5e6 ("mtd: rawnand: qcom: cleanup qcom_nandc driver")
+Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
+Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
+---
+ drivers/mtd/nand/qpic_common.c       |  2 +-
+ include/linux/mtd/nand-qpic-common.h | 19 +++++++++++--------
+ 2 files changed, 12 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/mtd/nand/qpic_common.c b/drivers/mtd/nand/qpic_common.c
+index 8abbb960a7ce..e0ed25b5afea 100644
+--- a/drivers/mtd/nand/qpic_common.c
++++ b/drivers/mtd/nand/qpic_common.c
+@@ -85,7 +85,7 @@ void qcom_clear_bam_transaction(struct qcom_nand_controller *nandc)
+ 	if (!nandc->props->supports_bam)
+ 		return;
+ 
+-	memset(&bam_txn->bam_ce_pos, 0, sizeof(u32) * 8);
++	memset(&bam_txn->bam_positions, 0, sizeof(bam_txn->bam_positions));
+ 	bam_txn->last_data_desc = NULL;
+ 
+ 	sg_init_table(bam_txn->cmd_sgl, nandc->max_cwperpage *
+diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
+index e79c79775eb8..4d9b736ff8b7 100644
+--- a/include/linux/mtd/nand-qpic-common.h
++++ b/include/linux/mtd/nand-qpic-common.h
+@@ -254,14 +254,17 @@ struct bam_transaction {
+ 	struct dma_async_tx_descriptor *last_data_desc;
+ 	struct dma_async_tx_descriptor *last_cmd_desc;
+ 	struct completion txn_done;
+-	u32 bam_ce_pos;
+-	u32 bam_ce_start;
+-	u32 cmd_sgl_pos;
+-	u32 cmd_sgl_start;
+-	u32 tx_sgl_pos;
+-	u32 tx_sgl_start;
+-	u32 rx_sgl_pos;
+-	u32 rx_sgl_start;
++	struct_group(bam_positions,
++		u32 bam_ce_pos;
++		u32 bam_ce_start;
++		u32 cmd_sgl_pos;
++		u32 cmd_sgl_start;
++		u32 tx_sgl_pos;
++		u32 tx_sgl_start;
++		u32 rx_sgl_pos;
++		u32 rx_sgl_start;
++
++	);
+ };
+ 
+ /*
+-- 
+2.47.1
+
diff --git a/target/linux/qualcommbe/patches-6.6/104-02-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch b/target/linux/qualcommbe/patches-6.6/018-v6.14-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch
similarity index 92%
rename from target/linux/qualcommbe/patches-6.6/104-02-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch
rename to target/linux/qualcommbe/patches-6.6/018-v6.14-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch
index 8d356500ec..fedd582897 100644
--- a/target/linux/qualcommbe/patches-6.6/104-02-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch
+++ b/target/linux/qualcommbe/patches-6.6/018-v6.14-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch
@@ -1,8 +1,7 @@
-From f9ecde8dc380769d1477f01416d2e3a65c4fd881 Mon Sep 17 00:00:00 2001
+From f81715a4c87c3b75ca2640bb61b6c66506061a64 Mon Sep 17 00:00:00 2001
 From: Luo Jie <quic_luoj at quicinc.com>
-Date: Thu, 7 Nov 2024 17:50:23 +0800
-Subject: [PATCH 2/5] clk: qcom: Add CMN PLL clock controller driver for IPQ
- SoC
+Date: Fri, 3 Jan 2025 15:31:35 +0800
+Subject: [PATCH] clk: qcom: Add CMN PLL clock controller driver for IPQ SoC
 
 The CMN PLL clock controller supplies clocks to the hardware
 blocks that together make up the Ethernet function on Qualcomm
@@ -23,18 +22,21 @@ clock as XO and a 32 KHZ sleep clock to GCC, and one 31.25
 MHZ clock to PCS.
 
 Signed-off-by: Luo Jie <quic_luoj at quicinc.com>
+Acked-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-2-c89fb4d4849d at quicinc.com
+Signed-off-by: Bjorn Andersson <andersson at kernel.org>
 ---
  drivers/clk/qcom/Kconfig       |   9 +
  drivers/clk/qcom/Makefile      |   1 +
- drivers/clk/qcom/ipq-cmn-pll.c | 436 +++++++++++++++++++++++++++++++++
- 3 files changed, 446 insertions(+)
+ drivers/clk/qcom/ipq-cmn-pll.c | 435 +++++++++++++++++++++++++++++++++
+ 3 files changed, 445 insertions(+)
  create mode 100644 drivers/clk/qcom/ipq-cmn-pll.c
 
 diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
-index b9a5cc9fd8c8..3cc7156f881d 100644
+index 42c257e4c433..2daff198aeb3 100644
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
-@@ -190,6 +190,15 @@ config IPQ_APSS_6018
+@@ -199,6 +199,15 @@ config IPQ_APSS_6018
  	  Say Y if you want to support CPU frequency scaling on
  	  ipq based devices.
  
@@ -51,10 +53,10 @@ index b9a5cc9fd8c8..3cc7156f881d 100644
  	tristate "IPQ4019 Global Clock Controller"
  	help
 diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
-index 65b825a54c45..d12ed80a3021 100644
+index 1b749da9c13a..6665049cb8c8 100644
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -29,6 +29,7 @@ obj-$(CONFIG_CLK_X1E80100_TCSRCC) += tcsrcc-x1e80100.o
+@@ -30,6 +30,7 @@ obj-$(CONFIG_CLK_X1P42100_GPUCC) += gpucc-x1p42100.o
  obj-$(CONFIG_CLK_QCM2290_GPUCC) += gpucc-qcm2290.o
  obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
  obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
@@ -64,10 +66,10 @@ index 65b825a54c45..d12ed80a3021 100644
  obj-$(CONFIG_IPQ_GCC_5332) += gcc-ipq5332.o
 diff --git a/drivers/clk/qcom/ipq-cmn-pll.c b/drivers/clk/qcom/ipq-cmn-pll.c
 new file mode 100644
-index 000000000000..1da8a4a9a8d5
+index 000000000000..432d4c4b7aa6
 --- /dev/null
 +++ b/drivers/clk/qcom/ipq-cmn-pll.c
-@@ -0,0 +1,436 @@
+@@ -0,0 +1,435 @@
 +// SPDX-License-Identifier: GPL-2.0-only
 +/*
 + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
@@ -296,9 +298,8 @@ index 000000000000..1da8a4a9a8d5
 +	}
 +
 +	/* Enable PLL locked detect. */
-+	ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_CTRL,
-+				 CMN_PLL_CTRL_LOCK_DETECT_EN,
-+				 CMN_PLL_CTRL_LOCK_DETECT_EN);
++	ret = regmap_set_bits(cmn_pll->regmap, CMN_PLL_CTRL,
++			      CMN_PLL_CTRL_LOCK_DETECT_EN);
 +	if (ret)
 +		return ret;
 +
@@ -306,14 +307,14 @@ index 000000000000..1da8a4a9a8d5
 +	 * Reset the CMN PLL block to ensure the updated configurations
 +	 * take effect.
 +	 */
-+	ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET,
-+				 CMN_ANA_EN_SW_RSTN, 0);
++	ret = regmap_clear_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET,
++				CMN_ANA_EN_SW_RSTN);
 +	if (ret)
 +		return ret;
 +
 +	usleep_range(1000, 1200);
-+	ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET,
-+				 CMN_ANA_EN_SW_RSTN, CMN_ANA_EN_SW_RSTN);
++	ret = regmap_set_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET,
++			      CMN_ANA_EN_SW_RSTN);
 +	if (ret)
 +		return ret;
 +
@@ -441,7 +442,7 @@ index 000000000000..1da8a4a9a8d5
 +		return ret;
 +
 +	/*
-+	 * To access the CMN PLL registers, the GCC AHB & SYSY clocks
++	 * To access the CMN PLL registers, the GCC AHB & SYS clocks
 +	 * of CMN PLL block need to be enabled.
 +	 */
 +	ret = pm_clk_add(dev, "ahb");
@@ -505,5 +506,5 @@ index 000000000000..1da8a4a9a8d5
 +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. IPQ CMN PLL Driver");
 +MODULE_LICENSE("GPL");
 -- 
-2.45.2
+2.47.1
 
diff --git a/target/linux/qualcommbe/patches-6.6/104-01-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch b/target/linux/qualcommbe/patches-6.6/019-01-v6.14-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch
similarity index 89%
rename from target/linux/qualcommbe/patches-6.6/104-01-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch
rename to target/linux/qualcommbe/patches-6.6/019-01-v6.14-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch
index 124a008a46..8d0d19945a 100644
--- a/target/linux/qualcommbe/patches-6.6/104-01-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch
+++ b/target/linux/qualcommbe/patches-6.6/019-01-v6.14-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch
@@ -1,7 +1,7 @@
-From be826ce36477e94539f5d2dfe292126dbb39b3a4 Mon Sep 17 00:00:00 2001
+From c0f1cbf795095c21b92a46fa1dc47a7b787ce538 Mon Sep 17 00:00:00 2001
 From: Luo Jie <quic_luoj at quicinc.com>
-Date: Thu, 7 Nov 2024 17:50:22 +0800
-Subject: [PATCH 1/5] dt-bindings: clock: qcom: Add CMN PLL clock controller
+Date: Fri, 3 Jan 2025 15:31:34 +0800
+Subject: [PATCH 1/3] dt-bindings: clock: qcom: Add CMN PLL clock controller
  for IPQ SoC
 
 The CMN PLL controller provides clocks to networking hardware blocks
@@ -14,21 +14,23 @@ connected switch or PHY device. The CMN PLL block also outputs fixed
 rate clocks to GCC, such as 24 MHZ as XO clock and 32 KHZ as sleep
 clock supplied to GCC.
 
-Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
 Signed-off-by: Luo Jie <quic_luoj at quicinc.com>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-1-c89fb4d4849d at quicinc.com
+Signed-off-by: Bjorn Andersson <andersson at kernel.org>
 ---
- .../bindings/clock/qcom,ipq9574-cmn-pll.yaml  | 85 +++++++++++++++++++
- include/dt-bindings/clock/qcom,ipq-cmn-pll.h  | 22 +++++
- 2 files changed, 107 insertions(+)
+ .../bindings/clock/qcom,ipq9574-cmn-pll.yaml  | 77 +++++++++++++++++++
+ include/dt-bindings/clock/qcom,ipq-cmn-pll.h  | 22 ++++++
+ 2 files changed, 99 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
  create mode 100644 include/dt-bindings/clock/qcom,ipq-cmn-pll.h
 
 diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
 new file mode 100644
-index 000000000000..db8a3ee56067
+index 000000000000..f869b3739be8
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
-@@ -0,0 +1,85 @@
+@@ -0,0 +1,77 @@
 +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
 +%YAML 1.2
 +---
@@ -80,20 +82,12 @@ index 000000000000..db8a3ee56067
 +  "#clock-cells":
 +    const: 1
 +
-+  assigned-clocks:
-+    maxItems: 1
-+
-+  assigned-clock-rates-u64:
-+    maxItems: 1
-+
 +required:
 +  - compatible
 +  - reg
 +  - clocks
 +  - clock-names
 +  - "#clock-cells"
-+  - assigned-clocks
-+  - assigned-clock-rates-u64
 +
 +additionalProperties: false
 +
@@ -143,5 +137,5 @@ index 000000000000..936e92b3b62c
 +#define ETH_25MHZ_CLK			9
 +#endif
 -- 
-2.45.2
+2.47.1
 
diff --git a/target/linux/qualcommbe/patches-6.6/104-04-arm64-dts-qcom-Add-CMN-PLL-node-for-IPQ9574-SoC.patch b/target/linux/qualcommbe/patches-6.6/019-02-v6.14-arm64-dts-qcom-ipq9574-Add-CMN-PLL-node.patch
similarity index 79%
rename from target/linux/qualcommbe/patches-6.6/104-04-arm64-dts-qcom-Add-CMN-PLL-node-for-IPQ9574-SoC.patch
rename to target/linux/qualcommbe/patches-6.6/019-02-v6.14-arm64-dts-qcom-ipq9574-Add-CMN-PLL-node.patch
index 1bf406315f..84f28cf83d 100644
--- a/target/linux/qualcommbe/patches-6.6/104-04-arm64-dts-qcom-Add-CMN-PLL-node-for-IPQ9574-SoC.patch
+++ b/target/linux/qualcommbe/patches-6.6/019-02-v6.14-arm64-dts-qcom-ipq9574-Add-CMN-PLL-node.patch
@@ -1,7 +1,7 @@
-From ed97b7b7c657baf9c9d8e9dfebd9f7703c870593 Mon Sep 17 00:00:00 2001
+From 758aa2d7e3c0acfe9c952a1cbe6416ec6130c2a1 Mon Sep 17 00:00:00 2001
 From: Luo Jie <quic_luoj at quicinc.com>
-Date: Thu, 7 Nov 2024 17:50:25 +0800
-Subject: [PATCH 4/5] arm64: dts: qcom: Add CMN PLL node for IPQ9574 SoC
+Date: Fri, 3 Jan 2025 15:31:37 +0800
+Subject: [PATCH 2/3] arm64: dts: qcom: ipq9574: Add CMN PLL node
 
 The CMN PLL clock controller allows selection of an input clock rate
 from a defined set of input clock rates. It in-turn supplies fixed
@@ -20,13 +20,16 @@ automatically configured by hardware (1 for 48 MHZ, 2 for 96 MHZ), to
 ensure output clock to CMN PLL is 48 MHZ.
 
 Signed-off-by: Luo Jie <quic_luoj at quicinc.com>
+Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-4-c89fb4d4849d at quicinc.com
+Signed-off-by: Bjorn Andersson <andersson at kernel.org>
 ---
- .../boot/dts/qcom/ipq9574-rdp-common.dtsi     | 16 +++++++++++-
+ .../boot/dts/qcom/ipq9574-rdp-common.dtsi     | 17 +++++++++++-
  arch/arm64/boot/dts/qcom/ipq9574.dtsi         | 26 ++++++++++++++++++-
- 2 files changed, 40 insertions(+), 2 deletions(-)
+ 2 files changed, 41 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
-index 91e104b0f865..78f6a2e053d5 100644
+index 91e104b0f865..bb1ff79360d3 100644
 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
 @@ -3,7 +3,7 @@
@@ -38,14 +41,15 @@ index 91e104b0f865..78f6a2e053d5 100644
   */
  
  /dts-v1/;
-@@ -164,6 +164,20 @@ &usb3 {
+@@ -164,6 +164,21 @@ &usb3 {
  	status = "okay";
  };
  
 +/*
-+ * The bootstrap pins for the board select the XO clock frequency,
-+ * which automatically enables the right dividers to ensure the
-+ * reference clock output from WiFi is 48 MHZ.
++ * The bootstrap pins for the board select the XO clock frequency
++ * (48 MHZ or 96 MHZ used for different RDP type board). This setting
++ * automatically enables the right dividers, to ensure the reference
++ * clock output from WiFi to the CMN PLL is 48 MHZ.
 + */
 +&ref_48mhz_clk {
 +	clock-div = <1>;
@@ -60,7 +64,7 @@ index 91e104b0f865..78f6a2e053d5 100644
 +	clock-frequency = <48000000>;
 +};
 diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-index c113fff22f73..dc4965abff58 100644
+index 00ee3290c181..c543c3492e93 100644
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 @@ -3,10 +3,11 @@
@@ -76,7 +80,7 @@ index c113fff22f73..dc4965abff58 100644
  #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
  #include <dt-bindings/interconnect/qcom,ipq9574.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
-@@ -21,6 +22,12 @@ / {
+@@ -19,6 +20,12 @@ / {
  	#size-cells = <2>;
  
  	clocks {
@@ -89,7 +93,7 @@ index c113fff22f73..dc4965abff58 100644
  		sleep_clk: sleep-clk {
  			compatible = "fixed-clock";
  			#clock-cells = <0>;
-@@ -30,6 +37,11 @@ xo_board_clk: xo-board-clk {
+@@ -28,6 +35,11 @@ xo_board_clk: xo-board-clk {
  			compatible = "fixed-clock";
  			#clock-cells = <0>;
  		};
@@ -101,7 +105,7 @@ index c113fff22f73..dc4965abff58 100644
  	};
  
  	cpus {
-@@ -245,6 +257,18 @@ mdio: mdio at 90000 {
+@@ -335,6 +347,18 @@ pcie1_phy: phy at fc000 {
  			status = "disabled";
  		};
  
@@ -121,5 +125,5 @@ index c113fff22f73..dc4965abff58 100644
  			compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";
  			reg = <0x000a4000 0x5a1>;
 -- 
-2.45.2
+2.47.1
 
diff --git a/target/linux/qualcommbe/patches-6.6/104-05-arm64-dts-qcom-Update-IPQ9574-xo_board_clk-to-use-fi.patch b/target/linux/qualcommbe/patches-6.6/019-03-v6.14-arm64-dts-qcom-ipq9574-Update-xo_board_clk-to-use-fi.patch
similarity index 70%
rename from target/linux/qualcommbe/patches-6.6/104-05-arm64-dts-qcom-Update-IPQ9574-xo_board_clk-to-use-fi.patch
rename to target/linux/qualcommbe/patches-6.6/019-03-v6.14-arm64-dts-qcom-ipq9574-Update-xo_board_clk-to-use-fi.patch
index 5fbd85c1e7..0654895165 100644
--- a/target/linux/qualcommbe/patches-6.6/104-05-arm64-dts-qcom-Update-IPQ9574-xo_board_clk-to-use-fi.patch
+++ b/target/linux/qualcommbe/patches-6.6/019-03-v6.14-arm64-dts-qcom-ipq9574-Update-xo_board_clk-to-use-fi.patch
@@ -1,24 +1,27 @@
-From dcb1e63fbc695c3971d7207238a78f66355a2f9a Mon Sep 17 00:00:00 2001
+From 050b312654523aac9495eae3cf7bfa868fd981ce Mon Sep 17 00:00:00 2001
 From: Luo Jie <quic_luoj at quicinc.com>
-Date: Thu, 7 Nov 2024 17:50:26 +0800
-Subject: [PATCH 5/5] arm64: dts: qcom: Update IPQ9574 xo_board_clk to use
+Date: Fri, 3 Jan 2025 15:31:38 +0800
+Subject: [PATCH 3/3] arm64: dts: qcom: ipq9574: Update xo_board_clk to use
  fixed factor clock
 
 xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock
 48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog
 block routing channel.
 
+Reviewed-by: Konrad Dybcio <konrad.dybcio at oss.qualcomm.com>
 Signed-off-by: Luo Jie <quic_luoj at quicinc.com>
+Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-5-c89fb4d4849d at quicinc.com
+Signed-off-by: Bjorn Andersson <andersson at kernel.org>
 ---
  arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 7 ++++++-
  arch/arm64/boot/dts/qcom/ipq9574.dtsi            | 3 ++-
  2 files changed, 8 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
-index 78f6a2e053d5..9a8692377176 100644
+index bb1ff79360d3..ae12f069f26f 100644
 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
-@@ -174,8 +174,13 @@ &ref_48mhz_clk {
+@@ -175,8 +175,13 @@ &ref_48mhz_clk {
  	clock-mult = <1>;
  };
  
@@ -34,10 +37,10 @@ index 78f6a2e053d5..9a8692377176 100644
  
  &xo_clk {
 diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-index dc4965abff58..376b75976524 100644
+index c543c3492e93..3e93484e7e32 100644
 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
-@@ -34,7 +34,8 @@ sleep_clk: sleep-clk {
+@@ -32,7 +32,8 @@ sleep_clk: sleep-clk {
  		};
  
  		xo_board_clk: xo-board-clk {
@@ -48,5 +51,5 @@ index dc4965abff58..376b75976524 100644
  		};
  
 -- 
-2.45.2
+2.47.1
 
diff --git a/target/linux/qualcommbe/patches-6.6/100-06-spi-spi-qpic-add-driver-for-QCOM-SPI-NAND-flash-Inte.patch b/target/linux/qualcommbe/patches-6.6/100-06-spi-spi-qpic-add-driver-for-QCOM-SPI-NAND-flash-Inte.patch
index 72145dbe46..d5babb1fea 100644
--- a/target/linux/qualcommbe/patches-6.6/100-06-spi-spi-qpic-add-driver-for-QCOM-SPI-NAND-flash-Inte.patch
+++ b/target/linux/qualcommbe/patches-6.6/100-06-spi-spi-qpic-add-driver-for-QCOM-SPI-NAND-flash-Inte.patch
@@ -1,8 +1,18 @@
-From dc12953941ed3b8bc9eb8d47f8c7e74f54b47049 Mon Sep 17 00:00:00 2001
 From: Md Sadre Alam <quic_mdalam at quicinc.com>
-Date: Mon, 19 Aug 2024 11:05:18 +0530
-Subject: [PATCH v10 6/8] spi: spi-qpic: add driver for QCOM SPI NAND flash
- Interface
+To: <broonie at kernel.org>, <robh at kernel.org>, <krzk+dt at kernel.org>,
+	<conor+dt at kernel.org>, <andersson at kernel.org>,
+	<konradybcio at kernel.org>, <miquel.raynal at bootlin.com>,
+	<richard at nod.at>, <vigneshr at ti.com>,
+	<manivannan.sadhasivam at linaro.org>,
+	<linux-arm-msm at vger.kernel.org>, <linux-spi at vger.kernel.org>,
+	<devicetree at vger.kernel.org>, <linux-kernel at vger.kernel.org>,
+	<linux-mtd at lists.infradead.org>
+Cc: <quic_srichara at quicinc.com>, <quic_varada at quicinc.com>,
+	<quic_mdalam at quicinc.com>
+Subject: [PATCH v14 6/8] spi: spi-qpic: add driver for QCOM SPI NAND flash Interface
+Date: Wed, 20 Nov 2024 14:45:04 +0530	[thread overview]
+Message-ID: <20241120091507.1404368-7-quic_mdalam at quicinc.com> (raw)
+In-Reply-To: <20241120091507.1404368-1-quic_mdalam at quicinc.com>
 
 This driver implements support for the SPI-NAND mode of QCOM NAND Flash
 Interface as a SPI-MEM controller with pipelined ECC capability.
@@ -14,6 +24,31 @@ Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
 Signed-off-by: Md Sadre Alam <quic_mdalam at quicinc.com>
 ---
 
+Change in [v14]
+
+* No Change 
+
+Change in [v13]
+
+* Changed return type of qcom_spi_cmd_mapping() from u32 to
+  int to fix the kernel test bot warning
+* Changed type of variable cmd in qcom_spi_write_page() from u32
+  to int
+* Removed unused variable s_op from qcom_spi_write_page()
+* Updated return value variable type from u32 to int in
+  qcom_spi_send_cmdaddr() 
+
+Change in [v12]
+
+* Added obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o in Makefile
+  to build qpic_common.c based on CONFIG_SPI_QPIC_SNAND
+
+Change in [v11]
+
+* Fixed build error reported by kernel test bot
+* Changed "depends on MTD" to "select MTD" in
+  drivers/spi/Kconfig file
+
 Change in [v10]
 
 * Fixed compilation warnings reported by kernel test robot.
@@ -166,39 +201,42 @@ Change in [v1]
 
 * Added RFC patch for design review
 
- drivers/mtd/nand/Makefile            |    5 +-
+ drivers/mtd/nand/Makefile            |    4 +
  drivers/spi/Kconfig                  |    9 +
  drivers/spi/Makefile                 |    1 +
- drivers/spi/spi-qpic-snand.c         | 1634 ++++++++++++++++++++++++++
+ drivers/spi/spi-qpic-snand.c         | 1633 ++++++++++++++++++++++++++
  include/linux/mtd/nand-qpic-common.h |    7 +
- 5 files changed, 1655 insertions(+), 1 deletion(-)
+ 5 files changed, 1654 insertions(+)
  create mode 100644 drivers/spi/spi-qpic-snand.c
 
+diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
+index da1586a36574..db516a45f0c5 100644
 --- a/drivers/mtd/nand/Makefile
 +++ b/drivers/mtd/nand/Makefile
-@@ -7,8 +7,11 @@ obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bm
- 
- ifeq ($(CONFIG_MTD_NAND_QCOM),y)
- obj-y	+= qpic_common.o
-+else
+@@ -3,7 +3,11 @@
+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
+ obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
+ obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
 +ifeq ($(CONFIG_SPI_QPIC_SNAND),y)
-+obj-y   += qpic_common.o
++obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o
++else
+ obj-$(CONFIG_MTD_NAND_QCOM) += qpic_common.o
 +endif
- endif
--
  obj-y	+= onenand/
  obj-y	+= raw/
  obj-y	+= spi/
+diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
+index f51f9466e518..1aaf93964429 100644
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -870,6 +870,15 @@ config SPI_QCOM_QSPI
+@@ -920,6 +920,15 @@ config SPI_QCOM_QSPI
  	help
  	  QSPI(Quad SPI) driver for Qualcomm QSPI controller.
  
 +config SPI_QPIC_SNAND
 +	bool "QPIC SNAND controller"
 +	depends on ARCH_QCOM || COMPILE_TEST
-+	depends on MTD
++	select MTD
 +	help
 +	  QPIC_SNAND (QPIC SPI NAND) driver for Qualcomm QPIC controller.
 +	  QPIC controller supports both parallel nand and serial nand.
@@ -207,9 +245,11 @@ Change in [v1]
  config SPI_QUP
  	tristate "Qualcomm SPI controller with QUP interface"
  	depends on ARCH_QCOM || COMPILE_TEST
+diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
+index aea5e54de195..3309b7bb2445 100644
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
-@@ -110,6 +110,7 @@ obj-$(CONFIG_SPI_PXA2XX)		+= spi-pxa2xx-
+@@ -115,6 +115,7 @@ obj-$(CONFIG_SPI_PXA2XX)		+= spi-pxa2xx-platform.o
  obj-$(CONFIG_SPI_PXA2XX_PCI)		+= spi-pxa2xx-pci.o
  obj-$(CONFIG_SPI_QCOM_GENI)		+= spi-geni-qcom.o
  obj-$(CONFIG_SPI_QCOM_QSPI)		+= spi-qcom-qspi.o
@@ -217,9 +257,12 @@ Change in [v1]
  obj-$(CONFIG_SPI_QUP)			+= spi-qup.o
  obj-$(CONFIG_SPI_ROCKCHIP)		+= spi-rockchip.o
  obj-$(CONFIG_SPI_ROCKCHIP_SFC)		+= spi-rockchip-sfc.o
+diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
+new file mode 100644
+index 000000000000..1ba562a9369e
 --- /dev/null
 +++ b/drivers/spi/spi-qpic-snand.c
-@@ -0,0 +1,1634 @@
+@@ -0,0 +1,1633 @@
 +/*
 + * SPDX-License-Identifier: GPL-2.0
 + *
@@ -1422,9 +1465,9 @@ Change in [v1]
 +	return 0;
 +}
 +
-+static u32 qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode)
++static int qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode)
 +{
-+	u32 cmd = 0x0;
++	int cmd = 0x0;
 +
 +	switch (opcode) {
 +	case SPINAND_RESET:
@@ -1475,15 +1518,12 @@ Change in [v1]
 +static int qcom_spi_write_page(struct qcom_nand_controller *snandc,
 +			       const struct spi_mem_op *op)
 +{
-+	struct qpic_snand_op s_op = {};
-+	u32 cmd;
++	int cmd;
 +
 +	cmd = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
 +	if (cmd < 0)
 +		return cmd;
 +
-+	s_op.cmd_reg = cmd;
-+
 +	if (op->cmd.opcode == SPINAND_PROGRAM_LOAD)
 +		snandc->qspi->data_buf = (u8 *)op->data.buf.out;
 +
@@ -1497,9 +1537,11 @@ Change in [v1]
 +	u32 cmd;
 +	int ret, opcode;
 +
-+	cmd = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
-+	if (cmd < 0)
-+		return cmd;
++	ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
++	if (ret < 0)
++		return ret;
++
++	cmd = ret;
 +
 +	s_op.cmd_reg = cmd;
 +	s_op.addr1_reg = op->addr.val;
@@ -1833,7 +1875,7 @@ Change in [v1]
 +
 +static const struct of_device_id qcom_snandc_of_match[] = {
 +	{
-+		.compatible = "qcom,spi-qpic-snand",
++		.compatible = "qcom,ipq9574-snand",
 +		.data = &ipq9574_snandc_props,
 +	},
 +	{}
@@ -1854,6 +1896,8 @@ Change in [v1]
 +MODULE_AUTHOR("Md Sadre Alam <quic_mdalam at quicinc.com>");
 +MODULE_LICENSE("GPL");
 +
+diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
+index e79c79775eb8..7dba89654d6c 100644
 --- a/include/linux/mtd/nand-qpic-common.h
 +++ b/include/linux/mtd/nand-qpic-common.h
 @@ -322,6 +322,10 @@ struct nandc_regs {
@@ -1891,3 +1935,5 @@ Change in [v1]
  	struct list_head host_list;
  
  	union {
+-- 
+2.34.1
diff --git a/target/linux/qualcommbe/patches-6.6/105-01-clk-qcom-clk-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-supp.patch b/target/linux/qualcommbe/patches-6.6/105-01-clk-qcom-clk-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-supp.patch
deleted file mode 100644
index 80ba02b6be..0000000000
--- a/target/linux/qualcommbe/patches-6.6/105-01-clk-qcom-clk-alpha-pll-Add-NSS-HUAYRA-ALPHA-PLL-supp.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 4305650c92eef5921cc140c999eccbb6de1ab4b8 Mon Sep 17 00:00:00 2001
-From: Devi Priya <quic_devipriy at quicinc.com>
-Date: Fri, 25 Oct 2024 09:25:14 +0530
-Subject: [PATCH 1/7] clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL
- support for ipq9574
-
-Add support for NSS Huayra alpha pll found on ipq9574 SoCs.
-Programming sequence is the same as that of Huayra type Alpha PLL,
-so we can re-use the same.
-
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
-Signed-off-by: Devi Priya <quic_devipriy at quicinc.com>
-Signed-off-by: Manikanta Mylavarapu <quic_mmanikan at quicinc.com>
----
- drivers/clk/qcom/clk-alpha-pll.c | 11 +++++++++++
- drivers/clk/qcom/clk-alpha-pll.h |  1 +
- 2 files changed, 12 insertions(+)
-
-diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
-index f9105443d7db..c2e56e9403ff 100644
---- a/drivers/clk/qcom/clk-alpha-pll.c
-+++ b/drivers/clk/qcom/clk-alpha-pll.c
-@@ -267,6 +267,17 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
- 		[PLL_OFF_OPMODE] = 0x30,
- 		[PLL_OFF_STATUS] = 0x3c,
- 	},
-+	[CLK_ALPHA_PLL_TYPE_NSS_HUAYRA] =  {
-+		[PLL_OFF_L_VAL] = 0x04,
-+		[PLL_OFF_ALPHA_VAL] = 0x08,
-+		[PLL_OFF_TEST_CTL] = 0x0c,
-+		[PLL_OFF_TEST_CTL_U] = 0x10,
-+		[PLL_OFF_USER_CTL] = 0x14,
-+		[PLL_OFF_CONFIG_CTL] = 0x18,
-+		[PLL_OFF_CONFIG_CTL_U] = 0x1c,
-+		[PLL_OFF_STATUS] = 0x20,
-+	},
-+
- };
- EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
- 
-diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
-index 55eca04b23a1..c6d1b8429f95 100644
---- a/drivers/clk/qcom/clk-alpha-pll.h
-+++ b/drivers/clk/qcom/clk-alpha-pll.h
-@@ -32,6 +32,7 @@ enum {
- 	CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
- 	CLK_ALPHA_PLL_TYPE_STROMER,
- 	CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
-+	CLK_ALPHA_PLL_TYPE_NSS_HUAYRA,
- 	CLK_ALPHA_PLL_TYPE_MAX,
- };
- 
--- 
-2.45.2
-
diff --git a/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch b/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch
index 21e53b3ed2..c8917fa34e 100644
--- a/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch
+++ b/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch
@@ -106,7 +106,7 @@ index 9a8692377176..13b623603d37 100644
 +			partition at 4d0000 {
 +				label = "0:rpm";
 +				reg = <0x4d0000 0x20000>;
-+				read-only;
++				// read-only;
 +			};
 +
 +			partition at 4f0000 {



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:32 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:32 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Add patch adding partition
 table common to RDP
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46115.1737836679.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/38843668e6d1a9bd45e8d2a20904553059ae39f3

commit 38843668e6d1a9bd45e8d2a20904553059ae39f3
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Dec 9 18:24:50 2024 +0100

    qualcommbe: ipq95xx: Add patch adding partition table common to RDP
    
    Add patches adding partition table common to RDP board and node for AQR
    NVMEM.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...com-add-partition-table-for-ipq9574-rdp-c.patch | 177 +++++++++++++++++++++
 ...d-AQR-NVMEM-node-for-IPQ9574-RDP433-board.patch |  38 +++++
 2 files changed, 215 insertions(+)

diff --git a/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch b/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch
new file mode 100644
index 0000000000..21e53b3ed2
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/303-arm64-dts-qcom-add-partition-table-for-ipq9574-rdp-c.patch
@@ -0,0 +1,177 @@
+From d9982d245fc7f1b7d65d74cd08d53eccdcbd5cf2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Mon, 9 Dec 2024 17:50:31 +0100
+Subject: [PATCH 1/2] arm64: dts: qcom: add partition table for ipq9574 rdp
+ common
+
+Add partition table for ipq9574 SoC common to every RDB board.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ .../boot/dts/qcom/ipq9574-rdp-common.dtsi     | 146 +++++++++++++++++-
+ 1 file changed, 145 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+index 9a8692377176..13b623603d37 100644
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+@@ -74,11 +74,155 @@ &blsp1_spi0 {
+ 	status = "okay";
+ 
+ 	flash at 0 {
+-		compatible = "micron,n25q128a11", "jedec,spi-nor";
++		compatible = "jedec,spi-nor";
+ 		reg = <0>;
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+ 		spi-max-frequency = <50000000>;
++
++		partitions {
++			compatible = "fixed-partitions";
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			partition at 0 {
++				label = "0:sbl1";
++				reg = <0x0 0xc0000>;
++				read-only;
++			};
++
++			partition at c0000 {
++				label = "0:mibib";
++				reg = <0xc0000 0x10000>;
++				read-only;
++			};
++
++			partition at d0000 {
++				label = "0:bootconfig";
++				reg = <0xd0000 0x20000>;
++				read-only;
++			};
++
++			partition at f0000 {
++				label = "0:bootconfig1";
++				reg = <0xf0000 0x20000>;
++				read-only;
++			};
++
++			partition at 110000 {
++				label = "0:qsee";
++				reg = <0x110000 0x180000>;
++				read-only;
++			};
++
++			partition at 290000 {
++				label = "0:qsee_1";
++				reg = <0x290000 0x180000>;
++				read-only;
++			};
++
++			partition at 410000 {
++				label = "0:devcfg";
++				reg = <0x410000 0x10000>;
++				read-only;
++			};
++
++			partition at 420000 {
++				label = "0:devcfg_1";
++				reg = <0x420000 0x10000>;
++				read-only;
++			};
++
++			partition at 430000 {
++				label = "0:apdp";
++				reg = <0x430000 0x10000>;
++				read-only;
++			};
++
++			partition at 440000 {
++				label = "0:apdp_1";
++				reg = <0x440000 0x10000>;
++				read-only;
++			};
++
++			partition at 450000 {
++				label = "0:tme";
++				reg = <0x450000 0x40000>;
++				read-only;
++			};
++
++			partition at 490000 {
++				label = "0:tme_1";
++				reg = <0x490000 0x40000>;
++				read-only;
++			};
++
++			partition at 4d0000 {
++				label = "0:rpm";
++				reg = <0x4d0000 0x20000>;
++				read-only;
++			};
++
++			partition at 4f0000 {
++				label = "0:rpm_1";
++				reg = <0x4f0000 0x20000>;
++				read-only;
++			};
++
++			partition at 510000 {
++				label = "0:cdt";
++				reg = <0x510000 0x10000>;
++				read-only;
++			};
++
++			partition at 520000 {
++				label = "0:cdt_1";
++				reg = <0x520000 0x10000>;
++				read-only;
++			};
++
++			partition at 530000 {
++				compatible = "u-boot,env";
++				label = "0:appsblenv";
++				reg = <0x530000 0x10000>;
++
++				macaddr_lan: ethaddr {
++					#nvmem-cell-cells = <1>;
++				};
++			};
++
++			partition at 540000 {
++				label = "0:appsbl";
++				reg = <0x540000 0xa0000>;
++				read-only;
++			};
++
++			partition at 5e0000 {
++				label = "0:appsbl_1";
++				reg = <0x5e0000 0xa0000>;
++				read-only;
++			};
++
++			partition at 680000 {
++				label = "0:art";
++				reg = <0x680000 0x100000>;
++				read-only;
++			};
++
++			partition at 780000 {
++				label = "0:ethphyfw";
++				reg = <0x780000 0x80000>;
++				read-only;
++
++				nvmem-layout {
++					compatible = "fixed-layout";
++
++					aqr_fw: aqr-fw at 0 {
++						reg = <0x0 0x5fc02>;
++					};
++				};
++			};
++		};
+ 	};
+ };
+ 
+-- 
+2.45.2
+
diff --git a/target/linux/qualcommbe/patches-6.6/304-dts-qcom-add-AQR-NVMEM-node-for-IPQ9574-RDP433-board.patch b/target/linux/qualcommbe/patches-6.6/304-dts-qcom-add-AQR-NVMEM-node-for-IPQ9574-RDP433-board.patch
new file mode 100644
index 0000000000..b37a9d3bb7
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/304-dts-qcom-add-AQR-NVMEM-node-for-IPQ9574-RDP433-board.patch
@@ -0,0 +1,38 @@
+From e7afacf09d39d7087a5ea112fefabb6d5d3adf2b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Mon, 9 Dec 2024 18:10:43 +0100
+Subject: [PATCH] dts: qcom: add AQR NVMEM node for IPQ9574 RDP433 board
+
+Add Aquantia NVMEM node for IPQ9574 RDP433 board to load the firmware
+for the Aquantia PHY.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
+index d56abe92c24e..44407ebbe06a 100644
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
+@@ -49,11 +49,17 @@ phy3: ethernet-phy at 13 {
+ 	phy4: ethernet-phy at 8 {
+ 		compatible ="ethernet-phy-ieee802.3-c45";
+ 		reg = <8>;
++
++		nvmem-cells = <&aqr_fw>;
++		nvmem-cell-names = "firmware";
+ 	};
+ 
+ 	phy5: ethernet-phy at 0 {
+ 		compatible ="ethernet-phy-ieee802.3-c45";
+ 		reg = <0>;
++
++		nvmem-cells = <&aqr_fw>;
++		nvmem-cell-names = "firmware";
+ 	};
+ };
+ 
+-- 
+2.45.2
+



From lede-commits at lists.infradead.org  Sat Jan 25 12:24:31 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 15:24:31 -0500
Subject: [openwrt/openwrt]  qualcommbe: ipq95xx: Add patch fixing USB
 regulator
In-Reply-To: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
References: <173783666932.2968831.1272815531154425305@git-01.infra.openwrt.org>
Message-ID: <mailman.46116.1737836679.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/e8824ab0cc8055124b2037d14f036284aa54ece5

commit e8824ab0cc8055124b2037d14f036284aa54ece5
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Dec 9 18:24:01 2024 +0100

    qualcommbe: ipq95xx: Add patch fixing USB regulator
    
    Add patch fixing USB regulator as the LDO needs to use ID 5 instead of
    ID 2.
    
    Link: https://github.com/openwrt/openwrt/pull/17725
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...ulator-qcom_smd-Add-LDO5-MP5496-regulator.patch | 31 ++++++++++++++
 ...com-fix-USB-vdda-pll-supply-for-ipq9574-r.patch | 49 ++++++++++++++++++++++
 2 files changed, 80 insertions(+)

diff --git a/target/linux/qualcommbe/patches-6.6/015-v6.8-regulator-qcom_smd-Add-LDO5-MP5496-regulator.patch b/target/linux/qualcommbe/patches-6.6/015-v6.8-regulator-qcom_smd-Add-LDO5-MP5496-regulator.patch
new file mode 100644
index 0000000000..68f96ce62e
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/015-v6.8-regulator-qcom_smd-Add-LDO5-MP5496-regulator.patch
@@ -0,0 +1,31 @@
+From ad663ce6780477177e301756ade6cf236f36ae4c Mon Sep 17 00:00:00 2001
+From: Varadarajan Narayanan <quic_varada at quicinc.com>
+Date: Thu, 14 Dec 2023 16:10:52 +0530
+Subject: [PATCH] regulator: qcom_smd: Add LDO5 MP5496 regulator
+
+Add support for LDO5 regulator. This is used by IPQ9574 USB.
+
+Signed-off-by: Varadarajan Narayanan <quic_varada at quicinc.com>
+Rule:  <add>
+Link: https://lore.kernel.org/stable/20231214104052.3267039-1-quic_varada%40quicinc.com
+Link: https://msgid.link/r/20231214104052.3267039-1-quic_varada at quicinc.com
+Signed-off-by: Mark Brown <broonie at kernel.org>
+---
+ drivers/regulator/qcom_smd-regulator.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c
+index 09c471a0ba2e..d1be9568025e 100644
+--- a/drivers/regulator/qcom_smd-regulator.c
++++ b/drivers/regulator/qcom_smd-regulator.c
+@@ -796,6 +796,7 @@ static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
+ 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &mp5496_smps, "s1" },
+ 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smps, "s2" },
+ 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
++	{ "l5", QCOM_SMD_RPM_LDOA, 5, &mp5496_ldoa2, "l5" },
+ 	{}
+ };
+ 
+-- 
+2.45.2
+
diff --git a/target/linux/qualcommbe/patches-6.6/106-arm64-dts-qcom-fix-USB-vdda-pll-supply-for-ipq9574-r.patch b/target/linux/qualcommbe/patches-6.6/106-arm64-dts-qcom-fix-USB-vdda-pll-supply-for-ipq9574-r.patch
new file mode 100644
index 0000000000..cd33abda68
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/106-arm64-dts-qcom-fix-USB-vdda-pll-supply-for-ipq9574-r.patch
@@ -0,0 +1,49 @@
+From 2a7892782bf2cb84f204702ef47ae2d97be0d46b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Mon, 9 Dec 2024 18:04:00 +0100
+Subject: [PATCH 2/2] arm64: dts: qcom: fix USB vdda-pll supply for ipq9574 rdp
+ common
+
+Fix USB vdda-pll for IPQ9574 SoC common for every RDP board. The correct
+regulator is the l5 one instead of l2 now supported in the smd regulator
+driver.
+
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+---
+ arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+index 13b623603d37..68b71437c2b9 100644
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+@@ -249,7 +249,7 @@ ipq9574_s1: s1 {
+ 			regulator-max-microvolt = <1075000>;
+ 		};
+ 
+-		mp5496_l2: l2 {
++		mp5496_l5: l5 {
+ 			regulator-min-microvolt = <1800000>;
+ 			regulator-max-microvolt = <1800000>;
+ 			regulator-always-on;
+@@ -290,7 +290,7 @@ &usb_0_dwc3 {
+ };
+ 
+ &usb_0_qmpphy {
+-	vdda-pll-supply = <&mp5496_l2>;
++	vdda-pll-supply = <&mp5496_l5>;
+ 	vdda-phy-supply = <&regulator_fixed_0p925>;
+ 
+ 	status = "okay";
+@@ -298,7 +298,7 @@ &usb_0_qmpphy {
+ 
+ &usb_0_qusbphy {
+ 	vdd-supply = <&regulator_fixed_0p925>;
+-	vdda-pll-supply = <&mp5496_l2>;
++	vdda-pll-supply = <&mp5496_l5>;
+ 	vdda-phy-dpdm-supply = <&regulator_fixed_3p3>;
+ 
+ 	status = "okay";
+-- 
+2.45.2
+



From lede-commits at lists.infradead.org  Sat Jan 25 16:19:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 19:19:08 -0500
Subject: [openwrt/openwrt]  generic: fix probe issues with RealTek RTL8221B
 PHYs
In-Reply-To: <173785074872.3293623.7976848442792812274@git-01.infra.openwrt.org>
References: <173785074872.3293623.7976848442792812274@git-01.infra.openwrt.org>
Message-ID: <mailman.46121.1737850754.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/730db6b893748517949b1d3a0c0cb8b6c1288040

commit 730db6b893748517949b1d3a0c0cb8b6c1288040
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 23 03:36:10 2025 +0000

    generic: fix probe issues with RealTek RTL8221B PHYs
    
    Import patch "net: phy: realtek: mark existing MMDs as present"
    
        When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
        versions of the PHY fail to report the MMDs present on the PHY.
        Mark MMDs PMAPMD, PCS and AN which are always existing according to
        the datasheet as present to fix that.
    
    Fixes: #16823, #17183, #17232
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Tested-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Tested-by: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
---
 ...phy-realtek-mark-existing-MMDs-as-present.patch | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
new file mode 100644
index 0000000000..1ef42e866d
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
@@ -0,0 +1,27 @@
+From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 23 Jan 2025 03:25:29 +0000
+Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
+
+When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
+versions of the PHY fail to report the MMDs present on the PHY.
+Mark MMDs PMAPMD, PCS and AN which are always existing according to
+the datasheet as present to fix that.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
+ 	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+ 			 phydev->supported);
+ 
++	phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
++				        MDIO_DEVS_AN;
++
+ 	return genphy_c45_pma_read_abilities(phydev);
+ }
+ 



From lede-commits at lists.infradead.org  Sat Jan 25 17:13:33 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 25 Jan 2025 20:13:33 -0500
Subject: [openwrt/openwrt]  generic: fix probe issues with RealTek RTL8221B
 PHYs
In-Reply-To: <173785401362.3361353.13645005094492766633@git-01.infra.openwrt.org>
References: <173785401362.3361353.13645005094492766633@git-01.infra.openwrt.org>
Message-ID: <mailman.46124.1737854017.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d30773abe8cc333137a964ffedf878cc425ac9ed

commit d30773abe8cc333137a964ffedf878cc425ac9ed
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 23 03:36:10 2025 +0000

    generic: fix probe issues with RealTek RTL8221B PHYs
    
    Import patch "net: phy: realtek: mark existing MMDs as present"
    
        When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
        versions of the PHY fail to report the MMDs present on the PHY.
        Mark MMDs PMAPMD, PCS and AN which are always existing according to
        the datasheet as present to fix that.
    
    Fixes: #16823, #17183, #17232
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Tested-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
    Tested-by: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
    (cherry picked from commit 730db6b893748517949b1d3a0c0cb8b6c1288040)
---
 ...phy-realtek-mark-existing-MMDs-as-present.patch | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
new file mode 100644
index 0000000000..1ef42e866d
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
@@ -0,0 +1,27 @@
+From 1addfb042a9d27788a0fb2c2935045b56fd8560e Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 23 Jan 2025 03:25:29 +0000
+Subject: [PATCH] net: phy: realtek: mark existing MMDs as present
+
+When using Clause-45 mode to access RealTek RTL8221B 2.5G PHYs some
+versions of the PHY fail to report the MMDs present on the PHY.
+Mark MMDs PMAPMD, PCS and AN which are always existing according to
+the datasheet as present to fix that.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
+ 	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
+ 			 phydev->supported);
+ 
++	phydev->c45_ids.mmds_present |= MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
++				        MDIO_DEVS_AN;
++
+ 	return genphy_c45_pma_read_abilities(phydev);
+ }
+ 



From lede-commits at lists.infradead.org  Sun Jan 26 06:42:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 09:42:47 -0500
Subject: [openwrt/openwrt]  tools/dwarves: update to v1.29
In-Reply-To: <173790256798.98159.4889058088842050629@git-01.infra.openwrt.org>
References: <173790256798.98159.4889058088842050629@git-01.infra.openwrt.org>
Message-ID: <mailman.46164.1737902572.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/22d1e6cd26ca6765429de9baf5c23946291d7e8b

commit 22d1e6cd26ca6765429de9baf5c23946291d7e8b
Author: Tony Ambardar <itugrok at yahoo.com>
AuthorDate: Tue Jan 21 23:00:35 2025 -0800

    tools/dwarves: update to v1.29
    
    Update to include the latest upstream improvements and bugfixes, including
    pahole now always encoding reproducibly.
    
    Drop the local patch:
         100-reproducible-builds.patch
    
    Release Notes: https://lore.kernel.org/bpf/Z4-TDt42dTKZvCo6 at x1/
    Signed-off-by: Tony Ambardar <itugrok at yahoo.com>
    Link: https://github.com/openwrt/openwrt/pull/17705
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 tools/dwarves/Makefile                              |  4 ++--
 tools/dwarves/patches/100-reproducible-builds.patch | 12 ------------
 2 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/tools/dwarves/Makefile b/tools/dwarves/Makefile
index 5346126776..56259b260e 100644
--- a/tools/dwarves/Makefile
+++ b/tools/dwarves/Makefile
@@ -3,12 +3,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=dwarves
-PKG_VERSION:=1.28
+PKG_VERSION:=1.29
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=https://fedorapeople.org/~acme/dwarves/
-PKG_HASH:=826efc0fc9237d3c1e9c01553ea387a8cb46e8dc119ff863889043f4ed54b2ae
+PKG_HASH:=59c597d4e953c714d6f3ff36aeed2ac30cba85c1d7b94d0c87ca91d611d98a56
 
 PKG_MAINTAINER:=Tony Ambardar <itugrok at yahoo.com>
 PKG_LICENSE:=GPL-2.0-only
diff --git a/tools/dwarves/patches/100-reproducible-builds.patch b/tools/dwarves/patches/100-reproducible-builds.patch
deleted file mode 100644
index d8cbd114c6..0000000000
--- a/tools/dwarves/patches/100-reproducible-builds.patch
+++ /dev/null
@@ -1,12 +0,0 @@
---- a/pahole.c
-+++ b/pahole.c
-@@ -3681,6 +3681,9 @@ int main(int argc, char *argv[])
- 		goto out;
- 	}
- 
-+	if (getenv("SOURCE_DATE_EPOCH") || getenv("KBUILD_BUILD_TIMESTAMP"))
-+		conf_load.reproducible_build = true;
-+
- 	if (dwarves__init()) {
- 		fputs("pahole: insufficient memory\n", stderr);
- 		goto out;



From lede-commits at lists.infradead.org  Sun Jan 26 12:20:26 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:20:26 -0500
Subject: [openwrt/openwrt]  unetd: update to Git HEAD (2025-01-26)
In-Reply-To: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
References: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
Message-ID: <mailman.46255.1737922828.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c0f06cb6ac002ce90c10839b3d98aed8b41a2da5

commit c0f06cb6ac002ce90c10839b3d98aed8b41a2da5
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sun Jan 26 21:20:00 2025 +0100

    unetd: update to Git HEAD (2025-01-26)
    
    322500403615 service: add default group @ to match all nodes
    5f7860306200 ubus: rename unetd_ubus_notify to unetd_ubus_network_notify
    d13752814651 enroll: add PEX sub-protocol to support enrolling new nodes into a network
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/network/services/unetd/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/network/services/unetd/Makefile b/package/network/services/unetd/Makefile
index c387521998..a7f030abb6 100644
--- a/package/network/services/unetd/Makefile
+++ b/package/network/services/unetd/Makefile
@@ -10,9 +10,9 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=unetd
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git
-PKG_SOURCE_DATE:=2024-12-17
-PKG_SOURCE_VERSION:=a0a2d80f3459425182a9f0e665d8ca8eff97c82f
-PKG_MIRROR_HASH:=a6f07d91da40152b2af5b5b9d1d67d87a9991943147e47be6921c092ad7b49a3
+PKG_SOURCE_DATE:=2025-01-26
+PKG_SOURCE_VERSION:=d13752814651c70d2afc71383612fafc835b631b
+PKG_MIRROR_HASH:=c9de65ae92af2498fcd9d55f9cd2017cb9ac79b03ed5816da21161aa24f226b9
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>



From lede-commits at lists.infradead.org  Sun Jan 26 12:20:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:20:25 -0500
Subject: [openwrt/openwrt]  netifd: remove leftover wifi reload_legacy call
In-Reply-To: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
References: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
Message-ID: <mailman.46256.1737922828.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a3154cfeb6c381576682a8cc5427a8b1bd9daf96

commit a3154cfeb6c381576682a8cc5427a8b1bd9daf96
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sun Jan 26 21:18:27 2025 +0100

    netifd: remove leftover wifi reload_legacy call
    
    Commit d12753929165 removed support for it
    
    Fixes: #17738
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/network/config/netifd/files/etc/init.d/network | 1 -
 1 file changed, 1 deletion(-)

diff --git a/package/network/config/netifd/files/etc/init.d/network b/package/network/config/netifd/files/etc/init.d/network
index 86340b77e5..b8b2a219b1 100755
--- a/package/network/config/netifd/files/etc/init.d/network
+++ b/package/network/config/netifd/files/etc/init.d/network
@@ -30,7 +30,6 @@ reload_service() {
 
 	init_switch
 	ubus call network reload || rv=1
-	[ -x /sbin/wifi ] && /sbin/wifi reload_legacy
 	return $rv
 }
 



From lede-commits at lists.infradead.org  Sun Jan 26 12:20:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:20:24 -0500
Subject: [openwrt/openwrt]  unetd: fix interface teardown
In-Reply-To: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
References: <173792282427.561617.14294757500514984371@git-01.infra.openwrt.org>
Message-ID: <mailman.46257.1737922833.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/80ba0d958dc96fb7aba26614f71325507fabd58a

commit 80ba0d958dc96fb7aba26614f71325507fabd58a
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sun Jan 26 21:10:53 2025 +0100

    unetd: fix interface teardown
    
    Pass the correct device name in the network_del ubus call
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/network/services/unetd/files/unetd.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/package/network/services/unetd/files/unetd.sh b/package/network/services/unetd/files/unetd.sh
index 2f0f0c478c..2117eab391 100644
--- a/package/network/services/unetd/files/unetd.sh
+++ b/package/network/services/unetd/files/unetd.sh
@@ -82,11 +82,10 @@ proto_unet_setup() {
 
 proto_unet_teardown() {
 	local config="$1"
-	local iface="$2"
 
 	local device
 	json_get_vars device
-	device="${device:-$iface}"
+	device="${device:-$config}"
 
 	json_init
 	json_add_string name "$device"



From lede-commits at lists.infradead.org  Sun Jan 26 12:21:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:21:12 -0500
Subject: [openwrt/openwrt]  netifd: remove leftover wifi reload_legacy call
In-Reply-To: <173792287163.562950.4787889808355981262@git-01.infra.openwrt.org>
References: <173792287163.562950.4787889808355981262@git-01.infra.openwrt.org>
Message-ID: <mailman.46258.1737922875.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/298654b9ab57b953b5c5d72cc69f1c46e0a5dd23

commit 298654b9ab57b953b5c5d72cc69f1c46e0a5dd23
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sun Jan 26 21:18:27 2025 +0100

    netifd: remove leftover wifi reload_legacy call
    
    Commit d12753929165 removed support for it
    
    Fixes: #17738
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit a3154cfeb6c381576682a8cc5427a8b1bd9daf96)
---
 package/network/config/netifd/files/etc/init.d/network | 1 -
 1 file changed, 1 deletion(-)

diff --git a/package/network/config/netifd/files/etc/init.d/network b/package/network/config/netifd/files/etc/init.d/network
index 86340b77e5..b8b2a219b1 100755
--- a/package/network/config/netifd/files/etc/init.d/network
+++ b/package/network/config/netifd/files/etc/init.d/network
@@ -30,7 +30,6 @@ reload_service() {
 
 	init_switch
 	ubus call network reload || rv=1
-	[ -x /sbin/wifi ] && /sbin/wifi reload_legacy
 	return $rv
 }
 



From lede-commits at lists.infradead.org  Sun Jan 26 12:21:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:21:11 -0500
Subject: [openwrt/openwrt]  unetd: fix interface teardown
In-Reply-To: <173792287163.562950.4787889808355981262@git-01.infra.openwrt.org>
References: <173792287163.562950.4787889808355981262@git-01.infra.openwrt.org>
Message-ID: <mailman.46259.1737922875.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a1ee311f59d5bd0838444afed7984d5757c5222b

commit a1ee311f59d5bd0838444afed7984d5757c5222b
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Sun Jan 26 21:10:53 2025 +0100

    unetd: fix interface teardown
    
    Pass the correct device name in the network_del ubus call
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
    (cherry picked from commit 80ba0d958dc96fb7aba26614f71325507fabd58a)
---
 package/network/services/unetd/files/unetd.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/package/network/services/unetd/files/unetd.sh b/package/network/services/unetd/files/unetd.sh
index 2f0f0c478c..2117eab391 100644
--- a/package/network/services/unetd/files/unetd.sh
+++ b/package/network/services/unetd/files/unetd.sh
@@ -82,11 +82,10 @@ proto_unet_setup() {
 
 proto_unet_teardown() {
 	local config="$1"
-	local iface="$2"
 
 	local device
 	json_get_vars device
-	device="${device:-$iface}"
+	device="${device:-$config}"
 
 	json_init
 	json_add_string name "$device"



From lede-commits at lists.infradead.org  Sun Jan 26 12:46:59 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 15:46:59 -0500
Subject: [openwrt/openwrt]  realtek: Simple conversions to RTL8231 MFD driver
In-Reply-To: <173792441907.591237.15456147451561757254@git-01.infra.openwrt.org>
References: <173792441907.591237.15456147451561757254@git-01.infra.openwrt.org>
Message-ID: <mailman.46262.1737924422.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b7af54d5c18cf74b9b598b506a335443a0bbed87

commit b7af54d5c18cf74b9b598b506a335443a0bbed87
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 21:40:06 2025 +0100

    realtek: Simple conversions to RTL8231 MFD driver
    
    Change devices with RTL8231 GPIO expander definition that can easily be
    translated to the new RTL8231 binding and carry over any gpio-hogs. This
    will let them use the new RTL8231 MFD driver, without any functional
    changes.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/dts/rtl8380_engenius_ews2910p.dts      | 57 +++++++++++++---------
 .../linux/realtek/dts/rtl8380_linksys_lgs310c.dts  | 19 ++++++--
 .../linux/realtek/dts/rtl8380_netgear_gigabit.dtsi | 19 ++++++--
 .../linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts | 19 ++++++--
 4 files changed, 79 insertions(+), 35 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dts b/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dts
index 289ec86274..b0f1e9b538 100644
--- a/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dts
+++ b/target/linux/realtek/dts/rtl8380_engenius_ews2910p.dts
@@ -38,29 +38,6 @@
 		};
 	};
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
-
-		poe_enable {
-			gpio-hog;
-			gpios = <1 GPIO_ACTIVE_HIGH>;
-			output-high;
-			line-name = "poe-enable";
-		};
-
-		sff_p9_gpios {
-			gpio-hog;
-			gpios = < 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>,
-				< 11 GPIO_ACTIVE_HIGH>, /* los-gpio */
-				< 12 GPIO_ACTIVE_LOW>;   /* mod-def0-gpio */
-			input;
-			line-name = "sff-p9-gpios";
-		};
-	};
-
 	gpio-export {
 		compatible = "gpio-export";
 
@@ -119,6 +96,40 @@
 	};
 };
 
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		poe_enable {
+			gpio-hog;
+			gpios = <1 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "poe-enable";
+		};
+
+		sff_p9_gpios {
+			gpio-hog;
+			gpios = < 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>,
+				< 11 GPIO_ACTIVE_HIGH>, /* los-gpio */
+				< 12 GPIO_ACTIVE_LOW>;   /* mod-def0-gpio */
+			input;
+			line-name = "sff-p9-gpios";
+		};
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
+	};
+};
+
 &spi0 {
 	status = "okay";
 
diff --git a/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts b/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
index 08ef740399..ab095dbc65 100644
--- a/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
+++ b/target/linux/realtek/dts/rtl8380_linksys_lgs310c.dts
@@ -92,12 +92,23 @@
 			linux,code = <KEY_RESTART>;
 		};
 	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
 		gpio-controller;
-		indirect-access-bus-id = <0>;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };
 
diff --git a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
index aca1a14774..75bf06e674 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
+++ b/target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi
@@ -31,12 +31,23 @@
 		gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
 		open-source;
 	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 31 {
+		compatible = "realtek,rtl8231";
+		reg = <31>;
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
 		gpio-controller;
-		indirect-access-bus-id = <31>;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };
 
diff --git a/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts b/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
index 49b55813f9..c4f8165604 100644
--- a/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
+++ b/target/linux/realtek/dts/rtl8382_iodata_bsh-g24mb.dts
@@ -43,12 +43,23 @@
 			linux,code = <KEY_RESTART>;
 		};
 	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
 		gpio-controller;
-		indirect-access-bus-id = <0>;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };
 



From lede-commits at lists.infradead.org  Sun Jan 26 17:04:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 20:04:44 -0500
Subject: [openwrt/openwrt]  ramips: mt7620: fix patching mac address in
 caldata
In-Reply-To: <173793988452.914800.10957847573487816799@git-01.infra.openwrt.org>
References: <173793988452.914800.10957847573487816799@git-01.infra.openwrt.org>
Message-ID: <mailman.46269.1737939889.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3295f6f1c254cd7e5e5285a05581bf6abbde8999

commit 3295f6f1c254cd7e5e5285a05581bf6abbde8999
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Sun Jan 26 19:53:31 2025 +0100

    ramips: mt7620: fix patching mac address in caldata
    
    Fix usage of non-existent 'caldata_patch_mac' function
    by using the 'caldata_patch_data' function.
    
    Fixes: #17734
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17737
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 .../ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom b/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
index 2d1ac2e872..b68efcbba1 100644
--- a/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
+++ b/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -34,12 +34,12 @@ case "$FIRMWARE" in
 		wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
 		wifi_mac=$(macaddr_add "$wan_mac" 1)
 		jboot_eeprom_extract "config" 0xE000
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	dovado,tiny-ac)
 		wifi_mac=$(mtd_get_mac_ascii u-boot-env INIC_MAC_ADDR)
 		caldata_extract "factory" 0x0 0x200
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	*)
 		caldata_die "Please define mtd-eeprom in $board DTS file!"



From lede-commits at lists.infradead.org  Sun Jan 26 17:05:21 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 20:05:21 -0500
Subject: [openwrt/openwrt]  ramips: mt7620: fix patching mac address in
 caldata
In-Reply-To: <173793992191.915610.12769946872866984101@git-01.infra.openwrt.org>
References: <173793992191.915610.12769946872866984101@git-01.infra.openwrt.org>
Message-ID: <mailman.46270.1737939925.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/150aa9aeee509dba5255885618d8df372670e8f3

commit 150aa9aeee509dba5255885618d8df372670e8f3
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Sun Jan 26 19:53:31 2025 +0100

    ramips: mt7620: fix patching mac address in caldata
    
    Fix usage of non-existent 'caldata_patch_mac' function
    by using the 'caldata_patch_data' function.
    
    Fixes: #17734
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17737
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 3295f6f1c254cd7e5e5285a05581bf6abbde8999)
---
 .../ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom b/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
index 2d1ac2e872..b68efcbba1 100644
--- a/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
+++ b/target/linux/ramips/mt7620/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -34,12 +34,12 @@ case "$FIRMWARE" in
 		wan_mac=$(jboot_config_read -m -i $(find_mtd_part "config") -o 0xE000)
 		wifi_mac=$(macaddr_add "$wan_mac" 1)
 		jboot_eeprom_extract "config" 0xE000
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	dovado,tiny-ac)
 		wifi_mac=$(mtd_get_mac_ascii u-boot-env INIC_MAC_ADDR)
 		caldata_extract "factory" 0x0 0x200
-		caldata_patch_mac $wifi_mac 0x4
+		caldata_patch_data "${wifi_mac//:/}" 0x4
 		;;
 	*)
 		caldata_die "Please define mtd-eeprom in $board DTS file!"



From lede-commits at lists.infradead.org  Sun Jan 26 17:10:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 20:10:28 -0500
Subject: [openwrt/openwrt]  octeon: ubnt-usg: add board name to supported
 devices
In-Reply-To: <173794022843.923390.8559491042191000108@git-01.infra.openwrt.org>
References: <173794022843.923390.8559491042191000108@git-01.infra.openwrt.org>
Message-ID: <mailman.46271.1737940232.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7165937c3b6ebe5ac692fcde1cc69ba1c7a3d9c9

commit 7165937c3b6ebe5ac692fcde1cc69ba1c7a3d9c9
Author: Eric Fahlgren <ericfahlgren at gmail.com>
AuthorDate: Sun Jan 26 09:25:13 2025 -0800

    octeon: ubnt-usg: add board name to supported devices
    
    The on-device board name reported by 'ubus call system board' is not present
    in the generated profiles.json.  This results in upgrade tools being unable
    to match the image with the proper device.  Let's add a 'SUPPORTED_DEVICES'
    entry for the board name to fix this.
    
    Links: https://forum.openwrt.org/t/owut-openwrt-upgrade-tool/200035/441
    Links: https://github.com/openwrt/openwrt/commit/2a07270180ed0e295d854d6e9e59c78c40549efc
    Signed-off-by: Eric Fahlgren <ericfahlgren at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17736
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/octeon/image/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/octeon/image/Makefile b/target/linux/octeon/image/Makefile
index f00e87c520..dec0480915 100644
--- a/target/linux/octeon/image/Makefile
+++ b/target/linux/octeon/image/Makefile
@@ -92,6 +92,7 @@ define Device/ubnt_unifi-usg
   DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio
   DEVICE_DTS := cn5020_ubnt_usg
   KERNEL += | append-dtb-to-elf
+  SUPPORTED_DEVICES += ubnt,usg
 endef
 TARGET_DEVICES += ubnt_unifi-usg
 



From lede-commits at lists.infradead.org  Sun Jan 26 17:11:05 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sun, 26 Jan 2025 20:11:05 -0500
Subject: [openwrt/openwrt]  octeon: ubnt-usg: add board name to supported
 devices
In-Reply-To: <173794026538.924704.2243682134499594434@git-01.infra.openwrt.org>
References: <173794026538.924704.2243682134499594434@git-01.infra.openwrt.org>
Message-ID: <mailman.46272.1737940269.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e1ba6e407bc5052fc86251581995a055ff24f736

commit e1ba6e407bc5052fc86251581995a055ff24f736
Author: Eric Fahlgren <ericfahlgren at gmail.com>
AuthorDate: Sun Jan 26 09:25:13 2025 -0800

    octeon: ubnt-usg: add board name to supported devices
    
    The on-device board name reported by 'ubus call system board' is not present
    in the generated profiles.json.  This results in upgrade tools being unable
    to match the image with the proper device.  Let's add a 'SUPPORTED_DEVICES'
    entry for the board name to fix this.
    
    Links: https://forum.openwrt.org/t/owut-openwrt-upgrade-tool/200035/441
    Links: https://github.com/openwrt/openwrt/commit/2a07270180ed0e295d854d6e9e59c78c40549efc
    Signed-off-by: Eric Fahlgren <ericfahlgren at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17736
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 7165937c3b6ebe5ac692fcde1cc69ba1c7a3d9c9)
---
 target/linux/octeon/image/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/octeon/image/Makefile b/target/linux/octeon/image/Makefile
index f00e87c520..dec0480915 100644
--- a/target/linux/octeon/image/Makefile
+++ b/target/linux/octeon/image/Makefile
@@ -92,6 +92,7 @@ define Device/ubnt_unifi-usg
   DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio
   DEVICE_DTS := cn5020_ubnt_usg
   KERNEL += | append-dtb-to-elf
+  SUPPORTED_DEVICES += ubnt,usg
 endef
 TARGET_DEVICES += ubnt_unifi-usg
 



From lede-commits at lists.infradead.org  Mon Jan 27 01:35:43 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 04:35:43 -0500
Subject: [openwrt/openwrt]  imx: 6.6: add a patch to work around a PCI init
 hang on IMX8M{M,P}
In-Reply-To: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
References: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
Message-ID: <mailman.46366.1737970618.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/23a18a57cf750d9081353cdd34e44982ea10e191

commit 23a18a57cf750d9081353cdd34e44982ea10e191
Author: Tim Harvey <tharvey at gateworks.com>
AuthorDate: Tue Dec 17 14:52:48 2024 -0800

    imx: 6.6: add a patch to work around a PCI init hang on IMX8M{M,P}
    
    The act of attempting link at gen1 then trying to link at higher speeds
    causes a hang with the specific PCIe switch used on the Gateworks Venice
    boards. Work around this by linking at the highest speed first as is
    common with all other PCI controller drivers.
    
    Signed-off-by: Tim Harvey <tharvey at gateworks.com>
    Link: https://github.com/openwrt/openwrt/pull/17717
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...nk-at-max-gen-first-for-IMX8MM-and-IMX8MP.patch | 119 +++++++++++++++++++++
 1 file changed, 119 insertions(+)

diff --git a/target/linux/imx/patches-6.6/600-PCI-imx6-Start-link-at-max-gen-first-for-IMX8MM-and-IMX8MP.patch b/target/linux/imx/patches-6.6/600-PCI-imx6-Start-link-at-max-gen-first-for-IMX8MM-and-IMX8MP.patch
new file mode 100644
index 0000000000..002c204462
--- /dev/null
+++ b/target/linux/imx/patches-6.6/600-PCI-imx6-Start-link-at-max-gen-first-for-IMX8MM-and-IMX8MP.patch
@@ -0,0 +1,119 @@
+From cf983e4a04eecb5be93af7b53cb10805ee448998 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Mon, 21 Aug 2023 09:20:17 -0700
+Subject: [PATCH] PCI: imx6: Start link at max gen first for IMX8MM and IMX8MP
+
+commit fa33a6d87eac ("PCI: imx6: Start link in Gen1 before negotiating
+for Gen2 mode") started link negotiation at Gen1 before attempting
+faster speeds in order to work around an issue with a particular switch
+on an IMX6Q SoC.
+
+This behavior is not the norm for PCI link negotiation and it has been
+found to cause issues in other cases:
+- IMX8MM with PI7C9X2G608GP switch: various endpoints (such as qca988x)
+  will fail to link more than 50% of the time
+- IMX8MP with PI7C9X2G608GP switch: occasionally will fail to link with
+  switch and cause a CPU hang about 30% of the time
+
+Disable this behavior for IMX8MM and IMX8MP.
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+---
+ drivers/pci/controller/dwc/pci-imx6.c | 53 ++++++++++++++-------------
+ 1 file changed, 27 insertions(+), 26 deletions(-)
+
+--- a/drivers/pci/controller/dwc/pci-imx6.c
++++ b/drivers/pci/controller/dwc/pci-imx6.c
+@@ -60,6 +60,7 @@ enum imx6_pcie_variants {
+ #define IMX6_PCIE_FLAG_IMX6_PHY			BIT(0)
+ #define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE	BIT(1)
+ #define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND		BIT(2)
++#define IMX6_PCIE_FLAG_GEN1_LAST		BIT(3)
+ 
+ struct imx6_pcie_drvdata {
+ 	enum imx6_pcie_variants variant;
+@@ -876,26 +877,28 @@ static int imx6_pcie_start_link(struct d
+ 	u32 tmp;
+ 	int ret;
+ 
+-	/*
+-	 * Force Gen1 operation when starting the link.  In case the link is
+-	 * started in Gen2 mode, there is a possibility the devices on the
+-	 * bus will not be detected at all.  This happens with PCIe switches.
+-	 */
+-	dw_pcie_dbi_ro_wr_en(pci);
+-	tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
+-	tmp &= ~PCI_EXP_LNKCAP_SLS;
+-	tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
+-	dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
+-	dw_pcie_dbi_ro_wr_dis(pci);
++	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_GEN1_LAST)) {
++		/*
++		 * Force Gen1 operation when starting the link.  In case the link is
++		 * started in Gen2 mode, there is a possibility the devices on the
++		 * bus will not be detected at all.  This happens with PCIe switches.
++		 */
++		dw_pcie_dbi_ro_wr_en(pci);
++		tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
++		tmp &= ~PCI_EXP_LNKCAP_SLS;
++		tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
++		dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
++		dw_pcie_dbi_ro_wr_dis(pci);
++	}
+ 
+ 	/* Start LTSSM. */
+ 	imx6_pcie_ltssm_enable(dev);
+ 
+-	ret = dw_pcie_wait_for_link(pci);
+-	if (ret)
+-		goto err_reset_phy;
++	if ((pci->link_gen > 1) && !(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_GEN1_LAST)) {
++		ret = dw_pcie_wait_for_link(pci);
++		if (ret)
++			goto err_reset_phy;
+ 
+-	if (pci->link_gen > 1) {
+ 		/* Allow faster modes after the link is up */
+ 		dw_pcie_dbi_ro_wr_en(pci);
+ 		tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
+@@ -929,18 +932,14 @@ static int imx6_pcie_start_link(struct d
+ 				goto err_reset_phy;
+ 			}
+ 		}
+-
+-		/* Make sure link training is finished as well! */
+-		ret = dw_pcie_wait_for_link(pci);
+-		if (ret)
+-			goto err_reset_phy;
+-	} else {
+-		dev_info(dev, "Link: Only Gen1 is enabled\n");
+ 	}
+ 
++	ret = dw_pcie_wait_for_link(pci);
++	if (ret)
++		goto err_reset_phy;
++
+ 	imx6_pcie->link_is_up = true;
+-	tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
+-	dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
++
+ 	return 0;
+ 
+ err_reset_phy:
+@@ -1505,12 +1504,14 @@ static const struct imx6_pcie_drvdata dr
+ 	},
+ 	[IMX8MM] = {
+ 		.variant = IMX8MM,
+-		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
++		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
++			 IMX6_PCIE_FLAG_GEN1_LAST,
+ 		.gpr = "fsl,imx8mm-iomuxc-gpr",
+ 	},
+ 	[IMX8MP] = {
+ 		.variant = IMX8MP,
+-		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
++		.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND |
++			 IMX6_PCIE_FLAG_GEN1_LAST,
+ 		.gpr = "fsl,imx8mp-iomuxc-gpr",
+ 	},
+ 	[IMX8MQ_EP] = {



From lede-commits at lists.infradead.org  Mon Jan 27 01:35:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 04:35:41 -0500
Subject: [openwrt/openwrt]  generic: 6.6: add backported btsdio patch for
 cyw437
In-Reply-To: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
References: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
Message-ID: <mailman.46367.1737970618.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c9f11523dd5b8639b24b97043d70f2a197a00a84

commit c9f11523dd5b8639b24b97043d70f2a197a00a84
Author: Tim Harvey <tharvey at gateworks.com>
AuthorDate: Tue Dec 17 14:51:57 2024 -0800

    generic: 6.6: add backported btsdio patch for cyw437
    
    Add a backport of a btsdio patch for the cyw437 bluetooth controller.
    
    Signed-off-by: Tim Harvey <tharvey at gateworks.com>
    Link: https://github.com/openwrt/openwrt/pull/17717
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...tsdio-Do-not-bind-to-non-removable-CYW437.patch | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/target/linux/generic/backport-6.6/903-v6.12-Bluetooth-btsdio-Do-not-bind-to-non-removable-CYW437.patch b/target/linux/generic/backport-6.6/903-v6.12-Bluetooth-btsdio-Do-not-bind-to-non-removable-CYW437.patch
new file mode 100644
index 0000000000..09c3938ff5
--- /dev/null
+++ b/target/linux/generic/backport-6.6/903-v6.12-Bluetooth-btsdio-Do-not-bind-to-non-removable-CYW437.patch
@@ -0,0 +1,25 @@
+From 6a9eb32230f33ae273f6ffbabb0aaf560869816e Mon Sep 17 00:00:00 2001
+From: Scott Ehlert <ehlert at battelle.org>
+Date: Mon, 29 Apr 2024 11:23:09 -0700
+Subject: [PATCH] Bluetooth: btsdio: Do not bind to non-removable CYW4373
+
+CYW4373 devices soldered onto the PCB (non-removable),
+use a UART connection for Bluetooth and the advertised btsdio
+support as an SDIO function should be ignored.
+
+Signed-off-by: Scott Ehlert <ehlert at battelle.org>
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+---
+ drivers/bluetooth/btsdio.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/bluetooth/btsdio.c
++++ b/drivers/bluetooth/btsdio.c
+@@ -295,6 +295,7 @@ static int btsdio_probe(struct sdio_func
+ 		case SDIO_DEVICE_ID_BROADCOM_4345:
+ 		case SDIO_DEVICE_ID_BROADCOM_43455:
+ 		case SDIO_DEVICE_ID_BROADCOM_4356:
++		case SDIO_DEVICE_ID_BROADCOM_CYPRESS_4373:
+ 			return -ENODEV;
+ 		}
+ 	}



From lede-commits at lists.infradead.org  Mon Jan 27 01:35:44 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 04:35:44 -0500
Subject: [openwrt/openwrt]  imx: coretexa53: add network configuration for
 gw82xx-2x
In-Reply-To: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
References: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
Message-ID: <mailman.46370.1737970618.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d2eaaa90d502fa418d7d9bb8d4e6ccbe0131c832

commit d2eaaa90d502fa418d7d9bb8d4e6ccbe0131c832
Author: Tim Harvey <tharvey at gateworks.com>
AuthorDate: Thu Jan 23 10:29:55 2025 -0800

    imx: coretexa53: add network configuration for gw82xx-2x
    
    The GW82xx-2x has two network ports. By convention, the first
    port (eth0) should be the WAN port and the second port (eth1)
    should be the LAN port.
    
    Signed-off-by: Tim Harvey <tharvey at gateworks.com>
    Link: https://github.com/openwrt/openwrt/pull/17717
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/imx/cortexa53/base-files/etc/board.d/02_network | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/linux/imx/cortexa53/base-files/etc/board.d/02_network b/target/linux/imx/cortexa53/base-files/etc/board.d/02_network
index f5dbbb09b9..94a982aee9 100644
--- a/target/linux/imx/cortexa53/base-files/etc/board.d/02_network
+++ b/target/linux/imx/cortexa53/base-files/etc/board.d/02_network
@@ -9,7 +9,8 @@ gw,imx8mm-gw72xx-0x|\
 gw,imx8mp-gw72xx-2x|\
 gw,imx8mm-gw73xx-0x|\
 gw,imx8mp-gw73xx-2x|\
-gw,imx8mm-gw7902-0x)
+gw,imx8mm-gw7902-0x|\
+gateworks,imx8mp-gw82xx-2x)
 	ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
 	;;
 gw,imx8mm-gw7901)



From lede-commits at lists.infradead.org  Mon Jan 27 01:35:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 04:35:42 -0500
Subject: [openwrt/openwrt]  imx: 6.6: add some backported kernel patches for
 Gateworks Venice
In-Reply-To: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
References: <173797054159.1450932.3055110649335979775@git-01.infra.openwrt.org>
Message-ID: <mailman.46371.1737970618.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/1ce87cf25c19f030b81954639545db2ab7f17062

commit 1ce87cf25c19f030b81954639545db2ab7f17062
Author: Tim Harvey <tharvey at gateworks.com>
AuthorDate: Tue Dec 17 14:50:51 2024 -0800

    imx: 6.6: add some backported kernel patches for Gateworks Venice
    
    Add several dt backports for the Gateworks Venice product family.
    
    Signed-off-by: Tim Harvey <tharvey at gateworks.com>
    Link: https://github.com/openwrt/openwrt/pull/17717
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 ...3-arm64-dts-imx8mm-venice-add-RTC-aliases.patch |  189 +++
 ...mx8mp-venice-gw74xx-add-M2SKT_GPIO10-gpio.patch |   36 +
 ...m64-dts-freescale-rename-gw7905-to-gw75xx.patch | 1426 ++++++++++++++++++++
 ...8m-venice-gw75xx-add-Accelerometer-device.patch |   79 ++
 ...d-i.MX8M-Plus-Gateworks-GW82XX-2X-support.patch | 1107 +++++++++++++++
 5 files changed, 2837 insertions(+)

diff --git a/target/linux/imx/patches-6.6/500-6.13-arm64-dts-imx8mm-venice-add-RTC-aliases.patch b/target/linux/imx/patches-6.6/500-6.13-arm64-dts-imx8mm-venice-add-RTC-aliases.patch
new file mode 100644
index 0000000000..2d398defc4
--- /dev/null
+++ b/target/linux/imx/patches-6.6/500-6.13-arm64-dts-imx8mm-venice-add-RTC-aliases.patch
@@ -0,0 +1,189 @@
+From 82b521f4bb8cab09aa016acf2c1b55ffc736eb2e Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Mon, 9 Sep 2024 15:15:01 -0700
+Subject: [PATCH] arm64: dts: imx8mm-venice-*: add RTC aliases
+
+Add aliases for the RTCs on the Gateworks Venice boards and on the imx8m
+SoC. This ensures that the primary RTC is always the one on-board
+provided by the Gateworks System Controller (GSC) which is battery
+backed as opposed to the one in the IMX8M.
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+Signed-off-by: Shawn Guo <shawnguo at kernel.org>
+---
+ arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi | 7 ++++++-
+ arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts  | 4 +++-
+ arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts  | 4 +++-
+ arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts  | 4 +++-
+ arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts  | 7 ++++++-
+ arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts  | 4 +++-
+ arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi | 4 +++-
+ arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts  | 4 +++-
+ 8 files changed, 30 insertions(+), 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
+@@ -8,6 +8,11 @@
+ #include <dt-bindings/net/ti-dp83867.h>
+ 
+ / {
++	aliases {
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
++	};
++
+ 	memory at 40000000 {
+ 		device_type = "memory";
+ 		reg = <0x0 0x40000000 0 0x80000000>;
+@@ -272,7 +277,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+@@ -22,6 +22,8 @@
+ 		ethernet2 = &lan2;
+ 		ethernet3 = &lan3;
+ 		ethernet4 = &lan4;
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 		usb0 = &usbotg1;
+ 		usb1 = &usbotg2;
+ 	};
+@@ -495,7 +497,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+@@ -19,6 +19,8 @@
+ 
+ 	aliases {
+ 		ethernet1 = &eth1;
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 		usb0 = &usbotg1;
+ 		usb1 = &usbotg2;
+ 	};
+@@ -562,7 +564,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
+@@ -18,6 +18,8 @@
+ 
+ 	aliases {
+ 		ethernet0 = &fec1;
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 		usb0 = &usbotg1;
+ 	};
+ 
+@@ -392,7 +394,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
+@@ -16,6 +16,11 @@
+ 	model = "Gateworks Venice GW7904 i.MX8MM board";
+ 	compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
+ 
++	aliases {
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
++	};
++
+ 	chosen {
+ 		stdout-path = &uart2;
+ 	};
+@@ -436,7 +441,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
+@@ -17,6 +17,8 @@
+ 	compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
+ 
+ 	aliases {
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 		usb0 = &usbotg1;
+ 	};
+ 
+@@ -560,7 +562,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
+@@ -10,6 +10,8 @@
+ / {
+ 	aliases {
+ 		ethernet0 = &eqos;
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 	};
+ 
+ 	memory at 40000000 {
+@@ -260,7 +262,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+@@ -24,6 +24,8 @@
+ 		ethernet4 = &lan3;
+ 		ethernet5 = &lan4;
+ 		ethernet6 = &lan5;
++		rtc0 = &gsc_rtc;
++		rtc1 = &snvs_rtc;
+ 	};
+ 
+ 	chosen {
+@@ -444,7 +446,7 @@
+ 		pagesize = <16>;
+ 	};
+ 
+-	rtc at 68 {
++	gsc_rtc: rtc at 68 {
+ 		compatible = "dallas,ds1672";
+ 		reg = <0x68>;
+ 	};
diff --git a/target/linux/imx/patches-6.6/501-6.13-arm64-dts-imx8mp-venice-gw74xx-add-M2SKT_GPIO10-gpio.patch b/target/linux/imx/patches-6.6/501-6.13-arm64-dts-imx8mp-venice-gw74xx-add-M2SKT_GPIO10-gpio.patch
new file mode 100644
index 0000000000..14c8f88e31
--- /dev/null
+++ b/target/linux/imx/patches-6.6/501-6.13-arm64-dts-imx8mp-venice-gw74xx-add-M2SKT_GPIO10-gpio.patch
@@ -0,0 +1,36 @@
+From e6d8fd29bd3d796a00ff9b69f9fae011aec3cb40 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Thu, 5 Sep 2024 11:32:28 -0700
+Subject: [PATCH] arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio
+ configuration
+
+The GW74xx D revision has added a M2SKT_GPIO10 GPIO which routes to the
+GPIO10 pin of the M.2 socket for compatibility with certain devices.
+
+Add the iomux and a line name for this.
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+Signed-off-by: Shawn Guo <shawnguo at kernel.org>
+---
+ arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+@@ -264,7 +264,7 @@
+ &gpio3 {
+ 	gpio-line-names =
+ 		"", "", "", "", "", "", "m2_rst", "",
+-		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "m2_gpio10", "",
+ 		"", "", "", "", "", "", "", "",
+ 		"", "", "", "", "", "", "", "";
+ };
+@@ -786,6 +786,7 @@
+ 			MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14	0x40000150 /* PCIE3_WDIS# */
+ 			MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18	0x40000150 /* PCIE2_WDIS# */
+ 			MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x40000040 /* M2SKT_RST# */
++			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x40000040 /* M2SKT_GPIO10 */
+ 			MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x40000104 /* UART_TERM */
+ 			MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	0x40000104 /* UART_RS485 */
+ 			MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00	0x40000104 /* UART_HALF */
diff --git a/target/linux/imx/patches-6.6/502-6.13-arm64-dts-freescale-rename-gw7905-to-gw75xx.patch b/target/linux/imx/patches-6.6/502-6.13-arm64-dts-freescale-rename-gw7905-to-gw75xx.patch
new file mode 100644
index 0000000000..056b85002e
--- /dev/null
+++ b/target/linux/imx/patches-6.6/502-6.13-arm64-dts-freescale-rename-gw7905-to-gw75xx.patch
@@ -0,0 +1,1426 @@
+From 14c3de96e14b30b1b83016abe607034a5a7e1c6b Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Wed, 24 Jan 2024 10:16:03 -0800
+Subject: [PATCH] arm64: dts: freescale: rename gw7905 to gw75xx
+
+The GW7905 was renamed to GW7500 before production release.
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+---
+ Documentation/devicetree/bindings/arm/fsl.yaml              | 4 ++--
+ arch/arm64/boot/dts/freescale/Makefile                      | 4 ++--
+ ...8mm-venice-gw7905-0x.dts => imx8mm-venice-gw75xx-0x.dts} | 6 +++---
+ ...{imx8mm-venice-gw7905.dtsi => imx8mm-venice-gw75xx.dtsi} | 0
+ ...8mp-venice-gw7905-2x.dts => imx8mp-venice-gw75xx-2x.dts} | 6 +++---
+ ...{imx8mp-venice-gw7905.dtsi => imx8mp-venice-gw75xx.dtsi} | 0
+ 6 files changed, 10 insertions(+), 10 deletions(-)
+ rename arch/arm64/boot/dts/freescale/{imx8mm-venice-gw7905-0x.dts => imx8mm-venice-gw75xx-0x.dts} (67%)
+ rename arch/arm64/boot/dts/freescale/{imx8mm-venice-gw7905.dtsi => imx8mm-venice-gw75xx.dtsi} (100%)
+ rename arch/arm64/boot/dts/freescale/{imx8mp-venice-gw7905-2x.dts => imx8mp-venice-gw75xx-2x.dts} (67%)
+ rename arch/arm64/boot/dts/freescale/{imx8mp-venice-gw7905.dtsi => imx8mp-venice-gw75xx.dtsi} (100%)
+
+--- a/Documentation/devicetree/bindings/arm/fsl.yaml
++++ b/Documentation/devicetree/bindings/arm/fsl.yaml
+@@ -908,8 +908,8 @@ properties:
+               - fsl,imx8mm-ddr4-evk       # i.MX8MM DDR4 EVK Board
+               - fsl,imx8mm-evk            # i.MX8MM EVK Board
+               - fsl,imx8mm-evkb           # i.MX8MM EVKB Board
++              - gateworks,imx8mm-gw75xx-0x # i.MX8MM Gateworks Board
+               - gateworks,imx8mm-gw7904
+-              - gateworks,imx8mm-gw7905-0x # i.MX8MM Gateworks Board
+               - gw,imx8mm-gw71xx-0x       # i.MX8MM Gateworks Development Kit
+               - gw,imx8mm-gw72xx-0x       # i.MX8MM Gateworks Development Kit
+               - gw,imx8mm-gw73xx-0x       # i.MX8MM Gateworks Development Kit
+@@ -1036,7 +1036,7 @@ properties:
+               - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
+               - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
+               - gateworks,imx8mp-gw74xx   # i.MX8MP Gateworks Board
+-              - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board
++              - gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
+               - toradex,verdin-imx8mp     # Verdin iMX8M Plus Modules
+               - toradex,verdin-imx8mp-nonwifi  # Verdin iMX8M Plus Modules without Wi-Fi / BT
+               - toradex,verdin-imx8mp-wifi  # Verdin iMX8M Plus Wi-Fi / BT Modules
+--- a/arch/arm64/boot/dts/freescale/Makefile
++++ b/arch/arm64/boot/dts/freescale/Makefile
+@@ -72,11 +72,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
++dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw75xx-0x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
+-dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7905-0x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-yavia.dtb
+@@ -107,7 +107,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
+-dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb
++dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905-0x.dts
++++ /dev/null
+@@ -1,28 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+-/*
+- * Copyright 2023 Gateworks Corporation
+- */
+-
+-/dts-v1/;
+-
+-#include "imx8mm.dtsi"
+-#include "imx8mm-venice-gw700x.dtsi"
+-#include "imx8mm-venice-gw7905.dtsi"
+-
+-/ {
+-	model = "Gateworks Venice GW7905-0x i.MX8MM Development Kit";
+-	compatible = "gateworks,imx8mm-gw7905-0x", "fsl,imx8mm";
+-
+-	chosen {
+-		stdout-path = &uart2;
+-	};
+-};
+-
+-/* Disable SOM interfaces not used on baseboard */
+-&fec1 {
+-	status = "disabled";
+-};
+-
+-&usdhc1 {
+-	status = "disabled";
+-};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx-0x.dts
+@@ -0,0 +1,28 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2023 Gateworks Corporation
++ */
++
++/dts-v1/;
++
++#include "imx8mm.dtsi"
++#include "imx8mm-venice-gw700x.dtsi"
++#include "imx8mm-venice-gw75xx.dtsi"
++
++/ {
++	model = "Gateworks Venice GW75xx-0x i.MX8MM Development Kit";
++	compatible = "gateworks,imx8mm-gw75xx-0x", "fsl,imx8mm";
++
++	chosen {
++		stdout-path = &uart2;
++	};
++};
++
++/* Disable SOM interfaces not used on baseboard */
++&fec1 {
++	status = "disabled";
++};
++
++&usdhc1 {
++	status = "disabled";
++};
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905-2x.dts
++++ /dev/null
+@@ -1,28 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+-/*
+- * Copyright 2023 Gateworks Corporation
+- */
+-
+-/dts-v1/;
+-
+-#include "imx8mp.dtsi"
+-#include "imx8mp-venice-gw702x.dtsi"
+-#include "imx8mp-venice-gw7905.dtsi"
+-
+-/ {
+-	model = "Gateworks Venice GW7905-2x i.MX8MP Development Kit";
+-	compatible = "gateworks,imx8mp-gw7905-2x", "fsl,imx8mp";
+-
+-	chosen {
+-		stdout-path = &uart2;
+-	};
+-};
+-
+-/* Disable SOM interfaces not used on baseboard */
+-&eqos {
+-	status = "disabled";
+-};
+-
+-&usdhc1 {
+-	status = "disabled";
+-};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx-2x.dts
+@@ -0,0 +1,28 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2023 Gateworks Corporation
++ */
++
++/dts-v1/;
++
++#include "imx8mp.dtsi"
++#include "imx8mp-venice-gw702x.dtsi"
++#include "imx8mp-venice-gw75xx.dtsi"
++
++/ {
++	model = "Gateworks Venice GW75xx-2x i.MX8MP Development Kit";
++	compatible = "gateworks,imx8mp-gw75xx-2x", "fsl,imx8mp";
++
++	chosen {
++		stdout-path = &uart2;
++	};
++};
++
++/* Disable SOM interfaces not used on baseboard */
++&eqos {
++	status = "disabled";
++};
++
++&usdhc1 {
++	status = "disabled";
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
+@@ -0,0 +1,303 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2023 Gateworks Corporation
++ */
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/phy/phy-imx8-pcie.h>
++
++/ {
++	led-controller {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_gpio_leds>;
++
++		led-0 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led-1 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_RED>;
++			gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
++			default-state = "off";
++		};
++	};
++
++	pcie0_refclk: clock-pcie0 {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <100000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_pps>;
++		gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	reg_usb2_vbus: regulator-usb2-vbus {
++		compatible = "regulator-fixed";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usb2_en>;
++		regulator-name = "usb2_vbus";
++		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	reg_usdhc2_vmmc: regulator-usdhc2 {
++		compatible = "regulator-fixed";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
++		regulator-name = "SD2_3P3V";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++};
++
++/* off-board header */
++&ecspi2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi2>;
++	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
++	status = "okay";
++};
++
++&gpio1 {
++	gpio-line-names =
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "gpioa", "gpiob", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "";
++};
++
++&gpio4 {
++	gpio-line-names =
++		"", "", "", "pci_usb_sel",
++		"", "", "", "pci_wdis#",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "";
++};
++
++&gpio5 {
++	gpio-line-names =
++		"", "", "", "",
++		"gpioc", "gpiod", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2>;
++	status = "okay";
++
++	eeprom at 52 {
++		compatible = "atmel,24c32";
++		reg = <0x52>;
++		pagesize = <32>;
++	};
++};
++
++/* off-board header */
++&i2c3 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++};
++
++&pcie_phy {
++	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
++	fsl,clkreq-unsupported;
++	clocks = <&pcie0_refclk>;
++	clock-names = "ref";
++	status = "okay";
++};
++
++&pcie0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie0>;
++	reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
++	status = "okay";
++};
++
++/* GPS */
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1>;
++	status = "okay";
++};
++
++/* USB1 - Type C front panel SINK port J14 */
++&usbotg1 {
++	dr_mode = "peripheral";
++	status = "okay";
++};
++
++/* USB2 4-port USB3.0 HUB:
++ *  P1 - USBC connector (host only)
++ *  P2 - USB2 test connector
++ *  P3 - miniPCIe full card
++ *  P4 - miniPCIe half card
++ */
++&usbotg2 {
++	dr_mode = "host";
++	vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
++
++/* microSD */
++&usdhc2 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
++	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
++	vmmc-supply = <&reg_usdhc2_vmmc>;
++	bus-width = <4>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	pinctrl_hog: hoggrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x40000040 /* GPIOA */
++			MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x40000040 /* GPIOB */
++			MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3	0x40000106 /* PCI_USBSEL */
++			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7	0x40000106 /* PCIE_WDIS# */
++			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x40000040 /* GPIOD */
++			MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4		0x40000040 /* GPIOC */
++		>;
++	};
++
++	pinctrl_gpio_leds: gpioledgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x6	/* LEDG */
++			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2	0x6	/* LEDR */
++		>;
++	};
++
++	pinctrl_i2c2: i2c2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c2
++			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c2
++		>;
++	};
++
++	pinctrl_i2c3: i2c3grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c2
++			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c2
++		>;
++	};
++
++	pinctrl_pcie0: pciegrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6	0x106
++		>;
++	};
++
++	pinctrl_pps: ppsgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5	0x106
++		>;
++	};
++
++	pinctrl_reg_usb2_en: regusb2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x6	/* USBHUB_RST# (ext p/u) */
++		>;
++	};
++
++	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x40
++		>;
++	};
++
++	pinctrl_spi2: spi2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0x140
++			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0x140
++			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0x140
++			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0x140
++		>;
++	};
++
++	pinctrl_uart1: uart1grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
++			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_usdhc2: usdhc2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x190
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d0
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
++			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x194
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d4
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
++			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x196
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d6
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
++			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12	0x1c4
++		>;
++	};
++};
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905.dtsi
++++ /dev/null
+@@ -1,303 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+-/*
+- * Copyright 2023 Gateworks Corporation
+- */
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/phy/phy-imx8-pcie.h>
+-
+-/ {
+-	led-controller {
+-		compatible = "gpio-leds";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_gpio_leds>;
+-
+-		led-0 {
+-			function = LED_FUNCTION_STATUS;
+-			color = <LED_COLOR_ID_GREEN>;
+-			gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-			linux,default-trigger = "heartbeat";
+-		};
+-
+-		led-1 {
+-			function = LED_FUNCTION_STATUS;
+-			color = <LED_COLOR_ID_RED>;
+-			gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
+-			default-state = "off";
+-		};
+-	};
+-
+-	pcie0_refclk: clock-pcie0 {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-frequency = <100000000>;
+-	};
+-
+-	pps {
+-		compatible = "pps-gpio";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_pps>;
+-		gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
+-		status = "okay";
+-	};
+-
+-	reg_usb2_vbus: regulator-usb2-vbus {
+-		compatible = "regulator-fixed";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_reg_usb2_en>;
+-		regulator-name = "usb2_vbus";
+-		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+-		enable-active-high;
+-		regulator-min-microvolt = <5000000>;
+-		regulator-max-microvolt = <5000000>;
+-	};
+-
+-	reg_usdhc2_vmmc: regulator-usdhc2 {
+-		compatible = "regulator-fixed";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+-		regulator-name = "SD2_3P3V";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+-		enable-active-high;
+-	};
+-};
+-
+-/* off-board header */
+-&ecspi2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_spi2>;
+-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+-	status = "okay";
+-};
+-
+-&gpio1 {
+-	gpio-line-names =
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "gpioa", "gpiob", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "";
+-};
+-
+-&gpio4 {
+-	gpio-line-names =
+-		"", "", "", "pci_usb_sel",
+-		"", "", "", "pci_wdis#",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "";
+-};
+-
+-&gpio5 {
+-	gpio-line-names =
+-		"", "", "", "",
+-		"gpioc", "gpiod", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "";
+-};
+-
+-&i2c2 {
+-	clock-frequency = <400000>;
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_i2c2>;
+-	status = "okay";
+-
+-	eeprom at 52 {
+-		compatible = "atmel,24c32";
+-		reg = <0x52>;
+-		pagesize = <32>;
+-	};
+-};
+-
+-/* off-board header */
+-&i2c3 {
+-	clock-frequency = <400000>;
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_i2c3>;
+-	status = "okay";
+-};
+-
+-&pcie_phy {
+-	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+-	fsl,clkreq-unsupported;
+-	clocks = <&pcie0_refclk>;
+-	clock-names = "ref";
+-	status = "okay";
+-};
+-
+-&pcie0 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_pcie0>;
+-	reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
+-	status = "okay";
+-};
+-
+-/* GPS */
+-&uart1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_uart1>;
+-	status = "okay";
+-};
+-
+-/* USB1 - Type C front panel SINK port J14 */
+-&usbotg1 {
+-	dr_mode = "peripheral";
+-	status = "okay";
+-};
+-
+-/* USB2 4-port USB3.0 HUB:
+- *  P1 - USBC connector (host only)
+- *  P2 - USB2 test connector
+- *  P3 - miniPCIe full card
+- *  P4 - miniPCIe half card
+- */
+-&usbotg2 {
+-	dr_mode = "host";
+-	vbus-supply = <&reg_usb2_vbus>;
+-	status = "okay";
+-};
+-
+-/* microSD */
+-&usdhc2 {
+-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+-	vmmc-supply = <&reg_usdhc2_vmmc>;
+-	bus-width = <4>;
+-	status = "okay";
+-};
+-
+-&iomuxc {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_hog>;
+-
+-	pinctrl_hog: hoggrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x40000040 /* GPIOA */
+-			MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x40000040 /* GPIOB */
+-			MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3	0x40000106 /* PCI_USBSEL */
+-			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7	0x40000106 /* PCIE_WDIS# */
+-			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x40000040 /* GPIOD */
+-			MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4		0x40000040 /* GPIOC */
+-		>;
+-	};
+-
+-	pinctrl_gpio_leds: gpioledgrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x6	/* LEDG */
+-			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2	0x6	/* LEDR */
+-		>;
+-	};
+-
+-	pinctrl_i2c2: i2c2grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c2
+-			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c2
+-		>;
+-	};
+-
+-	pinctrl_i2c3: i2c3grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c2
+-			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c2
+-		>;
+-	};
+-
+-	pinctrl_pcie0: pciegrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6	0x106
+-		>;
+-	};
+-
+-	pinctrl_pps: ppsgrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5	0x106
+-		>;
+-	};
+-
+-	pinctrl_reg_usb2_en: regusb2grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x6	/* USBHUB_RST# (ext p/u) */
+-		>;
+-	};
+-
+-	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x40
+-		>;
+-	};
+-
+-	pinctrl_spi2: spi2grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0x140
+-			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0x140
+-			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0x140
+-			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0x140
+-		>;
+-	};
+-
+-	pinctrl_uart1: uart1grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
+-			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
+-		>;
+-	};
+-
+-	pinctrl_usdhc2: usdhc2grp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x190
+-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d0
+-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
+-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
+-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
+-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
+-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x194
+-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d4
+-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
+-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
+-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
+-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
+-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x196
+-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d6
+-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
+-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
+-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
+-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
+-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+-		fsl,pins = <
+-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12	0x1c4
+-		>;
+-	};
+-};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
+@@ -0,0 +1,309 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2023 Gateworks Corporation
++ */
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/phy/phy-imx8-pcie.h>
++
++/ {
++	led-controller {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_gpio_leds>;
++
++		led-0 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led-1 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_RED>;
++			gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
++			default-state = "off";
++		};
++	};
++
++	pcie0_refclk: pcie0-refclk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <100000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_pps>;
++		gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	reg_usb2_vbus: regulator-usb2-vbus {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usb2_en>;
++		compatible = "regulator-fixed";
++		regulator-name = "usb2_vbus";
++		gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	reg_usdhc2_vmmc: regulator-usdhc2 {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
++		compatible = "regulator-fixed";
++		regulator-name = "SD2_3P3V";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++};
++
++/* off-board header */
++&ecspi2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi2>;
++	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
++	status = "okay";
++};
++
++&gpio4 {
++	gpio-line-names =
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "gpioa", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "";
++};
++
++&gpio4 {
++	gpio-line-names =
++		"", "gpiod", "", "",
++		"gpiob", "gpioc", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "pci_usb_sel", "",
++		"pci_wdis#", "", "", "";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2>;
++	status = "okay";
++
++	eeprom at 52 {
++		compatible = "atmel,24c32";
++		reg = <0x52>;
++		pagesize = <32>;
++	};
++};
++
++/* off-board header */
++&i2c3 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++};
++
++&pcie_phy {
++	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
++	fsl,clkreq-unsupported;
++	clocks = <&pcie0_refclk>;
++	clock-names = "ref";
++	status = "okay";
++};
++
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie0>;
++	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
++	status = "okay";
++};
++
++/* GPS */
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1>;
++	status = "okay";
++};
++
++/* USB1 - Type C front panel SINK port J14 */
++&usb3_0 {
++	status = "okay";
++};
++
++&usb3_phy0 {
++	status = "okay";
++};
++
++&usb_dwc3_0 {
++	dr_mode = "peripheral";
++	status = "okay";
++};
++
++/* USB2 4-port USB3.0 HUB:
++ *  P1 - USBC connector (host only)
++ *  P2 - USB2 test connector
++ *  P3 - miniPCIe full card
++ *  P4 - miniPCIe half card
++ */
++&usb3_phy1 {
++	vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
++
++&usb3_1 {
++	fsl,permanently-attached;
++	fsl,disable-port-power-control;
++	status = "okay";
++};
++
++&usb_dwc3_1 {
++	dr_mode = "host";
++	status = "okay";
++};
++
++/* microSD */
++&usdhc2 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
++	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
++	vmmc-supply = <&reg_usdhc2_vmmc>;
++	bus-width = <4>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	pinctrl_hog: hoggrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x40000040 /* GPIOA */
++			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x40000040 /* GPIOD */
++			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x40000040 /* GPIOB */
++			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x40000040 /* GPIOC */
++			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26	0x40000106 /* PCI_USBSEL */
++			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x40000106 /* PCI_WDIS# */
++		>;
++	};
++
++	pinctrl_gpio_leds: gpioledgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x6	/* LEDG */
++			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x6	/* LEDR */
++		>;
++	};
++
++	pinctrl_i2c2: i2c2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2
++			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2
++		>;
++	};
++
++	pinctrl_i2c3: i2c3grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2
++			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2
++		>;
++	};
++
++	pinctrl_pcie0: pciegrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106
++		>;
++	};
++
++	pinctrl_pps: ppsgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x106
++		>;
++	};
++
++	pinctrl_reg_usb2_en: regusb2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x6 /* USBHUB_RST# (ext p/u) */
++		>;
++	};
++
++	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
++		>;
++	};
++
++	pinctrl_spi2: spi2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x140
++			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x140
++			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x140
++			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140
++		>;
++	};
++
++	pinctrl_uart1: uart1grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
++			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_usdhc2: usdhc2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
++		>;
++	};
++
++	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4
++		>;
++	};
++};
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905.dtsi
++++ /dev/null
+@@ -1,309 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+-/*
+- * Copyright 2023 Gateworks Corporation
+- */
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/phy/phy-imx8-pcie.h>
+-
+-/ {
+-	led-controller {
+-		compatible = "gpio-leds";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_gpio_leds>;
+-
+-		led-0 {
+-			function = LED_FUNCTION_STATUS;
+-			color = <LED_COLOR_ID_GREEN>;
+-			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+-			default-state = "on";
+-			linux,default-trigger = "heartbeat";
+-		};
+-
+-		led-1 {
+-			function = LED_FUNCTION_STATUS;
+-			color = <LED_COLOR_ID_RED>;
+-			gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+-			default-state = "off";
+-		};
+-	};
+-
+-	pcie0_refclk: pcie0-refclk {
+-		compatible = "fixed-clock";
+-		#clock-cells = <0>;
+-		clock-frequency = <100000000>;
+-	};
+-
+-	pps {
+-		compatible = "pps-gpio";
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_pps>;
+-		gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
+-		status = "okay";
+-	};
+-
+-	reg_usb2_vbus: regulator-usb2-vbus {
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_reg_usb2_en>;
+-		compatible = "regulator-fixed";
+-		regulator-name = "usb2_vbus";
+-		gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
+-		enable-active-high;
+-		regulator-min-microvolt = <5000000>;
+-		regulator-max-microvolt = <5000000>;
+-	};
+-
+-	reg_usdhc2_vmmc: regulator-usdhc2 {
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+-		compatible = "regulator-fixed";
+-		regulator-name = "SD2_3P3V";
+-		regulator-min-microvolt = <3300000>;
+-		regulator-max-microvolt = <3300000>;
+-		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+-		enable-active-high;
+-	};
+-};
+-
+-/* off-board header */
+-&ecspi2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_spi2>;
+-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+-	status = "okay";
+-};
+-
+-&gpio4 {
+-	gpio-line-names =
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "gpioa", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "";
+-};
+-
+-&gpio4 {
+-	gpio-line-names =
+-		"", "gpiod", "", "",
+-		"gpiob", "gpioc", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "", "",
+-		"", "", "pci_usb_sel", "",
+-		"pci_wdis#", "", "", "";
+-};
+-
+-&i2c2 {
+-	clock-frequency = <400000>;
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_i2c2>;
+-	status = "okay";
+-
+-	eeprom at 52 {
+-		compatible = "atmel,24c32";
+-		reg = <0x52>;
+-		pagesize = <32>;
+-	};
+-};
+-
+-/* off-board header */
+-&i2c3 {
+-	clock-frequency = <400000>;
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_i2c3>;
+-	status = "okay";
+-};
+-
+-&pcie_phy {
+-	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+-	fsl,clkreq-unsupported;
+-	clocks = <&pcie0_refclk>;
+-	clock-names = "ref";
+-	status = "okay";
+-};
+-
+-&pcie {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_pcie0>;
+-	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+-	status = "okay";
+-};
+-
+-/* GPS */
+-&uart1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_uart1>;
+-	status = "okay";
+-};
+-
+-/* USB1 - Type C front panel SINK port J14 */
+-&usb3_0 {
+-	status = "okay";
+-};
+-
+-&usb3_phy0 {
+-	status = "okay";
+-};
+-
+-&usb_dwc3_0 {
+-	dr_mode = "peripheral";
+-	status = "okay";
+-};
+-
+-/* USB2 4-port USB3.0 HUB:
+- *  P1 - USBC connector (host only)
+- *  P2 - USB2 test connector
+- *  P3 - miniPCIe full card
+- *  P4 - miniPCIe half card
+- */
+-&usb3_phy1 {
+-	vbus-supply = <&reg_usb2_vbus>;
+-	status = "okay";
+-};
+-
+-&usb3_1 {
+-	fsl,permanently-attached;
+-	fsl,disable-port-power-control;
+-	status = "okay";
+-};
+-
+-&usb_dwc3_1 {
+-	dr_mode = "host";
+-	status = "okay";
+-};
+-
+-/* microSD */
+-&usdhc2 {
+-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+-	vmmc-supply = <&reg_usdhc2_vmmc>;
+-	bus-width = <4>;
+-	status = "okay";
+-};
+-
+-&iomuxc {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_hog>;
+-
+-	pinctrl_hog: hoggrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x40000040 /* GPIOA */
+-			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x40000040 /* GPIOD */
+-			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x40000040 /* GPIOB */
+-			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x40000040 /* GPIOC */
+-			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26	0x40000106 /* PCI_USBSEL */
+-			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x40000106 /* PCI_WDIS# */
+-		>;
+-	};
+-
+-	pinctrl_gpio_leds: gpioledgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x6	/* LEDG */
+-			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x6	/* LEDR */
+-		>;
+-	};
+-
+-	pinctrl_i2c2: i2c2grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2
+-			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2
+-		>;
+-	};
+-
+-	pinctrl_i2c3: i2c3grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2
+-			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2
+-		>;
+-	};
+-
+-	pinctrl_pcie0: pciegrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106
+-		>;
+-	};
+-
+-	pinctrl_pps: ppsgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x106
+-		>;
+-	};
+-
+-	pinctrl_reg_usb2_en: regusb2grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x6 /* USBHUB_RST# (ext p/u) */
+-		>;
+-	};
+-
+-	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
+-		>;
+-	};
+-
+-	pinctrl_spi2: spi2grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x140
+-			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x140
+-			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x140
+-			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140
+-		>;
+-	};
+-
+-	pinctrl_uart1: uart1grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
+-			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
+-		>;
+-	};
+-
+-	pinctrl_usdhc2: usdhc2grp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x190
+-			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d0
+-			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d0
+-			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d0
+-			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d0
+-			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d0
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x194
+-			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d4
+-			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d4
+-			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d4
+-			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d4
+-			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d4
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK		0x196
+-			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD		0x1d6
+-			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0		0x1d6
+-			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1		0x1d6
+-			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2		0x1d6
+-			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3		0x1d6
+-			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT		0xc0
+-		>;
+-	};
+-
+-	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+-		fsl,pins = <
+-			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4
+-		>;
+-	};
+-};
diff --git a/target/linux/imx/patches-6.6/503-6.13-arm64-dts-imx8m-venice-gw75xx-add-Accelerometer-device.patch b/target/linux/imx/patches-6.6/503-6.13-arm64-dts-imx8m-venice-gw75xx-add-Accelerometer-device.patch
new file mode 100644
index 0000000000..f30b690423
--- /dev/null
+++ b/target/linux/imx/patches-6.6/503-6.13-arm64-dts-imx8m-venice-gw75xx-add-Accelerometer-device.patch
@@ -0,0 +1,79 @@
+From ede044113c0418f11dbee09069ff1dd68f284dfa Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Fri, 18 Oct 2024 10:36:08 -0700
+Subject: [PATCH] arm64: dts: imx8m*-venice-gw75xx: add Accelerometer device
+
+The GW75xx has a LIS2DE12TR 3-axis accelerometer on the I2C bus with an
+interrupt pin. Add it to the device-tree.
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+Signed-off-by: Shawn Guo <shawnguo at kernel.org>
+---
+ .../boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 16 ++++++++++++++++
+ .../boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 16 ++++++++++++++++
+ 2 files changed, 32 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
+@@ -116,6 +116,16 @@
+ 	pinctrl-0 = <&pinctrl_i2c2>;
+ 	status = "okay";
+ 
++	accelerometer at 19 {
++		compatible = "st,lis2de12";
++		reg = <0x19>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_accel>;
++		interrupt-parent = <&gpio5>;
++		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
++		st,drdy-int-pin = <1>;
++	};
++
+ 	eeprom at 52 {
+ 		compatible = "atmel,24c32";
+ 		reg = <0x52>;
+@@ -198,6 +208,12 @@
+ 		>;
+ 	};
+ 
++	pinctrl_accel: accelgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8	0x159
++		>;
++	};
++
+ 	pinctrl_gpio_leds: gpioledgrp {
+ 		fsl,pins = <
+ 			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x6	/* LEDG */
+--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
+@@ -104,6 +104,16 @@
+ 	pinctrl-0 = <&pinctrl_i2c2>;
+ 	status = "okay";
+ 
++	accelerometer at 19 {
++		compatible = "st,lis2de12";
++		reg = <0x19>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_accel>;
++		interrupt-parent = <&gpio5>;
++		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
++		st,drdy-int-pin = <1>;
++	};
++
+ 	eeprom at 52 {
+ 		compatible = "atmel,24c32";
+ 		reg = <0x52>;
+@@ -204,6 +214,12 @@
+ 		>;
+ 	};
+ 
++	pinctrl_accel: accelgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08	0x159
++		>;
++	};
++
+ 	pinctrl_gpio_leds: gpioledgrp {
+ 		fsl,pins = <
+ 			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x6	/* LEDG */
diff --git a/target/linux/imx/patches-6.6/504-6.13-arm64-dts-imx-Add-i.MX8M-Plus-Gateworks-GW82XX-2X-support.patch b/target/linux/imx/patches-6.6/504-6.13-arm64-dts-imx-Add-i.MX8M-Plus-Gateworks-GW82XX-2X-support.patch
new file mode 100644
index 0000000000..8765474a8a
--- /dev/null
+++ b/target/linux/imx/patches-6.6/504-6.13-arm64-dts-imx-Add-i.MX8M-Plus-Gateworks-GW82XX-2X-support.patch
@@ -0,0 +1,1107 @@
+From a79d2638a7150d1605fcadebb6baa36d27cdc48e Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey at gateworks.com>
+Date: Thu, 30 May 2024 10:21:45 -0700
+Subject: [PATCH] arm64: dts: imx: Add i.MX8M Plus Gateworks GW82XX-2X support
+
+The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
+comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
+baseboard featuring:
+ - i.MX8M Plus SoC
+ - LPDDR4 DRAM
+ - eMMC FLASH
+ - Gateworks System Controller (GSC)
+ - microSD (1.8V/3.3V Capable)
+ - panel status bi-color LED
+ - pushbutton switch
+ - fan controller with tachometer
+ - USB Type-C connector
+ - PCIe switch
+ - 2x GbE RJ45 connectors
+ - multi-protocol RS232/RS485/RS422 Serial ports
+ - 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
+   (for M.2 and miniPCIe expansion)
+ - 2x isolated CAN
+ - GPS
+ - accelerometer
+ - magnetometer
+ - off-board connectors for: SPI, GPIO, I2C, ADC
+ - Wide range DC power input
+ - support for 802.3at PoE (via adapter)
+
+Signed-off-by: Tim Harvey <tharvey at gateworks.com>
+---
+ .../devicetree/bindings/arm/fsl.yaml          |   1 +
+ arch/arm64/boot/dts/freescale/Makefile        |   1 +
+ .../dts/freescale/imx8mm-venice-gw82xx.dtsi   | 460 +++++++++++++++
+ .../boot/dts/freescale/imx8mp-venice-gw82xx-2 |  19 +
+ .../dts/freescale/imx8mp-venice-gw82xx-2x.dts |  19 +
+ .../dts/freescale/imx8mp-venice-gw82xx.dtsi   | 533 ++++++++++++++++++
+ 6 files changed, 1033 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-venice-gw82xx.dtsi
+ create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2
+ create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts
+ create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi
+
+--- a/Documentation/devicetree/bindings/arm/fsl.yaml
++++ b/Documentation/devicetree/bindings/arm/fsl.yaml
+@@ -1037,6 +1037,7 @@ properties:
+               - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
+               - gateworks,imx8mp-gw74xx   # i.MX8MP Gateworks Board
+               - gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
++              - gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board
+               - toradex,verdin-imx8mp     # Verdin iMX8M Plus Modules
+               - toradex,verdin-imx8mp-nonwifi  # Verdin iMX8M Plus Modules without Wi-Fi / BT
+               - toradex,verdin-imx8mp-wifi  # Verdin iMX8M Plus Wi-Fi / BT Modules
+--- a/arch/arm64/boot/dts/freescale/Makefile
++++ b/arch/arm64/boot/dts/freescale/Makefile
+@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb
++dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw82xx-2x.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
+ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw82xx.dtsi
+@@ -0,0 +1,460 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2020 Gateworks Corporation
++ */
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/phy/phy-imx8-pcie.h>
++
++/ {
++	aliases {
++		ethernet1 = &eth1;
++		usb0 = &usbotg1;
++		usb1 = &usbotg2;
++	};
++
++	led-controller {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_gpio_leds>;
++
++		led-0 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led-1 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_RED>;
++			gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
++			default-state = "off";
++		};
++	};
++
++	pcie0_refclk: pcie0-refclk {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <100000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_pps>;
++		gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
++		status = "okay";
++	};
++
++	reg_1p8v: regulator-1p8v {
++		compatible = "regulator-fixed";
++		regulator-name = "1P8V";
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++		regulator-always-on;
++	};
++
++	reg_3p3v: regulator-3p3v {
++		compatible = "regulator-fixed";
++		regulator-name = "3P3V";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-always-on;
++	};
++
++	reg_usb_otg1_vbus: regulator-usb-otg1 {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usb1_en>;
++		compatible = "regulator-fixed";
++		regulator-name = "usb_otg1_vbus";
++		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	reg_usb_otg2_vbus: regulator-usb-otg2 {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usb2_en>;
++		compatible = "regulator-fixed";
++		regulator-name = "usb_otg2_vbus";
++		gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++	};
++
++	reg_wifi_en: regulator-wifi-en {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_wl>;
++		compatible = "regulator-fixed";
++		regulator-name = "wl";
++		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
++		startup-delay-us = <100>;
++		enable-active-high;
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++};
++
++/* off-board header */
++&ecspi2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi2>;
++	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
++		   <&gpio1 10 GPIO_ACTIVE_LOW>;
++	status = "okay";
++
++	tpm at 1 {
++		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
++		reg = <0x1>;
++		spi-max-frequency = <36000000>;
++	};
++};
++
++&gpio1 {
++	gpio-line-names = "rs485_term", "mipi_gpio4", "", "",
++		"", "", "pci_usb_sel", "dio0",
++		"", "dio1", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "";
++};
++
++&gpio4 {
++	gpio-line-names = "rs485_en", "mipi_gpio3", "rs485_hd", "mipi_gpio2",
++		"mipi_gpio1", "", "", "pci_wdis#",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "",
++		"", "", "", "", "", "", "", "";
++};
++
++&i2c2 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2>;
++	status = "okay";
++
++	accelerometer at 19 {
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_accel>;
++		compatible = "st,lis2de12";
++		reg = <0x19>;
++		st,drdy-int-pin = <1>;
++		interrupt-parent = <&gpio4>;
++		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
++	};
++
++	// TODO: 0x6f PCIe switch
++};
++
++/* off-board header */
++// TODO: i2c expander
++&i2c3 {
++	clock-frequency = <400000>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++};
++
++&pcie_phy {
++	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
++	fsl,clkreq-unsupported;
++	clocks = <&pcie0_refclk>;
++	clock-names = "ref";
++	status = "okay";
++};
++
++&pcie0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie0>;
++	reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
++	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
++		 <&clk IMX8MM_CLK_PCIE1_AUX>;
++	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
++			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
++	assigned-clock-rates = <10000000>, <250000000>;
++	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
++				 <&clk IMX8MM_SYS_PLL2_250M>;
++	status = "okay";
++
++	// TODO: this changes - new switch
++	pcie at 0,0 {
++		reg = <0x0000 0 0 0 0>;
++		device_type = "pci";
++		#address-cells = <3>;
++		#size-cells = <2>;
++		ranges;
++
++		pcie at 0,0 {
++			reg = <0x0000 0 0 0 0>;
++			device_type = "pci";
++			#address-cells = <3>;
++			#size-cells = <2>;
++			ranges;
++
++			pcie at 4,0 {
++				reg = <0x2000 0 0 0 0>;
++				device_type = "pci";
++				#address-cells = <3>;
++				#size-cells = <2>;
++				ranges;
++
++				eth1: ethernet at 0,0 {
++					reg = <0x0000 0 0 0 0>;
++					#address-cells = <3>;
++					#size-cells = <2>;
++					ranges;
++
++					local-mac-address = [00 00 00 00 00 00];
++				};
++			};
++		};
++	};
++};
++
++/* off-board header */
++&sai3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_sai3>;
++	assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
++	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
++	assigned-clock-rates = <24576000>;
++	status = "okay";
++};
++
++/* GPS */
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1>;
++	status = "okay";
++};
++
++/* bluetooth HCI */
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
++	cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
++	rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
++	status = "okay";
++
++	bluetooth {
++		compatible = "brcm,bcm4330-bt";
++		shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++/* RS232 */
++&uart4 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart4>;
++	status = "okay";
++};
++
++&usbotg1 {
++	dr_mode = "otg";
++	over-current-active-low;
++	vbus-supply = <&reg_usb_otg1_vbus>;
++	status = "okay";
++};
++
++&usbotg2 {
++	dr_mode = "host";
++	disable-over-current;
++	vbus-supply = <&reg_usb_otg2_vbus>;
++	status = "okay";
++};
++
++/* SDIO WiFi */
++&usdhc1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usdhc1>;
++	bus-width = <4>;
++	non-removable;
++	vmmc-supply = <&reg_wifi_en>;
++	status = "okay";
++};
++
++/* microSD */
++&usdhc2 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
++	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
++	bus-width = <4>;
++	vmmc-supply = <&reg_3p3v>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	pinctrl_hog: hoggrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3		0x40000041 /* PLUG_TEST */
++			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x40000041 /* PCI_USBSEL */
++			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7	0x40000041 /* PCIE_WDIS# */
++			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x40000041 /* DIO0 */
++			MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x40000041 /* DIO1 */
++			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x40000104 /* RS485_TERM */
++			MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0	0x40000104 /* RS485 */
++			MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2	0x40000104 /* RS485_HALF */
++		>;
++	};
++
++	pinctrl_accel: accelgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5	0x159
++		>;
++	};
++
++	pinctrl_bten: btengrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
++		>;
++	};
++
++	pinctrl_gpio_leds: gpioledgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x19
++			MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4		0x19
++		>;
++	};
++
++	pinctrl_i2c3: i2c3grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
++			MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c3
++		>;
++	};
++
++	pinctrl_pcie0: pcie0grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6	0x41
++		>;
++	};
++
++	pinctrl_pps: ppsgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15	0x41
++		>;
++	};
++
++	pinctrl_reg_wl: regwlgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x41
++		>;
++	};
++
++	pinctrl_reg_usb1_en: regusb1grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x41
++			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x41
++		>;
++	};
++
++	pinctrl_reg_usb2_en: regusb2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8	0x41
++		>;
++	};
++
++	pinctrl_sai3: sai3grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
++			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
++			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
++			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
++			MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0	0xd6
++		>;
++	};
++
++	pinctrl_spi2: spi2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
++			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6
++			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0xd6
++			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6
++			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0xd6
++		>;
++	};
++
++	pinctrl_uart1: uart1grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
++			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_uart3: uart3grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX	0x140
++			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX	0x140
++			MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8	0x140
++			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x140
++		>;
++	};
++
++	pinctrl_uart4: uart4grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX	0x140
++			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_usdhc1: usdhc1grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190
++			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD		0x1d0
++			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0	0x1d0
++			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1	0x1d0
++			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2	0x1d0
++			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3	0x1d0
++		>;
++	};
++
++	pinctrl_usdhc2: usdhc2grp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x190
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d0
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
++		>;
++	};
++
++	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x194
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d4
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
++		>;
++	};
++
++	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x196
++			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x1d6
++			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
++			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
++			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
++			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
++		>;
++	};
++
++	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
++		fsl,pins = <
++			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12	0x1c4
++			MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B	0x1d0
++			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
++		>;
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2
+@@ -0,0 +1,19 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2024 Gateworks Corporation
++ */
++
++/dts-v1/;
++
++#include "imx8mm.dtsi"
++#include "imx8mm-venice-gw700x.dtsi"
++#include "imx8mm-venice-gw82xx.dtsi"
++
++/ {
++	model = "Gateworks Venice GW82xx-0x i.MX8MM Development Kit";
++	compatible = "gw,imx8mm-gw82xx-0x", "fsl,imx8mm";
++
++	chosen {
++		stdout-path = &uart2;
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx-2x.dts
+@@ -0,0 +1,19 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2024 Gateworks Corporation
++ */
++
++/dts-v1/;
++
++#include "imx8mp.dtsi"
++#include "imx8mp-venice-gw702x.dtsi"
++#include "imx8mp-venice-gw82xx.dtsi"
++
++/ {
++	model = "Gateworks Venice GW82xx-2x i.MX8MP Development Kit";
++	compatible = "gateworks,imx8mp-gw82xx-2x", "fsl,imx8mp";
++
++	chosen {
++		stdout-path = &uart2;
++	};
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi
+@@ -0,0 +1,533 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2024 Gateworks Corporation
++ */
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/phy/phy-imx8-pcie.h>
++
++/ {
++	aliases {
++		ethernet1 = &eth1;
++		fsa1 = &fsa0;
++		fsa2 = &fsa1;
++	};
++
++	led-controller {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_gpio_leds>;
++
++		led-0 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_GREEN>;
++			gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++			linux,default-trigger = "heartbeat";
++		};
++
++		led-1 {
++			function = LED_FUNCTION_STATUS;
++			color = <LED_COLOR_ID_RED>;
++			gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
++			default-state = "off";
++		};
++	};
++
++	pcie0_refclk: clock-pcie0 {
++		compatible = "fixed-clock";
++		#clock-cells = <0>;
++		clock-frequency = <100000000>;
++	};
++
++	pps {
++		compatible = "pps-gpio";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_pps>;
++		gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
++	};
++
++	reg_usb2_vbus: regulator-usb2 {
++		compatible = "regulator-fixed";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_reg_usb2_en>;
++		regulator-name = "usb2_vbus";
++		regulator-min-microvolt = <5000000>;
++		regulator-max-microvolt = <5000000>;
++		gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++	};
++
++	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
++		compatible = "regulator-fixed";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
++		regulator-name = "VDD_3V3_SD";
++		regulator-max-microvolt = <3300000>;
++		regulator-min-microvolt = <3300000>;
++		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
++		enable-active-high;
++		off-on-delay-us = <12000>;
++		startup-delay-us = <100>;
++	};
++};
++
++&ecspi2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi2>;
++	cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,	/* CS0 onboard TPM */
++		   <&gpio5 13 GPIO_ACTIVE_LOW>, /* CS1 off-board J32 SPI */
++		   <&gpio1 12 GPIO_ACTIVE_LOW>, /* CS3 off-board J52 FSA1 */
++		   <&gpio4 26 GPIO_ACTIVE_LOW>; /* CS2 off-board J51 FSA2 */
++	status = "okay";
++
++	tpm at 0 {
++		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
++		reg = <0x0>;
++		spi-max-frequency = <10000000>;
++	};
++};
++
++&flexcan1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_can1>;
++	status = "okay";
++};
++
++&flexcan2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_can2>;
++	status = "okay";
++};
++
++&gpio1 {
++	gpio-line-names =
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "fsa2_gpio1", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "", "";
++};
++
++&gpio4 {
++	gpio-line-names =
++		"", "", "", "",
++		"", "", "", "",
++		"dio1", "fsa1_gpio2", "", "dio0",
++		"", "", "", "",
++		"", "", "", "",
++		"", "", "rs485_en", "rs485_term",
++		"fsa2_gpio2", "fsa1_gpio1", "", "rs485_half",
++		"", "", "", "";
++};
++
++&i2c2 {
++	accelerometer at 19 {
++		compatible = "st,lis2de12";
++		reg = <0x19>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_accel>;
++		interrupt-parent = <&gpio4>;
++		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
++		st,drdy-int-pin = <1>;
++	};
++
++	magnetometer at 1e {
++		compatible = "st,lis2mdl";
++		reg = <0x1e>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_mag>;
++		interrupt-parent = <&gpio4>;
++		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
++	};
++};
++
++&i2c3 {
++	i2c-mux at 70 {
++		compatible = "nxp,pca9548";
++		reg = <0x70>;
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		/* J30 */
++		fsa1: i2c at 0 {
++			reg = <0>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&pinctrl_fsa2i2c>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			gpio at 20 {
++				compatible = "nxp,pca9555";
++				reg = <0x20>;
++				interrupt-parent = <&gpio4>;
++				interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
++				interrupt-controller;
++				#interrupt-cells = <2>;
++				gpio-controller;
++				#gpio-cells = <2>;
++			};
++
++			eeprom at 54 {
++				compatible = "atmel,24c02";
++				reg = <0x54>;
++				pagesize = <16>;
++			};
++
++			eeprom at 55 {
++				compatible = "atmel,24c02";
++				reg = <0x55>;
++				pagesize = <16>;
++			};
++		};
++
++		/* J29 */
++		fsa0: i2c at 1 {
++			reg = <1>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&pinctrl_fsa1i2c>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			gpio at 20 {
++				compatible = "nxp,pca9555";
++				reg = <0x20>;
++				interrupt-parent = <&gpio4>;
++				interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
++				interrupt-controller;
++				#interrupt-cells = <2>;
++				gpio-controller;
++				#gpio-cells = <2>;
++			};
++
++			eeprom at 54 {
++				compatible = "atmel,24c02";
++				reg = <0x54>;
++				pagesize = <16>;
++			};
++
++			eeprom at 55 {
++				compatible = "atmel,24c02";
++				reg = <0x55>;
++				pagesize = <16>;
++			};
++		};
++
++		/* J33 */
++		i2c at 2 {
++			reg = <2>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++		};
++	};
++};
++
++&pcie_phy {
++	clocks = <&pcie0_refclk>;
++	clock-names = "ref";
++	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
++	fsl,clkreq-unsupported;
++	status = "okay";
++};
++
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie0>;
++	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
++	status = "okay";
++
++	pcie at 0,0 {
++		reg = <0x0000 0 0 0 0>;
++		device_type = "pci";
++		#address-cells = <3>;
++		#size-cells = <2>;
++		ranges;
++
++		pcie at 0,0 {
++			reg = <0x0000 0 0 0 0>;
++			device_type = "pci";
++			#address-cells = <3>;
++			#size-cells = <2>;
++			ranges;
++
++			pcie at 7,0 {
++				reg = <0x3800 0 0 0 0>;
++				device_type = "pci";
++				#address-cells = <3>;
++				#size-cells = <2>;
++				ranges;
++
++				eth1: ethernet at 0,0 {
++					reg = <0x0000 0 0 0 0>;
++					#address-cells = <3>;
++					#size-cells = <2>;
++					ranges;
++					local-mac-address = [00 00 00 00 00 00];
++				};
++			};
++		};
++	};
++};
++
++/* GPS */
++&uart1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1>;
++	status = "okay";
++};
++
++/* RS232 */
++&uart4 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart4>;
++	status = "okay";
++};
++
++/* USB1 - FSA1 */
++&usb3_0 {
++	fsl,permanently-attached;
++	fsl,disable-port-power-control;
++	status = "okay";
++};
++
++&usb3_phy0 {
++	status = "okay";
++};
++
++&usb_dwc3_0 {
++	dr_mode = "host";
++	status = "okay";
++};
++
++/* USB2 - USB3.0 Hub */
++&usb3_1 {
++	fsl,permanently-attached;
++	fsl,disable-port-power-control;
++	status = "okay";
++};
++
++&usb3_phy1 {
++	vbus-supply = <&reg_usb2_vbus>;
++	status = "okay";
++};
++
++&usb_dwc3_1 {
++	dr_mode = "host";
++	status = "okay";
++};
++
++/* SDIO 1.8V */
++&usdhc1 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc1>;
++	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
++	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
++	bus-width = <4>;
++	non-removable;
++	status = "okay";
++};
++
++/* microSD */
++&usdhc2 {
++	pinctrl-names = "default", "state_100mhz", "state_200mhz";
++	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
++	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
++	cd-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; /* CD is active high */
++	bus-width = <4>;
++	vmmc-supply = <&reg_usdhc2_vmmc>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	pinctrl_hog: hoggrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08	0x40000146 /* DIO1 */
++			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11	0x40000146 /* DIO0 */
++			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x40000106 /* RS485_HALF */
++			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x40000106 /* RS485_EN */
++			MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23	0x40000106 /* RS485_TERM */
++		>;
++	};
++
++	pinctrl_accel: accelgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x150	/* IRQ# */
++		>;
++	};
++
++	pinctrl_can1: can1grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX		0x154
++			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX		0x154
++		>;
++	};
++
++	pinctrl_can2: can2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX		0x154
++			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX		0x154
++		>;
++	};
++
++	pinctrl_gpio_leds: gpioledgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x6	/* LEDG */
++			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x6	/* LEDR */
++		>;
++	};
++
++	pinctrl_fsa1i2c: fsa1i2cgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14	0x1d0		/* FSA1_ALERT# */
++			MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25	0x400001d0	/* FSA1_GPIO1 */
++			MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09	0x400001d0	/* FSA1_GPIO2 */
++		>;
++	};
++
++	pinctrl_fsa2i2c: fsa2i2cgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04	0x1d0		/* FSA2_ALERT# */
++			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13	0x400001d0	/* FSA2_GPIO1 */
++			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24	0x400001d0	/* FSA2_GPIO2 */
++		>;
++	};
++
++	pinctrl_mag: maggrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x140	/* IRQ# */
++		>;
++	};
++
++	pinctrl_pcie0: pcie0grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106	/* PERST# */
++		>;
++	};
++
++	pinctrl_pps: ppsgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x146
++		>;
++	};
++
++	pinctrl_reg_usb2_en: regusb2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x146	/* USBHUB_RST# */
++		>;
++	};
++
++	pinctrl_spi2: spi2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0xd0
++			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0xd0
++			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0xd0
++			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140	/* J32_CS */
++			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10	0x140	/* TPM_CS */
++			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x140	/* FSA1_CS */
++			MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26	0x140	/* FSA2_CS */
++		>;
++	};
++
++	pinctrl_uart1: uart1grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
++			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_uart4: uart4grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX	0x140
++			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140
++		>;
++	};
++
++	pinctrl_usdhc1: usdhc1grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190
++			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0
++			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0
++			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0
++			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0
++			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0
++		>;
++	};
++
++	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x194
++			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d4
++			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d4
++			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d4
++			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d4
++			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d4
++		>;
++	};
++
++	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x196
++			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d6
++			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d6
++			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d6
++			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d6
++			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d6
++		>;
++	};
++
++	pinctrl_usdhc2: usdhc2grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
++		>;
++	};
++
++	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
++		>;
++	};
++
++	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196
++			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6
++			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6
++			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6
++			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6
++			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6
++			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
++		>;
++	};
++
++	pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x1d0
++		>;
++	};
++
++	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
++		fsl,pins = <
++			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4
++		>;
++	};
++};



From lede-commits at lists.infradead.org  Mon Jan 27 01:36:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 04:36:51 -0500
Subject: [openwrt/openwrt]  ramips: restore full switch performance for
 USW-Flex
In-Reply-To: <173797061162.1451949.17070974615274646514@git-01.infra.openwrt.org>
References: <173797061162.1451949.17070974615274646514@git-01.infra.openwrt.org>
Message-ID: <mailman.46376.1737970696.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/62872f8bfd5c8bc80bb014417c6ed8057bbeb773

commit 62872f8bfd5c8bc80bb014417c6ed8057bbeb773
Author: Anders Melchiorsen <amelchio at nogoto.net>
AuthorDate: Wed Jan 22 21:54:57 2025 +0100

    ramips: restore full switch performance for USW-Flex
    
    Since commit f1c9afd80138 ("ramips: mt7621-dts: mux phy0/4 to gmac1") the
    USW-Flex lan1 port has been attached directly to the CPU. This improves
    routing performance but hinders switching.
    
    This is a generally accepted trade-off in that commit but for USW-Flex it
    is a questionable choice. This switch is designed to deliver PoE to remote
    places and using it as a router is unlikely. Meanwhile, the lan1 port is
    also PoE-in and will often be the uplink, carrying most of the traffic.
    
    Reverting f1c9afd80138 for USW-Flex restores full 1 Gbps switching
    performance on all ports.
    
    Signed-off-by: Anders Melchiorsen <amelchio at nogoto.net>
    Link: https://github.com/openwrt/openwrt/pull/17703
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
index f2fb48cac2..f548f1f9b7 100644
--- a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
+++ b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
@@ -64,19 +64,6 @@
 	label = "dsa";
 };
 
-&gmac1 {
-	status = "okay";
-	label = "lan1";
-	phy-handle = <&ethphy4>;
-
-	nvmem-cells = <&macaddr_eeprom>;
-	nvmem-cell-names = "mac-address";
-};
-
-&ethphy4 {
-	/delete-property/ interrupts;
-};
-
 &switch0 {
 	ports {
 		port at 0 {
@@ -98,6 +85,11 @@
 			status = "okay";
 			label = "lan2";
 		};
+
+                port at 4 {
+                        status = "okay";
+                        label = "lan1";
+                };
 	};
 };
 



From lede-commits at lists.infradead.org  Mon Jan 27 02:11:13 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 05:11:13 -0500
Subject: [openwrt/openwrt]  airoha: an7581: refresh and fix cpufreq patch
In-Reply-To: <173797267320.1491058.7086626293604410715@git-01.infra.openwrt.org>
References: <173797267320.1491058.7086626293604410715@git-01.infra.openwrt.org>
Message-ID: <mailman.46399.1737972681.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/fbbfcbf150cd7c72f49c149e7f9b9f4d0bf43e4b

commit fbbfcbf150cd7c72f49c149e7f9b9f4d0bf43e4b
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 11:07:13 2025 +0100

    airoha: an7581: refresh and fix cpufreq patch
    
    Refresh cpufreq with merged upstream version. Also fix the PM Domain
    rebased patch to correctly expose the symbol for non Mediatek target.
    
    Update dtsi with new pm domain name.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/airoha/an7581/config-6.6              |  1 +
 target/linux/airoha/dts/an7581.dtsi                |  8 ++--
 ...q-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch} | 47 +++++-------------
 ...-airoha-Add-Airoha-CPU-PM-Domain-support.patch} | 55 ++++++++++------------
 4 files changed, 43 insertions(+), 68 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index f80bf49f8c..d86aa8bbbb 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -1,4 +1,5 @@
 CONFIG_64BIT=y
+CONFIG_AIROHA_CPU_PM_DOMAIN=y
 CONFIG_AIROHA_THERMAL=y
 CONFIG_AIROHA_WATCHDOG=y
 CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 820ab0bfa8..2b4c1b716b 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -81,7 +81,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -95,7 +95,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -109,7 +109,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -123,7 +123,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
diff --git a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch b/target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
similarity index 83%
rename from target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
rename to target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
index 6a2e54f4d1..0db82d55e1 100644
--- a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
+++ b/target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
@@ -1,7 +1,7 @@
-From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
+From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+Date: Thu, 9 Jan 2025 14:12:58 +0100
+Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
 
 Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
 frequency scaling with SMC APIs and register a generic "cpufreq-dt"
@@ -14,29 +14,8 @@ Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
 driver is needed with OPP v2 nodes declared in DTS.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar at linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
-Changes v8:
-- Split in dedicated PM domain driver
-Changes v7:
-- No changes
-Changes v6:
-- Improve Kconfig depends logic
-- Select PM (PM_GENERIC_DOMAINS depends on it)
-- Drop (int) cast for 
-Changes v5:
-- Rename cpu_pd to perf for power domain name
-- Use remove instead of remove_new
-Changes v4:
-- Rework to clk-only + PM set_performance_state implementation
-Changes v3:
-- Adapt to new cpufreq-dt APIs
-- Register cpufreq-dt instead of custom freq driver
-Changes v2:
-- Fix kernel bot error with missing slab.h and bitfield.h header
-- Limit COMPILE_TEST to ARM64 due to smcc 1.2
-
  drivers/cpufreq/Kconfig.arm          |   8 ++
  drivers/cpufreq/Makefile             |   1 +
  drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
@@ -104,11 +83,15 @@ Changes v2:
 +}
 +
 +static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
-+static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
++static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
 +
 +static int airoha_cpufreq_probe(struct platform_device *pdev)
 +{
-+	struct dev_pm_opp_config config = { };
++	struct dev_pm_opp_config config = {
++		.clk_names = airoha_cpufreq_clk_names,
++		.config_clks = airoha_cpufreq_config_clks_nop,
++		.genpd_names = airoha_cpufreq_pd_names,
++	};
 +	struct platform_device *cpufreq_dt;
 +	struct airoha_cpufreq_priv *priv;
 +	struct device *dev = &pdev->dev;
@@ -125,18 +108,14 @@ Changes v2:
 +	if (!priv)
 +		return -ENOMEM;
 +
-+	config.clk_names = airoha_cpufreq_clk_names;
-+	config.config_clks = airoha_cpufreq_config_clks_nop;
-+	config.genpd_names = airoha_cpufreq_genpd_names;
-+	config.virt_devs = &virt_devs;
-+
++	/* Set OPP table conf with NOP config_clks */
 +	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
 +	if (priv->opp_token < 0)
 +		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
 +
 +	/* Set Attached PM for OPP ACTIVE */
 +	if (virt_devs) {
-+		const char * const *name = airoha_cpufreq_genpd_names;
++		const char * const *name = airoha_cpufreq_pd_names;
 +		int i, j;
 +
 +		for (i = 0; *name; i++, name++) {
@@ -177,7 +156,7 @@ Changes v2:
 +static void airoha_cpufreq_remove(struct platform_device *pdev)
 +{
 +	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
-+	const char * const *name = airoha_cpufreq_genpd_names;
++	const char * const *name = airoha_cpufreq_pd_names;
 +	int i;
 +
 +	platform_device_unregister(priv->cpufreq_dt);
diff --git a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch b/target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
similarity index 83%
rename from target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
rename to target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
index 52d3f40b36..8dc8a3d304 100644
--- a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
+++ b/target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
@@ -1,7 +1,7 @@
-From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
+From 82e703dd438b71432cc0ccbb90925d1e32dd014a Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Sat, 4 Jan 2025 19:03:09 +0100
-Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
+Date: Thu, 9 Jan 2025 14:12:57 +0100
+Subject: [PATCH] pmdomain: airoha: Add Airoha CPU PM Domain support
 
 Add Airoha CPU PM Domain support to control frequency and power of CPU
 present on Airoha EN7581 SoC.
@@ -11,25 +11,21 @@ passing the performance state. The driver also expose a read-only clock
 that expose the current CPU frequency with SMC command.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250109131313.32317-1-ansuelsmth at gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change)
-Changes v8:
-- Add this patch
-- Use SMC invoke instead of 1.2
-
- drivers/pmdomain/mediatek/Kconfig             |  11 ++
+ drivers/pmdomain/mediatek/Kconfig             |  12 ++
  drivers/pmdomain/mediatek/Makefile            |   1 +
  .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
- 3 files changed, 156 insertions(+)
+ 3 files changed, 157 insertions(+)
  create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
 
 --- a/drivers/soc/mediatek/Kconfig
 +++ b/drivers/soc/mediatek/Kconfig
-@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
- 	  Control Processor System (SCPSYS) has several power management related
- 	  tasks in the system.
- 
+@@ -2,6 +2,17 @@
+ #
+ # MediaTek SoC drivers
+ #
 +config AIROHA_CPU_PM_DOMAIN
 +	tristate "Airoha CPU power domain"
 +	default ARCH_AIROHA
@@ -41,9 +37,9 @@ Changes v8:
 +	  CPU frequency and power is controlled by ATF with SMC command to
 +	  set performance states.
 +
- config MTK_MMSYS
- 	tristate "MediaTek MMSYS Support"
- 	default ARCH_MEDIATEK
+ menu "MediaTek SoC drivers"
+ 	depends on ARCH_MEDIATEK || COMPILE_TEST
+ 
 --- a/drivers/pmdomain/mediatek/Makefile
 +++ b/drivers/pmdomain/mediatek/Makefile
 @@ -1,3 +1,4 @@
@@ -53,7 +49,7 @@ Changes v8:
 +obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
 --- /dev/null
 +++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,144 @@
 +// SPDX-License-Identifier: GPL-2.0
 +
 +#include <linux/arm-smccc.h>
@@ -123,9 +119,13 @@ Changes v8:
 +{
 +	struct airoha_cpu_pmdomain_priv *priv;
 +	struct device *dev = &pdev->dev;
-+	struct clk_init_data init = { };
++	const struct clk_init_data init = {
++		.name = "cpu",
++		.ops = &airoha_cpu_pmdomain_clk_ops,
++		/* Clock with no set_rate, can't cache */
++		.flags = CLK_GET_RATE_NOCACHE,
++	};
 +	struct generic_pm_domain *pd;
-+	struct clk_hw *hw;
 +	int ret;
 +
 +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -133,18 +133,13 @@ Changes v8:
 +		return -ENOMEM;
 +
 +	/* Init and register a get-only clk for Cpufreq */
-+	init.name = "cpu";
-+	init.ops = &airoha_cpu_pmdomain_clk_ops;
-+	/* Clock with no set_rate, can't cache */
-+	init.flags = CLK_GET_RATE_NOCACHE;
-+
-+	hw = &priv->hw;
-+	hw->init = &init;
-+	ret = devm_clk_hw_register(dev, hw);
++	priv->hw.init = &init;
++	ret = devm_clk_hw_register(dev, &priv->hw);
 +	if (ret)
 +		return ret;
 +
-+	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
++					  &priv->hw);
 +	if (ret)
 +		return ret;
 +



From lede-commits at lists.infradead.org  Mon Jan 27 02:11:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 05:11:51 -0500
Subject: [openwrt/openwrt]  airoha: an7581: refresh and fix cpufreq patch
In-Reply-To: <173797271107.1491749.5729859180487493428@git-01.infra.openwrt.org>
References: <173797271107.1491749.5729859180487493428@git-01.infra.openwrt.org>
Message-ID: <mailman.46400.1737972715.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/ea66541032b6dab9f53551b983c7a39d283207ef

commit ea66541032b6dab9f53551b983c7a39d283207ef
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 11:07:13 2025 +0100

    airoha: an7581: refresh and fix cpufreq patch
    
    Refresh cpufreq with merged upstream version. Also fix the PM Domain
    rebased patch to correctly expose the symbol for non Mediatek target.
    
    Update dtsi with new pm domain name.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit fbbfcbf150cd7c72f49c149e7f9b9f4d0bf43e4b)
---
 target/linux/airoha/an7581/config-6.6              |  1 +
 target/linux/airoha/dts/an7581.dtsi                |  8 ++--
 ...q-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch} | 47 +++++-------------
 ...-airoha-Add-Airoha-CPU-PM-Domain-support.patch} | 55 ++++++++++------------
 4 files changed, 43 insertions(+), 68 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index f80bf49f8c..d86aa8bbbb 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -1,4 +1,5 @@
 CONFIG_64BIT=y
+CONFIG_AIROHA_CPU_PM_DOMAIN=y
 CONFIG_AIROHA_THERMAL=y
 CONFIG_AIROHA_WATCHDOG=y
 CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 820ab0bfa8..2b4c1b716b 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -81,7 +81,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -95,7 +95,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -109,7 +109,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
@@ -123,7 +123,7 @@
 			clocks = <&cpufreq>;
 			clock-names = "cpu";
 			power-domains = <&cpufreq>;
-			power-domain-names = "cpu_pd";
+			power-domain-names = "perf";
 			next-level-cache = <&l2>;
 			#cooling-cells = <2>;
 		};
diff --git a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch b/target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
similarity index 83%
rename from target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
rename to target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
index 6a2e54f4d1..0db82d55e1 100644
--- a/target/linux/airoha/patches-6.6/100-02-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
+++ b/target/linux/airoha/patches-6.6/039-v6.14-cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver.patch
@@ -1,7 +1,7 @@
-From fa27cb99b297a1a9c0a5824afe5a670e424fff61 Mon Sep 17 00:00:00 2001
+From 84cf9e541cccb8cb698518a9897942e8c78f1d83 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 16 Oct 2024 18:00:57 +0200
-Subject: [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
+Date: Thu, 9 Jan 2025 14:12:58 +0100
+Subject: [PATCH] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
 
 Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
 frequency scaling with SMC APIs and register a generic "cpufreq-dt"
@@ -14,29 +14,8 @@ Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
 driver is needed with OPP v2 nodes declared in DTS.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Signed-off-by: Viresh Kumar <viresh.kumar at linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
-Changes v8:
-- Split in dedicated PM domain driver
-Changes v7:
-- No changes
-Changes v6:
-- Improve Kconfig depends logic
-- Select PM (PM_GENERIC_DOMAINS depends on it)
-- Drop (int) cast for 
-Changes v5:
-- Rename cpu_pd to perf for power domain name
-- Use remove instead of remove_new
-Changes v4:
-- Rework to clk-only + PM set_performance_state implementation
-Changes v3:
-- Adapt to new cpufreq-dt APIs
-- Register cpufreq-dt instead of custom freq driver
-Changes v2:
-- Fix kernel bot error with missing slab.h and bitfield.h header
-- Limit COMPILE_TEST to ARM64 due to smcc 1.2
-
  drivers/cpufreq/Kconfig.arm          |   8 ++
  drivers/cpufreq/Makefile             |   1 +
  drivers/cpufreq/airoha-cpufreq.c     | 152 +++++++++++++++++++++++++++
@@ -104,11 +83,15 @@ Changes v2:
 +}
 +
 +static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
-+static const char * const airoha_cpufreq_genpd_names[] = { "cpu_pd", NULL };
++static const char * const airoha_cpufreq_pd_names[] = { "perf", NULL };
 +
 +static int airoha_cpufreq_probe(struct platform_device *pdev)
 +{
-+	struct dev_pm_opp_config config = { };
++	struct dev_pm_opp_config config = {
++		.clk_names = airoha_cpufreq_clk_names,
++		.config_clks = airoha_cpufreq_config_clks_nop,
++		.genpd_names = airoha_cpufreq_pd_names,
++	};
 +	struct platform_device *cpufreq_dt;
 +	struct airoha_cpufreq_priv *priv;
 +	struct device *dev = &pdev->dev;
@@ -125,18 +108,14 @@ Changes v2:
 +	if (!priv)
 +		return -ENOMEM;
 +
-+	config.clk_names = airoha_cpufreq_clk_names;
-+	config.config_clks = airoha_cpufreq_config_clks_nop;
-+	config.genpd_names = airoha_cpufreq_genpd_names;
-+	config.virt_devs = &virt_devs;
-+
++	/* Set OPP table conf with NOP config_clks */
 +	priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
 +	if (priv->opp_token < 0)
 +		return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
 +
 +	/* Set Attached PM for OPP ACTIVE */
 +	if (virt_devs) {
-+		const char * const *name = airoha_cpufreq_genpd_names;
++		const char * const *name = airoha_cpufreq_pd_names;
 +		int i, j;
 +
 +		for (i = 0; *name; i++, name++) {
@@ -177,7 +156,7 @@ Changes v2:
 +static void airoha_cpufreq_remove(struct platform_device *pdev)
 +{
 +	struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
-+	const char * const *name = airoha_cpufreq_genpd_names;
++	const char * const *name = airoha_cpufreq_pd_names;
 +	int i;
 +
 +	platform_device_unregister(priv->cpufreq_dt);
diff --git a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch b/target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
similarity index 83%
rename from target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
rename to target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
index 52d3f40b36..8dc8a3d304 100644
--- a/target/linux/airoha/patches-6.6/100-01-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
+++ b/target/linux/airoha/patches-6.6/040-v6.14-pmdomain-airoha-Add-Airoha-CPU-PM-Domain-support.patch
@@ -1,7 +1,7 @@
-From 76e4e6ce9aaae897f80e375345bf0095e1b09ff2 Mon Sep 17 00:00:00 2001
+From 82e703dd438b71432cc0ccbb90925d1e32dd014a Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Sat, 4 Jan 2025 19:03:09 +0100
-Subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
+Date: Thu, 9 Jan 2025 14:12:57 +0100
+Subject: [PATCH] pmdomain: airoha: Add Airoha CPU PM Domain support
 
 Add Airoha CPU PM Domain support to control frequency and power of CPU
 present on Airoha EN7581 SoC.
@@ -11,25 +11,21 @@ passing the performance state. The driver also expose a read-only clock
 that expose the current CPU frequency with SMC command.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250109131313.32317-1-ansuelsmth at gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson at linaro.org>
 ---
-Changes v9:
-- Fix compile error targetting wrong branch (remove_new change)
-Changes v8:
-- Add this patch
-- Use SMC invoke instead of 1.2
-
- drivers/pmdomain/mediatek/Kconfig             |  11 ++
+ drivers/pmdomain/mediatek/Kconfig             |  12 ++
  drivers/pmdomain/mediatek/Makefile            |   1 +
  .../pmdomain/mediatek/airoha-cpu-pmdomain.c   | 144 ++++++++++++++++++
- 3 files changed, 156 insertions(+)
+ 3 files changed, 157 insertions(+)
  create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
 
 --- a/drivers/soc/mediatek/Kconfig
 +++ b/drivers/soc/mediatek/Kconfig
-@@ -72,6 +72,17 @@ config MTK_SCPSYS_PM_DOMAINS
- 	  Control Processor System (SCPSYS) has several power management related
- 	  tasks in the system.
- 
+@@ -2,6 +2,17 @@
+ #
+ # MediaTek SoC drivers
+ #
 +config AIROHA_CPU_PM_DOMAIN
 +	tristate "Airoha CPU power domain"
 +	default ARCH_AIROHA
@@ -41,9 +37,9 @@ Changes v8:
 +	  CPU frequency and power is controlled by ATF with SMC command to
 +	  set performance states.
 +
- config MTK_MMSYS
- 	tristate "MediaTek MMSYS Support"
- 	default ARCH_MEDIATEK
+ menu "MediaTek SoC drivers"
+ 	depends on ARCH_MEDIATEK || COMPILE_TEST
+ 
 --- a/drivers/pmdomain/mediatek/Makefile
 +++ b/drivers/pmdomain/mediatek/Makefile
 @@ -1,3 +1,4 @@
@@ -53,7 +49,7 @@ Changes v8:
 +obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) 	+= airoha-cpu-pmdomain.o
 --- /dev/null
 +++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,144 @@
 +// SPDX-License-Identifier: GPL-2.0
 +
 +#include <linux/arm-smccc.h>
@@ -123,9 +119,13 @@ Changes v8:
 +{
 +	struct airoha_cpu_pmdomain_priv *priv;
 +	struct device *dev = &pdev->dev;
-+	struct clk_init_data init = { };
++	const struct clk_init_data init = {
++		.name = "cpu",
++		.ops = &airoha_cpu_pmdomain_clk_ops,
++		/* Clock with no set_rate, can't cache */
++		.flags = CLK_GET_RATE_NOCACHE,
++	};
 +	struct generic_pm_domain *pd;
-+	struct clk_hw *hw;
 +	int ret;
 +
 +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -133,18 +133,13 @@ Changes v8:
 +		return -ENOMEM;
 +
 +	/* Init and register a get-only clk for Cpufreq */
-+	init.name = "cpu";
-+	init.ops = &airoha_cpu_pmdomain_clk_ops;
-+	/* Clock with no set_rate, can't cache */
-+	init.flags = CLK_GET_RATE_NOCACHE;
-+
-+	hw = &priv->hw;
-+	hw->init = &init;
-+	ret = devm_clk_hw_register(dev, hw);
++	priv->hw.init = &init;
++	ret = devm_clk_hw_register(dev, &priv->hw);
 +	if (ret)
 +		return ret;
 +
-+	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
++	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
++					  &priv->hw);
 +	if (ret)
 +		return ret;
 +



From lede-commits at lists.infradead.org  Mon Jan 27 03:03:56 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:03:56 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace eMMC support with upstream
 version
In-Reply-To: <173797583695.1566009.17326811154329567086@git-01.infra.openwrt.org>
References: <173797583695.1566009.17326811154329567086@git-01.infra.openwrt.org>
Message-ID: <mailman.46426.1737975843.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/b7edf88b0fe15b32be802c7de54036ff8e66dcc1

commit b7edf88b0fe15b32be802c7de54036ff8e66dcc1
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 12:02:24 2025 +0100

    airoha: an7581: replace eMMC support with upstream version
    
    Replace eMMC support with upstream version where we declare dummy clock
    and dummy regulator instead of a specific compatible. Also drop the
    downstream patch for it.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 target/linux/airoha/an7581/config-6.6              |   2 +
 target/linux/airoha/dts/an7581-evb-emmc.dts        |   3 +-
 target/linux/airoha/dts/an7581.dtsi                |  23 +++-
 ...mc-mtk-sd-add-support-for-AN7581-MMC-Host.patch | 136 ---------------------
 4 files changed, 24 insertions(+), 140 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index d86aa8bbbb..812dcd76bb 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -496,6 +496,8 @@ CONFIG_RATIONAL=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RELOCATABLE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y
diff --git a/target/linux/airoha/dts/an7581-evb-emmc.dts b/target/linux/airoha/dts/an7581-evb-emmc.dts
index 91d7977795..26d446e2a1 100644
--- a/target/linux/airoha/dts/an7581-evb-emmc.dts
+++ b/target/linux/airoha/dts/an7581-evb-emmc.dts
@@ -100,8 +100,9 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
 	status = "okay";
 
 	#address-cells = <1>;
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 2b4c1b716b..762a6aa1a8 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -332,6 +332,21 @@
 		};
 	};
 
+	clk25m: oscillator {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+		clock-output-names = "clkxtal";
+	};
+
+	vmmc_3v3: regulator-vmmc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -535,13 +550,15 @@
 		};
 
 		mmc0: mmc at 1fa0e000 {
-			compatible = "airoha,an7581-mmc";
+			compatible = "mediatek,mt7622-mmc";
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&scuclk EN7581_CLK_EMMC>;
-			clock-names = "source";			bus-width = <4>;
+			clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
+			clock-names = "source", "hclk";
+			bus-width = <4>;
 			max-frequency = <52000000>;
+			vmmc-supply = <&vmmc_3v3>;
 			disable-wp;
 			cap-mmc-highspeed;
 			non-removable;
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
deleted file mode 100644
index d116bb9ee0..0000000000
--- a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 11:27:10 +0100
-Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
-
-Add support for AN7581 MMC Host. The MMC Host controller is based on
-mt7622 with the difference of not having regulator supply and state_uhs
-pins and hclk clock.
-
-Some minor fixes are applied to check if the state_uhs pins are defined
-and make hclk optional for the new airoha compatible.
-
-Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
----
- drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
- 1 file changed, 46 insertions(+), 9 deletions(-)
-
---- a/drivers/mmc/host/mtk-sd.c
-+++ b/drivers/mmc/host/mtk-sd.c
-@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
- 	.stop_clk_fix = true,
- };
- 
-+static const struct mtk_mmc_compatible an7581_compat = {
-+	.clk_div_bits = 12,
-+	.recheck_sdio_irq = true,
-+	.hs400_tune = false,
-+	.pad_tune_reg = MSDC_PAD_TUNE0,
-+	.async_fifo = true,
-+	.data_tune = true,
-+	.busy_check = true,
-+	.stop_clk_fix = true,
-+	.enhance_rx = true,
-+	.support_64g = false,
-+};
-+
- static const struct of_device_id msdc_of_ids[] = {
- 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
- 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
-@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
- 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
- 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
- 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
--
-+	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
- 	{}
- };
- MODULE_DEVICE_TABLE(of, msdc_of_ids);
-@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
- 	struct msdc_host *host = mmc_priv(mmc);
- 	int ret;
- 
-+	/* Skip setting supply if not supported */
-+	if (!mmc->supply.vqmmc)
-+		return 0;
-+
- 	if (!IS_ERR(mmc->supply.vqmmc)) {
- 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
- 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
-@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
- 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
- 			}
- 
--			pinctrl_select_state(host->pinctrl, host->pins_uhs);
-+			/* Skip setting uhs pins if not supported */
-+			if (host->pins_uhs)
-+				pinctrl_select_state(host->pinctrl, host->pins_uhs);
- 		} else {
- 			dev_pm_clear_wake_irq(host->dev);
- 		}
-@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
- 
- 	msdc_set_buswidth(host, ios->bus_width);
- 
-+	/* Skip regulator if not supported */
-+	if (!mmc->supply.vmmc)
-+		goto skip_regulator;
-+
- 	/* Suspend/Resume will do power off/on */
- 	switch (ios->power_mode) {
- 	case MMC_POWER_UP:
-@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
- 		break;
- 	}
- 
-+skip_regulator:
- 	if (host->mclk != ios->clock || host->timing != ios->timing)
- 		msdc_set_mclk(host, ios->timing, ios->clock);
- }
-@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
- 	if (IS_ERR(host->src_clk))
- 		return PTR_ERR(host->src_clk);
- 
--	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
--	if (IS_ERR(host->h_clk))
--		return PTR_ERR(host->h_clk);
-+	/* AN7581 SoC doesn't have hclk */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
-+		if (IS_ERR(host->h_clk))
-+			return PTR_ERR(host->h_clk);
-+	}
- 
- 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
- 	if (IS_ERR(host->bus_clk))
-@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
- 		return PTR_ERR(host->pins_default);
- 	}
- 
--	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
--	if (IS_ERR(host->pins_uhs)) {
--		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
--		return PTR_ERR(host->pins_uhs);
-+	/* AN7581 doesn't have state_uhs pins */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
-+		if (IS_ERR(host->pins_uhs)) {
-+			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+			return PTR_ERR(host->pins_uhs);
-+		}
- 	}
- 
- 	/* Support for SDIO eint irq ? */
-@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
- 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- 		goto release_clk;
- 	}
-+
-+	/* AN7581 without regulator require tune to OCR values */
-+	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
-+	    !mmc->ocr_avail)
-+		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
-+
- 	msdc_init_hw(host);
- 
- 	if (mmc->caps2 & MMC_CAP2_CQE) {



From lede-commits at lists.infradead.org  Mon Jan 27 03:04:19 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:04:19 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace eMMC support with upstream
 version
In-Reply-To: <173797585918.1567782.3220796672512999643@git-01.infra.openwrt.org>
References: <173797585918.1567782.3220796672512999643@git-01.infra.openwrt.org>
Message-ID: <mailman.46427.1737975862.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/077a8690347d48cf2b54cb4bde7e29a7df3d26f4

commit 077a8690347d48cf2b54cb4bde7e29a7df3d26f4
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 12:02:24 2025 +0100

    airoha: an7581: replace eMMC support with upstream version
    
    Replace eMMC support with upstream version where we declare dummy clock
    and dummy regulator instead of a specific compatible. Also drop the
    downstream patch for it.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit b7edf88b0fe15b32be802c7de54036ff8e66dcc1)
---
 target/linux/airoha/an7581/config-6.6              |   2 +
 target/linux/airoha/dts/an7581-evb-emmc.dts        |   3 +-
 target/linux/airoha/dts/an7581.dtsi                |  23 +++-
 ...mc-mtk-sd-add-support-for-AN7581-MMC-Host.patch | 136 ---------------------
 4 files changed, 24 insertions(+), 140 deletions(-)

diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6
index d86aa8bbbb..812dcd76bb 100644
--- a/target/linux/airoha/an7581/config-6.6
+++ b/target/linux/airoha/an7581/config-6.6
@@ -496,6 +496,8 @@ CONFIG_RATIONAL=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_RELOCATABLE=y
 CONFIG_RESET_CONTROLLER=y
 CONFIG_RFS_ACCEL=y
diff --git a/target/linux/airoha/dts/an7581-evb-emmc.dts b/target/linux/airoha/dts/an7581-evb-emmc.dts
index 91d7977795..26d446e2a1 100644
--- a/target/linux/airoha/dts/an7581-evb-emmc.dts
+++ b/target/linux/airoha/dts/an7581-evb-emmc.dts
@@ -100,8 +100,9 @@
 };
 
 &mmc0 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
 	status = "okay";
 
 	#address-cells = <1>;
diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
index 2b4c1b716b..762a6aa1a8 100644
--- a/target/linux/airoha/dts/an7581.dtsi
+++ b/target/linux/airoha/dts/an7581.dtsi
@@ -332,6 +332,21 @@
 		};
 	};
 
+	clk25m: oscillator {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+		clock-output-names = "clkxtal";
+	};
+
+	vmmc_3v3: regulator-vmmc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -535,13 +550,15 @@
 		};
 
 		mmc0: mmc at 1fa0e000 {
-			compatible = "airoha,an7581-mmc";
+			compatible = "mediatek,mt7622-mmc";
 			reg = <0x0 0x1fa0e000 0x0 0x1000>,
 			      <0x0 0x1fa0c000 0x0 0x60>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&scuclk EN7581_CLK_EMMC>;
-			clock-names = "source";			bus-width = <4>;
+			clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
+			clock-names = "source", "hclk";
+			bus-width = <4>;
 			max-frequency = <52000000>;
+			vmmc-supply = <&vmmc_3v3>;
 			disable-wp;
 			cap-mmc-highspeed;
 			non-removable;
diff --git a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch b/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
deleted file mode 100644
index d116bb9ee0..0000000000
--- a/target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 11:27:10 +0100
-Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
-
-Add support for AN7581 MMC Host. The MMC Host controller is based on
-mt7622 with the difference of not having regulator supply and state_uhs
-pins and hclk clock.
-
-Some minor fixes are applied to check if the state_uhs pins are defined
-and make hclk optional for the new airoha compatible.
-
-Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
----
- drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
- 1 file changed, 46 insertions(+), 9 deletions(-)
-
---- a/drivers/mmc/host/mtk-sd.c
-+++ b/drivers/mmc/host/mtk-sd.c
-@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
- 	.stop_clk_fix = true,
- };
- 
-+static const struct mtk_mmc_compatible an7581_compat = {
-+	.clk_div_bits = 12,
-+	.recheck_sdio_irq = true,
-+	.hs400_tune = false,
-+	.pad_tune_reg = MSDC_PAD_TUNE0,
-+	.async_fifo = true,
-+	.data_tune = true,
-+	.busy_check = true,
-+	.stop_clk_fix = true,
-+	.enhance_rx = true,
-+	.support_64g = false,
-+};
-+
- static const struct of_device_id msdc_of_ids[] = {
- 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
- 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
-@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
- 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
- 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
- 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
--
-+	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
- 	{}
- };
- MODULE_DEVICE_TABLE(of, msdc_of_ids);
-@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
- 	struct msdc_host *host = mmc_priv(mmc);
- 	int ret;
- 
-+	/* Skip setting supply if not supported */
-+	if (!mmc->supply.vqmmc)
-+		return 0;
-+
- 	if (!IS_ERR(mmc->supply.vqmmc)) {
- 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
- 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
-@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
- 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
- 			}
- 
--			pinctrl_select_state(host->pinctrl, host->pins_uhs);
-+			/* Skip setting uhs pins if not supported */
-+			if (host->pins_uhs)
-+				pinctrl_select_state(host->pinctrl, host->pins_uhs);
- 		} else {
- 			dev_pm_clear_wake_irq(host->dev);
- 		}
-@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
- 
- 	msdc_set_buswidth(host, ios->bus_width);
- 
-+	/* Skip regulator if not supported */
-+	if (!mmc->supply.vmmc)
-+		goto skip_regulator;
-+
- 	/* Suspend/Resume will do power off/on */
- 	switch (ios->power_mode) {
- 	case MMC_POWER_UP:
-@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
- 		break;
- 	}
- 
-+skip_regulator:
- 	if (host->mclk != ios->clock || host->timing != ios->timing)
- 		msdc_set_mclk(host, ios->timing, ios->clock);
- }
-@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
- 	if (IS_ERR(host->src_clk))
- 		return PTR_ERR(host->src_clk);
- 
--	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
--	if (IS_ERR(host->h_clk))
--		return PTR_ERR(host->h_clk);
-+	/* AN7581 SoC doesn't have hclk */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
-+		if (IS_ERR(host->h_clk))
-+			return PTR_ERR(host->h_clk);
-+	}
- 
- 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
- 	if (IS_ERR(host->bus_clk))
-@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
- 		return PTR_ERR(host->pins_default);
- 	}
- 
--	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
--	if (IS_ERR(host->pins_uhs)) {
--		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
--		return PTR_ERR(host->pins_uhs);
-+	/* AN7581 doesn't have state_uhs pins */
-+	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
-+		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
-+		if (IS_ERR(host->pins_uhs)) {
-+			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+			return PTR_ERR(host->pins_uhs);
-+		}
- 	}
- 
- 	/* Support for SDIO eint irq ? */
-@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
- 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- 		goto release_clk;
- 	}
-+
-+	/* AN7581 without regulator require tune to OCR values */
-+	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
-+	    !mmc->ocr_avail)
-+		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
-+
- 	msdc_init_hw(host);
- 
- 	if (mmc->caps2 & MMC_CAP2_CQE) {



From lede-commits at lists.infradead.org  Mon Jan 27 03:15:18 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:15:18 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace clock patch with upstream
 version
In-Reply-To: <173797651851.1589080.3252959762944623075@git-01.infra.openwrt.org>
References: <173797651851.1589080.3252959762944623075@git-01.infra.openwrt.org>
Message-ID: <mailman.46433.1737976522.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/a9b408a97f7bf8b1f98f355fefe3c9bfc959d5a6

commit a9b408a97f7bf8b1f98f355fefe3c9bfc959d5a6
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 12:14:28 2025 +0100

    airoha: an7581: replace clock patch with upstream version
    
    Replace clock patch for eMMC with upstream version to add the tag and
    flag them as upstreamed.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...-en7523-Rework-clock-handling-for-different-clock.patch} | 13 +++++++------
 ...-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch} |  7 +++++--
 ...6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch} |  6 ++++--
 ...04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch} |  6 ++++--
 4 files changed, 20 insertions(+), 12 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
similarity index 87%
rename from target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
rename to target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
index 187715a5cc..96d2bbf28e 100644
--- a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
+++ b/target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -1,6 +1,6 @@
-From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 18 Dec 2024 10:03:45 +0100
+Date: Tue, 14 Jan 2025 00:10:02 +0100
 Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
  numbers
 
@@ -12,6 +12,8 @@ clocks number in match_data and alloca clk_data based on the compatible
 match_data.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 14 ++++++++------
  1 file changed, 8 insertions(+), 6 deletions(-)
@@ -44,7 +46,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  }
  
  static int en7523_reset_update(struct reset_controller_dev *rcdev,
-@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
  	struct clk_hw_onecell_data *clk_data;
  	int r;
  
@@ -58,12 +60,11 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  		return -ENOMEM;
  
 -	soc_data = device_get_match_data(&pdev->dev);
++	clk_data->num = soc_data->num_clocks;
  	r = soc_data->hw_init(pdev, clk_data);
  	if (r)
  		return r;
- 
-+	clk_data->num = soc_data->num_clocks;
- 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
  }
  
  static const struct en_clk_soc_data en7523_data = {
diff --git a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
similarity index 69%
rename from target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
index e858d8b77d..5db79a4748 100644
--- a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
@@ -1,6 +1,6 @@
-From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Thu, 19 Dec 2024 13:13:37 +0100
+Date: Tue, 14 Jan 2025 00:10:03 +0100
 Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
 
 Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
@@ -8,6 +8,9 @@ should not be placed here. Value is derived internally in the user
 driver.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 --
  1 file changed, 2 deletions(-)
diff --git a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
similarity index 74%
rename from target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
index 7bc987f420..a3f0c9e6fe 100644
--- a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
@@ -1,6 +1,6 @@
-From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 12:22:37 +0100
+Date: Tue, 14 Jan 2025 00:10:04 +0100
 Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
 
 Add ID for eMMC for EN7581. This is to control clock selection of eMMC
@@ -8,6 +8,8 @@ between 200MHz and 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 Acked-by: Conor Dooley <conor.dooley at microchip.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 ++
  1 file changed, 2 insertions(+)
diff --git a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
similarity index 84%
rename from target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
index 64d5339176..6c8a3300be 100644
--- a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
@@ -1,12 +1,14 @@
-From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 12:22:38 +0100
+Date: Tue, 14 Jan 2025 00:10:05 +0100
 Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
 
 Add clock for eMMC for EN7581. This is used to give info of the current
 eMMC source clock and to switch it from 200MHz or 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 10 ++++++++++
  1 file changed, 10 insertions(+)



From lede-commits at lists.infradead.org  Mon Jan 27 03:15:49 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:15:49 -0500
Subject: [openwrt/openwrt]  airoha: an7581: replace clock patch with upstream
 version
In-Reply-To: <173797654951.1589763.56866912085798441@git-01.infra.openwrt.org>
References: <173797654951.1589763.56866912085798441@git-01.infra.openwrt.org>
Message-ID: <mailman.46436.1737976552.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/2bff6e490a8cb5af1504a8975df5aa1208e7b9f5

commit 2bff6e490a8cb5af1504a8975df5aa1208e7b9f5
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Mon Jan 27 12:14:28 2025 +0100

    airoha: an7581: replace clock patch with upstream version
    
    Replace clock patch for eMMC with upstream version to add the tag and
    flag them as upstreamed.
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit a9b408a97f7bf8b1f98f355fefe3c9bfc959d5a6)
---
 ...-en7523-Rework-clock-handling-for-different-clock.patch} | 13 +++++++------
 ...-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch} |  7 +++++--
 ...6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch} |  6 ++++--
 ...04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch} |  6 ++++--
 4 files changed, 20 insertions(+), 12 deletions(-)

diff --git a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch b/target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
similarity index 87%
rename from target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
rename to target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
index 187715a5cc..96d2bbf28e 100644
--- a/target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch
+++ b/target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
@@ -1,6 +1,6 @@
-From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 18 Dec 2024 10:03:45 +0100
+Date: Tue, 14 Jan 2025 00:10:02 +0100
 Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
  numbers
 
@@ -12,6 +12,8 @@ clocks number in match_data and alloca clk_data based on the compatible
 match_data.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 14 ++++++++------
  1 file changed, 8 insertions(+), 6 deletions(-)
@@ -44,7 +46,7 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  }
  
  static int en7523_reset_update(struct reset_controller_dev *rcdev,
-@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
  	struct clk_hw_onecell_data *clk_data;
  	int r;
  
@@ -58,12 +60,11 @@ Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
  		return -ENOMEM;
  
 -	soc_data = device_get_match_data(&pdev->dev);
++	clk_data->num = soc_data->num_clocks;
  	r = soc_data->hw_init(pdev, clk_data);
  	if (r)
  		return r;
- 
-+	clk_data->num = soc_data->num_clocks;
- 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
  }
  
  static const struct en_clk_soc_data en7523_data = {
diff --git a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
similarity index 69%
rename from target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
index e858d8b77d..5db79a4748 100644
--- a/target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
@@ -1,6 +1,6 @@
-From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Thu, 19 Dec 2024 13:13:37 +0100
+Date: Tue, 14 Jan 2025 00:10:03 +0100
 Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
 
 Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
@@ -8,6 +8,9 @@ should not be placed here. Value is derived internally in the user
 driver.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
+Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 --
  1 file changed, 2 deletions(-)
diff --git a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
similarity index 74%
rename from target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
index 7bc987f420..a3f0c9e6fe 100644
--- a/target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
@@ -1,6 +1,6 @@
-From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 12:22:37 +0100
+Date: Tue, 14 Jan 2025 00:10:04 +0100
 Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
 
 Add ID for eMMC for EN7581. This is to control clock selection of eMMC
@@ -8,6 +8,8 @@ between 200MHz and 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
 Acked-by: Conor Dooley <conor.dooley at microchip.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  include/dt-bindings/clock/en7523-clk.h | 2 ++
  1 file changed, 2 insertions(+)
diff --git a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch b/target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
similarity index 84%
rename from target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
rename to target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
index 64d5339176..6c8a3300be 100644
--- a/target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
+++ b/target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
@@ -1,12 +1,14 @@
-From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
 From: Christian Marangi <ansuelsmth at gmail.com>
-Date: Wed, 11 Dec 2024 12:22:38 +0100
+Date: Tue, 14 Jan 2025 00:10:05 +0100
 Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
 
 Add clock for eMMC for EN7581. This is used to give info of the current
 eMMC source clock and to switch it from 200MHz or 150MHz.
 
 Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth at gmail.com
+Signed-off-by: Stephen Boyd <sboyd at kernel.org>
 ---
  drivers/clk/clk-en7523.c | 10 ++++++++++
  1 file changed, 10 insertions(+)



From lede-commits at lists.infradead.org  Mon Jan 27 03:43:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:43:50 -0500
Subject: [openwrt/openwrt]  unetd: update to Git HEAD (2025-01-27)
In-Reply-To: <173797823044.1621813.2875612748404536074@git-01.infra.openwrt.org>
References: <173797823044.1621813.2875612748404536074@git-01.infra.openwrt.org>
Message-ID: <mailman.46467.1737978309.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c34eee5f39827ca38c9d4d0acef46848098867fe

commit c34eee5f39827ca38c9d4d0acef46848098867fe
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Mon Jan 27 12:43:13 2025 +0100

    unetd: update to Git HEAD (2025-01-27)
    
    c293afa01c13 network: add support for the local_network option
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/network/services/unetd/Makefile       |  6 +++---
 package/network/services/unetd/files/unetd.sh | 27 ++++++++++++++++-----------
 2 files changed, 19 insertions(+), 14 deletions(-)

diff --git a/package/network/services/unetd/Makefile b/package/network/services/unetd/Makefile
index a7f030abb6..1d47ca63ca 100644
--- a/package/network/services/unetd/Makefile
+++ b/package/network/services/unetd/Makefile
@@ -10,9 +10,9 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=unetd
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git
-PKG_SOURCE_DATE:=2025-01-26
-PKG_SOURCE_VERSION:=d13752814651c70d2afc71383612fafc835b631b
-PKG_MIRROR_HASH:=c9de65ae92af2498fcd9d55f9cd2017cb9ac79b03ed5816da21161aa24f226b9
+PKG_SOURCE_DATE:=2025-01-27
+PKG_SOURCE_VERSION:=c293afa01c1328ee8a18fc407948d0529353d7eb
+PKG_MIRROR_HASH:=f91e26cd4d4304170d99a80551691291d7920b9f4e357b0775cdeb138523ccc8
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>
diff --git a/package/network/services/unetd/files/unetd.sh b/package/network/services/unetd/files/unetd.sh
index 2117eab391..726ee76565 100644
--- a/package/network/services/unetd/files/unetd.sh
+++ b/package/network/services/unetd/files/unetd.sh
@@ -18,6 +18,7 @@ proto_unet_init_config() {
 	proto_config_add_string domain
 	proto_config_add_boolean dht
 	proto_config_add_array "tunnels:list(string)"
+	proto_config_add_array "local_network:list(string)"
 	proto_config_add_array "connect:list(string)"
 	proto_config_add_array "peer_data:list(string)"
 	no_device=1
@@ -25,6 +26,17 @@ proto_unet_init_config() {
 	no_proto_task=1
 }
 
+add_array() {
+	local name="$1"
+	local val="$2"
+
+	json_add_array "$name"
+	for c in $val; do
+		json_add_string "" "$c"
+	done
+	json_close_array
+}
+
 proto_unet_setup() {
 	local config="$1"
 
@@ -33,6 +45,7 @@ proto_unet_setup() {
 	json_get_values tunnels tunnels
 	json_get_values connect connect
 	json_get_values peer_data peer_data
+	json_get_values local_network local_network
 	device="${device:-$config}"
 
 	[ -n "$auth_key" ] && type="${type:-dynamic}"
@@ -58,17 +71,9 @@ proto_unet_setup() {
 	done
 	json_close_object
 
-	json_add_array auth_connect
-	for c in $connect; do
-		json_add_string "" "$c"
-	done
-	json_close_array
-
-	json_add_array peer_data
-	for c in $peer_data; do
-		json_add_string "" "$c"
-	done
-	json_close_array
+	add_array local_network "$local_network"
+	add_array auth_connect "$connect"
+	add_array peer_data "$peer_data"
 
 	ip link del dev "$device" >/dev/null 2>&1
 	ip link add dev "$device" type wireguard || {



From lede-commits at lists.infradead.org  Mon Jan 27 03:56:39 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 06:56:39 -0500
Subject: [openwrt/openwrt]  ramips: restore full switch performance for
 USW-Flex
In-Reply-To: <173797899969.1636323.9426984614040264776@git-01.infra.openwrt.org>
References: <173797899969.1636323.9426984614040264776@git-01.infra.openwrt.org>
Message-ID: <mailman.46470.1737979003.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/a5eb5ee1a633f67ae44e43f211396a9f734268be

commit a5eb5ee1a633f67ae44e43f211396a9f734268be
Author: Anders Melchiorsen <amelchio at nogoto.net>
AuthorDate: Wed Jan 22 21:54:57 2025 +0100

    ramips: restore full switch performance for USW-Flex
    
    Since commit f1c9afd80138 ("ramips: mt7621-dts: mux phy0/4 to gmac1") the
    USW-Flex lan1 port has been attached directly to the CPU. This improves
    routing performance but hinders switching.
    
    This is a generally accepted trade-off in that commit but for USW-Flex it
    is a questionable choice. This switch is designed to deliver PoE to remote
    places and using it as a router is unlikely. Meanwhile, the lan1 port is
    also PoE-in and will often be the uplink, carrying most of the traffic.
    
    Reverting f1c9afd80138 for USW-Flex restores full 1 Gbps switching
    performance on all ports.
    
    Signed-off-by: Anders Melchiorsen <amelchio at nogoto.net>
    Link: https://github.com/openwrt/openwrt/pull/17703
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 62872f8bfd5c8bc80bb014417c6ed8057bbeb773)
---
 target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
index f2fb48cac2..f548f1f9b7 100644
--- a/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
+++ b/target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
@@ -64,19 +64,6 @@
 	label = "dsa";
 };
 
-&gmac1 {
-	status = "okay";
-	label = "lan1";
-	phy-handle = <&ethphy4>;
-
-	nvmem-cells = <&macaddr_eeprom>;
-	nvmem-cell-names = "mac-address";
-};
-
-&ethphy4 {
-	/delete-property/ interrupts;
-};
-
 &switch0 {
 	ports {
 		port at 0 {
@@ -98,6 +85,11 @@
 			status = "okay";
 			label = "lan2";
 		};
+
+                port at 4 {
+                        status = "okay";
+                        label = "lan1";
+                };
 	};
 };
 



From lede-commits at lists.infradead.org  Mon Jan 27 05:27:55 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 08:27:55 -0500
Subject: [openwrt/openwrt]  generic: add missing CONFIG_LEDS_ST1202 symbol
In-Reply-To: <173798447534.1729951.3202674927341480427@git-01.infra.openwrt.org>
References: <173798447534.1729951.3202674927341480427@git-01.infra.openwrt.org>
Message-ID: <mailman.46536.1737984480.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8ffeeaee67146aa458f630578aa1f13cd0506ba6

commit 8ffeeaee67146aa458f630578aa1f13cd0506ba6
Author: Robert Marko <robimarko at gmail.com>
AuthorDate: Mon Jan 27 14:25:09 2025 +0100

    generic: add missing CONFIG_LEDS_ST1202 symbol
    
    ST1202 controller was added recently, but it was not disabled in the
    generic config, so lets avoid individual target configs disabling it
    and just disable it in generic config.
    
    Link: https://github.com/openwrt/openwrt/pull/17746
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/generic/config-6.6 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6
index c8ebee7027..a92151700d 100644
--- a/target/linux/generic/config-6.6
+++ b/target/linux/generic/config-6.6
@@ -3082,6 +3082,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y
 # CONFIG_LEDS_PWM_MULTICOLOR is not set
 # CONFIG_LEDS_REGULATOR is not set
 # CONFIG_LEDS_SPI_BYTE is not set
+# CONFIG_LEDS_ST1202 is not set
 # CONFIG_LEDS_SYSCON is not set
 # CONFIG_LEDS_TCA6507 is not set
 # CONFIG_LEDS_TI_LMU_COMMON is not set



From lede-commits at lists.infradead.org  Mon Jan 27 05:32:46 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 08:32:46 -0500
Subject: [openwrt/openwrt]  stm32: enable CONFIG_SMSC_PHY
In-Reply-To: <173798476694.1734828.7215768424999710402@git-01.infra.openwrt.org>
References: <173798476694.1734828.7215768424999710402@git-01.infra.openwrt.org>
Message-ID: <mailman.46539.1737984770.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/d981f28f762a559ae50386fa089b050aaaa78555

commit d981f28f762a559ae50386fa089b050aaaa78555
Author: Thomas Richard <thomas.richard at bootlin.com>
AuthorDate: Mon Jan 27 14:02:28 2025 +0100

    stm32: enable CONFIG_SMSC_PHY
    
    The STM32MP135F-DK board uses the LAN8742 PHY.
    Enable CONFIG_SMSC_PHY to have full PHY support.
    
    Signed-off-by: Thomas Richard <thomas.richard at bootlin.com>
    Link: https://github.com/openwrt/openwrt/pull/17745
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/stm32/stm32mp1/config-6.6 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/stm32/stm32mp1/config-6.6 b/target/linux/stm32/stm32mp1/config-6.6
index e19abcc7dc..0428216ecb 100644
--- a/target/linux/stm32/stm32mp1/config-6.6
+++ b/target/linux/stm32/stm32mp1/config-6.6
@@ -423,6 +423,7 @@ CONFIG_SGL_ALLOC=y
 CONFIG_SG_POOL=y
 CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
+CONFIG_SMSC_PHY=y
 CONFIG_SOCK_RX_QUEUE_MAPPING=y
 CONFIG_SOC_BUS=y
 CONFIG_SOFTIRQ_ON_OWN_STACK=y



From lede-commits at lists.infradead.org  Mon Jan 27 06:14:52 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 09:14:52 -0500
Subject: [openwrt/openwrt]  stm32: enable CONFIG_SMSC_PHY
In-Reply-To: <173798729285.1785755.4844155632420811183@git-01.infra.openwrt.org>
References: <173798729285.1785755.4844155632420811183@git-01.infra.openwrt.org>
Message-ID: <mailman.46555.1737987296.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/d0289daa69fd5063cefc8665b38375040ee69226

commit d0289daa69fd5063cefc8665b38375040ee69226
Author: Thomas Richard <thomas.richard at bootlin.com>
AuthorDate: Mon Jan 27 14:02:28 2025 +0100

    stm32: enable CONFIG_SMSC_PHY
    
    The STM32MP135F-DK board uses the LAN8742 PHY.
    Enable CONFIG_SMSC_PHY to have full PHY support.
    
    Signed-off-by: Thomas Richard <thomas.richard at bootlin.com>
    Link: https://github.com/openwrt/openwrt/pull/17745
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit d981f28f762a559ae50386fa089b050aaaa78555)
---
 target/linux/stm32/stm32mp1/config-6.6 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/linux/stm32/stm32mp1/config-6.6 b/target/linux/stm32/stm32mp1/config-6.6
index e19abcc7dc..0428216ecb 100644
--- a/target/linux/stm32/stm32mp1/config-6.6
+++ b/target/linux/stm32/stm32mp1/config-6.6
@@ -423,6 +423,7 @@ CONFIG_SGL_ALLOC=y
 CONFIG_SG_POOL=y
 CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
+CONFIG_SMSC_PHY=y
 CONFIG_SOCK_RX_QUEUE_MAPPING=y
 CONFIG_SOC_BUS=y
 CONFIG_SOFTIRQ_ON_OWN_STACK=y



From lede-commits at lists.infradead.org  Mon Jan 27 14:29:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:29:58 -0500
Subject: [openwrt/openwrt]  wolfssl: Update to version 5.7.6
In-Reply-To: <173801699892.2394238.11105184677850658631@git-01.infra.openwrt.org>
References: <173801699892.2394238.11105184677850658631@git-01.infra.openwrt.org>
Message-ID: <mailman.46745.1738017011.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/0a7e92c2442bc09eec3875aae21996d9a5430806

commit 0a7e92c2442bc09eec3875aae21996d9a5430806
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 27 01:37:39 2025 +0100

    wolfssl: Update to version 5.7.6
    
    This fixes multiple bugs and also minor security problems.
    
    Changelog:
    https://github.com/wolfSSL/wolfssl/releases/tag/v5.7.4-stable
    https://github.com/wolfSSL/wolfssl/releases/tag/v5.7.6-stable
    
    The package size increases:
    525814 bin/packages/mips_24kc/base/libwolfssl5.7.2.e624513f-5.7.2-r1.apk
    549408 bin/packages/mips_24kc/base/libwolfssl5.7.6.e624513f-5.7.6-r1.apk
    
    Link: https://github.com/openwrt/openwrt/pull/17742
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/libs/wolfssl/Makefile                                  | 4 ++--
 package/libs/wolfssl/patches/100-disable-hardening-check.patch | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile
index 56daacc71b..ee6baefddc 100644
--- a/package/libs/wolfssl/Makefile
+++ b/package/libs/wolfssl/Makefile
@@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.2
+PKG_VERSION:=5.7.6
 PKG_REAL_VERSION:=$(PKG_VERSION)-stable
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
-PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
+PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
 
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
 
diff --git a/package/libs/wolfssl/patches/100-disable-hardening-check.patch b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
index 174e657982..ab695d391d 100644
--- a/package/libs/wolfssl/patches/100-disable-hardening-check.patch
+++ b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
+@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
  
  /* warning for not using harden build options (default with ./configure) */
  /* do not warn if big integer support is disabled */



From lede-commits at lists.infradead.org  Mon Jan 27 14:37:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:37:42 -0500
Subject: [openwrt/openwrt]  apm821xx: NETGEAR WNDR4700: Fix compat version
In-Reply-To: <173801746274.2405518.7622036870172790434@git-01.infra.openwrt.org>
References: <173801746274.2405518.7622036870172790434@git-01.infra.openwrt.org>
Message-ID: <mailman.46748.1738017522.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/dab52c00d712a421d6e61eebc51359e5d38ad347

commit dab52c00d712a421d6e61eebc51359e5d38ad347
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 27 01:09:33 2025 +0100

    apm821xx: NETGEAR WNDR4700: Fix compat version
    
    The definition for the netgear_wndr4700 had two different
    DEVICE_COMPAT_VERSION definitions.
    
    In commit 5815884c3a2 ("apm821xx: migrate to DSA"), an additional
    DEVICE_COMPAT_VERSION := 3.0 attribute was added to the device
    definition. The old one with version 2.0 stayed and was defined later
    overwriting the new one.
    
    Replace the old version 2.0 with the new version 3.0
    
    Fixes: 5815884c3a2a ("apm821xx: migrate to DSA")
    Link: https://forum.openwrt.org/t/openwrt-24-10-0-rc6-sixth-release-candidate/222466/43
    Link: https://github.com/openwrt/openwrt/pull/17741
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/apm821xx/image/nand.mk | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/target/linux/apm821xx/image/nand.mk b/target/linux/apm821xx/image/nand.mk
index 92bdaa87d0..7b3945183e 100644
--- a/target/linux/apm821xx/image/nand.mk
+++ b/target/linux/apm821xx/image/nand.mk
@@ -89,9 +89,6 @@ endef
 TARGET_DEVICES += netgear_wndap660
 
 define Device/netgear_wndr4700
-  DEVICE_COMPAT_VERSION := 3.0
-  DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
-       Upgrade via sysupgrade mechanism is not possible.
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := Centria N900 WNDR4700
   DEVICE_ALT0_VENDOR := NETGEAR
@@ -123,8 +120,9 @@ define Device/netgear_wndr4700
   NETGEAR_HW_ID := 29763875+128+256
   UBINIZE_OPTS := -E 5
   SUPPORTED_DEVICES += wndr4700
-  DEVICE_COMPAT_VERSION := 2.0
+  DEVICE_COMPAT_VERSION := 3.0
   DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
+       Network swconfig configuration cannot be upgraded to DSA. \
        Upgrade via sysupgrade mechanism is not possible.
 endef
 TARGET_DEVICES += netgear_wndr4700



From lede-commits at lists.infradead.org  Mon Jan 27 14:41:04 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:41:04 -0500
Subject: [openwrt/openwrt]  dnsmasq: add fix related to DNSSEC verification
 from upstream
In-Reply-To: <173801766490.2408943.11060495565228078114@git-01.infra.openwrt.org>
References: <173801766490.2408943.11060495565228078114@git-01.infra.openwrt.org>
Message-ID: <mailman.46749.1738017669.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/6dc0f0c50cf1072ec3751c0fb1fc152a0a86487d

commit 6dc0f0c50cf1072ec3751c0fb1fc152a0a86487d
Author: Uwe Kleine-K?nig <uwe+openwrt at kleine-koenig.org>
AuthorDate: Mon Jan 27 16:12:23 2025 +0100

    dnsmasq: add fix related to DNSSEC verification from upstream
    
    To find the DS record for a given zone the parent zone's nameserver must
    be queried and not the nameserver for the zone. Otherwise DNSSEC
    verification for unsigned delegations breaks.
    
    Signed-off-by: Uwe Kleine-K?nig <uwe+openwrt at kleine-koenig.org>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250127151223.1420006-1-uwe+openwrt at kleine-koenig.org/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/network/services/dnsmasq/Makefile          |  2 +-
 .../0003-Handle-DS-queries-to-auth-zones.patch     | 98 ++++++++++++++++++++++
 2 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile
index 0a597c03ce..47a5ae54ae 100644
--- a/package/network/services/dnsmasq/Makefile
+++ b/package/network/services/dnsmasq/Makefile
@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=dnsmasq
 PKG_UPSTREAM_VERSION:=2.90
 PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
 PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/
diff --git a/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch b/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch
new file mode 100644
index 0000000000..bd7270c904
--- /dev/null
+++ b/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch
@@ -0,0 +1,98 @@
+From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
+From: Simon Kelley <simon at thekelleys.org.uk>
+Date: Fri, 17 Jan 2025 17:49:29 +0000
+Subject: [PATCH] Handle DS queries to auth zones.
+Origin: upstream, v2.91test8
+
+When dnsmasq is configured to act as an authoritative server and has
+an authoritative zone configured, and recieves a query for
+that zone _as_forwarder_ it answers the query directly rather
+than forwarding it. This doesn't affect the answer, but it
+saves dnsmasq forwarding the query to the recusor upstream,
+whch then bounces it back to dnsmasq in auth mode. The
+exception should be when the query is for the root of zone, for a DS
+RR. The answer to that has to come from the parent, via the
+recursor, and will typically be a proof-of-nonexistence since
+dnsmasq doesn't support signed zones. This patch suppresses
+local answers and forces forwarding to the upstream recursor
+for such queries. It stops breakage when a DNSSEC validating
+client makes queries to dnsmasq acting as forwarder for a zone
+for which it is authoritative.
+
+[ukleinek: drop changes to CHANGELOG to prevent conflicts]
+---
+ src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
+ 1 file changed, 38 insertions(+), 14 deletions(-)
+
+--- a/src/forward.c
++++ b/src/forward.c
+@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
+ #endif
+ 
+ #ifdef HAVE_AUTH
+-      /* find queries for zones we're authoritative for, and answer them directly */
++      /* Find queries for zones we're authoritative for, and answer them directly.
++	 The exception to this is DS queries for the zone route. They
++	 have to come from the parent zone. Since dnsmasq's auth server
++	 can't do DNSSEC, the zone will be unsigned, and anything using
++	 dnsmasq as a forwarder and doing validation will be expecting to
++	 see the proof of non-existence from the parent. */
+       if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 	for (zone = daemon->auth_zones; zone; zone = zone->next)
+-	  if (in_zone(zone, daemon->namebuff, NULL))
+-	    {
+-	      auth_dns = 1;
+-	      local_auth = 1;
+-	      break;
+-	    }
++	  {
++	    char *cut;
++	    
++	    if (in_zone(zone, daemon->namebuff, &cut))
++	      {
++		if (type != T_DS || cut)
++		  {
++		    auth_dns = 1;
++		    local_auth = 1;
++		  }
++		break;
++	      }
++	  }
+ #endif
+       
+ #ifdef HAVE_LOOP
+@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
+ 				   &peer_addr, auth_dns ? "auth" : "query", qtype);
+ 	      
+ #ifdef HAVE_AUTH
+-	      /* find queries for zones we're authoritative for, and answer them directly */
++	      /* Find queries for zones we're authoritative for, and answer them directly.
++		 The exception to this is DS queries for the zone route. They
++		 have to come from the parent zone. Since dnsmasq's auth server
++		 can't do DNSSEC, the zone will be unsigned, and anything using
++		 dnsmasq as a forwarder and doing validation will be expecting to
++		 see the proof of non-existence from the parent. */
+ 	      if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 		for (zone = daemon->auth_zones; zone; zone = zone->next)
+-		  if (in_zone(zone, daemon->namebuff, NULL))
+-		    {
+-		      auth_dns = 1;
+-		      local_auth = 1;
+-		      break;
+-		    }
++		  {
++		    char *cut;
++		    
++		    if (in_zone(zone, daemon->namebuff, &cut))
++		      {
++			if (qtype != T_DS || cut)
++			  {
++			    auth_dns = 1;
++			    local_auth = 1;
++			  }
++			break;
++		      }
++		  }
+ #endif
+ 	    }
+ 	}



From lede-commits at lists.infradead.org  Mon Jan 27 14:54:24 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:54:24 -0500
Subject: [openwrt/openwrt]  apm821xx: NETGEAR WNDR4700: Fix compat version
In-Reply-To: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
References: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
Message-ID: <mailman.46750.1738018466.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/50cb934142e3f6668dc8ebb8a7e54e6b17e14bd1

commit 50cb934142e3f6668dc8ebb8a7e54e6b17e14bd1
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 27 01:09:33 2025 +0100

    apm821xx: NETGEAR WNDR4700: Fix compat version
    
    The definition for the netgear_wndr4700 had two different
    DEVICE_COMPAT_VERSION definitions.
    
    In commit 5815884c3a2 ("apm821xx: migrate to DSA"), an additional
    DEVICE_COMPAT_VERSION := 3.0 attribute was added to the device
    definition. The old one with version 2.0 stayed and was defined later
    overwriting the new one.
    
    Replace the old version 2.0 with the new version 3.0
    
    Fixes: 5815884c3a2a ("apm821xx: migrate to DSA")
    Link: https://forum.openwrt.org/t/openwrt-24-10-0-rc6-sixth-release-candidate/222466/43
    Link: https://github.com/openwrt/openwrt/pull/17741
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit dab52c00d712a421d6e61eebc51359e5d38ad347)
---
 target/linux/apm821xx/image/nand.mk | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/target/linux/apm821xx/image/nand.mk b/target/linux/apm821xx/image/nand.mk
index 92bdaa87d0..7b3945183e 100644
--- a/target/linux/apm821xx/image/nand.mk
+++ b/target/linux/apm821xx/image/nand.mk
@@ -89,9 +89,6 @@ endef
 TARGET_DEVICES += netgear_wndap660
 
 define Device/netgear_wndr4700
-  DEVICE_COMPAT_VERSION := 3.0
-  DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
-       Upgrade via sysupgrade mechanism is not possible.
   DEVICE_VENDOR := NETGEAR
   DEVICE_MODEL := Centria N900 WNDR4700
   DEVICE_ALT0_VENDOR := NETGEAR
@@ -123,8 +120,9 @@ define Device/netgear_wndr4700
   NETGEAR_HW_ID := 29763875+128+256
   UBINIZE_OPTS := -E 5
   SUPPORTED_DEVICES += wndr4700
-  DEVICE_COMPAT_VERSION := 2.0
+  DEVICE_COMPAT_VERSION := 3.0
   DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
+       Network swconfig configuration cannot be upgraded to DSA. \
        Upgrade via sysupgrade mechanism is not possible.
 endef
 TARGET_DEVICES += netgear_wndr4700



From lede-commits at lists.infradead.org  Mon Jan 27 14:54:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:54:25 -0500
Subject: [openwrt/openwrt]  dnsmasq: add fix related to DNSSEC verification
 from upstream
In-Reply-To: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
References: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
Message-ID: <mailman.46751.1738018469.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/daef29c75d284a31ca5d957e64b3bf4629e7d049

commit daef29c75d284a31ca5d957e64b3bf4629e7d049
Author: Uwe Kleine-K?nig <uwe+openwrt at kleine-koenig.org>
AuthorDate: Mon Jan 27 16:12:23 2025 +0100

    dnsmasq: add fix related to DNSSEC verification from upstream
    
    To find the DS record for a given zone the parent zone's nameserver must
    be queried and not the nameserver for the zone. Otherwise DNSSEC
    verification for unsigned delegations breaks.
    
    Signed-off-by: Uwe Kleine-K?nig <uwe+openwrt at kleine-koenig.org>
    Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250127151223.1420006-1-uwe+openwrt at kleine-koenig.org/
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 6dc0f0c50cf1072ec3751c0fb1fc152a0a86487d)
---
 package/network/services/dnsmasq/Makefile          |  2 +-
 .../0003-Handle-DS-queries-to-auth-zones.patch     | 98 ++++++++++++++++++++++
 2 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile
index 0a597c03ce..47a5ae54ae 100644
--- a/package/network/services/dnsmasq/Makefile
+++ b/package/network/services/dnsmasq/Makefile
@@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=dnsmasq
 PKG_UPSTREAM_VERSION:=2.90
 PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
-PKG_RELEASE:=3
+PKG_RELEASE:=4
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
 PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/
diff --git a/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch b/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch
new file mode 100644
index 0000000000..bd7270c904
--- /dev/null
+++ b/package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch
@@ -0,0 +1,98 @@
+From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
+From: Simon Kelley <simon at thekelleys.org.uk>
+Date: Fri, 17 Jan 2025 17:49:29 +0000
+Subject: [PATCH] Handle DS queries to auth zones.
+Origin: upstream, v2.91test8
+
+When dnsmasq is configured to act as an authoritative server and has
+an authoritative zone configured, and recieves a query for
+that zone _as_forwarder_ it answers the query directly rather
+than forwarding it. This doesn't affect the answer, but it
+saves dnsmasq forwarding the query to the recusor upstream,
+whch then bounces it back to dnsmasq in auth mode. The
+exception should be when the query is for the root of zone, for a DS
+RR. The answer to that has to come from the parent, via the
+recursor, and will typically be a proof-of-nonexistence since
+dnsmasq doesn't support signed zones. This patch suppresses
+local answers and forces forwarding to the upstream recursor
+for such queries. It stops breakage when a DNSSEC validating
+client makes queries to dnsmasq acting as forwarder for a zone
+for which it is authoritative.
+
+[ukleinek: drop changes to CHANGELOG to prevent conflicts]
+---
+ src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
+ 1 file changed, 38 insertions(+), 14 deletions(-)
+
+--- a/src/forward.c
++++ b/src/forward.c
+@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
+ #endif
+ 
+ #ifdef HAVE_AUTH
+-      /* find queries for zones we're authoritative for, and answer them directly */
++      /* Find queries for zones we're authoritative for, and answer them directly.
++	 The exception to this is DS queries for the zone route. They
++	 have to come from the parent zone. Since dnsmasq's auth server
++	 can't do DNSSEC, the zone will be unsigned, and anything using
++	 dnsmasq as a forwarder and doing validation will be expecting to
++	 see the proof of non-existence from the parent. */
+       if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 	for (zone = daemon->auth_zones; zone; zone = zone->next)
+-	  if (in_zone(zone, daemon->namebuff, NULL))
+-	    {
+-	      auth_dns = 1;
+-	      local_auth = 1;
+-	      break;
+-	    }
++	  {
++	    char *cut;
++	    
++	    if (in_zone(zone, daemon->namebuff, &cut))
++	      {
++		if (type != T_DS || cut)
++		  {
++		    auth_dns = 1;
++		    local_auth = 1;
++		  }
++		break;
++	      }
++	  }
+ #endif
+       
+ #ifdef HAVE_LOOP
+@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
+ 				   &peer_addr, auth_dns ? "auth" : "query", qtype);
+ 	      
+ #ifdef HAVE_AUTH
+-	      /* find queries for zones we're authoritative for, and answer them directly */
++	      /* Find queries for zones we're authoritative for, and answer them directly.
++		 The exception to this is DS queries for the zone route. They
++		 have to come from the parent zone. Since dnsmasq's auth server
++		 can't do DNSSEC, the zone will be unsigned, and anything using
++		 dnsmasq as a forwarder and doing validation will be expecting to
++		 see the proof of non-existence from the parent. */
+ 	      if (!auth_dns && !option_bool(OPT_LOCALISE))
+ 		for (zone = daemon->auth_zones; zone; zone = zone->next)
+-		  if (in_zone(zone, daemon->namebuff, NULL))
+-		    {
+-		      auth_dns = 1;
+-		      local_auth = 1;
+-		      break;
+-		    }
++		  {
++		    char *cut;
++		    
++		    if (in_zone(zone, daemon->namebuff, &cut))
++		      {
++			if (qtype != T_DS || cut)
++			  {
++			    auth_dns = 1;
++			    local_auth = 1;
++			  }
++			break;
++		      }
++		  }
+ #endif
+ 	    }
+ 	}



From lede-commits at lists.infradead.org  Mon Jan 27 14:54:22 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:54:22 -0500
Subject: [openwrt/openwrt]  wolfssl: Adjust version for apk
In-Reply-To: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
References: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
Message-ID: <mailman.46754.1738018469.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/4e70887d43dbf6b5e013b6755d61e66e37eba41c

commit 4e70887d43dbf6b5e013b6755d61e66e37eba41c
Author: Hannu Nyman <hannu.nyman at iki.fi>
AuthorDate: Sun Nov 10 15:57:01 2024 +0200

    wolfssl: Adjust version for apk
    
    Adjust wolfssl version for apk by removing the "-stable"
    from the OpenWrt version, although it is still needed for
    upstream download archive name.
    
    Define PKG_BUILD_DIR accordingly.
    
    Utilize new short version to simplify ABI_VERSION calculation.
    
    Signed-off-by: Hannu Nyman <hannu.nyman at iki.fi>
    Link: https://github.com/openwrt/openwrt/pull/16906
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
    (cherry picked from commit be952e98bc1d768a0da5b84e59a6e7c04a1cdab8)
---
 package/libs/wolfssl/Makefile | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile
index bac4a8ef52..56daacc71b 100644
--- a/package/libs/wolfssl/Makefile
+++ b/package/libs/wolfssl/Makefile
@@ -8,13 +8,16 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.2-stable
+PKG_VERSION:=5.7.2
+PKG_REAL_VERSION:=$(PKG_VERSION)-stable
 PKG_RELEASE:=1
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
+PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
 PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
 
+PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
+
 PKG_FIXUP:=libtool libtool-abiver
 PKG_INSTALL:=1
 PKG_BUILD_FLAGS:=no-mips16 lto
@@ -40,7 +43,7 @@ PKG_CONFIG_DEPENDS:=\
 	CONFIG_WOLFSSL_HAS_TLSV13 \
 	CONFIG_WOLFSSL_HAS_WPAS
 
-PKG_ABI_VERSION:=$(patsubst %-stable,%,$(PKG_VERSION)).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
+PKG_ABI_VERSION:=$(PKG_VERSION).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
 
 PKG_CONFIG_DEPENDS+=\
 	CONFIG_PACKAGE_libwolfssl-benchmark \



From lede-commits at lists.infradead.org  Mon Jan 27 14:54:23 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 17:54:23 -0500
Subject: [openwrt/openwrt]  wolfssl: Update to version 5.7.6
In-Reply-To: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
References: <173801846273.2423492.3376603141348532053@git-01.infra.openwrt.org>
Message-ID: <mailman.46755.1738018469.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6f7bbd03954e8aa79484b7c5b727dd814bfee78d

commit 6f7bbd03954e8aa79484b7c5b727dd814bfee78d
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Mon Jan 27 01:37:39 2025 +0100

    wolfssl: Update to version 5.7.6
    
    This fixes multiple bugs and also minor security problems.
    
    Changelog:
    https://github.com/wolfSSL/wolfssl/releases/tag/v5.7.4-stable
    https://github.com/wolfSSL/wolfssl/releases/tag/v5.7.6-stable
    
    The package size increases:
    525814 bin/packages/mips_24kc/base/libwolfssl5.7.2.e624513f-5.7.2-r1.apk
    549408 bin/packages/mips_24kc/base/libwolfssl5.7.6.e624513f-5.7.6-r1.apk
    
    Link: https://github.com/openwrt/openwrt/pull/17742
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    (cherry picked from commit 0a7e92c2442bc09eec3875aae21996d9a5430806)
---
 package/libs/wolfssl/Makefile                                  | 4 ++--
 package/libs/wolfssl/patches/100-disable-hardening-check.patch | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile
index 56daacc71b..ee6baefddc 100644
--- a/package/libs/wolfssl/Makefile
+++ b/package/libs/wolfssl/Makefile
@@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.7.2
+PKG_VERSION:=5.7.6
 PKG_REAL_VERSION:=$(PKG_VERSION)-stable
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
-PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
+PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
 
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
 
diff --git a/package/libs/wolfssl/patches/100-disable-hardening-check.patch b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
index 174e657982..ab695d391d 100644
--- a/package/libs/wolfssl/patches/100-disable-hardening-check.patch
+++ b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
+@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
  
  /* warning for not using harden build options (default with ./configure) */
  /* do not warn if big integer support is disabled */



From lede-commits at lists.infradead.org  Mon Jan 27 15:13:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 18:13:14 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc7: adjust config defaults
In-Reply-To: <173801959467.2441105.8577779079490224473@git-01.infra.openwrt.org>
References: <173801959467.2441105.8577779079490224473@git-01.infra.openwrt.org>
Message-ID: <mailman.46758.1738019598.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/6cbfbb18531e9e283ee4e50b14d53a27625fe518

commit 6cbfbb18531e9e283ee4e50b14d53a27625fe518
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Tue Jan 28 00:06:47 2025 +0100

    OpenWrt v24.10.0-rc7: adjust config defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 +
 version.date                       | 1 +
 5 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index 581de056c4..1fca5eb2e5 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
-src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
-src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
-src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
+src-git packages https://git.openwrt.org/feed/packages.git^cf301cd92c4c501271cf6c1caf19eabef3ce0c09
+src-git luci https://git.openwrt.org/project/luci.git^bdf1db5fb536b155d4b035f3bbf9590782e41cf7
+src-git routing https://git.openwrt.org/feed/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
+src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
diff --git a/include/version.mk b/include/version.mk
index a6ebe58779..91fc63dfbd 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc7)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28417-daef29c75d)
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc7)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index 80db993d46..ec94880c57 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
+		default "https://downloads.openwrt.org/releases/24.10.0-rc7"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default y
+		default n
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
new file mode 100644
index 0000000000..058b842db7
--- /dev/null
+++ b/version
@@ -0,0 +1 @@
+r28417-daef29c75d
diff --git a/version.date b/version.date
new file mode 100644
index 0000000000..31766eae0c
--- /dev/null
+++ b/version.date
@@ -0,0 +1 @@
+1738018409



From lede-commits at lists.infradead.org  Mon Jan 27 15:13:15 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Mon, 27 Jan 2025 18:13:15 -0500
Subject: [openwrt/openwrt]  OpenWrt v24.10.0-rc7: revert to branch defaults
In-Reply-To: <173801959467.2441105.8577779079490224473@git-01.infra.openwrt.org>
References: <173801959467.2441105.8577779079490224473@git-01.infra.openwrt.org>
Message-ID: <mailman.46759.1738019598.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c08ba0f7126b60570a81ef86500d9f83eeb8dc8f

commit c08ba0f7126b60570a81ef86500d9f83eeb8dc8f
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Tue Jan 28 00:06:50 2025 +0100

    OpenWrt v24.10.0-rc7: revert to branch defaults
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 feeds.conf.default                 | 8 ++++----
 include/version.mk                 | 6 +++---
 package/base-files/image-config.in | 4 ++--
 version                            | 1 -
 version.date                       | 1 -
 5 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/feeds.conf.default b/feeds.conf.default
index 1fca5eb2e5..581de056c4 100644
--- a/feeds.conf.default
+++ b/feeds.conf.default
@@ -1,4 +1,4 @@
-src-git packages https://git.openwrt.org/feed/packages.git^cf301cd92c4c501271cf6c1caf19eabef3ce0c09
-src-git luci https://git.openwrt.org/project/luci.git^bdf1db5fb536b155d4b035f3bbf9590782e41cf7
-src-git routing https://git.openwrt.org/feed/routing.git^e87b55c6a642947ad7e24cd5054a637df63d5dbe
-src-git telephony https://git.openwrt.org/feed/telephony.git^fd605af7143165a2490681ec1752f259873b9147
+src-git packages https://git.openwrt.org/feed/packages.git;openwrt-24.10
+src-git luci https://git.openwrt.org/project/luci.git;openwrt-24.10
+src-git routing https://git.openwrt.org/feed/routing.git;openwrt-24.10
+src-git telephony https://git.openwrt.org/feed/telephony.git;openwrt-24.10
diff --git a/include/version.mk b/include/version.mk
index 91fc63dfbd..a6ebe58779 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -23,13 +23,13 @@ PKG_CONFIG_DEPENDS += \
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
 
 VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER))
-VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10.0-rc7)
+VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),24.10-SNAPSHOT)
 
 VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
-VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),r28417-daef29c75d)
+VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
 
 VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
-VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10.0-rc7)
+VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/releases/24.10-SNAPSHOT)
 
 VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
 VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index ec94880c57..80db993d46 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -190,7 +190,7 @@ if VERSIONOPT
 	config VERSION_REPO
 		string
 		prompt "Release repository"
-		default "https://downloads.openwrt.org/releases/24.10.0-rc7"
+		default "https://downloads.openwrt.org/releases/24.10-SNAPSHOT"
 		help
 			This is the repository address embedded in the image, it defaults
 			to the trunk snapshot repo; the url may contain the following placeholders:
@@ -266,7 +266,7 @@ if VERSIONOPT
 	config VERSION_CODE_FILENAMES
 		bool
 		prompt "Revision code in filenames"
-		default n
+		default y
 		help
 			Enable this to include the revision identifier or the configured
 			version code into the firmware image, SDK- and Image Builder archive
diff --git a/version b/version
deleted file mode 100644
index 058b842db7..0000000000
--- a/version
+++ /dev/null
@@ -1 +0,0 @@
-r28417-daef29c75d
diff --git a/version.date b/version.date
deleted file mode 100644
index 31766eae0c..0000000000
--- a/version.date
+++ /dev/null
@@ -1 +0,0 @@
-1738018409



From lede-commits at lists.infradead.org  Mon Jan 27 22:31:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 01:31:09 -0500
Subject: [openwrt/openwrt]  realtek: Switch DGS-1210-10P DTS to gpio.dtsi
In-Reply-To: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
References: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
Message-ID: <mailman.46850.1738045874.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/7c0d1c1eb10a7040af6478742dd053f40b24a467

commit 7c0d1c1eb10a7040af6478742dd053f40b24a467
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Jan 12 17:53:34 2025 +0100

    realtek: Switch DGS-1210-10P DTS to gpio.dtsi
    
    The DTS file for the DGS-1210-10P is slightly different from the other
    DGS-1210 devices, in that it didn't specify a gpio-restart node when it
    was added. The gpio-restart has been found to work on the DGS-1210-10P
    as well, so switch it over to the common definitions.
    
    This converts the last device from the product family to the common
    definition for the (external) GPIOs.
    
    Tested-by: Michel Thill <jmthill at gmail.com>
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/dts/rtl8382_d-link_dgs-1210-10p.dts    | 29 ++++++----------------
 1 file changed, 7 insertions(+), 22 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
index 1aef88afd4..9365f94a50 100644
--- a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts
@@ -2,6 +2,7 @@
 
 #include "rtl838x.dtsi"
 #include "rtl83xx_d-link_dgs-1210_common.dtsi"
+#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
 
 / {
 	compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
@@ -43,23 +44,6 @@
 		tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
 	};
 
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		mode {
-			label = "mode";
-			gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_LIGHTS_TOGGLE>;
-		};
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
 	leds {
 		link_act {
 			label = "green:link_act";
@@ -76,12 +60,13 @@
 			gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
 		};
 	};
+};
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
+&keys {
+	mode {
+		label = "mode";
+		gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
+		linux,code = <KEY_LIGHTS_TOGGLE>;
 	};
 };
 



From lede-commits at lists.infradead.org  Mon Jan 27 22:31:10 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 01:31:10 -0500
Subject: [openwrt/openwrt]  realtek: switch RTL8231 driver for D-Link DGS-1210
In-Reply-To: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
References: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
Message-ID: <mailman.46853.1738045874.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3d6a1a7874c991c4bd9719bf0a92ab6630034c67

commit 3d6a1a7874c991c4bd9719bf0a92ab6630034c67
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Jan 12 17:57:33 2025 +0100

    realtek: switch RTL8231 driver for D-Link DGS-1210
    
    Update the common external GPIO DTSI file for the DGS-1210 devices to
    use an MDIO device on the auxilairy MDIO bus, as the original driver was
    doing behind the screen.
    
    Switching to the new driver will allow for full pin-control and will no
    longer reset pin config set by the bootloader.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi     | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi b/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi
index b1477aa182..ccfeef3a39 100644
--- a/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi
+++ b/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_gpio.dtsi
@@ -17,11 +17,22 @@
 			linux,code = <KEY_RESTART>;
 		};
 	};
+};
+
+&mdio_aux {
+	status = "okay";
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
 		gpio-controller;
-		indirect-access-bus-id = <0>;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };



From lede-commits at lists.infradead.org  Mon Jan 27 22:31:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 01:31:08 -0500
Subject: [openwrt/openwrt]  realtek: Drop unused property on DGS-1210 gpio0
In-Reply-To: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
References: <173804586879.2854886.18351972629368245080@git-01.infra.openwrt.org>
Message-ID: <mailman.46854.1738045876.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/022b7d80bf9de326f02c625f2fdeb2fb9c9203a3

commit 022b7d80bf9de326f02c625f2fdeb2fb9c9203a3
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 16:51:59 2025 +0100

    realtek: Drop unused property on DGS-1210 gpio0
    
    The 'indirect-access-id' property on gpio0 is a remnant from the
    original GPIO driver. This property has not been relevant on the SoC's
    embedded GPIO controller for a long time, so just drop it.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi b/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi
index fa623d7a90..c11c26f079 100644
--- a/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi
+++ b/target/linux/realtek/dts/rtl83xx_d-link_dgs-1210_common.dtsi
@@ -30,10 +30,6 @@
 	};
 };
 
-&gpio0 {
-	indirect-access-bus-id = <0>;
-};
-
 &spi0 {
 	status = "okay";
 	flash at 0 {



From lede-commits at lists.infradead.org  Mon Jan 27 23:34:36 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 02:34:36 -0500
Subject: [openwrt/openwrt]  bmips: shg2500: add missing led controller cells
In-Reply-To: <173804967662.2912120.15461230121157963965@git-01.infra.openwrt.org>
References: <173804967662.2912120.15461230121157963965@git-01.infra.openwrt.org>
Message-ID: <mailman.46857.1738049686.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/fbe0bd5f6453a61fab871bee56883afc5c6308cf

commit fbe0bd5f6453a61fab871bee56883afc5c6308cf
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Tue Jan 28 08:28:01 2025 +0100

    bmips: shg2500: add missing led controller cells
    
    Fixes the following DT warnings:
    ../dts/bcm63168-sercomm-shg2500.dts:76.4-14: Warning (reg_format): /ubus/spi at 10001000/led-controller at 1/led at 1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #address-cells value
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #size-cells value
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
index 7ea76bebc3..3f9ca000cc 100644
--- a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
+++ b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
@@ -68,6 +68,8 @@
 	status = "okay";
 
 	led-controller at 1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "sercomm,msp430-leds";
 		reg = <1>;
 		spi-max-frequency = <500000>;



From lede-commits at lists.infradead.org  Mon Jan 27 23:36:14 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 02:36:14 -0500
Subject: [openwrt/openwrt]  bmips: shg2500: add missing led controller cells
In-Reply-To: <173804977481.2914637.12997791677007972692@git-01.infra.openwrt.org>
References: <173804977481.2914637.12997791677007972692@git-01.infra.openwrt.org>
Message-ID: <mailman.46858.1738049778.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/e2c2a6ed7f87f494ba23d130de00638028c0c71c

commit e2c2a6ed7f87f494ba23d130de00638028c0c71c
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Tue Jan 28 08:28:01 2025 +0100

    bmips: shg2500: add missing led controller cells
    
    Fixes the following DT warnings:
    ../dts/bcm63168-sercomm-shg2500.dts:76.4-14: Warning (reg_format): /ubus/spi at 10001000/led-controller at 1/led at 1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #address-cells value
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #size-cells value
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit fbe0bd5f6453a61fab871bee56883afc5c6308cf)
---
 target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
index 7ea76bebc3..3f9ca000cc 100644
--- a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
+++ b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
@@ -68,6 +68,8 @@
 	status = "okay";
 
 	led-controller at 1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "sercomm,msp430-leds";
 		reg = <1>;
 		spi-max-frequency = <500000>;



From lede-commits at lists.infradead.org  Mon Jan 27 23:36:58 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 02:36:58 -0500
Subject: [openwrt/openwrt]  bmips: shg2500: add missing led controller cells
In-Reply-To: <173804981840.2915824.7756429452092589611@git-01.infra.openwrt.org>
References: <173804981840.2915824.7756429452092589611@git-01.infra.openwrt.org>
Message-ID: <mailman.46859.1738049822.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/1292a493a68e1ef144429ac33848eabf60a9b59c

commit 1292a493a68e1ef144429ac33848eabf60a9b59c
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Tue Jan 28 08:28:01 2025 +0100

    bmips: shg2500: add missing led controller cells
    
    Fixes the following DT warnings:
    ../dts/bcm63168-sercomm-shg2500.dts:76.4-14: Warning (reg_format): /ubus/spi at 10001000/led-controller at 1/led at 1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #address-cells value
    ../dts/bcm63168-sercomm-shg2500.dts:75.9-78.5: Warning (avoid_default_addr_size): /ubus/spi at 10001000/led-controller at 1/led at 1: Relying on default #size-cells value
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
    (cherry picked from commit fbe0bd5f6453a61fab871bee56883afc5c6308cf)
---
 target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
index 7b0ebf2aef..772e1363fc 100644
--- a/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
+++ b/target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
@@ -69,6 +69,8 @@
 	status = "okay";
 
 	led-controller at 1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
 		compatible = "sercomm,msp430-leds";
 		reg = <1>;
 		spi-max-frequency = <500000>;



From lede-commits at lists.infradead.org  Tue Jan 28 01:51:50 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 04:51:50 -0500
Subject: [openwrt/openwrt]  ipq60xx: fix uboot-envtools file syntax error in
 uci-defaults
In-Reply-To: <173805791048.3071811.62148525753230623@git-01.infra.openwrt.org>
References: <173805791048.3071811.62148525753230623@git-01.infra.openwrt.org>
Message-ID: <mailman.46947.1738057914.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/734331e4e603e39afa9814a7c89b998380671ab8

commit 734331e4e603e39afa9814a7c89b998380671ab8
Author: Ivan Deng <hongba at rocketmail.com>
AuthorDate: Mon Jan 27 22:02:07 2025 -0800

    ipq60xx: fix uboot-envtools file syntax error in uci-defaults
    
    The syntax error prevented the correct creation of all ipq60xx U-Boot environment files: /etc/config/ubootenv and /etc/fw_env.config
    
    Signed-off-by: Ivan Deng <hongba at rocketmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17755
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/boot/uboot-envtools/files/qualcommax_ipq60xx | 1 +
 1 file changed, 1 insertion(+)

diff --git a/package/boot/uboot-envtools/files/qualcommax_ipq60xx b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
index 77c96da24a..1c1bfd1230 100644
--- a/package/boot/uboot-envtools/files/qualcommax_ipq60xx
+++ b/package/boot/uboot-envtools/files/qualcommax_ipq60xx
@@ -29,6 +29,7 @@ tplink,eap610-outdoor)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \
 		ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
+	;;
 yuncore,fap650)
 	idx="$(find_mtd_index 0:appsblenv)"
 	[ -n "$idx" ] && \



From lede-commits at lists.infradead.org  Tue Jan 28 11:59:40 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 14:59:40 -0500
Subject: [openwrt/openwrt]  realtek: Switch ApresiaLightGS120GT-SS RTL8231
 driver
In-Reply-To: <173809438056.3844760.10002388908055264157@git-01.infra.openwrt.org>
References: <173809438056.3844760.10002388908055264157@git-01.infra.openwrt.org>
Message-ID: <mailman.47385.1738094384.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f31c9bb237c306c89b553a96c96460f194202df2

commit f31c9bb237c306c89b553a96c96460f194202df2
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sat Jan 18 21:41:53 2025 +0100

    realtek: Switch ApresiaLightGS120GT-SS RTL8231 driver
    
    Switch the implementation for the RTL8231 GPIO expander to the new
    driver.
    
    This allows specifying the GPIO driving the RTL8231's reset as a proper
    MDIO reset line, so the gpio-hog can be dropped. Since it was pinned at
    a high level, the reset line is actually active-low (i.e. high when not
    in reset).
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 .../realtek/dts/rtl8382_apresia_aplgs120gtss.dts   | 32 +++++++++++++---------
 1 file changed, 19 insertions(+), 13 deletions(-)

diff --git a/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts b/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
index de17958af1..3c609701d5 100644
--- a/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
+++ b/target/linux/realtek/dts/rtl8382_apresia_aplgs120gtss.dts
@@ -61,13 +61,6 @@
 		open-source;
 	};
 
-	gpio1: rtl8231-gpio {
-		compatible = "realtek,rtl8231-gpio";
-		#gpio-cells = <2>;
-		gpio-controller;
-		indirect-access-bus-id = <0>;
-	};
-
 	i2c0: i2c-gpio-0 {
 		compatible = "i2c-gpio";
 		sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -134,12 +127,25 @@
 	};
 };
 
-&gpio0 {
-	rtl8231_reset {
-		gpio-hog;
-		gpios = <1 GPIO_ACTIVE_HIGH>;
-		output-high;
-		line-name = "rtl8231-reset";
+&mdio_aux {
+	status = "okay";
+
+	reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <1000>;
+	reset-post-delay-us = <10000>;
+
+	gpio1: expander at 0 {
+		compatible = "realtek,rtl8231";
+		reg = <0>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&gpio1 0 0 37>;
+
+		led-controller {
+			compatible = "realtek,rtl8231-leds";
+			status = "disabled";
+		};
 	};
 };
 



From lede-commits at lists.infradead.org  Tue Jan 28 11:59:41 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Tue, 28 Jan 2025 14:59:41 -0500
Subject: [openwrt/openwrt]  realtek: add PoE enable line to Netgear GS110TPP
In-Reply-To: <173809438056.3844760.10002388908055264157@git-01.infra.openwrt.org>
References: <173809438056.3844760.10002388908055264157@git-01.infra.openwrt.org>
Message-ID: <mailman.47386.1738094388.1089.lede-commits@lists.infradead.org>

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/807074309dff4eff4097900b9de53abce8684e2f

commit 807074309dff4eff4097900b9de53abce8684e2f
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Mon Jan 27 22:17:57 2025 +0100

    realtek: add PoE enable line to Netgear GS110TPP
    
    By switching to the new RTL8231 driver in commit b7af54d5c18c ("realtek:
    Simple conversions to RTL8231 MFD driver"), the bootloader state of the
    RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
    enable signal, this means PoE output is no longer available.
    
    Add a gpio-hog with high output, restoring the line value from when the
    pin was configured (by default) as an input with a pull-up resistor.
    This will hard-enable the PoE output, but the individual ports can still
    be administratively disabled by realtek-poe or a similar tool.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
 target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts b/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
index f694ae3317..d25b81c3cb 100644
--- a/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
+++ b/target/linux/realtek/dts/rtl8380_netgear_gs110tpp-v1.dts
@@ -37,6 +37,15 @@
 	};
 };
 
+&gpio1 {
+	poe-enable {
+		gpio-hog;
+		gpios = <10 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "poe-enable";
+	};
+};
+
 &firmware {
 	openwrt,ih-magic = <0x4e474520>;
 };



From lede-commits at lists.infradead.org  Wed Jan 29 07:53:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 10:53:25 -0500
Subject: [openwrt/openwrt]  base-files: sysupgrade: Add new option -s to
 perform upgrade on current partition
In-Reply-To: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
References: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
Message-ID: <mailman.47908.1738166011.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/389ecee729af314d3aa29fc78a5da2d85152ac12

commit 389ecee729af314d3aa29fc78a5da2d85152ac12
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Sat Feb 24 20:25:43 2024 +0100

    base-files: sysupgrade: Add new option -s to perform upgrade on current partition
    
    Add new option to be able to perform upgrade on current partition for dual firmware devices:
      "-s           stay on current partition (for dual firmware devices)"
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/14720
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/base-files/files/sbin/sysupgrade | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade
index e51ab0b4f1..69bdad51b0 100755
--- a/package/base-files/files/sbin/sysupgrade
+++ b/package/base-files/files/sbin/sysupgrade
@@ -20,6 +20,7 @@ CONF_IMAGE=
 CONF_BACKUP_LIST=0
 CONF_BACKUP=
 CONF_RESTORE=
+USE_CURR_PART=0
 NEED_IMAGE=
 HELP=0
 TEST=0
@@ -50,6 +51,7 @@ while [ -n "$1" ]; do
 		-r|--restore-backup) CONF_RESTORE="$2" NEED_IMAGE=1; shift;;
 		-l|--list-backup) CONF_BACKUP_LIST=1;;
 		-f) CONF_IMAGE="$2"; shift;;
+		-s) USE_CURR_PART=1;;
 		-F|--force) export FORCE=1;;
 		-T|--test) TEST=1;;
 		-h|--help) HELP=1; break;;
@@ -79,6 +81,7 @@ upgrade-option:
 	-p           do not attempt to restore the partition table after flash.
 	-k           include in backup a list of current installed packages at
 	             $INSTALLED_PACKAGES
+	-s           stay on current partition (for dual firmware devices)
 	-T | --test
 	             Verify image and config .tar.gz but do not actually flash.
 	-F | --force
@@ -424,6 +427,7 @@ else
 	json_add_string command "$COMMAND"
 	json_add_object options
 	json_add_int save_partitions "$SAVE_PARTITIONS"
+	[ $USE_CURR_PART -eq 1 ] && json_add_boolean use_curr_part 1
 	json_close_object
 
 	ubus call system sysupgrade "$(json_dump)"



From lede-commits at lists.infradead.org  Wed Jan 29 07:53:26 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 10:53:26 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq807x: Add ability to perform
 upgrade on current partition for Linksys MX devices
In-Reply-To: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
References: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
Message-ID: <mailman.47909.1738166011.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/f1f1b08db553d874666a0da8435d50b1ab827a3c

commit f1f1b08db553d874666a0da8435d50b1ab827a3c
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Sat Feb 24 20:47:58 2024 +0100

    qualcommax: ipq807x: Add ability to perform upgrade on current partition for Linksys MX devices
    
    Dual firmware devices like Linksys MX4200, MX4300, MX5300 and MX8500 use separate rootfs partition.
    This option helps to keep all configuration during upgrade.
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/14720
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../ipq807x/base-files/lib/upgrade/platform.sh     | 35 ++++++++++++++--------
 1 file changed, 23 insertions(+), 12 deletions(-)

diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index 2d68ec62ed..3bfeb1366b 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -108,6 +108,28 @@ tplink_do_upgrade() {
 	nand_do_upgrade "$1"
 }
 
+linksys_mx_do_upgrade() {
+	CI_UBIPART="rootfs"
+	boot_part="$(fw_printenv -n boot_part)"
+	if [ -n "$UPGRADE_OPT_USE_CURR_PART" ]; then
+		if [ "$boot_part" -eq "2" ]; then
+			CI_KERNPART="alt_kernel"
+			CI_UBIPART="alt_rootfs"
+		fi
+	else
+		if [ "$boot_part" -eq "1" ]; then
+			fw_setenv boot_part 2
+			CI_KERNPART="alt_kernel"
+			CI_UBIPART="alt_rootfs"
+		else
+			fw_setenv boot_part 1
+		fi
+	fi
+	fw_setenv boot_part_ready 3
+	fw_setenv auto_recovery yes
+	nand_do_upgrade "$1"
+}
+
 platform_check_image() {
 	return 0;
 }
@@ -176,18 +198,7 @@ platform_do_upgrade() {
 	linksys,mx4300|\
 	linksys,mx5300|\
 	linksys,mx8500)
-		boot_part="$(fw_printenv -n boot_part)"
-		if [ "$boot_part" -eq "1" ]; then
-			fw_setenv boot_part 2
-			CI_KERNPART="alt_kernel"
-			CI_UBIPART="alt_rootfs"
-		else
-			fw_setenv boot_part 1
-			CI_UBIPART="rootfs"
-		fi
-		fw_setenv boot_part_ready 3
-		fw_setenv auto_recovery yes
-		nand_do_upgrade "$1"
+		linksys_mx_do_upgrade "$1"
 		;;
 	prpl,haze|\
 	qnap,301w)



From lede-commits at lists.infradead.org  Wed Jan 29 07:53:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 10:53:27 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq807x: Update u-boot env only when
 changes for Linksys MX devices
In-Reply-To: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
References: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
Message-ID: <mailman.47910.1738166014.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2fc99e4f1832b32a68c881fd5e9594b081e1559b

commit 2fc99e4f1832b32a68c881fd5e9594b081e1559b
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Thu Dec 12 19:51:27 2024 +0100

    qualcommax: ipq807x: Update u-boot env only when changes for Linksys MX devices
    
    Update u-boot env variables only when changes are made.
    Applies to Linksys MX4200/MX4300/MX5300/MX8500.
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/14720
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 .../ipq807x/base-files/lib/upgrade/platform.sh     | 25 ++++++++++++++++++----
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index 3bfeb1366b..1bc71efdb5 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -109,6 +109,8 @@ tplink_do_upgrade() {
 }
 
 linksys_mx_do_upgrade() {
+	local setenv_script="/tmp/fw_env_upgrade"
+
 	CI_UBIPART="rootfs"
 	boot_part="$(fw_printenv -n boot_part)"
 	if [ -n "$UPGRADE_OPT_USE_CURR_PART" ]; then
@@ -118,15 +120,30 @@ linksys_mx_do_upgrade() {
 		fi
 	else
 		if [ "$boot_part" -eq "1" ]; then
-			fw_setenv boot_part 2
+			echo "boot_part 2" >> $setenv_script
 			CI_KERNPART="alt_kernel"
 			CI_UBIPART="alt_rootfs"
 		else
-			fw_setenv boot_part 1
+			echo "boot_part 1" >> $setenv_script
 		fi
 	fi
-	fw_setenv boot_part_ready 3
-	fw_setenv auto_recovery yes
+
+	boot_part_ready="$(fw_printenv -n boot_part_ready)"
+	if [ "$boot_part_ready" -ne "3" ]; then
+		echo "boot_part_ready 3" >> $setenv_script
+	fi
+
+	auto_recovery="$(fw_printenv -n auto_recovery)"
+	if [ "$auto_recovery" != "yes" ]; then
+		echo "auto_recovery yes" >> $setenv_script
+	fi
+
+	if [ -f "$setenv_script" ]; then
+		fw_setenv -s $setenv_script || {
+			echo "failed to update U-Boot environment"
+			return 1
+		}
+	fi
 	nand_do_upgrade "$1"
 }
 



From lede-commits at lists.infradead.org  Wed Jan 29 07:53:28 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 10:53:28 -0500
Subject: [openwrt/openwrt]  qualcommax: ipq807x: Remove OEM UBI volume before
 upgrade for Linksys MX devices
In-Reply-To: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
References: <173816600574.1116229.4674742768888209246@git-01.infra.openwrt.org>
Message-ID: <mailman.47911.1738166014.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/df1f6e1e186a99b2180abac5da87f071b7f6b3fa

commit df1f6e1e186a99b2180abac5da87f071b7f6b3fa
Author: Pawe? Owoc <frut3k7 at gmail.com>
AuthorDate: Thu Jan 2 22:31:33 2025 +0100

    qualcommax: ipq807x: Remove OEM UBI volume before upgrade for Linksys MX devices
    
    Use 'remove_oem_ubi_volume' function to remove OEM UBI volume before upgrade.
    This allows to upgrade even if we have OEM firmware on the second partition.
    Applies to Linksys MX4200/MX4300/MX5300/MX8500.
    
    Signed-off-by: Pawe? Owoc <frut3k7 at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/14720
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
index 1bc71efdb5..cb60c5daf6 100644
--- a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
+++ b/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/platform.sh
@@ -212,9 +212,13 @@ platform_do_upgrade() {
 		;;
 	linksys,mx4200v1|\
 	linksys,mx4200v2|\
-	linksys,mx4300|\
+	linksys,mx4300)
+		remove_oem_ubi_volume squashfs
+		linksys_mx_do_upgrade "$1"
+		;;
 	linksys,mx5300|\
 	linksys,mx8500)
+		remove_oem_ubi_volume ubifs
 		linksys_mx_do_upgrade "$1"
 		;;
 	prpl,haze|\



From lede-commits at lists.infradead.org  Wed Jan 29 07:56:08 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 10:56:08 -0500
Subject: [openwrt/openwrt]  kexec-tools: update URL
In-Reply-To: <173816616887.1118835.7412421125123606876@git-01.infra.openwrt.org>
References: <173816616887.1118835.7412421125123606876@git-01.infra.openwrt.org>
Message-ID: <mailman.47914.1738166172.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/3e6e9b2116f2e568c9b3d00f74f0512b5d8280c1

commit 3e6e9b2116f2e568c9b3d00f74f0512b5d8280c1
Author: Felix Baumann <felix.bau at gmx.de>
AuthorDate: Tue Jan 28 05:12:19 2025 +0100

    kexec-tools: update URL
    
    Update URL variable to reflect switch to Github for development
    The old URL returns HTTP 404
    
    Signed-off-by: Felix Baumann <felix.bau at gmx.de>
    Link: https://github.com/openwrt/openwrt/pull/17752
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 package/boot/kexec-tools/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/boot/kexec-tools/Makefile b/package/boot/kexec-tools/Makefile
index 0ab6affd3f..ffedd350f4 100644
--- a/package/boot/kexec-tools/Makefile
+++ b/package/boot/kexec-tools/Makefile
@@ -24,7 +24,7 @@ include $(INCLUDE_DIR)/package.mk
 define Package/kexec-tools/Default
   SECTION:=utils
   CATEGORY:=Utilities
-  URL:=http://kernel.org/pub/linux/kernel/people/horms/kexec-tools/
+  URL:=https://github.com/horms/kexec-tools
 endef
 
 define Package/kexec-tools



From lede-commits at lists.infradead.org  Wed Jan 29 12:52:09 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 15:52:09 -0500
Subject: [openwrt/openwrt]  unetd: update to Git HEAD (2025-01-29)
In-Reply-To: <173818392965.1415542.3978631340031607709@git-01.infra.openwrt.org>
References: <173818392965.1415542.3978631340031607709@git-01.infra.openwrt.org>
Message-ID: <mailman.48035.1738183933.1089.lede-commits@lists.infradead.org>

nbd pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/087c5abdf59c37ed3476f6dd8a7775a940f8e38d

commit 087c5abdf59c37ed3476f6dd8a7775a940f8e38d
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Wed Jan 29 21:51:45 2025 +0100

    unetd: update to Git HEAD (2025-01-29)
    
    aff192cda38b ubus: hide local private key in network_get
    24e4aafaaa2f ubus: add detailed peer statistics
    082b5482b97f pex: improve keepalive handling
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 package/network/services/unetd/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/network/services/unetd/Makefile b/package/network/services/unetd/Makefile
index 1d47ca63ca..cc59b9100b 100644
--- a/package/network/services/unetd/Makefile
+++ b/package/network/services/unetd/Makefile
@@ -10,9 +10,9 @@ include $(TOPDIR)/rules.mk
 PKG_NAME:=unetd
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git
-PKG_SOURCE_DATE:=2025-01-27
-PKG_SOURCE_VERSION:=c293afa01c1328ee8a18fc407948d0529353d7eb
-PKG_MIRROR_HASH:=f91e26cd4d4304170d99a80551691291d7920b9f4e357b0775cdeb138523ccc8
+PKG_SOURCE_DATE:=2025-01-29
+PKG_SOURCE_VERSION:=082b5482b97f20dc4745bc3d645e33b584cc28e4
+PKG_MIRROR_HASH:=090e7dab3b9a3358706dcee4f1889b7a1f0bdf535f2d6a0580f4160e23ccf9cb
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd at nbd.name>



From lede-commits at lists.infradead.org  Wed Jan 29 14:01:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Wed, 29 Jan 2025 17:01:38 -0500
Subject: [openwrt/openwrt]  ramips: pinctrl: allow mux SDXC pins for mt76x8
In-Reply-To: <173818809812.1486621.7101352383469597306@git-01.infra.openwrt.org>
References: <173818809812.1486621.7101352383469597306@git-01.infra.openwrt.org>
Message-ID: <mailman.48048.1738188102.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/1a75172721a1c917312105e9e0449fa431c0154c

commit 1a75172721a1c917312105e9e0449fa431c0154c
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Wed Jan 1 16:06:10 2025 +0800

    ramips: pinctrl: allow mux SDXC pins for mt76x8
    
    The mt76x8 SDXC pin register definition is incompatible with the
    mtmips generic pinctrl driver structure. This hack allows us to
    mux the SDXC IO to different pin groups in device tree.
    
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/17446
    (cherry picked from commit 05ec3b50a8e673786dda0224b23f18b5d96a4a65)
    Link: https://github.com/openwrt/openwrt/pull/17754
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...trl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch | 105 +++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch b/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch
new file mode 100644
index 0000000000..69dcd7fb2c
--- /dev/null
+++ b/target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch
@@ -0,0 +1,105 @@
+From: Shiji Yang <yangshiji66 at outlook.com>
+Date: Wed, 1 Jan 2025 13:30:11 +0800
+Subject: [PATCH] pinctrl: mtmips: allow mux SDXC pins for mt76x8
+
+This is a hack to supprot two types of mt76x8 SDXC pinmaps:
+
+a) Use ethernet phy pins as SDXC IO.
+
+&pinctrl {
+	ephy-digital;
+
+	sdxc_iot_mode: sdxc_iot_mode {
+		esd {
+			groups = "esd";
+			function = "iot";
+		};
+
+		sdxc {
+			groups = "sdmode";
+			function = "sdxc";
+		};
+	};
+};
+
+b) Use I2S/I2C/GPIO0/UART1 pins as SDXC IO.
+
+&pinctrl {
+	ephy-analog;
+
+	sdxc_router_mode: sdxc_router_mode {
+		groups = "esd", "gpio", "i2c", "i2s", "sdmode", "uart1";
+		function = "gpio";
+	};
+};
+
+Signed-off-by: Shiji Yang <yangshiji66 at outlook.com>
+---
+ drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 24 ++++++++++++++++++++++-
+ 1 file changed, 22 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
+@@ -1,10 +1,13 @@
+ // SPDX-License-Identifier: GPL-2.0-only
+ 
++#include <asm/mach-ralink/ralink_regs.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/of.h>
+ #include "pinctrl-mtmips.h"
+ 
++#define SYSC_REG_AGPIO_CFG		0x3c
++
+ #define MT76X8_GPIO_MODE_MASK		0x3
+ 
+ #define MT76X8_GPIO_MODE_P4LED_KN	58
+@@ -26,6 +29,7 @@
+ #define MT76X8_GPIO_MODE_I2C		20
+ #define MT76X8_GPIO_MODE_REFCLK		18
+ #define MT76X8_GPIO_MODE_PERST		16
++#define MT76X8_GPIO_MODE_ESD		15
+ #define MT76X8_GPIO_MODE_WDT		14
+ #define MT76X8_GPIO_MODE_SPI		12
+ #define MT76X8_GPIO_MODE_SDMODE		10
+@@ -74,6 +78,12 @@ static struct mtmips_pmx_func refclk_grp
+ static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
+ static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
+ static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
++/*
++ * "esd" (Ethernet SDXC) group supports two mode:
++ * "gpio" - SDXC mux to I2S/I2C/GPIO0/UART1 pins with "gpio" mode
++ * "iot"  - SDXC mux to EPHY pins, eth p1-p4 pad must be set to "digital"
++ */
++static struct mtmips_pmx_func esd_grp[] = { FUNC("iot", 0, 47, 1) };
+ 
+ static struct mtmips_pmx_func sd_mode_grp[] = {
+ 	FUNC("jtag", 3, 22, 8),
+@@ -216,6 +226,7 @@ static struct mtmips_pmx_group mt76x8_pi
+ 	GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST),
+ 	GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT),
+ 	GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI),
++	GRP("esd", esd_grp, 1, MT76X8_GPIO_MODE_ESD),
+ 	GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK,
+ 				1, MT76X8_GPIO_MODE_SDMODE),
+ 	GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK,
+@@ -257,7 +268,18 @@ static struct mtmips_pmx_group mt76x8_pi
+ 
+ static int mt76x8_pinctrl_probe(struct platform_device *pdev)
+ {
+-	return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	int ret;
++
++	ret = mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
++	if (ret)
++		return ret;
++
++	if (of_property_present(pdev->dev.of_node, "ephy-analog"))
++		rt_sysc_m32(0xf << 17, 0, SYSC_REG_AGPIO_CFG);
++	else if (of_property_present(pdev->dev.of_node, "ephy-digital"))
++		rt_sysc_m32(0xf << 17, 0xf << 17, SYSC_REG_AGPIO_CFG);
++
++	return ret;
+ }
+ 
+ static const struct of_device_id mt76x8_pinctrl_match[] = {



From lede-commits at lists.infradead.org  Thu Jan 30 04:08:20 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 30 Jan 2025 07:08:20 -0500
Subject: [openwrt/openwrt]  x86: Add kmod-drm-i915 as default package
In-Reply-To: <173823890078.2437077.700444432741300230@git-01.infra.openwrt.org>
References: <173823890078.2437077.700444432741300230@git-01.infra.openwrt.org>
Message-ID: <mailman.48262.1738238904.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/8390599c9a29dbb0019447df9086cb8667bfd3d7

commit 8390599c9a29dbb0019447df9086cb8667bfd3d7
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Wed Jan 29 23:37:34 2025 +0100

    x86: Add kmod-drm-i915 as default package
    
    Add kmod-drm-i915 to the default packages. It was build into the kernel
    before and is now build as a kernel module.
    
    Fixes: 77cfe8fd15d3 ("x86: make i915 as a kmod with required firmware")
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
    Link: https://github.com/openwrt/openwrt/pull/17781
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/x86/image/64.mk      | 2 +-
 target/linux/x86/image/generic.mk | 3 ++-
 target/linux/x86/image/legacy.mk  | 3 ++-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/linux/x86/image/64.mk b/target/linux/x86/image/64.mk
index 7bc79006d3..88c0248b58 100644
--- a/target/linux/x86/image/64.mk
+++ b/target/linux/x86/image/64.mk
@@ -4,7 +4,7 @@ define Device/generic
   DEVICE_PACKAGES += \
 	kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-dwmac-intel kmod-e1000e kmod-e1000 \
 	kmod-forcedeth kmod-fs-vfat kmod-igb kmod-igc kmod-ixgbe kmod-r8169 \
-	kmod-tg3
+	kmod-tg3 kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic
diff --git a/target/linux/x86/image/generic.mk b/target/linux/x86/image/generic.mk
index e9545fbf31..f8dd15ed36 100644
--- a/target/linux/x86/image/generic.mk
+++ b/target/linux/x86/image/generic.mk
@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86
   DEVICE_PACKAGES += kmod-3c59x kmod-8139too kmod-e100 kmod-e1000 kmod-natsemi \
 	kmod-ne2k-pci kmod-pcnet32 kmod-r8169 kmod-sis900 kmod-tg3 \
-	kmod-via-rhine kmod-via-velocity kmod-forcedeth kmod-fs-vfat
+	kmod-via-rhine kmod-via-velocity kmod-forcedeth kmod-fs-vfat \
+	kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic
diff --git a/target/linux/x86/image/legacy.mk b/target/linux/x86/image/legacy.mk
index 6c0d8e78f9..cf65a542f0 100644
--- a/target/linux/x86/image/legacy.mk
+++ b/target/linux/x86/image/legacy.mk
@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86/legacy
   DEVICE_PACKAGES += kmod-3c59x kmod-8139too kmod-e100 kmod-e1000 \
 	kmod-natsemi kmod-ne2k-pci kmod-pcnet32 kmod-r8169 kmod-sis900 \
-	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth
+	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth \
+	kmod-drm-i915
   GRUB2_VARIANT := legacy
 endef
 TARGET_DEVICES += generic



From lede-commits at lists.infradead.org  Thu Jan 30 04:35:27 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 30 Jan 2025 07:35:27 -0500
Subject: [openwrt/openwrt]  mediatek: fix TUF-AX4200 WAN LED
In-Reply-To: <173824052702.2463444.14839767717499395852@git-01.infra.openwrt.org>
References: <173824052702.2463444.14839767717499395852@git-01.infra.openwrt.org>
Message-ID: <mailman.48286.1738240602.1089.lede-commits@lists.infradead.org>

robimarko pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/85c41253d927ae6a31845d888780a4462efe61ef

commit 85c41253d927ae6a31845d888780a4462efe61ef
Author: Jan Hoffmann <jan at 3e8.eu>
AuthorDate: Thu Jan 30 10:40:25 2025 +0100

    mediatek: fix TUF-AX4200 WAN LED
    
    With the current LED configuration using "mxl,led-config", the WAN LED
    stops working after the interface is brought down and up again.
    
    Since the driver also properly supports PHY LEDs now, switch to that
    instead. This makes the LED work properly, but requires configuration
    from userspace.
    
    Fixes: #17782
    Signed-off-by: Jan Hoffmann <jan at 3e8.eu>
    Link: https://github.com/openwrt/openwrt/pull/17785
    Signed-off-by: Robert Marko <robimarko at gmail.com>
---
 target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts        | 12 ++++++++++--
 target/linux/mediatek/filogic/base-files/etc/board.d/01_leds |  3 +++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
index e40602fa21..9f015cca9b 100644
--- a/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
+++ b/target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
@@ -136,8 +136,16 @@
 		reset-assert-us = <10000>;
 		reset-deassert-us = <10000>;
 
-		/* LED0: CONN (WAN white) */
-		mxl,led-config = <0x03f0 0x0 0x0 0x0>;
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led at 0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_WHITE>;
+				function = LED_FUNCTION_WAN;
+			};
+		};
 	};
 
 	switch: switch at 1f {
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
index fded01a73e..c1e4cec054 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
@@ -11,6 +11,9 @@ abt,asr3000)
 	ucidef_set_led_netdev "wlan2g" "WLAN2G" "green:wlan-2ghz" "phy0-ap0"
 	ucidef_set_led_netdev "wlan5g" "WLAN5G" "green:wlan-5ghz" "phy1-ap0"
 	;;
+asus,tuf-ax4200)
+	ucidef_set_led_netdev "wan" "WAN" "mdio-bus:06:white:wan" "eth1" "link tx rx"
+	;;
 confiabits,mt7981)
 	ucidef_set_led_netdev "lan1" "lan1" "blue:lan-1" "lan1" "link tx rx"
 	ucidef_set_led_netdev "lan2" "lan2" "blue:lan-2" "lan2" "link tx rx"



From lede-commits at lists.infradead.org  Thu Jan 30 09:10:38 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 30 Jan 2025 12:10:38 -0500
Subject: [openwrt/openwrt]  procd: update to Git HEAD (2025-01-30)
In-Reply-To: <173825703873.2750202.9698360720985016669@git-01.infra.openwrt.org>
References: <173825703873.2750202.9698360720985016669@git-01.infra.openwrt.org>
Message-ID: <mailman.48444.1738257049.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/51b7df9913034e29c7a4087acc0a261206447e26

commit 51b7df9913034e29c7a4087acc0a261206447e26
Author: Christian Marangi <ansuelsmth at gmail.com>
AuthorDate: Thu Jan 30 18:10:10 2025 +0100

    procd: update to Git HEAD (2025-01-30)
    
    f2d5031c4b68 jail: seccomp-oci: fix uninitialized pointer read in error path
    8dad8a26a255 jail: always handle mkdir() return value
    dd93c2ac6b12 uxc: kill command expects --signal parameter
    1e5c40e07928 jail: fix NULL-pointer dereference when connection to ubus failed
    7fcb5a275fcf ubus: expose firmware_url in system call
    
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 package/system/procd/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile
index 65cc0ad9f6..c7846f21bd 100644
--- a/package/system/procd/Makefile
+++ b/package/system/procd/Makefile
@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
-PKG_MIRROR_HASH:=41dbb5352eff931ecc78c4ce9a081645c26a7fb8dc57cdd6521a2f8d3a142567
-PKG_SOURCE_DATE:=2024-12-22
-PKG_SOURCE_VERSION:=42d3937654508b04da64969f9d764ac2ec411904
+PKG_MIRROR_HASH:=cad8681f04922a3ba05363330a2896a598572a2beee980692f1cd7c8d7136b5e
+PKG_SOURCE_DATE:=2025-01-30
+PKG_SOURCE_VERSION:=7fcb5a275fcff5ab697357c86ce568c71128b982
 CMAKE_INSTALL:=1
 
 PKG_LICENSE:=GPL-2.0



From lede-commits at lists.infradead.org  Thu Jan 30 10:25:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 30 Jan 2025 13:25:47 -0500
Subject: [openwrt/openwrt]  config: add VERSION_FIRMWARE_URL
In-Reply-To: <173826154714.2830118.8789871171083216080@git-01.infra.openwrt.org>
References: <173826154714.2830118.8789871171083216080@git-01.infra.openwrt.org>
Message-ID: <mailman.48503.1738261551.1089.lede-commits@lists.infradead.org>

ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/17f8a197f36597e13dde136b7e97ea09548921de

commit 17f8a197f36597e13dde136b7e97ea09548921de
Author: Paul Spooren <mail at aparcar.org>
AuthorDate: Wed Jan 29 19:09:54 2025 +0000

    config: add VERSION_FIRMWARE_URL
    
    This new value points to where firmware can be downloaded. It's not
    about a single release but all available firmware releases.
    
    In the next step, this URL should be exposed via `ubus call system
    board` as an entry of the `distribution` field. With that value, the
    running firmware can check for newer releases.
    
    We already have VERSION_REPO however that's different and only meant for
    package managers to download their fitting package indexes/packages.
    
    Signed-off-by: Paul Spooren <mail at aparcar.org>
    Link: https://github.com/openwrt/openwrt/pull/17780
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 include/version.mk                          | 6 +++++-
 package/base-files/files/usr/lib/os-release | 1 +
 package/base-files/image-config.in          | 6 ++++++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/version.mk b/include/version.mk
index 1ac29b629a..e9829e860a 100644
--- a/include/version.mk
+++ b/include/version.mk
@@ -18,6 +18,7 @@ PKG_CONFIG_DEPENDS += \
 	CONFIG_VERSION_MANUFACTURER_URL \
 	CONFIG_VERSION_PRODUCT \
 	CONFIG_VERSION_SUPPORT_URL \
+	CONFIG_VERSION_FIRMWARE_URL \
 	CONFIG_VERSION_HWREV \
 
 sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1))))
@@ -50,6 +51,9 @@ VERSION_HOME_URL:=$(if $(VERSION_HOME_URL),$(VERSION_HOME_URL),https://openwrt.o
 VERSION_SUPPORT_URL:=$(call qstrip,$(CONFIG_VERSION_SUPPORT_URL))
 VERSION_SUPPORT_URL:=$(if $(VERSION_SUPPORT_URL),$(VERSION_SUPPORT_URL),https://forum.openwrt.org/)
 
+VERSION_FIRMWARE_URL:=$(call qstrip,$(CONFIG_VERSION_FIRMWARE_URL))
+VERSION_FIRMWARE_URL:=$(if $(VERSION_FIRMWARE_URL),$(VERSION_FIRMWARE_URL),https://downloads.openwrt.org/)
+
 VERSION_PRODUCT:=$(call qstrip,$(CONFIG_VERSION_PRODUCT))
 VERSION_PRODUCT:=$(if $(VERSION_PRODUCT),$(VERSION_PRODUCT),Generic)
 
@@ -103,7 +107,7 @@ VERSION_SED_SCRIPT:=$(SED) 's,%U,$(call sed_escape,$(VERSION_REPO)),g' \
 	-e 's,%b,$(call sed_escape,$(VERSION_BUG_URL)),g' \
 	-e 's,%u,$(call sed_escape,$(VERSION_HOME_URL)),g' \
 	-e 's,%s,$(call sed_escape,$(VERSION_SUPPORT_URL)),g' \
+	-e 's,%f,$(call sed_escape,$(VERSION_FIRMWARE_URL)),g' \
 	-e 's,%P,$(call sed_escape,$(VERSION_PRODUCT)),g' \
 	-e 's,%h,$(call sed_escape,$(VERSION_HWREV)),g' \
 	-e 's,%B,$(call sed_escape,$(SOURCE_DATE_EPOCH)),g'
-
diff --git a/package/base-files/files/usr/lib/os-release b/package/base-files/files/usr/lib/os-release
index 12db2c0ac6..7682101dc3 100644
--- a/package/base-files/files/usr/lib/os-release
+++ b/package/base-files/files/usr/lib/os-release
@@ -7,6 +7,7 @@ VERSION_ID="%v"
 HOME_URL="%u"
 BUG_URL="%b"
 SUPPORT_URL="%s"
+FIRMWARE_URL="%f"
 BUILD_ID="%R"
 OPENWRT_BOARD="%S"
 OPENWRT_ARCH="%A"
diff --git a/package/base-files/image-config.in b/package/base-files/image-config.in
index dee06e9b86..67ef4d415a 100644
--- a/package/base-files/image-config.in
+++ b/package/base-files/image-config.in
@@ -241,6 +241,12 @@ if VERSIONOPT
 		help
 			This an URL to provide users seeking support
 
+	config VERSION_FIRMWARE_URL
+		string
+		prompt "Firmware URL"
+		help
+			This is an URL to provide users for downloading firmware
+
 	config VERSION_PRODUCT
 		string
 		prompt "Product name"



From lede-commits at lists.infradead.org  Thu Jan 30 11:17:53 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Thu, 30 Jan 2025 14:17:53 -0500
Subject: [openwrt/openwrt]  generic: net: phy: realtek: work-around hang on
 SerDes setup
In-Reply-To: <173826467303.2882405.16237150649499208262@git-01.infra.openwrt.org>
References: <173826467303.2882405.16237150649499208262@git-01.infra.openwrt.org>
Message-ID: <mailman.48520.1738264677.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/c87a767801ef375feadb0a5c41d5a674ad3a7d2c

commit c87a767801ef375feadb0a5c41d5a674ad3a7d2c
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 30 05:49:43 2025 +0000

    generic: net: phy: realtek: work-around hang on SerDes setup
    
    On some but not all devices using the RTL8221B 2.5GBit/s PHY the SerDes
    setup sequence may hang under some circumstances (eg. <2500M link
    partner present during boot).
    
    RTL8221B-VB-CG 2.5Gbps PHY (C45) mdio-bus:01: rtl822xb_config_init failed: -110
    
    Work-around the issue by performing a hardware reset and subsequent
    retry of the SerDes setup, which seems to always succeed.
    
    Doing this requires moving ALDPS setup to config_init (which is anyway
    the better place for that) as it otherwise doesn't survive the reset.
    
    Also disable listening on MDIO address 0 which may be used by other PHYs
    despite being spec'ed as "broadcast address", as bus activity on address
    0 may otherwise confuse the RealTek PHY for good reasons.
    
    Tested-by: Luis Mita <luis at luismita.com>
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
---
 ...phy-realtek-introduce-rtl822x_aldps_probe.patch | 104 ---------------------
 .../720-04-net-phy-realtek-setup-aldps.patch       |  42 +++++++++
 ...-realtek-detect-early-version-of-RTL8221B.patch |   2 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  18 ++--
 ...phy-realtek-mark-existing-MMDs-as-present.patch |   2 +-
 ...net-phy-realtek-work-around-broken-serdes.patch |  58 ++++++++++++
 ...09-net-phy-realtek-disable-MDIO-broadcast.patch |  27 ++++++
 7 files changed, 138 insertions(+), 115 deletions(-)

diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
deleted file mode 100644
index 6610af12c3..0000000000
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel at makrotopia.org>
-Date: Sat, 22 Apr 2023 03:26:01 +0100
-Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
-
-Setup Link Down Power Saving Mode according the DTS property
-just like for RTL821x 1GE PHYs.
-
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
----
- drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -82,6 +82,10 @@
- 
- #define RTL822X_VND2_GANLPAR				0xa414
- 
-+#define RTL8221B_PHYCR1				0xa430
-+#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
-+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
-+
- #define RTL8366RB_POWER_SAVE			0x15
- #define RTL8366RB_POWER_SAVE_ON			BIT(12)
- 
-@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
- 	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
- }
- 
-+static int rtl822x_aldps_probe(struct phy_device *phydev)
-+{
-+	struct device *dev = &phydev->mdio.dev;
-+	int val;
-+
-+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
-+	if (val < 0)
-+		return val;
-+
-+	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
-+		val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
-+	else
-+		val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
-+
-+	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
-+
-+	return rtl822x_probe(phydev);
-+}
-+
- static int rtlgen_resume(struct phy_device *phydev)
- {
- 	int ret = genphy_resume(phydev);
-@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc838),
- 		.name           = "RTL8226-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc848),
- 		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
-@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch
new file mode 100644
index 0000000000..23b3ca893a
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch
@@ -0,0 +1,42 @@
+From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Sat, 22 Apr 2023 03:26:01 +0100
+Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
+
+Setup Link Down Power Saving Mode according the DTS property
+just like for RTL821x 1GE PHYs.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -82,6 +82,10 @@
+ 
+ #define RTL822X_VND2_GANLPAR				0xa414
+ 
++#define RTL8221B_PHYCR1				0xa430
++#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
++#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
++		ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				 RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	else
++		ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				   RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	if (ret < 0)
++		return ret;
++
+ 	/* Disable SGMII AN */
+ 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
+ 	if (ret < 0)
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 22c271c3eb..d7fbf3a2a6 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index 3e9b34b8a5..45ca5413f3 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
-@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
diff --git a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
index 1ef42e866d..555e5905d3 100644
--- a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
+++ b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
+@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
  	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
  			 phydev->supported);
  
diff --git a/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch b/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch
new file mode 100644
index 0000000000..e356a0a6ee
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch
@@ -0,0 +1,58 @@
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 30 Jan 2025 05:33:12 +0000
+Subject: [PATCH] net: phy: realtek: work around broken SerDes
+
+For still unknown reasons the SerDes init sequence may sometimes
+time out because a self-clearing bit never clears, indicating the
+PHY has entered an unrecoverable error state.
+
+Work-around the issue by triggering a hardware reset and retry the
+setup sequence while warning the user that this has happened.
+This is really more of a work-around than a fix, and should be
+replaced by a better actual fix in future (hopefully).
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
+ 	return 0;
+ }
+ 
++static int rtl822xb_config_init_war(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822xb_config_init(phydev);
++
++	if (ret == -ETIMEDOUT) {
++		phydev_warn(phydev, "SerDes setup timed out, retrying\n");
++		phy_device_reset(phydev, 1);
++		phy_device_reset(phydev, 0);
++		ret = rtl822xb_config_init(phydev);
++	}
++
++	return ret;
++}
++
+ static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+ 				      phy_interface_t iface)
+ {
+@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
+@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
diff --git a/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch b/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch
new file mode 100644
index 0000000000..b2d26a8780
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch
@@ -0,0 +1,27 @@
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 30 Jan 2025 05:38:31 +0000
+Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
+
+RealTek's PHYs by default also listen on MDIO address 0 which is defined
+as broadcast address. This can lead to problems if there is an actual PHY
+(such as MT7981 built-in PHY) present at this address, as accessing that
+PHY may then confuse the RealTek PHY.
+
+Disabled listening on the MDIO broadcast address to avoid such problems.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
+ 			     phydev->host_interfaces) ||
+ 		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ 
++	/* disable listening on MDIO broadcast address (0) */
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
++	if (ret < 0)
++		return ret;
++
+ 	/* fill in possible interfaces */
+ 	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+ 		     has_2500);



From lede-commits at lists.infradead.org  Fri Jan 31 01:48:12 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 31 Jan 2025 04:48:12 -0500
Subject: [openwrt/openwrt]  mediatek: filogic: fix 2.5G phy compatible for
 WR3000H
In-Reply-To: <173831689293.3731545.5422144826673557212@git-01.infra.openwrt.org>
References: <173831689293.3731545.5422144826673557212@git-01.infra.openwrt.org>
Message-ID: <mailman.48645.1738316896.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/dcc5587374ace475cc2f2a94afd1c51e10946c3d

commit dcc5587374ace475cc2f2a94afd1c51e10946c3d
Author: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
AuthorDate: Sun Jan 26 20:23:09 2025 +0100

    mediatek: filogic: fix 2.5G phy compatible for WR3000H
    
    Following the initial support of the Cudy WR3000H with PHY C22 for the 2.5G WAN
    interface, several improvements fixing issues with RealTek RTL8221B PHYs have
    been merged.
    Therefore we can now bring the DT in line with other equipment and declare the
    2.5G WAN PHY as C45.
    
    Fixes: 9d66b8b ("mediatek: filogic: Add support for cudy wr3000h")
    Signed-off-by: Juan Pedro Paredes Caballero <juanpedro.paredes at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17739
    [reword commit description]
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
index 3b858f7638..71760b2088 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts
@@ -160,7 +160,7 @@
 	};
 
 	phy6: ethernet-phy at 6 {
-		compatible = "ethernet-phy-ieee802.3-c22";
+		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <6>;
 		reset-assert-us = <100000>;
 		reset-deassert-us = <100000>;



From lede-commits at lists.infradead.org  Fri Jan 31 03:14:25 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 31 Jan 2025 06:14:25 -0500
Subject: [openwrt/openwrt]  generic: 6.6: backport upstream r8169 patches
In-Reply-To: <173832206527.3918142.12705071722343810891@git-01.infra.openwrt.org>
References: <173832206527.3918142.12705071722343810891@git-01.infra.openwrt.org>
Message-ID: <mailman.48694.1738322069.1089.lede-commits@lists.infradead.org>

noltari pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/084618f8db7d0e413b47bab3e0ea70804bf84ee2

commit 084618f8db7d0e413b47bab3e0ea70804bf84ee2
Author: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
AuthorDate: Fri Jan 31 08:57:11 2025 +0100

    generic: 6.6: backport upstream r8169 patches
    
    b11bff90f2ad r8169: add support for RTL8125BP rev.b
    b3593df26ab1 r8169: add support for RTL8125D rev.b
    b299ea006928 r8169: adjust version numbering for RTL8126
    bb18265c3aba r8169: remove support for chip version 11
    2e20bf8cc057 r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
    e340bff27e63 r8169: copy vendor driver 2.5G/5G EEE advertisement constraints
    
    The EEE advertisement patch has been reworked for linux v6.6 because
    phy_set_eee_broken() is only present on linux >= v6.13 and eee_broken_modes
    declaration has been converted to a bitmap, so linkmode_set_bit() can't be
    used either.
    https://github.com/torvalds/linux/commit/e340bff27e63ed61a1e9895bed546107859e48a7
    https://github.com/torvalds/linux/commit/ed623fb8e38e2a241da12864778ec9c9cf930c65
    https://github.com/torvalds/linux/commit/721aa69e708b7432af83c4bb00a30e2b7c27da28
    
    Signed-off-by: ?lvaro Fern?ndez Rojas <noltari at gmail.com>
---
 ...vendor-driver-2.5G-5G-EEE-advertisement-c.patch |  82 +++++++
 ...e-unused-flag-RTL_FLAG_TASK_RESET_NO_QUEU.patch |  35 +++
 ...-r8169-remove-support-for-chip-version-11.patch | 114 +++++++++
 ...8169-adjust-version-numbering-for-RTL8126.patch | 257 +++++++++++++++++++++
 ...6.14-r8169-add-support-for-RTL8125D-rev.b.patch |  90 ++++++++
 ....14-r8169-add-support-for-RTL8125BP-rev.b.patch | 184 +++++++++++++++
 6 files changed, 762 insertions(+)

diff --git a/target/linux/generic/backport-6.6/780-44-v6.13-r8169-copy-vendor-driver-2.5G-5G-EEE-advertisement-c.patch b/target/linux/generic/backport-6.6/780-44-v6.13-r8169-copy-vendor-driver-2.5G-5G-EEE-advertisement-c.patch
new file mode 100644
index 0000000000..fb01dad458
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-44-v6.13-r8169-copy-vendor-driver-2.5G-5G-EEE-advertisement-c.patch
@@ -0,0 +1,82 @@
+From e340bff27e63ed61a1e9895bed546107859e48a7 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Fri, 8 Nov 2024 08:08:24 +0100
+Subject: [PATCH] r8169: copy vendor driver 2.5G/5G EEE advertisement
+ constraints
+
+Vendor driver r8125 doesn't advertise 2.5G EEE on RTL8125A, and r8126
+doesn't advertise 5G EEE. Likely there are compatibility issues,
+therefore do the same in r8169.
+With this change we don't have to disable 2.5G EEE advertisement in
+rtl8125a_config_eee_phy() any longer.
+We use new phylib accessor phy_set_eee_broken() to mark the respective
+EEE modes as broken.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/ce185e10-8a2f-4cf8-a49b-fd8fb3c3c8a1 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c       |  6 ++++++
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 16 ++++------------
+ 2 files changed, 10 insertions(+), 12 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5236,6 +5236,11 @@ static int r8169_mdio_register(struct rt
+ 			      tp->phydev->supported_eee);
+ 	phy_support_asym_pause(tp->phydev);
+ 
++	/* mimic behavior of r8125/r8126 vendor drivers */
++	if (tp->mac_version == RTL_GIGA_MAC_VER_61)
++		tp->phydev->eee_broken_modes |= MDIO_EEE_2_5GT;
++	tp->phydev->eee_broken_modes |= MDIO_EEE_5GT;
++
+ 	/* PHY will be woken up in rtl_open() */
+ 	phy_suspend(tp->phydev);
+ 
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -96,15 +96,7 @@ static void rtl8125_common_config_eee_ph
+ 	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
+ }
+ 
+-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
+-{
+-	rtl8168g_config_eee_phy(phydev);
+-	/* disable EEE at 2.5Gbps */
+-	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+-	rtl8125_common_config_eee_phy(phydev);
+-}
+-
+-static void rtl8125b_config_eee_phy(struct phy_device *phydev)
++static void rtl8125_config_eee_phy(struct phy_device *phydev)
+ {
+ 	rtl8168g_config_eee_phy(phydev);
+ 	rtl8125_common_config_eee_phy(phydev);
+@@ -1066,7 +1058,7 @@ static void rtl8125a_2_hw_phy_config(str
+ 	rtl8168g_enable_gphy_10m(phydev);
+ 
+ 	rtl8168g_disable_aldps(phydev);
+-	rtl8125a_config_eee_phy(phydev);
++	rtl8125_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
+@@ -1106,7 +1098,7 @@ static void rtl8125b_hw_phy_config(struc
+ 
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
+-	rtl8125b_config_eee_phy(phydev);
++	rtl8125_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
+@@ -1116,7 +1108,7 @@ static void rtl8125d_hw_phy_config(struc
+ 	rtl8168g_enable_gphy_10m(phydev);
+ 	rtl8125_legacy_force_mode(phydev);
+ 	rtl8168g_disable_aldps(phydev);
+-	rtl8125b_config_eee_phy(phydev);
++	rtl8125_config_eee_phy(phydev);
+ }
+ 
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
diff --git a/target/linux/generic/backport-6.6/780-45-v6.14-r8169-remove-unused-flag-RTL_FLAG_TASK_RESET_NO_QUEU.patch b/target/linux/generic/backport-6.6/780-45-v6.14-r8169-remove-unused-flag-RTL_FLAG_TASK_RESET_NO_QUEU.patch
new file mode 100644
index 0000000000..476f7a5760
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-45-v6.14-r8169-remove-unused-flag-RTL_FLAG_TASK_RESET_NO_QUEU.patch
@@ -0,0 +1,35 @@
+From 2e20bf8cc05766dcd0357cdfcada49e1bc45512b Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 2 Dec 2024 21:14:35 +0100
+Subject: [PATCH] r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
+
+After 854d71c555dfc3 ("r8169: remove original workaround for RTL8125
+broken rx issue") this flag isn't used any longer. So remove it.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Michal Swiatkowski <michal.swiatkowski at linux.intel.com>
+Link: https://patch.msgid.link/d9dd214b-3027-4f60-b0e8-6f34a0c76582 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -623,7 +623,6 @@ struct rtl8169_tc_offsets {
+ enum rtl_flag {
+ 	RTL_FLAG_TASK_ENABLED = 0,
+ 	RTL_FLAG_TASK_RESET_PENDING,
+-	RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
+ 	RTL_FLAG_TASK_TX_TIMEOUT,
+ 	RTL_FLAG_MAX
+ };
+@@ -4729,8 +4728,6 @@ static void rtl_task(struct work_struct
+ reset:
+ 		rtl_reset_work(tp);
+ 		netif_wake_queue(tp->dev);
+-	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
+-		rtl_reset_work(tp);
+ 	}
+ }
+ 
diff --git a/target/linux/generic/backport-6.6/780-46-v6.14-r8169-remove-support-for-chip-version-11.patch b/target/linux/generic/backport-6.6/780-46-v6.14-r8169-remove-support-for-chip-version-11.patch
new file mode 100644
index 0000000000..9ffe091140
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-46-v6.14-r8169-remove-support-for-chip-version-11.patch
@@ -0,0 +1,114 @@
+From bb18265c3aba92b91a1355609769f3e967b65dee Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Mon, 2 Dec 2024 21:20:02 +0100
+Subject: [PATCH] r8169: remove support for chip version 11
+
+This is a follow-up to 982300c115d2 ("r8169: remove detection of chip
+version 11 (early RTL8168b)"). Nobody complained yet, so remove
+support for this chip version.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/b689ab6d-20b5-4b64-bd7e-531a0a972ba3 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169.h            |  2 +-
+ drivers/net/ethernet/realtek/r8169_main.c       | 14 +-------------
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 10 ----------
+ 3 files changed, 2 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -23,7 +23,7 @@ enum mac_version {
+ 	RTL_GIGA_MAC_VER_08,
+ 	RTL_GIGA_MAC_VER_09,
+ 	RTL_GIGA_MAC_VER_10,
+-	RTL_GIGA_MAC_VER_11,
++	/* support for RTL_GIGA_MAC_VER_11 has been removed */
+ 	/* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */
+ 	/* RTL_GIGA_MAC_VER_13 was merged with VER_10 */
+ 	RTL_GIGA_MAC_VER_14,
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -103,7 +103,6 @@ static const struct {
+ 	[RTL_GIGA_MAC_VER_08] = {"RTL8102e"				},
+ 	[RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e"			},
+ 	[RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e"			},
+-	[RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b"			},
+ 	[RTL_GIGA_MAC_VER_14] = {"RTL8401"				},
+ 	[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b"			},
+ 	[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp"			},
+@@ -2336,7 +2335,7 @@ static enum mac_version rtl8169_get_mac_
+ 
+ 		/* 8168B family. */
+ 		{ 0x7c8, 0x380,	RTL_GIGA_MAC_VER_17 },
+-		/* This one is very old and rare, let's see if anybody complains.
++		/* This one is very old and rare, support has been removed.
+ 		 * { 0x7c8, 0x300,	RTL_GIGA_MAC_VER_11 },
+ 		 */
+ 
+@@ -3806,7 +3805,6 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
+ 		[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
+ 		[RTL_GIGA_MAC_VER_10] = NULL,
+-		[RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,
+ 		[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
+ 		[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
+ 		[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
+@@ -4682,12 +4680,6 @@ static irqreturn_t rtl8169_interrupt(int
+ 	if (status & LinkChg)
+ 		phy_mac_interrupt(tp->phydev);
+ 
+-	if (unlikely(status & RxFIFOOver &&
+-	    tp->mac_version == RTL_GIGA_MAC_VER_11)) {
+-		netif_stop_queue(tp->dev);
+-		rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
+-	}
+-
+ 	rtl_irq_disable(tp);
+ 	napi_schedule(&tp->napi);
+ out:
+@@ -5107,9 +5099,6 @@ static void rtl_set_irq_mask(struct rtl8
+ 
+ 	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
+ 		tp->irq_mask |= SYSErr | RxFIFOOver;
+-	else if (tp->mac_version == RTL_GIGA_MAC_VER_11)
+-		/* special workaround needed */
+-		tp->irq_mask |= RxFIFOOver;
+ }
+ 
+ static int rtl_alloc_irq(struct rtl8169_private *tp)
+@@ -5304,7 +5293,6 @@ static int rtl_jumbo_max(struct rtl8169_
+ 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+ 		return JUMBO_7K;
+ 	/* RTL8168b */
+-	case RTL_GIGA_MAC_VER_11:
+ 	case RTL_GIGA_MAC_VER_17:
+ 		return JUMBO_4K;
+ 	/* RTL8168c */
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -276,15 +276,6 @@ static void rtl8169sce_hw_phy_config(str
+ 	rtl_writephy_batch(phydev, phy_reg_init);
+ }
+ 
+-static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,
+-				    struct phy_device *phydev)
+-{
+-	phy_write(phydev, 0x1f, 0x0001);
+-	phy_set_bits(phydev, 0x16, BIT(0));
+-	phy_write(phydev, 0x10, 0xf41b);
+-	phy_write(phydev, 0x1f, 0x0000);
+-}
+-
+ static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,
+ 				     struct phy_device *phydev)
+ {
+@@ -1136,7 +1127,6 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_10] = NULL,
+-		[RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,
diff --git a/target/linux/generic/backport-6.6/780-47-v6.14-r8169-adjust-version-numbering-for-RTL8126.patch b/target/linux/generic/backport-6.6/780-47-v6.14-r8169-adjust-version-numbering-for-RTL8126.patch
new file mode 100644
index 0000000000..efa41eb67b
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-47-v6.14-r8169-adjust-version-numbering-for-RTL8126.patch
@@ -0,0 +1,257 @@
+From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1 at gmail.com>
+Date: Fri, 13 Dec 2024 20:01:41 +0100
+Subject: [PATCH] r8169: adjust version numbering for RTL8126
+
+Adjust version numbering for RTL8126, so that it doesn't overlap with
+new RTL8125 versions.
+
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/6a354364-20e9-48ad-a198-468264288757 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169.h          |  4 +-
+ drivers/net/ethernet/realtek/r8169_main.c     | 62 +++++++++----------
+ .../net/ethernet/realtek/r8169_phy_config.c   |  4 +-
+ 3 files changed, 35 insertions(+), 35 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -69,8 +69,8 @@ enum mac_version {
+ 	RTL_GIGA_MAC_VER_61,
+ 	RTL_GIGA_MAC_VER_63,
+ 	RTL_GIGA_MAC_VER_64,
+-	RTL_GIGA_MAC_VER_65,
+-	RTL_GIGA_MAC_VER_66,
++	RTL_GIGA_MAC_VER_70,
++	RTL_GIGA_MAC_VER_71,
+ 	RTL_GIGA_MAC_NONE
+ };
+ 
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -139,8 +139,8 @@ static const struct {
+ 	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ 	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
+ 	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},
+-	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},
+-	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},
++	[RTL_GIGA_MAC_VER_70] = {"RTL8126A",		FIRMWARE_8126A_2},
++	[RTL_GIGA_MAC_VER_71] = {"RTL8126A",		FIRMWARE_8126A_3},
+ };
+ 
+ static const struct pci_device_id rtl8169_pci_tbl[] = {
+@@ -1228,7 +1228,7 @@ static void rtl_writephy(struct rtl8169_
+ 	case RTL_GIGA_MAC_VER_31:
+ 		r8168dp_2_mdio_write(tp, location, val);
+ 		break;
+-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ 		r8168g_mdio_write(tp, location, val);
+ 		break;
+ 	default:
+@@ -1243,7 +1243,7 @@ static int rtl_readphy(struct rtl8169_pr
+ 	case RTL_GIGA_MAC_VER_28:
+ 	case RTL_GIGA_MAC_VER_31:
+ 		return r8168dp_2_mdio_read(tp, location);
+-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ 		return r8168g_mdio_read(tp, location);
+ 	default:
+ 		return r8169_mdio_read(tp, location);
+@@ -1574,7 +1574,7 @@ static void __rtl8169_set_wol(struct rtl
+ 		break;
+ 	case RTL_GIGA_MAC_VER_34:
+ 	case RTL_GIGA_MAC_VER_37:
+-	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
+ 		r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
+ 		break;
+ 	default:
+@@ -2047,7 +2047,7 @@ static void rtl_set_eee_txidle_timer(str
+ 		tp->tx_lpi_timer = timer_val;
+ 		r8168_mac_ocp_write(tp, 0xe048, timer_val);
+ 		break;
+-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ 		tp->tx_lpi_timer = timer_val;
+ 		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
+ 		break;
+@@ -2256,8 +2256,8 @@ static enum mac_version rtl8169_get_mac_
+ 		enum mac_version ver;
+ 	} mac_info[] = {
+ 		/* 8126A family. */
+-		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },
+-		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
++		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_71 },
++		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_70 },
+ 
+ 		/* 8125D family. */
+ 		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },
+@@ -2529,7 +2529,7 @@ static void rtl_init_rxcfg(struct rtl816
+ 	case RTL_GIGA_MAC_VER_61:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
+ 		break;
+-	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
+ 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
+ 			RX_PAUSE_SLOT_ON);
+ 		break;
+@@ -2661,7 +2661,7 @@ static void rtl_wait_txrx_fifo_empty(str
+ 	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
+ 		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ 		break;
+-	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
+ 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
+ 		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ 		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
+@@ -2904,7 +2904,7 @@ static void rtl_enable_exit_l1(struct rt
+ 	case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
+ 		rtl_eri_set_bits(tp, 0xd4, 0x0c00);
+ 		break;
+-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ 		r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
+ 		break;
+ 	default:
+@@ -2918,7 +2918,7 @@ static void rtl_disable_exit_l1(struct r
+ 	case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
+ 		rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
+ 		break;
+-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ 		r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
+ 		break;
+ 	default:
+@@ -2944,8 +2944,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+ 
+ 		rtl_mod_config5(tp, 0, ASPM_en);
+ 		switch (tp->mac_version) {
+-		case RTL_GIGA_MAC_VER_65:
+-		case RTL_GIGA_MAC_VER_66:
++		case RTL_GIGA_MAC_VER_70:
++		case RTL_GIGA_MAC_VER_71:
+ 			val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
+ 			RTL_W8(tp, INT_CFG0_8125, val8);
+ 			break;
+@@ -2956,7 +2956,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+ 
+ 		switch (tp->mac_version) {
+ 		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
+-		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ 			/* reset ephy tx/rx disable timer */
+ 			r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
+ 			/* chip can trigger L1.2 */
+@@ -2968,7 +2968,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+ 	} else {
+ 		switch (tp->mac_version) {
+ 		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
+-		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ 			r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
+ 			break;
+ 		default:
+@@ -2976,8 +2976,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+ 		}
+ 
+ 		switch (tp->mac_version) {
+-		case RTL_GIGA_MAC_VER_65:
+-		case RTL_GIGA_MAC_VER_66:
++		case RTL_GIGA_MAC_VER_70:
++		case RTL_GIGA_MAC_VER_71:
+ 			val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
+ 			RTL_W8(tp, INT_CFG0_8125, val8);
+ 			break;
+@@ -3697,12 +3697,12 @@ static void rtl_hw_start_8125_common(str
+ 	/* disable new tx descriptor format */
+ 	r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
+ 
+-	if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+-	    tp->mac_version == RTL_GIGA_MAC_VER_66)
++	if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++	    tp->mac_version == RTL_GIGA_MAC_VER_71)
+ 		RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
+ 
+-	if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+-	    tp->mac_version == RTL_GIGA_MAC_VER_66)
++	if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++	    tp->mac_version == RTL_GIGA_MAC_VER_71)
+ 		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
+ 	else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
+ 		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
+@@ -3720,8 +3720,8 @@ static void rtl_hw_start_8125_common(str
+ 	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
+ 	r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
+ 	r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
+-	if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+-	    tp->mac_version == RTL_GIGA_MAC_VER_66)
++	if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++	    tp->mac_version == RTL_GIGA_MAC_VER_71)
+ 		r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
+ 	else
+ 		r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
+@@ -3840,8 +3840,8 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ 		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+-		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
+-		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
++		[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
++		[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ 	};
+ 
+ 	if (hw_configs[tp->mac_version])
+@@ -3862,8 +3862,8 @@ static void rtl_hw_start_8125(struct rtl
+ 			RTL_W32(tp, i, 0);
+ 		break;
+ 	case RTL_GIGA_MAC_VER_63:
+-	case RTL_GIGA_MAC_VER_65:
+-	case RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_70:
++	case RTL_GIGA_MAC_VER_71:
+ 		for (i = 0xa00; i < 0xa80; i += 4)
+ 			RTL_W32(tp, i, 0);
+ 		RTL_W16(tp, INT_CFG1_8125, 0x0000);
+@@ -4095,7 +4095,7 @@ static void rtl8169_cleanup(struct rtl81
+ 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
+ 		rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
+ 		break;
+-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ 		rtl_enable_rxdvgate(tp);
+ 		fsleep(2000);
+ 		break;
+@@ -4252,7 +4252,7 @@ static unsigned int rtl_quirk_packet_pad
+ 
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_34:
+-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ 		padto = max_t(unsigned int, padto, ETH_ZLEN);
+ 		break;
+ 	default:
+@@ -5274,7 +5274,7 @@ static void rtl_hw_initialize(struct rtl
+ 	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
+ 		rtl_hw_init_8168g(tp);
+ 		break;
+-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ 		rtl_hw_init_8125(tp);
+ 		break;
+ 	default:
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+-		[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
+-		[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
++		[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
++		[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ 	};
+ 
+ 	if (phy_configs[ver])
diff --git a/target/linux/generic/backport-6.6/780-48-v6.14-r8169-add-support-for-RTL8125D-rev.b.patch b/target/linux/generic/backport-6.6/780-48-v6.14-r8169-add-support-for-RTL8125D-rev.b.patch
new file mode 100644
index 0000000000..eeede542af
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-48-v6.14-r8169-add-support-for-RTL8125D-rev.b.patch
@@ -0,0 +1,90 @@
+From b3593df26ab19f114d613693fa8a92ab202803d0 Mon Sep 17 00:00:00 2001
+From: ChunHao Lin <hau at realtek.com>
+Date: Fri, 13 Dec 2024 20:02:58 +0100
+Subject: [PATCH] r8169: add support for RTL8125D rev.b
+
+Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
+based on the one with XID 0x688, but with different firmware file.
+
+Signed-off-by: ChunHao Lin <hau at realtek.com>
+[hkallweit1 at gmail.com: rebased after adjusted version numbering]
+Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Reviewed-by: Simon Horman <horms at kernel.org>
+Link: https://patch.msgid.link/75e5e9ec-d01f-43ac-b0f4-e7456baf18d1 at gmail.com
+Signed-off-by: Jakub Kicinski <kuba at kernel.org>
+---
+ drivers/net/ethernet/realtek/r8169.h            | 1 +
+ drivers/net/ethernet/realtek/r8169_main.c       | 6 ++++++
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
+ 3 files changed, 8 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -69,6 +69,7 @@ enum mac_version {
+ 	RTL_GIGA_MAC_VER_61,
+ 	RTL_GIGA_MAC_VER_63,
+ 	RTL_GIGA_MAC_VER_64,
++	RTL_GIGA_MAC_VER_65,
+ 	RTL_GIGA_MAC_VER_70,
+ 	RTL_GIGA_MAC_VER_71,
+ 	RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -56,6 +56,7 @@
+ #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"
+ #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
+ #define FIRMWARE_8125D_1	"rtl_nic/rtl8125d-1.fw"
++#define FIRMWARE_8125D_2	"rtl_nic/rtl8125d-2.fw"
+ #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
+ 
+@@ -139,6 +140,7 @@ static const struct {
+ 	/* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ 	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
+ 	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},
++	[RTL_GIGA_MAC_VER_65] = {"RTL8125D",		FIRMWARE_8125D_2},
+ 	[RTL_GIGA_MAC_VER_70] = {"RTL8126A",		FIRMWARE_8126A_2},
+ 	[RTL_GIGA_MAC_VER_71] = {"RTL8126A",		FIRMWARE_8126A_3},
+ };
+@@ -706,6 +708,7 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);
+ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
+ MODULE_FIRMWARE(FIRMWARE_8125D_1);
++MODULE_FIRMWARE(FIRMWARE_8125D_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+ 
+@@ -2260,6 +2263,7 @@ static enum mac_version rtl8169_get_mac_
+ 		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_70 },
+ 
+ 		/* 8125D family. */
++		{ 0x7cf, 0x689,	RTL_GIGA_MAC_VER_65 },
+ 		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },
+ 
+ 		/* 8125B family. */
+@@ -3840,6 +3844,7 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ 		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
++		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
+ 		[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
+ 		[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ 	};
+@@ -3858,6 +3863,7 @@ static void rtl_hw_start_8125(struct rtl
+ 	switch (tp->mac_version) {
+ 	case RTL_GIGA_MAC_VER_61:
+ 	case RTL_GIGA_MAC_VER_64:
++	case RTL_GIGA_MAC_VER_65:
+ 		for (i = 0xa00; i < 0xb00; i += 4)
+ 			RTL_W32(tp, i, 0);
+ 		break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1162,6 +1162,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
++		[RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ 	};
diff --git a/target/linux/generic/backport-6.6/780-49-v6.14-r8169-add-support-for-RTL8125BP-rev.b.patch b/target/linux/generic/backport-6.6/780-49-v6.14-r8169-add-support-for-RTL8125BP-rev.b.patch
new file mode 100644
index 0000000000..f101bdc6fb
--- /dev/null
+++ b/target/linux/generic/backport-6.6/780-49-v6.14-r8169-add-support-for-RTL8125BP-rev.b.patch
@@ -0,0 +1,184 @@
+From b11bff90f2ad52c5c55c822ecd20326619a73898 Mon Sep 17 00:00:00 2001
+From: ChunHao Lin <hau at realtek.com>
+Date: Tue, 7 Jan 2025 14:43:55 +0800
+Subject: [PATCH] r8169: add support for RTL8125BP rev.b
+
+Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
+DASH and its dash type is "RTL_DASH_25_BP".
+
+Signed-off-by: ChunHao Lin <hau at realtek.com>
+Reviewed-by: Heiner Kallweit <hkallweit1 at gmail.com>
+Link: https://patch.msgid.link/20250107064355.104711-1-hau at realtek.com
+Signed-off-by: Paolo Abeni <pabeni at redhat.com>
+---
+ drivers/net/ethernet/realtek/r8169.h          |  1 +
+ drivers/net/ethernet/realtek/r8169_main.c     | 30 +++++++++++++++++++
+ .../net/ethernet/realtek/r8169_phy_config.c   | 23 ++++++++++++++
+ 3 files changed, 54 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -70,6 +70,7 @@ enum mac_version {
+ 	RTL_GIGA_MAC_VER_63,
+ 	RTL_GIGA_MAC_VER_64,
+ 	RTL_GIGA_MAC_VER_65,
++	RTL_GIGA_MAC_VER_66,
+ 	RTL_GIGA_MAC_VER_70,
+ 	RTL_GIGA_MAC_VER_71,
+ 	RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -57,6 +57,7 @@
+ #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"
+ #define FIRMWARE_8125D_1	"rtl_nic/rtl8125d-1.fw"
+ #define FIRMWARE_8125D_2	"rtl_nic/rtl8125d-2.fw"
++#define FIRMWARE_8125BP_2	"rtl_nic/rtl8125bp-2.fw"
+ #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"
+ 
+@@ -141,6 +142,7 @@ static const struct {
+ 	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},
+ 	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},
+ 	[RTL_GIGA_MAC_VER_65] = {"RTL8125D",		FIRMWARE_8125D_2},
++	[RTL_GIGA_MAC_VER_66] = {"RTL8125BP",		FIRMWARE_8125BP_2},
+ 	[RTL_GIGA_MAC_VER_70] = {"RTL8126A",		FIRMWARE_8126A_2},
+ 	[RTL_GIGA_MAC_VER_71] = {"RTL8126A",		FIRMWARE_8126A_3},
+ };
+@@ -632,6 +634,7 @@ enum rtl_dash_type {
+ 	RTL_DASH_NONE,
+ 	RTL_DASH_DP,
+ 	RTL_DASH_EP,
++	RTL_DASH_25_BP,
+ };
+ 
+ struct rtl8169_private {
+@@ -709,6 +712,7 @@ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
+ MODULE_FIRMWARE(FIRMWARE_8125D_1);
+ MODULE_FIRMWARE(FIRMWARE_8125D_2);
++MODULE_FIRMWARE(FIRMWARE_8125BP_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+ 
+@@ -1361,10 +1365,19 @@ static void rtl8168ep_driver_start(struc
+ 		rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
+ }
+ 
++static void rtl8125bp_driver_start(struct rtl8169_private *tp)
++{
++	r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
++	r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
++	r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
++}
++
+ static void rtl8168_driver_start(struct rtl8169_private *tp)
+ {
+ 	if (tp->dash_type == RTL_DASH_DP)
+ 		rtl8168dp_driver_start(tp);
++	else if (tp->dash_type == RTL_DASH_25_BP)
++		rtl8125bp_driver_start(tp);
+ 	else
+ 		rtl8168ep_driver_start(tp);
+ }
+@@ -1385,10 +1398,19 @@ static void rtl8168ep_driver_stop(struct
+ 		rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
+ }
+ 
++static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
++{
++	r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
++	r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
++	r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
++}
++
+ static void rtl8168_driver_stop(struct rtl8169_private *tp)
+ {
+ 	if (tp->dash_type == RTL_DASH_DP)
+ 		rtl8168dp_driver_stop(tp);
++	else if (tp->dash_type == RTL_DASH_25_BP)
++		rtl8125bp_driver_stop(tp);
+ 	else
+ 		rtl8168ep_driver_stop(tp);
+ }
+@@ -1411,6 +1433,7 @@ static bool rtl_dash_is_enabled(struct r
+ 	case RTL_DASH_DP:
+ 		return r8168dp_check_dash(tp);
+ 	case RTL_DASH_EP:
++	case RTL_DASH_25_BP:
+ 		return r8168ep_check_dash(tp);
+ 	default:
+ 		return false;
+@@ -1425,6 +1448,8 @@ static enum rtl_dash_type rtl_get_dash_t
+ 		return RTL_DASH_DP;
+ 	case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
+ 		return RTL_DASH_EP;
++	case RTL_GIGA_MAC_VER_66:
++		return RTL_DASH_25_BP;
+ 	default:
+ 		return RTL_DASH_NONE;
+ 	}
+@@ -2262,6 +2287,9 @@ static enum mac_version rtl8169_get_mac_
+ 		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_71 },
+ 		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_70 },
+ 
++		/* 8125BP family. */
++		{ 0x7cf, 0x681,	RTL_GIGA_MAC_VER_66 },
++
+ 		/* 8125D family. */
+ 		{ 0x7cf, 0x689,	RTL_GIGA_MAC_VER_65 },
+ 		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },
+@@ -3845,6 +3873,7 @@ static void rtl_hw_config(struct rtl8169
+ 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ 		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ 		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
++		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
+ 		[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
+ 		[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ 	};
+@@ -3864,6 +3893,7 @@ static void rtl_hw_start_8125(struct rtl
+ 	case RTL_GIGA_MAC_VER_61:
+ 	case RTL_GIGA_MAC_VER_64:
+ 	case RTL_GIGA_MAC_VER_65:
++	case RTL_GIGA_MAC_VER_66:
+ 		for (i = 0xa00; i < 0xb00; i += 4)
+ 			RTL_W32(tp, i, 0);
+ 		break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struc
+ 	rtl8125_config_eee_phy(phydev);
+ }
+ 
++static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
++				    struct phy_device *phydev)
++{
++	r8169_apply_firmware(tp);
++	rtl8168g_enable_gphy_10m(phydev);
++
++	r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
++
++	phy_write(phydev, 0x1f, 0x0b87);
++	phy_write(phydev, 0x16, 0x8088);
++	phy_modify(phydev, 0x17, 0xff00, 0x9000);
++	phy_write(phydev, 0x16, 0x808f);
++	phy_modify(phydev, 0x17, 0xff00, 0x9000);
++	phy_write(phydev, 0x1f, 0x0000);
++
++	r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
++
++	rtl8125_legacy_force_mode(phydev);
++	rtl8168g_disable_aldps(phydev);
++	rtl8125_config_eee_phy(phydev);
++}
++
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+ 				   struct phy_device *phydev)
+ {
+@@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
++		[RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
+ 		[RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ 	};



From lede-commits at lists.infradead.org  Fri Jan 31 12:38:00 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 31 Jan 2025 15:38:00 -0500
Subject: [openwrt/openwrt]  x86: Add kmod-drm-i915 as default package
In-Reply-To: <173835588032.423572.2624316296048474577@git-01.infra.openwrt.org>
References: <173835588032.423572.2624316296048474577@git-01.infra.openwrt.org>
Message-ID: <mailman.48976.1738355885.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/7a916c75e8f5625f76fd22d41622333b0524b4b8

commit 7a916c75e8f5625f76fd22d41622333b0524b4b8
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Wed Jan 29 23:37:34 2025 +0100

    x86: Add kmod-drm-i915 as default package
    
    Add kmod-drm-i915 to the default packages. It was build into the kernel
    before and is now build as a kernel module.
    
    Fixes: 77cfe8fd15d3 ("x86: make i915 as a kmod with required firmware")
    Link: https://github.com/openwrt/openwrt/pull/17781
    Signed-off-by: Robert Marko <robimarko at gmail.com>
    (cherry picked from commit 8390599c9a29dbb0019447df9086cb8667bfd3d7)
    Link: https://github.com/openwrt/openwrt/pull/17792
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/x86/image/64.mk      | 2 +-
 target/linux/x86/image/generic.mk | 3 ++-
 target/linux/x86/image/legacy.mk  | 3 ++-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/linux/x86/image/64.mk b/target/linux/x86/image/64.mk
index 7bc79006d3..88c0248b58 100644
--- a/target/linux/x86/image/64.mk
+++ b/target/linux/x86/image/64.mk
@@ -4,7 +4,7 @@ define Device/generic
   DEVICE_PACKAGES += \
 	kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-dwmac-intel kmod-e1000e kmod-e1000 \
 	kmod-forcedeth kmod-fs-vfat kmod-igb kmod-igc kmod-ixgbe kmod-r8169 \
-	kmod-tg3
+	kmod-tg3 kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic
diff --git a/target/linux/x86/image/generic.mk b/target/linux/x86/image/generic.mk
index e9545fbf31..f8dd15ed36 100644
--- a/target/linux/x86/image/generic.mk
+++ b/target/linux/x86/image/generic.mk
@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86
   DEVICE_PACKAGES += kmod-3c59x kmod-8139too kmod-e100 kmod-e1000 kmod-natsemi \
 	kmod-ne2k-pci kmod-pcnet32 kmod-r8169 kmod-sis900 kmod-tg3 \
-	kmod-via-rhine kmod-via-velocity kmod-forcedeth kmod-fs-vfat
+	kmod-via-rhine kmod-via-velocity kmod-forcedeth kmod-fs-vfat \
+	kmod-drm-i915
   GRUB2_VARIANT := generic
 endef
 TARGET_DEVICES += generic
diff --git a/target/linux/x86/image/legacy.mk b/target/linux/x86/image/legacy.mk
index 6c0d8e78f9..cf65a542f0 100644
--- a/target/linux/x86/image/legacy.mk
+++ b/target/linux/x86/image/legacy.mk
@@ -3,7 +3,8 @@ define Device/generic
   DEVICE_MODEL := x86/legacy
   DEVICE_PACKAGES += kmod-3c59x kmod-8139too kmod-e100 kmod-e1000 \
 	kmod-natsemi kmod-ne2k-pci kmod-pcnet32 kmod-r8169 kmod-sis900 \
-	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth
+	kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth \
+	kmod-drm-i915
   GRUB2_VARIANT := legacy
 endef
 TARGET_DEVICES += generic



From lede-commits at lists.infradead.org  Fri Jan 31 12:39:47 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 31 Jan 2025 15:39:47 -0500
Subject: [openwrt/openwrt]  generic: net: phy: realtek: work-around hang on
 SerDes setup
In-Reply-To: <173835598782.426026.2006724071624742480@git-01.infra.openwrt.org>
References: <173835598782.426026.2006724071624742480@git-01.infra.openwrt.org>
Message-ID: <mailman.48977.1738355993.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/81db3077483388ec8fa7be441e34756438678f78

commit 81db3077483388ec8fa7be441e34756438678f78
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Thu Jan 30 05:49:43 2025 +0000

    generic: net: phy: realtek: work-around hang on SerDes setup
    
    On some but not all devices using the RTL8221B 2.5GBit/s PHY the SerDes
    setup sequence may hang under some circumstances (eg. <2500M link
    partner present during boot).
    
    RTL8221B-VB-CG 2.5Gbps PHY (C45) mdio-bus:01: rtl822xb_config_init failed: -110
    
    Work-around the issue by performing a hardware reset and subsequent
    retry of the SerDes setup, which seems to always succeed.
    
    Doing this requires moving ALDPS setup to config_init (which is anyway
    the better place for that) as it otherwise doesn't survive the reset.
    
    Also disable listening on MDIO address 0 which may be used by other PHYs
    despite being spec'ed as "broadcast address", as bus activity on address
    0 may otherwise confuse the RealTek PHY for good reasons.
    
    Tested-by: Luis Mita <luis at luismita.com>
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    (cherry picked from commit c87a767801ef375feadb0a5c41d5a674ad3a7d2c)
    Link: https://github.com/openwrt/openwrt/pull/17790
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 ...phy-realtek-introduce-rtl822x_aldps_probe.patch | 104 ---------------------
 .../720-04-net-phy-realtek-setup-aldps.patch       |  42 +++++++++
 ...-realtek-detect-early-version-of-RTL8221B.patch |   2 +-
 ...phy-realtek-support-interrupt-of-RTL8221B.patch |  18 ++--
 ...phy-realtek-mark-existing-MMDs-as-present.patch |   2 +-
 ...net-phy-realtek-work-around-broken-serdes.patch |  58 ++++++++++++
 ...09-net-phy-realtek-disable-MDIO-broadcast.patch |  27 ++++++
 7 files changed, 138 insertions(+), 115 deletions(-)

diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
deleted file mode 100644
index 6610af12c3..0000000000
--- a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel at makrotopia.org>
-Date: Sat, 22 Apr 2023 03:26:01 +0100
-Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
-
-Setup Link Down Power Saving Mode according the DTS property
-just like for RTL821x 1GE PHYs.
-
-Signed-off-by: Daniel Golle <daniel at makrotopia.org>
----
- drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/drivers/net/phy/realtek/realtek_main.c
-+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -82,6 +82,10 @@
- 
- #define RTL822X_VND2_GANLPAR				0xa414
- 
-+#define RTL8221B_PHYCR1				0xa430
-+#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
-+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
-+
- #define RTL8366RB_POWER_SAVE			0x15
- #define RTL8366RB_POWER_SAVE_ON			BIT(12)
- 
-@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
- 	return rtlgen_is_c45_match(phydev, RTL_8251B, true);
- }
- 
-+static int rtl822x_aldps_probe(struct phy_device *phydev)
-+{
-+	struct device *dev = &phydev->mdio.dev;
-+	int val;
-+
-+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
-+	if (val < 0)
-+		return val;
-+
-+	if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
-+		val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
-+	else
-+		val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
-+
-+	phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
-+
-+	return rtl822x_probe(phydev);
-+}
-+
- static int rtlgen_resume(struct phy_device *phydev)
- {
- 	int ret = genphy_resume(phydev);
-@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc838),
- 		.name           = "RTL8226-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
- 	}, {
- 		PHY_ID_MATCH_EXACT(0x001cc848),
- 		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-+		.probe          = rtl822x_aldps_probe,
- 		.soft_reset     = genphy_soft_reset,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
-@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
-@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
- 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.get_features   = rtl822x_get_features,
- 		.config_aneg    = rtl822x_config_aneg,
- 		.config_init    = rtl822xb_config_init,
-@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
- 		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
- 		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
- 		.soft_reset     = genphy_soft_reset,
--		.probe		= rtl822x_probe,
-+		.probe          = rtl822x_aldps_probe,
- 		.config_init    = rtl822xb_config_init,
- 		.get_rate_matching = rtl822xb_get_rate_matching,
- 		.get_features   = rtl822x_c45_get_features,
diff --git a/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch
new file mode 100644
index 0000000000..23b3ca893a
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch
@@ -0,0 +1,42 @@
+From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Sat, 22 Apr 2023 03:26:01 +0100
+Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
+
+Setup Link Down Power Saving Mode according the DTS property
+just like for RTL821x 1GE PHYs.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -82,6 +82,10 @@
+ 
+ #define RTL822X_VND2_GANLPAR				0xa414
+ 
++#define RTL8221B_PHYCR1				0xa430
++#define RTL8221B_PHYCR1_ALDPS_EN		BIT(2)
++#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN	BIT(12)
++
+ #define RTL8366RB_POWER_SAVE			0x15
+ #define RTL8366RB_POWER_SAVE_ON			BIT(12)
+ 
+@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
+ 	if (ret < 0)
+ 		return ret;
+ 
++	if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
++		ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				 RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	else
++		ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
++				   RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
++	if (ret < 0)
++		return ret;
++
+ 	/* Disable SGMII AN */
+ 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
+ 	if (ret < 0)
diff --git a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
index 22c271c3eb..d7fbf3a2a6 100644
--- a/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
@@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 Signed-off-by: Mieczyslaw Nalewaj <namiltd at yahoo.com>
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
  static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
  			       bool is_c45)
  {
diff --git a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
index 3e9b34b8a5..45ca5413f3 100644
--- a/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
+++ b/target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
  	return IRQ_HANDLED;
  }
  
@@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329 at gmail.com>
  static struct phy_driver realtek_drvs[] = {
  	{
  		PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
-@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
  		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.get_features   = rtl822x_get_features,
-@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
  	}, {
  		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
  		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
 +		.config_intr	= rtl8221b_config_intr,
 +		.handle_interrupt = rtl8221b_handle_interrupt,
  		.soft_reset     = genphy_soft_reset,
- 		.probe          = rtl822x_aldps_probe,
+ 		.probe		= rtl822x_probe,
  		.config_init    = rtl822xb_config_init,
diff --git a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
index 1ef42e866d..555e5905d3 100644
--- a/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
+++ b/target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
@@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel at makrotopia.org>
 
 --- a/drivers/net/phy/realtek/realtek_main.c
 +++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
+@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
  	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
  			 phydev->supported);
  
diff --git a/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch b/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch
new file mode 100644
index 0000000000..e356a0a6ee
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch
@@ -0,0 +1,58 @@
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 30 Jan 2025 05:33:12 +0000
+Subject: [PATCH] net: phy: realtek: work around broken SerDes
+
+For still unknown reasons the SerDes init sequence may sometimes
+time out because a self-clearing bit never clears, indicating the
+PHY has entered an unrecoverable error state.
+
+Work-around the issue by triggering a hardware reset and retry the
+setup sequence while warning the user that this has happened.
+This is really more of a work-around than a fix, and should be
+replaced by a better actual fix in future (hopefully).
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
+ 	return 0;
+ }
+ 
++static int rtl822xb_config_init_war(struct phy_device *phydev)
++{
++	int ret;
++
++	ret = rtl822xb_config_init(phydev);
++
++	if (ret == -ETIMEDOUT) {
++		phydev_warn(phydev, "SerDes setup timed out, retrying\n");
++		phy_device_reset(phydev, 1);
++		phy_device_reset(phydev, 0);
++		ret = rtl822xb_config_init(phydev);
++	}
++
++	return ret;
++}
++
+ static int rtl822xb_get_rate_matching(struct phy_device *phydev,
+ 				      phy_interface_t iface)
+ {
+@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
+@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
+ 		.handle_interrupt = rtl8221b_handle_interrupt,
+ 		.soft_reset     = genphy_soft_reset,
+ 		.probe		= rtl822x_probe,
+-		.config_init    = rtl822xb_config_init,
++		.config_init    = rtl822xb_config_init_war,
+ 		.get_rate_matching = rtl822xb_get_rate_matching,
+ 		.get_features   = rtl822x_c45_get_features,
+ 		.config_aneg    = rtl822x_c45_config_aneg,
diff --git a/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch b/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch
new file mode 100644
index 0000000000..b2d26a8780
--- /dev/null
+++ b/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch
@@ -0,0 +1,27 @@
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Thu, 30 Jan 2025 05:38:31 +0000
+Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
+
+RealTek's PHYs by default also listen on MDIO address 0 which is defined
+as broadcast address. This can lead to problems if there is an actual PHY
+(such as MT7981 built-in PHY) present at this address, as accessing that
+PHY may then confuse the RealTek PHY.
+
+Disabled listening on the MDIO broadcast address to avoid such problems.
+
+Signed-off-by: Daniel Golle <daniel at makrotopia.org>
+---
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
+ 			     phydev->host_interfaces) ||
+ 		    phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ 
++	/* disable listening on MDIO broadcast address (0) */
++	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
++	if (ret < 0)
++		return ret;
++
+ 	/* fill in possible interfaces */
+ 	__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
+ 		     has_2500);



From lede-commits at lists.infradead.org  Fri Jan 31 15:02:11 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Fri, 31 Jan 2025 18:02:11 -0500
Subject: [openwrt/openwrt]  mvebu: fix kmod for switch on wrt32x / venom
In-Reply-To: <173836453157.563869.187122091048880630@git-01.infra.openwrt.org>
References: <173836453157.563869.187122091048880630@git-01.infra.openwrt.org>
Message-ID: <mailman.49078.1738364536.1089.lede-commits@lists.infradead.org>

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/eb5f98fdf97ac2293c63c4002f16bb92f1e796eb

commit eb5f98fdf97ac2293c63c4002f16bb92f1e796eb
Author: Kabuli Chana <newtownBuild at gmail.com>
AuthorDate: Thu Jan 30 17:10:08 2025 -0700

    mvebu: fix kmod for switch on wrt32x / venom
    
    commit eaa82118ead missed kmod change for wrt32x
    
    Fixes: eaa82118eadf ("mvebu: Switch to use a module for mv88e6xxx")
    Signed-off-by: Kabuli Chana <newtownBuild at gmail.com>
    Link: https://github.com/openwrt/openwrt/pull/17793
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/mvebu/image/cortexa9.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index b88de7e0a6..5430ae3457 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -319,7 +319,8 @@ define Device/linksys_wrt32x
   DEVICE_ALT0_VENDOR := Linksys
   DEVICE_ALT0_MODEL := Venom
   DEVICE_DTS := armada-385-linksys-venom
-  DEVICE_PACKAGES += kmod-btmrvl kmod-mwifiex-sdio mwlwifi-firmware-88w8964
+  DEVICE_PACKAGES += kmod-btmrvl kmod-mwifiex-sdio mwlwifi-firmware-88w8964 \
+	kmod-dsa-mv88e6xxx
   KERNEL_SIZE := 6144k
   KERNEL := kernel-bin | append-dtb
   SUPPORTED_DEVICES += armada-385-linksys-venom linksys,venom



From lede-commits at lists.infradead.org  Fri Jan 31 21:08:42 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 01 Feb 2025 00:08:42 -0500
Subject: [openwrt/openwrt]  mediatek: mt7622: fix SATA on BPi-R64
In-Reply-To: <173838652211.922069.7912378109075252222@git-01.infra.openwrt.org>
References: <173838652211.922069.7912378109075252222@git-01.infra.openwrt.org>
Message-ID: <mailman.49103.1738386531.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/69890e16b37d59b55ba64633522c727f957cb2fd

commit 69890e16b37d59b55ba64633522c727f957cb2fd
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Sat Feb 1 05:03:50 2025 +0000

    mediatek: mt7622: fix SATA on BPi-R64
    
    Two commits which made their way into Linux stable broke the SATA
    support on the BPi-R64.
    
    Fix this by reverting a node rename which broke DT-overlay application
    and import a (still pending) patch re-adding the 'syscon' compatible to
    the pciesys clock-controller which also contains phy-mode bits
    referenced by the ahci_mtk driver expecting to access them using
    syscon_regmap_lookup_by_phandle().
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
---
 ...rt-arm64-dts-mediatek-fix-t-phy-unit-name.patch | 33 ++++++++++++++++++++++
 ...ediatek-mt7622-readd-syscon-to-pciesys-no.patch | 33 ++++++++++++++++++++++
 2 files changed, 66 insertions(+)

diff --git a/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch b/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch
new file mode 100644
index 0000000000..1d53cefd7f
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch
@@ -0,0 +1,33 @@
+From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Sat, 1 Feb 2025 04:24:17 +0000
+Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
+
+This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi  | 2 +-
+ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -908,7 +908,7 @@
+ 		status = "disabled";
+ 	};
+ 
+-	sata_phy: t-phy {
++	sata_phy: t-phy at 1a243000 {
+ 		compatible = "mediatek,mt7622-tphy",
+ 			     "mediatek,generic-tphy-v1";
+ 		#address-cells = <2>;
+--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+@@ -428,7 +428,7 @@
+ 			};
+ 		};
+ 
+-		pcie_phy: t-phy {
++		pcie_phy: t-phy at 11c00000 {
+ 			compatible = "mediatek,mt7986-tphy",
+ 				     "mediatek,generic-tphy-v2";
+ 			ranges;
diff --git a/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch b/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
new file mode 100644
index 0000000000..4ae72fd70a
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
@@ -0,0 +1,33 @@
+From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Fri, 28 Jun 2024 12:55:40 +0200
+Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
+ node
+
+Sata node reference the pciesys with the property mediatek,phy-node
+and that is used as a syscon to access the pciesys regs.
+
+Readd the syscon compatible to pciesys node to restore correct
+functionality of the SATA interface.
+
+Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
+Reported-by: Frank Wunderlich <frank-w at public-files.de>
+Co-developed-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Cc: stable at vger.kernel.org
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -798,7 +798,7 @@
+ 	};
+ 
+ 	pciesys: clock-controller at 1a100800 {
+-		compatible = "mediatek,mt7622-pciesys";
++		compatible = "mediatek,mt7622-pciesys", "syscon";
+ 		reg = <0 0x1a100800 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;



From lede-commits at lists.infradead.org  Fri Jan 31 21:17:37 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 01 Feb 2025 00:17:37 -0500
Subject: [openwrt/openwrt]  mediatek: mt7622: fix SATA on BPi-R64
In-Reply-To: <173838705773.929107.1921359700420275159@git-01.infra.openwrt.org>
References: <173838705773.929107.1921359700420275159@git-01.infra.openwrt.org>
Message-ID: <mailman.49104.1738387061.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/c1d5de0c59efd25ecb5922cb11e5d38b072cf993

commit c1d5de0c59efd25ecb5922cb11e5d38b072cf993
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Sat Feb 1 05:03:50 2025 +0000

    mediatek: mt7622: fix SATA on BPi-R64
    
    Two commits which made their way into Linux stable broke the SATA
    support on the BPi-R64.
    
    Fix this by reverting a node rename which broke DT-overlay application
    and import a (still pending) patch re-adding the 'syscon' compatible to
    the pciesys clock-controller which also contains phy-mode bits
    referenced by the ahci_mtk driver expecting to access them using
    syscon_regmap_lookup_by_phandle().
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    (cherry picked from commit 69890e16b37d59b55ba64633522c727f957cb2fd)
---
 ...rt-arm64-dts-mediatek-fix-t-phy-unit-name.patch | 33 ++++++++++++++++++++++
 ...ediatek-mt7622-readd-syscon-to-pciesys-no.patch | 33 ++++++++++++++++++++++
 2 files changed, 66 insertions(+)

diff --git a/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch b/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch
new file mode 100644
index 0000000000..1d53cefd7f
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch
@@ -0,0 +1,33 @@
+From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel at makrotopia.org>
+Date: Sat, 1 Feb 2025 04:24:17 +0000
+Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
+
+This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi  | 2 +-
+ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -908,7 +908,7 @@
+ 		status = "disabled";
+ 	};
+ 
+-	sata_phy: t-phy {
++	sata_phy: t-phy at 1a243000 {
+ 		compatible = "mediatek,mt7622-tphy",
+ 			     "mediatek,generic-tphy-v1";
+ 		#address-cells = <2>;
+--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+@@ -428,7 +428,7 @@
+ 			};
+ 		};
+ 
+-		pcie_phy: t-phy {
++		pcie_phy: t-phy at 11c00000 {
+ 			compatible = "mediatek,mt7986-tphy",
+ 				     "mediatek,generic-tphy-v2";
+ 			ranges;
diff --git a/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch b/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
new file mode 100644
index 0000000000..4ae72fd70a
--- /dev/null
+++ b/target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
@@ -0,0 +1,33 @@
+From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Fri, 28 Jun 2024 12:55:40 +0200
+Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
+ node
+
+Sata node reference the pciesys with the property mediatek,phy-node
+and that is used as a syscon to access the pciesys regs.
+
+Readd the syscon compatible to pciesys node to restore correct
+functionality of the SATA interface.
+
+Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
+Reported-by: Frank Wunderlich <frank-w at public-files.de>
+Co-developed-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Cc: stable at vger.kernel.org
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -798,7 +798,7 @@
+ 	};
+ 
+ 	pciesys: clock-controller at 1a100800 {
+-		compatible = "mediatek,mt7622-pciesys";
++		compatible = "mediatek,mt7622-pciesys", "syscon";
+ 		reg = <0 0x1a100800 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;



From lede-commits at lists.infradead.org  Fri Jan 31 21:20:51 2025
From: lede-commits at lists.infradead.org (LEDE Commits)
Date: Sat, 01 Feb 2025 00:20:51 -0500
Subject: [openwrt/openwrt]  mediatek: mt7622: fix SATA on BPi-R64
In-Reply-To: <173838725169.931426.9251640228524353805@git-01.infra.openwrt.org>
References: <173838725169.931426.9251640228524353805@git-01.infra.openwrt.org>
Message-ID: <mailman.49105.1738387255.1089.lede-commits@lists.infradead.org>

dangole pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/d62241cf5a208ef7e5637074093f1c9fede113e1

commit d62241cf5a208ef7e5637074093f1c9fede113e1
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Sat Feb 1 05:03:50 2025 +0000

    mediatek: mt7622: fix SATA on BPi-R64
    
    A commit which made their way into Linux stable down to 5.15 broke the
    SATA support on the BPi-R64.
    
    Fix this by importing a (still pending) patch re-adding the 'syscon'
    compatible to the pciesys clock-controller which also contains phy-mode
    bits referenced by the ahci_mtk driver expecting to access them using
    syscon_regmap_lookup_by_phandle().
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    (cherry picked from commit 69890e16b37d59b55ba64633522c727f957cb2fd)
---
 ...ediatek-mt7622-readd-syscon-to-pciesys-no.patch | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/target/linux/mediatek/patches-5.15/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch b/target/linux/mediatek/patches-5.15/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
new file mode 100644
index 0000000000..5689997715
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch
@@ -0,0 +1,33 @@
+From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth at gmail.com>
+Date: Fri, 28 Jun 2024 12:55:40 +0200
+Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
+ node
+
+Sata node reference the pciesys with the property mediatek,phy-node
+and that is used as a syscon to access the pciesys regs.
+
+Readd the syscon compatible to pciesys node to restore correct
+functionality of the SATA interface.
+
+Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
+Reported-by: Frank Wunderlich <frank-w at public-files.de>
+Co-developed-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
+Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
+Cc: stable at vger.kernel.org
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -779,7 +779,7 @@
+ 	};
+ 
+ 	pciesys: clock-controller at 1a100800 {
+-		compatible = "mediatek,mt7622-pciesys";
++		compatible = "mediatek,mt7622-pciesys", "syscon";
+ 		reg = <0 0x1a100800 0 0x1000>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;



