[openwrt/openwrt] qualcommbe: ipq95xx: pcs: fix USXGMII link-up failure

LEDE Commits lede-commits at lists.infradead.org
Sat Apr 12 01:39:07 PDT 2025


ansuel pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/2de5564f7d11ce09a88cade33430cfc66e1cdd7b

commit 2de5564f7d11ce09a88cade33430cfc66e1cdd7b
Author: Mantas Pucka <mantas at 8devices.com>
AuthorDate: Wed Apr 9 11:24:23 2025 +0300

    qualcommbe: ipq95xx: pcs: fix USXGMII link-up failure
    
    USXGMII link-up may fail due to too short delay after PLL reset.
    Increase the delay to fix this.
    
    Signed-off-by: Mantas Pucka <mantas at 8devices.com>
    Link: https://github.com/openwrt/openwrt/pull/18459
    Signed-off-by: Christian Marangi <ansuelsmth at gmail.com>
---
 ...cs-ipq-uniphy-fix-USXGMII-link-up-failure.patch | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/target/linux/qualcommbe/patches-6.6/702-net-pcs-ipq-uniphy-fix-USXGMII-link-up-failure.patch b/target/linux/qualcommbe/patches-6.6/702-net-pcs-ipq-uniphy-fix-USXGMII-link-up-failure.patch
new file mode 100644
index 0000000000..46a1b5f847
--- /dev/null
+++ b/target/linux/qualcommbe/patches-6.6/702-net-pcs-ipq-uniphy-fix-USXGMII-link-up-failure.patch
@@ -0,0 +1,24 @@
+From d75aa2977a42b97d052ed0984fb305a853f55d49 Mon Sep 17 00:00:00 2001
+From: Mantas Pucka <mantas at 8devices.com>
+Date: Wed, 9 Apr 2025 11:16:49 +0300
+Subject: [PATCH] net: pcs: ipq-uniphy: fix USXGMII link-up failure
+
+USXGMII link-up may fail due to too short delay after PLL reset.
+Increase the delay to fix this.
+
+Signed-off-by: Mantas Pucka <mantas at 8devices.com>
+---
+ drivers/net/pcs/pcs-qcom-ipq-uniphy.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/pcs/pcs-qcom-ipq-uniphy.c
++++ b/drivers/net/pcs/pcs-qcom-ipq-uniphy.c
+@@ -490,7 +490,7 @@ static int ipq_unipcs_config_mode(struct
+ 
+ 	/* PCS PLL reset */
+ 	ipq_unipcs_reg_modify32(qunipcs, PCS_PLL_RESET, PCS_ANA_SW_RESET, 0);
+-	fsleep(10000);
++	fsleep(20000);
+ 	ipq_unipcs_reg_modify32(qunipcs, PCS_PLL_RESET,
+ 				PCS_ANA_SW_RESET, PCS_ANA_SW_RESET);
+ 




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