[openwrt/openwrt] ipq40xx: fix AP-303H PSE GPIO pin

LEDE Commits lede-commits at lists.infradead.org
Fri Sep 27 10:12:32 PDT 2024


blocktrron pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/533235182141392d8031a6d2edb9d7edc91bfd5a

commit 533235182141392d8031a6d2edb9d7edc91bfd5a
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Fri Sep 27 19:10:40 2024 +0200

    ipq40xx: fix AP-303H PSE GPIO pin
    
    The GPIO chip is at a different start index compared to OpenWrt master.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches b/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
index f57d4c5888..fcc6e8e745 100644
--- a/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/ipq40xx/base-files/etc/board.d/03_gpio_switches
@@ -7,7 +7,7 @@ board=$(board_name)
 
 case "$board" in
 aruba,ap-303h)
-	ucidef_add_gpio_switch "poe_passtrough" "POE passtrough disable" "546" "1"
+	ucidef_add_gpio_switch "poe_passtrough" "POE passtrough disable" "446" "1"
 	;;
 cellc,rtl30vw)
 	ucidef_add_gpio_switch "w_disable" "W_DISABLE mPCIE pin" "398" "1"




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