[openwrt/openwrt] realtek: 6.6: set phylink supported_interfaces

[LEDE Commits]

svanheule pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/9f8570b0ddc4304cdfa3a1407640b9ae8392c719

commit 9f8570b0ddc4304cdfa3a1407640b9ae8392c719
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Thu Aug 22 02:01:30 2024 -0400

    realtek: 6.6: set phylink supported_interfaces
    
    The supported_interfaces bitmap cannot be empty since mainline kernel
    commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
    be filled"). Fix the dsa and ethernet driver accordingly.
    
    Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
---
 .../realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c     | 17 +++++++++++++++++
 .../files-6.6/drivers/net/ethernet/rtl838x_eth.c        |  1 +
 2 files changed, 18 insertions(+)

diff --git a/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
index 0f14947fda..e32933ee91 100644
--- a/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
+++ b/target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
@@ -652,6 +652,21 @@ static void rtl83xx_config_interface(int port, phy_interface_t interface)
 	pr_debug("configured port %d for interface %s\n", port, phy_modes(interface));
 }
 
+static void rtl83xx_phylink_get_caps(struct dsa_switch *ds, int port,
+				     struct phylink_config *config)
+{
+/*
+ * This capability check will need some love. Depending on the model and the port
+ * different link modes are supported. For now just enable all required values
+ * so that we can make use of the ports.
+ */
+	__set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_QSGMII, config->supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces);
+	__set_bit(PHY_INTERFACE_MODE_1000BASEX, config->supported_interfaces);
+}
+
 static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
 					unsigned int mode,
 					const struct phylink_link_state *state)
@@ -2170,6 +2185,7 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
 	.phy_read		= dsa_phy_read,
 	.phy_write		= dsa_phy_write,
 
+	.phylink_get_caps	= rtl83xx_phylink_get_caps,
 	.phylink_mac_config	= rtl83xx_phylink_mac_config,
 	.phylink_mac_link_down	= rtl83xx_phylink_mac_link_down,
 	.phylink_mac_link_up	= rtl83xx_phylink_mac_link_up,
@@ -2227,6 +2243,7 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
 	.phy_read		= dsa_phy_read,
 	.phy_write		= dsa_phy_write,
 
+	.phylink_get_caps	= rtl83xx_phylink_get_caps,
 	.phylink_mac_config	= rtl93xx_phylink_mac_config,
 	.phylink_mac_link_down	= rtl93xx_phylink_mac_link_down,
 	.phylink_mac_link_up	= rtl93xx_phylink_mac_link_up,
diff --git a/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c
index 15f5ce933e..4439059345 100644
--- a/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c
+++ b/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c
@@ -2642,6 +2642,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
 	priv->pcs.ops = &rtl838x_pcs_ops;
 	priv->phylink_config.dev = &dev->dev;
 	priv->phylink_config.type = PHYLINK_NETDEV;
+	__set_bit(PHY_INTERFACE_MODE_INTERNAL, priv->phylink_config.supported_interfaces);
 
 	phylink = phylink_create(&priv->phylink_config, pdev->dev.fwnode,
 				 phy_mode, &rtl838x_phylink_ops);