[openwrt/openwrt] mediatek: filogic: Cudy WR3000S v1: fix CRLF line endings
LEDE Commits
lede-commits at lists.infradead.org
Fri Nov 29 03:29:53 PST 2024
ynezz pushed a commit to openwrt/openwrt.git, branch openwrt-24.10:
https://git.openwrt.org/de8a1a1e3adfb2085189f2a7de576ca4e6484afe
commit de8a1a1e3adfb2085189f2a7de576ca4e6484afe
Author: Petr Štetiar <ynezz at true.cz>
AuthorDate: Wed Nov 27 08:39:46 2024 +0000
mediatek: filogic: Cudy WR3000S v1: fix CRLF line endings
DTS file for this device seems to be using CRLF line endings, so lets
convert them into Unix-style LF.
Fixes: faf4b3e0f7a5 ("mediatek: filogic: add support for Cudy WR3000S v1")
Link: https://github.com/openwrt/openwrt/pull/17096
Signed-off-by: Petr Štetiar <ynezz at true.cz>
(cherry picked from commit 30ae0b3f1e331646054d8110e931dfaa32f7b414)
---
.../linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts | 566 ++++++++++-----------
1 file changed, 283 insertions(+), 283 deletions(-)
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
index a643969494..cf2f79b407 100644
--- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
+++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts
@@ -1,283 +1,283 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-
-/dts-v1/;
-
-#include <dt-bindings/leds/common.h>
-
-#include "mt7981.dtsi"
-
-/ {
- model = "Cudy WR3000S v1";
- compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
-
- aliases {
- label-mac-device = &gmac0;
- led-boot = &led_status;
- led-failsafe = &led_status;
- led-running = &led_status;
- led-upgrade = &led_status;
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- reset {
- label = "reset";
- linux,code = <KEY_RESTART>;
- gpios = <&pio 1 GPIO_ACTIVE_LOW>;
- };
-
- wps {
- label = "wps";
- linux,code = <KEY_WPS_BUTTON>;
- gpios = <&pio 0 GPIO_ACTIVE_LOW>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_status: led at 0 {
- function = LED_FUNCTION_STATUS;
- color = <LED_COLOR_ID_WHITE>;
- gpios = <&pio 10 GPIO_ACTIVE_LOW>;
- };
-
-
- led_internet {
- function = LED_FUNCTION_WAN_ONLINE;
- color = <LED_COLOR_ID_WHITE>;
- gpios = <&pio 11 GPIO_ACTIVE_LOW>;
- };
-
- led_wps {
- function = LED_FUNCTION_WPS;
- color = <LED_COLOR_ID_WHITE>;
- gpios = <&pio 9 GPIO_ACTIVE_LOW>;
- };
-
- led_wlan2g {
- function = LED_FUNCTION_WLAN_2GHZ;
- color = <LED_COLOR_ID_WHITE>;
- gpios = <&pio 6 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "phy0tpt";
- };
-
- led_wlan5g {
- function = LED_FUNCTION_WLAN_5GHZ;
- color = <LED_COLOR_ID_WHITE>;
- gpios = <&pio 7 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "phy1tpt";
- };
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&watchdog {
- status = "okay";
-};
-
-ð {
- pinctrl-names = "default";
- pinctrl-0 = <&mdio_pins>;
-
- status = "okay";
-
- gmac0: mac at 0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "2500base-x";
-
- nvmem-cell-names = "mac-address";
- nvmem-cells = <&macaddr_bdinfo_de00 0>;
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
-};
-
-&mdio_bus {
- switch: switch at 1f {
- compatible = "mediatek,mt7531";
- reg = <31>;
- reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&pio>;
- interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
- };
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_flash_pins>;
- status = "okay";
-
- spi_nand: flash at 0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "spi-nand";
- reg = <0>;
- spi-max-frequency = <52000000>;
-
- spi-cal-enable;
- spi-cal-mode = "read-data";
- spi-cal-datalen = <7>;
- spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
- spi-cal-addrlen = <5>;
- spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
-
- spi-tx-bus-width = <4>;
- spi-rx-bus-width = <4>;
- mediatek,nmbm;
- mediatek,bmt-max-ratio = <1>;
- mediatek,bmt-max-reserved-blocks = <64>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition at 0 {
- label = "BL2";
- reg = <0x00000 0x0100000>;
- read-only;
- };
-
- partition at 100000 {
- label = "u-boot-env";
- reg = <0x0100000 0x0080000>;
- read-only;
- };
-
- factory: partition at 180000 {
- label = "Factory";
- reg = <0x180000 0x0200000>;
- read-only;
- nvmem-layout {
- compatible = "fixed-layout";
- #address-cells = <1>;
- #size-cells = <1>;
-
- eeprom_factory_0: eeprom at 0 {
- reg = <0x0 0x1000>;
- };
- };
- };
-
- partition at 380000 {
- label = "bdinfo";
- reg = <0x380000 0x0040000>;
- read-only;
- nvmem-layout {
- compatible = "fixed-layout";
- #address-cells = <1>;
- #size-cells = <1>;
-
- macaddr_bdinfo_de00: macaddr at de00 {
- compatible = "mac-base";
- reg = <0xde00 0x6>;
- #nvmem-cell-cells = <1>;
- };
- };
- };
-
- partition at 3C0000 {
- label = "FIP";
- reg = <0x3C0000 0x0200000>;
- read-only;
- };
-
- partition at 580000 {
- label = "ubi";
- reg = <0x5C0000 0x4000000>;
- compatible = "linux,ubi";
- };
- };
- };
-};
-
-&pio {
- spi0_flash_pins: spi0-pins {
- mux {
- function = "spi";
- groups = "spi0", "spi0_wp_hold";
- };
- conf-pu {
- pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
- };
-
- conf-pd {
- pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
- };
- };
-};
-
-&switch {
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port at 0 {
- reg = <0>;
- label = "wan";
-
- nvmem-cell-names = "mac-address";
- nvmem-cells = <&macaddr_bdinfo_de00 1>;
- };
-
- port at 1 {
- reg = <1>;
- label = "lan1";
- };
-
- port at 2 {
- reg = <2>;
- label = "lan2";
- };
-
- port at 3 {
- reg = <3>;
- label = "lan3";
- };
-
- port at 4 {
- reg = <4>;
- label = "lan4";
- };
-
- port at 6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "2500base-x";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
- };
-};
-
-&wifi {
- status = "okay";
- nvmem-cells = <&eeprom_factory_0>;
- nvmem-cell-names = "eeprom";
-};
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "Cudy WR3000S v1";
+ compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
+
+ aliases {
+ label-mac-device = &gmac0;
+ led-boot = &led_status;
+ led-failsafe = &led_status;
+ led-running = &led_status;
+ led-upgrade = &led_status;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status: led at 0 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ };
+
+
+ led_internet {
+ function = LED_FUNCTION_WAN_ONLINE;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+ };
+
+ led_wps {
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ led_wlan2g {
+ function = LED_FUNCTION_WLAN_2GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 6 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ led_wlan5g {
+ function = LED_FUNCTION_WLAN_5GHZ;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ status = "okay";
+
+ gmac0: mac at 0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_bdinfo_de00 0>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+};
+
+&mdio_bus {
+ switch: switch at 1f {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand: flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <7>;
+ spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+ spi-cal-addrlen = <5>;
+ spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "BL2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition at 100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ read-only;
+ };
+
+ factory: partition at 180000 {
+ label = "Factory";
+ reg = <0x180000 0x0200000>;
+ read-only;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory_0: eeprom at 0 {
+ reg = <0x0 0x1000>;
+ };
+ };
+ };
+
+ partition at 380000 {
+ label = "bdinfo";
+ reg = <0x380000 0x0040000>;
+ read-only;
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_bdinfo_de00: macaddr at de00 {
+ compatible = "mac-base";
+ reg = <0xde00 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition at 3C0000 {
+ label = "FIP";
+ reg = <0x3C0000 0x0200000>;
+ read-only;
+ };
+
+ partition at 580000 {
+ label = "ubi";
+ reg = <0x5C0000 0x4000000>;
+ compatible = "linux,ubi";
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ label = "wan";
+
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_bdinfo_de00 1>;
+ };
+
+ port at 1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port at 2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port at 3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port at 4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ port at 6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&wifi {
+ status = "okay";
+ nvmem-cells = <&eeprom_factory_0>;
+ nvmem-cell-names = "eeprom";
+};
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