[openwrt/openwrt] ramips: fix PCIe reset pins for MTC WR1201

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch main:
https://git.openwrt.org/901adc3f2f651bd852de6ad4790e01ea9829eb75

commit 901adc3f2f651bd852de6ad4790e01ea9829eb75
Author: Shiji Yang <yangshiji66 at qq.com>
AuthorDate: Fri Jul 26 18:19:15 2024 +0800

    ramips: fix PCIe reset pins for MTC WR1201
    
    This router has two reset pins, GPIO 8 and GPIO 19. We have to
    configure them correctly to ensure that the wireless NICs work
    properly.
    
    Fixes: https://github.com/openwrt/openwrt/issues/11736
    Signed-off-by: Shiji Yang <yangshiji66 at qq.com>
    Link: https://github.com/openwrt/openwrt/pull/16009
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 target/linux/ramips/dts/mt7621_mtc_wr1201.dts | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
index 31f3eb8657..24303ec5b3 100644
--- a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
+++ b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
@@ -166,8 +166,18 @@
 	status = "okay";
 };
 
+&pcie_pins {
+	uart3 {
+		groups = "uart3";
+		function = "gpio";
+	};
+};
+
 &pcie {
 	status = "okay";
+
+	reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>,
+		      <&gpio 19 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {