[openwrt/openwrt] mediatek: add support for YunCore AX835

LEDE Commits lede-commits at lists.infradead.org
Thu Jul 4 07:16:51 PDT 2024


rmilecki pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/f377e7fade0806e1f2421d36e012e285e4cd3d87

commit f377e7fade0806e1f2421d36e012e285e4cd3d87
Author: Leon M. Busch-George <leon at georgemail.eu>
AuthorDate: Fri Oct 13 12:44:11 2023 +0200

    mediatek: add support for YunCore AX835
    
    Hardware specification:
      SoC: MediaTek MT7981B 2x A53
      Flash: 16MB NOR
      RAM: 256MB
      Ethernet: 2x 10/100/1000 Mbps
      Switch: MediaTek MT7531AE
      WiFi: MediaTek MT7976C
      Button: Reset
      Power: DC 12V 1A, PoE 802.3af 48V
    
    Flash instructions:
    
    Option #1 - SSH
    
      I was able to SSH into the stock firmware of my device.
    
      1. Attach the router to the network
      2. Use scp (-O) to copy the sysupgrade image
      3. Connect using SSH and run `sysupgrade -n`
    
    Option #2 - U-Boot
    
      One way to use the bootloader for flashing is using TFTP:
    
      1. Connect to the router using an ethernet cable
      2  Spin up a TFTP server serving the sysupgrade file
      3. Open the case and attach a UART
      4. Attach power to the router and interrupt the countdown by pressing
         any key
      5. Select option #2 (Upgrade firmware)
      6. Enter IP address information and image name
      7. Wait patiently
    
    Co-Authored-By: Enrique Rodríguez Valencia <enrique.rodriguez at galgus.net>
    Co-Authored-By: Hauke Mehrtens <hauke at hauke-m.de>
    Signed-off-by: Leon M. Busch-George <leon at georgemail.eu>
    (cherry picked from commit b4086f44cd8a739458a0fd12cfaf684515507614)
---
 .../linux/mediatek/dts/mt7981b-yuncore-ax835.dts   | 259 +++++++++++++++++++++
 .../filogic/base-files/etc/board.d/02_network      |   6 +-
 .../filogic/base-files/lib/upgrade/platform.sh     |   3 +-
 target/linux/mediatek/image/filogic.mk             |  19 ++
 4 files changed, 285 insertions(+), 2 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7981b-yuncore-ax835.dts b/target/linux/mediatek/dts/mt7981b-yuncore-ax835.dts
new file mode 100644
index 0000000000..b3ca5bfa2c
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-yuncore-ax835.dts
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/dts-v1/;
+
+#include "mt7981.dtsi"
+
+/ {
+	compatible = "yuncore,ax835", "mediatek,mt7981";
+	model = "YunCore AX835";
+
+	aliases {
+		ethernet0 = &gmac0;
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	reg_led_vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "led_vbus";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		gpio = <&pio 5 GPIO_ACTIVE_HIGH>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: led_system {
+			label = "red:system";
+			gpios = <&pio 4 GPIO_ACTIVE_LOW>;
+		};
+
+		led_wifi24 {
+			label = "green:wifi2";
+			gpios = <&pio 34 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		led_wifi5 {
+			label = "blue:wifi5";
+			gpios = <&pio 35 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led_hwwatchdog {
+			// a gpio-wdt watchdog couldn't be made to work.
+			// the device rebooted after 5 minutes.
+			label = "hwwatchdog";
+			gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "timer";
+			led-pattern = <1000>, <1000>;
+		};
+
+		// there's another "syswatchdog" on gpio2
+	};
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+
+	status = "okay";
+
+	gmac0: mac at 0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+};
+
+&mdio_bus {
+	switch: switch at 1f {
+		compatible = "mediatek,mt7531";
+		reg = <31>;
+		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&pio {
+	spi0_flash_pins: spi0-pins {
+		mux {
+			function = "spi";
+			groups = "spi0", "spi0_wp_hold";
+		};
+	};
+
+	spi2_flash_pins: spi2-pins {
+		mux {
+			function = "spi";
+			groups = "spi2", "spi2_wp_hold";
+		};
+
+		conf-pu {
+			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
+			drive-strength = <8>;
+			bias-pull-up = <103>;
+		};
+
+		conf-pd {
+			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+			drive-strength = <8>;
+			bias-pull-down = <103>;
+		};
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_flash_pins>;
+	status = "disabled";
+};
+
+&spi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_flash_pins>;
+	status = "okay";
+
+	flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+
+		spi-max-frequency = <52000000>;
+		spi-tx-buswidth = <4>;
+		spi-rx-buswidth = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 00000 {
+				label = "BL2";
+				reg = <0x00000 0x40000>;
+				read-only;
+			};
+
+			partition at 40000 {
+				label = "u-boot-env";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			factory: partition at 50000 {
+				label = "Factory";
+				reg = <0x50000 0x10000>;
+				read-only;
+
+				compatible = "nvmem-cells";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				eeprom_factory: eeprom at 0 {
+					reg = <0x0 0x1000>;
+				};
+
+				macaddr_factory_4: macaddr at 4 {
+					reg = <0x4 0x6>;
+				};
+
+				macaddr_factory_24: macaddr at 24 {
+					reg = <0x24 0x6>;
+				};
+
+				macaddr_factory_2a: macaddr at 2a {
+					reg = <0x2a 0x6>;
+				};
+			};
+
+			partition at 100000 {
+				label = "FIP";
+				reg = <0x100000 0x80000>;
+				read-only;
+			};
+
+			partition at 180000 {
+				compatible = "denx,fit";
+				label = "firmware";
+				reg = <0x180000 0xe00000>;
+			};
+		};
+	};
+};
+
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		lan: port at 3 {
+			reg = <3>;
+			label = "lan";
+
+			nvmem-cell-names = "mac-address";
+			nvmem-cells = <&macaddr_factory_2a 0>;
+		};
+
+		port at 4 {
+			reg = <4>;
+			label = "wan";
+
+			nvmem-cell-names = "mac-address";
+			nvmem-cells = <&macaddr_factory_2a 0>;
+		};
+
+		port at 6 {
+			reg = <6>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+			phy-mode = "2500base-x";
+
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&wifi {
+	status = "okay";
+	nvmem-cells = <&eeprom_factory 0>;
+	nvmem-cell-names = "eeprom";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index a8ec200afc..2300d88c7d 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -68,7 +68,8 @@ mediatek_setup_interfaces()
 		ucidef_set_interface_lan "eth0"
 		;;
 	smartrg,sdg-8622|\
-	smartrg,sdg-8632)
+	smartrg,sdg-8632|\
+	yuncore,ax835)
 		ucidef_set_interfaces_lan_wan lan wan
 		;;
 	tplink,tl-xdr6086)
@@ -165,6 +166,9 @@ mediatek_setup_macs()
 		wan_mac=$(mtd_get_mac_ascii Bdata ethaddr_wan)
 		label_mac=$wan_mac
 		;;
+	yuncore,ax835)
+		label_mac=$(mtd_get_mac_binary "Factory" 0x4)
+		;;
 	esac
 
 	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
index b92c0fc863..b43ee50a44 100755
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@@ -111,8 +111,9 @@ platform_do_upgrade() {
 			;;
 		esac
 		;;
+	cudy,re3000-v1|\
 	cudy,wr3000-v1|\
-	cudy,re3000-v1)
+	yuncore,ax835)
 		default_do_upgrade "$1"
 		;;
 	glinet,gl-mt6000)
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 1a714a44e6..66c7715bd1 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -906,6 +906,25 @@ endif
 endef
 TARGET_DEVICES += xiaomi_redmi-router-ax6000-ubootmod
 
+define Device/yuncore_ax835
+  DEVICE_VENDOR := YunCore
+  DEVICE_MODEL := AX835
+  DEVICE_DTS := mt7981b-yuncore-ax835
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_DTS_LOADADDR := 0x47000000
+  IMAGES := sysupgrade.bin
+  IMAGE_SIZE := 14336k
+  SUPPORTED_DEVICES += mediatek,mt7981-spim-nor-rfb
+  KERNEL := kernel-bin | lzma | \
+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+  KERNEL_INITRAMFS := kernel-bin | lzma | \
+	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
+  IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | check-size | append-metadata
+  DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
+endef
+TARGET_DEVICES += yuncore_ax835
+
+
 define Device/zbtlink_zbt-z8102ax
   DEVICE_VENDOR := Zbtlink
   DEVICE_MODEL := ZBT-Z8102AX




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