[openwrt/openwrt] ramips: lzma-loader: use proper register names

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/2216b10ebbf45849f69b46650d8bf4b59d729963

commit 2216b10ebbf45849f69b46650d8bf4b59d729963
Author: Michael Pratt <mcpratt at pm.me>
AuthorDate: Wed Dec 6 14:12:03 2023 -0500

    ramips: lzma-loader: use proper register names
    
    Before this was reworked, in the file for mt7621 subtarget
    (target/linux/ramips/image/lzma-loader/src/board-mt7621.c)
    the "Transmitter shift register empty" bit TEMT was used instead of
    the "Transmitter holding register empty" bit THRE,
    but after the rework, this value was labeled as the THRE bit instead.
    
    Functionally there is no difference, but this is confusing to read,
    as it suggests that the subtargets have different bits for the same
    register in UART when in reality they are exactly the same.
    
    One can use either bit, or both, at user's descretion
    in order to determine whether the UART TX buffer is ready.
    The generic kernel early-printk uses both,
    (arch/mips/kernel/early_printk_8250.c)
    while the ralink-specific early-printk uses only THRE,
    (arch/mips/ralink/early_printk.c).
    
    Define both bits and rewrite macros for readability,
    keep the same values, as changing which to use should be tested first.
    
    Ref: c31319b66 ("ramips: lzma-loader: Refactor loader")
    Signed-off-by: Michael Pratt <mcpratt at pm.me>
    
    (cherry picked from commit 2e47913c644c59aa25fbac2bc6c4297956406b82)
    Signed-off-by: Lech Perczak <lech.perczak at gmail.com>
---
 target/linux/ramips/image/lzma-loader/src/board.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/target/linux/ramips/image/lzma-loader/src/board.c b/target/linux/ramips/image/lzma-loader/src/board.c
index 050ef695f9..9f87cddec7 100644
--- a/target/linux/ramips/image/lzma-loader/src/board.c
+++ b/target/linux/ramips/image/lzma-loader/src/board.c
@@ -26,21 +26,24 @@
 #define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
 #define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1)
 
+#define UART_LSR_THRE		0x20
+#define UART_LSR_TEMT		0x40
+
 #if defined(SOC_MT7620) || defined(SOC_RT3883)
 #define UART_BASE			KSEG1ADDR(0x10000c00)
 #define UART_THR			(UART_BASE + 0x04)
 #define UART_LSR			(UART_BASE + 0x1c)
-#define UART_LSR_THRE_MASK	0x40
+#define UART_LSR_MASK			UART_LSR_TEMT
 #elif defined(SOC_MT7621)
 #define UART_BASE			KSEG1ADDR(0x1e000c00)
 #define UART_THR			(UART_BASE + 0x00)
 #define UART_LSR			(UART_BASE + 0x14)
-#define UART_LSR_THRE_MASK	0x20
+#define UART_LSR_MASK			UART_LSR_THRE
 #elif defined(SOC_RT305X)
 #define UART_BASE			KSEG1ADDR(0x10000500)
 #define UART_THR			(UART_BASE + 0x04)
 #define UART_LSR			(UART_BASE + 0x1c)
-#define UART_LSR_THRE_MASK	0x20
+#define UART_LSR_MASK			UART_LSR_THRE
 #else
 #error "Unsupported SOC..."
 #endif
@@ -56,7 +59,7 @@ void board_init(void)
 
 void board_putc(int ch)
 {
-	while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
+	while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
 	WRITEREG(UART_THR, ch);
-	while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
+	while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
 }