[openwrt/openwrt] uboot-rockchip: add suport for Radxa ROCK Pi E
LEDE Commits
lede-commits at lists.infradead.org
Mon Sep 4 14:39:33 PDT 2023
hauke pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/18b6bae851742605a9b213debec1b360e00cc9bd
commit 18b6bae851742605a9b213debec1b360e00cc9bd
Author: Jayantajit Gogoi <jayanta.gogoi525 at gmail.com>
AuthorDate: Tue Aug 29 15:12:28 2023 +0000
uboot-rockchip: add suport for Radxa ROCK Pi E
Add uboot support for Radxa ROCK Pi E, rockchip rk3328 board.
Add pre-built files to fix swig dependencies.
Specification:
- CPU: Rockchip RK3328 64-bit Quad-core
- RAM: DDR3 256MB ~ 2GB
- Network:
1 x 10/100/1000M Ethernet
1 x 10/100M Ethernet
- USB Host:
1 x USB3.0 Type A HOST
1 x USB2.0 OTG (40-pin pin-header)
- Wireless:
RTL8723DU/RTL8821CU
- Power Supply: Type-C 5V
Installation:
- Write image to SD Card or EMMC with dd
- Boot ROCK Pi E from the SD Card
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525 at gmail.com>
---
package/boot/uboot-rockchip/Makefile | 10 +-
.../src/of-platdata/rock-pi-e-rk3328/dt-decl.h | 24 +++
.../src/of-platdata/rock-pi-e-rk3328/dt-plat.c | 189 +++++++++++++++++++++
.../of-platdata/rock-pi-e-rk3328/dt-structs-gen.h | 54 ++++++
4 files changed, 276 insertions(+), 1 deletion(-)
diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile
index f424abbd44..cdaad7ce46 100644
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@@ -73,6 +73,13 @@ define U-Boot/rock64-rk3328
pine64_rock64
endef
+define U-Boot/rock-pi-e-rk3328
+ $(U-Boot/rk3328/Default)
+ NAME:=ROCK Pi E
+ BUILD_DEVICES:= \
+ radxa_rock-pi-e
+endef
+
# RK3399 boards
define U-Boot/rk3399/Default
@@ -119,7 +126,8 @@ UBOOT_TARGETS := \
orangepi-r1-plus-rk3328 \
orangepi-r1-plus-lts-rk3328 \
roc-cc-rk3328 \
- rock64-rk3328
+ rock64-rk3328 \
+ rock-pi-e-rk3328
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-decl.h b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-decl.h
new file mode 100644
index 0000000000..72675609cd
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-decl.h
@@ -0,0 +1,24 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Declares externs for all device/uclass instances.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+
+/* driver declarations - these allow DM_DRIVER_GET() to be used */
+extern U_BOOT_DRIVER(rockchip_rk3328_cru);
+extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
+extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
+extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
+extern U_BOOT_DRIVER(ns16550_serial);
+extern U_BOOT_DRIVER(rockchip_rk3328_grf);
+
+/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
+extern UCLASS_DRIVER(clk);
+extern UCLASS_DRIVER(mmc);
+extern UCLASS_DRIVER(ram);
+extern UCLASS_DRIVER(serial);
+extern UCLASS_DRIVER(syscon);
diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-plat.c b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-plat.c
new file mode 100644
index 0000000000..f86414d5d3
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-plat.c
@@ -0,0 +1,189 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Declares the U_BOOT_DRIVER() records and platform data.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+/* Allow use of U_BOOT_DRVINFO() in this file */
+#define DT_PLAT_C
+
+#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+/*
+ * driver_info declarations, ordered by 'struct driver_info' linker_list idx:
+ *
+ * idx driver_info driver
+ * --- -------------------- --------------------
+ * 0: clock_controller_at_ff440000 rockchip_rk3328_cru
+ * 1: dmc rockchip_rk3328_dmc
+ * 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
+ * 3: mmc_at_ff520000 rockchip_rk3288_dw_mshc
+ * 4: serial_at_ff130000 ns16550_serial
+ * 5: syscon_at_ff100000 rockchip_rk3328_grf
+ * --- -------------------- --------------------
+ */
+
+/*
+ * Node /clock-controller at ff440000 index 0
+ * driver rockchip_rk3328_cru parent None
+ */
+static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
+ .reg = {0xff440000, 0x1000},
+ .rockchip_grf = 0x38,
+};
+U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
+ .name = "rockchip_rk3328_cru",
+ .plat = &dtv_clock_controller_at_ff440000,
+ .plat_size = sizeof(dtv_clock_controller_at_ff440000),
+ .parent_idx = -1,
+};
+
+/*
+ * Node /dmc index 1
+ * driver rockchip_rk3328_dmc parent None
+ */
+static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
+ .reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
+ 0xff720000, 0x1000, 0xff798000, 0x1000},
+ .rockchip_sdram_params = {0x1, 0xc, 0x3, 0x1, 0x0, 0x0, 0x10, 0x10,
+ 0x10, 0x10, 0x0, 0x9028b189, 0x0, 0x21, 0x482, 0x15,
+ 0x222, 0xff, 0x14d, 0x3, 0x1, 0x0, 0x0, 0x0,
+ 0x43041001, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x20000, 0xd8,
+ 0x100, 0xdc, 0x3200000, 0xe0, 0x0, 0xe4, 0x90000, 0xf4,
+ 0xf011f, 0x100, 0x7090b06, 0x104, 0x50209, 0x108, 0x3030407, 0x10c,
+ 0x202006, 0x110, 0x3020204, 0x114, 0x3030202, 0x120, 0x903, 0x180,
+ 0x800020, 0x184, 0x0, 0x190, 0x7010001, 0x198, 0x5001100, 0x1a0,
+ 0xc0400003, 0x240, 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490,
+ 0x1, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xa, 0x28, 0x6, 0x2c,
+ 0x0, 0x30, 0x5, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
+ 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
+ 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
+ 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
+ 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
+ 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
+ 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
+ 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
+ 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
+ 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
+ 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
+ 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
+ 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
+ 0x77, 0x77, 0x79, 0x9},
+};
+U_BOOT_DRVINFO(dmc) = {
+ .name = "rockchip_rk3328_dmc",
+ .plat = &dtv_dmc,
+ .plat_size = sizeof(dtv_dmc),
+ .parent_idx = -1,
+};
+
+/*
+ * Node /mmc at ff500000 index 2
+ * driver rockchip_rk3288_dw_mshc parent None
+ */
+static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
+ .bus_width = 0x4,
+ .cap_mmc_highspeed = true,
+ .cap_sd_highspeed = true,
+ .card_detect_delay = 0xc8,
+ .clocks = {
+ {0, {317}},
+ {0, {33}},
+ {0, {74}},
+ {0, {78}},},
+ .disable_wp = true,
+ .fifo_depth = 0x100,
+ .interrupts = {0x0, 0xc, 0x4},
+ .max_frequency = 0x8f0d180,
+ .num_slots = 0x1,
+ .pinctrl_0 = {0x45, 0x46, 0x47, 0x48},
+ .pinctrl_names = "default",
+ .reg = {0xff500000, 0x4000},
+ .supports_sd = true,
+ .u_boot_spl_fifo_mode = true,
+ .vmmc_supply = 0x49,
+};
+U_BOOT_DRVINFO(mmc_at_ff500000) = {
+ .name = "rockchip_rk3288_dw_mshc",
+ .plat = &dtv_mmc_at_ff500000,
+ .plat_size = sizeof(dtv_mmc_at_ff500000),
+ .parent_idx = -1,
+};
+
+/*
+ * Node /mmc at ff520000 index 3
+ * driver rockchip_rk3288_dw_mshc parent None
+ */
+static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff520000 = {
+ .bus_width = 0x8,
+ .cap_mmc_highspeed = true,
+ .clocks = {
+ {0, {319}},
+ {0, {35}},
+ {0, {76}},
+ {0, {80}},},
+ .disable_wp = true,
+ .fifo_depth = 0x100,
+ .interrupts = {0x0, 0xe, 0x4},
+ .max_frequency = 0x8f0d180,
+ .mmc_hs200_1_8v = true,
+ .non_removable = true,
+ .num_slots = 0x1,
+ .pinctrl_0 = {0x4a, 0x4b, 0x4c, 0x0},
+ .pinctrl_names = "default",
+ .reg = {0xff520000, 0x4000},
+ .supports_emmc = true,
+ .u_boot_spl_fifo_mode = true,
+ .vmmc_supply = 0x1c,
+ .vqmmc_supply = 0x1d,
+};
+U_BOOT_DRVINFO(mmc_at_ff520000) = {
+ .name = "rockchip_rk3288_dw_mshc",
+ .plat = &dtv_mmc_at_ff520000,
+ .plat_size = sizeof(dtv_mmc_at_ff520000),
+ .parent_idx = -1,
+};
+
+/*
+ * Node /serial at ff130000 index 4
+ * driver ns16550_serial parent None
+ */
+static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
+ .clock_frequency = 0x16e3600,
+ .clocks = {
+ {0, {40}},
+ {0, {212}},},
+ .dma_names = {"tx", "rx"},
+ .dmas = {0x10, 0x6, 0x10, 0x7},
+ .interrupts = {0x0, 0x39, 0x4},
+ .pinctrl_0 = 0x24,
+ .pinctrl_names = "default",
+ .reg = {0xff130000, 0x100},
+ .reg_io_width = 0x4,
+ .reg_shift = 0x2,
+};
+U_BOOT_DRVINFO(serial_at_ff130000) = {
+ .name = "ns16550_serial",
+ .plat = &dtv_serial_at_ff130000,
+ .plat_size = sizeof(dtv_serial_at_ff130000),
+ .parent_idx = -1,
+};
+
+/*
+ * Node /syscon at ff100000 index 5
+ * driver rockchip_rk3328_grf parent None
+ */
+static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
+ .reg = {0xff100000, 0x1000},
+};
+U_BOOT_DRVINFO(syscon_at_ff100000) = {
+ .name = "rockchip_rk3328_grf",
+ .plat = &dtv_syscon_at_ff100000,
+ .plat_size = sizeof(dtv_syscon_at_ff100000),
+ .parent_idx = -1,
+};
+
diff --git a/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-structs-gen.h b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-structs-gen.h
new file mode 100644
index 0000000000..fae089030b
--- /dev/null
+++ b/package/boot/uboot-rockchip/src/of-platdata/rock-pi-e-rk3328/dt-structs-gen.h
@@ -0,0 +1,54 @@
+/*
+ * DO NOT MODIFY
+ *
+ * Defines the structs used to hold devicetree data.
+ * This was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <stdbool.h>
+#include <linux/libfdt.h>
+struct dtd_ns16550_serial {
+ fdt32_t clock_frequency;
+ struct phandle_1_arg clocks[2];
+ const char * dma_names[2];
+ fdt32_t dmas[4];
+ fdt32_t interrupts[3];
+ fdt32_t pinctrl_0;
+ const char * pinctrl_names;
+ fdt64_t reg[2];
+ fdt32_t reg_io_width;
+ fdt32_t reg_shift;
+};
+struct dtd_rockchip_rk3288_dw_mshc {
+ fdt32_t bus_width;
+ bool cap_mmc_highspeed;
+ bool cap_sd_highspeed;
+ fdt32_t card_detect_delay;
+ struct phandle_1_arg clocks[4];
+ bool disable_wp;
+ fdt32_t fifo_depth;
+ fdt32_t interrupts[3];
+ fdt32_t max_frequency;
+ bool mmc_hs200_1_8v;
+ bool non_removable;
+ fdt32_t num_slots;
+ fdt32_t pinctrl_0[4];
+ const char * pinctrl_names;
+ fdt64_t reg[2];
+ bool supports_emmc;
+ bool supports_sd;
+ bool u_boot_spl_fifo_mode;
+ fdt32_t vmmc_supply;
+ fdt32_t vqmmc_supply;
+};
+struct dtd_rockchip_rk3328_cru {
+ fdt64_t reg[2];
+ fdt32_t rockchip_grf;
+};
+struct dtd_rockchip_rk3328_dmc {
+ fdt64_t reg[12];
+ fdt32_t rockchip_sdram_params[196];
+};
+struct dtd_rockchip_rk3328_grf {
+ fdt64_t reg[2];
+};
More information about the lede-commits
mailing list