[openwrt/openwrt] kernel: fix mediatek ppe flow accounting for mt7622 and older

[LEDE Commits]

nbd pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/808014c00726befdcedee5060bd65bbc6b2cc7c2

commit 808014c00726befdcedee5060bd65bbc6b2cc7c2
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Thu Mar 23 21:48:24 2023 +0100

    kernel: fix mediatek ppe flow accounting for mt7622 and older
    
    v1 hardware uses a different enable bit for hardware counters
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 ...t-mediatek-fix-ppe-flow-accounting-for-v1.patch | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch b/target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch
new file mode 100644
index 0000000000..c3d6dd4bbb
--- /dev/null
+++ b/target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch
@@ -0,0 +1,51 @@
+From: Felix Fietkau <nbd at nbd.name>
+Date: Thu, 23 Mar 2023 21:45:43 +0100
+Subject: [PATCH] net: ethernet: mediatek: fix ppe flow accounting for v1
+ hardware
+
+Older chips (like MT7622) use a different bit in ib2 to enable hardware
+counter support.
+
+Signed-off-by: Felix Fietkau <nbd at nbd.name>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -647,6 +647,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
+ 	struct mtk_eth *eth = ppe->eth;
+ 	u16 timestamp = mtk_eth_timestamp(eth);
+ 	struct mtk_foe_entry *hwe;
++	u32 val;
+ 
+ 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
+ 		entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2;
+@@ -663,8 +664,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
+ 	wmb();
+ 	hwe->ib1 = entry->ib1;
+ 
+-	if (ppe->accounting)
+-		*mtk_foe_entry_ib2(eth, hwe) |= MTK_FOE_IB2_MIB_CNT;
++	if (ppe->accounting) {
++		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
++			val = MTK_FOE_IB2_MIB_CNT_V2;
++		else
++			val = MTK_FOE_IB2_MIB_CNT;
++		*mtk_foe_entry_ib2(eth, hwe) |= val;
++	}
+ 
+ 	dma_wmb();
+ 
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
+@@ -55,9 +55,10 @@ enum {
+ #define MTK_FOE_IB2_PSE_QOS		BIT(4)
+ #define MTK_FOE_IB2_DEST_PORT		GENMASK(7, 5)
+ #define MTK_FOE_IB2_MULTICAST		BIT(8)
++#define MTK_FOE_IB2_MIB_CNT		BIT(10)
+ 
+ #define MTK_FOE_IB2_WDMA_QID2		GENMASK(13, 12)
+-#define MTK_FOE_IB2_MIB_CNT		BIT(15)
++#define MTK_FOE_IB2_MIB_CNT_V2		BIT(15)
+ #define MTK_FOE_IB2_WDMA_DEVIDX		BIT(16)
+ #define MTK_FOE_IB2_WDMA_WINFO		BIT(17)
+