[openwrt/openwrt] mediatek: add support for Zbtlink ZBT-Z8102AX
LEDE Commits
lede-commits at lists.infradead.org
Sat Dec 9 04:41:42 PST 2023
rmilecki pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/d9246902b047254ae5006215ccafbc9ccc87f5fd
commit d9246902b047254ae5006215ccafbc9ccc87f5fd
Author: Daniel Golle <daniel at makrotopia.org>
AuthorDate: Sat Dec 9 13:39:53 2023 +0100
mediatek: add support for Zbtlink ZBT-Z8102AX
Specifications:
SoC: MediaTek MT7981B
RAM: 1024MiB
Flash: SPI-NAND 128 MiB
Switch: 1 WAN, 4 LAN (Gigabit)
USB: two M.2 slots for 5G modems via USB 3.0 hub, external USB 3.0 port
Buttons: Reset, Mesh
Power: DC 12V 1A
WiFi: MT7976CN
UART: 115200n8
UART Layout:
VCC-RX-TX-GND
Installation:
A. Through OpenWrt Dashboard:
If your router comes with OpenWrt preinstalled (modified by the seller),
you can easily upgrade by going to the dashboard (192.168.1.1) and then
navigate to System -> Backup/Flash firmware, then flash the firmware
B. Through TFTP
Standard installation via UART:
1. Connect USB Serial Adapter to the UART, (NOTE: Don't connect the VCC pin).
2. Power on the router. Make sure that you can access your router via UART.
3. Restart the router then repeatedly press ctrl + c to skip default boot.
4. Type > bootmenu
5. Press '2' to select upgrade firmware
6. Press 'Y' on 'Run image after upgrading?'
7. Press '0' and hit 'enter' to select TFTP client (default)
8. Fill the U-Boot's IP address and TFTP server's IP address.
9. Finally, enter the 'firmware' filename.
Based on patch adding support for similar Zbtlink ZBT-Z8103AX device by
Ian Ishmael C. Oderon.
Signed-off-by: Daniel Golle <daniel at makrotopia.org>
(cherry picked from commit c8c2f522625c8d9eb5acad317e3de7a6b156decf)
---
package/boot/uboot-envtools/files/mediatek_filogic | 3 +-
.../mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts | 331 +++++++++++++++++++++
.../filogic/base-files/etc/board.d/02_network | 3 +-
.../base-files/etc/board.d/03_gpio_switches | 19 ++
.../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 1 +
target/linux/mediatek/filogic/config-5.15 | 2 +
target/linux/mediatek/image/filogic.mk | 17 ++
7 files changed, 374 insertions(+), 2 deletions(-)
diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic
index 5cd63a46e6..8c7c5a85c0 100644
--- a/package/boot/uboot-envtools/files/mediatek_filogic
+++ b/package/boot/uboot-envtools/files/mediatek_filogic
@@ -66,7 +66,8 @@ mercusys,mr90x-v1)
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;
cetron,ct3003|\
-netgear,wax220)
+netgear,wax220|\
+zbtlink,zbt-z8102ax)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
ubnt,unifi-6-plus)
diff --git a/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts b/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts
new file mode 100644
index 0000000000..112fd777f0
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts
@@ -0,0 +1,331 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "Zbtlink ZBT-Z8102AX";
+ compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_green;
+ label-mac-device = &gmac0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x40000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ button-mesh {
+ label = "mesh";
+ linux,code = <BTN_0>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ button-hub {
+ label = "hub";
+ linux,code = <BTN_1>;
+ gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_red: red {
+ label = "red:status";
+ gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_STATUS;
+ };
+
+ led_status_green: green {
+ label = "green:status";
+ gpios = <&pio 10 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_STATUS;
+ };
+
+ blue {
+ label = "blue:status";
+ gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ };
+
+ 4g {
+ label = "blue:4g";
+ gpios = <&pio 8 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_USB;
+ function-enumerator = <0>;
+ };
+
+ 4g2 {
+ label = "blue:4g2";
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_USB;
+ function-enumerator = <1>;
+ };
+ };
+
+ watchdog {
+ compatible = "linux,wdt-gpio";
+ gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
+ hw_algo = "toggle";
+ hw_margin_ms = <1000>;
+ };
+
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ pcie {
+ gpio-export,name = "pcie_power";
+ gpio-export,output = <1>;
+ gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ 5g1 {
+ gpio-export,name = "5g1";
+ gpio-export,output = <1>;
+ gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ 5g2 {
+ gpio-export,name = "5g2";
+ gpio-export,output = <1>;
+ gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ sim1 {
+ gpio-export,name = "sim1";
+ gpio-export,output = <1>;
+ gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ sim2 {
+ gpio-export,name = "sim2";
+ gpio-export,output = <1>;
+ gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac at 0 {
+ /* LAN */
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_factory_4 2>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ gmac1: mac at 1 {
+ /* WAN */
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+
+ nvmem-cell-names = "mac-address";
+ nvmem-cells = <&macaddr_factory_4 3>;
+ };
+};
+
+&mdio_bus {
+ switch: switch at 1f {
+ compatible = "mediatek,mt7531";
+ reg = <0x1f>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand at 0 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "bl2";
+ reg = <0x0000000 0x0100000>;
+ read-only;
+ };
+
+ partition at 100000 {
+ label = "u-boot-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition at 180000 {
+ label = "Factory";
+ reg = <0x180000 0x200000>;
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eeprom_factory: eeprom at 0 {
+ reg = <0x0 0x1000>;
+ };
+
+ macaddr_factory_4: macaddr at 4 {
+ compatible = "mac-base";
+ reg = <0x4 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+
+ partition at 380000 {
+ label = "FIP";
+ reg = <0x380000 0x200000>;
+ read-only;
+ };
+
+ partition at 580000 {
+ label = "ubi";
+ reg = <0x580000 0x4000000>;
+ };
+ };
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port at 1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port at 2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port at 3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ port at 6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <8>;
+ bias-pull-up = <103>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <8>;
+ bias-pull-down = <103>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+
+ nvmem-cells = <&eeprom_factory>;
+ nvmem-cell-names = "eeprom";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 0760d17a8e..522e288ef5 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -12,7 +12,8 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
;;
asus,tuf-ax4200|\
- mediatek,mt7981-rfb)
+ mediatek,mt7981-rfb|\
+ zbtlink,zbt-z8102ax)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
;;
asus,tuf-ax6000)
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches
new file mode 100644
index 0000000000..ff32a3650c
--- /dev/null
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches
@@ -0,0 +1,19 @@
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+zbtlink,zbt-z8103ax)
+ ucidef_add_gpio_switch "5g1" "Power 1st modem" "5g1" "1"
+ ucidef_add_gpio_switch "5g2" "Power 2nd modem" "5g2" "1"
+ ucidef_add_gpio_switch "pcie" "Power PCIe port" "pcie" "1"
+ ucidef_add_gpio_switch "sim1" "SIM 1" "sim1" "1"
+ ucidef_add_gpio_switch "sim2" "SIM 2" "sim2" "1"
+ ;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index a9de563a4b..b33d43c8c0 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -95,6 +95,7 @@ case "$board" in
tplink,tl-xdr6088)
[ "$PHYNBR" = "0" ] && get_mac_label > /sys${DEVPATH}/macaddress
;;
+ zbtlink,zbt-z8102ax|\
zyxel,ex5601-t0)
addr=$(mtd_get_mac_binary "Factory" 0x4)
[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
diff --git a/target/linux/mediatek/filogic/config-5.15 b/target/linux/mediatek/filogic/config-5.15
index 2ffc466b7c..8c46b9ad2c 100644
--- a/target/linux/mediatek/filogic/config-5.15
+++ b/target/linux/mediatek/filogic/config-5.15
@@ -169,6 +169,8 @@ CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GLOB=y
CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_WATCHDOG=y
+CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 0ad8b3e728..300a7da9fb 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -728,6 +728,23 @@ endif
endef
TARGET_DEVICES += xiaomi_redmi-router-ax6000-ubootmod
+define Device/zbtlink_zbt-z8102ax
+ DEVICE_VENDOR := Zbtlink
+ DEVICE_MODEL := ZBT-Z8102AX
+ DEVICE_DTS := mt7981b-zbtlink-zbt-z8102ax
+ DEVICE_DTS_DIR := ../dts
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb-net-qmi-wwan kmod-usb-serial-option
+ KERNEL_IN_UBI := 1
+ UBINIZE_OPTS := -E 5
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ IMAGE_SIZE := 65536k
+ IMAGES += factory.bin
+ IMAGE/factory.bin := append-ubi | check-size $$(IMAGE_SIZE)
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+endef
+TARGET_DEVICES += zbtlink_zbt-z8102ax
+
define Device/zyxel_ex5601-t0-stock
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := EX5601-T0 (stock layout)
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