[openwrt/openwrt] mediatek: add support for Cetron CT3003
LEDE Commits
lede-commits at lists.infradead.org
Thu Dec 7 01:44:08 PST 2023
rmilecki pushed a commit to openwrt/openwrt.git, branch openwrt-23.05:
https://git.openwrt.org/e1d1c26c0fa28d7ce18cf4931a3351e51434a27e
commit e1d1c26c0fa28d7ce18cf4931a3351e51434a27e
Author: Patricia Lee <patricialee320 at gmail.com>
AuthorDate: Wed Aug 30 19:50:54 2023 +0800
mediatek: add support for Cetron CT3003
**Hardware specification:**
- SoC: MediaTek MT7981B 2x A53
- Flash: ESMT F50L1G41LB 128MB
- RAM: Nanya NT5CC128M16JR-EK 256MB
- Ethernet: 4 x 10/100/1000 Mbps
- Switch: MediaTek MT7531AE
- WiFi: MediaTek MT7976C
- Button: Reset, Mesh
- Power: DC 12V 1A
- UART: 3.3v, 115200n8
| Layout: |
| :-------- |
| <Antenna> |
| VCC |
| GND |
| Tx |
| Rx |
**Flash instructions:**
1. Rename `openwrt-mediatek-filogic-cetron_ct3003-squashfs-factory.bin` to `factory.bin`.
2. Upload the `factory.bin` using the device's Web interface.
3. Click the upgrade button and wait for the process to finish.
4. Access the OpenWrt interface using the same password.
5. Use the 'Restore' function to reset the firmware to its initial state.
**Notes:**
If you plan to recovery the stock firmware in the future, it's advisable
to connect the device via the serial port and enter failsafe mode to
back up all the MTD partitions before proceeding the steps above.
Signed-off-by: Patricia Lee <patricialee320 at gmail.com>
(cherry picked from commit 907e9e0bd3df456b32921893cf6ef1b54117d983)
---
package/boot/uboot-envtools/files/mediatek_filogic | 1 +
.../linux/mediatek/dts/mt7981b-cetron-ct3003.dts | 242 +++++++++++++++++++++
.../filogic/base-files/etc/board.d/02_network | 6 +
.../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 5 +
target/linux/mediatek/image/filogic.mk | 32 +++
5 files changed, 286 insertions(+)
diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic
index 7bfdee24f3..3c68b15442 100644
--- a/package/boot/uboot-envtools/files/mediatek_filogic
+++ b/package/boot/uboot-envtools/files/mediatek_filogic
@@ -61,6 +61,7 @@ mercusys,mr90x-v1)
local envdev=/dev/mtd$(find_mtd_index "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;
+cetron,ct3003|\
netgear,wax220)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
diff --git a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts
new file mode 100644
index 0000000000..d39083ffb0
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "Cetron CT3003";
+ compatible = "cetron,ct3003", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_status_red;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_green;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x10000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_red: led_status_red {
+ label = "red:status";
+ gpios = <&pio 3 GPIO_ACTIVE_LOW>;
+ };
+
+ led_status_green: led_status_green {
+ label = "green:status";
+ gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+ð {
+ status = "okay";
+
+ gmac0: mac at 0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+};
+
+&mdio_bus {
+ switch: switch at 0 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand at 0 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partition at 0 {
+ label = "BL2";
+ reg = <0x0000000 0x0100000>;
+ read-only;
+ };
+
+ partition at 100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ partition at 180000 {
+ label = "art";
+ reg = <0x0180000 0x0100000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr at 0 {
+ reg = <0x0 0x6>;
+ };
+ };
+
+ factory: partition at 280000 {
+ label = "Factory";
+ reg = <0x0280000 0x0100000>;
+ read-only;
+ };
+
+ partition at 380000 {
+ label = "FIP";
+ reg = <0x0380000 0x0200000>;
+ read-only;
+ };
+
+ partition at 580000 {
+ label = "ubi";
+ reg = <0x0580000 0x2000000>;
+ };
+
+ partition at 2580000 {
+ label = "ubi_backup";
+ reg = <0x2580000 0x2000000>;
+ };
+
+ partition at 4580000 {
+ label = "Config_backup";
+ reg = <0x4580000 0x0400000>;
+ };
+ };
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port at 1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port at 2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port at 3 {
+ reg = <3>;
+ label = "wan";
+ };
+
+ port at 6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+
+ mediatek,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 93e69e5c85..a1eb3865a7 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -44,6 +44,7 @@ mediatek_setup_interfaces()
mercusys,mr90x-v1)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1
;;
+ cetron,ct3003|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
@@ -84,6 +85,11 @@ mediatek_setup_macs()
bananapi,bpi-r3)
wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
;;
+ cetron,ct3003)
+ lan_mac=$(mtd_get_mac_binary "art" 0)
+ wan_mac=$(macaddr_add "$lan_mac" 3)
+ label_mac=$lan_mac
+ ;;
cmcc,rax3000m)
case "$(cmdline_get_var root)" in
/dev/mmc*)
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index a1d51a548e..27675dc97e 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -30,6 +30,11 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress
;;
+ cetron,ct3003)
+ addr=$(mtd_get_mac_binary "art" 0)
+ [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
+ [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress
+ ;;
cmcc,rax3000m)
case "$(cmdline_get_var root)" in
/dev/mmc*)
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index bf3ef599cf..5befe88982 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -90,6 +90,21 @@ define Build/zyxel-nwa-fit-filogic
@mv $@.new $@
endef
+define Build/cetron-header
+ $(eval magic=$(word 1,$(1)))
+ $(eval model=$(word 2,$(1)))
+ ( \
+ dd if=/dev/zero bs=856 count=1 2>/dev/null; \
+ printf "$(model)," | dd bs=128 count=1 conv=sync 2>/dev/null; \
+ md5sum $@ | cut -f1 -d" " | dd bs=32 count=1 2>/dev/null; \
+ printf "$(magic)" | dd bs=4 count=1 conv=sync 2>/dev/null; \
+ cat $@; \
+ ) > $@.tmp
+ fw_crc=$$(gzip -c $@.tmp | tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n'); \
+ printf "$$(echo $$fw_crc | sed 's/../\\x&/g')" | cat - $@.tmp > $@
+ rm $@.tmp
+endef
+
define Device/asus_tuf-ax4200
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX4200
@@ -174,6 +189,23 @@ endif
endef
TARGET_DEVICES += bananapi_bpi-r3
+define Device/cetron_ct3003
+ DEVICE_VENDOR := Cetron
+ DEVICE_MODEL := CT3003
+ DEVICE_DTS := mt7981b-cetron-ct3003
+ DEVICE_DTS_DIR := ../dts
+ SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
+ UBINIZE_OPTS := -E 5
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ KERNEL_IN_UBI := 1
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+ IMAGES += factory.bin
+ IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | cetron-header rd30 CT3003
+endef
+TARGET_DEVICES += cetron_ct3003
+
define Device/cmcc_rax3000m
DEVICE_VENDOR := CMCC
DEVICE_MODEL := RAX3000M
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