[openwrt/openwrt] mvebu: update and refactor uDPU DTS
LEDE Commits
lede-commits at lists.infradead.org
Wed Jun 29 04:10:09 PDT 2022
ansuel pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/7f73acade0cde61341cb77e0dc74de51ac059d4f
commit 7f73acade0cde61341cb77e0dc74de51ac059d4f
Author: Robert Marko <robert.marko at sartura.hr>
AuthorDate: Mon Mar 28 14:26:47 2022 +0200
mvebu: update and refactor uDPU DTS
uDPU DTS has pending upstream fixups, so backport those as well as split
the DTS into a DTSI and DTS in preparation for euroDPU support which
uses uDPU as the base.
Ethernet aliases have not yet been sent upstream but will be soon in order
for U-boot to set the correct MAC on both ethernet interfaces instead of
just one.
Since U-boot environment now has its own partition, update the envtools
config script to search for it instead.
Patch hardcoding PHY mode is also not applicable anymore, so drop it and
set in the uDPU DTS directly.
Signed-off-by: Robert Marko <robert.marko at sartura.hr>
---
package/boot/uboot-envtools/files/mvebu | 5 +
.../arm64/boot/dts/marvell/armada-3720-uDPU.dts | 46 ++++++
.../arm64/boot/dts/marvell/armada-3720-uDPU.dtsi | 165 +++++++++++++++++++++
...DPU-switch-PHY-operation-mode-to-2500base.patch | 34 -----
4 files changed, 216 insertions(+), 34 deletions(-)
diff --git a/package/boot/uboot-envtools/files/mvebu b/package/boot/uboot-envtools/files/mvebu
index cffd396ae1..a90f74c517 100644
--- a/package/boot/uboot-envtools/files/mvebu
+++ b/package/boot/uboot-envtools/files/mvebu
@@ -59,7 +59,12 @@ linksys,wrt32x)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
methode,udpu)
+ idx="$(find_mtd_index u-boot-env)"
+ if [ -n "$idx" ]; then
+ ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x10000" "1"
+ else
ubootenv_add_uci_config "/dev/mtd0" "0x180000" "0x10000" "0x10000"
+ fi
;;
esac
diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
new file mode 100644
index 0000000000..186a5e7d7d
--- /dev/null
+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode uDPU Board";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
+
+ sfp_eth0: sfp-eth0 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c0>;
+ los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
+ maximum-power-milliwatt = <3000>;
+ };
+};
+
+&pinctrl_nb {
+ i2c1_recovery_pins: i2c1-recovery-pins {
+ groups = "i2c1";
+ function = "gpio";
+ };
+};
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default", "recovery";
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-1 = <&i2c1_recovery_pins>;
+ /delete-property/mrvl,i2c-fast-mode;
+ scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+};
+
+ð0 {
+ phy-mode = "2500base-x";
+ sfp = <&sfp_eth0>;
+};
+
+ð1 {
+ phy-mode = "2500base-x";
+};
diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
new file mode 100644
index 0000000000..bc8d1f1020
--- /dev/null
+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device tree for the uDPU board.
+ * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
+ * Copyright (C) 2016 Marvell
+ * Copyright (C) 2019 Methode Electronics
+ * Copyright (C) 2019 Telus
+ *
+ * Vladimir Vid <vladimir.vid at sartura.hr>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "armada-372x.dtsi"
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+ };
+
+ aliases {
+ ethernet0 = ð0;
+ ethernet1 = ð1;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-power1 {
+ label = "udpu:green:power";
+ gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
+ };
+
+ led-power2 {
+ label = "udpu:red:power";
+ gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
+ };
+
+ led-network1 {
+ label = "udpu:green:network";
+ gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
+ };
+
+ led-network2 {
+ label = "udpu:red:network";
+ gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led-alarm1 {
+ label = "udpu:green:alarm";
+ gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led-alarm2 {
+ label = "udpu:red:alarm";
+ gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ sfp_eth1: sfp-eth1 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c1>;
+ los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
+ maximum-power-milliwatt = <3000>;
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs400-1_8v;
+ marvell,pad-type = "fixed-1-8v";
+ non-removable;
+ no-sd;
+ no-sdio;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_quad_pins>;
+
+ flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <54000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "firmware";
+ reg = <0x0 0x180000>;
+ };
+
+ partition at 180000 {
+ label = "u-boot-env";
+ reg = <0x180000 0x10000>;
+ };
+ };
+ };
+};
+
+&pinctrl_nb {
+ i2c2_recovery_pins: i2c2-recovery-pins {
+ groups = "i2c2";
+ function = "gpio";
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default", "recovery";
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-1 = <&i2c2_recovery_pins>;
+ /delete-property/mrvl,i2c-fast-mode;
+ scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+
+ temp-sensor at 48 {
+ compatible = "ti,tmp75c";
+ reg = <0x48>;
+ };
+
+ temp-sensor at 49 {
+ compatible = "ti,tmp75c";
+ reg = <0x49>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ managed = "in-band-status";
+ phys = <&comphy1 0>;
+};
+
+ð1 {
+ phy-mode = "sgmii";
+ status = "okay";
+ managed = "in-band-status";
+ phys = <&comphy0 1>;
+ sfp = <&sfp_eth1>;
+};
+
+&usb3 {
+ status = "okay";
+ phys = <&usb2_utmi_otg_phy>;
+ phy-names = "usb2-utmi-otg-phy";
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/target/linux/mvebu/patches-5.10/314-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch b/target/linux/mvebu/patches-5.10/314-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch
deleted file mode 100644
index 2240d0b39e..0000000000
--- a/target/linux/mvebu/patches-5.10/314-arm64-dts-uDPU-switch-PHY-operation-mode-to-2500base.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-Certain SFP modules (most notably Nokia GPON ones) first check
-connectivity on 1000base-x, and switch to 2500base-x afterwards. This
-is considered a quirk so the phylink switches the interface to
-2500base-x as well.
-
-However, after power-cycling the uDPU device, network interface/SFP module
-will not work correctly until the module is re-seated. This patch
-resolves this issue by forcing the interface to be brought up in
-2500base-x mode by default.
-
-Signed-off-by: Jakov Petrina <jakov.petrina at sartura.hr>
-Signed-off-by: Vladimir Vid <vladimir.vid at sartura.hr>
-Cc: Luka Perkov <luka.perkov at sartura.hr>
-
---- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
-+++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
-@@ -162,7 +162,7 @@
- };
-
- ð0 {
-- phy-mode = "sgmii";
-+ phy-mode = "2500base-x";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy1 0>;
-@@ -170,7 +170,7 @@
- };
-
- ð1 {
-- phy-mode = "sgmii";
-+ phy-mode = "2500base-x";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy0 1>;
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