[openwrt/openwrt] mvebu: add support for ipTIME NAS1dual

LEDE Commits lede-commits at lists.infradead.org
Sat Jan 29 06:51:29 PST 2022


mans0n pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/6ff970bb51f53c731b0612152734cec82ca92543

commit 6ff970bb51f53c731b0612152734cec82ca92543
Author: Sungbo Eo <mans0n at gorani.run>
AuthorDate: Sat Jan 1 23:47:43 2022 +0900

    mvebu: add support for ipTIME NAS1dual
    
    ipTIME NAS1dual is a 1-bay NAS, based on Marvell Armada 385 SoC.
    
    Specifications:
    * SoC: 88F6820
    * RAM: 2 GiB
    * Flash: SPI NOR 64 MiB
    * SATA: 1x 3Gb/s
    * Ethernet: 2x 1GbE
    * USB: 1x 3.0
    * Fan: 2 speed level
    * UART: J11 (115200 8N1)
      * Pinout: [3V3] (TXD) (RXD) (GND)
    
    Installation via web interface:
    1.  Flash **initramfs** image through the stock web interface.
    2.  Boot into OpenWrt and perform sysupgrade with sysupgrade image.
    
    Revert to stock firmware:
    1.  Perform sysupgrade with stock image.
    
    Signed-off-by: Sungbo Eo <mans0n at gorani.run>
---
 .../cortexa9/base-files/etc/board.d/02_network     |   3 +
 .../cortexa9/base-files/lib/upgrade/platform.sh    |   2 +
 .../arch/arm/boot/dts/armada-385-nas1dual.dts      | 318 +++++++++++++++++++++
 target/linux/mvebu/image/cortexa9.mk               |  14 +
 4 files changed, 337 insertions(+)

diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
index 36769e8c18..c613a3cd60 100644
--- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network
@@ -18,6 +18,9 @@ mvebu_setup_interfaces()
 	cznic,turris-omnia)
 		ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3 lan4" "eth2"
 		;;
+	iptime,nas1dual)
+		ucidef_set_interface_lan "eth0 eth1" "dhcp"
+		;;
 	linksys,wrt1200ac|\
 	linksys,wrt1900ac-v1|\
 	linksys,wrt1900ac-v2|\
diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
index 030e66e699..18b978d437 100755
--- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh
@@ -5,6 +5,8 @@
 
 RAMFS_COPY_BIN='fw_printenv fw_setenv strings'
 RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+
+PART_NAME=firmware
 REQUIRE_IMAGE_METADATA=1
 
 platform_check_image() {
diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts
new file mode 100644
index 0000000000..d14ea8b94e
--- /dev/null
+++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-nas1dual.dts
@@ -0,0 +1,318 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+/*
+ * Device Tree file for ipTIME NAS1dual
+ *
+ * Copyright (C) 2020 Sungbo Eo <mans0n at gorani.run>
+ *
+ * Based on armada-385-linksys.dtsi
+ * Copyright (C) 2015 Imre Kaloz <kaloz at openwrt.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "armada-385.dtsi"
+
+/ {
+	model = "ipTIME NAS1dual";
+	compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380";
+
+	aliases {
+		led-boot = &led_ready;
+		led-failsafe = &led_ready;
+		led-running = &led_ready;
+		led-upgrade = &led_ready;
+		label-mac-device = &eth0;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000>; /* 2GB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+		          MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+		          MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+		          MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+		          MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpio_keys_pins>;
+
+		power {
+			label = "Power Button";
+			linux,input-type = <EV_SW>;
+			linux,code = <KEY_POWER>;
+			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+		};
+
+		reset {
+			label = "Reset Button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
+		};
+
+		copy {
+			label = "USB Copy Button";
+			linux,code = <KEY_COPY>;
+			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpio_leds_pins>;
+
+		led_ready: ready {
+			label = "blue:ready";
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+		};
+
+		hdd {
+			label = "blue:hdd";
+			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "disk-activity";
+		};
+
+		usb {
+			label = "blue:usb";
+			gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
+			trigger-sources = <&usb3_0_port1 &usb3_0_port2>;
+			linux,default-trigger = "usbport";
+		};
+	};
+
+	gpio-fan {
+		compatible = "gpio-fan";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpio_fan_pins>;
+		gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>,
+		        <&gpio1 18 GPIO_ACTIVE_HIGH>;
+		/* We don't know the exact rpm, just use dummy values here. */
+		gpio-fan,speed-map = <0 0>, <1 1>, <2 2>;
+		#cooling-cells = <2>;
+	};
+
+	gpio-poweroff {
+		compatible = "gpio-poweroff";
+		gpios = <&pca9536 1 GPIO_ACTIVE_LOW>;
+	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sata_power_pins>;
+
+		reg_sata_power: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+			regulator-name = "sata-power";
+			regulator-min-microvolt = <12000000>;
+			regulator-max-microvolt = <12000000>;
+			gpio = <&gpio1 20 GPIO_ACTIVE_LOW>;
+			regulator-always-on;
+		};
+	};
+};
+
+&ahci0 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	sata-port at 0 {
+		reg = <0>;
+		target-supply = <&reg_sata_power>;
+		#thermal-sensor-cells = <0>;
+	};
+};
+
+&bm {
+	status = "okay";
+};
+
+&bm_bppi {
+	status = "okay";
+};
+
+&eth0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ge0_rgmii_pins>;
+	status = "okay";
+	phy-handle = <&ethphy1>;
+	phy-connection-type = "rgmii-id";
+	buffer-manager = <&bm>;
+	bm,pool-long = <0>;
+	bm,pool-short = <1>;
+	nvmem-cells = <&macaddr_uboot_fffa8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&eth1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ge1_rgmii_pins>;
+	status = "okay";
+	phy-handle = <&ethphy0>;
+	phy-connection-type = "rgmii-id";
+	buffer-manager = <&bm>;
+	bm,pool-long = <2>;
+	bm,pool-short = <3>;
+	nvmem-cells = <&macaddr_uboot_fffa8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+
+	pca9536: gpio at 41 {
+		compatible = "nxp,pca9536";
+		reg = <0x41>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-line-names = "power-led", "power-board";
+	};
+};
+
+&mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio_pins>;
+
+	/* LED1: On - Link, Blink - Activity, Off - No Link */
+
+	ethphy0: ethernet-phy at 0 {
+		reg = <0>;
+		marvell,reg-init = <3 16 0 0x1017>;
+	};
+
+	ethphy1: ethernet-phy at 1 {
+		reg = <1>;
+		marvell,reg-init = <3 16 0 0x1017>;
+	};
+};
+
+&pinctrl {
+	gpio_keys_pins: gpio-keys-pins {
+		marvell,pins = "mpp24", "mpp26", "mpp48";
+		marvell,function = "gpio";
+	};
+
+	gpio_leds_pins: gpio-leds-pins {
+		marvell,pins = "mpp18", "mpp20", "mpp51";
+		marvell,function = "gpio";
+	};
+
+	gpio_fan_pins: gpio-fan-pins {
+		marvell,pins = "mpp25", "mpp50";
+		marvell,function = "gpio";
+	};
+
+	sata_power_pins: sata-power-pins {
+		marvell,pins = "mpp52";
+		marvell,function = "gpio";
+	};
+
+	uart1_pins_alt: uart-pins-1-alt {
+		marvell,pins = "mpp45", "mpp46";
+		marvell,function = "ua1";
+	};
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins>;
+	status = "okay";
+
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				reg = <0x00000000 0x00100000>;
+				label = "u-boot";
+				read-only;
+
+				compatible = "nvmem-cells";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				macaddr_uboot_fffa8: macaddr at fffa8 {
+					reg = <0xfffa8 0x6>;
+				};
+			};
+
+			partition at 100000 {
+				reg = <0x00100000 0x03ec0000>;
+				label = "firmware";
+
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition at 0 {
+					reg = <0x00000000 0x00600000>;
+					label = "kernel";
+				};
+
+				partition at 600000 {
+					reg = <0x00600000 0x038c0000>;
+					label = "rootfs";
+				};
+			};
+
+			partition at 3fc0000 {
+				reg = <0x03fc0000 0x00040000>;
+				label = "config";
+				read-only;
+			};
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins_alt>;
+	status = "okay";
+};
+
+&usb3_0 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	usb3_0_port1: port at 1 {
+		reg = <1>;
+		#trigger-source-cells = <0>;
+	};
+
+	usb3_0_port2: port at 2 {
+		reg = <2>;
+		#trigger-source-cells = <0>;
+	};
+};
diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk
index 06252670ab..b06c5594bd 100644
--- a/target/linux/mvebu/image/cortexa9.mk
+++ b/target/linux/mvebu/image/cortexa9.mk
@@ -78,6 +78,20 @@ define Device/globalscale_mirabox
 endef
 TARGET_DEVICES += globalscale_mirabox
 
+define Device/iptime_nas1dual
+  DEVICE_VENDOR := ipTIME
+  DEVICE_MODEL := NAS1dual
+  DEVICE_PACKAGES := kmod-hwmon-drivetemp kmod-hwmon-gpiofan kmod-usb3
+  SOC := armada-385
+  KERNEL := kernel-bin | append-dtb | iptime-naspkg nas1dual
+  KERNEL_SIZE := 6144k
+  IMAGES := sysupgrade.bin
+  IMAGE_SIZE := 64256k
+  IMAGE/sysupgrade.bin := append-kernel | pad-to $$(KERNEL_SIZE) | \
+	append-rootfs | pad-rootfs | check-size | append-metadata
+endef
+TARGET_DEVICES += iptime_nas1dual
+
 define Device/kobol_helios4
   DEVICE_VENDOR := Kobol
   DEVICE_MODEL := Helios4



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