[openwrt/openwrt] ipq806x: TP-Link VR2600v convert legacy partitioning

[LEDE Commits]

chunkeey pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/c420947bb358e90bd31c78fe5aa26738b25a02c3

commit c420947bb358e90bd31c78fe5aa26738b25a02c3
Author: Christian Lamparter <chunkeey at gmail.com>
AuthorDate: Sun Feb 6 17:21:08 2022 +0100

    ipq806x: TP-Link VR2600v convert legacy partitioning
    
    This device still had the legacy flash partitioning.
    This is a problem, because neither the nvmem-cells
    for mac-address and calibration. Nor the denx,uimage
    mtd-splitter compatible would be picked up.
    
    The patch also changes the node-names of the flash
    and partition nodes to hopefully meet all the
    current FDT trends.
    
    Signed-off-by: Christian Lamparter <chunkeey at gmail.com>
---
 .../arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts     | 180 +++++++++++----------
 1 file changed, 92 insertions(+), 88 deletions(-)

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
index 23fe3c9f78..8fa0a5d291 100644
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
@@ -176,108 +176,122 @@
 
 		cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 
-		W25Q128 at 0 {
+		flash at 0 {
 			compatible = "jedec,spi-nor";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			spi-max-frequency = <50000000>;
 			reg = <0>;
 
-			SBL1 at 0 {
-				label = "SBL1";
-				reg = <0x0 0x20000>;
-				read-only;
-			};
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
 
-			MIBIB at 20000 {
-				label = "MIBIB";
-				reg = <0x20000 0x20000>;
-				read-only;
-			};
+				partition at 0 {
+					label = "SBL1";
+					reg = <0x0 0x20000>;
+					read-only;
+				};
 
-			SBL2 at 40000 {
-				label = "SBL2";
-				reg = <0x40000 0x40000>;
-				read-only;
-			};
+				partition at 20000 {
+					label = "MIBIB";
+					reg = <0x20000 0x20000>;
+					read-only;
+				};
 
-			SBL3 at 80000 {
-				label = "SBL3";
-				reg = <0x80000 0x80000>;
-				read-only;
-			};
+				partition at 40000 {
+					label = "SBL2";
+					reg = <0x40000 0x40000>;
+					read-only;
+				};
 
-			DDRCONFIG at 100000 {
-				label = "DDRCONFIG";
-				reg = <0x100000 0x10000>;
-				read-only;
-			};
+				partition at 80000 {
+					label = "SBL3";
+					reg = <0x80000 0x80000>;
+					read-only;
+				};
 
-			SSD at 110000 {
-				label = "SSD";
-				reg = <0x110000 0x10000>;
-				read-only;
-			};
+				partition at 100000 {
+					label = "DDRCONFIG";
+					reg = <0x100000 0x10000>;
+					read-only;
+				};
 
-			TZ at 120000 {
-				label = "TZ";
-				reg = <0x120000 0x80000>;
-				read-only;
-			};
+				partition at 110000 {
+					label = "SSD";
+					reg = <0x110000 0x10000>;
+					read-only;
+				};
 
-			RPM at 1a0000 {
-				label = "RPM";
-				reg = <0x1a0000 0x80000>;
-				read-only;
-			};
+				partition at 120000 {
+					label = "TZ";
+					reg = <0x120000 0x80000>;
+					read-only;
+				};
 
-			APPSBL at 220000 {
-				label = "APPSBL";
-				reg = <0x220000 0x80000>;
-				read-only;
-			};
+				partition at 1a0000 {
+					label = "RPM";
+					reg = <0x1a0000 0x80000>;
+					read-only;
+				};
 
-			APPSBLENV at 2a0000 {
-				label = "APPSBLENV";
-				reg = <0x2a0000 0x40000>;
-				read-only;
-			};
+				partition at 220000 {
+					label = "APPSBL";
+					reg = <0x220000 0x80000>;
+					read-only;
+				};
 
-			OLDART at 2e0000 {
-				label = "OLDART";
-				reg = <0x2e0000 0x40000>;
-				read-only;
-			};
+				partition at 2a0000 {
+					label = "APPSBLENV";
+					reg = <0x2a0000 0x40000>;
+					read-only;
+				};
 
-			partition at 320000 {
-				label = "firmware";
-				reg = <0x320000 0xc60000>;
-				compatible = "denx,uimage";
-			};
+				partition at 2e0000 {
+					label = "OLDART";
+					reg = <0x2e0000 0x40000>;
+					read-only;
+				};
 
-			/* hole 0xf80000 - 0xfaf100 */
+				partition at 320000 {
+					label = "firmware";
+					reg = <0x320000 0xc60000>;
+					compatible = "denx,uimage";
+				};
 
-			defaultmac: default-mac at 0xfaf100 {
-				label = "default-mac";
-				reg = <0xfaf100 0x00200>;
-				read-only;
-			};
+				/* hole 0xf80000 - 0xfaf100 */
 
-			ART at fc0000 {
-				label = "ART";
-				reg = <0xfc0000 0x40000>;
-				read-only;
+				partition at faf100 {
+					label = "default-mac";
+					reg = <0xfaf100 0x00200>;
+					read-only;
 
-				compatible = "nvmem-cells";
-				#address-cells = <1>;
-				#size-cells = <1>;
+					compatible = "nvmem-cells";
+					#address-cells = <1>;
+					#size-cells = <1>;
 
-				precal_ART_1000: precal at 1000 {
-					reg = <0x1000 0x2f20>;
+					macaddr_defaultmac_0: macaddr at 0 {
+						reg = <0x0 0x6>;
+					};
 				};
 
-				precal_ART_5000: precal at 5000 {
-					reg = <0x5000 0x2f20>;
+				partition at fc0000 {
+					label = "ART";
+					reg = <0xfc0000 0x40000>;
+					read-only;
+
+					compatible = "nvmem-cells";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					precal_ART_1000: precal at 1000 {
+						reg = <0x1000 0x2f20>;
+					};
+
+					precal_ART_5000: precal at 5000 {
+						reg = <0x5000 0x2f20>;
+					};
 				};
 			};
 		};
@@ -391,13 +405,3 @@
 &adm_dma {
 	status = "okay";
 };
-
-&defaultmac {
-	compatible = "nvmem-cells";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	macaddr_defaultmac_0: macaddr at 0 {
-		reg = <0x0 0x6>;
-	};
-};