[openwrt/openwrt] realtek: switch RTL838X/RTL839X DT to new clock driver
LEDE Commits
lede-commits at lists.infradead.org
Sun Aug 28 02:52:01 PDT 2022
svanheule pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/48f3746fe5a9c59448ef0ea614bde4520bf7540b
commit 48f3746fe5a9c59448ef0ea614bde4520bf7540b
Author: Markus Stockhausen <markus.stockhausen at gmx.de>
AuthorDate: Thu Aug 25 08:24:13 2022 +0200
realtek: switch RTL838X/RTL839X DT to new clock driver
Use new DT clockdriver syntax for RTL838X/RTL839X targets. To make it work
we need to change some nodes:
- define the external oscillator speed (25MHz)
- define SRAM
- add clock controller
- Add second CPU for RTL839X
- map all devices to new clocks
- Remove dummy LXB clock
- add CPU OPP table
Signed-off-by: Markus Stockhausen <markus.stockhausen at gmx.de>
---
target/linux/realtek/dts-5.10/rtl838x.dtsi | 68 ++++++++++++++++++----
target/linux/realtek/dts-5.10/rtl839x.dtsi | 93 ++++++++++++++++++++++++++----
2 files changed, 141 insertions(+), 20 deletions(-)
diff --git a/target/linux/realtek/dts-5.10/rtl838x.dtsi b/target/linux/realtek/dts-5.10/rtl838x.dtsi
index 41fdbdae20..f92af17ef1 100644
--- a/target/linux/realtek/dts-5.10/rtl838x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl838x.dtsi
@@ -1,5 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include <dt-bindings/clock/rtl83xx-clk.h>
+
/dts-v1/;
#define STRINGIZE(s) #s
@@ -60,25 +62,63 @@
compatible = "realtek,rtl838x-soc";
+ osc: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ ccu: clock-controller {
+ compatible = "realtek,rtl8380-clock";
+ #clock-cells = <1>;
+ clocks = <&osc>;
+ clock-names = "ref_clk";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
- frequency = <500000000>;
cpu at 0 {
compatible = "mips,mips4KEc";
reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ operating-points-v2 = <&cpu_opp_table>;
};
};
- chosen {
- bootargs = "console=ttyS0,115200";
+ cpu_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <325000000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <350000000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <375000000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <400000000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <425000000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <450000000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <475000000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <500000000>;
+ };
};
- lx_clk: lx_clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
+ chosen {
+ bootargs = "console=ttyS0,115200";
};
cpuintc: cpuintc {
@@ -116,7 +156,7 @@
compatible = "ns16550a";
reg = <0x2000 0x100>;
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
interrupt-parent = <&intc>;
interrupts = <31 1>;
@@ -134,7 +174,7 @@
compatible = "ns16550a";
reg = <0x2100 0x100>;
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
interrupt-parent = <&intc>;
interrupts = <30 0>;
@@ -153,7 +193,7 @@
realtek,reset-mode = "soc";
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
timeout-sec = <30>;
interrupt-parent = <&intc>;
@@ -220,6 +260,14 @@
};
};
+ sram0: sram at 9f000000 {
+ compatible = "mmio-sram";
+ reg = <0x9f000000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x9f000000 0x10000>;
+ };
+
switch0: switch at 1b000000 {
compatible = "realtek,rtl83xx-switch";
diff --git a/target/linux/realtek/dts-5.10/rtl839x.dtsi b/target/linux/realtek/dts-5.10/rtl839x.dtsi
index cfed68eb95..b40ca83ac3 100644
--- a/target/linux/realtek/dts-5.10/rtl839x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl839x.dtsi
@@ -1,5 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include <dt-bindings/clock/rtl83xx-clk.h>
+
/dts-v1/;
#define STRINGIZE(s) #s
@@ -53,25 +55,88 @@
compatible = "realtek,rtl839x-soc";
+ osc: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ ccu: clock-controller {
+ compatible = "realtek,rtl8390-clock";
+ #clock-cells = <1>;
+ clocks = <&osc>;
+ clock-names = "ref_clk";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
- frequency = <700000000>;
cpu at 0 {
compatible = "mips,mips34Kc";
reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ operating-points-v2 = <&cpu_opp_table>;
+ };
+
+ cpu at 1 {
+ compatible = "mips,mips34Kc";
+ reg = <1>;
+ clocks = <&ccu CLK_CPU>;
+ operating-points-v2 = <&cpu_opp_table>;
};
};
- chosen {
- bootargs = "console=ttyS0,115200";
+ cpu_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <425000000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <450000000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <475000000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <500000000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <525000000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <550000000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <575000000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <600000000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <625000000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <650000000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <675000000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <700000000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <725000000>;
+ };
+ opp13 {
+ opp-hz = /bits/ 64 <750000000>;
+ };
};
- lx_clk: lx_clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
+ chosen {
+ bootargs = "console=ttyS0,115200";
};
cpuintc: cpuintc {
@@ -109,7 +174,7 @@
compatible = "ns16550a";
reg = <0x2000 0x100>;
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
interrupt-parent = <&intc>;
interrupts = <31 1>;
@@ -127,7 +192,7 @@
compatible = "ns16550a";
reg = <0x2100 0x100>;
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
interrupt-parent = <&intc>;
interrupts = <30 2>;
@@ -160,7 +225,7 @@
realtek,reset-mode = "soc";
- clocks = <&lx_clk>;
+ clocks = <&ccu CLK_LXB>;
timeout-sec = <30>;
interrupt-parent = <&intc>;
@@ -215,6 +280,14 @@
};
};
+ sram0: sram at 9f000000 {
+ compatible = "mmio-sram";
+ reg = <0x9f000000 0x18000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x9f000000 0x18000>;
+ };
+
switch0: switch at 1b000000 {
status = "okay";
compatible = "realtek,rtl83xx-switch";
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