[openwrt/openwrt] ipq40xx: 5.10: fix ar40xx driver

LEDE Commits lede-commits at lists.infradead.org
Thu Apr 28 15:27:37 PDT 2022


blocktrron pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/ab7e53e5cce703c7a62efbe1d41fb94c2228a178

commit ab7e53e5cce703c7a62efbe1d41fb94c2228a178
Author: Nick Hainke <vincent at systemli.org>
AuthorDate: Mon Apr 18 15:04:25 2022 +0200

    ipq40xx: 5.10: fix ar40xx driver
    
    This commit is completely based on the work of adron-s:
    https://github.com/openwrt/openwrt/pull/4721#issuecomment-1101108651
    
    The commit fixes the data corruption on TX packets. Packets are
    transmitted, but their contents are replaced with zeros. This error is
    caused by the lack of guard (50 ms) intervals between calibration phases.
    This error is treated by adding mdelay(50) to the calibration function
    code. In the original qca-ssda code [0], these mdelays were existing, but
    in the ar41xx.c they are gone.
    
    Tested on:
    - Fritz!Box 4040
    - Fritz!Box 7530
    - Mikrotik SXTsq 5AC
    - ZyXEL NBG6617
    
    - [0] https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk/-/blob/NHSS.QSDK.11.4/src/init/ssdk_init.c#L2072
    
    Suggested-by: Serhii Serhieiev <adron at mstnt.com>
    Reviewed-by: Robert Marko <robimarko at gmail.com>
    Signed-off-by: Nick Hainke <vincent at systemli.org>
---
 target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c b/target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c
index f7ce42b9ff..d5ef7af151 100644
--- a/target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c
+++ b/target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c
@@ -936,6 +936,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
 		  */
 		mdelay(2);
 	}
+	mdelay(50);
 
 	/*check malibu psgmii calibration done end..*/
 
@@ -954,6 +955,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
 		/* Polling interval to check PSGMII PLL in ESS is ready */
 		mdelay(2);
 	}
+	mdelay(50);
 
 	/* check dakota psgmii calibration done end..*/
 
@@ -961,6 +963,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
 	mdiobus_write(bus, 5, 0x1a, 0x3230);
 	/* release phy psgmii RX 20bit */
 	mdiobus_write(bus, 5, 0x0, 0x005f);
+	mdelay(200);
 }
 
 static void




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