[openwrt/openwrt] mac80211: fix QCA9561 PA bias

[LEDE Commits]

ynezz pushed a commit to openwrt/openwrt.git, branch openwrt-22.03:
https://git.openwrt.org/b78db9daa4ad6ac58aa488b9e9f047e94632289a

commit b78db9daa4ad6ac58aa488b9e9f047e94632289a
Author: Thibaut VARÈNE <hacks at slashdirt.org>
AuthorDate: Sun Apr 17 17:03:52 2022 +0200

    mac80211: fix QCA9561 PA bias
    
    This patch fixes an invalid TX PA DC bias level on QCA9561, which
    results in a very low output power and very low throughput as devices
    are further away from the AP (compared to other 2.4GHz APs),
    following a suggestion from nbd[1].
    
    This patch has been submitted upstream[2].
    
    [1] https://lore.kernel.org/all/91c58969-c60e-2f41-00ac-737786d435ae@nbd.name
    [2] https://lore.kernel.org/linux-wireless/20220417145145.1847-1-hacks+kernel@slashdirt.org/
    
    Signed-off-by: Thibaut VARÈNE <hacks at slashdirt.org>
    (cherry picked from commit 7dc52a78ae2c2f748a0c0c4adcb13979260b3498)
---
 .../ath9k/580-ath9k_ar9561_fix_bias_level.patch    | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch b/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch
new file mode 100644
index 0000000000..e4c2e1cd02
--- /dev/null
+++ b/package/kernel/mac80211/patches/ath9k/580-ath9k_ar9561_fix_bias_level.patch
@@ -0,0 +1,47 @@
+From 4509e523dba46f789377cfec6f20579adf743416 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks+kernel at slashdirt.org>
+Date: Sun, 17 Apr 2022 11:31:35 +0200
+Subject: [PATCH v2] ath9k: fix QCA9561 PA bias level
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch fixes an invalid TX PA DC bias level on QCA9561, which
+results in a very low output power and very low throughput as devices
+are further away from the AP (compared to other 2.4GHz APs).
+
+This patch was suggested by Felix Fietkau, who noted[1]:
+"The value written to that register is wrong, because while the mask
+definition AR_CH0_TOP2_XPABIASLVL uses a different value for 9561, the
+shift definition AR_CH0_TOP2_XPABIASLVL_S is hardcoded to 12, which is
+wrong for 9561."
+
+In real life testing, without this patch the 2.4GHz throughput on
+Yuncore XD3200 is around 10Mbps sitting next to the AP, and closer to
+practical maximum with the patch applied.
+
+[1] https://lore.kernel.org/all/91c58969-c60e-2f41-00ac-737786d435ae@nbd.name
+
+Signed-off-by: Thibaut VARÈNE <hacks+kernel at slashdirt.org>
+---
+v2: Adjust #define per Felix's suggestion
+---
+ drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+index a171dbb29..ad949eb02 100644
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -720,7 +720,7 @@
+ #define AR_CH0_TOP2		(AR_SREV_9300(ah) ? 0x1628c : \
+ 					(AR_SREV_9462(ah) ? 0x16290 : 0x16284))
+ #define AR_CH0_TOP2_XPABIASLVL		(AR_SREV_9561(ah) ? 0x1e00 : 0xf000)
+-#define AR_CH0_TOP2_XPABIASLVL_S	12
++#define AR_CH0_TOP2_XPABIASLVL_S	(AR_SREV_9561(ah) ? 9 : 12)
+ 
+ #define AR_CH0_XTAL		(AR_SREV_9300(ah) ? 0x16294 : \
+ 				 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16298 : \
+-- 
+2.30.2
+