[openwrt/openwrt] realtek: reset both ethernet NIC and queues
LEDE Commits
lede-commits at lists.infradead.org
Wed Nov 24 12:20:21 PST 2021
stintel pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/72ae8314f5315e57caa82eb8c43f2606a7e6694c
commit 72ae8314f5315e57caa82eb8c43f2606a7e6694c
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Thu Nov 18 18:39:18 2021 +0100
realtek: reset both ethernet NIC and queues
Recent versions of Realtek's SDK reset both the ethernet NIC and queues
(SW_NIC_RST and SW_Q_RST bits) when initialising the hardware.
Furthermore, when issuing a CPU reset on the Zyxel GS1900-8 (not
supported by any current driver), the networking part of the SoC is not
reset. This leads to unresponsive network after the restart. By
resetting both the ethernet NIC and queues, networking always comes up
reliably.
Suggested-by: Birger Koblitz <mail at birger-koblitz.de>
Signed-off-by: Sander Vanheule <sander at svanheule.net>
Tested-by: Stijn Tintel <stijn at linux-ipv6.be>
---
.../realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
index c966746f02..dd3d3b66f9 100644
--- a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
+++ b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
@@ -630,6 +630,7 @@ static const struct rtl838x_reg rtl931x_reg = {
static void rtl838x_hw_reset(struct rtl838x_eth_priv *priv)
{
u32 int_saved, nbuf;
+ u32 reset_mask;
int i, pos;
pr_info("RESETTING %x, CPU_PORT %d\n", priv->family_id, priv->cpu_port);
@@ -662,15 +663,17 @@ static void rtl838x_hw_reset(struct rtl838x_eth_priv *priv)
sw_w32(0xffffffff, priv->r->dma_if_intr_sts);
}
- /* Reset NIC */
+ /* Reset NIC (SW_NIC_RST) and queues (SW_Q_RST) */
if (priv->family_id == RTL9300_FAMILY_ID || priv->family_id == RTL9310_FAMILY_ID)
- sw_w32(0x4, priv->r->rst_glb_ctrl);
+ reset_mask = 0x6;
else
- sw_w32(0x8, priv->r->rst_glb_ctrl);
+ reset_mask = 0xc;
+
+ sw_w32(reset_mask, priv->r->rst_glb_ctrl);
do { /* Wait for reset of NIC and Queues done */
udelay(20);
- } while (sw_r32(priv->r->rst_glb_ctrl) & 0xc);
+ } while (sw_r32(priv->r->rst_glb_ctrl) & reset_mask);
mdelay(100);
/* Setup Head of Line */
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