[openwrt/openwrt] realtek: Add and enable watchdog node

LEDE Commits lede-commits at lists.infradead.org
Wed Nov 24 12:20:25 PST 2021


stintel pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/927570f0a3d0ea82d5b6a3bc3b175ace3ad45e66

commit 927570f0a3d0ea82d5b6a3bc3b175ace3ad45e66
Author: Sander Vanheule <sander at svanheule.net>
AuthorDate: Sun Nov 14 19:45:33 2021 +0100

    realtek: Add and enable watchdog node
    
    Add and enable the Realtek Otto WDT peripheral found on these SoCs.
    
    Default all devices to use standard (cold) reboot and "soc" resets.
    
    Devices that require the PLL value fixup before restarting, should pick
    the "cpu" or "software" reset mode. These devices also need to provide a
    custom reboot mode, by adding the reboot argument to the kernel command
    line:
    
        WDT reset mode  | kernel reboot mode
        ----------------+---------------------------------------
        soc             | reboot=cold (default if not specified)
        cpu             | reboot=warm
        software        | reboot=software
    
    Preferrably, these devices should use an alternative restart method like
    gpio-restart to provide reliable restarts.
    
    Note that watchdog restarts are not yet exposed, since the
    _machine_restart override is still present.
    
    Signed-off-by: Sander Vanheule <sander at svanheule.net>
    Tested-by: Stijn Segers <foss at volatilesystems.org>
    Tested-by: Paul Fertser <fercerpav at gmail.com>
    Tested-by: Stijn Tintel <stijn at linux-ipv6.be>
---
 target/linux/realtek/config-5.10           |  2 ++
 target/linux/realtek/dts-5.10/rtl838x.dtsi | 14 ++++++++++++++
 target/linux/realtek/dts-5.10/rtl930x.dtsi | 18 +++++++++++++++++-
 3 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/target/linux/realtek/config-5.10 b/target/linux/realtek/config-5.10
index 2c5ab1706a..00f2a6af13 100644
--- a/target/linux/realtek/config-5.10
+++ b/target/linux/realtek/config-5.10
@@ -160,6 +160,7 @@ CONFIG_PINCTRL=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_RATIONAL=y
+CONFIG_REALTEK_OTTO_WDT=y
 CONFIG_REALTEK_PHY=y
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
@@ -190,5 +191,6 @@ CONFIG_TIMER_PROBE=y
 CONFIG_TINY_SRCU=y
 CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
 CONFIG_USE_OF=y
+CONFIG_WATCHDOG_CORE=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_ZLIB_INFLATE=y
diff --git a/target/linux/realtek/dts-5.10/rtl838x.dtsi b/target/linux/realtek/dts-5.10/rtl838x.dtsi
index dc60e12bad..f356f8fcde 100644
--- a/target/linux/realtek/dts-5.10/rtl838x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl838x.dtsi
@@ -153,6 +153,20 @@
 			status = "disabled";
 		};
 
+		watchdog0: watchdog at 3150 {
+			compatible = "realtek,rtl8380-wdt";
+			reg = <0x3150 0xc>;
+
+			realtek,reset-mode = "soc";
+
+			clocks = <&lx_clk>;
+			timeout-sec = <30>;
+
+			interrupt-parent = <&intc>;
+			interrupt-names = "phase1", "phase2";
+			interrupts = <19>, <18>;
+		};
+
 		gpio0: gpio-controller at 3500 {
 			compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
 			reg = <0x3500 0x20>;
diff --git a/target/linux/realtek/dts-5.10/rtl930x.dtsi b/target/linux/realtek/dts-5.10/rtl930x.dtsi
index 9e9501d51a..a4c9757505 100644
--- a/target/linux/realtek/dts-5.10/rtl930x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl930x.dtsi
@@ -109,7 +109,9 @@
 				<10 &cpuintc 1>, /* TC3 */
 				<9 &cpuintc 1>,  /* TC2 */
 				<8 &cpuintc 1>,  /* TC1 */
-				<7 &cpuintc 5>;  /* TC0 */
+				<7 &cpuintc 5>,  /* TC0 */
+				<6 &cpuintc 5>,  /* WDT_IP2 */
+				<5 &cpuintc 4>;  /* WDT_IP1 */
 		};
 
 		timer: timer at 3200 {
@@ -161,6 +163,20 @@
 			status = "disabled";
 		};
 
+		watchdog0: watchdog at 3260 {
+			compatible = "realtek,rtl9300-wdt";
+			reg = <0x3260 0xc>;
+
+			realtek,reset-mode = "soc";
+
+			clocks = <&lx_clk>;
+			timeout-sec = <30>;
+
+			interrupt-parent = <&intc>;
+			interrupt-names = "phase1", "phase2";
+			interrupts = <5>, <6>;
+		};
+
 		gpio0: gpio-controller at 3500 {
 			compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
 			reg = <0x3500 0x20>;



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