[openwrt/openwrt] ath79: add missing v5.4 SPI chipselect patch

[LEDE Commits]

blocktrron pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/862bc9f59779afe06d7279e2534843dbcccd9c2c

commit 862bc9f59779afe06d7279e2534843dbcccd9c2c
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Wed May 26 11:37:42 2021 +0200

    ath79: add missing v5.4 SPI chipselect patch
    
    The patch was not applied to the v5.4 target, thus breaking Kernel 5.4
    on devices with multiple flash chips attache to the SPI bus.
    
    Fixes commit bd54e739541b ("ath79: set number of chipselect lines")
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 ...-spi-ath79-set-number-of-chipselect-lines.patch | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch b/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch
new file mode 100644
index 0000000000..614bcbcded
--- /dev/null
+++ b/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch
@@ -0,0 +1,26 @@
+From e2e9f6d9f9bd7449ff113c157b639ce1a24b9d3f Mon Sep 17 00:00:00 2001
+From: David Bauer <mail at david-bauer.net>
+Date: Sat, 24 Apr 2021 16:14:48 +0200
+Subject: [PATCH 2/2] spi: ath79: set number of chipselect lines
+
+All chipsets from AR7100 up to QCA9563 have three dedicated chipselect
+lines for the integrated SPI controller. Remove the number of
+chipselects from the platform data, as there is no need to manually set
+this to a different value.
+
+Signed-off-by: David Bauer <mail at david-bauer.net>
+---
+ drivers/spi/spi-ath79.c                 | 2 +-
+ include/linux/platform_data/spi-ath79.h | 1 -
+ 2 files changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/spi/spi-ath79.c
++++ b/drivers/spi/spi-ath79.c
+@@ -187,6 +187,7 @@ static int ath79_spi_probe(struct platfo
+ 	master->use_gpio_descriptors = true;
+ 	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
+ 	master->flags = SPI_MASTER_GPIO_SS;
++	master->num_chipselect = 3;
+ 
+ 	sp->bitbang.master = master;
+ 	sp->bitbang.chipselect = ath79_spi_chipselect;