[openwrt/openwrt] realtek: Add L2 hash bucket size

[LEDE Commits]

ynezz pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/637deabb4a50812c978ef3b768609720b8856a9b

commit 637deabb4a50812c978ef3b768609720b8856a9b
Author: Birger Koblitz <git at birger-koblitz.de>
AuthorDate: Sat May 1 06:48:29 2021 +0200

    realtek: Add L2 hash bucket size
    
    Adds a hash-bucket size attribute for the different SoCs, in order to
    accomodate the buckets with 8 entries of the L2-forwarding tables
    on RTL93XX in contrast to only 4 on RTL83XX.
    
    Signed-off-by: Birger Koblitz <git at birger-koblitz.de>
---
 target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c  | 7 ++++---
 target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h | 1 +
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
index d09894bbaf..a380906b92 100644
--- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c
@@ -123,7 +123,6 @@ void rtl_table_read(struct table_reg *r, int idx)
 
 	cmd |= BIT(r->c_bit + 1) | (r->tbl << r->t_bit) | (idx & (BIT(r->t_bit) - 1));
 	sw_w32(cmd, r->addr);
-	pr_debug("Writing %08x to %x for read\n", cmd, r->addr);
 	do { } while (sw_r32(r->addr) & BIT(r->c_bit + 1));
 }
 
@@ -135,8 +134,6 @@ void rtl_table_write(struct table_reg *r, int idx)
 	u32 cmd = r->rmode ? 0 : BIT(r->c_bit);
 
 	cmd |= BIT(r->c_bit + 1) | (r->tbl << r->t_bit) | (idx & (BIT(r->t_bit) - 1));
-	pr_debug("Writing %08x to %x for write, value %08x\n",
-		cmd, r->addr, sw_r32(0xb344));
 	sw_w32(cmd, r->addr);
 	do { } while (sw_r32(r->addr) & BIT(r->c_bit + 1));
 }
@@ -572,6 +569,7 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 		priv->fib_entries = 8192;
 		rtl8380_get_version(priv);
 		priv->n_lags = 8;
+		priv->l2_bucket_size = 4;
 		break;
 	case RTL8390_FAMILY_ID:
 		priv->ds->ops = &rtl83xx_switch_ops;
@@ -584,6 +582,7 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 		priv->fib_entries = 16384;
 		rtl8390_get_version(priv);
 		priv->n_lags = 16;
+		priv->l2_bucket_size = 4;
 		break;
 	case RTL9300_FAMILY_ID:
 		priv->ds->ops = &rtl930x_switch_ops;
@@ -597,6 +596,7 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 		priv->version = RTL8390_VERSION_A;
 		priv->n_lags = 16;
 		sw_w32(1, RTL930X_ST_CTRL);
+		priv->l2_bucket_size = 8;
 		break;
 	case RTL9310_FAMILY_ID:
 		priv->ds->ops = &rtl930x_switch_ops;
@@ -609,6 +609,7 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 		priv->fib_entries = 16384;
 		priv->version = RTL8390_VERSION_A;
 		priv->n_lags = 16;
+		priv->l2_bucket_size = 8;
 		break;
 	}
 	pr_debug("Chip version %c\n", priv->version);
diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
index d5ca153a10..40f76a5081 100644
--- a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
+++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/rtl838x.h
@@ -460,6 +460,7 @@ struct rtl838x_switch_priv {
 	u8 port_width;
 	u64 irq_mask;
 	u32 fib_entries;
+	int l2_bucket_size;
 	struct dentry *dbgfs_dir;
 	int n_lags;
 	u64 lags_port_members[MAX_LAGS];