[openwrt/openwrt] mvebu: convert mtd-mac-address to nvmem implementation

LEDE Commits lede-commits at lists.infradead.org
Mon Jul 19 05:51:47 PDT 2021


ynezz pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/2ca8e424b93cbf359a8028acbbe9acabdb9365a9

commit 2ca8e424b93cbf359a8028acbbe9acabdb9365a9
Author: Ansuel Smith <ansuelsmth at gmail.com>
AuthorDate: Fri Apr 2 23:45:20 2021 +0200

    mvebu: convert mtd-mac-address to nvmem implementation
    
    Define nvmem-cells and convert mtd-mac-address to nvmem implementation.
    The conversion is done with an automated script.
    
    Signed-off-by: Ansuel Smith <ansuelsmth at gmail.com>
---
 .../boot/dts/marvell/armada-3720-gl-mv1000.dts     | 23 +++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
index 80b078cfaa..cdc91880ee 100644
--- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
@@ -169,7 +169,8 @@
 				label = "lan0";
 				phy-handle = <&switch0phy1>;
 
-				mtd-mac-address = <&factory 0x6>;
+				nvmem-cells = <&macaddr_factory_6>;
+				nvmem-cell-names = "mac-address";
 			};
 
 			port at 3 {
@@ -177,7 +178,8 @@
 				label = "lan1";
 				phy-handle = <&switch0phy2>;
 
-				mtd-mac-address = <&factory 0x6>;
+				nvmem-cells = <&macaddr_factory_6>;
+				nvmem-cell-names = "mac-address";
 			};
 		};
 
@@ -199,7 +201,8 @@
 };
 
 &eth0 {
-	mtd-mac-address = <&factory 0x0>;
+	nvmem-cells = <&macaddr_factory_0>;
+	nvmem-cell-names = "mac-address";
 	phy-mode = "rgmii-id";
 	status = "okay";
 
@@ -208,3 +211,17 @@
 		full-duplex;
 	};
 };
+
+&factory {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_factory_0: macaddr at 0 {
+		reg = <0x0 0x6>;
+	};
+
+	macaddr_factory_6: macaddr at 6 {
+		reg = <0x6 0x6>;
+	};
+};



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