[openwrt/openwrt] mediatek: add Linksys E8450 support

LEDE Commits lede-commits at lists.infradead.org
Sat Feb 27 23:19:42 EST 2021


dangole pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/aa94e34c1d7ce40684ec01b8ddc056548ecd34f0

commit aa94e34c1d7ce40684ec01b8ddc056548ecd34f0
Author: John Crispin <john at phrozen.org>
AuthorDate: Tue Feb 2 16:29:58 2021 +0100

    mediatek: add Linksys E8450 support
    
    The Linksys E8450, also known as Belkin RT3200, is a dual-band
    IEEE 802.11bgn/ac/ax router based on MediaTek MT7622BV and
    MediaTek MT7915AN chips.
    
    FCC: K7S-03571 and K7S-03572
    
    Hardware highlights:
     - CPU: MediaTek MT7622BV (2x ARM Cortex-A53 @ 1350 MHz max.)
     - RAM: 512MB DDR3
     - Flash: 128MB SPI-NAND (2k+64)
     - Ethernet: MT7531BE switch with 5 1000Base-T ports
                 CPU port connected with 2500Base-X
     - WiFi 2.4 GHz: 802.11bgn 4T4R built-in antennas
                     MT7622VB built-in
     - WiFi   5 GHz: 802.11ac/ax 4T4R built-in antennas
                     MT7915AN chip on-board via PCIe
                     MT7975AN front-end
     - Buttons: Reset and WPS
     - LEDS: 3 user controllable LEDs, 4 wired to switch
     - USB: USB2.0, single port
     - no Bluetooth (supported by SoC, not wired on board)
     - Serial: JST PH 2.0MM 6 Pin connector inside device
                ----_____________----
               [  GND RX - TX  -  -  ]
                ---------------------
     - JTAG:   unpopulated ARM JTAG 20-pin connector (works)
    
    This commit adds support for the device in a way that is compatible
    with the vendor firmware's bootloader and dual-boot flash layout, the
    resulting image can directly be flashed using the vendor firmware.
    
    Signed-off-by: Daniel Golle <daniel at makrotopia.org>
    Signed-off-by: John Crispin <john at phrozen.org>
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 target/linux/mediatek/dts/mt7622-linksys-e8450.dts | 486 +++++++++++++++++++++
 target/linux/mediatek/image/mt7622.mk              |  12 +
 .../mediatek/mt7622/base-files/etc/board.d/01_leds |  18 +
 .../mt7622/base-files/etc/board.d/02_network       |  13 +-
 .../mt7622/base-files/etc/init.d/bootcount         |  11 +
 .../mt7622/base-files/lib/upgrade/platform.sh      |   8 +
 ...nand-Add-support-for-the-Fidelix-FM35X1GA.patch | 122 ++++++
 7 files changed, 667 insertions(+), 3 deletions(-)

diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
new file mode 100644
index 0000000000..719e1d9230
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
@@ -0,0 +1,486 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mt7622.dtsi"
+#include "mt6380.dtsi"
+
+/ {
+	model = "Linksys E8450";
+	compatible = "linksys,e8450", "mediatek,mt7622";
+
+	aliases {
+		serial0 = &uart0;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
+	};
+
+	cpus {
+		cpu at 0 {
+			proc-supply = <&mt6380_vcpu_reg>;
+			sram-supply = <&mt6380_vm_reg>;
+		};
+
+		cpu at 1 {
+			proc-supply = <&mt6380_vcpu_reg>;
+			sram-supply = <&mt6380_vm_reg>;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		factory {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led_power: power_blue {
+			label = "power:blue";
+			gpios = <&pio 95 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		power_orange {
+			label = "power:orange";
+			gpios = <&pio 96 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		inet_blue {
+			label = "inet:blue";
+			gpios = <&pio 97 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		inet_orange {
+			label = "inet:orange";
+			gpios = <&pio 98 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+
+	memory {
+		reg = <0 0x40000000 0 0x40000000>;
+	};
+
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_5v: regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+};
+
+&bch {
+	status = "okay";
+};
+
+&btif {
+	status = "okay";
+};
+
+&cir {
+	pinctrl-names = "default";
+	pinctrl-0 = <&irrx_pins>;
+	status = "okay";
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&eth_pins>;
+	status = "okay";
+
+	gmac0: mac at 0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	mdio-bus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		switch at 0 {
+			compatible = "mediatek,mt7531";
+			reg = <0>;
+			reset-gpios = <&pio 54 0>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port at 0 {
+					reg = <0>;
+					label = "lan1";
+				};
+
+				port at 1 {
+					reg = <1>;
+					label = "lan2";
+				};
+
+				port at 2 {
+					reg = <2>;
+					label = "lan3";
+				};
+
+				port at 3 {
+					reg = <3>;
+					label = "lan4";
+				};
+
+				port at 4 {
+					reg = <4>;
+					label = "wan";
+				};
+
+				port at 6 {
+					reg = <6>;
+					label = "cpu";
+					ethernet = <&gmac0>;
+					phy-mode = "2500base-x";
+
+					fixed-link {
+						speed = <2500>;
+						full-duplex;
+						pause;
+					};
+				};
+			};
+		};
+
+	};
+};
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_pins>;
+	status = "okay";
+};
+
+&pcie1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie1_pins>;
+	status = "okay";
+};
+
+&slot0 {
+	mt7915 at 0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x05000>;
+	};
+};
+
+&pio {
+	/* Attention: GPIO 90 is used to switch between PCIe at 1,0 and
+	 * SATA functions. i.e. output-high: PCIe, output-low: SATA
+	 */
+//	asm_sel {
+//		gpio-hog;
+//		gpios = <90 GPIO_ACTIVE_HIGH>;
+//		output-high;
+//	};
+
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio", "rgmii_via_gmac2";
+		};
+	};
+
+	irrx_pins: irrx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_rx";
+		};
+	};
+
+	irtx_pins: irtx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_tx";
+		};
+	};
+
+	pcie0_pins: pcie0-pins {
+		mux {
+			function = "pcie";
+			groups = "pcie0_pad_perst",
+				 "pcie0_1_waken",
+				 "pcie0_1_clkreq";
+		};
+	};
+
+	pcie1_pins: pcie1-pins {
+		mux {
+			function = "pcie";
+			groups = "pcie1_pad_perst",
+				 "pcie1_0_waken",
+				 "pcie1_0_clkreq";
+		};
+	};
+
+	pmic_bus_pins: pmic-bus-pins {
+		mux {
+			function = "pmic";
+			groups = "pmic_bus";
+		};
+	};
+
+	pwm7_pins: pwm1-2-pins {
+		mux {
+			function = "pwm";
+			groups = "pwm_ch7_2";
+		};
+	};
+
+	wled_pins: wled-pins {
+		mux {
+			function = "led";
+			groups = "wled";
+		};
+	};
+
+	/* Serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	spic0_pins: spic0-pins {
+		mux {
+			function = "spi";
+			groups = "spic0_0";
+		};
+	};
+
+	spic1_pins: spic1-pins {
+		mux {
+			function = "spi";
+			groups = "spic1_0";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_0_tx_rx" ;
+		};
+	};
+
+	uart2_pins: uart2-pins {
+		mux {
+			function = "uart";
+			groups = "uart2_1_tx_rx" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm7_pins>;
+	status = "okay";
+};
+
+&pwrap {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_bus_pins>;
+
+	status = "okay";
+};
+
+&sata {
+	status = "disabled";
+};
+
+&sata_phy {
+	status = "disabled";
+};
+
+&snfi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&serial_nand_pins>;
+	status = "okay";
+
+	spi_nand at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-nand";
+		spi-max-frequency = <104000000>;
+		reg = <0>;
+
+		mediatek,bmt-v2;
+		mediatek,bmt-table-size = <0x1000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "Preloader";
+				reg = <0x00000 0x0080000>;
+				read-only;
+			};
+
+			partition at 80000 {
+				label = "ATF";
+				reg = <0x80000 0x0040000>;
+			};
+
+			partition at c0000 {
+				label = "u-boot";
+				reg = <0xc0000 0x0080000>;
+			};
+
+			partition at 140000 {
+				label = "u-boot-env";
+				reg = <0x140000 0x0080000>;
+			};
+
+			factory: partition at 1c0000 {
+				label = "factory";
+				reg = <0x1c0000 0x0100000>;
+			};
+
+			partition at 300000 {
+				label = "devinfo";
+				reg = <0x300000 0x020000>;
+			};
+
+			partition at 320000 {
+				label = "senv";
+				reg = <0x320000 0x020000>;
+			};
+
+			partition at 360000 {
+				label = "bootseq";
+				reg = <0x360000 0x020000>;
+			};
+
+			partition at 500000 {
+				label = "firmware1";
+				compatible = "denx,fit";
+				openwrt,cmdline-match = "mtdparts=master";
+				reg = <0x500000 0x1E00000>;
+			};
+
+			partition at 2300000 {
+				label = "firmware2";
+				compatible = "denx,fit";
+				openwrt,cmdline-match = "mtdparts=slave";
+				reg = <0x2300000 0x1E00000>;
+			};
+
+			partition at 4100000 {
+				label = "data";
+				reg = <0x4100000 0x1900000>;
+			};
+
+			partition at 5100000 {
+				label = "mfg";
+				reg = <0x5a00000 0x1400000>;
+			};
+		};
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spic0_pins>;
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spic1_pins>;
+	status = "okay";
+};
+
+&ssusb {
+	vusb33-supply = <&reg_3p3v>;
+	vbus-supply = <&reg_5v>;
+	status = "okay";
+};
+
+&u3phy {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_pins>;
+	status = "okay";
+};
+
+&watchdog {
+	pinctrl-names = "default";
+	pinctrl-0 = <&watchdog_pins>;
+	status = "okay";
+};
+
+&wmac {
+	mediatek,mtd-eeprom = <&factory 0x0000>;
+	status = "okay";
+};
diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index 9bf4d6a97a..dce1fb2055 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -38,6 +38,18 @@ define Device/elecom_wrc-2533gent
 endef
 TARGET_DEVICES += elecom_wrc-2533gent
 
+define Device/linksys_e8450
+  DEVICE_VENDOR := Linksys
+  DEVICE_MODEL := E8450
+  DEVICE_ALT0_VENDOR := Belkin
+  DEVICE_ALT0_MODEL := RT3200
+  DEVICE_DTS := mt7622-linksys-e8450
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk \
+		     kmod-mt7615e kmod-mt7615-firmware kmod-mt7915e
+endef
+TARGET_DEVICES += linksys_e8450
+
 define Device/mediatek_mt7622-rfb1
   DEVICE_VENDOR := MediaTek
   DEVICE_MODEL := MTK7622 rfb1 AP
diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
new file mode 100755
index 0000000000..e74944a65f
--- /dev/null
+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
@@ -0,0 +1,18 @@
+#!/bin/sh
+
+. /lib/functions/leds.sh
+. /lib/functions/uci-defaults.sh
+
+board=$(board_name)
+
+board_config_update
+
+case $board in
+linksys,e8450)
+	ucidef_set_led_netdev "wan" "WAN" "inet:blue" "wan"
+	;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
index 3a409c8ec9..3d2b9ffe49 100755
--- a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
@@ -10,9 +10,8 @@ mediatek_setup_interfaces()
 
 	case $board in
 	bananapi,bpi-r64-rootdisk|\
-	bananapi,bpi-r64)
-		ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
-		;;
+	bananapi,bpi-r64|\
+	linksys,e8450|\
 	mediatek,mt7622-rfb1)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
 		;;
@@ -31,7 +30,15 @@ mediatek_setup_macs()
 	local board="$1"
 
 	case $board in
+	linksys,e8450)
+		wan_mac=$(mtd_get_mac_ascii devinfo wan_mac_addr)
+		lan_mac=$(mtd_get_mac_ascii devinfo lan_mac_addr)
+		label_mac=$wan_mac
+		;;
 	esac
+	[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
+	[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
+	[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
 }
 
 board_config_update
diff --git a/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount b/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
new file mode 100755
index 0000000000..bc4eeb6530
--- /dev/null
+++ b/target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
@@ -0,0 +1,11 @@
+#!/bin/sh /etc/rc.common
+
+START=99
+
+boot() {
+	case $(board_name) in
+	linksys,e8450)
+		mtd erase senv || true
+		;;
+	esac
+}
diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
index 8144476943..95ac8b5657 100755
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
@@ -10,6 +10,14 @@ platform_do_upgrade() {
 	mediatek,mt7622,ubi)
 		nand_do_upgrade "$1"
 		;;
+	linksys,e8450)
+		if grep -q mtdparts=slave /proc/cmdline; then
+			PART_NAME=firmware2
+		else
+			PART_NAME=firmware1
+		fi
+		default_do_upgrade "$1"
+		;;
 	*)
 		default_do_upgrade "$1"
 		;;
diff --git a/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch b/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch
new file mode 100644
index 0000000000..69a9297e1f
--- /dev/null
+++ b/target/linux/mediatek/patches-5.10/340-mtd-spinand-Add-support-for-the-Fidelix-FM35X1GA.patch
@@ -0,0 +1,122 @@
+From ea0df4552efcdcc2806fe6eba0540b5f719d80b6 Mon Sep 17 00:00:00 2001
+From: Davide Fioravanti <pantanastyle at gmail.com>
+Date: Fri, 8 Jan 2021 15:35:24 +0100
+Subject: [PATCH 1/1] mtd: spinand: Add support for the Fidelix FM35X1GA
+
+Datasheet: http://www.hobos.com.cn/upload/datasheet/DS35X1GAXXX_100_rev00.pdf
+
+Signed-off-by: Davide Fioravanti <pantanastyle at gmail.com>
+---
+ drivers/mtd/nand/spi/Makefile  |  2 +-
+ drivers/mtd/nand/spi/core.c    |  1 +
+ drivers/mtd/nand/spi/fidelix.c | 80 ++++++++++++++++++++++++++++++++++
+ include/linux/mtd/spinand.h    |  1 +
+ 4 files changed, 83 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/spi/fidelix.c
+
+--- a/drivers/mtd/nand/spi/Makefile
++++ b/drivers/mtd/nand/spi/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
++spinand-objs := core.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -755,6 +755,7 @@ static const struct nand_ops spinand_ops
+ };
+ 
+ static const struct spinand_manufacturer *spinand_manufacturers[] = {
++	&fidelix_spinand_manufacturer,
+ 	&gigadevice_spinand_manufacturer,
+ 	&macronix_spinand_manufacturer,
+ 	&micron_spinand_manufacturer,
+--- /dev/null
++++ b/drivers/mtd/nand/spi/fidelix.c
+@@ -0,0 +1,76 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Copyright (c) 2020 Davide Fioravanti <pantanastyle at gmail.com>
++ */
++
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/mtd/spinand.h>
++
++#define SPINAND_MFR_FIDELIX		0xE5
++#define FIDELIX_ECCSR_MASK		0x0F
++
++static SPINAND_OP_VARIANTS(read_cache_variants,
++		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
++		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
++
++static SPINAND_OP_VARIANTS(write_cache_variants,
++		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
++		SPINAND_PROG_LOAD(true, 0, NULL, 0));
++
++static SPINAND_OP_VARIANTS(update_cache_variants,
++		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
++		SPINAND_PROG_LOAD(false, 0, NULL, 0));
++
++static int fm35x1ga_ooblayout_ecc(struct mtd_info *mtd, int section,
++				  struct mtd_oob_region *region)
++{
++	if (section > 3)
++		return -ERANGE;
++
++	region->offset = (16 * section) + 8;
++	region->length = 8;
++
++	return 0;
++}
++
++static int fm35x1ga_ooblayout_free(struct mtd_info *mtd, int section,
++				   struct mtd_oob_region *region)
++{
++	if (section > 3)
++		return -ERANGE;
++
++	region->offset = (16 * section) + 2;
++	region->length = 6;
++
++	return 0;
++}
++
++static const struct mtd_ooblayout_ops fm35x1ga_ooblayout = {
++	.ecc = fm35x1ga_ooblayout_ecc,
++	.free = fm35x1ga_ooblayout_free,
++};
++
++static const struct spinand_info fidelix_spinand_table[] = {
++	SPINAND_INFO("FM35X1GA",
++		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
++		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++		     NAND_ECCREQ(4, 512),
++		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++					      &write_cache_variants,
++					      &update_cache_variants),
++		     SPINAND_HAS_QE_BIT,
++		     SPINAND_ECCINFO(&fm35x1ga_ooblayout, NULL)),
++};
++
++static const struct spinand_manufacturer_ops fidelix_spinand_manuf_ops = {
++};
++
++const struct spinand_manufacturer fidelix_spinand_manufacturer = {
++	.id = SPINAND_MFR_FIDELIX,
++	.name = "Fidelix",
++	.chips = fidelix_spinand_table,
++	.nchips = ARRAY_SIZE(fidelix_spinand_table),
++	.ops = &fidelix_spinand_manuf_ops,
++};
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -238,6 +238,7 @@ struct spinand_manufacturer {
+ };
+ 
+ /* SPI NAND manufacturers */
++extern const struct spinand_manufacturer fidelix_spinand_manufacturer;
+ extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
+ extern const struct spinand_manufacturer macronix_spinand_manufacturer;
+ extern const struct spinand_manufacturer micron_spinand_manufacturer;



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